From: kstailey <kstailey@openbsd.org>
Date: Fri, 14 Feb 1997 18:01:58 +0000 (+0000)
Subject: change spl0 from macro to assember function in locore.s
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=e0add334c15114a4b88cc81ef7c1d1dbb82db31a;p=openbsd

change spl0 from macro to assember function in locore.s
---

diff --git a/sys/arch/sun3/include/param.h b/sys/arch/sun3/include/param.h
index a16a48420a9..266312289d4 100644
--- a/sys/arch/sun3/include/param.h
+++ b/sys/arch/sun3/include/param.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: param.h,v 1.9 1997/02/14 17:57:06 kstailey Exp $	*/
+/*	$OpenBSD: param.h,v 1.10 1997/02/14 18:01:59 kstailey Exp $	*/
 /*	$NetBSD: param.h,v 1.34 1996/03/04 05:04:40 cgd Exp $	*/
 
 /*
@@ -171,7 +171,6 @@
  * have no need to check for any simulated interrupts, etc.
  */
 
-#define spl0()  _spl(PSL_S|PSL_IPL0)
 #define spl1()  _spl(PSL_S|PSL_IPL1)
 #define spl2()  _spl(PSL_S|PSL_IPL2)
 #define spl3()  _spl(PSL_S|PSL_IPL3)
@@ -208,6 +207,9 @@
 #define splhigh()       spl7()
 #define splsched()      spl7()
 
+/* watch out for side effects */
+#define	splx(s)		(s & PSL_IPL ? _spl(s) : spl0())
+
 /* Get current sr value (debug, etc.) */
 extern int getsr __P((void));
 
diff --git a/sys/arch/sun3/sun3/locore.s b/sys/arch/sun3/sun3/locore.s
index 3f81db4444e..9ab7e0845fb 100644
--- a/sys/arch/sun3/sun3/locore.s
+++ b/sys/arch/sun3/sun3/locore.s
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.s,v 1.11 1997/02/10 12:24:37 downsj Exp $	*/
+/*	$OpenBSD: locore.s,v 1.12 1997/02/14 18:01:58 kstailey Exp $	*/
 /*	$NetBSD: locore.s,v 1.40 1996/11/06 20:19:54 cgd Exp $	*/
 
 /*
@@ -1207,6 +1207,26 @@ ENTRY(getsr)
 	movw	sr, d0
 	rts
 
+/*
+ * Set processor priority level calls.  Most are implemented with
+ * inline asm expansions.  However, spl0 requires special handling
+ * as we need to check for our emulated software interrupts.
+ */
+
+ENTRY(spl0)
+	moveq	#0,d0
+	movw	sr,d0			| get old SR for return
+	movw	#PSL_LOWIPL,sr		| restore new SR
+	tstb	_ssir			| software interrupt pending?
+	jeq	Lspldone		| no, all done
+	subql	#4,sp			| make room for RTE frame
+	movl	sp@(4),sp@(2)		| position return address
+	clrw	sp@(6)			| set frame type 0
+	movw	#PSL_LOWIPL,sp@		| and new SR
+	jra	Lgotsir			| go handle it
+Lspldone:
+	rts
+
 ENTRY(_insque)
 	movw	sr,d0
 	movw	#PSL_HIGHIPL,sr		| atomic