From: jca <jca@openbsd.org>
Date: Tue, 11 Jun 2024 16:02:35 +0000 (+0000)
Subject: Enable UVM percpu cache on riscv64
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=cb1089069b68271931481c5c46b626afc1ea4653;p=openbsd

Enable UVM percpu cache on riscv64

Proved stable in multiple ports bulk builds.  ok kettenis@ phessler@
---

diff --git a/sys/arch/riscv64/include/cpu.h b/sys/arch/riscv64/include/cpu.h
index f7b6dca18b4..2b14083c31e 100644
--- a/sys/arch/riscv64/include/cpu.h
+++ b/sys/arch/riscv64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.23 2024/04/29 13:07:18 jsg Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.24 2024/06/11 16:02:35 jca Exp $	*/
 
 /*
  * Copyright (c) 2019 Mike Larkin <mlarkin@openbsd.org>
@@ -72,6 +72,7 @@
 #include <sys/device.h>
 #include <sys/sched.h>
 #include <sys/srp.h>
+#include <uvm/uvm_percpu.h>
 
 struct cpu_info {
 	struct device		*ci_dev; /* Device corresponding to this CPU */
@@ -108,6 +109,8 @@ struct cpu_info {
 
 #ifdef MULTIPROCESSOR
 	struct srp_hazard	ci_srp_hazards[SRP_HAZARD_NUM];
+#define	__HAVE_UVM_PERCPU
+	struct uvm_pmr_cache	ci_uvm;
 	volatile int		ci_flags;
 	uint64_t		ci_satp;
 	vaddr_t			ci_initstack_end;