From: tb Date: Thu, 12 Aug 2021 15:13:52 +0000 (+0000) Subject: Sync amd64's p3_get_bus_clock() with i386 X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=c85c995cce559e903dfc1571bebc84a45b89edab;p=openbsd Sync amd64's p3_get_bus_clock() with i386 The printfs complaining about unknown FSB_FREQ values didn't end with a newline. jsg points out that this is because the original i386 code then prints MSR_EBL_CR_POWERON, which was omitted when the code was adapted for amd64. ok jsg --- diff --git a/sys/arch/amd64/amd64/est.c b/sys/arch/amd64/amd64/est.c index 9565de6d12e..c6c2236c96d 100644 --- a/sys/arch/amd64/amd64/est.c +++ b/sys/arch/amd64/amd64/est.c @@ -1,4 +1,4 @@ -/* $OpenBSD: est.c,v 1.40 2021/08/11 18:15:50 tb Exp $ */ +/* $OpenBSD: est.c,v 1.41 2021/08/12 15:13:52 tb Exp $ */ /* * Copyright (c) 2003 Michael Eriksson. * All rights reserved. @@ -187,7 +187,7 @@ p3_get_bus_clock(struct cpu_info *ci) default: printf("%s: unknown Core FSB_FREQ value %d", ci->ci_dev->dv_xname, bus); - break; + goto print_msr; } break; case 0x1c: /* Atom */ @@ -211,13 +211,20 @@ p3_get_bus_clock(struct cpu_info *ci) default: printf("%s: unknown Atom FSB_FREQ value %d", ci->ci_dev->dv_xname, bus); - break; + goto print_msr; } break; default: /* no FSB on modern Intel processors */ break; } + return; +print_msr: + /* + * Show the EBL_CR_POWERON MSR, so we'll at least have + * some extra information, such as clock ratio, etc. + */ + printf(" (0x%llx)\n", rdmsr(MSR_EBL_CR_POWERON)); } #if NACPICPU > 0