From: jsg Date: Sun, 18 Jan 2015 14:55:02 +0000 (+0000) Subject: Switch some uses of msr that only deal with interrupts/mode to use X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=c0797b8192b4eb07c37a812f632ff4a703255c01;p=openbsd Switch some uses of msr that only deal with interrupts/mode to use just the control field ('c' bits 7:0) instead of 'all' which includes the flags field ('f' bits 31:24) which isn't modified. --- diff --git a/sys/arch/arm/arm/cpufunc_asm_sa1.S b/sys/arch/arm/arm/cpufunc_asm_sa1.S index e17a95fb5f8..d729af49985 100644 --- a/sys/arch/arm/arm/cpufunc_asm_sa1.S +++ b/sys/arch/arm/arm/cpufunc_asm_sa1.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc_asm_sa1.S,v 1.4 2015/01/18 12:03:11 jsg Exp $ */ +/* $OpenBSD: cpufunc_asm_sa1.S,v 1.5 2015/01/18 14:55:02 jsg Exp $ */ /* $NetBSD: cpufunc_asm_sa1.S,v 1.8 2002/08/17 16:36:32 thorpej Exp $ */ /* @@ -48,7 +48,7 @@ ENTRY(sa1_setttb) mrs r3, cpsr orr r1, r3, #(I32_bit | F32_bit) - msr cpsr_all, r1 + msr cpsr_c, r1 stmfd sp!, {r0-r3, lr} bl _C_LABEL(sa1_cache_cleanID) @@ -69,7 +69,7 @@ ENTRY(sa1_setttb) mov r0, r0 mov r0, r0 - msr cpsr_all, r3 + msr cpsr_c, r3 mov pc, lr /* @@ -133,10 +133,10 @@ _C_LABEL(sa1_cache_clean_size): #define SA1_CACHE_CLEAN_BLOCK \ mrs r3, cpsr ; \ orr r0, r3, #(I32_bit | F32_bit) ; \ - msr cpsr_all, r0 + msr cpsr_c, r0 #define SA1_CACHE_CLEAN_UNBLOCK \ - msr cpsr_all, r3 + msr cpsr_c, r3 #ifdef DOUBLE_CACHE_CLEAN_BANK #define SA1_DOUBLE_CACHE_CLEAN_BANK \ diff --git a/sys/arch/arm/arm/cpufunc_asm_xscale.S b/sys/arch/arm/arm/cpufunc_asm_xscale.S index b77df2e27bc..fc0c81ff050 100644 --- a/sys/arch/arm/arm/cpufunc_asm_xscale.S +++ b/sys/arch/arm/arm/cpufunc_asm_xscale.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc_asm_xscale.S,v 1.5 2015/01/18 12:03:11 jsg Exp $ */ +/* $OpenBSD: cpufunc_asm_xscale.S,v 1.6 2015/01/18 14:55:02 jsg Exp $ */ /* $NetBSD: cpufunc_asm_xscale.S,v 1.16 2002/08/17 16:36:32 thorpej Exp $ */ /* @@ -130,7 +130,7 @@ ENTRY(xscale_control) ENTRY(xscale_setttb) mrs r3, cpsr orr r1, r3, #(I32_bit | F32_bit) - msr cpsr_all, r1 + msr cpsr_c, r1 stmfd sp!, {r0-r3, lr} bl _C_LABEL(xscale_cache_cleanID) @@ -152,7 +152,7 @@ ENTRY(xscale_setttb) CPWAIT(r0) - msr cpsr_all, r3 + msr cpsr_c, r3 mov pc, lr /* @@ -246,10 +246,10 @@ _C_LABEL(xscale_cache_clean_size): #define XSCALE_CACHE_CLEAN_BLOCK \ mrs r3, cpsr ; \ orr r0, r3, #(I32_bit | F32_bit) ; \ - msr cpsr_all, r0 + msr cpsr_c, r0 #define XSCALE_CACHE_CLEAN_UNBLOCK \ - msr cpsr_all, r3 + msr cpsr_c, r3 #define XSCALE_CACHE_CLEAN_PROLOGUE \ XSCALE_CACHE_CLEAN_BLOCK ; \ diff --git a/sys/arch/arm/arm/fiq_subr.S b/sys/arch/arm/arm/fiq_subr.S index 34a3147517c..7b805ec06ab 100644 --- a/sys/arch/arm/arm/fiq_subr.S +++ b/sys/arch/arm/arm/fiq_subr.S @@ -1,4 +1,4 @@ -/* $OpenBSD: fiq_subr.S,v 1.3 2015/01/18 12:03:11 jsg Exp $ */ +/* $OpenBSD: fiq_subr.S,v 1.4 2015/01/18 14:55:02 jsg Exp $ */ /* $NetBSD: fiq_subr.S,v 1.3 2002/04/12 18:50:31 thorpej Exp $ */ /* @@ -47,10 +47,10 @@ mov r3, r2 ; \ bic r2, r2, #(PSR_MODE) ; \ orr r2, r2, #(PSR_FIQ32_MODE) ; \ - msr cpsr_all, r2 + msr cpsr_c, r2 #define BACK_TO_SVC_MODE \ - msr cpsr_all, r3 + msr cpsr_c, r3 /* * fiq_getregs: diff --git a/sys/arch/arm/arm/locore.S b/sys/arch/arm/arm/locore.S index c8eec47239a..d662383a075 100644 --- a/sys/arch/arm/arm/locore.S +++ b/sys/arch/arm/arm/locore.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.S,v 1.5 2015/01/18 10:17:41 jsg Exp $ */ +/* $OpenBSD: locore.S,v 1.6 2015/01/18 14:55:02 jsg Exp $ */ /* $NetBSD: locore.S,v 1.14 2003/04/20 16:21:40 thorpej Exp $ */ /* @@ -111,7 +111,7 @@ ENTRY_NP(cpu_reset) bic r2, r2, #(PSR_MODE) orr r2, r2, #(PSR_SVC32_MODE) orr r2, r2, #(I32_bit | F32_bit) - msr cpsr_all, r2 + msr cpsr_c, r2 ldr r4, .Lcpu_reset_address ldr r4, [r4] diff --git a/sys/arch/arm/arm/setstack.S b/sys/arch/arm/arm/setstack.S index e6285279a91..bc6f92b862f 100644 --- a/sys/arch/arm/arm/setstack.S +++ b/sys/arch/arm/arm/setstack.S @@ -1,4 +1,4 @@ -/* $OpenBSD: setstack.S,v 1.2 2004/02/01 06:10:33 drahn Exp $ */ +/* $OpenBSD: setstack.S,v 1.3 2015/01/18 14:55:02 jsg Exp $ */ /* $NetBSD: setstack.S,v 1.2 2002/08/15 01:37:02 briggs Exp $ */ /* @@ -63,11 +63,11 @@ ENTRY(set_stackptr) mrs r3, cpsr /* Switch to the appropriate mode */ bic r2, r3, #(PSR_MODE) orr r2, r2, r0 - msr cpsr_all, r2 + msr cpsr_c, r2 mov sp, r1 /* Set the stack pointer */ - msr cpsr_all, r3 /* Restore the old mode */ + msr cpsr_c, r3 /* Restore the old mode */ mov pc, lr /* Exit */ @@ -82,11 +82,11 @@ ENTRY(get_stackptr) mrs r3, cpsr /* Switch to the appropriate mode */ bic r2, r3, #(PSR_MODE) orr r2, r2, r0 - msr cpsr_all, r2 + msr cpsr_c, r2 mov r0, sp /* Set the stack pointer */ - msr cpsr_all, r3 /* Restore the old mode */ + msr cpsr_c, r3 /* Restore the old mode */ mov pc, lr /* Exit */ diff --git a/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c b/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c index 992bbbc61e6..5db2a464cdf 100644 --- a/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c +++ b/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c @@ -1,4 +1,4 @@ -/* $OpenBSD: zbsdmod.c,v 1.10 2015/01/18 12:03:11 jsg Exp $ */ +/* $OpenBSD: zbsdmod.c,v 1.11 2015/01/18 14:55:02 jsg Exp $ */ /* * Copyright (c) 2005 Uwe Stuehler @@ -133,7 +133,7 @@ elf32bsdboot(void) __asm__ volatile ("mrs %0, cpsr" : "=r" (cpsr)); cpsr |= 0xc0; /* set FI */ - __asm__ volatile ("msr cpsr_all, %0" :: "r" (cpsr)); + __asm__ volatile ("msr cpsr_c, %0" :: "r" (cpsr)); /* * Copy the boot arguments.