From: kettenis Date: Wed, 19 May 2021 21:23:20 +0000 (+0000) Subject: Get rid of the do-nothing cache setup code. The RISC-V architecture has X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=bf89b30cb512c646ac816f6540188b19837cce71;p=openbsd Get rid of the do-nothing cache setup code. The RISC-V architecture has no architecturally defined caches (yet) so there is nothing to set up here. Gets rid of some more useless XXX. --- diff --git a/sys/arch/riscv64/riscv64/machdep.c b/sys/arch/riscv64/riscv64/machdep.c index 1faeac1cf12..e54942ee9da 100644 --- a/sys/arch/riscv64/riscv64/machdep.c +++ b/sys/arch/riscv64/riscv64/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.17 2021/05/16 10:38:53 kettenis Exp $ */ +/* $OpenBSD: machdep.c,v 1.18 2021/05/19 21:23:20 kettenis Exp $ */ /* * Copyright (c) 2014 Patrick Wildt @@ -435,19 +435,6 @@ cpu_dumpsize(void) return (1); } -int64_t dcache_line_size; /* The minimum D cache line size */ -int64_t icache_line_size; /* The minimum I cache line size */ -int64_t idcache_line_size; /* The minimum cache line size */ - -void -cache_setup(void) -{ -// XXX TODO CMPE, following freebsd - dcache_line_size = 0; - icache_line_size = 0; - idcache_line_size = 0; -} - u_long cpu_dump_mempagecnt(void) { @@ -641,7 +628,6 @@ initriscv(struct riscv_bootparams *rbp) } sbi_init(); - cache_setup();//dummy for now process_kernel_args();