From: deraadt Date: Mon, 2 Aug 2010 17:13:57 +0000 (+0000) Subject: The EC GPE is always edge. edge interrupts have their STS bit reset X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=b88e0f1433e21bd16f2c89e47cee7f2fd5495372;p=openbsd The EC GPE is always edge. edge interrupts have their STS bit reset at interrupt reception; level interrupts have STS cleared when processing is complete. Since the STS has already been reset at interrupt reception we should not reset late.. Found by marco --- diff --git a/sys/dev/acpi/acpiec.c b/sys/dev/acpi/acpiec.c index d455029fb4d..53f278affe5 100644 --- a/sys/dev/acpi/acpiec.c +++ b/sys/dev/acpi/acpiec.c @@ -1,4 +1,4 @@ -/* $OpenBSD: acpiec.c,v 1.40 2010/07/29 18:32:26 kettenis Exp $ */ +/* $OpenBSD: acpiec.c,v 1.41 2010/08/02 17:13:57 deraadt Exp $ */ /* * Copyright (c) 2006 Can Erkin Acar * @@ -331,7 +331,6 @@ acpiec_gpehandler(struct acpi_softc *acpi_sc, int gpe, void *arg) /* Unmask the GPE which was blocked at interrupt time */ s = spltty(); mask = (1L << (gpe & 7)); - acpi_write_pmreg(acpi_sc, ACPIREG_GPE_STS, gpe>>3, mask); en = acpi_read_pmreg(acpi_sc, ACPIREG_GPE_EN, gpe>>3); acpi_write_pmreg(acpi_sc, ACPIREG_GPE_EN, gpe>>3, en | mask); splx(s);