From: jsg Date: Sun, 25 Apr 2021 02:48:00 +0000 (+0000) Subject: cleanup riscv64 config glue X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=b4df56a53a46265c7a71425c00b5395c614cda1a;p=openbsd cleanup riscv64 config glue ok kettenis@ visa@ --- diff --git a/sys/arch/riscv64/conf/GENERIC b/sys/arch/riscv64/conf/GENERIC index f8394e102bf..ee9f0fca463 100644 --- a/sys/arch/riscv64/conf/GENERIC +++ b/sys/arch/riscv64/conf/GENERIC @@ -33,9 +33,9 @@ timer0 at cpu0 intc0 at cpu0 # NS16550 compatible serial ports -com* at mainbus0 early 1 +com* at fdt? -virtio* at mainbus0 +virtio* at fdt? vio* at virtio? # Network vioblk* at virtio? vioscsi* at virtio? # Disk (SCSI) @@ -43,9 +43,9 @@ vioscsi* at virtio? # Disk (SCSI) viornd* at virtio? # Random Source # simplebus0 -simplebus* at mainbus0 early 1 +simplebus* at fdt? # Platform Level Interrupt Controller -plic* at simplebus? early 1 +plic* at fdt? early 1 syscon* at fdt? early 1 gfrtc* at fdt? diff --git a/sys/arch/riscv64/conf/RAMDISK b/sys/arch/riscv64/conf/RAMDISK index 8427beef0e2..7955b94ed5e 100644 --- a/sys/arch/riscv64/conf/RAMDISK +++ b/sys/arch/riscv64/conf/RAMDISK @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK,v 1.4 2021/04/24 05:14:45 jsg Exp $ +# $OpenBSD: RAMDISK,v 1.5 2021/04/25 02:48:00 jsg Exp $ # # GENERIC machine description file # @@ -52,9 +52,9 @@ timer0 at cpu0 intc0 at cpu0 # NS16550 compatible serial ports -com* at mainbus0 early 1 +com* at fdt? -virtio* at mainbus0 +virtio* at fdt? vio* at virtio? # Network vioblk* at virtio? vioscsi* at virtio? # Disk (SCSI) @@ -62,9 +62,9 @@ vioscsi* at virtio? # Disk (SCSI) viornd* at virtio? # Random Source # simplebus0 -simplebus* at mainbus0 early 1 +simplebus* at fdt? # Platform Level Interrupt Controller -plic* at simplebus? early 1 +plic* at fdt? early 1 syscon* at fdt? early 1 gfrtc* at fdt? diff --git a/sys/arch/riscv64/conf/files.riscv64 b/sys/arch/riscv64/conf/files.riscv64 index e599f4f8f63..2e08f6b1d0b 100644 --- a/sys/arch/riscv64/conf/files.riscv64 +++ b/sys/arch/riscv64/conf/files.riscv64 @@ -49,10 +49,10 @@ define fdt {[early = 0]} # # mainbus # -define mainbus {[early = 0]} +define mainbus {} device mainbus: fdt attach mainbus at root -file arch/riscv64/dev/mainbus.c +file arch/riscv64/dev/mainbus.c mainbus # # cpu @@ -60,34 +60,33 @@ file arch/riscv64/dev/mainbus.c define cpu {} device cpu attach cpu at mainbus -file arch/riscv64/riscv64/cpu.c +file arch/riscv64/riscv64/cpu.c cpu # # timer # device timer attach timer at cpu -file arch/riscv64/dev/timer.c +file arch/riscv64/dev/timer.c timer # # HART-specific interrupt controller # device intc attach intc at cpu -file arch/riscv64/dev/riscv_cpu_intc.c +file arch/riscv64/dev/riscv_cpu_intc.c intc # # simplebus # -define simplebus {[early = 1]} -device simplebus -attach simplebus at mainbus -file arch/riscv64/dev/simplebus.c +device simplebus: fdt +attach simplebus at fdt +file arch/riscv64/dev/simplebus.c simplebus # PLIC device plic -attach plic at simplebus -file arch/riscv64/dev/plic.c +attach plic at fdt +file arch/riscv64/dev/plic.c plic # Paravirtual device bus and virtio