From: aoyama <aoyama@openbsd.org>
Date: Mon, 29 Aug 2016 23:14:50 +0000 (+0000)
Subject: Change le(4) buffer address to 0x71010000, which is the same address
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=95758d8bd8a6e5b0e1c3572fd387b9480b4fc9a2;p=openbsd

Change le(4) buffer address to 0x71010000, which is the same address
with NetBSD/luna68k.

LUNA has 128KB so-called '3 port RAM' starting at 0x71000000.
Originally, first 64KB of this area is designed for I/O processor
HD647180, and next 64KB is designed for LANCE.

This makes possible to support I/O processor in the future:-)
---

diff --git a/sys/arch/luna88k/dev/if_le.c b/sys/arch/luna88k/dev/if_le.c
index 7b22b52d88d..9f1d75678ea 100644
--- a/sys/arch/luna88k/dev/if_le.c
+++ b/sys/arch/luna88k/dev/if_le.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_le.c,v 1.8 2014/12/22 02:26:53 tedu Exp $	*/
+/*	$OpenBSD: if_le.c,v 1.9 2016/08/29 23:14:50 aoyama Exp $	*/
 /*	$NetBSD: if_le.c,v 1.33 1996/11/20 18:56:52 gwr Exp $	*/
 
 /*-
@@ -128,7 +128,7 @@ le_attach(struct device *parent, struct device *self, void *aux)
 
         lesc->sc_r1 = (struct lereg1 *)ma->ma_addr;     /* LANCE */
 
-        sc->sc_mem = (void *)0x71000000;                /* SRAM */
+        sc->sc_mem = (void *)0x71010000;                /* SRAM */
         sc->sc_conf3 = LE_C3_BSWP;
         sc->sc_addr = (u_long)sc->sc_mem & 0xffffff;
         sc->sc_memsize = 64 * 1024;                     /* 64KB */