From: jsg Date: Wed, 16 Aug 2023 07:26:05 +0000 (+0000) Subject: avoid patch level msr on amd families < 0fh X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=92db83438c54a3da7528d3fa9a5b6ca529dff655;p=openbsd avoid patch level msr on amd families < 0fh Paul de Weerd reported it isn't implemented on ALIX with cpu0: Geode(TM) Integrated Processor by AMD PCS ("AuthenticAMD" 586-class) 499 MHz, 05-0a-02 the earliest amd microcode update files I can find are for family 0fh (K8) ok guenther@ --- diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index 8f943685c82..7bbefdfcd6c 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.666 2023/08/09 00:01:44 jsg Exp $ */ +/* $OpenBSD: machdep.c,v 1.667 2023/08/16 07:26:05 jsg Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -1863,7 +1863,8 @@ identifycpu(struct cpu_info *ci) uint64_t level = 0; uint32_t dummy; - if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { + if (strcmp(cpu_vendor, "AuthenticAMD") == 0 && + ci->ci_family >= 0x0f) { level = rdmsr(MSR_PATCH_LEVEL); } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) { wrmsr(MSR_BIOS_SIGN, 0);