From: jsg <jsg@openbsd.org>
Date: Tue, 20 Jun 2023 02:37:06 +0000 (+0000)
Subject: drm/amdgpu: fix xclk freq on CHIP_STONEY
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=920f24ae8be11a60bdf60fd4a70b2b914a610a92;p=openbsd

drm/amdgpu: fix xclk freq on CHIP_STONEY

From Chia-I Wu
34419aa0b448b0eee941102793893e0e256abda1 in linux-6.1.y/6.1.34
b447b079cf3a9971ea4d31301e673f49612ccc18 in mainline linux
---

diff --git a/sys/dev/pci/drm/amd/amdgpu/vi.c b/sys/dev/pci/drm/amd/amdgpu/vi.c
index 1e52c5f581e..2a3fbba7605 100644
--- a/sys/dev/pci/drm/amd/amdgpu/vi.c
+++ b/sys/dev/pci/drm/amd/amdgpu/vi.c
@@ -542,8 +542,15 @@ static u32 vi_get_xclk(struct amdgpu_device *adev)
 	u32 reference_clock = adev->clock.spll.reference_freq;
 	u32 tmp;
 
-	if (adev->flags & AMD_IS_APU)
-		return reference_clock;
+	if (adev->flags & AMD_IS_APU) {
+		switch (adev->asic_type) {
+		case CHIP_STONEY:
+			/* vbios says 48Mhz, but the actual freq is 100Mhz */
+			return 10000;
+		default:
+			return reference_clock;
+		}
+	}
 
 	tmp = RREG32_SMC(ixCG_CLKPIN_CNTL_2);
 	if (REG_GET_FIELD(tmp, CG_CLKPIN_CNTL_2, MUX_TCLK_TO_XCLK))