From: kettenis Date: Sun, 12 Jun 2022 10:51:55 +0000 (+0000) Subject: Add stftemp(4), a driver for the temperature sensor integrated on the X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=8aadf3cace8735051afe3549e8c91537b0d3c9ef;p=openbsd Add stftemp(4), a driver for the temperature sensor integrated on the StarFive JH7100 SoC. ok jsg@ --- diff --git a/sys/arch/riscv64/conf/GENERIC b/sys/arch/riscv64/conf/GENERIC index c69b00978c9..0b2759d0536 100644 --- a/sys/arch/riscv64/conf/GENERIC +++ b/sys/arch/riscv64/conf/GENERIC @@ -1,4 +1,4 @@ -# $OpenBSD: GENERIC,v 1.39 2022/06/09 12:16:56 kettenis Exp $ +# $OpenBSD: GENERIC,v 1.40 2022/06/12 10:51:55 kettenis Exp $ # # For further information on compiling OpenBSD kernels, see the config(8) # man page. @@ -62,6 +62,7 @@ sfuart* at fdt? # StarFive SoCs stfclock* at fdt? early 1 stfpinctrl* at fdt? early 1 +stftemp* at fdt? virtio* at fdt? virtio* at pci? diff --git a/sys/arch/riscv64/conf/files.riscv64 b/sys/arch/riscv64/conf/files.riscv64 index 9d93d79b6b3..b88d81de007 100644 --- a/sys/arch/riscv64/conf/files.riscv64 +++ b/sys/arch/riscv64/conf/files.riscv64 @@ -1,4 +1,4 @@ -# $OpenBSD: files.riscv64,v 1.23 2022/06/08 08:40:53 kettenis Exp $ +# $OpenBSD: files.riscv64,v 1.24 2022/06/12 10:51:55 kettenis Exp $ # Standard stanzas config(8) can't run without maxpartitions 16 @@ -129,6 +129,11 @@ device stfpinctrl attach stfpinctrl at fdt file arch/riscv64/dev/stfpinctrl.c stfpinctrl +# StarFive temperature sensor +device stftemp +attach stftemp at fdt +file arch/riscv64/dev/stftemp.c stftemp + # Paravirtual device bus and virtio include "dev/pv/files.pv" diff --git a/sys/arch/riscv64/dev/stfclock.c b/sys/arch/riscv64/dev/stfclock.c index b1be4a2b13d..f91fe2391bf 100644 --- a/sys/arch/riscv64/dev/stfclock.c +++ b/sys/arch/riscv64/dev/stfclock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: stfclock.c,v 1.1 2022/06/06 14:57:33 kettenis Exp $ */ +/* $OpenBSD: stfclock.c,v 1.2 2022/06/12 10:51:55 kettenis Exp $ */ /* * Copyright (c) 2022 Mark Kettenis * @@ -48,6 +48,8 @@ #define JH7100_CLK_GMAC_GTX 123 #define JH7100_CLK_UART0_CORE 147 #define JH7100_CLK_UART3_CORE 162 +#define JH7100_CLK_TEMP_APB 183 +#define JH7100_CLK_TEMP_SENSE 184 #define JH7100_CLK_PLL0_OUT 186 #define JH7100_CLK_PLL1_OUT 187 #define JH7100_CLK_PLL2_OUT 188 @@ -280,6 +282,8 @@ stfclock_enable(void *cookie, uint32_t *cells, int on) case JH7100_CLK_GMAC_GTX: case JH7100_CLK_UART0_CORE: case JH7100_CLK_UART3_CORE: + case JH7100_CLK_TEMP_APB: + case JH7100_CLK_TEMP_SENSE: if (on) HSET4(sc, idx * 4, 1U << 31); else diff --git a/sys/arch/riscv64/dev/stftemp.c b/sys/arch/riscv64/dev/stftemp.c new file mode 100644 index 00000000000..235f0f09fc4 --- /dev/null +++ b/sys/arch/riscv64/dev/stftemp.c @@ -0,0 +1,158 @@ +/* $OpenBSD: stftemp.c,v 1.1 2022/06/12 10:51:55 kettenis Exp $ */ +/* + * Copyright (c) 2022 Mark Kettenis + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +/* Registers */ +#define TEMP 0x0000 +#define TEMP_PD (1 << 1) +#define TEMP_RSTN (1 << 0) +#define TEMP_RUN (1 << 2) +#define TEMP_DOUT_MASK 0x0fff0000 +#define TEMP_DOUT_SHIFT 16 + +#define HREAD4(sc, reg) \ + (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))) +#define HWRITE4(sc, reg, val) \ + bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) + +struct stftemp_softc { + struct device sc_dev; + bus_space_tag_t sc_iot; + bus_space_handle_t sc_ioh; + + struct ksensor sc_sensor; + struct ksensordev sc_sensordev; + + struct thermal_sensor sc_ts; +}; + +int stftemp_match(struct device *, void *, void *); +void stftemp_attach(struct device *, struct device *, void *); + +const struct cfattach stftemp_ca = { + sizeof (struct stftemp_softc), stftemp_match, stftemp_attach +}; + +struct cfdriver stftemp_cd = { + NULL, "stftemp", DV_DULL +}; + +void stftemp_refresh_sensors(void *); +int32_t stftemp_get_temperature(void *, uint32_t *); + +int +stftemp_match(struct device *parent, void *match, void *aux) +{ + struct fdt_attach_args *faa = aux; + + return OF_is_compatible(faa->fa_node, "starfive,jh7100-temp"); +} + +void +stftemp_attach(struct device *parent, struct device *self, void *aux) +{ + struct stftemp_softc *sc = (struct stftemp_softc *)self; + struct fdt_attach_args *faa = aux; + + if (faa->fa_nreg < 1) { + printf(": no registers\n"); + return; + } + + sc->sc_iot = faa->fa_iot; + if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, + faa->fa_reg[0].size, 0, &sc->sc_ioh)) { + printf(": can't map registers\n"); + return; + } + + printf("\n"); + + clock_enable(faa->fa_node, "bus"); + reset_deassert(faa->fa_node, "bus"); + + clock_enable(faa->fa_node, "sense"); + reset_deassert(faa->fa_node, "sense"); + + /* Power down */ + HWRITE4(sc, TEMP, TEMP_PD); + delay(1); + + /* Power up with reset asserted */ + HWRITE4(sc, TEMP, 0); + delay(60); + + /* Deassert reset */ + HWRITE4(sc, TEMP, TEMP_RSTN); + delay(1); + + /* Start measuring */ + HWRITE4(sc, TEMP, TEMP_RSTN | TEMP_RUN); + + /* Register sensor */ + strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname, + sizeof(sc->sc_sensordev.xname)); + sc->sc_sensor.type = SENSOR_TEMP; + sc->sc_sensor.flags = SENSOR_FINVALID; + sensor_attach(&sc->sc_sensordev, &sc->sc_sensor); + sensordev_install(&sc->sc_sensordev); + sensor_task_register(sc, stftemp_refresh_sensors, 5); + + sc->sc_ts.ts_node = faa->fa_node; + sc->sc_ts.ts_cookie = sc; + sc->sc_ts.ts_get_temperature = stftemp_get_temperature; + thermal_sensor_register(&sc->sc_ts); +} + +int32_t +stftemp_get_temp(struct stftemp_softc *sc) +{ + int32_t value; + + value = HREAD4(sc, TEMP); + value = (value & TEMP_DOUT_MASK) >> TEMP_DOUT_SHIFT; + + return (value * 237500) / 4094 - 81100; +} + +void +stftemp_refresh_sensors(void *arg) +{ + struct stftemp_softc *sc = arg; + + sc->sc_sensor.value = 273150000 + 1000 * stftemp_get_temp(sc); + sc->sc_sensor.flags &= ~SENSOR_FINVALID; +} + +int32_t +stftemp_get_temperature(void *cookie, uint32_t *cells) +{ + return stftemp_get_temp(cookie); +}