From: jsg <jsg@openbsd.org>
Date: Thu, 15 Jun 2023 02:38:03 +0000 (+0000)
Subject: drm/i915/guc: Don't capture Gen8 regs on Xe devices
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=879897e760e76efa61928209b1cf0e88e0473399;p=openbsd

drm/i915/guc: Don't capture Gen8 regs on Xe devices

From John Harrison
1b485f39acf31e71bf30f32a0642310c1661743c in linux-6.1.y/6.1.30
275dac1f7f5e9c2a2e806b34d3b10804eec0ac3c in mainline linux
---

diff --git a/sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c b/sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c
index 1e1fa20fb41..18a8466f859 100644
--- a/sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c
+++ b/sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c
@@ -30,12 +30,14 @@
 	{ FORCEWAKE_MT,             0,      0, "FORCEWAKE" }
 
 #define COMMON_GEN9BASE_GLOBAL \
-	{ GEN8_FAULT_TLB_DATA0,     0,      0, "GEN8_FAULT_TLB_DATA0" }, \
-	{ GEN8_FAULT_TLB_DATA1,     0,      0, "GEN8_FAULT_TLB_DATA1" }, \
 	{ ERROR_GEN6,               0,      0, "ERROR_GEN6" }, \
 	{ DONE_REG,                 0,      0, "DONE_REG" }, \
 	{ HSW_GTT_CACHE_EN,         0,      0, "HSW_GTT_CACHE_EN" }
 
+#define GEN9_GLOBAL \
+	{ GEN8_FAULT_TLB_DATA0,     0,      0, "GEN8_FAULT_TLB_DATA0" }, \
+	{ GEN8_FAULT_TLB_DATA1,     0,      0, "GEN8_FAULT_TLB_DATA1" }
+
 #define COMMON_GEN12BASE_GLOBAL \
 	{ GEN12_FAULT_TLB_DATA0,    0,      0, "GEN12_FAULT_TLB_DATA0" }, \
 	{ GEN12_FAULT_TLB_DATA1,    0,      0, "GEN12_FAULT_TLB_DATA1" }, \
@@ -136,6 +138,7 @@ static const struct __guc_mmio_reg_descr xe_lpd_blt_inst_regs[] = {
 static const struct __guc_mmio_reg_descr default_global_regs[] = {
 	COMMON_BASE_GLOBAL,
 	COMMON_GEN9BASE_GLOBAL,
+	GEN9_GLOBAL,
 };
 
 static const struct __guc_mmio_reg_descr default_rc_class_regs[] = {