From: jsg Date: Thu, 12 Sep 2024 23:50:02 +0000 (+0000) Subject: drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizes X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=7ac8356a5c0ba79cb1e701161b8f249dafa340e2;p=openbsd drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizes From Marek Olsak 302ba299c31e0de54cea431ac1d281dbab7fd0b5 in linux-6.6.y/6.6.51 8dd1426e2c80e32ac1995007330c8f95ffa28ebb in mainline linux --- diff --git a/sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c b/sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c index 82ad2b01f2e..5fbb9caa741 100644 --- a/sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c +++ b/sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c @@ -1033,6 +1033,30 @@ static int amdgpu_display_verify_sizes(struct amdgpu_framebuffer *rfb) block_width = 256 / format_info->cpp[i]; block_height = 1; block_size_log2 = 8; + } else if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) >= AMD_FMT_MOD_TILE_VER_GFX12) { + int swizzle = AMD_FMT_MOD_GET(TILE, modifier); + + switch (swizzle) { + case AMD_FMT_MOD_TILE_GFX12_256B_2D: + block_size_log2 = 8; + break; + case AMD_FMT_MOD_TILE_GFX12_4K_2D: + block_size_log2 = 12; + break; + case AMD_FMT_MOD_TILE_GFX12_64K_2D: + block_size_log2 = 16; + break; + case AMD_FMT_MOD_TILE_GFX12_256K_2D: + block_size_log2 = 18; + break; + default: + drm_dbg_kms(rfb->base.dev, + "Gfx12 swizzle mode with unknown block size: %d\n", swizzle); + return -EINVAL; + } + + get_block_dimensions(block_size_log2, format_info->cpp[i], + &block_width, &block_height); } else { int swizzle = AMD_FMT_MOD_GET(TILE, modifier); @@ -1068,7 +1092,8 @@ static int amdgpu_display_verify_sizes(struct amdgpu_framebuffer *rfb) return ret; } - if (AMD_FMT_MOD_GET(DCC, modifier)) { + if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) <= AMD_FMT_MOD_TILE_VER_GFX11 && + AMD_FMT_MOD_GET(DCC, modifier)) { if (AMD_FMT_MOD_GET(DCC_RETILE, modifier)) { block_size_log2 = get_dcc_block_size(modifier, false, false); get_block_dimensions(block_size_log2 + 8, format_info->cpp[0], diff --git a/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h b/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h index fb304067781..5eed091d4c2 100644 --- a/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h +++ b/sys/dev/pci/drm/include/uapi/drm/drm_fourcc.h @@ -1504,6 +1504,8 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) * 6 - 64KB_3D * 7 - 256KB_3D */ +#define AMD_FMT_MOD_TILE_GFX12_256B_2D 1 +#define AMD_FMT_MOD_TILE_GFX12_4K_2D 2 #define AMD_FMT_MOD_TILE_GFX12_64K_2D 3 #define AMD_FMT_MOD_TILE_GFX12_256K_2D 4