From: visa <visa@openbsd.org>
Date: Sat, 6 Aug 2016 09:32:04 +0000 (+0000)
Subject: Add PageGrain bits.
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=76c00820d87f06eda57b8ae59a71c58a9cdb173a;p=openbsd

Add PageGrain bits.
---

diff --git a/sys/arch/mips64/include/mips_cpu.h b/sys/arch/mips64/include/mips_cpu.h
index 33622dfe0eb..9decc90133f 100644
--- a/sys/arch/mips64/include/mips_cpu.h
+++ b/sys/arch/mips64/include/mips_cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mips_cpu.h,v 1.2 2015/09/24 18:38:58 miod Exp $	*/
+/*	$OpenBSD: mips_cpu.h,v 1.3 2016/08/06 09:32:04 visa Exp $	*/
 
 /*-
  * Copyright (c) 1992, 1993
@@ -217,6 +217,10 @@
 #define	COP_0_PRID		$15
 #define	COP_0_CONFIG		$16
 
+/* MIPS64 release 2 */
+#define	COP_0_TLB_PG_GRAIN	$5, 1
+#define	COP_0_EBASE		$15, 1
+
 /* R4000/5000/10000 */
 #define	COP_0_TLB_INDEX		$0
 #define	COP_0_TLB_RANDOM	$1
@@ -269,10 +273,8 @@
 #define	COP_0_DIAG		$22
 
 /* Octeon specific */
-#define COP_0_TLB_PG_GRAIN	$5, 1
 #define COP_0_CVMCTL		$9, 7
 #define COP_0_CVMMEMCTL		$11, 7
-#define COP_0_EBASE		$15, 1
 
 /*
  * COP_0_COUNT speed divider.
@@ -289,6 +291,15 @@
 #define	FPC_ID			$0
 #define	FPC_CSR			$31
 
+/*
+ * PageGrain register
+ */
+#define	PGRAIN_RIE		0x80000000
+#define	PGRAIN_XIE		0x40000000
+#define	PGRAIN_ELPA		0x20000000
+#define	PGRAIN_ESP		0x10000000
+#define	PGRAIN_IEC		0x08000000
+
 #endif	/* _KERNEL || _STANDALONE */
 
 #endif /* !_MIPS64_CPUREGS_H_ */
diff --git a/sys/arch/octeon/octeon/locore.S b/sys/arch/octeon/octeon/locore.S
index 2e6841fddbb..7f77b75131e 100644
--- a/sys/arch/octeon/octeon/locore.S
+++ b/sys/arch/octeon/octeon/locore.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.S,v 1.8 2016/04/14 15:48:09 visa Exp $ */
+/*	$OpenBSD: locore.S,v 1.9 2016/08/06 09:32:05 visa Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -62,7 +62,7 @@ start:
 	dmtc0	t0, COP_0_CVMMEMCTL
 
 /* initialize pagegrain */
-	dli	t0, 0x20000000
+	dli	t0, PGRAIN_ELPA
 	dmtc0	t0, COP_0_TLB_PG_GRAIN
 
 	mfc0    v0, COP_0_STATUS_REG