From: dv Date: Wed, 7 Sep 2022 18:44:09 +0000 (+0000) Subject: vmm(4): allow reading MSR_TSC on Intel hosts. X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=73fb78b9c841b10161de16a561d7714609733e3a;p=openbsd vmm(4): allow reading MSR_TSC on Intel hosts. Add's MSR_TSC to the read bitmap for msr access. This was added to AMD/SVM in Feb 2020, but never added to Intel VMX. Some guests use rdmsr instead of rdtsc, so this prevents a #GP exception. ok mlarkin@ --- diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c index c3d957cfb90..51378f4a798 100644 --- a/sys/arch/amd64/amd64/vmm.c +++ b/sys/arch/amd64/amd64/vmm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vmm.c,v 1.322 2022/09/02 17:46:37 dv Exp $ */ +/* $OpenBSD: vmm.c,v 1.323 2022/09/07 18:44:09 dv Exp $ */ /* * Copyright (c) 2014 Mike Larkin * @@ -3522,7 +3522,9 @@ vcpu_reset_regs_vmx(struct vcpu *vcpu, struct vcpu_reg_state *vrs) vmx_setmsrbrw(vcpu, MSR_FSBASE); vmx_setmsrbrw(vcpu, MSR_GSBASE); vmx_setmsrbrw(vcpu, MSR_KERNELGSBASE); + vmx_setmsrbr(vcpu, MSR_MISC_ENABLE); + vmx_setmsrbr(vcpu, MSR_TSC); /* XXX CR0 shadow */ /* XXX CR4 shadow */