From: jsg Date: Thu, 24 Aug 2023 06:05:23 +0000 (+0000) Subject: drm/amd/display: Apply 60us prefetch for DCFCLK <= 300Mhz X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=700a6554fd19b6dbf2af08d97fc4c3f873bafa01;p=openbsd drm/amd/display: Apply 60us prefetch for DCFCLK <= 300Mhz From Alvin Lee fbd9332d32ec2e4963620dbfa23d802dd98973be in linux-6.1.y/6.1.47 7e60ab4eb3e4ba2adac46d737fdbbc5732bebd58 in mainline linux --- diff --git a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index 2bb768413c9..19f55657272 100644 --- a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -808,7 +808,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman v->SwathHeightC[k], TWait, (v->DRAMSpeedPerState[mode_lib->vba.VoltageLevel] <= MEM_STROBE_FREQ_MHZ || - v->DCFCLKPerState[mode_lib->vba.VoltageLevel] <= MIN_DCFCLK_FREQ_MHZ) ? + v->DCFCLKPerState[mode_lib->vba.VoltageLevel] <= DCFCLK_FREQ_EXTRA_PREFETCH_REQ_MHZ) ? mode_lib->vba.ip.min_prefetch_in_strobe_us : 0, /* Output */ &v->DSTXAfterScaler[k], @@ -3289,7 +3289,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l v->swath_width_chroma_ub_this_state[k], v->SwathHeightYThisState[k], v->SwathHeightCThisState[k], v->TWait, - (v->DRAMSpeedPerState[i] <= MEM_STROBE_FREQ_MHZ || v->DCFCLKState[i][j] <= MIN_DCFCLK_FREQ_MHZ) ? + (v->DRAMSpeedPerState[i] <= MEM_STROBE_FREQ_MHZ || v->DCFCLKState[i][j] <= DCFCLK_FREQ_EXTRA_PREFETCH_REQ_MHZ) ? mode_lib->vba.ip.min_prefetch_in_strobe_us : 0, /* Output */ diff --git a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h index e92eee2c664..a475775bc38 100644 --- a/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h +++ b/sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h @@ -52,7 +52,7 @@ #define BPP_BLENDED_PIPE 0xffffffff #define MEM_STROBE_FREQ_MHZ 1600 -#define MIN_DCFCLK_FREQ_MHZ 200 +#define DCFCLK_FREQ_EXTRA_PREFETCH_REQ_MHZ 300 #define MEM_STROBE_MAX_DELIVERY_TIME_US 60.0 struct display_mode_lib;