From: graichen Date: Sun, 22 Dec 1996 15:17:04 +0000 (+0000) Subject: update the pmax stuff to NetBSD 961107 - this version i got somehow X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=6fb1654303d27b3ed6c3651ffef0d223b8d6855a;p=openbsd update the pmax stuff to NetBSD 961107 - this version i got somehow compiled on my decstation 2100 (PLUTO) - but it will not fully work out of the box - but i want to bring it into the tree because i get my own pmax on 961228 - so that i have a good startpoint then :-) all the OpenBSD changes to the pmax tree will follow in the next commit --- diff --git a/sys/arch/pmax/Makefile b/sys/arch/pmax/Makefile index 5612722d044..e2f79482d35 100644 --- a/sys/arch/pmax/Makefile +++ b/sys/arch/pmax/Makefile @@ -1,29 +1,32 @@ -# $NetBSD: Makefile,v 1.4 1994/10/26 21:08:38 cgd Exp $ +# $NetBSD: Makefile,v 1.5 1996/09/29 23:55:05 jonathan Exp $ +# @(#)Makefile 7.3 (Berkeley) 6/9/91 -# @(#)Makefile 8.1 (Berkeley) 6/16/93 +# Makefile for pmax tags file and boot blocks -# Makefile for pmax links, tags file +NOPROG= noprog +NOMAN= noman -.include "../kern/Make.tags.inc" +SUBDIR= stand -all: - @echo "make links or tags only" +TPMAX= ../pmax/tags +SPMAX= ../pmax/pmax/*.[ch] ../pmax/include/*.h \ + ../pmax/dev/*.[ch] ../pmax/tc/*.[ch] +APMAX= ../pmax/pmax/*.S -DIRS= conf dev dist include pmax ultrix +# Directories in which to place pmax tags links +DPMAX= dev tc include -links:: - -for i in ${DIRS}; do \ - (cd $$i && { rm -f tags; ln -s ${SYSTAGS} tags; }) done +tags: ${COMM} ${SPMAX} ${SMIPS} ${APMAX} ${AMIPS} + -ctags -dtf ${TPMAX} ${COMM} ${SPMAX} ${SMIPS} + egrep "^ENTRY(.*)|^ALTENTRY(.*)" ${APMAX} ${AMIPS} | \ + sed "s;\([^:]*\):\([^(]*\)(\([^, )]*\)\(.*\);\3 \1 /^\2(\3\4$$/;" \ + >> ${TPMAX} + sort -o ${TPMAX} ${TPMAX} -PMAX= /sys/pmax/dev/*.[ch] /sys/pmax/include/*.[ch] \ - /sys/pmax/pmax/*.[ch] /sys/pmax/ultrix/*.[ch] -APMAX= /sys/pmax/pmax/*.s +links: + -for i in ${DPMAX}; do \ + cd $$i && rm -f tags; ln -s ../tags tags; done -tags:: - -ctags -wdt ${COMM} ${PMAX} - egrep "^LEAF(.*)|^[AN]LEAF(.*)|^NON_LEAF(.*)" ${APMAX} | \ - sed "s;\([^:]*\):\([^(]*\)(\([^, )]*\)\(.*\);\3 \1 /^\2(\3\4$$/;" \ - >> tags - sort -o tags tags - chown bin.wsrc tags - chmod 444 tags +obj: _SUBDIRUSE + +.include diff --git a/sys/arch/pmax/conf/GENERIC b/sys/arch/pmax/conf/GENERIC index 134c1a7ca6c..34c46cba4ca 100644 --- a/sys/arch/pmax/conf/GENERIC +++ b/sys/arch/pmax/conf/GENERIC @@ -1,58 +1,64 @@ +# this one isn't working at the moment - i'll make a real OpenBSD GENERIC then +# i find some time and get OpenBSD/pmax to somekind of snap - t + # -# DECstation (3100 or 5000/xxx) +# Distribition miniroot kernel (any model) kernel config file + # -# Generic config.new configuration for NetBSD/pmax -# $NetBSD: GENERIC,v 1.1.4.1 1996/09/09 20:29:33 thorpej Exp $ +# $NetBSD: GENERIC,v 1.7 1996/10/16 08:29:34 jonathan Exp $ # -include "std.pmax" +include "arch/pmax/conf/std.pmax" + +maxusers 64 -maxusers 8 +options MIPS1 # R2000/R3000 support (new) +#options MIPS3 # R4000/R4400 support (not finished) -# enables fudging of swap blocks to swap after a miniroot -# in the b partition, and make the kernel call setconf() to ask -# what the root device is. -options GENERIC -options CPU_R3000 # R2000/R3000 support +# Support for specific models of DECstation +options DS3100 # PMAX (kn01) DECstation 2100, 3100 +options DS5000_25 # MAXINE (kn02ca/xine) support +options DS5000_100 # 3MIN (kn02ba/kmin) support +options DS5000_200 # 3MAX (kn02) support +options DS5000_240 # 3MAXPLUS (kn03) support -# replaces "cpu ds5k/240" -options DS5000_240 # 3MAXPLUS (kn03) support -options DS5000_100 # 3MIN (kn02ba/kmin) support -options DS5000_25 # MAXINE (kn02ca/xine) support -options DS5000_200 # 3MAX (kn02) support, one day -options DS3100 # PMAX (kn01) DECstation 2100, 3100 # You need to set this locally, but it doesn't do much outside the kernel. # Set up /etc/localtime instead. -options TIMEZONE="0" # minutes west of GMT (for) +options TIMEZONE=0 options DST=0 # use daylight savings rules # Standard system options options SWAPPAGER # swap pager (anonymous and swap space) +options VNODEPAGER # vnode pager (mapped files) options DEVPAGER # device pager (mapped devices) #options DIAGNOSTIC # extra kernel debugging checks -options DEBUG # extra kernel debugging support +#options DEBUG # extra kernel debugging support options "COMPAT_43" # compatibility with 4.3BSD binaries options KTRACE # system call tracing support options "NKMEMCLUSTERS=1024" # 4K pages in kernel malloc pool - #options KGDB # support for kernel gdb #options "KGDBRATE=19200" # kernel gdb port rate (default 9600) #options "KGDBDEV=15*256+0" # device for kernel gdb +options NTP # network time protocol +#options UCONSOLE # users can redirect console (unsafe) + + # Filesystem options options FIFO # POSIX fifo support (in all filesystems) -options FFS,QUOTA # fast filesystem with user and group quotas +options FFS # fast filesystem with user and group quotas options MFS # memory-based filesystem options NFSCLIENT # Sun NFS-compatible filesystem (client) options NFSSERVER # Sun NFS-compatible filesystem (server) -options KERNFS # kernel data-structure filesystem +#options KERNFS # kernel data-structure filesystem #options FDESC # user file descriptor filesystem #options UMAPFS # uid/gid remapping filesystem options NULLFS # null layer filesystem +options UNION #options LFS # Log-based filesystem (still experimental) #options PORTAL # portal filesystem (still experimental) @@ -66,121 +72,68 @@ options GATEWAY # IP packet forwarding #options TPIP #options EON -options COMPAT_10 # Pre-NetBSD 1.1 compatibility -options COMPAT_11 +# NetBSD backwards compatibility +#options COMPAT_10 # NetBSD 1.0, (needed for X on 386?) +#options COMPAT_11 # NetBSD 1.1, +options COMPAT_12 # Netbsd 1.2 reboot() + # pmax specific options COMPAT_ULTRIX # ultrix compatibility +options EXEC_ECOFF # Ultrix RISC binaries are ECOFF format options "HZ=256" # RTC rate required # Note that this configuration is unlikely to work, yet... +#config netbsd root on rz0a swap on rz0b and rz1b dumps on rz0b config gennetbsd swap generic ######################################################################## -# # -# DECstation Turbochannel configuration and options # -# # -######################################################################## - -tc* at mainbus0 # All but PMAXes have a turbochannel - - -######################################################################## -# Common configuration for machines with IO ASIC chips # -# (3MIN, MAXINE, 3MAXPLUS) # +### I/O bus and device options ### ######################################################################## -ioasic0 at tc? -clock0 at ioasic? # RTC -asc0 at ioasic? # system SCSI subslot -scc0 at ioasic? -le0 at ioasic? # tc onboard lance -scc1 at ioasic? # Not present on Maxine -######################################################################## -# MAXINE-only baseboard devices and on-baseboard "options" # -######################################################################## -xcfb0 at tc? # TC framebuffer "option" -dtop0 at ioasic0 -#isdn at ioasic0 -#fdc at ioasic0 # floppy disk +# TC bus and supported options. (All but PMAXes have a turbochannel.) +include "arch/pmax/conf/tc.std" +# ioasic standard baseboard options (5000/2x, 5000/1xx, 5000/2[46]0) +include "arch/pmax/conf/builtin.ioasic" -######################################################################## -# Configuration for 3MAX (5000/200) which has turbochannel but no ASIC.# -# 3MAX (5000/200) baseboard devices and on-baseboard "options" # -######################################################################## -clock0 at mainbus0 # RTC -dc0 at mainbus0 -le0 at tc? #slot ? offset ? # TC ether "option" on baseboard -asc0 at tc? # TC scsi "option" on baseboard -# For now, pretend this machine has an IOASIC. -dc0 at ioasic? # dc7083 four-port DZ device +# MAXINE-only ioasic baseboard devices and on-baseboard "options" +include "arch/pmax/conf/builtin.maxine" -######################################################################## -# Supported turbochannel option cards # -######################################################################## -cfb0 at tc? -mfb0 at tc? -sfb0 at tc? -#sfb1 at tc? -le* at tc? #slot ? offset ? # TC ether option -#tt0 at tc? #slot? offset ? - - -######################################################################## -# Decstation 2100/3100 (aka PMAX aka KN01) configuration. # -# (these don't really have any options except a framebuffer.) # -######################################################################## -clock0 at mainbus0 # RTC -pm0 at mainbus0 # 3100 onboard fb -dc0 at mainbus0 # dc7083 four-port DZ device -le0 at mainbus0 # 3100 onboard lance -sii0 at mainbus0 # onboard scsi +# 5000/200-only (aka 3MAX aka KN02) baseboard devices. +# (KN02 has turbochannel but no IOASIC). +include "arch/pmax/conf/builtin.3max" +# 2100/3100-only (aka PMAX aka KN01) baseboard devices. +# (may also be present on a 5100). +include "arch/pmax/conf/builtin.3100" ######################################################################## # SCSI configuration # ######################################################################## -# -# SCSI configuration for new-config machine-independent SCSI driver -# -scsibus* at sii? -scsibus* at asc? - -sd* at scsibus? target ? lun ? -st* at scsibus? target ? lun ? -cd* at scsibus? target ? lun ? -ss* at scsibus? target ? lun ? -uk* at scsibus? target ? lun ? - -# -# SCSI configuration for old DECstation SCSI driver -# oldscsibus* at sii? oldscsibus* at asc? - -rz0 at oldscsibus? target ? drive ? -rz1 at oldscsibus? target ? drive ? -rz2 at oldscsibus? target ? drive ? -rz3 at oldscsibus? target ? drive ? -rz4 at oldscsibus? target ? drive ? -rz5 at oldscsibus? target ? drive ? -tz0 at oldscsibus? target? drive ? -tz1 at oldscsibus? target? drive ? - - # -# pseudo-devices +# SCSI configuration for old 4.4bsd/pmax DECstation SCSI driver # +include "arch/pmax/conf/scsi.pmax" +#include "arch/pmax/conf/mi.scsi" # not yet supported + + +######################################################################## +### Pseudo-devices ### +######################################################################## pseudo-device sl 4 # serial-line IP ports +pseudo-device ppp 2 # serial-line IP ports pseudo-device pty 64 # pseudo ptys pseudo-device bpfilter 16 # packet filter ports pseudo-device loop pseudo-device vnd 4 # virtual disk ick +pseudo-device ccd 4 # concatenated disks #pseudo-device ether # From old config. what does it mean? pseudo-device rasterconsole 1 # NB: raster console requires "fb" -pseudo-device fb 3 # up to 3 framebuffers +pseudo-device fb 1 # up to 3 framebuffers diff --git a/sys/arch/pmax/conf/Makefile.pmax b/sys/arch/pmax/conf/Makefile.pmax index de4b7e34f78..f752b75c9ea 100644 --- a/sys/arch/pmax/conf/Makefile.pmax +++ b/sys/arch/pmax/conf/Makefile.pmax @@ -1,4 +1,4 @@ -# $NetBSD: Makefile.pmax,v 1.29 1996/05/19 22:44:12 mhitch Exp $ +# $NetBSD: Makefile.pmax,v 1.37 1996/09/30 02:35:34 jonathan Exp $ # Makefile for NetBSD # @@ -21,22 +21,28 @@ # DEBUG is set to -g if debugging. # PROF is set to -pg if profiling. -AS?= as CC?= cc -CPP?= cpp LD= /usr/local/bin/ld -STRIP?= strip -d -TOUCH?= touch -f -c +MKDEP?= mkdep +STRIP?= strip # source tree is located via $S relative to the compilation directory +.ifndef S +#S!= cd ../../../..; pwd S= ../../../.. -PMAX= ../.. +.endif +PMAX= $S/arch/pmax -INCLUDES= -I. -I$S/arch -I$S -CPPFLAGS= ${INCLUDES} ${IDENT} -D_KERNEL -Dpmax +INCLUDES= -I. -I$S/arch -I$S -nostdinc +CPPFLAGS= ${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -Dpmax CFLAGS= ${DEBUG} -O2 -Werror -mno-abicalls -mcpu=r3000 AFLAGS= -x assembler-with-cpp -traditional-cpp -D_LOCORE LINKFLAGS= -N -Ttext 80030000 -e start +STRIPFLAGS= -d + +HOSTED_CC= ${CC} +HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//} +HOSTED_CFLAGS= ${CFLAGS} ### find out what to use for libkern .include "$S/lib/libkern/Makefile.inc" @@ -54,19 +60,13 @@ LIBCOMPAT= ${COMPATLIB} LIBCOMPAT= ${COMPATLIB_PROF} .endif -# compile rules: rules are named ${TYPE}_${SUFFIX}${CONFIG_DEP} -# where TYPE is NORMAL, DRIVER, or PROFILE}; SUFFIX is the file suffix, -# capitalized (e.g. C for a .c file), and CONFIG_DEP is _C if the file -# is marked as config-dependent. +# compile rules: rules are named ${TYPE}_${SUFFIX} where TYPE is NORMAL or +# HOSTED}, and SUFFIX is the file suffix, capitalized (e.g. C for a .c file). NORMAL_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $< -NORMAL_C_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $< - -DRIVER_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $< -DRIVER_C_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $< - NORMAL_S= ${CC} ${AFLAGS} ${CPPFLAGS} -c $< -NORMAL_S_C= ${CC} ${AFLAGS} ${CPPFLAGS} ${PARAM} -c $< + +HOSTED_C= ${HOSTED_CC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $< %OBJS @@ -79,7 +79,7 @@ NORMAL_S_C= ${CC} ${AFLAGS} ${CPPFLAGS} ${PARAM} -c $< # ${SYSTEM_LD_HEAD} # ${SYSTEM_LD} swapxxx.o # ${SYSTEM_LD_TAIL} -SYSTEM_OBJ= locore.o fp.o \ +SYSTEM_OBJ= locore.o fp.o locore_machdep.o \ param.o ioconf.o ${OBJS} ${LIBKERN} ${LIBCOMPAT} SYSTEM_DEP= Makefile ${SYSTEM_OBJ} SYSTEM_LD_HEAD= @rm -f $@ @@ -92,14 +92,14 @@ DEBUG?= LINKFLAGS+= -X SYSTEM_LD_TAIL+=; \ echo cp $@ $@.gdb; rm -f $@.gdb; cp $@ $@.gdb; \ - echo ${STRIP} $@; ${STRIP} $@ + echo ${STRIP} ${STRIPFLAGS} $@; ${STRIP} ${STRIPFLAGS} $@ .else LINKFLAGS+= -x .endif SYSTEM_LD_TAIL+=;\ mv $@ $@.elf; \ - /usr/local/bin/elf2aout $@.elf $@; \ + elf2aout $@.elf $@; \ chmod 755 $@ %LOAD @@ -110,7 +110,7 @@ assym.h: genassym genassym: genassym.o ${CC} -o $@ genassym.o -genassym.o: ${S}/arch/pmax/pmax/genassym.c +genassym.o: $S/arch/pmax/pmax/genassym.c ${CC} ${INCLUDES} ${IDENT} -D_KERNEL -Dpmax -c $< param.c: $S/conf/param.c @@ -118,7 +118,7 @@ param.c: $S/conf/param.c cp $S/conf/param.c . param.o: param.c Makefile - ${NORMAL_C_C} + ${NORMAL_C} ioconf.o: ioconf.c ${NORMAL_C} @@ -133,8 +133,8 @@ clean:: [Ee]rrs linterrs makelinks genassym genassym.o assym.h lint: - @lint -hbxncez -DGENERIC -Dvolatile= ${CPPFLAGS} ${PARAM} -UKGDB \ - ${PMAX}/pmax/Locore.c ${CFILES} ${PMAX}/pmax/swapgeneric.c \ + @lint -hbxncez -DGENERIC -Dvolatile= ${CPPFLAGS} -UKGDB \ + ${CFILES} ${PMAX}/pmax/swapgeneric.c \ ioconf.c param.c | \ grep -v 'static function .* unused' @@ -150,13 +150,16 @@ links: sh makelinks && rm -f dontlink SRCS= ${PMAX}/pmax/locore.S ${PMAX}/pmax/fp.S \ + ${PMAX}/pmax/locore_machdep.S \ param.c ioconf.c ${CFILES} ${SFILES} depend:: .depend .depend: ${SRCS} assym.h param.c - mkdep ${AFLAGS} ${CPPFLAGS} ${PMAX}/pmax/locore.S ${PMAX}/pmax/fp.S - mkdep -a ${CFLAGS} ${CPPFLAGS} param.c ioconf.c ${CFILES} - mkdep -a ${AFLAGS} ${CPPFLAGS} ${SFILES} - mkdep -a ${CFLAGS} ${CPPFLAGS} ${PARAM} ${S}/arch/pmax/pmax/genassym.c + ${MKDEP} ${AFLAGS} ${CPPFLAGS} ${PMAX}/pmax/locore.S ${PMAX}/pmax/fp.S + ${MKDEP} ${AFLAGS} ${CPPFLAGS} ${PMAX}/pmax/locore_machdep.S + ${MKDEP} -a ${CFLAGS} ${CPPFLAGS} param.c ioconf.c ${CFILES} + ${MKDEP} -a ${AFLAGS} ${CPPFLAGS} ${SFILES} + ${MKDEP} -a ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} \ + $S/arch/pmax/pmax/genassym.c # depend on root or device configuration @@ -175,7 +178,11 @@ machdep.o mainbus.o trap.o: Makefile locore.o: ${PMAX}/pmax/locore.S assym.h ${NORMAL_S} + fp.o: ${PMAX}/pmax/fp.S assym.h ${NORMAL_S} +locore_machdep.o: ${PMAX}/pmax/locore_machdep.S assym.h + ${NORMAL_S} + %RULES diff --git a/sys/arch/pmax/conf/PLUTO b/sys/arch/pmax/conf/PLUTO index 1931c01156d..c236112fb0f 100644 --- a/sys/arch/pmax/conf/PLUTO +++ b/sys/arch/pmax/conf/PLUTO @@ -5,13 +5,14 @@ machine pmax option CPU_R3000 +option MIPS1 option DS3100 option HZ=256 option NKMEMCLUSTERS=1024 option TIMEZONE=0 option DST=0 -maxusers 8 +maxusers 32 option SWAPPAGER option VNODEPAGER @@ -26,7 +27,7 @@ option NFSCLIENT option NFSSERVER option KTRACE -config bsd root on rz3a swap on rz3b dumps on rz3b +config bsd root on rz0a swap on rz0b dumps on rz0b mainbus0 at root @@ -42,7 +43,6 @@ rz1 at oldscsibus? target ? drive ? rz2 at oldscsibus? target ? drive ? rz3 at oldscsibus? target ? drive ? rz4 at oldscsibus? target ? drive ? -rz5 at oldscsibus? target ? drive ? tz0 at oldscsibus? target ? drive ? tz1 at oldscsibus? target ? drive ? diff --git a/sys/arch/pmax/conf/files.pmax b/sys/arch/pmax/conf/files.pmax index df0a35a0fcf..057f1f962e8 100644 --- a/sys/arch/pmax/conf/files.pmax +++ b/sys/arch/pmax/conf/files.pmax @@ -1,4 +1,4 @@ -# $NetBSD: files.pmax,v 1.31.4.1 1996/05/30 03:54:56 mhitch Exp $ +# $NetBSD: files.pmax,v 1.36 1996/10/13 05:28:48 jonathan Exp $ # DECstation-specific configuration info # maxpartitions must be first item in files.${ARCH}. @@ -72,14 +72,21 @@ device oldscsibus {target = -1, drive = -1} attach oldscsibus at oldscsi # asc: system-slot or turbochannel-option SCSI interface -device asc: oldscsi,scsi -attach asc at ioasic, tc +#device asc: oldscsi,scsi +device asc: oldscsi +attach asc at ioasic with asc_ioasic +file dev/tc/asc_ioasic.c asc_ioasic +attach asc at tc with asc_tc +file dev/tc/asc_tc.c asc_tc + file dev/tc/asc.c asc needs-flag # sii: kn01 SCSI interface -device sii: oldscsi,scsi -attach sii at mainbus +#device sii: scsi,oldscsi +device sii: oldscsi file arch/pmax/dev/sii.c sii needs-flag +attach sii at mainbus with sii_ds +file arch/pmax/dev/sii_ds.c sii_ds device tz: tape @@ -97,8 +104,12 @@ file arch/pmax/dev/rz.c rz needs-count # DC7085 (DZ-like four-port serial device) on mainbus on non-IOASIC machines. # For the 3MAX (aka kn02 aka 5k/200) pretend that it's on an ASIC. device dc -attach dc at mainbus, ioasic -file arch/pmax/dev/dc.c dc needs-count +file arch/pmax/dev/dc.c dc needs-flag +attach dc at ioasic with dc_ioasic +file arch/pmax/dev/dc_ioasic.c dc_ioasic +attach dc at mainbus with dc_ds +file arch/pmax/dev/dc_ds.c dc_ds + # The "desktop bus" on the MAXINE (5k/25). What is it, anyway? ADB? device dtop @@ -121,9 +132,10 @@ file dev/tc/if_le_ibus.c le_pmax needs-flag #for kn01_intr # 3100 (pmax) onboard framebuffer device pm -attach pm at mainbus file arch/pmax/dev/pm.c pm needs-flag file arch/pmax/dev/bt478.c pm +attach pm at mainbus with pm_ds +file arch/pmax/dev/pm_ds.c dc_ds ######################################################################## # Turbochannel options. @@ -167,7 +179,6 @@ file arch/pmax/pmax/conf.c file arch/pmax/pmax/machdep.c file arch/pmax/pmax/pmap.c file arch/pmax/pmax/sys_machdep.c -file arch/pmax/pmax/trap.c file arch/pmax/pmax/pmax_trap.c file arch/pmax/pmax/vm_machdep.c file arch/pmax/pmax/disksubr.c @@ -214,7 +225,11 @@ file arch/pmax/pmax/conf-glue.c # Ultrix Binary Compatibility (COMPAT_ULTRIX) include "../../../compat/ultrix/files.ultrix" -# Configs +# Files from NetBSD's mips directory TTTTT file arch/pmax/pmax/cpu_exec.c file arch/pmax/pmax/mem.c +file arch/pmax/pmax/trap.c +file arch/pmax/pmax/mips_machdep.c file arch/pmax/pmax/process_machdep.c + +# Configs diff --git a/sys/arch/pmax/dev/bt459.c b/sys/arch/pmax/dev/bt459.c index 45667ff2c1c..430a7135d24 100644 --- a/sys/arch/pmax/dev/bt459.c +++ b/sys/arch/pmax/dev/bt459.c @@ -1,4 +1,4 @@ -/* $NetBSD: bt459.c,v 1.4 1996/04/08 00:57:41 jonathan Exp $ */ +/* $NetBSD: bt459.c,v 1.5 1996/10/13 13:13:50 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -86,7 +86,6 @@ #include #include -#include #include #include diff --git a/sys/arch/pmax/dev/bt478.c b/sys/arch/pmax/dev/bt478.c index aa8a8485a3b..8133423eea3 100644 --- a/sys/arch/pmax/dev/bt478.c +++ b/sys/arch/pmax/dev/bt478.c @@ -1,4 +1,4 @@ -/* $NetBSD: bt478.c,v 1.4 1996/04/08 00:57:43 jonathan Exp $ */ +/* $NetBSD: bt478.c,v 1.6 1996/10/13 13:13:51 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -62,13 +62,14 @@ #include #include -#include +#include #include #include #include #include +#include #include /* @@ -76,23 +77,10 @@ */ -int bt478init __P((struct fbinfo *fi)); -void bt478RestoreCursorColor __P((struct fbinfo *fi)); -/* qvss ioctl interface uses this */ +/* XXX qvss ioctl interface uses this */ void bt478CursorColor __P((struct fbinfo *fi, unsigned int color[])); -void bt478BlankCursor __P((struct fbinfo *fi)); -/*static*/ void bt478InitColorMap __P((struct fbinfo *fi)); -int bt478GetColorMap __P((struct fbinfo *fi, caddr_t bits, - int index, int count)); -int bt478LoadColorMap __P((struct fbinfo *fi, caddr_t bits, - int index, int count)); - - - -extern int pmax_boardtype; -extern u_short defCursor[32]; static u_char bg_RGB[3]; /* background color for the cursor */ static u_char fg_RGB[3]; /* foreground color for the cursor */ diff --git a/sys/arch/pmax/dev/bt478var.h b/sys/arch/pmax/dev/bt478var.h new file mode 100644 index 00000000000..77288e4aff3 --- /dev/null +++ b/sys/arch/pmax/dev/bt478var.h @@ -0,0 +1,28 @@ +/* $NetBSD: bt478var.h,v 1.2 1996/09/21 03:22:24 jonathan Exp $ */ + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + */ + +/* + * External declarations exported from the bt478 low-level + * chipset driver. + */ + +int bt478init __P((struct fbinfo *fi)); +void bt478BlankCursor __P((struct fbinfo *fi)); +void bt478RestoreCursorColor __P((struct fbinfo *fi)); +void bt478InitColorMap __P((struct fbinfo *fi)); +int bt478LoadColorMap __P ((struct fbinfo *fi, caddr_t bits, + int index, int count)); +int bt478GetColorMap __P ((struct fbinfo *fi, caddr_t bits, + int index, int count)); diff --git a/sys/arch/pmax/dev/cfb.c b/sys/arch/pmax/dev/cfb.c index 3fb3b7db294..d27602a3aa9 100644 --- a/sys/arch/pmax/dev/cfb.c +++ b/sys/arch/pmax/dev/cfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: cfb.c,v 1.18.4.2 1996/09/09 20:45:26 thorpej Exp $ */ +/* $NetBSD: cfb.c,v 1.24 1996/10/13 13:13:52 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -93,10 +93,11 @@ #include #include -#include +#include /* mips cached->uncached */ #include #include #include +#include /* XXX dev/tc ? */ #include @@ -105,6 +106,7 @@ #include + #define PMAX /* enable /dev/pm compatibility */ /* @@ -142,8 +144,6 @@ struct fbdriver cfb_driver = { int cfbinit __P((struct fbinfo *fi, caddr_t cfbaddr, int unit, int silent)); extern void fbScreenInit __P((struct fbinfo *fi)); -void genConfigMouse(), genDeconfigMouse(); -void genKbdEvent(), genMouseEvent(), genMouseButtons(); extern int pmax_boardtype; diff --git a/sys/arch/pmax/dev/cfbvar.h b/sys/arch/pmax/dev/cfbvar.h new file mode 100644 index 00000000000..1f245ed1daf --- /dev/null +++ b/sys/arch/pmax/dev/cfbvar.h @@ -0,0 +1,8 @@ +/* $NetBSD: cfbvar.h,v 1.1 1996/09/21 03:06:37 jonathan Exp $ */ + +/* + * Initialize a Turbochannel CFB dumb 2-d framebuffer, + * so it can be used as a bitmapped glass-tty console device. + */ +extern int +cfbinit __P((struct fbinfo *fi, caddr_t base, int unit, int silent)); diff --git a/sys/arch/pmax/dev/dc.c b/sys/arch/pmax/dev/dc.c index 0a180c1cd49..8b5712d7372 100644 --- a/sys/arch/pmax/dev/dc.c +++ b/sys/arch/pmax/dev/dc.c @@ -1,4 +1,4 @@ -/* $NetBSD: dc.c,v 1.16.4.5 1996/06/16 17:15:51 mhitch Exp $ */ +/* $NetBSD: dc.c,v 1.30 1996/10/16 02:10:33 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -35,7 +35,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * @(#)dc.c 8.2 (Berkeley) 11/30/93 + * @(#)dc.c 8.5 (Berkeley) 6/2/95 */ /* @@ -56,11 +56,10 @@ * v 1.4 89/08/29 11:55:30 nelson Exp SPRITE (DECWRL)"; */ -#include "dc.h" -#if NDC > 0 /* * DC7085 (DZ-11 look alike) Driver */ + #include #include #include @@ -77,7 +76,6 @@ #include #include #include -#include #include #include @@ -87,21 +85,25 @@ #include #include -#include #include +/* + * XXX in dcvar.h or not? + * #include + */ #include "dcvar.h" + #include "tc.h" #include /* XXX KbdReset band friends */ -extern int pmax_boardtype; +#include +#include + extern struct cfdriver mainbus_cd; -struct dc_softc { - struct device sc_dv; - struct pdma dc_pdma[4]; -}; +#define DCUNIT(dev) (minor(dev) >> 2) +#define DCLINE(dev) (minor(dev) & 3) /* * Autoconfiguration data for config. @@ -109,47 +111,49 @@ struct dc_softc { * Use the statically-allocated softc until old autoconfig code and * config.old are completely gone. */ -int dcmatch __P((struct device * parent, void *cfdata, void *aux)); -void dcattach __P((struct device *parent, struct device *self, void *aux)); +int old_dcmatch __P((struct device * parent, void *cfdata, void *aux)); +void old_dcattach __P((struct device *parent, struct device *self, void *aux)); -int dc_doprobe __P((void *addr, int unit, int flags, int pri)); -int dcintr __P((void * xxxunit)); extern struct cfdriver dc_cd; - -struct cfattach dc_ca = { - sizeof(struct dc_softc), dcmatch, dcattach -}; - struct cfdriver dc_cd = { NULL, "dc", DV_TTY }; -#define NDCLINE (NDC*4) +/* + * Forward declarations + */ +struct tty *dctty __P((dev_t dev)); void dcstart __P((struct tty *)); +void dcrint __P((struct dc_softc *sc)); void dcxint __P((struct tty *)); -void dcPutc __P((dev_t, int)); +int dcmctl __P((dev_t dev, int bits, int how)); void dcscan __P((void *)); +int dcparam __P((struct tty *tp, struct termios *t)); +static int cold_dcparam __P((struct tty *tp, struct termios *t, + dcregs *dcaddr, int allow_19200)); + extern void ttrstrt __P((void *)); -int dcGetc __P((dev_t)); -int dcparam __P((struct tty *, struct termios *)); - -struct tty *dc_tty[NDCLINE]; -int dc_cnt = NDCLINE; -void (*dcDivertXInput)(); /* X windows keyboard input routine */ -void (*dcMouseEvent)(); /* X windows mouse motion event routine */ -void (*dcMouseButtons)(); /* X windows mouse buttons event routine */ + +void dc_reset __P ((dcregs *dcaddr)); + +/* console I/O */ +int dcGetc __P((dev_t)); +void dcPutc __P((dev_t, int)); +void dcPollc __P((dev_t, int)); +void dc_consinit __P((dev_t dev, dcregs *dcaddr)); + + +/* QVSS-compatible in-kernel X input event parser, pointer tracker */ +void (*dcDivertXInput) __P((int cc)); /* X windows keyboard input routine */ +void (*dcMouseEvent) __P((int)); /* X windows mouse motion event routine */ +void (*dcMouseButtons) __P((int)); /* X windows mouse buttons event routine */ #ifdef DEBUG int debugChar; #endif -/* - * Software copy of brk register since it isn't readable - */ -int dc_brk[NDC]; -char dcsoftCAR[NDC]; /* mask of dc's with carrier on (DSR) */ /* * The DC7085 doesn't interrupt on carrier transitions, so @@ -160,7 +164,6 @@ int dc_timer; /* true if timer started */ /* * Pdma structures for fast output code */ -struct pdma dcpdma[NDCLINE]; struct speedtab dcspeedtab[] = { { 0, 0, }, @@ -177,6 +180,9 @@ struct speedtab dcspeedtab[] = { { 4800, LPR_B4800 }, { 9600, LPR_B9600 }, { 19200,LPR_B19200 }, +#ifdef notyet + { 19200,LPR_B38400 }, /* Overloaded with 19200, per chip. */ +#endif { -1, -1 } }; @@ -189,96 +195,10 @@ struct speedtab dcspeedtab[] = { #endif /* - * Forward declarations + * Console line variables, for use when cold */ -struct tty *dctty __P((dev_t dev)); -void dcrint __P((int)); -int dcmctl __P((dev_t dev, int bits, int how)); - - - -/* - * Match driver based on name - */ -int -dcmatch(parent, match, aux) - struct device *parent; - void *match; - void *aux; -{ - struct confargs *ca = aux; -#if NTC>0 - struct ioasicdev_attach_args *d = aux; -#endif - - static int nunits = 0; - -#if NTC > 0 - if (parent->dv_cfdata->cf_driver == &ioasic_cd) { - if (strcmp(d->iada_modname, "dc") != 0 && - strcmp(d->iada_modname, "dc7085") != 0) - return (0); - } - else -#endif /* NTC */ - - if (parent->dv_cfdata->cf_driver == &mainbus_cd) { - if (strcmp(ca->ca_name, "dc") != 0 && - strcmp(ca->ca_name, "mdc") != 0 && - strcmp(ca->ca_name, "dc7085") != 0) - return (0); - } - else - return (0); - - /* - * Use statically-allocated softc and attach code until - * old config is completely gone. Don't over-run softc. - */ - if (nunits > NDC) { - printf("dc: too many units for old config\n"); - return (0); - } - nunits++; - return (1); -} - -void -dcattach(parent, self, aux) - struct device *parent; - struct device *self; - void *aux; -{ - register struct confargs *ca = aux; -#if NTC > 0 - struct ioasicdev_attach_args *d = aux; -#endif /* NTC */ - caddr_t dcaddr; - - -#if NTC > 0 - if (parent->dv_cfdata->cf_driver == &ioasic_cd) { - dcaddr = (caddr_t)d->iada_addr; - (void) dc_doprobe((void*)MACH_PHYS_TO_UNCACHED(dcaddr), - self->dv_unit, self->dv_cfdata->cf_flags, - (int)d->iada_cookie); - /* tie pseudo-slot to device */ - ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY, - dcintr, self); - } - else -#endif /* NTC */ - if (parent->dv_cfdata->cf_driver == &mainbus_cd) { - dcaddr = (caddr_t)ca->ca_addr; - (void) dc_doprobe((void*)MACH_PHYS_TO_UNCACHED(dcaddr), - self->dv_unit, self->dv_cfdata->cf_flags, - ca->ca_slot); - - /* tie pseudo-slot to device */ - BUS_INTR_ESTABLISH(ca, dcintr, self); - } - printf("\n"); -} +extern int cold; +dcregs *dc_cons_addr = 0; /* * Is there a framebuffer console device using this serial driver? @@ -295,66 +215,113 @@ raster_console() } +/* XXX move back into dc_consinit when debugged */ +static struct consdev dccons = { + NULL, NULL, dcGetc, dcPutc, dcPollc, NODEV, CN_REMOTE +}; + +/* + * Special-case code to attach a console. + * We were using PROM callbacks for console I/O, + * and we just reset the chip under the console. + * wire up this driver as console ASAP. + * + * Must be called at spltty() or higher. + */ +void +dc_consinit(dev, dcaddr) + dev_t dev; + register dcregs *dcaddr; +{ + struct termios cterm; + struct tty ctty; + + /* save address in case we're cold */ + if (cold && dc_cons_addr == 0) + dc_cons_addr = dcaddr; + + /* reset chip */ + dc_reset(dcaddr); + + dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | + LPR_B9600 | DCLINE(dev); + wbflush(); + DELAY(10); + + bzero(&cterm, sizeof(cterm)); + bzero(&ctty, sizeof(ctty)); + ctty.t_dev = dev; + dccons.cn_dev = dev; + cterm.c_cflag |= CLOCAL; + cterm.c_cflag = CS8; + cterm.c_ospeed = 9600; + *cn_tab = dccons; + cold_dcparam(&ctty, &cterm, dcaddr, 0); /* XXX untested */ +} + + /* - * DC7085 (dz-11) probe routine from old-style config. - * This is only here out of intertia. + * Attach DC7085 (dz-11) device. */ int -dc_doprobe(addr, unit, flags, priority) +dcattach(sc, addr, dtr_mask, rtscts_mask, speed, + console_line) + register struct dc_softc *sc; void *addr; - int unit, flags, priority; + int dtr_mask, rtscts_mask, speed, console_line; { register dcregs *dcaddr; register struct pdma *pdp; register struct tty *tp; - register int cntr; + register int line; int s; - - if (unit >= NDC) - return (0); - if (badaddr(addr, 2)) - return (0); + + dcaddr = (dcregs *)addr; /* * For a remote console, wait a while for previous output to * complete. + * XXX both cn_dev == 0 and cn_pri == CN_DEAD are bug workarounds. + * The interface between ttys and cpu_cons.c should be reworked. */ - if (major(cn_tab->cn_dev) == DCDEV && unit == 0 && - cn_tab->cn_pri == CN_REMOTE) + if (sc->sc_dv.dv_unit == 0 && /* XXX why only unit 0? */ + (major(cn_tab->cn_dev) == DCDEV || major(cn_tab->cn_dev) == 0) && + (cn_tab->cn_pri == CN_REMOTE || (cn_tab->cn_pri == CN_DEAD))) { DELAY(10000); - - /* reset chip */ - dcaddr = (dcregs *)addr; - dcaddr->dc_csr = CSR_CLR; - wbflush(); - while (dcaddr->dc_csr & CSR_CLR) - ; - dcaddr->dc_csr = CSR_MSE | CSR_TIE | CSR_RIE; + } + /* reset chip and enable interrupts */ + dc_reset(dcaddr); + dcaddr->dc_csr |= (CSR_MSE | CSR_TIE | CSR_RIE); /* init pseudo DMA structures */ - pdp = &dcpdma[unit * 4]; - for (cntr = 0; cntr < 4; cntr++) { + pdp = &sc->dc_pdma[0]; + for (line = 0; line < 4; line++) { pdp->p_addr = (void *)dcaddr; - tp = dc_tty[unit * 4 + cntr] = ttymalloc(); - if (cntr != DCKBD_PORT && cntr != DCMOUSE_PORT) + tp = sc->dc_tty[line] = ttymalloc(); + if (line != DCKBD_PORT && line != DCMOUSE_PORT) tty_attach(tp); + tp->t_dev = makedev(DCDEV, 4 * sc->sc_dv.dv_unit + line); pdp->p_arg = (int) tp; pdp->p_fcn = dcxint; pdp++; } - dcsoftCAR[unit] = flags | 0xB; + sc->dcsoftCAR = sc->sc_dv.dv_cfdata->cf_flags | 0xB; if (dc_timer == 0) { dc_timer = 1; timeout(dcscan, (void *)0, hz); } + sc->dc_19200 = speed; + sc->dc_modem = dtr_mask; + sc->dc_rtscts = rtscts_mask; + + /* * Special handling for consoles. */ - if (unit == 0) { - if (cn_tab->cn_pri == CN_INTERNAL || - cn_tab->cn_pri == CN_NORMAL) { + if (sc->sc_dv.dv_unit == 0) { + if (raster_console()) { s = spltty(); dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | LPR_B4800 | DCKBD_PORT; @@ -366,20 +333,42 @@ dc_doprobe(addr, unit, flags, priority) KBDReset(makedev(DCDEV, DCKBD_PORT), dcPutc); MouseInit(makedev(DCDEV, DCMOUSE_PORT), dcPutc, dcGetc); splx(s); - } else if (major(cn_tab->cn_dev) == DCDEV) { + } + else if (major(cn_tab->cn_dev) == DCDEV) { s = spltty(); - dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | - LPR_B9600 | minor(cn_tab->cn_dev); - wbflush(); - DELAY(1000); - /*cn_tab.cn_disabled = 0;*/ /* FIXME */ + dc_consinit(cn_tab->cn_dev, dcaddr); + dcaddr->dc_csr |= (CSR_MSE | CSR_TIE | CSR_RIE); splx(s); } } - return (1); } + +/* + * Reset chip. Does not change modem control output bits + * or modem state register. + * Does not enable interrupts; caller must explicitly or + * TIE and RIE on if desired (XXX not true yet) + */ +void +dc_reset(dcaddr) + register dcregs *dcaddr; +{ + /* Reset CSR and wait until cleared. */ + dcaddr->dc_csr = CSR_CLR; + wbflush(); + DELAY(10); + while (dcaddr->dc_csr & CSR_CLR) + ; + + /* Enable scanner. */ + dcaddr->dc_csr = CSR_MSE; + wbflush(); + DELAY(10); +} + + int dcopen(dev, flag, mode, p) dev_t dev; @@ -387,15 +376,22 @@ dcopen(dev, flag, mode, p) struct proc *p; { register struct tty *tp; - register int unit; + register struct dc_softc *sc; + register int unit, line; int s, error = 0; - unit = minor(dev); - if (unit >= dc_cnt || dcpdma[unit].p_addr == (void *)0) + unit = DCUNIT(dev); + line = DCLINE(dev); + if (unit >= dc_cd.cd_ndevs || line > 4) return (ENXIO); - tp = dc_tty[unit]; + + sc = dc_cd.cd_devs[unit]; + if (sc->dc_pdma[line].p_addr == (void *)0) + return (ENXIO); + + tp = sc->dc_tty[line]; if (tp == NULL) { - tp = dc_tty[unit] = ttymalloc(); + tp = sc->dc_tty[line] = ttymalloc(); tty_attach(tp); } tp->t_oproc = dcstart; @@ -421,7 +417,14 @@ dcopen(dev, flag, mode, p) ttsetwater(tp); } else if ((tp->t_state & TS_XCLUDE) && curproc->p_ucred->cr_uid != 0) return (EBUSY); +#ifdef HW_FLOW_CONTROL + (void) dcmctl(dev, DML_DTR | DML_RTS, DMSET); +#else (void) dcmctl(dev, DML_DTR, DMSET); +#endif + if ((sc->dcsoftCAR & (1 << line)) || + (dcmctl(dev, 0, DMGET) & DML_CAR)) + tp->t_state |= TS_CARR_ON; s = spltty(); while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) && !(tp->t_state & TS_CARR_ON)) { @@ -443,16 +446,22 @@ dcclose(dev, flag, mode, p) int flag, mode; struct proc *p; { + register struct dc_softc *sc; register struct tty *tp; - register int unit, bit; + register int line, bit; + int s; - unit = minor(dev); - tp = dc_tty[unit]; - bit = 1 << ((unit & 03) + 8); - if (dc_brk[unit >> 2] & bit) { - dc_brk[unit >> 2] &= ~bit; + sc = dc_cd.cd_devs[DCUNIT(dev)]; + line = DCLINE(dev); + tp = sc->dc_tty[line]; + bit = 1 << (line + 8); + s = spltty(); + /* turn off the break bit if it is set */ + if (sc->dc_brk & bit) { + sc->dc_brk &= ~bit; ttyoutput(0, tp); } + splx(s); (*linesw[tp->t_line].l_close)(tp, flag); if ((tp->t_cflag & HUPCL) || (tp->t_state & TS_WOPEN) || !(tp->t_state & TS_ISOPEN)) @@ -465,9 +474,20 @@ dcread(dev, uio, flag) dev_t dev; struct uio *uio; { + register struct dc_softc *sc; register struct tty *tp; - tp = dc_tty[minor(dev)]; + sc = dc_cd.cd_devs[DCUNIT(dev)]; + tp = sc->dc_tty[DCLINE(dev)]; + +#ifdef HW_FLOW_CONTROL + if ((tp->t_cflag & CRTS_IFLOW) && (tp->t_state & TS_TBLOCK) && + tp->t_rawq.c_cc < TTYHOG/5) { + tp->t_state &= ~TS_TBLOCK; + (void) dcmctl(dev, DML_RTS, DMBIS); + } +#endif /* HW_FLOW_CONTROL */ + return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); } @@ -476,9 +496,11 @@ dcwrite(dev, uio, flag) dev_t dev; struct uio *uio; { + register struct dc_softc *sc; register struct tty *tp; - tp = dc_tty[minor(dev)]; + sc = dc_cd.cd_devs[DCUNIT(dev)]; + tp = sc->dc_tty[DCLINE(dev)]; return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); } @@ -486,7 +508,11 @@ struct tty * dctty(dev) dev_t dev; { - struct tty *tp = dc_tty [minor (dev)]; + register struct dc_softc *sc; + register struct tty *tp; + + sc = dc_cd.cd_devs[DCUNIT(dev)]; + tp = sc->dc_tty[DCLINE(dev)]; return (tp); } @@ -499,12 +525,18 @@ dcioctl(dev, cmd, data, flag, p) int flag; struct proc *p; { + register struct dc_softc *sc; register struct tty *tp; - register int unit = minor(dev); - register int dc = unit >> 2; + register int unit; + register int line; int error; - tp = dc_tty[unit]; + + unit = DCUNIT(dev); + line = DCLINE(dev); + sc = dc_cd.cd_devs[unit]; + tp = sc->dc_tty[line]; + error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); if (error >= 0) return (error); @@ -515,12 +547,12 @@ dcioctl(dev, cmd, data, flag, p) switch (cmd) { case TIOCSBRK: - dc_brk[dc] |= 1 << ((unit & 03) + 8); + sc->dc_brk |= 1 << (line + 8); ttyoutput(0, tp); break; case TIOCCBRK: - dc_brk[dc] &= ~(1 << ((unit & 03) + 8)); + sc->dc_brk &= ~(1 << (line + 8)); ttyoutput(0, tp); break; @@ -554,55 +586,77 @@ dcioctl(dev, cmd, data, flag, p) return (0); } +/* + * Set line parameters + */ + int dcparam(tp, t) register struct tty *tp; register struct termios *t; { + register struct dc_softc *sc; + register dcregs *dcaddr; + + + /* + * Extract softc data, and pass entire request onto + * cold_dcparam() for argument checking and execution. + */ + sc = dc_cd.cd_devs[DCUNIT(tp->t_dev)]; + dcaddr = (dcregs *)sc->dc_pdma[0].p_addr; + return (cold_dcparam(tp, t, dcaddr, sc->dc_19200)); + +} + +int +cold_dcparam(tp, t, dcaddr, allow_19200) + register struct tty *tp; + register struct termios *t; register dcregs *dcaddr; + int allow_19200; +{ register int lpr; register int cflag = t->c_cflag; int unit = minor(tp->t_dev); int ospeed = ttspeedtab(t->c_ospeed, dcspeedtab); + int s; + int line; + + line = DCLINE(tp->t_dev); /* check requested parameters */ if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed) || (cflag & CSIZE) == CS5 || (cflag & CSIZE) == CS6 || - (pmax_boardtype == DS_PMAX && t->c_ospeed == 19200)) + (t->c_ospeed >= 19200 && allow_19200 != 1)) return (EINVAL); /* and copy to tty */ tp->t_ispeed = t->c_ispeed; tp->t_ospeed = t->c_ospeed; tp->t_cflag = cflag; - dcaddr = (dcregs *)dcpdma[unit].p_addr; - /* * Handle console cases specially. */ if (raster_console()) { if (unit == DCKBD_PORT) { - dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | + lpr = LPR_RXENAB | LPR_8_BIT_CHAR | LPR_B4800 | DCKBD_PORT; - wbflush(); - return (0); + goto out; } else if (unit == DCMOUSE_PORT) { - dcaddr->dc_lpr = LPR_RXENAB | LPR_B4800 | LPR_OPAR | + lpr = LPR_RXENAB | LPR_B4800 | LPR_OPAR | LPR_PARENB | LPR_8_BIT_CHAR | DCMOUSE_PORT; - wbflush(); - return (0); + goto out; } } else if (tp->t_dev == cn_tab->cn_dev) { - dcaddr->dc_lpr = LPR_RXENAB | LPR_8_BIT_CHAR | - LPR_B9600 | unit; - wbflush(); - return (0); + lpr = LPR_RXENAB | LPR_8_BIT_CHAR | LPR_B9600 | line; + goto out; } if (ospeed == 0) { (void) dcmctl(unit, 0, DMSET); /* hang up line */ return (0); } - lpr = LPR_RXENAB | ospeed | (unit & 03); + lpr = LPR_RXENAB | ospeed | line; if ((cflag & CSIZE) == CS7) lpr |= LPR_7_BIT_CHAR; else @@ -613,12 +667,16 @@ dcparam(tp, t) lpr |= LPR_OPAR; if (cflag & CSTOPB) lpr |= LPR_2_STOP; +out: + s = spltty(); dcaddr->dc_lpr = lpr; wbflush(); + splx(s); DELAY(10); return (0); } + /* * Check for interrupts from all devices. */ @@ -630,40 +688,42 @@ dcintr(xxxunit) register dcregs *dcaddr; register unsigned csr; - register int unit = sc->sc_dv.dv_unit; - - unit <<= 2; - dcaddr = (dcregs *)dcpdma[unit].p_addr; + dcaddr = (dcregs *)sc->dc_pdma[0].p_addr; while ((csr = dcaddr->dc_csr) & (CSR_RDONE | CSR_TRDY)) { if (csr & CSR_RDONE) - dcrint(unit); + dcrint(sc); if (csr & CSR_TRDY) - dcxint(dc_tty[unit + ((csr >> 8) & 03)]); + dcxint(sc->dc_tty[((csr >> 8) & 03)]); } /* XXX check for spurious interrupts */ return 0; } void -dcrint(unit) - register int unit; +dcrint(sc) + register struct dc_softc * sc; { register dcregs *dcaddr; register struct tty *tp; register int c, cc; int overrun = 0; + register struct tty **dc_tty; - dcaddr = (dcregs *)dcpdma[unit].p_addr; + dc_tty = ((struct dc_softc*)dc_cd.cd_devs[0])->dc_tty; /* XXX */ + + dcaddr = (dcregs *)sc->dc_pdma[0].p_addr; /*XXX*/ while ((c = dcaddr->dc_rbuf) < 0) { /* char present */ cc = c & 0xff; - tp = dc_tty[unit + ((c >> 8) & 03)]; + tp = sc->dc_tty[((c >> 8) & 03)]; + if ((c & RBUF_OERR) && overrun == 0) { - log(LOG_WARNING, "dc%d,%d: silo overflow\n", unit >> 2, + log(LOG_WARNING, "%s,%d: silo overflow\n", + sc->sc_dv.dv_xname, (c >> 8) & 03); overrun = 1; } /* the keyboard requires special translation */ - if (tp == dc_tty[DCKBD_PORT] && raster_console()) { + if (raster_console() && tp == dc_tty[DCKBD_PORT]) { #ifdef KADB if (cc == LK_DO) { spl0(); @@ -695,6 +755,13 @@ dcrint(unit) cc |= TTY_FE; if (c & RBUF_PERR) cc |= TTY_PE; +#ifdef HW_FLOW_CONTROL + if ((tp->t_cflag & CRTS_IFLOW) && !(tp->t_state & TS_TBLOCK) && + tp->t_rawq.c_cc + tp->t_canq.c_cc >= TTYHOG) { + tp->t_state &= ~TS_TBLOCK; + (void) dcmctl(tp->t_dev, DML_RTS, DMBIC); + } +#endif /* HWW_FLOW_CONTROL */ (*linesw[tp->t_line].l_rint)(cc, tp); } DELAY(10); @@ -704,14 +771,48 @@ void dcxint(tp) register struct tty *tp; { + register struct dc_softc *sc; register struct pdma *dp; register dcregs *dcaddr; - int unit = minor(tp->t_dev); + int line, linemask; - dp = &dcpdma[unit]; + sc = dc_cd.cd_devs[DCUNIT(tp->t_dev)]; /* XXX */ + + line = DCLINE(tp->t_dev); + linemask = 1 << line; + + dp = &sc->dc_pdma[line]; if (dp->p_mem < dp->p_end) { dcaddr = (dcregs *)dp->p_addr; - dcaddr->dc_tdr = dc_brk[unit >> 2] | *dp->p_mem++; + +#ifdef HW_FLOW_CONTROL + /* check for hardware flow control of output */ + if ((tp->t_cflag & CCTS_OFLOW) && (sc->dc_rtscts & linemask)) { + switch (line) { + case 2: + if (dcaddr->dc_msr & MSR_CTS2) + break; + goto stop; + + case 3: + if (dcaddr->dc_msr & MSR_CTS3) + break; + stop: + tp->t_state &= ~TS_BUSY; + tp->t_state |= TS_TTSTOP; + ndflush(&tp->t_outq, dp->p_mem - + (caddr_t)tp->t_outq.c_cf); + dp->p_end = dp->p_mem = tp->t_outq.c_cf; + dcaddr->dc_tcr &= ~(1 << line); + wbflush(); + DELAY(10); + return; + } + } +#endif /* HW_FLOW_CONTROL */ + dcaddr->dc_tdr = sc->dc_brk | *(u_char *)dp->p_mem; + dp->p_mem++; + wbflush(); DELAY(10); return; @@ -729,7 +830,7 @@ dcxint(tp) dcstart(tp); if (tp->t_outq.c_cc == 0 || !(tp->t_state & TS_BUSY)) { dcaddr = (dcregs *)dp->p_addr; - dcaddr->dc_tcr &= ~(1 << (unit & 03)); + dcaddr->dc_tcr &= ~(1 << line); wbflush(); DELAY(10); } @@ -739,12 +840,15 @@ void dcstart(tp) register struct tty *tp; { + register struct dc_softc *sc; register struct pdma *dp; register dcregs *dcaddr; register int cc; - int s; + int line, s; - dp = &dcpdma[minor(tp->t_dev)]; + sc = dc_cd.cd_devs[DCUNIT(tp->t_dev)]; + line = DCLINE(tp->t_dev); + dp = &sc->dc_pdma[line]; dcaddr = (dcregs *)dp->p_addr; s = spltty(); if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP)) @@ -759,7 +863,7 @@ dcstart(tp) if (tp->t_outq.c_cc == 0) goto out; /* handle console specially */ - if (tp == dc_tty[DCKBD_PORT] && raster_console()) { + if (raster_console() && tp == sc->dc_tty[DCKBD_PORT]) { while (tp->t_outq.c_cc > 0) { cc = getc(&tp->t_outq) & 0x7f; cnputc(cc); @@ -777,14 +881,13 @@ dcstart(tp) } goto out; } - cc = ndqb(&tp->t_outq, 0); - if (cc == 0) + cc = ndqb(&tp->t_outq, 0); + if (cc == 0) goto out; - tp->t_state |= TS_BUSY; dp->p_end = dp->p_mem = tp->t_outq.c_cf; dp->p_end += cc; - dcaddr->dc_tcr |= 1 << (minor(tp->t_dev) & 03); + dcaddr->dc_tcr |= 1 << line; wbflush(); out: splx(s); @@ -794,14 +897,16 @@ out: * Stop output on a line. */ /*ARGSUSED*/ -int +int /* was void TTTTT */ dcstop(tp, flag) register struct tty *tp; { + register struct dc_softc *sc; register struct pdma *dp; register int s; - dp = &dcpdma[minor(tp->t_dev)]; + sc = dc_cd.cd_devs[DCUNIT(tp->t_dev)]; + dp = &sc->dc_pdma[DCLINE(tp->t_dev)]; s = spltty(); if (tp->t_state & TS_BUSY) { dp->p_end = dp->p_mem; @@ -809,8 +914,6 @@ dcstop(tp, flag) tp->t_state |= TS_FLUSH; } splx(s); - - return (0); } int @@ -818,38 +921,62 @@ dcmctl(dev, bits, how) dev_t dev; int bits, how; { + register struct dc_softc *sc; register dcregs *dcaddr; - register int unit, mbits; + register int line, mbits; int b, s; - register int msr; + register int tcr, msr; - unit = minor(dev); - b = 1 << (unit & 03); - dcaddr = (dcregs *)dcpdma[unit].p_addr; + line = DCLINE(dev); + sc = dc_cd.cd_devs[DCUNIT(dev)]; + b = 1 << line; + dcaddr = (dcregs *)sc->dc_pdma[line].p_addr; s = spltty(); - /* only channel 2 has modem control (what about line 3?) */ + /* only channel 2 has modem control on a DECstation 2100/3100 */ mbits = DML_DTR | DML_DSR | DML_CAR; - switch (unit & 03) { - case 2: +#ifdef HW_FLOW_CONTROL + mbits != DML_RTS; +#endif /* HW_FLOW_CONTROL */ + switch (line) { + case 2: /* pmax partial-modem comms port, full-modem port on 3max */ mbits = 0; - if (dcaddr->dc_tcr & TCR_DTR2) + tcr = dcaddr->dc_tcr; + if (tcr & TCR_DTR2) mbits |= DML_DTR; + if ((sc->dc_rtscts & (1<dc_msr; if (msr & MSR_CD2) mbits |= DML_CAR; if (msr & MSR_DSR2) { - if (pmax_boardtype == DS_PMAX) + /* + * XXX really tests for DS_PMAX instead of DS_3MAX + * but close enough for now. Vaxes? + */ + if ((sc->dc_rtscts & (1 << line )) == 0 && + (sc->dc_modem & (1 << line ))) mbits |= DML_CAR | DML_DSR; else mbits |= DML_DSR; } break; - case 3: - if (pmax_boardtype != DS_PMAX) { + case 3: /* no modem control on pmax, console port on 3max */ + /* + * XXX really tests for DS_3MAX instead of DS_PMAX + * but close enough for now. Vaxes? + */ + if ( sc->dc_modem & (1 << line )) { mbits = 0; - if (dcaddr->dc_tcr & TCR_DTR3) + tcr = dcaddr->dc_tcr; + if (tcr & TCR_DTR3) mbits |= DML_DTR; +#ifdef HW_FLOW_CONTROL + /* XXX OK for get, but not for set? */ + /*if ( sc->dc_rtscts & (1 << line ))*/ + if (tcr & TCR_RTS3) + mbits |= DML_RTS; +#endif /*HW_FLOW_CONTROL*/ msr = dcaddr->dc_msr; if (msr & MSR_CD3) mbits |= DML_CAR; @@ -874,24 +1001,42 @@ dcmctl(dev, bits, how) (void) splx(s); return (mbits); } - switch (unit & 03) { - case 2: + switch (line) { + case 2: /* 2 */ + tcr = dcaddr->dc_tcr; if (mbits & DML_DTR) - dcaddr->dc_tcr |= TCR_DTR2; + tcr |= TCR_DTR2; else - dcaddr->dc_tcr &= ~TCR_DTR2; + tcr &= ~TCR_DTR2; + /*if (pmax_boardtype != DS_PMAX)*/ + if (sc->dc_rtscts & (1 << line)) { + if (mbits & DML_RTS) + tcr |= TCR_RTS2; + else + tcr &= ~TCR_RTS2; + } + dcaddr->dc_tcr = tcr; break; case 3: - if (pmax_boardtype != DS_PMAX) { + /* XXX DTR not supported on this line on 2100/3100 */ + /*if (pmax_boardtype != DS_PMAX)*/ + if (sc->dc_modem & (1 << line)) { + tcr = dcaddr->dc_tcr; if (mbits & DML_DTR) - dcaddr->dc_tcr |= TCR_DTR3; + tcr |= TCR_DTR3; else - dcaddr->dc_tcr &= ~TCR_DTR3; + tcr &= ~TCR_DTR3; +#ifdef HW_FLOW_CONTROL + /*if (sc->dc_rtscts & (1 << line))*/ + if (mbits & DML_RTS) + tcr |= TCR_RTS3; + else + tcr &= ~TCR_RTS3; +#endif /* HW_FLOW_CONTROL */ + dcaddr->dc_tcr = tcr; } } - if ((mbits & DML_DTR) && (dcsoftCAR[unit >> 2] & b)) - dc_tty[unit]->t_state |= TS_CARR_ON; (void) splx(s); return (mbits); } @@ -904,27 +1049,56 @@ void dcscan(arg) void *arg; { + register struct dc_softc *sc = dc_cd.cd_devs[0]; /* XXX */ register dcregs *dcaddr; register struct tty *tp; - register int i, bit, car; + register int unit, limit, dtr, dsr; int s; + /* only channel 2 has modem control on a DECstation 2100/3100 */ + dtr = TCR_DTR2; + dsr = MSR_DSR2; +#ifdef HW_FLOW_CONTROL + /*limit = (pmax_boardtype == DS_PMAX) ? 2 : 3;*/ + limit = (sc->dc_rtscts & (1 << 3)) :3 : 2; /*XXX*/ +#else + limit = 2; +#endif s = spltty(); - /* only channel 2 has modem control (what about line 3?) */ - dcaddr = (dcregs *)dcpdma[i = 2].p_addr; - tp = dc_tty[i]; - bit = TCR_DTR2; - if (dcsoftCAR[i >> 2] & bit) - car = 1; - else - car = dcaddr->dc_msr & MSR_DSR2; - if (car) { - /* carrier present */ - if (!(tp->t_state & TS_CARR_ON)) - (void)(*linesw[tp->t_line].l_modem)(tp, 1); - } else if ((tp->t_state & TS_CARR_ON) && - (*linesw[tp->t_line].l_modem)(tp, 0) == 0) - dcaddr->dc_tcr &= ~bit; + for (unit = 2; unit <= limit; unit++, dtr >>= 2, dsr >>= 8) { + tp = sc->dc_tty[unit]; + dcaddr = (dcregs *)sc->dc_pdma[unit].p_addr; + if ((dcaddr->dc_msr & dsr) || (sc->dcsoftCAR & (1 << unit))) { + /* carrier present */ + if (!(tp->t_state & TS_CARR_ON)) + (void)(*linesw[tp->t_line].l_modem)(tp, 1); + } else if ((tp->t_state & TS_CARR_ON) && + (*linesw[tp->t_line].l_modem)(tp, 0) == 0) + dcaddr->dc_tcr &= ~dtr; +#ifdef HW_FLOW_CONTROL + /* + * If we are using hardware flow control and output is stopped, + * then resume transmit. + */ + if ((tp->t_cflag & CCTS_OFLOW) && (tp->t_state & TS_TTSTOP) && + /*pmax_boardtype != DS_PMAX*/ + (sc->dc_rtscts & (1 << unit)) ) { + switch (unit) { + case 2: + if (dcaddr->dc_msr & MSR_CTS2) + break; + continue; + + case 3: + if (dcaddr->dc_msr & MSR_CTS3) + break; + continue; + } + tp->t_state &= ~TS_TTSTOP; + dcstart(tp); + } +#endif /* HW_FLOW_CONTROL */ + } splx(s); timeout(dcscan, (void *)0, hz); } @@ -950,9 +1124,17 @@ dcGetc(dev) { register dcregs *dcaddr; register int c; + register int line; int s; - dcaddr = (dcregs *)dcpdma[minor(dev)].p_addr; + line = DCLINE(dev); + if (cold && dc_cons_addr) { + dcaddr = dc_cons_addr; + } else { + struct dc_softc *sc; + sc = dc_cd.cd_devs[DCUNIT(dev)]; + dcaddr = (dcregs *)sc->dc_pdma[line].p_addr; + } if (!dcaddr) return (0); s = spltty(); @@ -961,7 +1143,7 @@ dcGetc(dev) continue; c = dcaddr->dc_rbuf; DELAY(10); - if (((c >> 8) & 03) == (minor(dev) & 03)) + if (((c >> 8) & 03) == line) break; } splx(s); @@ -979,13 +1161,23 @@ dcPutc(dev, c) register dcregs *dcaddr; register u_short tcr; register int timeout; - int s, line; + int s, out_line, activeline; + int brk; s = spltty(); - - dcaddr = (dcregs *)dcpdma[minor(dev)].p_addr; + out_line = DCLINE(dev); + if (cold && dc_cons_addr) { + brk = 0; + dcaddr = dc_cons_addr; + } else { + struct dc_softc *sc; + + sc = dc_cd.cd_devs[DCUNIT(dev)]; + dcaddr = (dcregs *)sc->dc_pdma[out_line].p_addr; + brk = sc->dc_brk; + } tcr = dcaddr->dc_tcr; - dcaddr->dc_tcr = tcr | (1 << minor(dev)); + dcaddr->dc_tcr = tcr | (1 << out_line); wbflush(); DELAY(10); while (1) { @@ -999,13 +1191,13 @@ dcPutc(dev, c) printf("dcPutc: timeout waiting for CSR_TRDY\n"); break; } - line = (dcaddr->dc_csr >> 8) & 3; + activeline = (dcaddr->dc_csr >> 8) & 3; /* * Check to be sure its the right port. */ - if (line != minor(dev)) { - tcr |= 1 << line; - dcaddr->dc_tcr &= ~(1 << line); + if (activeline != out_line) { + tcr |= 1 << activeline; + dcaddr->dc_tcr &= ~(1 << out_line); wbflush(); DELAY(10); continue; @@ -1013,7 +1205,7 @@ dcPutc(dev, c) /* * Start sending the character. */ - dcaddr->dc_tdr = dc_brk[0] | (c & 0xff); + dcaddr->dc_tdr = brk | (c & 0xff); wbflush(); DELAY(10); /* @@ -1028,15 +1220,15 @@ dcPutc(dev, c) timeout = 1000000; while (!(dcaddr->dc_csr & CSR_TRDY) && timeout > 0) timeout--; - line = (dcaddr->dc_csr >> 8) & 3; - if (line != minor(dev)) { - tcr |= 1 << line; - dcaddr->dc_tcr &= ~(1 << line); + activeline = (dcaddr->dc_csr >> 8) & 3; + if (activeline != out_line) { + tcr |= 1 << activeline; + dcaddr->dc_tcr &= ~(1 << activeline); wbflush(); DELAY(10); continue; } - dcaddr->dc_tcr &= ~(1 << minor(dev)); + dcaddr->dc_tcr &= ~(1 << out_line); wbflush(); DELAY(10); break; @@ -1054,4 +1246,18 @@ dcPutc(dev, c) splx(s); } -#endif /* NDC */ + + +/* + * Enable/disable polling mode + */ +void +dcPollc(dev, on) + dev_t dev; + int on; +{ +#if defined(DIAGNOSTIC) || defined(DEBUG) + printf("dc_Pollc(%d, %d): not implemented\n", minor(dev), on); +#endif +} + diff --git a/sys/arch/pmax/dev/dc_cons.h b/sys/arch/pmax/dev/dc_cons.h new file mode 100644 index 00000000000..8110a2a2629 --- /dev/null +++ b/sys/arch/pmax/dev/dc_cons.h @@ -0,0 +1,17 @@ +/* $NetBSD: dc_cons.h,v 1.1 1996/10/13 03:42:17 jonathan Exp $ */ + +#ifdef _KERNEL +#ifndef _DC_CONS_H +#define _DC_CONS_H + +/* + * Following declaratios for console code. + * XXX should be redesigned to expose less driver internals. + */ +void dc_consinit __P((dev_t dev, dcregs *dcaddr)); +extern int dcGetc __P ((dev_t dev)); +extern int dcparam __P((register struct tty *tp, register struct termios *t)); +extern void dcPutc __P((dev_t dev, int c)); + +#endif /* _DCVAR_H */ +#endif /* _KERNEL */ diff --git a/sys/arch/pmax/dev/dc_ds.c b/sys/arch/pmax/dev/dc_ds.c new file mode 100644 index 00000000000..c316c83a42d --- /dev/null +++ b/sys/arch/pmax/dev/dc_ds.c @@ -0,0 +1,106 @@ +/* $NetBSD: dc_ds.c,v 1.4 1996/10/14 17:28:46 jonathan Exp $ */ + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + * + * this driver contributed by Jonathan Stone + */ + +#include +#include +#include +#include +#include +#include +#include /* XXX */ +#include +#include +#include + +extern struct cfdriver mainbus_cd; /* XXX */ + +/* + * Autoconfig definition of driver front-end + */ +int dc_ds_match __P((struct device * parent, void *cfdata, void *aux)); +void dc_ds_attach __P((struct device *parent, struct device *self, void *aux)); + +struct cfattach dc_ds_ca = { + sizeof(struct dc_softc), dc_ds_match, dc_ds_attach +}; + + +/* + * Initialize a line for (polled) console I/O + */ +int +dc_ds_consinit(dev) + dev_t dev; +{ +#if defined(DEBUG) && 1 /* XXX untested */ + printf("dc_ds(%d,%d): serial console at 0x%x\n", + minor(dev) >> 2, minor(dev) & 03, + MACH_PHYS_TO_UNCACHED(KN01_SYS_DZ)); +#endif + /* let any pending PROM output from boot drain */ + DELAY(100000); + dc_consinit(dev, (void *)MACH_PHYS_TO_UNCACHED(KN01_SYS_DZ)); + return (1); +} + + +/* + * Match driver on decstation (2100,3100,5100) based on name + */ +int +dc_ds_match(parent, match, aux) + struct device *parent; + void *match; + void *aux; +{ + struct confargs *ca = aux; + + if (strcmp(ca->ca_name, "dc") != 0 && + strcmp(ca->ca_name, "mdc") != 0 && + strcmp(ca->ca_name, "dc7085") != 0) + return (0); + + if (badaddr((caddr_t)ca->ca_addr, 2)) + return (0); + + return (1); +} + + +void +dc_ds_attach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + register struct confargs *ca = aux; + caddr_t dcaddr; + struct dc_softc *sc = (void*) self; + + + dcaddr = (caddr_t)ca->ca_addr; + (void) dcattach(sc, (void*)MACH_PHYS_TO_UNCACHED(dcaddr), + /* dtr/dsr mask: comm port only */ + 1 << DCCOMM_PORT, + /* rts/cts mask: none */ + 0x0, + 0, DCCOMM_PORT); + + /* tie pseudo-slot to device */ + BUS_INTR_ESTABLISH(ca, dcintr, self); + printf("\n"); +} diff --git a/sys/arch/pmax/dev/dc_ds_cons.h b/sys/arch/pmax/dev/dc_ds_cons.h new file mode 100644 index 00000000000..6b19ba04b89 --- /dev/null +++ b/sys/arch/pmax/dev/dc_ds_cons.h @@ -0,0 +1,14 @@ +/* $NetBSD: dc_ds_cons.h,v 1.1 1996/09/25 20:48:55 jonathan Exp $ */ + +#ifdef _KERNEL +#ifndef _DC_DS_CONS_H +#define _DC_DS_CONS_H + +/* + * Following declaratios for console code. + * XXX should be redesigned to expose less driver internals. + */ +int dc_ds_consinit __P((dev_t dev)); + +#endif /* _DC_DS_CONS_H */ +#endif /* _KERNEL */ diff --git a/sys/arch/pmax/dev/dc_ioasic.c b/sys/arch/pmax/dev/dc_ioasic.c new file mode 100644 index 00000000000..b6f9b9ad977 --- /dev/null +++ b/sys/arch/pmax/dev/dc_ioasic.c @@ -0,0 +1,109 @@ +/* $NetBSD: dc_ioasic.c,v 1.4 1996/10/14 17:15:42 jonathan Exp $ */ + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + * + * this driver contributed by Jonathan Stone + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +/* + * Autoconfig definition of driver front-end + */ +int dc_ioasic_match __P((struct device * parent, void *cfdata, void *aux)); +void dc_ioasic_attach __P((struct device *parent, struct device *self, void *aux)); + +struct cfattach dc_ioasic_ca = { + sizeof(struct dc_softc), dc_ioasic_match, dc_ioasic_attach +}; + + +/* + * Initialize a line for (polled) console I/O + */ +int +dc_ioasic_consinit(dev) + dev_t dev; +{ + +#if defined(DEBUG) && 0 + printf("dc_ioasic(%d,%d): serial console at 0x%x\n", + minor(dev) >> 2, minor(dev) & 03, + MACH_PHYS_TO_UNCACHED(KN02_SYS_DZ)); + DELAY(100000); +#endif + dc_consinit(dev, (void *)MACH_PHYS_TO_UNCACHED(KN02_SYS_DZ)); + return(1); +} + + +/* + * Match driver on 5000/200 + * (not a real ioasic, but we configure it as one) + */ +int +dc_ioasic_match(parent, match, aux) + struct device *parent; + void *match; + void *aux; +{ + struct ioasicdev_attach_args *d = aux; + + if (strcmp(d->iada_modname, "dc") != 0 && + strcmp(d->iada_modname, "dc7085") != 0) + return (0); + + if (badaddr((caddr_t)(d->iada_addr), 2)) + return (0); + + return (1); +} + + +void +dc_ioasic_attach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + struct dc_softc *sc = (void*) self; + struct ioasicdev_attach_args *d = aux; + caddr_t dcaddr; + + dcaddr = (caddr_t)d->iada_addr; + printf("address 0x%p\n", dcaddr); + (void) dcattach(sc, (void*)MACH_PHYS_TO_UNCACHED(dcaddr), + /* dtr/dsr mask */ (1<< DCPRINTER_PORT) + (1 << DCCOMM_PORT), +#ifdef HW_FLOW_CONTROL + /* rts/cts mask */ (1<< DCPRINTER_PORT) + (1 << DCCOMM_PORT), +#else + 0, +#endif + 1, 3); + /* tie pseudo-slot to device */ + ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY, + dcintr, self); + + printf("\n"); +} + diff --git a/sys/arch/pmax/dev/dc_ioasic_cons.h b/sys/arch/pmax/dev/dc_ioasic_cons.h new file mode 100644 index 00000000000..d3ebda1de28 --- /dev/null +++ b/sys/arch/pmax/dev/dc_ioasic_cons.h @@ -0,0 +1,14 @@ +/* $NetBSD: dc_ioasic_cons.h,v 1.1 1996/09/25 20:48:56 jonathan Exp $ */ + +#ifdef _KERNEL +#ifndef _DC_IOASIC_CONS_H +#define _DC_IOASIC_CONS_H + +/* + * Following declaratios for console code. + * XXX should be redesigned to expose less driver internals. + */ +int dc_ioasic_consinit __P((dev_t dev)); + +#endif /* _DCVAR_H */ +#endif /* _KERNEL */ diff --git a/sys/arch/pmax/dev/dcvar.h b/sys/arch/pmax/dev/dcvar.h index 1e5c3e9b8f2..d9aad4033a3 100644 --- a/sys/arch/pmax/dev/dcvar.h +++ b/sys/arch/pmax/dev/dcvar.h @@ -1,10 +1,43 @@ -/* $NetBSD: dcvar.h,v 1.2 1996/01/29 22:52:18 jonathan Exp $ */ +/* $NetBSD: dcvar.h,v 1.3 1996/09/25 20:48:57 jonathan Exp $ */ /* * External declarations from DECstation dc serial driver. */ +#ifdef _KERNEL +#ifndef _DCVAR_H +#define _DCVAR_H + +#include + +struct dc_softc { + struct device sc_dv; + struct pdma dc_pdma[4]; + struct tty *dc_tty[4]; + /* + * Software copy of brk register since it isn't readable + */ + int dc_brk; + + char dc_19200; /* this unit supports 19200 */ + char dcsoftCAR; /* mask, lines with carrier on (DSR) */ + char dc_rtscts; /* mask, lines with hw flow control */ + char dc_modem; /* mask, lines with DTR wired */ +}; + +int dcattach __P((struct dc_softc *sc, void *addr, + int dtrmask, int rts_ctsmask, + int speed, int consline)); +int dcintr __P((void * xxxunit)); + +/* + * Following declaratios for console code. + * XXX shuould be separated, or redesigned. + */ extern int dcGetc __P ((dev_t dev)); extern int dcparam __P((register struct tty *tp, register struct termios *t)); extern void dcPutc __P((dev_t dev, int c)); +void dc_consinit __P((dev_t dev, dcregs *dcaddr)); +#endif /* _DCVAR_H */ +#endif /* _KERNEL */ diff --git a/sys/arch/pmax/dev/device.h b/sys/arch/pmax/dev/device.h index 6b8602b8219..0d122f5ff7b 100644 --- a/sys/arch/pmax/dev/device.h +++ b/sys/arch/pmax/dev/device.h @@ -1,4 +1,4 @@ -/* $NetBSD: device.h,v 1.9 1996/04/10 16:27:38 jonathan Exp $ */ +/* $NetBSD: device.h,v 1.11 1996/10/01 01:04:50 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -54,7 +54,8 @@ struct pmax_driver { /* routine to start operation */ void (*d_start) __P((struct ScsiCmd *cmd)); /* routine to call when operation complete */ - void (*d_done) __P((int, int, int, int)); + void (*d_done) __P(( int unit, int errno, int buflen, + int status_byte)); /* routine to call when interrupt is seen */ int (*d_intr) __P((void* sc)); }; @@ -84,7 +85,6 @@ struct pmax_scsi_device { int sd_ctlr; /* SCSI interface number */ int sd_drive; /* SCSI address number */ int sd_slave; /* LUN if device has multiple units */ - int sd_dk; /* used for disk statistics */ int sd_flags; /* flags */ int sd_alive; /* true if init routine succeeded */ diff --git a/sys/arch/pmax/dev/dtop.c b/sys/arch/pmax/dev/dtop.c index a13ac2dd887..6db3e880403 100644 --- a/sys/arch/pmax/dev/dtop.c +++ b/sys/arch/pmax/dev/dtop.c @@ -1,4 +1,4 @@ -/* $NetBSD: dtop.c,v 1.14.4.2 1996/06/16 17:17:14 mhitch Exp $ */ +/* $NetBSD: dtop.c,v 1.20 1996/10/13 13:13:55 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -114,8 +114,8 @@ SOFTWARE. #include +#include /* mips cached->uncached */ #include -#include #include #include @@ -690,7 +690,7 @@ dtopparam(tp, t) * Stop output on a line. */ /*ARGSUSED*/ -int +void dtopstop(tp, flag) register struct tty *tp; int flag; @@ -703,8 +703,6 @@ dtopstop(tp, flag) tp->t_state |= TS_FLUSH; } splx(s); - - return (0); } /* diff --git a/sys/arch/pmax/dev/fb.c b/sys/arch/pmax/dev/fb.c index 0edc22e46bc..78819923641 100644 --- a/sys/arch/pmax/dev/fb.c +++ b/sys/arch/pmax/dev/fb.c @@ -1,4 +1,4 @@ -/* $NetBSD: fb.c,v 1.10.4.1 1996/08/13 08:32:18 jonathan Exp $ */ +/* $NetBSD: fb.c,v 1.18 1996/10/14 04:55:26 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -65,6 +65,7 @@ #include #include #include +#include #include #include #include @@ -83,7 +84,7 @@ #include #include -#include +#include /* mips cached->uncached */ #include #include @@ -115,9 +116,7 @@ */ /* qvss/pm compatible and old 4.4bsd/pmax driver functions */ -void fbKbdEvent(), fbMouseEvent(), fbMouseButtons(); -void fbBlitc __P((int c, struct fbinfo *fi)); -void fbPutc __P((dev_t dev, int c)); + extern int pmax_boardtype; extern void fbScreenInit __P (( struct fbinfo *fi)); diff --git a/sys/arch/pmax/dev/fb_usrreq.c b/sys/arch/pmax/dev/fb_usrreq.c index 5d87a27dfff..9b01185eb50 100644 --- a/sys/arch/pmax/dev/fb_usrreq.c +++ b/sys/arch/pmax/dev/fb_usrreq.c @@ -199,29 +199,40 @@ fbioctl(dev, cmd, data, flag, p) return (0); } +/* fbselect(dev, events, p) should be fbpoll(dev, events, p) */ +/* see also pmax/conf.c TTTTT */ + + /* - * Select on Digital-OS-compatible in-kernel input-event ringbuffer. + * Poll on Digital-OS-compatible in-kernel input-event ringbuffer. */ int -fbselect(dev, flag, p) +fbselect(dev, events, p) dev_t dev; - int flag; + int events; struct proc *p; { struct fbinfo *fi = fbcd.cd_devs[minor(dev)]; + int revents = 0; - switch (flag) { - case FREAD: + if (events & (POLLIN | POLLRDNORM)) { if (fi->fi_fbu->scrInfo.qe.eHead != fi->fi_fbu->scrInfo.qe.eTail) - return (1); - selrecord(p, &fi->fi_selp); - break; + revents |= (events & (POLLIN|POLLRDNORM)); + else + selrecord(p, &fi->fi_selp); } - return (0); + /* XXX mice are not writable, what to do for poll on write? */ +#ifdef notdef + if (events & (POLLOUT | POLLWRNORM)) + revents |= events & (POLLOUT | POLLWRNORM); +#endif + + return (revents); } + /* * Return the physical page number that corresponds to byte offset 'off'. */ diff --git a/sys/arch/pmax/dev/fbreg.h b/sys/arch/pmax/dev/fbreg.h index 3d60490f464..78ac957580d 100644 --- a/sys/arch/pmax/dev/fbreg.h +++ b/sys/arch/pmax/dev/fbreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: fbreg.h,v 1.5 1995/09/12 07:51:35 jonathan Exp $ */ +/* $NetBSD: fbreg.h,v 1.6 1996/09/21 03:25:20 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -49,9 +49,9 @@ struct fbuaccess { }; struct pmax_fbtty { - /*int initialized; /* Set up yet? */ int row, col; /* Screen pos for glass tty */ - void (*KBDPutc)(); /* Send char to keyboard func */ + void (*KBDPutc) __P ((dev_t dev, int c)); + /* Send char to keyboard func */ dev_t kbddev; /* Device for KBDPutc */ }; @@ -76,9 +76,7 @@ extern void fbMouseButtons __P((MouseReport *, struct fbinfo *)); extern void fbScroll __P((struct fbinfo *)); extern void fbPutc __P((dev_t, int)); extern void fbBlitc __P((int, struct fbinfo *)); -extern int kbdMapChar __P((int)); -extern void KBDReset __P((dev_t, void (*)(dev_t, int))); -extern void MouseInit __P((dev_t, void (*)(dev_t, int), int (*)(dev_t))); -extern int KBDGetc __P((void)); extern int tb_kbdmouseconfig __P((struct fbinfo *fi)); extern int fbmmap_fb __P((struct fbinfo *, dev_t, caddr_t, struct proc *)); + +extern void init_pmaxfbu __P((struct fbinfo *fi)); diff --git a/sys/arch/pmax/dev/ims332.c b/sys/arch/pmax/dev/ims332.c index 83abb3f9b63..66a144fead9 100644 --- a/sys/arch/pmax/dev/ims332.c +++ b/sys/arch/pmax/dev/ims332.c @@ -1,4 +1,4 @@ -/* $NetBSD: ims332.c,v 1.2.4.1 1996/09/09 20:16:32 thorpej Exp $ */ +/* $NetBSD: ims332.c,v 1.4 1996/10/13 13:13:57 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993, 1995 @@ -48,7 +48,6 @@ #include #include -#include #include static u_int ims332_read_register (struct fbinfo *, int); diff --git a/sys/arch/pmax/dev/mfb.c b/sys/arch/pmax/dev/mfb.c index d1b243ce73e..1fb35093fbe 100644 --- a/sys/arch/pmax/dev/mfb.c +++ b/sys/arch/pmax/dev/mfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: mfb.c,v 1.13.4.2 1996/09/09 20:07:04 thorpej Exp $ */ +/* $NetBSD: mfb.c,v 1.20 1996/10/13 13:13:59 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -91,13 +91,14 @@ #include #include -#include #include +#include -#include +#include /* mips cached->uncached */ #include #include #include +#include /* XXX dev/tc ? */ #include @@ -120,7 +121,6 @@ extern int pmax_boardtype; #define CMAP_BITS (3 * 256) /* 256 entries, 3 bytes per. */ static u_char cmap_bits [CMAP_BITS]; /* colormap for console... */ -extern void fbScreenInit __P((struct fbinfo *fia)); void mfbPosCursor __P((struct fbinfo *fi, int x, int y)); @@ -162,8 +162,6 @@ static u_char bt431_read_reg __P((bt431_regmap_t *regs, int regno)); /* * old pmax-framebuffer hackery */ -void genConfigMouse(), genDeconfigMouse(); -void genKbdEvent(), genMouseEvent(), genMouseButtons(); extern u_short defCursor[32]; diff --git a/sys/arch/pmax/dev/mfbreg.h b/sys/arch/pmax/dev/mfbreg.h index 039ad395a42..a4a9b1d2549 100644 --- a/sys/arch/pmax/dev/mfbreg.h +++ b/sys/arch/pmax/dev/mfbreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: mfbreg.h,v 1.4.6.1 1996/08/13 08:03:52 jonathan Exp $ */ +/* $NetBSD: mfbreg.h,v 1.5 1996/08/22 04:37:41 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 diff --git a/sys/arch/pmax/dev/mfbvar.h b/sys/arch/pmax/dev/mfbvar.h new file mode 100644 index 00000000000..9ba98ecbe5a --- /dev/null +++ b/sys/arch/pmax/dev/mfbvar.h @@ -0,0 +1,8 @@ +/* $NetBSD: mfbvar.h,v 1.1 1996/09/21 03:06:37 jonathan Exp $ */ + +/* + * Initialize a Turbochannel MFB 1280x1024x1 2-d framebuffer, + * so it can be used as a bitmapped glass-tty console device. + */ +extern int +mcfbinit __P((struct fbinfo *fi, caddr_t base, int unit, int silent)); diff --git a/sys/arch/pmax/dev/pm.c b/sys/arch/pmax/dev/pm.c index fa4244302ba..9fbf2f6f050 100644 --- a/sys/arch/pmax/dev/pm.c +++ b/sys/arch/pmax/dev/pm.c @@ -1,4 +1,4 @@ -/* $NetBSD: pm.c,v 1.14.4.1 1996/09/09 20:49:38 thorpej Exp $ */ +/* $NetBSD: pm.c,v 1.19 1996/10/13 03:39:35 christos Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -56,14 +56,6 @@ */ -#include "fb.h" -#include "pm.h" -#include "dc.h" -#if NPM > 0 -#if NDC == 0 -pm needs dc device -#else - #include #include #include @@ -73,31 +65,27 @@ pm needs dc device #include #include #include +#include #include #include #include -#include -#include #include - #include #include -#include -#include -#include - #include +#include #include -#include +#include /* * These need to be mapped into user space. */ +extern struct fbuaccess pmu; struct fbuaccess pmu; static u_short curReg; /* copy of PCCRegs.cmdr since it's read only */ @@ -105,7 +93,6 @@ static u_short curReg; /* copy of PCCRegs.cmdr since it's read only */ * rcons methods and globals. */ struct pmax_fbtty pmfb; -struct fbinfo pmfi; /*XXX*/ /* * Forward references. @@ -117,53 +104,31 @@ void pmPosCursor __P((struct fbinfo *fi, int x, int y)); void bt478CursorColor __P((struct fbinfo *fi, u_int *color)); void bt478InitColorMap __P((struct fbinfo *fi)); -static void pmLoadColorMap __P ((ColorMap *ptr)); /*XXX*/ - -int pminit __P((struct fbinfo *fi, int unit, int silent)); +int pminit __P((struct fbinfo *fi, int unit, int cold_console_flag)); +int pmattach __P((struct fbinfo *fi, int unit, int cold_console_flag)); static int pm_video_on __P ((struct fbinfo *)); static int pm_video_off __P ((struct fbinfo *)); -int bt478LoadColorMap __P ((struct fbinfo *, caddr_t, int, int)); -int bt478GetColorMap __P ((struct fbinfo *, caddr_t, int, int)); - - -#if 0 -static void pmVDACInit(); -void pmKbdEvent(), pmMouseEvent(), pmMouseButtons(); -#endif - -/* pm framebuffers are only found in {dec,vax}station 3100s with dc7085s */ - -extern void dcPutc(); -extern void (*dcDivertXInput)(); -extern void (*dcMouseEvent)(); -extern void (*dcMouseButtons)(); -extern int pmax_boardtype; -extern u_short defCursor[32]; -void genConfigMouse(), genDeconfigMouse(); -void genKbdEvent(), genMouseEvent(), genMouseButtons(); -extern void pmEventQueueInit __P((pmEventQueue *qe)); #define CMAP_BITS (3 * 256) /* 256 entries, 3 bytes per. */ static u_char cmap_bits [CMAP_BITS]; /* colormap for console... */ /* - * Autoconfiguration data for config.new. - * Use static-sized softc until config.old and old autoconfig - * code is completely gone. + * Definition of driver for autoconfiguration. */ -int pmmatch __P((struct device *, void *, void *)); -void pmattach __P((struct device *, struct device *, void *)); +int old_pmmatch __P((struct device *, void *, void *)); +void old_pmattach __P((struct device *, struct device *, void *)); -struct cfattach pm_ca = { - sizeof(struct device), pmmatch, pmattach +struct cfattach old_pm_ca = { + sizeof(struct device), old_pmmatch, old_pmattach }; +extern struct cfdriver pm_cd; struct cfdriver pm_cd = { NULL, "pm", DV_DULL }; @@ -182,12 +147,11 @@ struct fbdriver pm_driver = { }; int -pmmatch(parent, match, aux) +old_pmmatch(parent, match, aux) struct device *parent; void *match; void *aux; { - struct cfdata *cf = match; struct confargs *ca = aux; caddr_t pmaddr = (caddr_t)ca->ca_addr; @@ -202,13 +166,14 @@ pmmatch(parent, match, aux) } void -pmattach(parent, self, aux) +old_pmattach(parent, self, aux) struct device *parent; struct device *self; void *aux; { - struct confargs *ca = aux; - caddr_t pmaddr = (caddr_t)ca->ca_addr; + /*struct confargs *ca = aux;*/ + /*caddr_t pmaddr = (caddr_t)ca->ca_addr;*/ + extern struct fbinfo pmfi; /* XXX */ if (!pminit(&pmfi, 0, 0)) return; @@ -220,43 +185,32 @@ pmattach(parent, self, aux) } + /* - * pmax FB initialization. This is abstracted out from pmbattch() so - * that a console framebuffer can be initialized early in boot. + * Machine-independent backend to attach a pm device. + * assumes the following fields in struct fbinfo *fi have been set + * by the MD front-end: + * + * fi->fi_pixels framebuffer raster memory + * fi->fi_vdac vdac register address + * fi->fi_base address of programmable cursor chip registers + * fi->fi_type.fb_depth 1 (mono) or 8 (colour) + * fi->fi_fbu QVSS-compatible user-mapped fbinfo struct */ -pminit(fi, unit, silent) +int +pmattach(fi, unit, cold_console_flag) struct fbinfo *fi; int unit; - int silent; + int cold_console_flag; { - register PCCRegs *pcc = (PCCRegs *)MACH_PHYS_TO_UNCACHED(KN01_SYS_PCC); - - /*XXX*/ - /* - * If this device is being intialized as the console, malloc() - * is not yet up and we must use statically-allocated space. - */ - if (fi == NULL) { - fi = &pmfi; /* XXX */ - fi->fi_cmap_bits = (caddr_t)cmap_bits; - } else { - fi->fi_cmap_bits = malloc(CMAP_BITS, M_DEVBUF, M_NOWAIT); - if (fi->fi_cmap_bits == NULL) { - printf("pm%d: no memory for cmap 0x%x\n", unit); - return (0); - } - } + register PCCRegs *pcc = (PCCRegs *)fi->fi_base; - /* Set address of frame buffer... */ - fi->fi_pixels = (caddr_t)MACH_PHYS_TO_UNCACHED(KN01_PHYS_FBUF_START); + /* check for no frame buffer */ + if (badaddr((char *)fi->fi_pixels, 4)) + return (0); /* Fill in the stuff that differs from monochrome to color. */ - if (*(volatile u_short *)MACH_PHYS_TO_UNCACHED(KN01_SYS_CSR) & - KN01_CSR_MONO) { - /* check for no frame buffer */ - if (badaddr((char *)fi->fi_pixels, 4)) - return (0); - + if (fi->fi_type.fb_depth == 1) { fi->fi_type.fb_depth = 1; fi->fi_type.fb_cmsize = 0; fi->fi_type.fb_boardtype = PMAX_FBTYPE_PM_MONO; @@ -275,37 +229,28 @@ pminit(fi, unit, silent) fi->fi_driver = &pm_driver; fi->fi_pixelsize = ((fi->fi_type.fb_depth == 1) ? 1024 / 8 : 1024) * 864; - fi->fi_unit = unit; - fi->fi_base = (caddr_t)pcc; - fi->fi_vdac = (caddr_t)MACH_PHYS_TO_UNCACHED(KN01_SYS_VDAC); fi->fi_blanked = 0; - fi->fi_cmap_bits = (caddr_t)&cmap_bits [CMAP_BITS * unit]; + + if (cold_console_flag) { + fi->fi_cmap_bits = (caddr_t)cmap_bits; + } else { + fi->fi_cmap_bits = malloc(CMAP_BITS, M_DEVBUF, M_NOWAIT); + if (fi->fi_cmap_bits == NULL) { + printf("pm%d: no memory for cmap\n", unit); + return (0); + } + } fi->fi_type.fb_width = 1024; fi->fi_type.fb_height = 864; /* - * compatibility glue + * Compatibility glue */ fi->fi_glasstty = &pmfb; - /* - * Must be in Uncached space since the fbuaccess structure is - * mapped into the user's address space uncached. - */ - fi->fi_fbu = (struct fbuaccess *) - MACH_PHYS_TO_UNCACHED(MACH_CACHED_TO_PHYS(&pmu)); - fi->fi_glasstty->KBDPutc = dcPutc; - fi->fi_glasstty->kbddev = makedev(DCDEV, DCKBD_PORT); - - if (fi->fi_type.fb_depth == 1) { - /* check for no frame buffer */ - if (badaddr((char *)fi->fi_pixels, 4)) - return (0); - } - /* * Initialize the screen. */ @@ -343,7 +288,7 @@ pminit(fi, unit, silent) */ fi->fi_glasstty = &pmfb; /*XXX*/ fbconnect((fi->fi_type.fb_depth == 1) ? "KN01 mfb" : "KN01 cfb", - fi, silent); + fi, cold_console_flag); #ifdef fpinitialized @@ -353,10 +298,6 @@ pminit(fi, unit, silent) } -static u_char bg_RGB[3]; /* background color for the cursor */ -static u_char fg_RGB[3]; /* foreground color for the cursor */ - - /* * ---------------------------------------------------------------------------- * @@ -377,51 +318,19 @@ pmLoadCursor(fi, cur) struct fbinfo *fi; unsigned short *cur; { - register PCCRegs *pcc = (PCCRegs *)MACH_PHYS_TO_UNCACHED(KN01_SYS_PCC); + register PCCRegs *pcc = (PCCRegs *)fi->fi_base; register int i; curReg |= PCC_LODSA; pcc->cmdr = curReg; for (i = 0; i < 32; i++) { pcc->memory = cur[i]; - MachEmptyWriteBuffer(); + wbflush(); } curReg &= ~PCC_LODSA; pcc->cmdr = curReg; } -/* should zap pmloadcolormap too, but i haven't fixed the callers yet */ - -/* - * ---------------------------------------------------------------------------- - * - * pmLoadColorMap -- - * - * Load the color map. - * - * Results: - * None. - * - * Side effects: - * The color map is loaded. - * - * ---------------------------------------------------------------------------- - */ -static void -pmLoadColorMap(ptr) - ColorMap *ptr; -{ - register VDACRegs *vdac = (VDACRegs *)MACH_PHYS_TO_UNCACHED(KN01_SYS_VDAC); - - if (ptr->index > 256) - return; - - vdac->mapWA = ptr->index; MachEmptyWriteBuffer(); - vdac->map = ptr->Entry.red; MachEmptyWriteBuffer(); - vdac->map = ptr->Entry.green; MachEmptyWriteBuffer(); - vdac->map = ptr->Entry.blue; MachEmptyWriteBuffer(); -} - /* @@ -444,7 +353,7 @@ pmPosCursor(fi, x, y) register struct fbinfo *fi; register int x, y; { - register PCCRegs *pcc = (PCCRegs *)MACH_PHYS_TO_UNCACHED(KN01_SYS_PCC); + register PCCRegs *pcc = (PCCRegs *)fi->fi_base; if (y < fi->fi_fbu->scrInfo.min_cur_y || y > fi->fi_fbu->scrInfo.max_cur_y) @@ -458,9 +367,12 @@ pmPosCursor(fi, x, y) pcc->ypos = PCC_Y_OFFSET + y; } -/* enable the video display. */ -static int pm_video_on (fi) +/* + * Enable the video display. + */ +static int +pm_video_on (fi) struct fbinfo *fi; { register PCCRegs *pcc = (PCCRegs *)fi -> fi_base; @@ -489,6 +401,3 @@ static int pm_video_off (fi) fi -> fi_blanked = 1; return 0; } - -#endif /* NDC */ -#endif /* NPM */ diff --git a/sys/arch/pmax/dev/pm_ds.c b/sys/arch/pmax/dev/pm_ds.c new file mode 100644 index 00000000000..a1619140ba2 --- /dev/null +++ b/sys/arch/pmax/dev/pm_ds.c @@ -0,0 +1,198 @@ +/* $NetBSD: pm_ds.c,v 1.3 1996/10/23 02:34:23 mhitch Exp $ */ + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + * + * this driver contributed by Jonathan Stone + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include /* XXX */ +#include /* XXX move */ + +#include "fb.h" +#include "pm.h" +#include "dc.h" + +#if 0 +#if NDC == 0 +pm needs dc device +#endif +#endif + + +extern int pminit __P((struct fbinfo *fi, int unit, int cold_console_flag)); +int ds_pm_init __P ((struct fbinfo *fi, int unti, int cold_console_flag)); + +int pm_ds_match __P((struct device *, void *, void *)); +void pm_ds_attach __P((struct device *, struct device *, void *)); + +/* + * Define decstation pm front-end driver for autoconfig + */ +extern struct cfattach pm_ds_ca; +struct cfattach pm_ds_ca = { + sizeof(struct device), pm_ds_match, pm_ds_attach +}; + +/* XXX pmvar.h */ +extern struct fbuacces pmu; + +/* static struct for cold console init */ +struct fbinfo pmfi; /*XXX*/ + +/* + * rcons methods and globals. + */ +extern struct pmax_fbtty pmfb; + +/* + * XXX + * pmax raster-console infrastructure needs to reset the mouse, so + * we need a driver callback. + * pm framebuffers are only found in {dec,vax}station 3100s with dc7085s.. + * we hardcode an entry point. + * XXX + */ +void dcPutc __P((dev_t, int)); /* XXX */ + + +/* + * Intialize pm framebuffer as console while cold + */ +int +ds_pm_init (fi, unit, cold_console_flag) + struct fbinfo *fi; + int unit; + int cold_console_flag; +{ + /* only have one pm, address &c hardcoded in pminit() */ + return (pminit(fi, unit, cold_console_flag)); +} + +int +pm_ds_match(parent, match, aux) + struct device *parent; + void *match; + void *aux; +{ + struct confargs *ca = aux; + caddr_t pmaddr = (caddr_t)ca->ca_addr; + + /* make sure that we're looking for this type of device. */ + if (strcmp(ca->ca_name, "pm") != 0) + return (0); + + if (badaddr(pmaddr, 4)) + return (0); + + return (1); +} + +void +pm_ds_attach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + /*struct confargs *ca = aux;*/ + /*caddr_t pmaddr = (caddr_t)ca->ca_addr;*/ + + if (!pminit(&pmfi, 0, 0)) + return; + + /* no interrupts for PM */ + /*BUS_INTR_ESTABLISH(ca, sccintr, self->dv_unit);*/ + printf("\n"); + return; +} + + +/* + * pmax FB initialization. This is abstracted out from pmattach() so + * that a console framebuffer can be initialized early in boot. + * + * Compute cursor-chip address, raster address, depth, initialize + * statically-allocated "softc", and pass to pmattach(). + */ +int +pminit(fi, unit, cold_console_flag) + struct fbinfo *fi; + int unit; + int cold_console_flag; +{ + /* + * If this device is being initialized as the console, malloc() + * is not yet up and we must use statically-allocated space. + */ + if (fi == NULL) { + fi = &pmfi; /* XXX */ + } + /* cmap_bits set in MI back-end */ + + + /* Set address of frame buffer... */ + fi->fi_unit = unit; + fi->fi_pixels = (caddr_t)MACH_PHYS_TO_UNCACHED(KN01_PHYS_FBUF_START); + fi->fi_base = (caddr_t)MACH_PHYS_TO_UNCACHED(KN01_SYS_PCC); + fi->fi_vdac = (caddr_t)MACH_PHYS_TO_UNCACHED(KN01_SYS_VDAC); + + /* check for no frame buffer */ + if (badaddr((char *)fi->fi_pixels, 4)) + return (0); + + /* Fill in the stuff that differs from monochrome to color. */ + if (*(volatile u_short *)MACH_PHYS_TO_UNCACHED(KN01_SYS_CSR) & + KN01_CSR_MONO) { + fi->fi_type.fb_depth = 1; + } + else { + fi->fi_type.fb_depth = 8; + } + + /* + * Set mmap'able address of qvss-compatible user info structure. + * + * Must be in Uncached space since the fbuaccess structure is + * mapped into the user's address space uncached. + * + * XXX can go away when MI support for d_mmap entrypoints added. + */ + fi->fi_fbu = (struct fbuaccess *) + MACH_PHYS_TO_UNCACHED(MACH_CACHED_TO_PHYS(&pmu)); + + fi->fi_glasstty = &pmfb; + + /* + * set putc/getc entry point + */ + fi->fi_glasstty->KBDPutc = dcPutc; /* XXX */ + fi->fi_glasstty->kbddev = makedev(DCDEV, DCKBD_PORT); + + /* call back-end to initialize hardware and attach to rcons */ + return (pmattach(fi, unit, cold_console_flag)); +} diff --git a/sys/arch/pmax/dev/pmvar.h b/sys/arch/pmax/dev/pmvar.h index c56f1b8c9ac..cf80db9e4e0 100644 --- a/sys/arch/pmax/dev/pmvar.h +++ b/sys/arch/pmax/dev/pmvar.h @@ -3,3 +3,4 @@ * so it can be used as a bitmapped glass-tty console device. */ int pminit __P((struct fbinfo *fi, int unit, int silent)); +int pmattach __P((struct fbinfo *fi, int unit, int silent)); diff --git a/sys/arch/pmax/dev/qvss_compat.c b/sys/arch/pmax/dev/qvss_compat.c index f618efd81f9..85f0b394ee0 100644 --- a/sys/arch/pmax/dev/qvss_compat.c +++ b/sys/arch/pmax/dev/qvss_compat.c @@ -1,4 +1,4 @@ -/* $NetBSD: qvss_compat.c,v 1.4 1996/05/19 01:16:18 jonathan Exp $ */ +/* $NetBSD: qvss_compat.c,v 1.6 1996/10/13 03:39:36 christos Exp $ */ /*- * Copyright (c) 1992, 1993 diff --git a/sys/arch/pmax/dev/rcons.c b/sys/arch/pmax/dev/rcons.c index 6d07990b995..9ac3b6a1330 100644 --- a/sys/arch/pmax/dev/rcons.c +++ b/sys/arch/pmax/dev/rcons.c @@ -1,4 +1,4 @@ -/* $NetBSD: rcons.c,v 1.9 1996/05/19 01:06:14 jonathan Exp $ */ +/* $NetBSD: rcons.c,v 1.14 1996/10/13 13:14:00 jonathan Exp $ */ /* * Copyright (c) 1995 @@ -73,7 +73,6 @@ #include #include -#include #include #include @@ -340,30 +339,32 @@ rconsioctl(dev, cmd, data, flag, p) } /* ARGSUSED */ -int -rconsstop (tp, rw) +int /* was void TTTTT */ +rconsstop(tp, rw) struct tty *tp; int rw; { - return (0); + } /*ARGSUSED*/ void -rconsreset (tp, rw) +rconsreset(tp, rw) struct tty *tp; int rw; { + } -/*ARGSUSED*/ +/* was ttpoll instead of ttselect TTTTT */ + int -rconsselect(dev, which, p) +rconspoll(dev, events, p) dev_t dev; - int which; + int events; struct proc *p; { - return (ttselect(dev, which, p)); + return (ttselect(dev, events, p)); } /*ARGSUSED*/ diff --git a/sys/arch/pmax/dev/rz.c b/sys/arch/pmax/dev/rz.c index d387755c60f..d0ec6e419cc 100644 --- a/sys/arch/pmax/dev/rz.c +++ b/sys/arch/pmax/dev/rz.c @@ -1,4 +1,4 @@ -/* $NetBSD: rz.c,v 1.15.4.1 1996/06/16 17:20:48 mhitch Exp $ */ +/* $NetBSD: rz.c,v 1.20 1996/10/13 03:39:38 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -52,7 +52,6 @@ #include #include #include -#include /* XXX */ #include #include #include @@ -158,7 +157,6 @@ struct rz_softc { #define sc_copenpart sc_dkdev.dk_copenmask /* XXX compat */ #define sc_bshift sc_dkdev.dk_blkshift /* XXX compat */ char sc_xname[8]; /* XXX external name */ - u_int sc_wpms; /* average xfer rate in 16bit wds/sec */ struct rzstats sc_stats; /* statisic counts */ struct buf sc_tab; /* queue of pending operations */ struct buf sc_buf; /* buf for doing I/O */ @@ -217,6 +215,13 @@ static char legal_cmds[256] = { /*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; +/* + * Private forward declarations + */ + +static int rzready __P((register struct rz_softc *sc)); +static void rzlblkstrat __P((register struct buf *bp, register int bsize)); + /* * Test to see if the unit is ready and if not, try to make it ready. * Also, find the drive capacity. @@ -432,9 +437,6 @@ rzprobe(xxxsd) } } - /* XXX Support old-style instrumentation for now. */ - sc->sc_wpms = 32 * (60 * DEV_BSIZE / 2); - /* Attach the disk. */ disk_attach(&sc->sc_dkdev); @@ -663,14 +665,6 @@ rzstart(unit) unit, bp->b_bcount); #endif sc->sc_stats.rztransfers++; - - /* XXX Support old-style instrumentation for now. */ - if ((n = sc->sc_sd->sd_dk) >= 0) { - dk_busy |= 1 << n; - ++dk_seek[n]; - ++dk_xfer[n]; - dk_wds[n] += bp->b_bcount >> 6; - } } @@ -701,10 +695,6 @@ rzdone(unit, error, resid, status) return; } - /* XXX Support old-style instrumentation for now. */ - if (sd->sd_dk >= 0) - dk_busy &= ~(1 << sd->sd_dk); - disk_unbusy(&sc->sc_dkdev, (bp->b_bcount - resid)); if (sc->sc_flags & RZF_SENSEINPROGRESS) { @@ -937,10 +927,6 @@ rzopen(dev, flags, mode, p) } sc->sc_openpart |= mask; - /* XXX Support old-style instrumentation for now. */ - if (sc->sc_sd->sd_dk >= 0) - dk_wpms[sc->sc_sd->sd_dk] = sc->sc_wpms; - return (0); } diff --git a/sys/arch/pmax/dev/scsi.c b/sys/arch/pmax/dev/scsi.c index ceab29a1625..a9f712ead8c 100644 --- a/sys/arch/pmax/dev/scsi.c +++ b/sys/arch/pmax/dev/scsi.c @@ -1,4 +1,4 @@ -/* $NetBSD: scsi.c,v 1.5 1996/04/07 22:53:55 jonathan Exp $ */ +/* $NetBSD: scsi.c,v 1.7 1996/10/13 03:39:39 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -236,4 +236,4 @@ scsiPrintInquiry(inqbuf, i) revl[i+1] = 0; printf(" %s %s rev %s", vid, pid, revl); } -} \ No newline at end of file +} diff --git a/sys/arch/pmax/dev/sfb.c b/sys/arch/pmax/dev/sfb.c index 1e744970f3d..838c0d0e79a 100644 --- a/sys/arch/pmax/dev/sfb.c +++ b/sys/arch/pmax/dev/sfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: sfb.c,v 1.11.4.3 1996/09/09 20:47:40 thorpej Exp $ */ +/* $NetBSD: sfb.c,v 1.18 1996/10/13 13:14:01 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -90,17 +90,19 @@ #include #include #include +#include #include -#include #include #include +#include /* XXX dev/tc ? */ #include #include -#include +#include /* mips cached->uncached */ + #include #include #include diff --git a/sys/arch/pmax/dev/sfbreg.h b/sys/arch/pmax/dev/sfbreg.h index 3e760dab0ca..8942855832c 100644 --- a/sys/arch/pmax/dev/sfbreg.h +++ b/sys/arch/pmax/dev/sfbreg.h @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)sfb.c 8.1 (Berkeley) 6/10/93 - * $Id: sfbreg.h,v 1.2 1996/09/15 21:12:35 deraadt Exp $ + * $Id: sfbreg.h,v 1.3 1996/12/22 15:17:40 graichen Exp $ */ #define SFB_OFFSET_VRAM 0x201000 /* from module's base */ diff --git a/sys/arch/pmax/dev/sfbvar.h b/sys/arch/pmax/dev/sfbvar.h new file mode 100644 index 00000000000..b72a71f62bc --- /dev/null +++ b/sys/arch/pmax/dev/sfbvar.h @@ -0,0 +1,8 @@ +/* $NetBSD: sfbvar.h,v 1.1 1996/09/21 03:06:36 jonathan Exp $ */ + +/* + * Initialize a Turbochannel SFB 2-d framebuffer, + * so it can be used as a bitmapped glass-tty console device. + */ +extern int +scfbinit __P((struct fbinfo *fi, caddr_t base, int unit, int silent)); diff --git a/sys/arch/pmax/dev/sii.c b/sys/arch/pmax/dev/sii.c index f170f614ee6..aadc25d0c94 100644 --- a/sys/arch/pmax/dev/sii.c +++ b/sys/arch/pmax/dev/sii.c @@ -1,4 +1,4 @@ -/* $NetBSD: sii.c,v 1.12.4.2 1996/09/09 20:24:36 thorpej Exp $ */ +/* $NetBSD: sii.c,v 1.20 1996/10/22 23:15:10 mhitch Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -60,74 +60,37 @@ #endif #include -#include + +/* old 4.4bsd/pmax scsi drivers */ #include #include #include +#include -#include - -typedef struct scsi_state { - int statusByte; /* status byte returned during STATUS_PHASE */ - int dmaDataPhase; /* which data phase to expect */ - int dmaCurPhase; /* SCSI phase if DMA is in progress */ - int dmaPrevPhase; /* SCSI phase of DMA suspended by disconnect */ - u_short *dmaAddr[2]; /* DMA buffer memory address */ - int dmaBufIndex; /* which of the above is currently in use */ - int dmalen; /* amount to transfer in this chunk */ - int cmdlen; /* total remaining amount of cmd to transfer */ - u_char *cmd; /* current pointer within scsicmd->cmd */ - int buflen; /* total remaining amount of data to transfer */ - char *buf; /* current pointer within scsicmd->buf */ - u_short flags; /* see below */ - u_short prevComm; /* command reg before disconnect */ - u_short dmaCtrl; /* DMA control register if disconnect */ - u_short dmaAddrL; /* DMA address register if disconnect */ - u_short dmaAddrH; /* DMA address register if disconnect */ - u_short dmaCnt; /* DMA count if disconnect */ - u_short dmaByte; /* DMA byte if disconnect on odd boundary */ - u_short dmaReqAck; /* DMA synchronous xfer offset or 0 if async */ -} State; - -/* state flags */ -#define FIRST_DMA 0x01 /* true if no data DMA started yet */ -#define PARITY_ERR 0x02 /* true if parity error seen */ - -#define SII_NCMD 7 -struct siisoftc { - struct device sc_dev; /* us as a device */ - SIIRegs *sc_regs; /* HW address of SII controller chip */ - int sc_flags; - int sc_target; /* target SCSI ID if connected */ - ScsiCmd *sc_cmd[SII_NCMD]; /* active command indexed by ID */ - State sc_st[SII_NCMD]; /* state info for each active command */ -#ifdef NEW_SCSI - struct scsi_link sc_link; /* scsi lint struct */ -#endif -}; + +/* Machine-indepedent back-end attach entry point */ +void siiattach __P((struct siisoftc *sc)); /* - * Device definition for autoconfiguration. - * + * Autoconfig definition of driver front-end */ -int siimatch __P((struct device * parent, void *cfdata, void *aux)); -void siiattach __P((struct device *parent, struct device *self, void *aux)); -int siiprint(void*, const char*); - -int sii_doprobe __P((void *addr, int unit, int flags, int pri, - struct device *self)); -int siiintr __P((void *sc)); - -extern struct cfdriver sii_cd; +#include +int old_siimatch __P((struct device * parent, void *cfdata, void *aux)); +void old_siiattach __P((struct device *parent, struct device *self, void *aux)); +extern struct cfattach sii_ca; struct cfattach sii_ca = { - sizeof(struct siisoftc), siimatch, siiattach + sizeof(struct siisoftc), old_siimatch, old_siiattach }; +extern struct cfdriver sii_cd; struct cfdriver sii_cd = { NULL, "sii", DV_DULL }; +int siiprint(void*, char*); +int siiintr __P((void *sc)); + #ifdef USE_NEW_SCSI /* Glue to the machine-independent scsi */ struct scsi_adapter asc_switch = { @@ -149,15 +112,6 @@ struct scsi_device sii_dev = { }; #endif -/* - * Definition of the controller for the old auto-configuration program - * and old-style pmax scsi drivers. - */ -void siistart(); -struct pmax_driver siidriver = { - "sii", NULL, siistart, 0, -}; - /* * MACROS for timing out spin loops. @@ -211,10 +165,12 @@ u_char sii_buf[256]; /* used for extended messages */ #define NOWAIT 0 #define WAIT 1 -/* define a safe address in the SCSI buffer for doing status & message DMA */ -#define SII_BUF_ADDR (MACH_PHYS_TO_UNCACHED(KN01_SYS_SII_B_START) \ - + SII_MAX_DMA_XFER_LENGTH * 14) +/* + * Define a safe address in the SCSI buffer for doing status & message DMA + * XXX why not add another field to softc? + */ +#define SII_BUF_ADDR(sc) ((sc)->sc_buf + SII_MAX_DMA_XFER_LENGTH * 14) /* * Other forward references @@ -239,12 +195,20 @@ void CopyToBuffer __P((u_short *src, /* NOTE: must be short aligned */ void CopyFromBuffer __P((volatile u_short *src, char *dst, int length)); +/* + * Definition of the controller for the old-style, non-MI + * pmax scsi drivers, and for autoconfiguring devices via those + * drivers. + */ +struct pmax_driver siidriver = { + "sii", NULL, siistart, 0, +}; /* * Match driver based on name */ int -siimatch(parent, match, aux) +old_siimatch(parent, match, aux) struct device *parent; void *match; void *aux; @@ -267,21 +231,32 @@ siimatch(parent, match, aux) } void -siiattach(parent, self, aux) +old_siiattach(parent, self, aux) struct device *parent; struct device *self; void *aux; { register struct confargs *ca = aux; register struct siisoftc *sc = (struct siisoftc *) self; - register void *siiaddr; - register int i; - - siiaddr = (void*)MACH_PHYS_TO_UNCACHED(ca->ca_addr); - sc->sc_regs = (SIIRegs *)siiaddr; + sc->sc_regs = (SIIRegs *)MACH_PHYS_TO_UNCACHED(ca->ca_addr); sc->sc_flags = sc->sc_dev.dv_cfdata->cf_flags; + + siiattach(sc); + + /* tie pseudo-slot to device */ + BUS_INTR_ESTABLISH(ca, siiintr, sc); + printf("\n"); +} + +void +siiattach(sc) + register struct siisoftc *sc; +{ + register int i; + sc->sc_target = -1; /* no command active */ + /* * Give each target its own DMA buffer region. * Make it big enough for 2 max transfers so we can ping pong buffers @@ -289,8 +264,7 @@ siiattach(parent, self, aux) */ for (i = 0; i < SII_NCMD; i++) { sc->sc_st[i].dmaAddr[0] = (u_short *) - MACH_PHYS_TO_UNCACHED(KN01_SYS_SII_B_START) + - 2 * SII_MAX_DMA_XFER_LENGTH * i; + sc->sc_buf + 2 * SII_MAX_DMA_XFER_LENGTH * i; sc->sc_st[i].dmaAddr[1] = sc->sc_st[i].dmaAddr[0] + SII_MAX_DMA_XFER_LENGTH; } @@ -299,13 +273,13 @@ siiattach(parent, self, aux) (void) pmax_add_scsi(&siidriver, sc->sc_dev.dv_unit); sii_Reset(sc, RESET); - - /*priority = ca->ca_slot;*/ - /* tie pseudo-slot to device */ - BUS_INTR_ESTABLISH(ca, siiintr, sc); - printf("\n"); +#ifdef USE_NEW_SCSI + /* XXX probe SCSI bus and attach slave devices */ +#endif } + + /* * Start activity on a SCSI device. * We maintain information on each device separately since devices can @@ -518,11 +492,11 @@ sii_StartCmd(sc, target) state->dmaCurPhase = SII_MSG_OUT_PHASE, state->dmalen = 6; CopyToBuffer((u_short *)sii_buf, - (volatile u_short *)SII_BUF_ADDR, 6); + (volatile u_short *)SII_BUF_ADDR(sc), 6); regs->slcsr = target; regs->dmctrl = state->dmaReqAck; - regs->dmaddrl = (u_short)(SII_BUF_ADDR >> 1); - regs->dmaddrh = (u_short)(SII_BUF_ADDR >> 17) & 03; + regs->dmaddrl = (u_short)(SII_BUF_ADDR(sc) >> 1); + regs->dmaddrh = (u_short)(SII_BUF_ADDR(sc) >> 17) & 03; regs->dmlotc = 6; regs->comm = SII_DMA | SII_INXFER | SII_SELECT | SII_ATN | SII_CON | SII_MSG_OUT_PHASE; @@ -1748,15 +1722,16 @@ sii_DoSync(regs, state) regs->dstat = SII_DNE; wbflush(); } -#else - CopyToBuffer((u_short *)sii_buf, (volatile u_short *)SII_BUF_ADDR, 5); +#else /* 0 */ + CopyToBuffer((u_short *)sii_buf, + (volatile u_short *)SII_BUF_ADDR(sc), 5); printf("sii_DoSync: %x %x %x ds %x\n", - ((volatile u_short *)SII_BUF_ADDR)[0], - ((volatile u_short *)SII_BUF_ADDR)[2], - ((volatile u_short *)SII_BUF_ADDR)[4], + ((volatile u_short *)SII_BUF_ADDR(sc))[0], + ((volatile u_short *)SII_BUF_ADDR(sc))[2], + ((volatile u_short *)SII_BUF_ADDR(sc))[4], regs->dstat); /* XXX */ - regs->dmaddrl = (u_short)(SII_BUF_ADDR >> 1); - regs->dmaddrh = (u_short)(SII_BUF_ADDR >> 17) & 03; + regs->dmaddrl = (u_short)(SII_BUF_ADDR(sc) >> 1); + regs->dmaddrh = (u_short)(SII_BUF_ADDR(sc) >> 17) & 03; regs->dmlotc = 5; regs->comm = SII_DMA | SII_INXFER | SII_ATN | (regs->cstat & SII_STATE_MSK) | SII_MSG_OUT_PHASE; @@ -1776,7 +1751,7 @@ sii_DoSync(regs, state) /* clear the DNE, other errors handled later */ regs->dstat = SII_DNE; wbflush(); -#endif +#endif /* 0 */ #if 0 SII_WAIT_UNTIL(dstat, regs->dstat, dstat & (SII_CI | SII_DI), diff --git a/sys/arch/pmax/dev/sii_ds.c b/sys/arch/pmax/dev/sii_ds.c new file mode 100644 index 00000000000..5d5789bd3c3 --- /dev/null +++ b/sys/arch/pmax/dev/sii_ds.c @@ -0,0 +1,96 @@ +/* $NetBSD: sii_ds.c,v 1.2 1996/10/13 16:59:15 christos Exp $ */ + +/* + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. + * + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. + * + * this driver contributed by Jonathan Stone + */ + +#include +#include +#include +#include +#include +#include +#include /* XXX old pmax SCSI drivers */ +#include +#include + +#include /* kn01 (ds3100) address constants */ + +extern struct cfdriver mainbus_cd; /* XXX */ + +/* + * Autoconfig definition of driver front-end + */ +int sii_ds_match __P((struct device * parent, void *cfdata, void *aux)); +void sii_ds_attach __P((struct device *parent, struct device *self, void *aux)); + + +extern struct cfattach sii_ds_ca; +struct cfattach sii_ds_ca = { + sizeof(struct siisoftc), sii_ds_match, sii_ds_attach +}; + + +/* define a safe address in the SCSI buffer for doing status & message DMA */ +#define SII_BUF_ADDR (MACH_PHYS_TO_UNCACHED(KN01_SYS_SII_B_START) \ + + SII_MAX_DMA_XFER_LENGTH * 14) + +/* + * Match driver on Decstation (2100, 3100, 5100) based on name and probe. + */ +int +sii_ds_match(parent, match, aux) + struct device *parent; + void *match; + void *aux; +{ + struct confargs *ca = aux; + register void * siiaddr; + + if (strcmp(ca->ca_name, "sii") != 0 && + strncmp(ca->ca_name, "PMAZ-AA ", 8) != 0) /*XXX*/ + return (0); + + /* XXX check for bad address, untested */ + siiaddr = (void *)ca->ca_addr; + if (siiaddr != (void *)MACH_PHYS_TO_UNCACHED(KN01_SYS_SII)) { + printf("(siimatch: bad addr %x, substituting %x\n", + ca->ca_addr, MACH_PHYS_TO_UNCACHED(KN01_SYS_SII)); + siiaddr = (void *)MACH_PHYS_TO_UNCACHED(KN01_SYS_SII); + } + if (badaddr(siiaddr, 4)) + return (0); + return (1); +} + +void +sii_ds_attach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + register struct confargs *ca = aux; + register struct siisoftc *sc = (struct siisoftc *) self; + + sc->sc_regs = (SIIRegs *)MACH_PHYS_TO_UNCACHED(ca->ca_addr); + + /* set up scsi buffer. XXX Why statically allocated? */ + sc->sc_buf = (void*)(MACH_PHYS_TO_UNCACHED(KN01_SYS_SII_B_START)); + +siiattach(sc); + + /* tie pseudo-slot to device */ + BUS_INTR_ESTABLISH(ca, siiintr, sc); + printf("\n"); +} diff --git a/sys/arch/pmax/dev/siivar.h b/sys/arch/pmax/dev/siivar.h new file mode 100644 index 00000000000..b36103ef4ce --- /dev/null +++ b/sys/arch/pmax/dev/siivar.h @@ -0,0 +1,51 @@ +/* $NetBSD: siivar.h,v 1.1 1996/10/13 03:02:41 jonathan Exp $ */ + +#ifndef _SIIVAR_H +#define _SIIVAR_H + +typedef struct scsi_state { + int statusByte; /* status byte returned during STATUS_PHASE */ + int dmaDataPhase; /* which data phase to expect */ + int dmaCurPhase; /* SCSI phase if DMA is in progress */ + int dmaPrevPhase; /* SCSI phase of DMA suspended by disconnect */ + u_short *dmaAddr[2]; /* DMA buffer memory address */ + int dmaBufIndex; /* which of the above is currently in use */ + int dmalen; /* amount to transfer in this chunk */ + int cmdlen; /* total remaining amount of cmd to transfer */ + u_char *cmd; /* current pointer within scsicmd->cmd */ + int buflen; /* total remaining amount of data to transfer */ + char *buf; /* current pointer within scsicmd->buf */ + u_short flags; /* see below */ + u_short prevComm; /* command reg before disconnect */ + u_short dmaCtrl; /* DMA control register if disconnect */ + u_short dmaAddrL; /* DMA address register if disconnect */ + u_short dmaAddrH; /* DMA address register if disconnect */ + u_short dmaCnt; /* DMA count if disconnect */ + u_short dmaByte; /* DMA byte if disconnect on odd boundary */ + u_short dmaReqAck; /* DMA synchronous xfer offset or 0 if async */ +} State; + +/* state flags */ +#define FIRST_DMA 0x01 /* true if no data DMA started yet */ +#define PARITY_ERR 0x02 /* true if parity error seen */ + +#define SII_NCMD 7 +struct siisoftc { + struct device sc_dev; /* us as a device */ + void *sc_buf; /* DMA buffer (may be special mem) */ + SIIRegs *sc_regs; /* HW address of SII controller chip */ + int sc_flags; + int sc_target; /* target SCSI ID if connected */ + ScsiCmd *sc_cmd[SII_NCMD]; /* active command indexed by ID */ + State sc_st[SII_NCMD]; /* state info for each active command */ +#ifdef NEW_SCSI + struct scsi_link sc_link; /* scsi lint struct */ +#endif +}; + +int siiintr __P((void *sc)); + +/* Machine-indepedent back-end attach entry point */ +void siiattach __P((struct siisoftc *sc)); + +#endif /* _SIIVAR_H */ diff --git a/sys/arch/pmax/dev/tz.c b/sys/arch/pmax/dev/tz.c index a8b99d367ea..13bcc3fc275 100644 --- a/sys/arch/pmax/dev/tz.c +++ b/sys/arch/pmax/dev/tz.c @@ -1,4 +1,4 @@ -/* $NetBSD: tz.c,v 1.10 1996/04/10 16:33:44 jonathan Exp $ */ +/* $NetBSD: tz.c,v 1.14 1996/10/13 12:34:20 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -35,7 +35,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * @(#)tz.c 8.4 (Berkeley) 1/11/94 + * @(#)tz.c 8.5 (Berkeley) 6/2/95 * * from: Header: /sprite/src/kernel/dev/RCS/devSCSITape.c, * v 8.14 89/07/31 17:26:13 mendel Exp SPRITE (Berkeley) @@ -130,6 +130,9 @@ tzprobe(xxxsd) register int i; ScsiInquiryData inqbuf; + if (sd->sd_unit >= NTZ) + return (0); + /* init some parameters that don't change */ sc->sc_sd = sd; sc->sc_cmd.sd = sd; diff --git a/sys/arch/pmax/dev/xcfb.c b/sys/arch/pmax/dev/xcfb.c index 8efa14f43b8..d2f9e6103e1 100644 --- a/sys/arch/pmax/dev/xcfb.c +++ b/sys/arch/pmax/dev/xcfb.c @@ -1,4 +1,4 @@ -/* $NetBSD: xcfb.c,v 1.14.4.1 1996/05/30 04:04:01 mhitch Exp $ */ +/* $NetBSD: xcfb.c,v 1.20 1996/10/14 01:39:57 mhitch Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -105,9 +105,9 @@ xcfb needs dtop device #include #include #include -#include -#include +#include /* mips cached->uncached */ +#include #include #include @@ -157,16 +157,6 @@ struct fbdriver xcfb_driver = { /* * Forward references. */ -extern void fbScreenInit __P((struct fbinfo *fi)); - - -void genKbdEvent(), genMouseEvent(), genMouseButtons(); - -extern void dtopKBDPutc(); -extern void (*dtopDivertXInput)(); -extern void (*dtopMouseEvent)(); -extern void (*dtopMouseButtons)(); -extern int pmax_boardtype; extern u_short defCursor[32]; @@ -212,7 +202,7 @@ xcfbattach(parent, self, aux) { struct tc_attach_args *ta = aux; - if (!xcfbinit(NULL, (caddr_t)ta->ta_addr, self->dv_unit, 0)); + if (!xcfbinit(NULL, (caddr_t)ta->ta_addr, self->dv_unit, 0)) return; /* no interrupts for XCFB */ diff --git a/sys/arch/pmax/dev/xcfbvar.h b/sys/arch/pmax/dev/xcfbvar.h index e6261cb2cd6..68ff17d0ff5 100644 --- a/sys/arch/pmax/dev/xcfbvar.h +++ b/sys/arch/pmax/dev/xcfbvar.h @@ -1,3 +1,5 @@ +/* $NetBSD: xcfbvar.h,v 1.2 1996/09/21 03:06:38 jonathan Exp $ */ + /* * Initialize a Personal Decstation baseboard framebuffer, * so it can be used as a bitmapped glass-tty console device. diff --git a/sys/arch/pmax/dist/get b/sys/arch/pmax/dist/get index 18e51e395c3..296957ccdf0 100644 --- a/sys/arch/pmax/dist/get +++ b/sys/arch/pmax/dist/get @@ -1,5 +1,5 @@ #!/bin/sh - -# $NetBSD: get,v 1.6.4.1 1996/08/13 07:55:50 jonathan Exp $ +# $NetBSD: get,v 1.7 1996/10/06 06:46:34 jonathan Exp $ # # Copyright (c) 1992, 1993 # The Regents of the University of California. All rights reserved. diff --git a/sys/arch/pmax/include/aout_machdep.h b/sys/arch/pmax/include/aout_machdep.h new file mode 100644 index 00000000000..7b6986d0c47 --- /dev/null +++ b/sys/arch/pmax/include/aout_machdep.h @@ -0,0 +1,40 @@ +/* $NetBSD: aout_machdep.h,v 1.5 1994/10/26 21:09:39 cgd Exp $ */ + +/*- + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)exec.h 8.1 (Berkeley) 6/10/93 + */ + +#define __LDPGSZ 4096 + +#include diff --git a/sys/arch/pmax/include/autoconf.h b/sys/arch/pmax/include/autoconf.h index 59c3eaa6791..06416ffb952 100644 --- a/sys/arch/pmax/include/autoconf.h +++ b/sys/arch/pmax/include/autoconf.h @@ -1,4 +1,4 @@ -/* $NetBSD: autoconf.h,v 1.6.4.1 1996/05/30 04:07:36 mhitch Exp $ */ +/* $NetBSD: autoconf.h,v 1.7 1996/05/29 06:19:49 mhitch Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. diff --git a/sys/arch/pmax/include/cpu.h b/sys/arch/pmax/include/cpu.h index 4b169358773..5b56410257e 100644 --- a/sys/arch/pmax/include/cpu.h +++ b/sys/arch/pmax/include/cpu.h @@ -190,12 +190,10 @@ union cpuprid { */ #define enablertclock() -#include /* XXX */ - +/* Stuff from the NetBSD mips tree TTTTT */ #define CLKF_USERMODE(framep) CLKF_USERMODE_R3K(framep) #define CLKF_BASEPRI(framep) CLKF_BASEPRI_R3K(framep) - #ifdef _KERNEL union cpuprid cpu_id; union cpuprid fpu_id; @@ -203,5 +201,6 @@ u_int machDataCacheSize; u_int machInstCacheSize; extern struct intr_tab intr_tab[]; #endif +/* End of stuff from the NetBSD mips tree TTTTT */ #endif /* _CPU_H_ */ diff --git a/sys/arch/pmax/include/ecoff.h b/sys/arch/pmax/include/ecoff.h index ceee6c6a420..8838d6462a9 100644 --- a/sys/arch/pmax/include/ecoff.h +++ b/sys/arch/pmax/include/ecoff.h @@ -1,4 +1,5 @@ -/* $NetBSD: ecoff.h,v 1.5 1996/05/09 23:46:18 cgd Exp $ */ +/* $OpenBSD: ecoff.h,v 1.4 1996/12/22 15:18:10 graichen Exp $ */ +/* $NetBSD: ecoff.h,v 1.4 1995/06/16 02:07:33 mellon Exp $ */ /* * Copyright (c) 1994 Adam Glass @@ -36,11 +37,58 @@ #define ECOFF_PAD #define ECOFF_MACHDEP \ - u_long gprmask; \ - u_long cprmask[4]; \ - u_long gp_value + u_long ea_gprmask; \ + u_long ea_cprmask[4]; \ + u_long ea_gp_value #define ECOFF_MAGIC_MIPSEL 0x0162 -#define ECOFF_BADMAG(ep) ((ep)->f.f_magic != ECOFF_MAGIC_MIPSEL) +#define ECOFF_BADMAG(ex) ((ex)->f.f_magic != ECOFF_MAGIC_MIPSEL) #define ECOFF_SEGMENT_ALIGNMENT(ep) ((ep)->a.vstamp < 23 ? 8 : 16) + +struct ecoff_symhdr { + int16_t sh_magic; + int16_t sh_vstamp; + int32_t sh_linemax; + int32_t sh_densenummax; + int32_t sh_procmax; + int32_t sh_lsymmax; + int32_t sh_optsymmax; + int32_t sh_auxxymmax; + int32_t sh_lstrmax; + int32_t sh_estrmax; + int32_t sh_fdmax; + int32_t sh_rfdmax; + int32_t sh_esymmax; + long sh_linesize; + long sh_lineoff; + long sh_densenumoff; + long sh_procoff; + long sh_lsymoff; + long sh_optsymoff; + long sh_auxsymoff; + long sh_lstroff; + long sh_estroff; + long sh_fdoff; + long sh_rfdoff; + long sh_esymoff; +}; +/* Some day they will make up their minds.... */ +#define esymMax sh_esymmax +#define cbExtOffset sh_esymoff +#define cbSsExtOffset sh_estroff + +struct ecoff_extsym { + long es_value; + int es_strindex; + unsigned es_type:6; + unsigned es_class:5; + unsigned :1; + unsigned es_symauxindex:20; + unsigned es_jmptbl:1; + unsigned es_cmain:1; + unsigned es_weakext:1; + unsigned :29; + int es_indexfld; +}; + diff --git a/sys/arch/pmax/include/ecoff_machdep.h b/sys/arch/pmax/include/ecoff_machdep.h new file mode 100644 index 00000000000..72dba194502 --- /dev/null +++ b/sys/arch/pmax/include/ecoff_machdep.h @@ -0,0 +1,46 @@ +/* $NetBSD: ecoff_machdep.h,v 1.5 1996/05/09 23:46:18 cgd Exp $ */ + +/* + * Copyright (c) 1994 Adam Glass + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Adam Glass. + * 4. The name of the Author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY Adam Glass ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL Adam Glass BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#define ECOFF_LDPGSZ 4096 + +#define ECOFF_PAD + +#define ECOFF_MACHDEP \ + u_long gprmask; \ + u_long cprmask[4]; \ + u_long gp_value + +#define ECOFF_MAGIC_MIPSEL 0x0162 +#define ECOFF_BADMAG(ep) ((ep)->f.f_magic != ECOFF_MAGIC_MIPSEL) + +#define ECOFF_SEGMENT_ALIGNMENT(ep) ((ep)->a.vstamp < 23 ? 8 : 16) diff --git a/sys/arch/pmax/include/elf.h b/sys/arch/pmax/include/elf.h index b14ddc36640..9ea386dc85e 100644 --- a/sys/arch/pmax/include/elf.h +++ b/sys/arch/pmax/include/elf.h @@ -1,4 +1,4 @@ -/* $NetBSD: elf.h,v 1.3.4.1 1996/06/26 06:39:09 jtc Exp $ */ +/* $NetBSD: elf.h,v 1.4 1996/06/26 04:41:41 jonathan Exp $ */ /* * Copyright (c) 1994 Ted Lemon diff --git a/sys/arch/pmax/include/elf_machdep.h b/sys/arch/pmax/include/elf_machdep.h new file mode 100644 index 00000000000..d93b48b6c93 --- /dev/null +++ b/sys/arch/pmax/include/elf_machdep.h @@ -0,0 +1,8 @@ +/* $NetBSD: elf_machdep.h,v 1.1 1996/09/26 21:50:59 cgd Exp $ */ + +#define ELF32_MACHDEP_ID_CASES \ + case Elf_em_mips: \ + break; + +#define ELF64_MACHDEP_ID_CASES \ + /* no 64-bit ELF machine types supported */ diff --git a/sys/arch/pmax/include/endian.h b/sys/arch/pmax/include/endian.h index 81ca584b676..968b1d5c446 100644 --- a/sys/arch/pmax/include/endian.h +++ b/sys/arch/pmax/include/endian.h @@ -1,5 +1,4 @@ -/* $OpenBSD: endian.h,v 1.4 1996/11/25 13:11:34 niklas Exp $ */ -/* $NetBSD: endian.h,v 1.5.4.1 1996/06/05 23:53:20 jonathan Exp $ */ +/* $NetBSD: endian.h,v 1.8 1996/10/13 20:59:02 mhitch Exp $ */ /* * Copyright (c) 1987, 1991, 1993 @@ -57,18 +56,21 @@ */ #define LITTLE_ENDIAN 1234 /* LSB first: i386, vax */ #define BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */ -#define PDP_ENDIAN 3412 /* LSB first in word, MSW first in int32_t */ +#define PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */ #define BYTE_ORDER LITTLE_ENDIAN #include #include +typedef u_int32_t in_addr_t; +typedef u_int16_t in_port_t; + __BEGIN_DECLS -u_int32_t htonl __P((u_int32_t)); -u_int16_t htons __P((u_int16_t)); -u_int32_t ntohl __P((u_int32_t)); -u_int16_t ntohs __P((u_int16_t)); +in_addr_t htonl __P((in_addr_t)); +in_port_t htons __P((in_port_t)); +in_addr_t ntohl __P((in_addr_t)); +in_port_t ntohs __P((in_port_t)); __END_DECLS /* @@ -87,10 +89,10 @@ __END_DECLS #else -#define NTOHL(x) (x) = ntohl((u_int32_t)x) -#define NTOHS(x) (x) = ntohs((u_int16_t)x) -#define HTONL(x) (x) = htonl((u_int32_t)x) -#define HTONS(x) (x) = htons((u_int16_t)x) +#define NTOHL(x) (x) = ntohl((in_addr_t)x) +#define NTOHS(x) (x) = ntohs((in_port_t)x) +#define HTONL(x) (x) = htonl((in_addr_t)x) +#define HTONS(x) (x) = htons((in_port_t)x) #endif #endif /* ! _POSIX_SOURCE */ #endif /* !_ENDIAN_H_ */ diff --git a/sys/arch/pmax/include/exec.h b/sys/arch/pmax/include/exec.h index 5325a407c92..8a460086e6f 100644 --- a/sys/arch/pmax/include/exec.h +++ b/sys/arch/pmax/include/exec.h @@ -1,4 +1,4 @@ -/* $OpenBSD: exec.h,v 1.4 1996/09/29 11:36:27 deraadt Exp $ */ +/* $OpenBSD: exec.h,v 1.5 1996/12/22 15:18:13 graichen Exp $ */ /* $NetBSD: exec.h,v 1.5 1994/10/26 21:09:39 cgd Exp $ */ /*- diff --git a/sys/arch/pmax/include/limits.h b/sys/arch/pmax/include/limits.h index f1d28a3701c..01047a06e1b 100644 --- a/sys/arch/pmax/include/limits.h +++ b/sys/arch/pmax/include/limits.h @@ -94,6 +94,9 @@ #define FLT_MAX 3.40282347E+38F #define FLT_MIN 1.17549435E-38F #endif + +/* Stuff from the NetBSD mips tree TTTTT */ #ifdef _KERNEL -#define CLK_TCK 60 /* ticks per second */ +#define CLK_TCK 60 /* ticks per second */ #endif +/* End of stuff from the NetBSD mips tree TTTTT */ diff --git a/sys/arch/pmax/include/locore.h b/sys/arch/pmax/include/locore.h index dda4f72c628..e3235bfff7d 100644 --- a/sys/arch/pmax/include/locore.h +++ b/sys/arch/pmax/include/locore.h @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.2 1996/05/20 23:38:26 jonathan Exp $ */ +/* $NetBSD: locore.h,v 1.3 1996/10/13 21:37:35 jonathan Exp $ */ /* * Copyright 1996 The Board of Trustees of The Leland Stanford @@ -58,32 +58,33 @@ extern int switch_exit __P((void)); /* XXX never really returns? */ * only to print them by name in stack tracebacks */ -extern void mips_r2000_KernIntr __P(()); +extern void mips1_KernIntr __P((void)); -extern void mips_r2000_ConfigCache __P((void)); -extern void mips_r2000_FlushCache __P((void)); -extern void mips_r2000_FlushDCache __P((vm_offset_t addr, vm_offset_t len)); -extern void mips_r2000_FlushICache __P((vm_offset_t addr, vm_offset_t len)); -extern void mips_r2000_ForceCacheUpdate __P((void)); -extern void mips_r2000_SetPID __P((int pid)); -extern void mips_r2000_TLBFlush __P((void)); -extern void mips_r2000_TLBFlushAddr __P( /* XXX Really pte highpart ? */ +extern void mips1_ConfigCache __P((void)); +extern void mips1_FlushCache __P((void)); +extern void mips1_FlushDCache __P((vm_offset_t addr, vm_offset_t len)); +extern void mips1_FlushICache __P((vm_offset_t addr, vm_offset_t len)); +extern void mips1_ForceCacheUpdate __P((void)); +extern void mips1_SetPID __P((int pid)); +extern void mips1_TLBFlush __P((void)); +extern void mips1_TLBFlushAddr __P( /* XXX Really pte highpart ? */ (vm_offset_t addr)); -extern void mips_r2000_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int)); -extern void mips_r2000_TLBWriteIndexed __P((u_int index, u_int high, +extern void mips1_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int)); +extern void mips1_TLBWriteIndexed __P((u_int index, u_int high, u_int low)); -extern void mips_r4000_ConfigCache __P((void)); -extern void mips_r4000_FlushCache __P((void)); -extern void mips_r4000_FlushDCache __P((vm_offset_t addr, vm_offset_t len)); -extern void mips_r4000_FlushICache __P((vm_offset_t addr, vm_offset_t len)); -extern void mips_r4000_ForceCacheUpdate __P((void)); -extern void mips_r4000_SetPID __P((int pid)); -extern void mips_r4000_TLBFlush __P((void)); -extern void mips_r4000_TLBFlushAddr __P( /* XXX Really pte highpart ? */ +extern void mips3_KernIntr __P((void)); +extern void mips3_ConfigCache __P((void)); +extern void mips3_FlushCache __P((void)); +extern void mips3_FlushDCache __P((vm_offset_t addr, vm_offset_t len)); +extern void mips3_FlushICache __P((vm_offset_t addr, vm_offset_t len)); +extern void mips3_ForceCacheUpdate __P((void)); +extern void mips3_SetPID __P((int pid)); +extern void mips3_TLBFlush __P((void)); +extern void mips3_TLBFlushAddr __P( /* XXX Really pte highpart ? */ (vm_offset_t addr)); -extern void mips_r4000_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int)); -extern void mips_r4000_TLBWriteIndexed __P((u_int index, u_int high, +extern void mips3_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int)); +extern void mips3_TLBWriteIndexed __P((u_int index, u_int high, u_int low)); /* diff --git a/sys/arch/pmax/include/machConst.h b/sys/arch/pmax/include/machConst.h index eda5e7897af..19234930fdd 100644 --- a/sys/arch/pmax/include/machConst.h +++ b/sys/arch/pmax/include/machConst.h @@ -1,584 +1,4 @@ -/* $NetBSD: machConst.h,v 1.5 1996/03/28 11:34:05 jonathan Exp $ */ +/* $NetBSD: machConst.h,v 1.6 1996/09/30 07:58:20 jonathan Exp $ */ -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)machConst.h 8.1 (Berkeley) 6/10/93 - * - * machConst.h -- - * - * Machine dependent constants. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machConst.h, - * v 9.2 89/10/21 15:55:22 jhh Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAddrs.h, - * v 1.2 89/08/15 18:28:21 rab Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/vm/ds3100.md/RCS/vmPmaxConst.h, - * v 9.1 89/09/18 17:33:00 shirriff Exp SPRITE (DECWRL) - */ -#ifndef _MACHCONST -#define _MACHCONST - -#define MACH_KUSEG_ADDR 0x0 -#define MACH_CACHED_MEMORY_ADDR 0x80000000 -#define MACH_UNCACHED_MEMORY_ADDR 0xa0000000 -#define MACH_KSEG2_ADDR 0xc0000000 -#define MACH_MAX_MEM_ADDR 0xbe000000 -#define MACH_RESERVED_ADDR 0xbfc80000 - -#define MACH_CACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff) -#define MACH_PHYS_TO_CACHED(x) ((unsigned)(x) | MACH_CACHED_MEMORY_ADDR) -#define MACH_UNCACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff) -#define MACH_PHYS_TO_UNCACHED(x) ((unsigned)(x) | MACH_UNCACHED_MEMORY_ADDR) - -/* Map virtual address to index in r4k virtually-indexed cache */ -#define MIPS_R4K_VA_TO_CINDEX(x) \ - ((unsigned)(x) & 0xffffff | MACH_CACHED_MEMORY_ADDR) - -/* XXX compatibility with Pica port */ -#define MACH_VA_TO_CINDEX(x) MIPS_R4K_VA_TO_CINDEX(x) - - -/* - * XXX - * Port-specific constants: - * Kernel virtual address at which kernel is loaded, and - * Kernel virtual address for user page table entries - * (i.e., the address for the context register). - */ -#ifdef pmax -#define MACH_CODE_START 0x80030000 -#define VMMACH_PTE_BASE 0xFFC00000 -#endif /* pmax */ - -#ifdef pica -#define MACH_CODE_START 0x80080000 -#define VMMACH_PTE_BASE 0xFF800000 -#endif /* pica */ - - - -/* - * The bits in the cause register. - * - * Bits common to r3000 and r4000: - * - * MACH_CR_BR_DELAY Exception happened in branch delay slot. - * MACH_CR_COP_ERR Coprocessor error. - * MACH_CR_IP Interrupt pending bits defined below. - * (same meaning as in CAUSE register). - * MACH_CR_EXC_CODE The exception type (see exception codes below). - * - * Differences: - * r3k has 4 bits of execption type, r4k has 5 bits. - */ -#define MACH_CR_BR_DELAY 0x80000000 -#define MACH_CR_COP_ERR 0x30000000 -#define MIPS_3K_CR_EXC_CODE 0x0000003C -#define MIPS_4K_CR_EXC_CODE 0x0000007C -#define MACH_CR_IP 0x0000FF00 -#define MACH_CR_EXC_CODE_SHIFT 2 - -#ifdef pmax /* XXX not used any more, only to satisfy regression tests */ -#define MACH_CR_EXC_CODE MIPS_3K_CR_EXC_CODE -#endif /* pmax */ -#ifdef pica -#define MACH_CR_EXC_CODE MIPS_4K_CR_EXC_CODE -#endif /* pica */ - - -/* - * The bits in the status register. All bits are active when set to 1. - * - * R3000 status register fields: - * MACH_SR_CO_USABILITY Control the usability of the four coprocessors. - * MACH_SR_BOOT_EXC_VEC Use alternate exception vectors. - * MACH_SR_TLB_SHUTDOWN TLB disabled. - * - * MIPS_SR_INT_IE Master (current) interrupt enable bit. - * - * Differences: - * r3k has cache control is via frobbing SR register bits, whereas the - * r4k cache control is via explicit instructions. - * r3k has a 3-entry stack of kernel/user bits, whereas the - * r4k has kernel/supervisor/user. - */ -#define MACH_SR_COP_USABILITY 0xf0000000 -#define MACH_SR_COP_0_BIT 0x10000000 -#define MACH_SR_COP_1_BIT 0x20000000 - - /* r4k and r3k differences, see below */ - -#define MACH_SR_BOOT_EXC_VEC 0x00400000 -#define MACH_SR_TLB_SHUTDOWN 0x00200000 - - /* r4k and r3k differences, see below */ - -#define MIPS_SR_INT_IE 0x00000001 -/*#define MACH_SR_MBZ 0x0f8000c0*/ /* Never used, true for r3k */ -/*#define MACH_SR_INT_MASK 0x0000ff00*/ - -#define MACH_SR_INT_ENAB MIPS_SR_INT_IE /* backwards compatibility */ -#define MACH_SR_INT_ENA_CUR MIPS_SR_INT_IE /* backwards compatibility */ - - - -/* - * The R2000/R3000-specific status register bit definitions. - * all bits are active when set to 1. - * - * MACH_SR_PARITY_ERR Parity error. - * MACH_SR_CACHE_MISS Most recent D-cache load resulted in a miss. - * MACH_SR_PARITY_ZERO Zero replaces outgoing parity bits. - * MACH_SR_SWAP_CACHES Swap I-cache and D-cache. - * MACH_SR_ISOL_CACHES Isolate D-cache from main memory. - * Interrupt enable bits defined below. - * MACH_SR_KU_OLD Old kernel/user mode bit. 1 => user mode. - * MACH_SR_INT_ENA_OLD Old interrupt enable bit. - * MACH_SR_KU_PREV Previous kernel/user mode bit. 1 => user mode. - * MACH_SR_INT_ENA_PREV Previous interrupt enable bit. - * MACH_SR_KU_CUR Current kernel/user mode bit. 1 => user mode. - */ - -#define MIPS_3K_PARITY_ERR 0x00100000 -#define MIPS_3K_CACHE_MISS 0x00080000 -#define MIPS_3K_PARITY_ZERO 0x00040000 -#define MIPS_3K_SWAP_CACHES 0x00020000 -#define MIPS_3K_ISOL_CACHES 0x00010000 - -#define MIPS_3K_SR_KU_OLD 0x00000020 /* 2nd stacked KU/IE*/ -#define MIPS_3K_SR_INT_ENA_OLD 0x00000010 /* 2nd stacked KU/IE*/ -#define MIPS_3K_SR_KU_PREV 0x00000008 /* 1st stacked KU/IE*/ -#define MIPS_3K_SR_INT_ENA_PREV 0x00000004 /* 1st stacked KU/IE*/ -#define MIPS_3K_SR_KU_CUR 0x00000002 /* current KU */ - -/* backwards compatibility */ -#define MACH_SR_PARITY_ERR MIPS_3K_PARITY_ERR -#define MACH_SR_CACHE_MISS MIPS_3K_CACHE_MISS -#define MACH_SR_PARITY_ZERO MIPS_3K_PARITY_ZERO -#define MACH_SR_SWAP_CACHES MIPS_3K_SWAP_CACHES -#define MACH_SR_ISOL_CACHES MIPS_3K_ISOL_CACHES - -#define MACH_SR_KU_OLD MIPS_3K_SR_KU_OLD -#define MACH_SR_INT_ENA_OLD MIPS_3K_SR_INT_ENA_OLD -#define MACH_SR_KU_PREV MIPS_3K_SR_KU_PREV -#define MACH_SR_KU_CUR MIPS_3K_SR_KU_CUR -#define MACH_SR_INT_ENA_PREV MIPS_3K_SR_INT_ENA_PREV - - -/* - * R4000 status register bit definitons, - * where different from r2000/r3000. - */ -#define MIPS_4K_SR_RP 0x08000000 -#define MIPS_4K_SR_FR_32 0x04000000 -#define MIPS_4K_SR_RE 0x02000000 - -#define MIPS_4K_SR_SOFT_RESET 0x00100000 -#define MIPS_4K_SR_DIAG_CH 0x00040000 -#define MIPS_4K_SR_DIAG_CE 0x00020000 -#define MIPS_4K_SR_DIAG_PE 0x00010000 -#define MIPS_4K_SR_KX 0x00000080 -#define MIPS_4K_SR_SX 0x00000040 -#define MIPS_4K_SR_UX 0x00000020 -#define MIPS_4K_SR_KSU_MASK 0x00000018 -#define MIPS_4K_SR_KSU_USER 0x00000010 -#define MIPS_4K_SR_KSU_SUPER 0x00000008 -#define MIPS_4K_SR_KSU_KERNEL 0x00000000 -#define MIPS_4K_SR_ERL 0x00000004 -#define MIPS_4K_SR_EXL 0x00000002 - -/* backwards compatibility with names used in Pica port */ -#define MACH_SR_RP MIPS_4K_SR_RP -#define MACH_SR_FR_32 MIPS_4K_SR_FR_32 -#define MACH_SR_RE MIPS_4K_SR_RE - -#define MACH_SR_SOFT_RESET MIPS_4K_SR_SOFT_RESET -#define MACH_SR_DIAG_CH MIPS_4K_SR_DIAG_CH -#define MACH_SR_DIAG_CE MIPS_4K_SR_DIAG_CE -#define MACH_SR_DIAG_PE MIPS_4K_SR_DIAG_PE -#define MACH_SR_KX MIPS_4K_SR_KX -#define MACH_SR_SX MIPS_4K_SR_SX -#define MACH_SR_UX MIPS_4K_SR_UX - -#define MACH_SR_KSU_MASK MIPS_4K_SR_KSU_MASK -#define MACH_SR_KSU_USER MIPS_4K_SR_KSU_USER -#define MACH_SR_KSU_SUPER MIPS_4K_SR_KSU_SUPER -#define MACH_SR_KSU_KERNEL MIPS_4K_SR_KSU_KERNEL -#define MACH_SR_ERL MIPS_4K_SR_ERL -#define MACH_SR_EXL MIPS_4K_SR_EXL - - -/* - * The interrupt masks. - * If a bit in the mask is 1 then the interrupt is enabled (or pending). - */ -#define MIPS_INT_MASK 0xff00 -#define MACH_INT_MASK_5 0x8000 -#define MACH_INT_MASK_4 0x4000 -#define MACH_INT_MASK_3 0x2000 -#define MACH_INT_MASK_2 0x1000 -#define MACH_INT_MASK_1 0x0800 -#define MACH_INT_MASK_0 0x0400 -#define MIPS_HARD_INT_MASK 0xfc00 -#define MACH_SOFT_INT_MASK_1 0x0200 -#define MACH_SOFT_INT_MASK_0 0x0100 - -#ifdef pmax -#define MACH_INT_MASK MIPS_INT_MASK -#define MACH_HARD_INT_MASK MIPS_HARD_INT_MASK -#endif - -/* r4000 has on-chip timer at INT_MASK_5 */ -#ifdef pica -#define MACH_INT_MASK (MIPS_INT_MASK & ~MACH_INT_MASK_5) -#define MACH_HARD_INT_MASK (MIPS_HARD_INT_MASK & ~MACH_INT_MASK_5) -#endif - - - -/* - * The bits in the context register. - */ -#define MIPS_3K_CNTXT_PTE_BASE 0xFFE00000 -#define MIPS_3K_CNTXT_BAD_VPN 0x001FFFFC - -#define MIPS_4K_CNTXT_PTE_BASE 0xFF800000 -#define MIPS_4K_CNTXT_BAD_VPN2 0x007FFFF0 - -/* - * Backwards compatbility -- XXX more thought - */ -#ifdef pmax -#define MACH_CNTXT_PTE_BASE MIPS_3K_CNTXT_PTE_BASE -#define MACH_CNTXT_BAD_VPN MIPS_3K_CNTXT_BAD_VPN -#endif /* pmax */ - -#ifdef pica -#define MACH_CNTXT_PTE_BASE MIPS_4K_CNTXT_PTE_BASE -#define MACH_CNTXT_BAD_VPN2 MIPS_4K_CNTXT_BAD_VPN2 -#endif /* pica */ - - - -/* - * Location of exception vectors. - * - * Common vectors: reset and UTLB miss. - */ -#define MACH_RESET_EXC_VEC 0xBFC00000 -#define MACH_UTLB_MISS_EXC_VEC 0x80000000 - -/* - * R3000 general exception vector (everything else) - */ -#define MIPS_3K_GEN_EXC_VEC 0x80000080 - -/* - * R4000 MIPS-III exception vectors - */ -#define MIPS_4K_XTLB_MISS_EXC_VEC 0x80000080 -#define MIPS_4K_CACHE_ERR_EXC_VEC 0x80000100 -#define MIPS_4K_GEN_EXC_VEC 0x80000180 - -/* - * Backwards compatbility -- XXX more thought - */ -#ifdef pmax -#define MACH_GEN_EXC_VEC MIPS_3K_GEN_EXC_VEC -#endif /* pmax */ - -#ifdef pica -#define MACH_GEN_EXC_VEC MIPS_4K_GEN_EXC_VEC -#define MACH_TLB_MISS_EXC_VEC MACH_UTLB_MISS_EXC_VEC /* locore compat */ -#define MACH_XTLB_MISS_EXC_VEC MIPS_4K_XTLB_MISS_EXC_VEC -#define MACH_CACHE_ERR_EXC_VEC MIPS_4K_CACHE_ERR_EXC_VEC -#endif /* pica */ - - - -/* - * Coprocessor 0 registers: - * - * MACH_COP_0_TLB_INDEX TLB index. - * MACH_COP_0_TLB_RANDOM TLB random. - * MACH_COP_0_TLB_LOW r3k TLB entry low. - * MACH_COP_0_TLB_LO0 r4k TLB entry low. - * MACH_COP_0_TLB_LO1 r4k TLB entry low, extended. - * MACH_COP_0_TLB_CONTEXT TLB context. - * MACH_COP_0_BAD_VADDR Bad virtual address. - * MACH_COP_0_TLB_HI TLB entry high. - * MACH_COP_0_STATUS_REG Status register. - * MACH_COP_0_CAUSE_REG Exception cause register. - * MACH_COP_0_EXC_PC Exception PC. - * MACH_COP_0_PRID Processor revision identifier. - */ -#define MACH_COP_0_TLB_INDEX $0 -#define MACH_COP_0_TLB_RANDOM $1 - /* Name and meaning of TLB bits for $2 differ on r3k and r4k. */ - -#define MACH_COP_0_TLB_CONTEXT $4 - /* $5 and $6 new with MIPS-III */ -#define MACH_COP_0_BAD_VADDR $8 -#define MACH_COP_0_TLB_HI $10 -#define MACH_COP_0_STATUS_REG $12 -#define MACH_COP_0_CAUSE_REG $13 -#define MACH_COP_0_EXC_PC $14 -#define MACH_COP_0_PRID $15 - - -/* r3k-specific */ -#define MACH_COP_0_TLB_LOW $2 - -/* MIPS-III additions */ -#define MACH_COP_0_TLB_LO0 $2 -#define MACH_COP_0_TLB_LO1 $3 - -#define MACH_COP_0_TLB_PG_MASK $5 -#define MACH_COP_0_TLB_WIRED $6 - -#define MACH_COP_0_CONFIG $16 -#define MACH_COP_0_LLADDR $17 -#define MACH_COP_0_WATCH_LO $18 -#define MACH_COP_0_WATCH_HI $19 -#define MACH_COP_0_TLB_XCONTEXT $20 -#define MACH_COP_0_ECC $26 -#define MACH_COP_0_CACHE_ERR $27 -#define MACH_COP_0_TAG_LO $28 -#define MACH_COP_0_TAG_HI $29 -#define MACH_COP_0_ERROR_PC $30 - - - -/* - * Values for the code field in a break instruction. - */ -#define MACH_BREAK_INSTR 0x0000000d -#define MACH_BREAK_VAL_MASK 0x03ff0000 -#define MACH_BREAK_VAL_SHIFT 16 -#define MACH_BREAK_KDB_VAL 512 -#define MACH_BREAK_SSTEP_VAL 513 -#define MACH_BREAK_BRKPT_VAL 514 -#define MACH_BREAK_SOVER_VAL 515 -#define MACH_BREAK_KDB (MACH_BREAK_INSTR | \ - (MACH_BREAK_KDB_VAL << MACH_BREAK_VAL_SHIFT)) -#define MACH_BREAK_SSTEP (MACH_BREAK_INSTR | \ - (MACH_BREAK_SSTEP_VAL << MACH_BREAK_VAL_SHIFT)) -#define MACH_BREAK_BRKPT (MACH_BREAK_INSTR | \ - (MACH_BREAK_BRKPT_VAL << MACH_BREAK_VAL_SHIFT)) -#define MACH_BREAK_SOVER (MACH_BREAK_INSTR | \ - (MACH_BREAK_SOVER_VAL << MACH_BREAK_VAL_SHIFT)) - -/* - * Mininum and maximum cache sizes. - */ -#define MACH_MIN_CACHE_SIZE (16 * 1024) -#define MACH_MAX_CACHE_SIZE (256 * 1024) - -/* - * The floating point version and status registers. - */ -#define MACH_FPC_ID $0 -#define MACH_FPC_CSR $31 - -/* - * The floating point coprocessor status register bits. - */ -#define MACH_FPC_ROUNDING_BITS 0x00000003 -#define MACH_FPC_ROUND_RN 0x00000000 -#define MACH_FPC_ROUND_RZ 0x00000001 -#define MACH_FPC_ROUND_RP 0x00000002 -#define MACH_FPC_ROUND_RM 0x00000003 -#define MACH_FPC_STICKY_BITS 0x0000007c -#define MACH_FPC_STICKY_INEXACT 0x00000004 -#define MACH_FPC_STICKY_UNDERFLOW 0x00000008 -#define MACH_FPC_STICKY_OVERFLOW 0x00000010 -#define MACH_FPC_STICKY_DIV0 0x00000020 -#define MACH_FPC_STICKY_INVALID 0x00000040 -#define MACH_FPC_ENABLE_BITS 0x00000f80 -#define MACH_FPC_ENABLE_INEXACT 0x00000080 -#define MACH_FPC_ENABLE_UNDERFLOW 0x00000100 -#define MACH_FPC_ENABLE_OVERFLOW 0x00000200 -#define MACH_FPC_ENABLE_DIV0 0x00000400 -#define MACH_FPC_ENABLE_INVALID 0x00000800 -#define MACH_FPC_EXCEPTION_BITS 0x0003f000 -#define MACH_FPC_EXCEPTION_INEXACT 0x00001000 -#define MACH_FPC_EXCEPTION_UNDERFLOW 0x00002000 -#define MACH_FPC_EXCEPTION_OVERFLOW 0x00004000 -#define MACH_FPC_EXCEPTION_DIV0 0x00008000 -#define MACH_FPC_EXCEPTION_INVALID 0x00010000 -#define MACH_FPC_EXCEPTION_UNIMPL 0x00020000 -#define MACH_FPC_COND_BIT 0x00800000 -#define MACH_FPC_FLUSH_BIT 0x01000000 /* r4k, MBZ on r3k */ -#define MIPS_3K_FPC_MBZ_BITS 0xff7c0000 -#define MIPS_4K_FPC_MBZ_BITS 0xfe7c0000 - - -/* - * Constants to determine if have a floating point instruction. - */ -#define MACH_OPCODE_SHIFT 26 -#define MACH_OPCODE_C1 0x11 - - - -/* - * The low part of the TLB entry. - */ -#define VMMACH_MIPS_3K_TLB_PHYS_PAGE_SHIFT 12 -#define VMMACH_MIPS_3K_TLB_PF_NUM 0xfffff000 -#define VMMACH_MIPS_3K_TLB_NON_CACHEABLE_BIT 0x00000800 -#define VMMACH_MIPS_3K_TLB_MOD_BIT 0x00000400 -#define VMMACH_MIPS_3K_TLB_VALID_BIT 0x00000200 -#define VMMACH_MIPS_3K_TLB_GLOBAL_BIT 0x00000100 - -#define VMMACH_MIPS_4K_TLB_PHYS_PAGE_SHIFT 6 -#define VMMACH_MIPS_4K_TLB_PF_NUM 0x3fffffc0 -#define VMMACH_MIPS_4K_TLB_ATTR_MASK 0x00000038 -#define VMMACH_MIPS_4K_TLB_MOD_BIT 0x00000004 -#define VMMACH_MIPS_4K_TLB_VALID_BIT 0x00000002 -#define VMMACH_MIPS_4K_TLB_GLOBAL_BIT 0x00000001 - - -#ifdef pmax /* XXX */ -#define VMMACH_TLB_PHYS_PAGE_SHIFT VMMACH_MIPS_3K_TLB_PHYS_PAGE_SHIFT -#define VMMACH_TLB_PF_NUM VMMACH_MIPS_3K_TLB_PF_NUM -#define VMMACH_TLB_NON_CACHEABLE_BIT VMMACH_MIPS_3K_TLB_NON_CACHEABLE_BIT -#define VMMACH_TLB_MOD_BIT VMMACH_MIPS_3K_TLB_MOD_BIT -#define VMMACH_TLB_VALID_BIT VMMACH_MIPS_3K_TLB_VALID_BIT -#define VMMACH_TLB_GLOBAL_BIT VMMACH_MIPS_3K_TLB_GLOBAL_BIT -#endif /* pmax */ - -#ifdef pica /* XXX */ -#define VMMACH_TLB_PHYS_PAGE_SHIFT VMMACH_MIPS_4K_TLB_PHYS_PAGE_SHIFT -#define VMMACH_TLB_PF_NUM VMMACH_MIPS_4K_TLB_PF_NUM -#define VMMACH_TLB_ATTR_MASK VMMACH_MIPS_4K_TLB_ATTR_MASK -#define VMMACH_TLB_MOD_BIT VMMACH_MIPS_4K_TLB_MOD_BIT -#define VMMACH_TLB_VALID_BIT VMMACH_MIPS_4K_TLB_VALID_BIT -#define VMMACH_TLB_GLOBAL_BIT VMMACH_MIPS_4K_TLB_GLOBAL_BIT -#endif /* pica */ - - - -/* - * The high part of the TLB entry. - */ -#define VMMACH_TLB_VIRT_PAGE_SHIFT 12 - -#define VMMACH_TLB_MIPS_3K_VIRT_PAGE_NUM 0xfffff000 -#define VMMACH_TLB_MIPS_3K_PID 0x00000fc0 -#define VMMACH_TLB_MIPS_3K_PID_SHIFT 6 - -#define VMMACH_TLB_MIPS_4K_VIRT_PAGE_NUM 0xffffe000 -#define VMMACH_TLB_MIPS_4K_PID 0x000000ff -#define VMMACH_TLB_MIPS_4K_PID_SHIFT 0 - -/* XXX needs more thought */ -/* - * backwards XXX needs more thought, should support runtime decisions. - */ - -#ifdef pmax -#define VMMACH_TLB_VIRT_PAGE_NUM VMMACH_TLB_MIPS_3K_VIRT_PAGE_NUM -#define VMMACH_TLB_PID VMMACH_TLB_MIPS_3K_PID -#define VMMACH_TLB_PID_SHIFT VMMACH_TLB_MIPS_3K_PID_SHIFT -#endif - -#ifdef pica -#define VMMACH_TLB_VIRT_PAGE_NUM VMMACH_TLB_MIPS_4K_VIRT_PAGE_NUM -#define VMMACH_TLB_PID VMMACH_TLB_MIPS_4K_PID -#define VMMACH_TLB_PID_SHIFT VMMACH_TLB_MIPS_4K_PID_SHIFT -#endif - -/* - * r3000: shift count to put the index in the right spot. - * (zero on r4000?) - */ -#define VMMACH_TLB_INDEX_SHIFT 8 - - -/* - * The number of TLB entries and the first one that write random hits. - */ -#define VMMACH_MIPS_3K_NUM_TLB_ENTRIES 64 -#define VMMACH_MIPS_3K_FIRST_RAND_ENTRY 8 - -#define VMMACH_MIPS_4K_NUM_TLB_ENTRIES 48 -#define VMMACH_MIPS_4K_WIRED_ENTRIES 8 - -/* compatibility with existing locore -- XXX more thought */ -#ifdef pmax -#define VMMACH_NUM_TLB_ENTRIES VMMACH_MIPS_3K_NUM_TLB_ENTRIES -#define VMMACH_FIRST_RAND_ENTRY VMMACH_MIPS_3K_FIRST_RAND_ENTRY -#endif /* pmax */ - -#ifdef pica -#define VMMACH_NUM_TLB_ENTRIES VMMACH_MIPS_4K_NUM_TLB_ENTRIES -#define VMMACH_WIRED_ENTRIES VMMACH_MIPS_4K_WIRED_ENTRIES -#endif /* pica */ - - -/* - * The number of process id entries. - */ -#define VMMACH_MIPS_3K_NUM_PIDS 64 -#define VMMACH_MIPS_4K_NUM_PIDS 256 - -#ifdef pmax -#define VMMACH_NUM_PIDS VMMACH_MIPS_3K_NUM_PIDS -#endif /* pmax */ -#ifdef pica -#define VMMACH_NUM_PIDS VMMACH_MIPS_4K_NUM_PIDS -#endif /* pica */ - - -/* - * TLB probe return codes. - */ -#define VMMACH_TLB_NOT_FOUND 0 -#define VMMACH_TLB_FOUND 1 -#define VMMACH_TLB_FOUND_WITH_PATCH 2 -#define VMMACH_TLB_PROBE_ERROR 3 - -#endif /* _MACHCONST */ +#include diff --git a/sys/arch/pmax/include/mips1_pte.h b/sys/arch/pmax/include/mips1_pte.h new file mode 100644 index 00000000000..220d93fa9f9 --- /dev/null +++ b/sys/arch/pmax/include/mips1_pte.h @@ -0,0 +1,97 @@ +/* $NetBSD: mips1_pte.h,v 1.8 1996/10/13 09:54:43 jonathan Exp $ */ + +/* + * Copyright (c) 1988 University of Utah. + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * the Systems Programming Group of the University of Utah Computer + * Science Department and Ralph Campbell. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: Utah Hdr: pte.h 1.11 89/09/03 + * + * @(#)pte.h 8.1 (Berkeley) 6/10/93 + */ + +/* + * R2000 hardware page table entry + */ + +#ifndef _LOCORE +struct pte { +#if BYTE_ORDER == BIG_ENDIAN +unsigned int pg_pfnum:20, /* HW: core page frame number or 0 */ + pg_n:1, /* HW: non-cacheable bit */ + pg_m:1, /* HW: modified (dirty) bit */ + pg_v:1, /* HW: valid bit */ + pg_g:1, /* HW: ignore pid bit */ + :4, + pg_swapm:1, /* SW: page must be forced to swap */ + pg_fod:1, /* SW: is fill on demand (=0) */ + pg_prot:2; /* SW: access control */ +#endif +#if BYTE_ORDER == LITTLE_ENDIAN +unsigned int pg_prot:2, /* SW: access control */ + pg_fod:1, /* SW: is fill on demand (=0) */ + pg_swapm:1, /* SW: page must be forced to swap */ + :4, + pg_g:1, /* HW: ignore pid bit */ + pg_v:1, /* HW: valid bit */ + pg_m:1, /* HW: modified (dirty) bit */ + pg_n:1, /* HW: non-cacheable bit */ + pg_pfnum:20; /* HW: core page frame number or 0 */ +#endif +}; + +typedef union pt_entry { + unsigned int pt_entry; /* for copying, etc. */ + struct pte pt_pte; /* for getting to bits by name */ +} pt_entry_t; /* Mach page table entry */ +#endif /* _LOCORE */ + +#define PT_ENTRY_NULL ((pt_entry_t *) 0) + +#define PG_PROT 0x00000003 +#define PG_RW 0x00000000 +#define PG_RO 0x00000001 +#define PG_WIRED 0x00000002 +#define PG_G 0x00000100 +#define PG_V 0x00000200 +#define PG_NV 0x00000000 +#define PG_M 0x00000400 +#define PG_N 0x00000800 +#define PG_FRAME 0xfffff000 +#define PG_SHIFT 12 +#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) + +#define PTE_TO_PADDR(pte) ((unsigned)(pte) & PG_FRAME) +#define PAGE_IS_RDONLY(pte,va) ((pte) & PG_RO) diff --git a/sys/arch/pmax/include/mips3_pte.h b/sys/arch/pmax/include/mips3_pte.h new file mode 100644 index 00000000000..fc798eb93b4 --- /dev/null +++ b/sys/arch/pmax/include/mips3_pte.h @@ -0,0 +1,132 @@ +/* $NetBSD: mips3_pte.h,v 1.5 1996/10/13 09:54:44 jonathan Exp $ */ + +/* + * Copyright (c) 1988 University of Utah. + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * the Systems Programming Group of the University of Utah Computer + * Science Department and Ralph Campbell. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: Utah Hdr: pte.h 1.11 89/09/03 + * + * from: @(#)pte.h 8.1 (Berkeley) 6/10/93 + */ + +/* + * R4000 hardware page table entry + */ + +#ifndef _LOCORE +struct pte { +#if BYTE_ORDER == BIG_ENDIAN +unsigned int pg_prot:2, /* SW: access control */ + pg_pfnum:24, /* HW: core page frame number or 0 */ + pg_attr:3, /* HW: cache attribute */ + pg_m:1, /* HW: modified (dirty) bit */ + pg_v:1, /* HW: valid bit */ + pg_g:1; /* HW: ignore pid bit */ +#endif +#if BYTE_ORDER == LITTLE_ENDIAN +unsigned int pg_g:1, /* HW: ignore pid bit */ + pg_v:1, /* HW: valid bit */ + pg_m:1, /* HW: modified (dirty) bit */ + pg_attr:3, /* HW: cache attribute */ + pg_pfnum:24, /* HW: core page frame number or 0 */ + pg_prot:2; /* SW: access control */ +#endif +}; + +/* + * Structure defining an tlb entry data set. + */ + +struct tlb { + int tlb_mask; + int tlb_hi; + int tlb_lo0; + int tlb_lo1; +}; + +typedef union pt_entry { + unsigned int pt_entry; /* for copying, etc. */ + struct pte pt_pte; /* for getting to bits by name */ +} pt_entry_t; /* Mach page table entry */ +#endif /* _LOCORE */ + +#define PT_ENTRY_NULL ((pt_entry_t *) 0) + +#define PG_WIRED 0x80000000 /* SW */ +#define PG_RO 0x40000000 /* SW */ + +#define PG_SVPN 0xfffff000 /* Software page no mask */ +#define PG_HVPN 0xffffe000 /* Hardware page no mask */ +#define PG_ODDPG 0x00001000 /* Odd even pte entry */ +#define PG_ASID 0x000000ff /* Address space ID */ +#define PG_G 0x00000001 /* HW */ +#define PG_V 0x00000002 +#define PG_NV 0x00000000 +#define PG_M 0x00000004 +#define PG_ATTR 0x0000003f +#define PG_UNCACHED 0x00000010 +#define PG_CACHED 0x00000018 +#define PG_CACHEMODE 0x00000038 +#define PG_ROPAGE (PG_V | PG_RO | PG_CACHED) /* Write protected */ +#define PG_RWPAGE (PG_V | PG_M | PG_CACHED) /* Not wr-prot not clean */ +#define PG_CWPAGE (PG_V | PG_CACHED) /* Not wr-prot but clean */ +#define PG_IOPAGE (PG_G | PG_V | PG_M | PG_UNCACHED) +#define PG_FRAME 0x3fffffc0 +#define PG_SHIFT 6 + +/* pte accessor macros */ + +#define vad_to_pfn(x) (((unsigned)(x) >> PG_SHIFT) & PG_FRAME) +#define pfn_to_vad(x) (((x) & PG_FRAME) << PG_SHIFT) +#define vad_to_vpn(x) ((unsigned)(x) & PG_SVPN) +#define vpn_to_vad(x) ((x) & PG_SVPN) + +#define PTE_TO_PADDR(pte) (pfn_to_vad(pte)) +#define PAGE_IS_RDONLY(pte,va) \ + (pmap_is_page_ro(pmap_kernel(), mips_trunc_page(va), (pte))) + + +/* User virtual to pte page entry */ +#define uvtopte(adr) (((adr) >> PGSHIFT) & (NPTEPG -1)) + +#define PG_SIZE_4K 0x00000000 +#define PG_SIZE_16K 0x00006000 +#define PG_SIZE_64K 0x0001e000 +#define PG_SIZE_256K 0x0007e000 +#define PG_SIZE_1M 0x001fe000 +#define PG_SIZE_4M 0x007fe000 +#define PG_SIZE_16M 0x01ffe000 + diff --git a/sys/arch/pmax/include/param.h b/sys/arch/pmax/include/param.h index e677902b4b2..33eb0c3dc82 100644 --- a/sys/arch/pmax/include/param.h +++ b/sys/arch/pmax/include/param.h @@ -88,8 +88,8 @@ * of the hardware page size. */ #define MSIZE 128 /* size of an mbuf */ -#define MCLSHIFT 11 -#define MCLBYTES (1 << MCLSHIFT) /* enough for whole Ethernet packet */ +#define MCLBYTES 2048 /* enough for whole Ethernet packet */ +#define MCLSHIFT 10 #define MCLOFSET (MCLBYTES - 1) #ifndef NMBCLUSTERS #ifdef GATEWAY diff --git a/sys/arch/pmax/include/pmap.h b/sys/arch/pmax/include/pmap.h index 4c5b9ca5b7e..fb948a7ed87 100644 --- a/sys/arch/pmax/include/pmap.h +++ b/sys/arch/pmax/include/pmap.h @@ -102,6 +102,9 @@ struct pmap kernel_pmap_store; #define pmap_kernel() (&kernel_pmap_store) #endif /* _KERNEL */ -#endif /* _PMAP_MACHINE_ */ +/* Stuff from the NetBSD mips tree TTTTT */ #define pmax_trunc_seg(a) mips_trunc_seg(a) #define pmax_round_seg(a) mips_round_seg(a) +/* End of stuff from the NetBSD mips tree TTTTT */ + +#endif /* _PMAP_MACHINE_ */ diff --git a/sys/arch/pmax/include/pte.h b/sys/arch/pmax/include/pte.h index 599f0265a8c..70dd4be56bf 100644 --- a/sys/arch/pmax/include/pte.h +++ b/sys/arch/pmax/include/pte.h @@ -1,97 +1,34 @@ -/* $NetBSD: pte.h,v 1.6 1996/02/01 22:32:15 mycroft Exp $ */ +/* $NetBSD: pte.h,v 1.1 1996/10/13 09:28:56 jonathan Exp $ */ /* - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. + * Copyright 1996 The Board of Trustees of The Leland Stanford + * Junior University. All Rights Reserved. * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: pte.h 1.11 89/09/03 - * - * @(#)pte.h 8.1 (Berkeley) 6/10/93 + * Permission to use, copy, modify, and distribute this + * software and its documentation for any purpose and without + * fee is hereby granted, provided that the above copyright + * notice appear in all copies. Stanford University + * makes no representations about the suitability of this + * software for any purpose. It is provided "as is" without + * express or implied warranty. */ -/* - * R2000 hardware page table entry - */ +#ifndef __MIPS_PTE_H__ +#define __MIPS_PTE_H__ -#ifndef _LOCORE -struct pte { -#if BYTE_ORDER == BIG_ENDIAN -unsigned int pg_pfnum:20, /* HW: core page frame number or 0 */ - pg_n:1, /* HW: non-cacheable bit */ - pg_m:1, /* HW: modified (dirty) bit */ - pg_v:1, /* HW: valid bit */ - pg_g:1, /* HW: ignore pid bit */ - :4, - pg_swapm:1, /* SW: page must be forced to swap */ - pg_fod:1, /* SW: is fill on demand (=0) */ - pg_prot:2; /* SW: access control */ -#endif -#if BYTE_ORDER == LITTLE_ENDIAN -unsigned int pg_prot:2, /* SW: access control */ - pg_fod:1, /* SW: is fill on demand (=0) */ - pg_swapm:1, /* SW: page must be forced to swap */ - :4, - pg_g:1, /* HW: ignore pid bit */ - pg_v:1, /* HW: valid bit */ - pg_m:1, /* HW: modified (dirty) bit */ - pg_n:1, /* HW: non-cacheable bit */ - pg_pfnum:20; /* HW: core page frame number or 0 */ + +#if defined(MIPS1) && defined(MIPS3) +#error Cannot yet upport both "MIPS1" (r2000 family) and "MIP3" (r4000 family) in the same kernel. #endif -}; -typedef union pt_entry { - unsigned int pt_entry; /* for copying, etc. */ - struct pte pt_pte; /* for getting to bits by name */ -} pt_entry_t; /* Mach page table entry */ -#endif /* _LOCORE */ +#ifdef MIPS1 +#include +#endif -#define PT_ENTRY_NULL ((pt_entry_t *) 0) +#ifdef MIPS3 +#include +#endif -#define PG_PROT 0x00000003 -#define PG_RW 0x00000000 -#define PG_RO 0x00000001 -#define PG_WIRED 0x00000002 -#define PG_G 0x00000100 -#define PG_V 0x00000200 -#define PG_NV 0x00000000 -#define PG_M 0x00000400 -#define PG_N 0x00000800 -#define PG_FRAME 0xfffff000 -#define PG_SHIFT 12 -#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) #if defined(_KERNEL) && !defined(_LOCORE) /* @@ -104,4 +41,6 @@ typedef union pt_entry { extern pt_entry_t *Sysmap; /* kernel pte table */ extern u_int Sysmapsize; /* number of pte's in Sysmap */ -#endif +#endif /* defined(_KERNEL) && !defined(_LOCORE) */ + +#endif /* __MIPS_PTE_H__ */ diff --git a/sys/arch/pmax/include/reloc.h b/sys/arch/pmax/include/reloc.h index 1a91b52c46b..5a3eaaa5e49 100644 --- a/sys/arch/pmax/include/reloc.h +++ b/sys/arch/pmax/include/reloc.h @@ -1,4 +1,4 @@ -/* $NetBSD: reloc.h,v 1.5 1996/03/19 22:18:45 jonathan Exp $ */ +/* $NetBSD: reloc.h,v 1.6 1996/10/07 03:15:03 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -37,6 +37,8 @@ * from: Header: reloc.h,v 1.6 92/06/20 09:59:37 torek Exp */ +#ifndef __MIPS_RELOC_H__ +#define __MIPS_RELOC_H__ /* * MIPS relocation types. */ @@ -71,5 +73,8 @@ struct reloc_info_mips { long r_addend; /* value to add to symbol value */ }; -#define relocation_info reloc_info_mips +/* For the pmax we only use the next line TTTTT */ +/* #define relocation_info reloc_info_mips */ + #define relocation_info_pmax reloc_info_mips +#endif /* __MIPS_RELOC_H__ */ diff --git a/sys/arch/pmax/include/tc_machdep.h b/sys/arch/pmax/include/tc_machdep.h index 1d41e5d8e03..a8770f29341 100644 --- a/sys/arch/pmax/include/tc_machdep.h +++ b/sys/arch/pmax/include/tc_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: tc_machdep.h,v 1.3.4.1 1996/05/30 04:07:39 mhitch Exp $ */ +/* $NetBSD: tc_machdep.h,v 1.5 1996/10/06 06:29:51 jonathan Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -105,7 +105,7 @@ int tc_checkslot __P((tc_addr_t slotbase, char *namep)); extern int tc_findconsole __P((int preferred_slot)); extern void config_tcbus __P((struct device *parent, int cputype, - int printfn __P((void*, char*)) )); + int printfn __P((void*, const char*)) )); #endif /* __MACHINE_TC_MACHDEP_H__*/ diff --git a/sys/arch/pmax/include/vmparam.h b/sys/arch/pmax/include/vmparam.h index 6215614fcf1..1e7cc3c2dd3 100644 --- a/sys/arch/pmax/include/vmparam.h +++ b/sys/arch/pmax/include/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.5 1994/10/26 21:10:10 cgd Exp $ */ +/* $NetBSD: vmparam.h,v 1.6 1996/10/16 06:10:41 jonathan Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -68,13 +68,13 @@ #define DFLDSIZ (32*1024*1024) /* initial data size limit */ #endif #ifndef MAXDSIZ -#define MAXDSIZ (32*1024*1024) /* max data size */ +#define MAXDSIZ (256*1024*1024) /* max data size */ #endif #ifndef DFLSSIZ #define DFLSSIZ (1024*1024) /* initial stack size limit */ #endif #ifndef MAXSSIZ -#define MAXSSIZ MAXDSIZ /* max stack size */ +#define MAXSSIZ (32*1024*1024) /* max stack size */ #endif /* diff --git a/sys/arch/pmax/pmax/autoconf.c b/sys/arch/pmax/pmax/autoconf.c index 6842e5b2b60..d0e7c884dc9 100644 --- a/sys/arch/pmax/pmax/autoconf.c +++ b/sys/arch/pmax/pmax/autoconf.c @@ -1,4 +1,4 @@ -/* $NetBSD: autoconf.c,v 1.16 1996/04/10 17:38:18 jonathan Exp $ */ +/* $NetBSD: autoconf.c,v 1.18 1996/10/13 03:39:44 christos Exp $ */ /* * Copyright (c) 1988 University of Utah. diff --git a/sys/arch/pmax/pmax/clock.c b/sys/arch/pmax/pmax/clock.c index 029543a611b..783e688b65d 100644 --- a/sys/arch/pmax/pmax/clock.c +++ b/sys/arch/pmax/pmax/clock.c @@ -1,4 +1,4 @@ -/* $NetBSD: clock.c,v 1.12.4.1 1996/05/30 04:10:34 mhitch Exp $ */ +/* $NetBSD: clock.c,v 1.15 1996/10/13 03:39:45 christos Exp $ */ /* * Copyright (c) 1988 University of Utah. diff --git a/sys/arch/pmax/pmax/conf-glue.c b/sys/arch/pmax/pmax/conf-glue.c index 684c45b0846..f512bc3e38e 100644 --- a/sys/arch/pmax/pmax/conf-glue.c +++ b/sys/arch/pmax/pmax/conf-glue.c @@ -1,3 +1,5 @@ +/* $NetBSD: conf-glue.c,v 1.12 1996/10/13 03:39:47 christos Exp $ */ + /* * conf-glue.c: * A hand-edited ioconf.c, as generated by config.old program @@ -70,23 +72,34 @@ struct pmax_scsi_device scsi_dinit[] = { /*driver, cdriver, unit, ctlr, drive, slave, dk, flags*/ #if NSII > 0 +# if NRZ > 0 { &rzdriver, &siidriver, 0, 0, 0, 0, 1, 0x0 }, { &rzdriver, &siidriver, 1, 0, 1, 0, 1, 0x0 }, { &rzdriver, &siidriver, 2, 0, 2, 0, 1, 0x0 }, { &rzdriver, &siidriver, 3, 0, 3, 0, 1, 0x0 }, { &rzdriver, &siidriver, 4, 0, 4, 0, 1, 0x0 }, +# endif /* NTZ */ + +# if NTZ > 0 { &tzdriver, &siidriver, 0, 0, 5, 0, 0, 0x0 }, { &tzdriver, &siidriver, 1, 0, 6, 0, 0, 0x0 }, +# endif /* NTZ */ #endif /* NSII */ + #if NASC > 0 +# if NRZ > 0 { &rzdriver, &ascdriver, 0, 0, 0, 0, 1, 0x0 }, { &rzdriver, &ascdriver, 1, 0, 1, 0, 1, 0x0 }, { &rzdriver, &ascdriver, 2, 0, 2, 0, 1, 0x0 }, { &rzdriver, &ascdriver, 3, 0, 3, 0, 1, 0x0 }, { &rzdriver, &ascdriver, 4, 0, 4, 0, 1, 0x0 }, +# endif /* NRZ */ + +# if NTZ > 0 { &tzdriver, &ascdriver, 0, 0, 5, 0, 0, 0x0 }, { &tzdriver, &ascdriver, 1, 0, 6, 0, 0, 0x0 }, +# endif /* NTZ */ #endif /* NASC */ { 0 } @@ -167,11 +180,7 @@ configure_scsi() if (!(*drp->d_init)(dp)) continue; dp->sd_alive = 1; - /* if device is a disk, assign number for statistics */ - if (dp->sd_dk && dkn < DK_NDRIVE) - dp->sd_dk = dkn++; - else - dp->sd_dk = -1; + } } } diff --git a/sys/arch/pmax/pmax/conf.c b/sys/arch/pmax/pmax/conf.c index 2cff17a2b40..ce8b048d180 100644 --- a/sys/arch/pmax/pmax/conf.c +++ b/sys/arch/pmax/pmax/conf.c @@ -1,4 +1,4 @@ -/* $NetBSD: conf.c,v 1.21.4.1 1996/08/13 07:58:43 jonathan Exp $ */ +/* $NetBSD: conf.c,v 1.23 1996/09/07 12:40:38 mycroft Exp $ */ /* * Copyright (c) 1992, 1993 @@ -46,19 +46,19 @@ #include #include -int ttselect __P((dev_t, int, struct proc *)); - #include "vnd.h" +bdev_decl(vnd); bdev_decl(sw); #include "rz.h" bdev_decl(rz); #include "tz.h" bdev_decl(tz); #include "sd.h" +bdev_decl(sd); #include "st.h" -#include "ss.h" -#include "uk.h" +bdev_decl(st); #include "ccd.h" +bdev_decl(ccd); struct bdevsw bdevsw[] = { @@ -87,14 +87,6 @@ struct bdevsw bdevsw[] = bdev_disk_init(NRZ,rz), /* 22: ?? old SCSI disk */ /*XXX*/ bdev_notdef(), /* 23: mscp */ bdev_disk_init(NCCD,ccd), /* 24: concatenated disk driver */ - - bdev_lkm_dummy(), /* 25 */ - bdev_lkm_dummy(), /* 26 */ - bdev_lkm_dummy(), /* 27 */ - bdev_lkm_dummy(), /* 28 */ - bdev_lkm_dummy(), /* 29 */ - bdev_lkm_dummy(), /* 30 */ - }; int nblkdev = sizeof(bdevsw) / sizeof(bdevsw[0]); @@ -109,14 +101,29 @@ int nblkdev = sizeof(bdevsw) / sizeof(bdevsw[0]); dev_t swapdev = makedev(4, 0); +cdev_decl(cn); cdev_decl(sw); +cdev_decl(random); +cdev_decl(ctty); #define mmread mmrw #define mmwrite mmrw dev_type_read(mmrw); cdev_decl(mm); #include "pty.h" +#define ptstty ptytty +#define ptsioctl ptyioctl +cdev_decl(pts); +#define ptctty ptytty +#define ptcioctl ptyioctl +cdev_decl(ptc); +cdev_decl(log); cdev_decl(fd); +cdev_decl(sd); +cdev_decl(st); +cdev_decl(vnd); +cdev_decl(ccd); #include "bpfilter.h" +cdev_decl(bpf); #include "dtop.h" cdev_decl(dtop); #include "dc.h" @@ -139,8 +146,12 @@ cdev_decl(xcfb); cdev_decl(mfb); dev_decl(filedesc,open); + /* a framebuffer with an attached mouse: */ -/* open, close, ioctl, select, mmap */ +/* open, close, ioctl, poll, mmap */ + +/* dev_init(c,n,select) in cdev_fbm_init(c,n) should be dev_init(c,n,poll) */ +/* see also dev/fb_userreq.c TTTTT */ #define cdev_fbm_init(c,n) { \ dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) enodev, \ @@ -151,7 +162,7 @@ dev_decl(filedesc,open); struct cdevsw cdevsw[] = { - cdev_cn_init(1,cn), /* 0: virtual console */ /* (dz?) */ + cdev_cn_init(1,cn), /* 0: virtual console */ cdev_swap_init(1,sw), /* 1: /dev/drum (swap pseudo-device) */ cdev_ctty_init(1,ctty), /* 2: controlling terminal */ cdev_mm_init(1,mm), /* 3: /dev/{null,mem,kmem,...} */ @@ -241,19 +252,7 @@ struct cdevsw cdevsw[] = cdev_tty_init(NRASTERCONSOLE,rcons), /* 85: rcons pseudo-dev */ cdev_fbm_init(NFB,fb), /* 86: frame buffer pseudo-device */ cdev_disk_init(NCCD,ccd), /* 87: concatenated disk driver */ - - cdev_lkm_dummy(), /* 88 */ - cdev_lkm_dummy(), /* 89 */ - cdev_lkm_init(NLKM,lkm), /* 90: loadable module driver */ - cdev_lkm_dummy(), /* 91 */ - cdev_lkm_dummy(), /* 92 */ - cdev_lkm_dummy(), /* 93 */ - cdev_lkm_dummy(), /* 94 */ - cdev_lkm_dummy(), /* 95 */ - cdev_lkm_dummy(), /* 96 */ - cdev_random_init(1,random), /* 97 */ - cdev_uk_init(NUK,uk), /* 98: unknown SCSI */ - cdev_ss_init(NSS,ss), /* 99: SCSI scanner */ + cdev_random_init(1,random), /* 88: random data source */ }; int nchrdev = sizeof(cdevsw) / sizeof(cdevsw[0]); @@ -398,3 +397,21 @@ chrtoblk(dev) return (NODEV); return (makedev(blkmaj, minor(dev))); } + +/* + * Convert a character device number to a block device number. + */ +dev_t +blktochr(dev) + dev_t dev; +{ + int blkmaj = major(dev); + int i; + + if (blkmaj >= nblkdev) + return (NODEV); + for (i = 0; i < sizeof(chrtoblktbl)/sizeof(chrtoblktbl[0]); i++) + if (blkmaj == chrtoblktbl[i]) + return (makedev(i, minor(dev))); + return (NODEV); +} diff --git a/sys/arch/pmax/pmax/cons.c b/sys/arch/pmax/pmax/cons.c index 8445d7715aa..5de8e786963 100644 --- a/sys/arch/pmax/pmax/cons.c +++ b/sys/arch/pmax/pmax/cons.c @@ -1,4 +1,4 @@ -/* $NetBSD: cons.c,v 1.8 1995/04/10 07:14:33 mycroft Exp $ */ +/* $NetBSD: cons.c,v 1.9 1996/09/02 06:44:06 mycroft Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -120,7 +120,7 @@ cnwrite(dev, uio, flag) return ((*cdevsw[major(dev)].d_write)(dev, uio, flag)); } -int +void cnstop(tp, flag) struct tty *tp; int flag; diff --git a/sys/arch/pmax/pmax/cpu.c b/sys/arch/pmax/pmax/cpu.c index 7d1ea548b56..3036250b923 100644 --- a/sys/arch/pmax/pmax/cpu.c +++ b/sys/arch/pmax/pmax/cpu.c @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.c,v 1.5.4.1 1996/06/16 17:28:21 mhitch Exp $ */ +/* $NetBSD: cpu.c,v 1.8 1996/10/13 03:39:48 christos Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -83,7 +83,7 @@ cpuattach(parent, dev, aux) static int cpuprint(aux, pnp) void *aux; - const char *pnp; + char *pnp; { register struct confargs *ca = aux; diff --git a/sys/arch/pmax/pmax/cpu_cons.c b/sys/arch/pmax/pmax/cpu_cons.c index dfbfbe4c379..18839089813 100644 --- a/sys/arch/pmax/pmax/cpu_cons.c +++ b/sys/arch/pmax/pmax/cpu_cons.c @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_cons.c,v 1.10.4.1 1996/05/30 04:10:36 mhitch Exp $ */ +/* $NetBSD: cpu_cons.c,v 1.14 1996/10/13 03:39:48 christos Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -88,7 +88,9 @@ #if NDC > 0 #include -#include +#include +#include +#include #endif #if NDTOP > 0 @@ -199,7 +201,9 @@ consinit() } } } - /* we can't do anything until auto-configuration + + /* + * We can't do anything until auto-configuration * has run, and that requires kmalloc(), which * hasn't been initialized yet. Just keep using * whatever the PROM vector gave us. @@ -306,15 +310,38 @@ remcons: /* * Configure a serial port as a remote console. */ + switch (pmax_boardtype) { + case DS_PMAX: +#if NDC > 0 + if (kbd == 4) + cd.cn_dev = makedev(DCDEV, DCCOMM_PORT); + else + cd.cn_dev = makedev(DCDEV, DCPRINTER_PORT); + dc_ds_consinit(cd.cn_dev); + return; +#endif /* NDC */ + break; + + case DS_3MAX: +#if NDC > 0 + cd.cn_dev = makedev(DCDEV, DCPRINTER_PORT); + dc_ioasic_consinit(cd.cn_dev); + return; +#endif /* NDC */ + break; - /* XXX serial drivers need to be rewritten to handle - * init this early. Defer switching to non-PROM - * driver until later. + } + + /* + * XXX + * scc serial drivers need to be rewritten to handle init this early. + * Defer switching to non-PROM driver until after serial device + * is configured normally. */ pending_remcons = 1; printf("Using PROM serial output until serial drivers initialized\n"); - /* We never cahnged output; go back to using PROM input */ + /* We never changed output; go back to using PROM input */ cd.cn_dev = makedev (0, 0); cd.cn_getc = /*(int (*)(dev_t)) */ romgetc; } @@ -322,6 +349,9 @@ remcons: /* * Configure a serial port as a remote console. + * Called by configure() to switch from PROM I/O when the serial + * device-driver cannot be set up as a serial console until + * autoconfiguration is done. (i.e., only needed for scc serial driver.) */ void xconsinit() @@ -331,27 +361,6 @@ xconsinit() pending_remcons = 0; switch (pmax_boardtype) { - case DS_PMAX: -#if NDC > 0 - if (kbd == 4) - cd.cn_dev = makedev(DCDEV, DCCOMM_PORT); - else - cd.cn_dev = makedev(DCDEV, DCPRINTER_PORT); - cd.cn_getc = dcGetc; - cd.cn_putc = dcPutc; - cd.cn_pri = CN_REMOTE; -#endif /* NDC */ - break; - - case DS_3MAX: -#if NDC > 0 - cd.cn_dev = makedev(DCDEV, DCPRINTER_PORT); - cd.cn_getc = dcGetc; - cd.cn_putc = dcPutc; - cd.cn_pri = CN_REMOTE; -#endif /* NDC */ - break; - case DS_3MIN: case DS_3MAXPLUS: #if NSCC > 0 diff --git a/sys/arch/pmax/pmax/disksubr.c b/sys/arch/pmax/pmax/disksubr.c index 9ef17242e61..cf3836bfaa2 100644 --- a/sys/arch/pmax/pmax/disksubr.c +++ b/sys/arch/pmax/pmax/disksubr.c @@ -1,4 +1,4 @@ -/* $NetBSD: disksubr.c,v 1.10 1996/05/19 18:49:33 jonathan Exp $ */ +/* $NetBSD: disksubr.c,v 1.13 1996/10/13 03:39:49 christos Exp $ */ /* * Copyright (c) 1982, 1986, 1988 Regents of the University of California. @@ -69,7 +69,7 @@ char* readdisklabel __P((dev_t dev, void (*strat) __P((struct buf *bp)), char * readdisklabel(dev, strat, lp, osdep) dev_t dev; - void (*strat)(); + void (*strat) __P((struct buf *bp)); register struct disklabel *lp; struct cpu_disklabel *osdep; { @@ -121,7 +121,7 @@ readdisklabel(dev, strat, lp, osdep) char * compat_label(dev, strat, lp, osdep) dev_t dev; - void (*strat)(); + void (*strat) __P((struct buf *bp)); register struct disklabel *lp; struct cpu_disklabel *osdep; { @@ -242,7 +242,7 @@ setdisklabel(olp, nlp, openmask, osdep) int writedisklabel(dev, strat, lp, osdep) dev_t dev; - void (*strat)(); + void (*strat) __P((struct buf *bp)); register struct disklabel *lp; struct cpu_disklabel *osdep; { diff --git a/sys/arch/pmax/pmax/genassym.c b/sys/arch/pmax/pmax/genassym.c index ef560a58aed..5e8652f394b 100644 --- a/sys/arch/pmax/pmax/genassym.c +++ b/sys/arch/pmax/pmax/genassym.c @@ -1,5 +1,4 @@ -/* $NetBSD: genassym.c,v 1.9 1996/04/07 14:27:00 jonathan Exp $ */ - +/* $OpenBSD: genassym.c,v 1.4 1996/12/22 15:18:29 graichen Exp $ */ /* * Copyright (c) 1992, 1993 * The Regents of the University of California. All rights reserved. @@ -35,11 +34,11 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * @(#)genassym.c 8.2 (Berkeley) 9/23/93 + * from: @(#)genassym.c 8.2 (Berkeley) 9/23/93 + * $Id: genassym.c,v 1.4 1996/12/22 15:18:29 graichen Exp $ */ -#include -#include + #include #include #include @@ -49,33 +48,27 @@ #include -#define def(N,V) printf("#define\t%s %d\n", N, V) -#define defx(N,V) printf("#define\t%s 0x%lx\n", N, V) -#define off(N,S,M) def(N, (int)offsetof(S, M)) - -int main() { + register struct proc *p = (struct proc *)0; + register struct user *up = (struct user *)0; + register struct vmmeter *vm = (struct vmmeter *)0; + register int size, s, n; - off("P_FORW", struct proc, p_forw); - off("P_BACK", struct proc, p_back); - off("P_PRIORITY", struct proc, p_priority); - off("P_ADDR", struct proc, p_addr); - - off("P_UPTE", struct proc, p_md.md_upte); - off("U_PCB_REGS", struct user, u_pcb.pcb_regs); - - off("U_PCB_FPREGS", struct user, u_pcb.pcb_regs[F0]); - off("U_PCB_CONTEXT", struct user, u_pcb.pcb_context); - off("U_PCB_ONFAULT", struct user, u_pcb.pcb_onfault); - off("U_PCB_SEGTAB", struct user, u_pcb.pcb_segtab); - - defx("VM_MIN_ADDRESS", VM_MIN_ADDRESS); - defx("VM_MIN_KERNEL_ADDRESS", VM_MIN_KERNEL_ADDRESS); - - off("V_SWTCH", struct vmmeter, v_swtch); - - def("SIGILL", SIGILL); - def("SIGFPE", SIGFPE); + printf("#define\tP_FORW %d\n", &p->p_forw); + printf("#define\tP_BACK %d\n", &p->p_back); + printf("#define\tP_PRIORITY %d\n", &p->p_priority); + printf("#define\tP_ADDR %d\n", &p->p_addr); + printf("#define\tP_UPTE %d\n", p->p_md.md_upte); + printf("#define\tU_PCB_REGS %d\n", up->u_pcb.pcb_regs); + printf("#define\tU_PCB_FPREGS %d\n", &up->u_pcb.pcb_regs[F0]); + printf("#define\tU_PCB_CONTEXT %d\n", &up->u_pcb.pcb_context); + printf("#define\tU_PCB_ONFAULT %d\n", &up->u_pcb.pcb_onfault); + printf("#define\tU_PCB_SEGTAB %d\n", &up->u_pcb.pcb_segtab); + printf("#define\tVM_MIN_ADDRESS 0x%x\n", VM_MIN_ADDRESS); + printf("#define\tVM_MIN_KERNEL_ADDRESS 0x%x\n", VM_MIN_KERNEL_ADDRESS); + printf("#define\tV_SWTCH %d\n", &vm->v_swtch); + printf("#define\tSIGILL %d\n", SIGILL); + printf("#define\tSIGFPE %d\n", SIGFPE); exit(0); } diff --git a/sys/arch/pmax/pmax/locore.S b/sys/arch/pmax/pmax/locore.S index d77c118d114..df2a2e68b43 100644 --- a/sys/arch/pmax/pmax/locore.S +++ b/sys/arch/pmax/pmax/locore.S @@ -1,9 +1,4 @@ -/* $NetBSD: locore.S,v 1.21 1996/05/19 00:25:14 jonathan Exp $ */ - -/* - * locore file for either "new" merged MIPS-I/MIPS-II kernels or - * old-style pmax kernels - */ +/* $NetBSD: locore.S,v 1.26 1996/11/06 20:19:38 cgd Exp $ */ /* * Copyright (c) 1992, 1993 @@ -66,12 +61,103 @@ #include #include +#include +#include + #include #include -#include -#include #include +/*---------------------------------------------------------------------------- + * + * Macros used to save and restore registers when entering and + * exiting the kernel. When coming from user space, we need + * to initialize the kernel stack and on leaving, return to the + * user's stack. + * When coming from kernel-space we just save and restore from the + * kernel stack set up by a previous user-mode exception. + * + *---------------------------------------------------------------------------- + */ + + +/* + * Restore saved user registers before returning + * to user-space after an exception or TLB miss. + * + * XXX we don't restore all the regs, because the r3000 and r4000 + * use different mechanisms to set up the return address. + * the current Pica code uses v1 for that, so we leave + * it up to the caller of this macro to restore AT and v0. + * Don't ask why, I don't know. + */ +#define RESTORE_USER_REGS(saveaddr) \ + lw v1, saveaddr+U_PCB_REGS+(V1 * 4) ; \ + lw a0, saveaddr+U_PCB_REGS+(A0 * 4) ; \ + lw a1, saveaddr+U_PCB_REGS+(A1 * 4) ; \ + lw a2, saveaddr+U_PCB_REGS+(A2 * 4) ; \ + lw a3, saveaddr+U_PCB_REGS+(A3 * 4) ; \ + lw t0, saveaddr+U_PCB_REGS+(T0 * 4) ; \ + lw t1, saveaddr+U_PCB_REGS+(T1 * 4) ; \ + lw t2, saveaddr+U_PCB_REGS+(T2 * 4) ; \ + lw t3, saveaddr+U_PCB_REGS+(T3 * 4) ; \ + lw t4, saveaddr+U_PCB_REGS+(T4 * 4) ; \ + lw t5, saveaddr+U_PCB_REGS+(T5 * 4) ; \ + lw t6, saveaddr+U_PCB_REGS+(T6 * 4) ; \ + lw t7, saveaddr+U_PCB_REGS+(T7 * 4) ; \ + lw s0, saveaddr+U_PCB_REGS+(S0 * 4) ; \ + lw s1, saveaddr+U_PCB_REGS+(S1 * 4) ; \ + lw s2, saveaddr+U_PCB_REGS+(S2 * 4) ; \ + lw s3, saveaddr+U_PCB_REGS+(S3 * 4) ; \ + lw s4, saveaddr+U_PCB_REGS+(S4 * 4) ; \ + lw s5, saveaddr+U_PCB_REGS+(S5 * 4) ; \ + lw s6, saveaddr+U_PCB_REGS+(S6 * 4) ; \ + lw s7, saveaddr+U_PCB_REGS+(S7 * 4) ; \ + lw t8, saveaddr+U_PCB_REGS+(T8 * 4) ; \ + lw t9, saveaddr+U_PCB_REGS+(T9 * 4) ; \ + lw gp, saveaddr+U_PCB_REGS+(GP * 4) ; \ + lw sp, saveaddr+U_PCB_REGS+(SP * 4) ; \ + lw s8, saveaddr+U_PCB_REGS+(S8 * 4) ; \ + lw ra, saveaddr+U_PCB_REGS+(RA * 4) + + +/* + * Restore call-used registers(?) before returning + * to the previous kernel stackframe after a after an exception or + * TLB miss from kernel space. + * + * XXX we don't restore all the regs, because the r3000 and r4000 + * use different mechanisms to set up the return address. + * the current Pica code uses v1 for that, so we leave + * it up to the caller of this macro to restore AT and v0. + * Don't ask why, I don't konw. + */ +#define RESTORE_KERN_REGISTERS(offset) \ + lw v1, offset + 8(sp) ; \ + lw a0, offset + 12(sp) ; \ + lw a1, offset + 16(sp) ; \ + lw a2, offset + 20(sp) ; \ + lw a3, offset + 24(sp) ; \ + lw t0, offset + 28(sp) ; \ + lw t1, offset + 32(sp) ; \ + lw t2, offset + 36(sp) ; \ + lw t3, offset + 40(sp) ; \ + lw t4, offset + 44(sp) ; \ + lw t5, offset + 48(sp) ; \ + lw t6, offset + 52(sp) ; \ + lw t7, offset + 56(sp) ; \ + lw t8, offset + 60(sp) ; \ + lw t9, offset + 64(sp) ; \ + lw ra, offset + 68(sp) + + + +/*---------------------------------------------------------------------------- + * + * start -- boostrap kernel entry point + * + *---------------------------------------------------------------------------- + */ #include "assym.h" .set noreorder @@ -176,14 +262,13 @@ start: * (see sendsig() and sigreturn()). We have to compute the address * of the sigcontext struct for the sigreturn call. */ - .globl _C_LABEL(sigcode) -_C_LABEL(sigcode): +LEAF(sigcode) addu a0, sp, 16 # address of sigcontext li v0, SYS_sigreturn # sigreturn(scp) syscall break 0 # just in case sigreturn fails - .globl _C_LABEL(esigcode) -_C_LABEL(esigcode): +ALEAF(esigcode) +END(sigcode) /* * Primitives @@ -194,13 +279,13 @@ _C_LABEL(esigcode): * The reason for using this table rather than storing an address in * u.u_pcb.pcb_onfault is simply to make the code faster. */ - .globl _C_LABEL(onfault_table) .data .align 2 + .globl _C_LABEL(onfault_table) _C_LABEL(onfault_table): .word 0 # invalid index number #define BADERR 1 - .word baderr + .word _C_LABEL(baderr) #define COPYERR 2 .word _C_LABEL(copyerr) #define FSWBERR 3 @@ -209,7 +294,7 @@ _C_LABEL(onfault_table): .word _C_LABEL(fswintrberr) #ifdef KADB #define KADBERR 5 - .word kadberr + .word _C_LABEL(kadberr) #endif .text @@ -257,6 +342,7 @@ LEAF(fillw) nop END(fillw) + /* * Copy a null terminated string within the kernel address space. * Maxlength may be null if count not wanted. @@ -387,77 +473,6 @@ LEAF(copyerr) li v0, EFAULT # return error END(copyerr) -/* - * Copy data to the DMA buffer. - * The DMA bufffer can only be written one short at a time - * (and takes ~14 cycles). - * - * CopyToBuffer(src, dst, length) - * u_short *src; NOTE: must be short aligned - * u_short *dst; - * int length; - */ -LEAF(CopyToBuffer) - blez a2, 2f - nop -1: - lhu t0, 0(a0) # read 2 bytes of data - subu a2, a2, 2 - addu a0, a0, 2 - addu a1, a1, 4 - bgtz a2, 1b - sh t0, -4(a1) # write 2 bytes of data to buffer -2: - j ra - nop -END(CopyToBuffer) - -/* - * Copy data from the DMA buffer. - * The DMA bufffer can only be read one short at a time - * (and takes ~12 cycles). - * - * CopyFromBuffer(src, dst, length) - * u_short *src; - * char *dst; - * int length; - */ -LEAF(CopyFromBuffer) - and t0, a1, 1 # test for aligned dst - beq t0, zero, 3f - nop - blt a2, 2, 7f # at least 2 bytes to copy? - nop -1: - lhu t0, 0(a0) # read 2 bytes of data from buffer - addu a0, a0, 4 # keep buffer pointer word aligned - addu a1, a1, 2 - subu a2, a2, 2 - sb t0, -2(a1) - srl t0, t0, 8 - bge a2, 2, 1b - sb t0, -1(a1) -3: - blt a2, 2, 7f # at least 2 bytes to copy? - nop -6: - lhu t0, 0(a0) # read 2 bytes of data from buffer - addu a0, a0, 4 # keep buffer pointer word aligned - addu a1, a1, 2 - subu a2, a2, 2 - bge a2, 2, 6b - sh t0, -2(a1) -7: - ble a2, zero, 9f # done? - nop - lhu t0, 0(a0) # copy one more byte - nop - sb t0, 0(a1) -9: - j ra - nop -END(CopyFromBuffer) - /* * Copy the kernel stack to the new process and save the current context so * the new process will return nonzero when it is resumed by cpu_switch(). @@ -506,10 +521,10 @@ END(copykstack) /* * The following primitives manipulate the run queues. whichqs tells which * of the 32 queues qs have processes in them. Setrunqueue puts processes - * into queues, Remrq removes them from queues. The running process is on - * no queue, other processes are on a queue related to p->p_priority, divided - * by 4 actually to shrink the 0-127 range of priorities into the 32 available - * queues. + * into queues, remrunqueue removes them from queues. The running process is + * on no queue, other processes are on a queue related to p->p_priority, + * divided by 4 actually to shrink the 0-127 range of priorities into the 32 + * available queues. */ /* * setrunqueue(p) @@ -546,11 +561,11 @@ NON_LEAF(setrunqueue, STAND_FRAME_SIZE, ra) END(setrunqueue) /* - * Remrq(p) + * remrq(p) * * Call should be made at splclock(). */ -NON_LEAF(remrunqueue, STAND_FRAME_SIZE, ra) +NON_LEAF(remrq, STAND_FRAME_SIZE, ra) subu sp, sp, STAND_FRAME_SIZE .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) lbu t0, P_PRIORITY(a0) # get from p->p_priority / 4 queue @@ -562,7 +577,7 @@ NON_LEAF(remrunqueue, STAND_FRAME_SIZE, ra) sw ra, STAND_RA_OFFSET(sp) ## bne v0, zero, 1f ## lw v0, P_BACK(a0) # v0 = p->p_back - PANIC("remrunqueue") ## it wasnt recorded to be on its q + PANIC("remrq") ## it wasnt recorded to be on its q 1: lw v1, P_FORW(a0) # v1 = p->p_forw nop @@ -581,7 +596,7 @@ NON_LEAF(remrunqueue, STAND_FRAME_SIZE, ra) sw zero, P_BACK(a0) ## for firewall checking j ra addu sp, sp, STAND_FRAME_SIZE -END(remrunqueue) +END(remrq) /* * switch_exit() @@ -660,6 +675,9 @@ NON_LEAF(cpu_switch, STAND_FRAME_SIZE, ra) sw1: nop # wait for intrs disabled nop + nop # extra cycles on r4000 + nop # extra cycles on r4000 + lw t0, _C_LABEL(whichqs) # look for non-empty queue li t2, -1 # t2 = lowest bit set beq t0, zero, _C_LABEL(idle) # if none, idle @@ -794,7 +812,12 @@ LEAF(suiword) sw a1, 0(a0) # store word sw zero, UADDR+U_PCB_ONFAULT move v0, zero - b _C_LABEL(MachFlushICache) # NOTE: this should not clobber v0! +/* XXXX FIXME */ +#ifdef JONATHAN_BOTCHED_THIS + b _C_LABEL(MachFlushICache) # NOTE: must not clobber v0! +#else +/*XXX*/ b _C_LABEL(mips1_FlushICache)# NOTE: must not clobber v0! +#endif li a1, 4 # size of word END(suiword) @@ -885,2603 +908,246 @@ LEAF(_remque) sw v1, 4(v0) # p->next->prev = p->prev END(_remque) -/* - *---------------------------------------------------------------------------- - * - * mips_r2000_UTLBmiss -- - * MachUTLBmiss -- - * - * Vector code for a MIPS-I user-space TLB miss from user-space. - * - * - * This code is copied to the UTLB exception vector address to - * handle user level TLB translation misses. - * NOTE: This code must be relocatable!!! - */ - .globl _C_LABEL(mips_R2000_UTLBMiss) -_C_LABEL(mips_R2000_UTLBMiss): - .globl _C_LABEL(MachUTLBMiss) -_C_LABEL(MachUTLBMiss): - .set noat - mfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address - lw k1, UADDR+U_PCB_SEGTAB # get the current segment table - bltz k0, 1f # R3000 chip bug - srl k0, k0, SEGSHIFT # compute segment table index - sll k0, k0, 2 - addu k1, k1, k0 - mfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address - lw k1, 0(k1) # get pointer to segment map - srl k0, k0, PGSHIFT - 2 # compute segment map index - andi k0, k0, (NPTEPG - 1) << 2 - beq k1, zero, 2f # invalid segment map - addu k1, k1, k0 # index into segment map - lw k0, 0(k1) # get page PTE - nop - beq k0, zero, 2f # dont load invalid entries - mtc0 k0, MACH_COP_0_TLB_LOW - mfc0 k1, MACH_COP_0_EXC_PC # get return address - tlbwr # update TLB - j k1 - rfe -1: - mfc0 k1, MACH_COP_0_EXC_PC # get return address - nop - j k1 - rfe -2: - j SlowFault # handle the rest - nop - .set at - .globl _C_LABEL(MachUTLBMissEnd) -_C_LABEL(MachUTLBMissEnd): - .globl _C_LABEL(mips_R2000_UTLBMissEnd) -_C_LABEL(mips_R2000_UTLBMissEnd): +/* XXX + * XXX + * second-level (after locore vectors) jump tables + * were here */ -/* - *---------------------------------------------------------------------------- - * - * mips_R2000_execption -- - * - * Vector code for the general exception vector 0x80000080 - * on an r2000 or r3000. - * - * This code is copied to the general exception vector address to - * handle all execptions except RESET and UTLBMiss. - * NOTE: This code must be relocatable!!! - * - *---------------------------------------------------------------------------- - */ - .globl _C_LABEL(mips_R2000_exception) -_C_LABEL(mips_R2000_exception): -/* - * Find out what mode we came from and jump to the proper handler. - */ - .set noat - mfc0 k0, MACH_COP_0_STATUS_REG # Get the status register - mfc0 k1, MACH_COP_0_CAUSE_REG # Get the cause register value. - and k0, k0, MIPS_3K_SR_KU_PREV # test for user mode - sll k0, k0, 4 # shift user bit for cause index - and k1, k1, MIPS_3K_CR_EXC_CODE # Mask out the cause bits. - or k1, k1, k0 # change index to user table -1: - la k0, _C_LABEL(machExceptionTable) # get base of the jump table - addu k0, k0, k1 # Get the address of the - # function entry. Note that - # the cause is already - # shifted left by 2 bits so - # we dont have to shift. - lw k0, 0(k0) # Get the function address - nop - j k0 # Jump to the function. - nop - .set at - .globl _C_LABEL(mips_R2000_exceptionEnd) -_C_LABEL(mips_R2000_exceptionEnd): +#if 1 /* R2000/r3000 support, default on pmaxes */ +# include "locore_r2000.S" +#endif /* R2000/r3000 support, default on pmaxes */ +#ifdef notyet /* R4000 support */ +# include "locore_r4000.S" +#endif /* R4000 support */ -#ifdef R4000 /* XXX doesn't assemble in default pmax kernel */ /* - *---------------------------------------------------------------------------- - * - * mips_R4000_TLBMiss -- - * MachTLBMiss -- - * - * Vector code for the TLB-miss exception vector 0x80000180 - * on an r4000. - * - * This code is copied to the TLB exception vector address to - * handle TLB translation misses. - * NOTE: This code must be relocatable and max 32 instructions!!! - * Don't check for invalid pte's here. We load them as well and - * let the processor trap to load the correct value after service. - * - *---------------------------------------------------------------------------- + * Set/clear software interrupt routines. */ - .globl _C_LABEL(mips_R4000_TLBMiss) -_C_LABEL(mips_R4000_TLBMiss): - .globl _C_LABEL(MachTLBMiss) -_C_LABEL(MachTLBMiss): - .set noat - dmfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address - lw k1, UADDR+U_PCB_SEGTAB # get the current segment table - bltz k0, 1f # kernel address space -> - srl k0, k0, SEGSHIFT - 2 # compute segment table index - andi k0, k0, 0x7fc # PMAP_SEGTABSIZ-1 - addu k1, k1, k0 - dmfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address - lw k1, 0(k1) # get pointer to segment map - srl k0, k0, PGSHIFT - 2 # compute segment map index - andi k0, k0, ((NPTEPG/2) - 1) << 3 - beq k1, zero, 2f # invalid segment map - addu k1, k1, k0 # index into segment map - lw k0, 0(k1) # get page PTE - lw k1, 4(k1) - dsll k0, k0, 34 - dsrl k0, k0, 34 - dmtc0 k0, MACH_COP_0_TLB_LO0 - dsll k1, k1, 34 - dsrl k1, k1, 34 - dmtc0 k1, MACH_COP_0_TLB_LO1 - nop - tlbwr # update TLB + +LEAF(setsoftclock) + mfc0 v1, MACH_COP_0_STATUS_REG # save status register + mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) nop + mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register nop + or v0, v0, MACH_SOFT_INT_MASK_0 # set soft clock interrupt + mtc0 v0, MACH_COP_0_CAUSE_REG # save it + mtc0 v1, MACH_COP_0_STATUS_REG + j ra nop +END(setsoftclock) + +LEAF(clearsoftclock) + mfc0 v1, MACH_COP_0_STATUS_REG # save status register + mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) nop nop - eret -1: - j MachTLBMissException + mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register nop -2: - j SlowFault + and v0, v0, ~MACH_SOFT_INT_MASK_0 # clear soft clock interrupt + mtc0 v0, MACH_COP_0_CAUSE_REG # save it + mtc0 v1, MACH_COP_0_STATUS_REG + j ra nop +END(clearsoftclock) - .globl _C_LABEL(MachTLBMissEnd) -C_LABEL(MachTLBMissEnd): - .globl _C_LABEL(mips_R4000_TLBMissEnd) -_C_LABEL(mips_R4000_TLBMissEnd): - .set at -#endif /* XXX doesn't assemble in default pmax kernel *//* - - - *---------------------------------------------------------------------------- - * - * Mips_R4000_execption -- - * - * Vector code for the general exception vector 0x80000080 - * on an r4000 or r4400. - * - * This code is copied to the general exception vector address to - * handle all execptions except RESET and TLBMiss. - * NOTE: This code must be relocatable!!! - *---------------------------------------------------------------------------- - */ - .globl mips_r4000_exception -_C_LABEL(mips_R4000_exception): -/* - * Find out what mode we came from and jump to the proper handler. - */ - .set noat - mfc0 k0, MACH_COP_0_STATUS_REG # Get the status register - mfc0 k1, MACH_COP_0_CAUSE_REG # Get the cause register value. - and k0, k0, MIPS_4K_SR_KSU_USER # test for user mode - # sneaky but the bits are - # with us........ - sll k0, k0, 3 # shift user bit for cause index - and k1, k1, MIPS_4K_CR_EXC_CODE # Mask out the cause bits. - or k1, k1, k0 # change index to user table -1: - la k0, machExceptionTable # get base of the jump table - addu k0, k0, k1 # Get the address of the - # function entry. Note that - # the cause is already - # shifted left by 2 bits so - # we dont have to shift. - lw k0, 0(k0) # Get the function address +LEAF(setsoftnet) + mfc0 v1, MACH_COP_0_STATUS_REG # save status register + mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) nop - j k0 # Jump to the function. nop - .set at - .globl mips_R4000_exceptionEnd -_C_LABEL(mips_R4000_exceptionEnd): + mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register + nop + or v0, v0, MACH_SOFT_INT_MASK_1 # set soft net interrupt + mtc0 v0, MACH_COP_0_CAUSE_REG # save it + mtc0 v1, MACH_COP_0_STATUS_REG + j ra + nop +END(setsoftnet) +LEAF(clearsoftnet) + mfc0 v1, MACH_COP_0_STATUS_REG # save status register + mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) + nop + nop + mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register + nop + and v0, v0, ~MACH_SOFT_INT_MASK_1 # clear soft net interrupt + mtc0 v0, MACH_COP_0_CAUSE_REG # save it + mtc0 v1, MACH_COP_0_STATUS_REG + j ra + nop +END(clearsoftnet) /* - * We couldn't find a TLB entry. - * Find out what mode we came from and call the appropriate handler. + * Set/change interrupt priority routines. */ -SlowFault: - .set noat - mfc0 k0, MACH_COP_0_STATUS_REG + +LEAF(MachEnableIntr) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register nop - and k0, k0, MACH_SR_KU_PREV - bne k0, zero, _C_LABEL(MachUserGenException) + or v0, v0, MIPS_SR_INT_IE + mtc0 v0, MACH_COP_0_STATUS_REG # enable all interrupts + j ra nop - .set at -/* - * Fall though ... - */ +END(MachEnableIntr) -/*---------------------------------------------------------------------------- - * - * MachKernGenException -- - * - * Handle an exception from kernel mode. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ +LEAF(spl0) +ALEAF(spllow) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + nop + or t0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) + mtc0 t0, MACH_COP_0_STATUS_REG # enable all interrupts + j ra + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(spl0) -/* - * The kernel exception stack contains 18 saved general registers, - * the status register and the multiply lo and high registers. - * In addition, we set this up for linkage conventions. - */ -#define KERN_REG_SIZE (18 * 4) -#define KERN_REG_OFFSET (STAND_FRAME_SIZE) -#define KERN_SR_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE) -#define KERN_MULT_LO_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 4) -#define KERN_MULT_HI_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 8) -#define KERN_EXC_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) - -NNON_LEAF(MachKernGenException, KERN_EXC_FRAME_SIZE, ra) -ALEAF(mips_r2000_KernGenException) - .set noat -#ifdef KADB - la k0, kdbpcb # save registers for kadb - sw s0, (S0 * 4)(k0) - sw s1, (S1 * 4)(k0) - sw s2, (S2 * 4)(k0) - sw s3, (S3 * 4)(k0) - sw s4, (S4 * 4)(k0) - sw s5, (S5 * 4)(k0) - sw s6, (S6 * 4)(k0) - sw s7, (S7 * 4)(k0) - sw s8, (S8 * 4)(k0) - sw gp, (GP * 4)(k0) - sw sp, (SP * 4)(k0) -#endif - subu sp, sp, KERN_EXC_FRAME_SIZE - .mask 0x80000000, (STAND_RA_OFFSET - KERN_EXC_FRAME_SIZE) -/* - * Save the relevant kernel registers onto the stack. - * We don't need to save s0 - s8, sp and gp because - * the compiler does it for us. - */ - sw AT, KERN_REG_OFFSET + 0(sp) - sw v0, KERN_REG_OFFSET + 4(sp) - sw v1, KERN_REG_OFFSET + 8(sp) - sw a0, KERN_REG_OFFSET + 12(sp) - mflo v0 - mfhi v1 - sw a1, KERN_REG_OFFSET + 16(sp) - sw a2, KERN_REG_OFFSET + 20(sp) - sw a3, KERN_REG_OFFSET + 24(sp) - sw t0, KERN_REG_OFFSET + 28(sp) - mfc0 a0, MACH_COP_0_STATUS_REG # First arg is the status reg. - sw t1, KERN_REG_OFFSET + 32(sp) - sw t2, KERN_REG_OFFSET + 36(sp) - sw t3, KERN_REG_OFFSET + 40(sp) - sw t4, KERN_REG_OFFSET + 44(sp) - mfc0 a1, MACH_COP_0_CAUSE_REG # Second arg is the cause reg. - sw t5, KERN_REG_OFFSET + 48(sp) - sw t6, KERN_REG_OFFSET + 52(sp) - sw t7, KERN_REG_OFFSET + 56(sp) - sw t8, KERN_REG_OFFSET + 60(sp) - mfc0 a2, MACH_COP_0_BAD_VADDR # Third arg is the fault addr. - sw t9, KERN_REG_OFFSET + 64(sp) - sw ra, KERN_REG_OFFSET + 68(sp) - sw v0, KERN_MULT_LO_OFFSET(sp) - sw v1, KERN_MULT_HI_OFFSET(sp) - mfc0 a3, MACH_COP_0_EXC_PC # Fourth arg is the pc. - sw a0, KERN_SR_OFFSET(sp) -/* - * Call the exception handler. - */ - jal _C_LABEL(trap) - sw a3, STAND_RA_OFFSET(sp) # for debugging -/* - * Restore registers and return from the exception. - * v0 contains the return address. - */ - lw a0, KERN_SR_OFFSET(sp) - lw t0, KERN_MULT_LO_OFFSET(sp) - lw t1, KERN_MULT_HI_OFFSET(sp) - mtc0 a0, MACH_COP_0_STATUS_REG # Restore the SR, disable intrs - mtlo t0 - mthi t1 - move k0, v0 - lw AT, KERN_REG_OFFSET + 0(sp) - lw v0, KERN_REG_OFFSET + 4(sp) - lw v1, KERN_REG_OFFSET + 8(sp) - lw a0, KERN_REG_OFFSET + 12(sp) - lw a1, KERN_REG_OFFSET + 16(sp) - lw a2, KERN_REG_OFFSET + 20(sp) - lw a3, KERN_REG_OFFSET + 24(sp) - lw t0, KERN_REG_OFFSET + 28(sp) - lw t1, KERN_REG_OFFSET + 32(sp) - lw t2, KERN_REG_OFFSET + 36(sp) - lw t3, KERN_REG_OFFSET + 40(sp) - lw t4, KERN_REG_OFFSET + 44(sp) - lw t5, KERN_REG_OFFSET + 48(sp) - lw t6, KERN_REG_OFFSET + 52(sp) - lw t7, KERN_REG_OFFSET + 56(sp) - lw t8, KERN_REG_OFFSET + 60(sp) - lw t9, KERN_REG_OFFSET + 64(sp) - lw ra, KERN_REG_OFFSET + 68(sp) - addu sp, sp, KERN_EXC_FRAME_SIZE - j k0 # Now return from the - rfe # exception. - .set at -END(MachKernGenException) +LEAF(splsoftclock) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~MACH_SOFT_INT_MASK_0 # disable soft clock + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 + j ra + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(splsoftclock) -/*---------------------------------------------------------------------------- - * - * MachUserGenException -- - * - * Handle an exception from user mode. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NNON_LEAF(MachUserGenException, STAND_FRAME_SIZE, ra) -ALEAF(mips_r2000_UserGenException) - .set noat - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) -/* - * Save all of the registers except for the kernel temporaries in u.u_pcb. - */ - sw AT, UADDR+U_PCB_REGS+(AST * 4) - sw v0, UADDR+U_PCB_REGS+(V0 * 4) - sw v1, UADDR+U_PCB_REGS+(V1 * 4) - sw a0, UADDR+U_PCB_REGS+(A0 * 4) - mflo v0 - sw a1, UADDR+U_PCB_REGS+(A1 * 4) - sw a2, UADDR+U_PCB_REGS+(A2 * 4) - sw a3, UADDR+U_PCB_REGS+(A3 * 4) - sw t0, UADDR+U_PCB_REGS+(T0 * 4) - mfhi v1 - sw t1, UADDR+U_PCB_REGS+(T1 * 4) - sw t2, UADDR+U_PCB_REGS+(T2 * 4) - sw t3, UADDR+U_PCB_REGS+(T3 * 4) - sw t4, UADDR+U_PCB_REGS+(T4 * 4) - mfc0 a0, MACH_COP_0_STATUS_REG # First arg is the status reg. - sw t5, UADDR+U_PCB_REGS+(T5 * 4) - sw t6, UADDR+U_PCB_REGS+(T6 * 4) - sw t7, UADDR+U_PCB_REGS+(T7 * 4) - sw s0, UADDR+U_PCB_REGS+(S0 * 4) - mfc0 a1, MACH_COP_0_CAUSE_REG # Second arg is the cause reg. - sw s1, UADDR+U_PCB_REGS+(S1 * 4) - sw s2, UADDR+U_PCB_REGS+(S2 * 4) - sw s3, UADDR+U_PCB_REGS+(S3 * 4) - sw s4, UADDR+U_PCB_REGS+(S4 * 4) - mfc0 a2, MACH_COP_0_BAD_VADDR # Third arg is the fault addr - sw s5, UADDR+U_PCB_REGS+(S5 * 4) - sw s6, UADDR+U_PCB_REGS+(S6 * 4) - sw s7, UADDR+U_PCB_REGS+(S7 * 4) - sw t8, UADDR+U_PCB_REGS+(T8 * 4) - mfc0 a3, MACH_COP_0_EXC_PC # Fourth arg is the pc. - sw t9, UADDR+U_PCB_REGS+(T9 * 4) - sw gp, UADDR+U_PCB_REGS+(GP * 4) - sw sp, UADDR+U_PCB_REGS+(SP * 4) - sw s8, UADDR+U_PCB_REGS+(S8 * 4) - li sp, KERNELSTACK - STAND_FRAME_SIZE # switch to kernel SP - sw ra, UADDR+U_PCB_REGS+(RA * 4) - sw v0, UADDR+U_PCB_REGS+(MULLO * 4) - sw v1, UADDR+U_PCB_REGS+(MULHI * 4) - sw a0, UADDR+U_PCB_REGS+(SR * 4) -#ifdef __GP_SUPPORT__ - la gp, _C_LABEL(_gp) # switch to kernel GP -#endif - sw a3, UADDR+U_PCB_REGS+(PC * 4) - sw a3, STAND_RA_OFFSET(sp) # for debugging - .set at - and t0, a0, ~MACH_SR_COP_1_BIT # Turn off the FPU. - .set noat -/* - * Call the exception handler. - */ - jal _C_LABEL(trap) - mtc0 t0, MACH_COP_0_STATUS_REG -/* - * Restore user registers and return. NOTE: interrupts are enabled. - */ - lw a0, UADDR+U_PCB_REGS+(SR * 4) - lw t0, UADDR+U_PCB_REGS+(MULLO * 4) - lw t1, UADDR+U_PCB_REGS+(MULHI * 4) - mtc0 a0, MACH_COP_0_STATUS_REG # this should disable interrupts - mtlo t0 - mthi t1 - lw k0, UADDR+U_PCB_REGS+(PC * 4) - lw AT, UADDR+U_PCB_REGS+(AST * 4) - lw v0, UADDR+U_PCB_REGS+(V0 * 4) - lw v1, UADDR+U_PCB_REGS+(V1 * 4) - lw a0, UADDR+U_PCB_REGS+(A0 * 4) - lw a1, UADDR+U_PCB_REGS+(A1 * 4) - lw a2, UADDR+U_PCB_REGS+(A2 * 4) - lw a3, UADDR+U_PCB_REGS+(A3 * 4) - lw t0, UADDR+U_PCB_REGS+(T0 * 4) - lw t1, UADDR+U_PCB_REGS+(T1 * 4) - lw t2, UADDR+U_PCB_REGS+(T2 * 4) - lw t3, UADDR+U_PCB_REGS+(T3 * 4) - lw t4, UADDR+U_PCB_REGS+(T4 * 4) - lw t5, UADDR+U_PCB_REGS+(T5 * 4) - lw t6, UADDR+U_PCB_REGS+(T6 * 4) - lw t7, UADDR+U_PCB_REGS+(T7 * 4) - lw s0, UADDR+U_PCB_REGS+(S0 * 4) - lw s1, UADDR+U_PCB_REGS+(S1 * 4) - lw s2, UADDR+U_PCB_REGS+(S2 * 4) - lw s3, UADDR+U_PCB_REGS+(S3 * 4) - lw s4, UADDR+U_PCB_REGS+(S4 * 4) - lw s5, UADDR+U_PCB_REGS+(S5 * 4) - lw s6, UADDR+U_PCB_REGS+(S6 * 4) - lw s7, UADDR+U_PCB_REGS+(S7 * 4) - lw t8, UADDR+U_PCB_REGS+(T8 * 4) - lw t9, UADDR+U_PCB_REGS+(T9 * 4) - lw gp, UADDR+U_PCB_REGS+(GP * 4) - lw sp, UADDR+U_PCB_REGS+(SP * 4) - lw s8, UADDR+U_PCB_REGS+(S8 * 4) - lw ra, UADDR+U_PCB_REGS+(RA * 4) - j k0 - rfe - .set at -END(MachUserGenException) - -/*---------------------------------------------------------------------------- - * - * MachKernIntr -- - * - * Handle an interrupt from kernel mode. - * Interrupts use the standard kernel stack. - * switch_exit sets up a kernel stack after exit so interrupts won't fail. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -#define KINTR_REG_OFFSET (STAND_FRAME_SIZE) -#define KINTR_SR_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE) -#define KINTR_MULT_LO_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 4) -#define KINTR_MULT_HI_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 8) -#define KINTR_GP_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) -#define KINTR_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 16) - -NNON_LEAF(MachKernIntr, KINTR_FRAME_SIZE, ra) -ALEAF(mips_r2000_KernIntr) - .set noat - subu sp, sp, KINTR_FRAME_SIZE # allocate stack frame - .mask 0x80000000, (STAND_RA_OFFSET - KINTR_FRAME_SIZE) -/* - * Save the relevant kernel registers onto the stack. - * We don't need to save s0 - s8 and sp because - * the compiler does it for us. - */ - sw AT, KINTR_REG_OFFSET + 0(sp) - sw v0, KINTR_REG_OFFSET + 4(sp) - sw v1, KINTR_REG_OFFSET + 8(sp) - sw a0, KINTR_REG_OFFSET + 12(sp) - mflo v0 - mfhi v1 - sw a1, KINTR_REG_OFFSET + 16(sp) - sw a2, KINTR_REG_OFFSET + 20(sp) - sw a3, KINTR_REG_OFFSET + 24(sp) - sw t0, KINTR_REG_OFFSET + 28(sp) - mfc0 a0, MACH_COP_0_STATUS_REG # First arg is the status reg. - sw t1, KINTR_REG_OFFSET + 32(sp) - sw t2, KINTR_REG_OFFSET + 36(sp) - sw t3, KINTR_REG_OFFSET + 40(sp) - sw t4, KINTR_REG_OFFSET + 44(sp) - mfc0 a1, MACH_COP_0_CAUSE_REG # Second arg is the cause reg. - sw t5, KINTR_REG_OFFSET + 48(sp) - sw t6, KINTR_REG_OFFSET + 52(sp) - sw t7, KINTR_REG_OFFSET + 56(sp) - sw t8, KINTR_REG_OFFSET + 60(sp) - mfc0 a2, MACH_COP_0_EXC_PC # Third arg is the pc. - sw t9, KINTR_REG_OFFSET + 64(sp) - sw ra, KINTR_REG_OFFSET + 68(sp) - sw v0, KINTR_MULT_LO_OFFSET(sp) - sw v1, KINTR_MULT_HI_OFFSET(sp) - sw a0, KINTR_SR_OFFSET(sp) - sw gp, KINTR_GP_OFFSET(sp) -#ifdef __GP_SUPPORT__ - la gp, _C_LABEL(_gp) # switch to kernel GP -#endif -/* - * Call the interrupt handler. - */ - jal _C_LABEL(interrupt) - sw a2, STAND_RA_OFFSET(sp) # for debugging -/* - * Restore registers and return from the interrupt. - */ - lw a0, KINTR_SR_OFFSET(sp) - lw t0, KINTR_MULT_LO_OFFSET(sp) - lw t1, KINTR_MULT_HI_OFFSET(sp) - mtc0 a0, MACH_COP_0_STATUS_REG # Restore the SR, disable intrs - mtlo t0 - mthi t1 - lw k0, STAND_RA_OFFSET(sp) - lw AT, KINTR_REG_OFFSET + 0(sp) - lw v0, KINTR_REG_OFFSET + 4(sp) - lw v1, KINTR_REG_OFFSET + 8(sp) - lw a0, KINTR_REG_OFFSET + 12(sp) - lw a1, KINTR_REG_OFFSET + 16(sp) - lw a2, KINTR_REG_OFFSET + 20(sp) - lw a3, KINTR_REG_OFFSET + 24(sp) - lw t0, KINTR_REG_OFFSET + 28(sp) - lw t1, KINTR_REG_OFFSET + 32(sp) - lw t2, KINTR_REG_OFFSET + 36(sp) - lw t3, KINTR_REG_OFFSET + 40(sp) - lw t4, KINTR_REG_OFFSET + 44(sp) - lw t5, KINTR_REG_OFFSET + 48(sp) - lw t6, KINTR_REG_OFFSET + 52(sp) - lw t7, KINTR_REG_OFFSET + 56(sp) - lw t8, KINTR_REG_OFFSET + 60(sp) - lw t9, KINTR_REG_OFFSET + 64(sp) - lw ra, KINTR_REG_OFFSET + 68(sp) - addu sp, sp, KINTR_FRAME_SIZE - j k0 # Now return from the - rfe # interrupt. - .set at -END(MachKernIntr) - -/*---------------------------------------------------------------------------- - * - * MachUserIntr -- - * - * Handle an interrupt from user mode. - * Note: we save minimal state in the u.u_pcb struct and use the standard - * kernel stack since there has to be a u page if we came from user mode. - * If there is a pending software interrupt, then save the remaining state - * and call softintr(). This is all because if we call switch() inside - * interrupt(), not all the user registers have been saved in u.u_pcb. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NNON_LEAF(MachUserIntr, STAND_FRAME_SIZE, ra) -ALEAF(mips_r2000_UserIntr) - .set noat - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) -/* - * Save the relevant user registers into the u.u_pcb struct. - * We don't need to save s0 - s8 because - * the compiler does it for us. - */ - sw AT, UADDR+U_PCB_REGS+(AST * 4) - sw v0, UADDR+U_PCB_REGS+(V0 * 4) - sw v1, UADDR+U_PCB_REGS+(V1 * 4) - sw a0, UADDR+U_PCB_REGS+(A0 * 4) - mflo v0 - mfhi v1 - sw a1, UADDR+U_PCB_REGS+(A1 * 4) - sw a2, UADDR+U_PCB_REGS+(A2 * 4) - sw a3, UADDR+U_PCB_REGS+(A3 * 4) - sw t0, UADDR+U_PCB_REGS+(T0 * 4) - mfc0 a0, MACH_COP_0_STATUS_REG # First arg is the status reg. - sw t1, UADDR+U_PCB_REGS+(T1 * 4) - sw t2, UADDR+U_PCB_REGS+(T2 * 4) - sw t3, UADDR+U_PCB_REGS+(T3 * 4) - sw t4, UADDR+U_PCB_REGS+(T4 * 4) - mfc0 a1, MACH_COP_0_CAUSE_REG # Second arg is the cause reg. - sw t5, UADDR+U_PCB_REGS+(T5 * 4) - sw t6, UADDR+U_PCB_REGS+(T6 * 4) - sw t7, UADDR+U_PCB_REGS+(T7 * 4) - sw t8, UADDR+U_PCB_REGS+(T8 * 4) - mfc0 a2, MACH_COP_0_EXC_PC # Third arg is the pc. - sw t9, UADDR+U_PCB_REGS+(T9 * 4) - sw gp, UADDR+U_PCB_REGS+(GP * 4) - sw sp, UADDR+U_PCB_REGS+(SP * 4) - sw ra, UADDR+U_PCB_REGS+(RA * 4) - li sp, KERNELSTACK - STAND_FRAME_SIZE # switch to kernel SP - sw v0, UADDR+U_PCB_REGS+(MULLO * 4) - sw v1, UADDR+U_PCB_REGS+(MULHI * 4) - sw a0, UADDR+U_PCB_REGS+(SR * 4) - sw a2, UADDR+U_PCB_REGS+(PC * 4) -#ifdef __GP_SUPPORT__ - la gp, _C_LABEL(_gp) # switch to kernel GP -#endif - .set at - and t0, a0, ~MACH_SR_COP_1_BIT # Turn off the FPU. - .set noat - mtc0 t0, MACH_COP_0_STATUS_REG -/* - * Call the interrupt handler. - */ - jal _C_LABEL(interrupt) - sw a2, STAND_RA_OFFSET(sp) # for debugging -/* - * Restore registers and return from the interrupt. - */ - lw a0, UADDR+U_PCB_REGS+(SR * 4) - lw v0, _C_LABEL(astpending) # any pending interrupts? - mtc0 a0, MACH_COP_0_STATUS_REG # Restore the SR, disable intrs - bne v0, zero, 1f # dont restore, call softintr - lw t0, UADDR+U_PCB_REGS+(MULLO * 4) - lw t1, UADDR+U_PCB_REGS+(MULHI * 4) - lw k0, UADDR+U_PCB_REGS+(PC * 4) - lw AT, UADDR+U_PCB_REGS+(AST * 4) - lw v0, UADDR+U_PCB_REGS+(V0 * 4) - lw v1, UADDR+U_PCB_REGS+(V1 * 4) - lw a0, UADDR+U_PCB_REGS+(A0 * 4) - lw a1, UADDR+U_PCB_REGS+(A1 * 4) - lw a2, UADDR+U_PCB_REGS+(A2 * 4) - lw a3, UADDR+U_PCB_REGS+(A3 * 4) - mtlo t0 - mthi t1 - lw t0, UADDR+U_PCB_REGS+(T0 * 4) - lw t1, UADDR+U_PCB_REGS+(T1 * 4) - lw t2, UADDR+U_PCB_REGS+(T2 * 4) - lw t3, UADDR+U_PCB_REGS+(T3 * 4) - lw t4, UADDR+U_PCB_REGS+(T4 * 4) - lw t5, UADDR+U_PCB_REGS+(T5 * 4) - lw t6, UADDR+U_PCB_REGS+(T6 * 4) - lw t7, UADDR+U_PCB_REGS+(T7 * 4) - lw t8, UADDR+U_PCB_REGS+(T8 * 4) - lw t9, UADDR+U_PCB_REGS+(T9 * 4) - lw gp, UADDR+U_PCB_REGS+(GP * 4) - lw sp, UADDR+U_PCB_REGS+(SP * 4) - lw ra, UADDR+U_PCB_REGS+(RA * 4) - j k0 # Now return from the - rfe # interrupt. - -1: -/* - * We have pending software interrupts; save remaining user state in u.u_pcb. - */ - sw s0, UADDR+U_PCB_REGS+(S0 * 4) - sw s1, UADDR+U_PCB_REGS+(S1 * 4) - sw s2, UADDR+U_PCB_REGS+(S2 * 4) - sw s3, UADDR+U_PCB_REGS+(S3 * 4) - sw s4, UADDR+U_PCB_REGS+(S4 * 4) - sw s5, UADDR+U_PCB_REGS+(S5 * 4) - sw s6, UADDR+U_PCB_REGS+(S6 * 4) - sw s7, UADDR+U_PCB_REGS+(S7 * 4) - sw s8, UADDR+U_PCB_REGS+(S8 * 4) - li t0, MACH_HARD_INT_MASK | MIPS_SR_INT_IE -/* - * Call the software interrupt handler. - */ - jal _C_LABEL(softintr) - mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts (spl0) -/* - * Restore user registers and return. NOTE: interrupts are enabled. - */ - lw a0, UADDR+U_PCB_REGS+(SR * 4) - lw t0, UADDR+U_PCB_REGS+(MULLO * 4) - lw t1, UADDR+U_PCB_REGS+(MULHI * 4) - mtc0 a0, MACH_COP_0_STATUS_REG # this should disable interrupts - mtlo t0 - mthi t1 - lw k0, UADDR+U_PCB_REGS+(PC * 4) - lw AT, UADDR+U_PCB_REGS+(AST * 4) - lw v0, UADDR+U_PCB_REGS+(V0 * 4) - lw v1, UADDR+U_PCB_REGS+(V1 * 4) - lw a0, UADDR+U_PCB_REGS+(A0 * 4) - lw a1, UADDR+U_PCB_REGS+(A1 * 4) - lw a2, UADDR+U_PCB_REGS+(A2 * 4) - lw a3, UADDR+U_PCB_REGS+(A3 * 4) - lw t0, UADDR+U_PCB_REGS+(T0 * 4) - lw t1, UADDR+U_PCB_REGS+(T1 * 4) - lw t2, UADDR+U_PCB_REGS+(T2 * 4) - lw t3, UADDR+U_PCB_REGS+(T3 * 4) - lw t4, UADDR+U_PCB_REGS+(T4 * 4) - lw t5, UADDR+U_PCB_REGS+(T5 * 4) - lw t6, UADDR+U_PCB_REGS+(T6 * 4) - lw t7, UADDR+U_PCB_REGS+(T7 * 4) - lw s0, UADDR+U_PCB_REGS+(S0 * 4) - lw s1, UADDR+U_PCB_REGS+(S1 * 4) - lw s2, UADDR+U_PCB_REGS+(S2 * 4) - lw s3, UADDR+U_PCB_REGS+(S3 * 4) - lw s4, UADDR+U_PCB_REGS+(S4 * 4) - lw s5, UADDR+U_PCB_REGS+(S5 * 4) - lw s6, UADDR+U_PCB_REGS+(S6 * 4) - lw s7, UADDR+U_PCB_REGS+(S7 * 4) - lw t8, UADDR+U_PCB_REGS+(T8 * 4) - lw t9, UADDR+U_PCB_REGS+(T9 * 4) - lw gp, UADDR+U_PCB_REGS+(GP * 4) - lw sp, UADDR+U_PCB_REGS+(SP * 4) - lw s8, UADDR+U_PCB_REGS+(S8 * 4) - lw ra, UADDR+U_PCB_REGS+(RA * 4) - j k0 - rfe - .set at -END(MachUserIntr) - - - -/* - * Set/clear software interrupt routines. - */ - -LEAF(setsoftclock) - mfc0 v1, MACH_COP_0_STATUS_REG # save status register - mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) - nop - mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register - nop - or v0, v0, MACH_SOFT_INT_MASK_0 # set soft clock interrupt - mtc0 v0, MACH_COP_0_CAUSE_REG # save it - mtc0 v1, MACH_COP_0_STATUS_REG - j ra - nop -END(setsoftclock) - -LEAF(clearsoftclock) - mfc0 v1, MACH_COP_0_STATUS_REG # save status register - mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) - nop - nop - mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register - nop - and v0, v0, ~MACH_SOFT_INT_MASK_0 # clear soft clock interrupt - mtc0 v0, MACH_COP_0_CAUSE_REG # save it - mtc0 v1, MACH_COP_0_STATUS_REG - j ra - nop -END(clearsoftclock) - -LEAF(setsoftnet) - mfc0 v1, MACH_COP_0_STATUS_REG # save status register - mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) - nop - nop - mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register - nop - or v0, v0, MACH_SOFT_INT_MASK_1 # set soft net interrupt - mtc0 v0, MACH_COP_0_CAUSE_REG # save it - mtc0 v1, MACH_COP_0_STATUS_REG - j ra - nop -END(setsoftnet) - -LEAF(clearsoftnet) - mfc0 v1, MACH_COP_0_STATUS_REG # save status register - mtc0 zero, MACH_COP_0_STATUS_REG # disable interrupts (2 cycles) - nop - nop - mfc0 v0, MACH_COP_0_CAUSE_REG # read cause register - nop - and v0, v0, ~MACH_SOFT_INT_MASK_1 # clear soft net interrupt - mtc0 v0, MACH_COP_0_CAUSE_REG # save it - mtc0 v1, MACH_COP_0_STATUS_REG - j ra - nop -END(clearsoftnet) - -/* - * Set/change interrupt priority routines. - */ - -LEAF(MachEnableIntr) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - nop - or v0, v0, MIPS_SR_INT_IE - mtc0 v0, MACH_COP_0_STATUS_REG # enable all interrupts - j ra - nop -END(MachEnableIntr) - -LEAF(spl0) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - nop - or t0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) - mtc0 t0, MACH_COP_0_STATUS_REG # enable all interrupts - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(spl0) - -LEAF(splsoftclock) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~MACH_SOFT_INT_MASK_0 # disable soft clock - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable on r4x00 - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(splsoftclock) - -LEAF(splsoftnet) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~(MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(splsoftnet) - -LEAF(Mach_spl0) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~(MACH_INT_MASK_0|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable on r4x00 - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(Mach_spl0) - -LEAF(Mach_spl1) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~(MACH_INT_MASK_1|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable on r4x00 - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(Mach_spl1) - -LEAF(Mach_spl2) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~(MACH_INT_MASK_2|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable on r4x00 - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(Mach_spl2) - -LEAF(Mach_spl3) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~(MACH_INT_MASK_3|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable on r4x00 - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(Mach_spl3) - -LEAF(Mach_spl4) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~(MACH_INT_MASK_4|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(Mach_spl4) - -LEAF(Mach_spl5) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~(MACH_INT_MASK_5|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(Mach_spl5) - - -/* - * We define an alternate entry point after mcount is called so it - * can be used in mcount without causeing a recursive loop. - */ -LEAF(splhigh) -ALEAF(_splhigh) - mfc0 v0, MACH_COP_0_STATUS_REG # read status register - li t0, ~MIPS_SR_INT_IE # disable all interrupts - and t0, t0, v0 - mtc0 t0, MACH_COP_0_STATUS_REG # save it - nop # 3 ins to disable on r4000 - j ra - and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) -END(splhigh) - -/* - * Restore saved interrupt mask. - */ -LEAF(splx) -ALEAF(_splx) - mfc0 v0, MACH_COP_0_STATUS_REG - li t0, ~(MACH_INT_MASK | MIPS_SR_INT_IE) - and t0, t0, v0 - or t0, t0, a0 - mtc0 t0, MACH_COP_0_STATUS_REG - nop # 3 ins to disable - j ra - nop -END(splx) - -/*---------------------------------------------------------------------------- - * - * wbflush -- - * - * Return when the write buffer is empty. - * - * wbflush() - * MachEmptyWriteBuffer() [[backwards compatibility]] - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -LEAF(wbflush) -ALEAF(MachEmptyWriteBuffer) - nop - nop - nop - nop -1: bc0f 1b - nop - j ra - nop -END(MachEmptyWriteBuffer) - - -/*---------------------------------------------------------------------------- - * - * XXX START of r3000-specific code XXX - * - *---------------------------------------------------------------------------- - */ - - - -#if 0 -/*---------------------------------------------------------------------------- - * - * MachTLBModException -- - * - * Handle a TLB modified exception. - * The BaddVAddr, Context, and EntryHi registers contain the failed - * virtual address. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NLEAF(MachTLBModException) -ALEAF(mips_r2000_TLBModException) - .set noat - tlbp # find the TLB entry - mfc0 k0, MACH_COP_0_TLB_LOW # get the physical address - mfc0 k1, MACH_COP_0_TLB_INDEX # check to be sure its valid - or k0, k0, VMMACH_TLB_MOD_BIT # update TLB - blt k1, zero, 4f # not found!!! - mtc0 k0, MACH_COP_0_TLB_LOW - li k1, MACH_CACHED_MEMORY_ADDR - subu k0, k0, k1 - srl k0, k0, VMMACH_TLB_PHYS_PAGE_SHIFT - la k1, pmap_attributes - addu k0, k0, k1 - lbu k1, 0(k0) # fetch old value - nop - or k1, k1, 1 # set modified bit - sb k1, 0(k0) # save new value - mfc0 k0, MACH_COP_0_EXC_PC # get return address - nop - j k0 - rfe -4: - break 0 # panic - .set at -END(MachTLBModException) -#endif - -/*---------------------------------------------------------------------------- - * - * MachTLBMissException -- - * - * Handle a TLB miss exception from kernel mode. - * The BaddVAddr, Context, and EntryHi registers contain the failed - * virtual address. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NLEAF(MachTLBMissException) -ALEAF(mips_r2000_TLBMissException) - .set noat - mfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address - li k1, VM_MIN_KERNEL_ADDRESS # compute index - subu k0, k0, k1 - lw k1, _C_LABEL(Sysmapsize) # index within range? - srl k0, k0, PGSHIFT - sltu k1, k0, k1 - beq k1, zero, 1f # No. check for valid stack - nop - lw k1, _C_LABEL(Sysmap) - sll k0, k0, 2 # compute offset from index - addu k1, k1, k0 - lw k0, 0(k1) # get PTE entry - mfc0 k1, MACH_COP_0_EXC_PC # get return address - mtc0 k0, MACH_COP_0_TLB_LOW # save PTE entry - and k0, k0, PG_V # check for valid entry - beq k0, zero, _C_LABEL(MachKernGenException) # PTE invalid - nop - tlbwr # update TLB - j k1 - rfe - -1: - subu k0, sp, UADDR + 0x200 # check to see if we have a - sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack - bne k0, zero, _C_LABEL(MachKernGenException) # Go panic - nop - - la a0, start - START_FRAME - 8 # set sp to a valid place - sw sp, 24(a0) - move sp, a0 - la a0, 1f - mfc0 a2, MACH_COP_0_STATUS_REG - mfc0 a3, MACH_COP_0_CAUSE_REG - mfc0 a1, MACH_COP_0_EXC_PC - sw a2, 16(sp) - sw a3, 20(sp) - sw sp, 24(sp) - move a2, ra - jal _C_LABEL(printf) - mfc0 a3, MACH_COP_0_BAD_VADDR - .data -1: - .asciiz "ktlbmiss: PC %x RA %x ADR %x\nSR %x CR %x SP %x\n" - .text - - la sp, start - START_FRAME # set sp to a valid place - PANIC("kernel stack overflow") - .set at -END(MachTLBMissException) - - -/*-------------------------------------------------------------------------- - * - * MachTLBWriteIndexed -- - * - * Write the given entry into the TLB at the given index. - * - * MachTLBWriteIndexed(index, highEntry, lowEntry) - * int index; - * int highEntry; - * int lowEntry; - * - * Results: - * None. - * - * Side effects: - * TLB entry set. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBWriteIndexed) -ALEAF(mips_r2000_TLBWriteIndexed) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Save the current PID. - - sll a0, a0, VMMACH_TLB_INDEX_SHIFT - mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index. - mtc0 a1, MACH_COP_0_TLB_HI # Set up entry high. - mtc0 a2, MACH_COP_0_TLB_LOW # Set up entry low. - nop - tlbwi # Write the TLB - - mtc0 t0, MACH_COP_0_TLB_HI # Restore the PID. - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBWriteIndexed) - -#if 0 -/*-------------------------------------------------------------------------- - * - * MachTLBWriteRandom -- - * - * Write the given entry into the TLB at a random location. - * - * MachTLBWriteRandom(highEntry, lowEntry) - * unsigned highEntry; - * unsigned lowEntry; - * - * Results: - * None. - * - * Side effects: - * TLB entry set. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBWriteRandom) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 v0, MACH_COP_0_TLB_HI # Save the current PID. - nop - - mtc0 a0, MACH_COP_0_TLB_HI # Set up entry high. - mtc0 a1, MACH_COP_0_TLB_LOW # Set up entry low. - nop - tlbwr # Write the TLB - - mtc0 v0, MACH_COP_0_TLB_HI # Restore the PID. - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBWriteRandom) -#endif - -/*-------------------------------------------------------------------------- - * - * MachSetPID -- - * - * Write the given pid into the TLB pid reg. - * - * MachSetPID(pid) - * int pid; - * - * Results: - * None. - * - * Side effects: - * PID set in the entry hi register. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachSetPID) -ALEAF(mips_r2000_SetPID) - sll a0, a0, VMMACH_TLB_PID_SHIFT # put PID in right spot - mtc0 a0, MACH_COP_0_TLB_HI # Write the hi reg value - j ra - nop -END(MachSetPID) - -/*-------------------------------------------------------------------------- - * - * MachTLBFlush -- - * - * Flush the "random" entries from the TLB. - * - * MachTLBFlush() - * - * Results: - * None. - * - * Side effects: - * The TLB is flushed. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBFlush) -ALEAF(mips_r2000_TLBFlush) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Save the PID - li t1, MACH_CACHED_MEMORY_ADDR # invalid address - mtc0 t1, MACH_COP_0_TLB_HI # Mark entry high as invalid - mtc0 zero, MACH_COP_0_TLB_LOW # Zero out low entry. -/* - * Align the starting value (t1) and the upper bound (t2). - */ - li t1, VMMACH_FIRST_RAND_ENTRY << VMMACH_TLB_INDEX_SHIFT - li t2, VMMACH_NUM_TLB_ENTRIES << VMMACH_TLB_INDEX_SHIFT -1: - mtc0 t1, MACH_COP_0_TLB_INDEX # Set the index register. - addu t1, t1, 1 << VMMACH_TLB_INDEX_SHIFT # Increment index. - bne t1, t2, 1b - tlbwi # Write the TLB entry. - - mtc0 t0, MACH_COP_0_TLB_HI # Restore the PID - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBFlush) - -#if 0 -/*-------------------------------------------------------------------------- - * - * MachTLBFlushPID -- - * - * Flush all entries with the given PID from the TLB. - * - * MachTLBFlushPID(pid) - * int pid; - * - * Results: - * None. - * - * Side effects: - * All entries corresponding to this PID are flushed. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBFlushPID) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Save the current PID - sll a0, a0, VMMACH_TLB_PID_SHIFT # Align the pid to flush. -/* - * Align the starting value (t1) and the upper bound (t2). - */ - li t1, VMMACH_FIRST_RAND_ENTRY << VMMACH_TLB_INDEX_SHIFT - li t2, VMMACH_NUM_TLB_ENTRIES << VMMACH_TLB_INDEX_SHIFT - mtc0 t1, MACH_COP_0_TLB_INDEX # Set the index register -1: - addu t1, t1, 1 << VMMACH_TLB_INDEX_SHIFT # Increment index. - tlbr # Read from the TLB - mfc0 t4, MACH_COP_0_TLB_HI # Fetch the hi register. - nop - and t4, t4, VMMACH_TLB_PID # compare PIDs - bne t4, a0, 2f - li v0, MACH_CACHED_MEMORY_ADDR # invalid address - mtc0 v0, MACH_COP_0_TLB_HI # Mark entry high as invalid - mtc0 zero, MACH_COP_0_TLB_LOW # Zero out low entry. - nop - tlbwi # Write the entry. -2: - bne t1, t2, 1b - mtc0 t1, MACH_COP_0_TLB_INDEX # Set the index register - - mtc0 t0, MACH_COP_0_TLB_HI # restore PID - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBFlushPID) -#endif - -/*-------------------------------------------------------------------------- - * - * MachTLBFlushAddr -- - * - * Flush any TLB entries for the given address and TLB PID. - * - * MachTLBFlushAddr(highreg) - * unsigned highreg; - * - * Results: - * None. - * - * Side effects: - * The process's page is flushed from the TLB. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBFlushAddr) -ALEAF(mips_r2000_TLBFlushAddr) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Get current PID - nop - - mtc0 a0, MACH_COP_0_TLB_HI # look for addr & PID - nop - tlbp # Probe for the entry. - mfc0 v0, MACH_COP_0_TLB_INDEX # See what we got - li t1, MACH_CACHED_MEMORY_ADDR # Load invalid entry. - bltz v0, 1f # index < 0 => !found - mtc0 t1, MACH_COP_0_TLB_HI # Mark entry high as invalid - mtc0 zero, MACH_COP_0_TLB_LOW # Zero out low entry. - nop - tlbwi -1: - mtc0 t0, MACH_COP_0_TLB_HI # restore PID - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBFlushAddr) - -/*-------------------------------------------------------------------------- - * - * MachTLBUpdate -- - * - * Update the TLB if highreg is found; otherwise, enter the data. - * - * MachTLBUpdate(highreg, lowreg) - * unsigned highreg, lowreg; - * - * Results: - * None. - * - * Side effects: - * None. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBUpdate) -ALEAF(mips_r2000_TLBUpdate) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Save current PID - nop # 2 cycles before intr disabled - mtc0 a0, MACH_COP_0_TLB_HI # init high reg. - nop - tlbp # Probe for the entry. - mfc0 v0, MACH_COP_0_TLB_INDEX # See what we got - mtc0 a1, MACH_COP_0_TLB_LOW # init low reg. - bltz v0, 1f # index < 0 => !found - sra v0, v0, VMMACH_TLB_INDEX_SHIFT # convert index to regular num - b 2f - tlbwi # update slot found -1: - mtc0 a0, MACH_COP_0_TLB_HI # init high reg. - nop - tlbwr # enter into a random slot -2: - mtc0 t0, MACH_COP_0_TLB_HI # restore PID - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBUpdate) - -/*-------------------------------------------------------------------------- - * - * MachTLBFind -- - * - * Search the TLB for the given entry. - * - * MachTLBFind(hi) - * unsigned hi; - * - * Results: - * Returns a value >= 0 if the entry was found (the index). - * Returns a value < 0 if the entry was not found. - * - * Side effects: - * tlbhi and tlblo will contain the TLB entry found. - * - *-------------------------------------------------------------------------- - */ - .comm tlbhi, 4 - .comm tlblo, 4 -LEAF(MachTLBFind) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Get current PID - nop - mtc0 a0, MACH_COP_0_TLB_HI # Set up entry high. - nop - tlbp # Probe for the entry. - mfc0 v0, MACH_COP_0_TLB_INDEX # See what we got - nop - bltz v0, 1f # not found - nop - tlbr # read TLB - mfc0 t1, MACH_COP_0_TLB_HI # See what we got - mfc0 t2, MACH_COP_0_TLB_LOW # See what we got - sw t1, tlbhi - sw t2, tlblo - srl v0, v0, VMMACH_TLB_INDEX_SHIFT # convert index to regular num -1: - mtc0 t0, MACH_COP_0_TLB_HI # Restore current PID - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBFind) - -/*-------------------------------------------------------------------------- - * - * MachTLBRead -- - * - * Read the TLB entry. - * - * MachTLBRead(entry) - * unsigned entry; - * - * Results: - * None. - * - * Side effects: - * tlbhi and tlblo will contain the TLB entry found. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBRead) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t0, MACH_COP_0_TLB_HI # Get current PID - - sll a0, a0, VMMACH_TLB_INDEX_SHIFT - mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index register - nop - tlbr # Read from the TLB - mfc0 t3, MACH_COP_0_TLB_HI # fetch the hi entry - mfc0 t4, MACH_COP_0_TLB_LOW # fetch the low entry - sw t3, tlbhi - sw t4, tlblo - - mtc0 t0, MACH_COP_0_TLB_HI # restore PID - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBRead) - -/*-------------------------------------------------------------------------- - * - * MachTLBGetPID -- - * - * MachTLBGetPID() - * - * Results: - * Returns the current TLB pid reg. - * - * Side effects: - * None. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBGetPID) - mfc0 v0, MACH_COP_0_TLB_HI # get PID - nop - and v0, v0, VMMACH_TLB_PID # mask off PID - j ra - srl v0, v0, VMMACH_TLB_PID_SHIFT # put PID in right spot -END(MachTLBGetPID) - - -/*---------------------------------------------------------------------------- - * - * R3000 cache sizing and flushing code. - * - *---------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------- - * - * MachConfigCache -- - * - * Size the caches. - * NOTE: should only be called from mach_init(). - * - * Results: - * None. - * - * Side effects: - * The size of the data cache is stored into machDataCacheSize and the - * size of instruction cache is stored into machInstCacheSize. - * - *---------------------------------------------------------------------------- - */ -NON_LEAF(MachConfigCache, STAND_FRAME_SIZE, ra) -ALEAF(mips_r2000_ConfigCache) - subu sp, sp, STAND_FRAME_SIZE - sw ra, STAND_RA_OFFSET(sp) # Save return address. - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. - la v0, 1f - or v0, MACH_UNCACHED_MEMORY_ADDR # Run uncached. - j v0 - nop -1: -/* - * This works because jal doesn't change pc[31..28] and the - * linker still thinks SizeCache is in the cached region so it computes - * the correct address without complaining. - */ - jal _C_LABEL(SizeCache) # Get the size of the d-cache. - nop - sw v0, _C_LABEL(machDataCacheSize) - nop # Make sure sw out of pipe - nop - nop - nop - li v0, MACH_SR_SWAP_CACHES # Swap caches - mtc0 v0, MACH_COP_0_STATUS_REG - nop # Insure caches stable - nop - nop - nop - jal _C_LABEL(SizeCache) # Get the size of the i-cache. - nop - mtc0 zero, MACH_COP_0_STATUS_REG # Swap back caches and enable. - nop - nop - nop - nop - sw v0, _C_LABEL(machInstCacheSize) - la t0, 1f - j t0 # Back to cached mode - nop -1: - lw ra, STAND_RA_OFFSET(sp) # Restore return addr - addu sp, sp, STAND_FRAME_SIZE # Restore sp. - j ra - nop -END(MachConfigCache) - -/*---------------------------------------------------------------------------- - * - * SizeCache -- - * - * Get the size of the cache. - * - * Results: - * The size of the cache. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -LEAF(SizeCache) -ALEAF(mips_r2000_SizeCache) - mfc0 t0, MACH_COP_0_STATUS_REG # Save the current status reg. - nop - or v0, t0, MACH_SR_ISOL_CACHES # Isolate the caches. - nop # Make sure no stores in pipe - mtc0 v0, MACH_COP_0_STATUS_REG - nop # Make sure isolated - nop - nop -/* - * Clear cache size boundaries. - */ - li v0, MACH_MIN_CACHE_SIZE - li v1, MACH_CACHED_MEMORY_ADDR - li t2, MACH_MAX_CACHE_SIZE -1: - addu t1, v0, v1 # Compute address to clear - sw zero, 0(t1) # Clear cache memory - bne v0, t2, 1b - sll v0, v0, 1 - - li v0, -1 - sw v0, 0(v1) # Store marker in cache - li v0, MACH_MIN_CACHE_SIZE -2: - addu t1, v0, v1 # Compute address - lw t3, 0(t1) # Look for marker - nop - bne t3, zero, 3f # Found marker. - nop - bne v0, t2, 2b # keep looking - sll v0, v0, 1 # cache size * 2 - - move v0, zero # must be no cache -3: - mtc0 t0, MACH_COP_0_STATUS_REG - nop # Make sure unisolated - nop - nop - nop - j ra - nop -END(SizeCache) - -/*---------------------------------------------------------------------------- - * - * MachFlushCache -- - * - * Flush the caches. - * - * Results: - * None. - * - * Side effects: - * The contents of the caches is flushed. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachFlushCache) -ALEAF(mips_r2000_FlushCache) - lw t1, _C_LABEL(machInstCacheSize) # Must load before isolating - lw t2, _C_LABEL(machDataCacheSize) # Must load before isolating - mfc0 t3, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. - la v0, 1f - or v0, MACH_UNCACHED_MEMORY_ADDR # Run uncached. - j v0 - nop -/* - * Flush the instruction cache. - */ -1: - li v0, MACH_SR_ISOL_CACHES | MACH_SR_SWAP_CACHES - mtc0 v0, MACH_COP_0_STATUS_REG # Isolate and swap caches. - li t0, MACH_UNCACHED_MEMORY_ADDR - subu t0, t0, t1 - li t1, MACH_UNCACHED_MEMORY_ADDR - la v0, 1f # Run cached - j v0 - nop -1: - addu t0, t0, 4 - bne t0, t1, 1b - sb zero, -4(t0) - - la v0, 1f - or v0, MACH_UNCACHED_MEMORY_ADDR - j v0 # Run uncached - nop -/* - * Flush the data cache. - */ -1: - li v0, MACH_SR_ISOL_CACHES - mtc0 v0, MACH_COP_0_STATUS_REG # Isolate and swap back caches - li t0, MACH_UNCACHED_MEMORY_ADDR - subu t0, t0, t2 - la v0, 1f - j v0 # Back to cached mode - nop -1: - addu t0, t0, 4 - bne t0, t1, 1b - sb zero, -4(t0) - - nop # Insure isolated stores - nop # out of pipe. - nop - nop - mtc0 t3, MACH_COP_0_STATUS_REG # Restore status reg. - nop # Insure cache unisolated. - nop - nop - nop - j ra - nop -END(MachFlushCache) - -/*---------------------------------------------------------------------------- - * - * MachFlushICache -- - * - * void MachFlushICache(addr, len) - * vm_offset_t addr, len; - * - * Flush instruction cache for range of addr to addr + len - 1. - * The address can be any valid address so long as no TLB misses occur. - * - * Results: - * None. - * - * Side effects: - * The contents of the cache is flushed. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachFlushICache) -ALEAF(mips_r2000_FlushICache) - mfc0 t0, MACH_COP_0_STATUS_REG # Save SR - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. - - la v1, 1f - or v1, MACH_UNCACHED_MEMORY_ADDR # Run uncached. - j v1 - nop -1: - bc0f 1b # make sure stores are complete - li v1, MACH_SR_ISOL_CACHES | MACH_SR_SWAP_CACHES - mtc0 v1, MACH_COP_0_STATUS_REG - nop - addu a1, a1, a0 # compute ending address -1: - addu a0, a0, 4 - bne a0, a1, 1b - sb zero, -4(a0) - - mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts - j ra # return and run cached - nop -END(MachFlushICache) - -/*---------------------------------------------------------------------------- - * - * MachFlushDCache -- - * - * void MachFlushDCache(addr, len) - * vm_offset_t addr, len; - * - * Flush data cache for range of addr to addr + len - 1. - * The address can be any valid address so long as no TLB misses occur. - * (Be sure to use cached K0SEG kernel addresses) - * Results: - * None. - * - * Side effects: - * The contents of the cache is flushed. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachFlushDCache) -ALEAF(mips_r2000_FlushDCache) - mfc0 t0, MACH_COP_0_STATUS_REG # Save SR - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. - nop -1: - bc0f 1b # make sure stores are complete -# BUG: should drain write buffer. -# The insn above does not work on some all DEC machines, or all variants -# of the mips architecture. - li v1, MACH_SR_ISOL_CACHES - mtc0 v1, MACH_COP_0_STATUS_REG - nop - addu t1, a1, a0 # compute ending address -1: - sb zero, 0(a0) - sb zero, 4(a0) - sb zero, 8(a0) - sb zero, 12(a0) - sb zero, 16(a0) - sb zero, 20(a0) - sb zero, 24(a0) - addu a0, 32 - bltu a0, t1, 1b - sb zero, -4(a0) - - nop # drain pipeline - nop - mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts - nop - j ra # return and run cached - nop -END(MachFlushDCache) - -/*---------------------------------------------------------------------------- - * - * XXX END of r3000-specific code XXX - * - *---------------------------------------------------------------------------- - */ - - - -#ifdef notyet /* XXX -- r4000 support, not yet */ - - -/*---------------------------------------------------------------------------- - * - * XXX START of r4000-specific code XXX - * - *---------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------- - * - * R4000 TLB exception handlers - * - *---------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------- - * - * MachTLBMInvalidException -- - * - * Handle a TLB invalid exception from kernel mode in kernel space. - * The BaddVAddr, Context, and EntryHi registers contain the failed - * virtual address. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NLEAF(MachTLBInvalidException) - .set noat - dmfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address - li k1, VM_MIN_KERNEL_ADDRESS # compute index - subu k0, k0, k1 - lw k1, Sysmapsize # index within range? - srl k0, k0, PGSHIFT - sltu k1, k0, k1 - beq k1, zero, sys_stk_chk # No. check for valid stack - lw k1, Sysmap - - sll k0, k0, 2 # compute offset from index - tlbp # Probe the invalid entry - addu k1, k1, k0 - and k0, k0, 4 # check even/odd page - bne k0, zero, KernTLBIOdd - nop - - mfc0 k0, MACH_COP_0_TLB_INDEX - nop - bltz k0, sys_stk_chk - sltiu k0, k0, 8 - - bne k0, zero, sys_stk_chk - lw k0, 0(k1) # get PTE entry - - dsll k0, k0, 34 # get rid of "wired" bit - dsrl k0, k0, 34 - dmtc0 k0, MACH_COP_0_TLB_LO0 # load PTE entry - and k0, k0, PG_V # check for valid entry - beq k0, zero, MachKernGenException # PTE invalid - lw k0, 4(k1) # get odd PTE entry - dsll k0, k0, 34 - dsrl k0, k0, 34 - dmtc0 k0, MACH_COP_0_TLB_LO1 # load PTE entry - nop - tlbwi # write TLB - nop - nop - nop - nop - nop - eret - -KernTLBIOdd: - mfc0 k0, MACH_COP_0_TLB_INDEX - nop - bltz k0, sys_stk_chk - sltiu k0, k0, 8 - - bne k0, zero, sys_stk_chk - lw k0, 0(k1) # get PTE entry - - dsll k0, k0, 34 # get rid of wired bit - dsrl k0, k0, 34 - dmtc0 k0, MACH_COP_0_TLB_LO1 # save PTE entry - and k0, k0, PG_V # check for valid entry - beq k0, zero, MachKernGenException # PTE invalid - lw k0, -4(k1) # get even PTE entry - dsll k0, k0, 34 - dsrl k0, k0, 34 - dmtc0 k0, MACH_COP_0_TLB_LO0 # save PTE entry - nop - tlbwi # update TLB - nop - nop - nop - nop - nop - eret -END(MachTLBInvalidException) - -/*---------------------------------------------------------------------------- - * - * MachTLBMissException -- - * - * Handle a TLB miss exception from kernel mode in kernel space. - * The BaddVAddr, Context, and EntryHi registers contain the failed - * virtual address. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NLEAF(MachTLBMissException) - .set noat - dmfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address - li k1, VM_MIN_KERNEL_ADDRESS # compute index - subu k0, k0, k1 - lw k1, Sysmapsize # index within range? - srl k0, k0, PGSHIFT - sltu k1, k0, k1 - beq k1, zero, sys_stk_chk # No. check for valid stack - lw k1, Sysmap - srl k0, k0, 1 - sll k0, k0, 3 # compute offset from index - addu k1, k1, k0 - lw k0, 0(k1) # get PTE entry - lw k1, 4(k1) # get odd PTE entry - dsll k0, k0, 34 # get rid of "wired" bit - dsrl k0, k0, 34 - dmtc0 k0, MACH_COP_0_TLB_LO0 # load PTE entry - dsll k1, k1, 34 - dsrl k1, k1, 34 - dmtc0 k1, MACH_COP_0_TLB_LO1 # load PTE entry - nop - tlbwr # write TLB - nop - nop - nop - nop - nop - eret - -sys_stk_chk: - subu k0, sp, UADDR + 0x200 # check to see if we have a - sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack - bne k0, zero, MachKernGenException # Go panic - nop - - la a0, start - START_FRAME - 8 # set sp to a valid place - sw sp, 24(a0) - move sp, a0 - la a0, 1f - mfc0 a2, MACH_COP_0_STATUS_REG - mfc0 a3, MACH_COP_0_CAUSE_REG - dmfc0 a1, MACH_COP_0_EXC_PC - sw a2, 16(sp) - sw a3, 20(sp) - move a2, ra - jal printf - dmfc0 a3, MACH_COP_0_BAD_VADDR - .data -1: - .asciiz "ktlbmiss: PC %x RA %x ADR %x\nSR %x CR %x SP %x\n" - .text - - la sp, start - START_FRAME # set sp to a valid place - PANIC("kernel stack overflow") - .set at -END(MachTLBMissException) - - -/*-------------------------------------------------------------------------- - * - * MachTLBWriteIndexed -- - * - * Write the given entry into the TLB at the given index. - * - * MachTLBWriteIndexed(index, tlb) - * unsigned index; - * tlb *tlb; - * - * Results: - * None. - * - * Side effects: - * TLB entry set. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBWriteIndexed) -ALEAF(mips_r2000_TLBWriteIndexed) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - nop - lw a2, 8(a1) - lw a3, 12(a1) - dmfc0 t0, MACH_COP_0_TLB_HI # Save the current PID. - - dmtc0 a2, MACH_COP_0_TLB_LO0 # Set up entry low0. - dmtc0 a3, MACH_COP_0_TLB_LO1 # Set up entry low1. - lw a2, 0(a1) - lw a3, 4(a1) - mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index. - dmtc0 a2, MACH_COP_0_TLB_PG_MASK # Set up entry mask. - dmtc0 a3, MACH_COP_0_TLB_HI # Set up entry high. - nop - tlbwi # Write the TLB - nop - nop - nop # Delay for effect - nop - - dmtc0 t0, MACH_COP_0_TLB_HI # Restore the PID. - nop - dmtc0 zero, MACH_COP_0_TLB_PG_MASK # Default mask value. - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBWriteIndexed) - -/*-------------------------------------------------------------------------- - * - * MachSetPID -- - * - * Write the given pid into the TLB pid reg. - * - * MachSetPID(pid) - * int pid; - * - * Results: - * None. - * - * Side effects: - * PID set in the entry hi register. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachSetPID) - dmtc0 a0, MACH_COP_0_TLB_HI # Write the hi reg value - j ra - nop -END(MachSetPID) - -/*-------------------------------------------------------------------------- - * - * MachSetWIRED -- - * - * Write the given value into the TLB wired reg. - * - * MachSetPID(wired) - * int wired; - * - * Results: - * None. - * - * Side effects: - * WIRED set in the wired register. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachSetWIRED) - mtc0 a0, MACH_COP_0_TLB_WIRED - j ra - nop -END(MachSetWIRED) - -/*-------------------------------------------------------------------------- - * - * MachGetWIRED -- - * - * Get the value from the TLB wired reg. - * - * MachGetWIRED(void) - * - * Results: - * Value of wired reg. - * - * Side effects: - * None. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachGetWIRED) - mfc0 v0, MACH_COP_0_TLB_WIRED - j ra - nop -END(MachGetWIRED) - -/*-------------------------------------------------------------------------- - * - * MachTLBFlush -- - * - * Flush the "random" entries from the TLB. - * Uses "wired" register to determine what register to start with. - * - * MachTLBFlush() - * - * Results: - * None. - * - * Side effects: - * The TLB is flushed. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBFlush) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - mfc0 t1, MACH_COP_0_TLB_WIRED - li t2, VMMACH_NUM_TLB_ENTRIES - li v0, MACH_CACHED_MEMORY_ADDR # invalid address - dmfc0 t0, MACH_COP_0_TLB_HI # Save the PID - - dmtc0 v0, MACH_COP_0_TLB_HI # Mark entry high as invalid - dmtc0 zero, MACH_COP_0_TLB_LO0 # Zero out low entry0. - dmtc0 zero, MACH_COP_0_TLB_LO1 # Zero out low entry1. - mtc0 zero, MACH_COP_0_TLB_PG_MASK # Zero out mask entry. -/* - * Align the starting value (t1) and the upper bound (t2). - */ -1: - mtc0 t1, MACH_COP_0_TLB_INDEX # Set the index register. - addu t1, t1, 1 # Increment index. - tlbwi # Write the TLB entry. - nop - nop - bne t1, t2, 1b - nop - - dmtc0 t0, MACH_COP_0_TLB_HI # Restore the PID - j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBFlush) - - -/*-------------------------------------------------------------------------- - * - * MachTLBFlushAddr -- - * - * Flush any TLB entries for the given address and TLB PID. - * - * MachTLBFlushAddr(TLBhi) - * unsigned TLBhi; - * - * Results: - * None. - * - * Side effects: - * The process's page is flushed from the TLB. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBFlushAddr) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - nop - li v0, (PG_HVPN | PG_ASID) - and a0, a0, v0 # Make shure valid hi value. - dmfc0 t0, MACH_COP_0_TLB_HI # Get current PID - dmtc0 a0, MACH_COP_0_TLB_HI # look for addr & PID - nop - nop - nop - tlbp # Probe for the entry. - nop - nop # Delay for effect - nop - mfc0 v0, MACH_COP_0_TLB_INDEX # See what we got - li t1, MACH_CACHED_MEMORY_ADDR # Load invalid entry. - bltz v0, 1f # index < 0 => !found - nop - dmtc0 t1, MACH_COP_0_TLB_HI # Mark entry high as invalid - - dmtc0 zero, MACH_COP_0_TLB_LO0 # Zero out low entry. - dmtc0 zero, MACH_COP_0_TLB_LO1 # Zero out low entry. - nop - tlbwi - nop - nop - nop - nop -1: - dmtc0 t0, MACH_COP_0_TLB_HI # restore PID +LEAF(splsoftnet) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBFlushAddr) - -/*-------------------------------------------------------------------------- - * - * MachTLBUpdate -- - * - * Update the TLB if highreg is found; otherwise, enter the data. - * - * MachTLBUpdate(virpageadr, lowregx) - * unsigned virpageadr, lowregx; - * - * Results: - * < 0 if loaded >= 0 if updated. - * - * Side effects: - * None. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBUpdate) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - and t1, a0, 0x1000 # t1 = Even/Odd flag - li v0, (PG_HVPN | PG_ASID) - and a0, a0, v0 - dmfc0 t0, MACH_COP_0_TLB_HI # Save current PID - dmtc0 a0, MACH_COP_0_TLB_HI # Init high reg - and a2, a1, PG_G # Copy global bit - nop - nop - tlbp # Probe for the entry. - dsll a1, a1, 34 - dsrl a1, a1, 34 - bne t1, zero, 2f # Decide even odd - mfc0 v0, MACH_COP_0_TLB_INDEX # See what we got -# EVEN - nop - bltz v0, 1f # index < 0 => !found - nop - - tlbr # update, read entry first - nop - nop - nop - dmtc0 a1, MACH_COP_0_TLB_LO0 # init low reg0. - nop - tlbwi # update slot found - b 4f - nop -1: - mtc0 zero, MACH_COP_0_TLB_PG_MASK # init mask. - dmtc0 a0, MACH_COP_0_TLB_HI # init high reg. - dmtc0 a1, MACH_COP_0_TLB_LO0 # init low reg0. - dmtc0 a2, MACH_COP_0_TLB_LO1 # init low reg1. - nop - tlbwr # enter into a random slot - b 4f - nop -# ODD -2: - nop - bltz v0, 3f # index < 0 => !found - nop - - tlbr # read the entry first - nop - nop - nop - dmtc0 a1, MACH_COP_0_TLB_LO1 # init low reg1. - nop - tlbwi # update slot found - b 4f - nop -3: - mtc0 zero, MACH_COP_0_TLB_PG_MASK # init mask. - dmtc0 a0, MACH_COP_0_TLB_HI # init high reg. - dmtc0 a2, MACH_COP_0_TLB_LO0 # init low reg0. - dmtc0 a1, MACH_COP_0_TLB_LO1 # init low reg1. - nop - tlbwr # enter into a random slot + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(splsoftnet) -4: # Make shure pipeline - nop # advances before we - nop # uses the tlb. - nop - nop - dmtc0 t0, MACH_COP_0_TLB_HI # restore PID +LEAF(Mach_spl0) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_0|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(MachTLBUpdate) - -/*-------------------------------------------------------------------------- - * - * MachTLBRead -- - * - * Read the TLB entry. - * - * MachTLBRead(entry, tlb) - * unsigned entry; - * struct tlb *tlb; - * - * Results: - * None. - * - * Side effects: - * tlb will contain the TLB entry found. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBRead) - mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. - mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts - nop - nop - nop - dmfc0 t0, MACH_COP_0_TLB_HI # Get current PID + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl0) - mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index register - nop - tlbr # Read from the TLB - nop - nop - nop - mfc0 t2, MACH_COP_0_TLB_PG_MASK # fetch the hi entry - dmfc0 t3, MACH_COP_0_TLB_HI # fetch the hi entry - dmfc0 t4, MACH_COP_0_TLB_LO0 # See what we got - dmfc0 t5, MACH_COP_0_TLB_LO1 # See what we got - dmtc0 t0, MACH_COP_0_TLB_HI # restore PID - nop - nop - nop # wait for PID active - mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register - sw t2, 0(a1) - sw t3, 4(a1) - sw t4, 8(a1) +LEAF(Mach_spl1) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_1|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - sw t5, 12(a1) -END(MachTLBRead) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl1) -/*-------------------------------------------------------------------------- - * - * MachTLBGetPID -- - * - * MachTLBGetPID() - * - * Results: - * Returns the current TLB pid reg. - * - * Side effects: - * None. - * - *-------------------------------------------------------------------------- - */ -LEAF(MachTLBGetPID) - dmfc0 v0, MACH_COP_0_TLB_HI # get PID +LEAF(Mach_spl2) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_2|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 j ra - and v0, v0, VMMACH_TLB_PID # mask off PID -END(MachTLBGetPID) - - + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl2) -/*---------------------------------------------------------------------------- - * - * R4000 cache sizing and flushing code. - * - *---------------------------------------------------------------------------- - */ +LEAF(Mach_spl3) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_3|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 + j ra + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl3) +LEAF(Mach_spl4) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_4|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable + j ra + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl4) -/*---------------------------------------------------------------------------- - * - * MachConfigCache -- - * - * Size the caches. - * NOTE: should only be called from mach_init(). - * - * Results: - * None. - * - * Side effects: - * The size of the data cache is stored into machPrimaryDataCacheSize. - * The size of instruction cache is stored into machPrimaryInstCacheSize. - * Alignment mask for cache aliasing test is stored in machCacheAliasMask. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachConfigCache) - mfc0 v0, MACH_COP_0_CONFIG # Get configuration register - nop - srl t1, v0, 9 # Get I cache size. - and t1, 3 - li t2, 4096 - sllv t2, t2, t1 - sw t2, machPrimaryDataCacheSize - addiu t2, -1 - and t2, ~(NBPG - 1) - sw t2, machCacheAliasMask - - and t2, v0, 0x20 - srl t2, t2, 1 - addu t2, t2, 16 - sw t2, machPrimaryDataCacheLSize - - srl t1, v0, 6 # Get I cache size. - and t1, 3 - li t2, 4096 - sllv t2, t2, t1 - sw t2, machPrimaryInstCacheSize - - and t2, v0, 0x10 - addu t2, t2, 16 - sw t2, machPrimaryInstCacheLSize +LEAF(Mach_spl5) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~(MACH_INT_MASK_5|MACH_SOFT_INT_MASK_1|MACH_SOFT_INT_MASK_0) + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable j ra - nop -END(MachConfigCache) + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(Mach_spl5) + -/*---------------------------------------------------------------------------- - * - * MachFlushCache -- - * - * Flush the caches. Assumes a line size of 16 bytes for speed. - * - * Results: - * None. - * - * Side effects: - * The contents of the caches is flushed. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachFlushCache) - lw t1, machPrimaryInstCacheSize - lw t2, machPrimaryDataCacheSize - # lw t3, machPrimaryInstCacheLSize - # lw t4, machPrimaryDataCacheLSize /* - * Flush the instruction cache. + * We define an alternate entry point after mcount is called so it + * can be used in mcount without causeing a recursive loop. */ - li t0, MACH_CACHED_MEMORY_ADDR - addu t1, t0, t1 # End address - subu t1, t1, 128 -1: - cache 0, 0(t0) - cache 0, 16(t0) - cache 0, 32(t0) - cache 0, 48(t0) - cache 0, 64(t0) - cache 0, 80(t0) - cache 0, 96(t0) - cache 0, 112(t0) - bne t0, t1, 1b - addu t0, t0, 128 +LEAF(splhigh) +ALEAF(_splhigh) + mfc0 v0, MACH_COP_0_STATUS_REG # read status register + li t0, ~MIPS_SR_INT_IE # disable all interrupts + and t0, t0, v0 + mtc0 t0, MACH_COP_0_STATUS_REG # save it + nop # 3 ins to disable on r4x00 + j ra + and v0, v0, (MACH_INT_MASK | MIPS_SR_INT_IE) +END(splhigh) /* - * Flush the data cache. + * Restore saved interrupt mask. */ - li t0, MACH_CACHED_MEMORY_ADDR - addu t1, t0, t2 # End address - subu t1, t1, 128 -1: - cache 1, 0(t0) - cache 1, 16(t0) - cache 1, 32(t0) - cache 1, 48(t0) - cache 1, 64(t0) - cache 1, 80(t0) - cache 1, 96(t0) - cache 1, 112(t0) - bne t0, t1, 1b - addu t0, t0, 128 - +LEAF(splx) +ALEAF(_splx) + mfc0 v0, MACH_COP_0_STATUS_REG + li t0, ~(MACH_INT_MASK | MIPS_SR_INT_IE) + and t0, t0, v0 + or t0, t0, a0 + mtc0 t0, MACH_COP_0_STATUS_REG + nop # 3 ins to disable j ra nop -END(MachFlushCache) +END(splx) /*---------------------------------------------------------------------------- * - * MachFlushICache -- + * wbflush -- * - * void MachFlushICache(addr, len) - * vm_offset_t addr, len; + * Return when the write buffer is empty. * - * Flush instruction cache for range of addr to addr + len - 1. - * The address can be any valid address so long as no TLB misses occur. - * Assumes a cache line size of 16 bytes for speed. + * wbflush() + * MachEmptyWriteBuffer() [[backwards compatibility]] * * Results: * None. * * Side effects: - * The contents of the cache is flushed. - * Must not touch v0. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachFlushICache) - addu a1, 127 # Align - srl a1, a1, 7 # Number of unrolled loops -1: - cache 0, 0(a0) - cache 0, 16(a0) - cache 0, 32(a0) - cache 0, 48(a0) - cache 0, 64(a0) - cache 0, 80(a0) - cache 0, 96(a0) - cache 0, 112(a0) - addu a1, -1 - bne a1, zero, 1b - addu a0, 128 - - j ra - nop -END(MachFlushICache) - -/*---------------------------------------------------------------------------- - * - * MachFlushDCache -- - * - * void MachFlushDCache(addr, len) - * vm_offset_t addr, len; - * - * Flush data cache for index range of addr to addr + len - 1. - * The address is reduced to a kseg0 index. - * - * Results: * None. * - * Side effects: - * The contents of the cache is written back to primary memory. - * The cache line is invalidated. - * *---------------------------------------------------------------------------- */ -LEAF(MachFlushDCache) -ALEAF(mips_r2000_FlushDCache) - lw a2, machPrimaryDataCacheSize - addiu a2, -1 - and a0, a0, a2 - addu a1, 127 # Align - li a2, 0x80000000 - addu a0, a0, a2 - addu a1, a1, a0 - and a0, a0, -128 - subu a1, a1, a0 - srl a1, a1, 7 # Compute number of cache lines -1: - cache 1, 0(a0) - cache 1, 16(a0) - cache 1, 32(a0) - cache 1, 48(a0) - cache 1, 64(a0) - cache 1, 80(a0) - cache 1, 96(a0) - cache 1, 112(a0) - addu a1, -1 - bne a1, zero, 1b - addu a0, 128 - - j ra +LEAF(wbflush) +ALEAF(MachEmptyWriteBuffer) nop -END(MachFlushDCache) - -/*---------------------------------------------------------------------------- - * - * MachHitFlushDCache -- - * - * void MachHitFlushDCache(addr, len) - * vm_offset_t addr, len; - * - * Flush data cache for range of addr to addr + len - 1. - * The address can be any valid viritual address as long - * as no TLB invalid traps occur. Only lines with matching - * addr is flushed. - * - * Results: - * None. - * - * Side effects: - * The contents of the cache is written back to primary memory. - * The cache line is invalidated. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachHitFlushDCache) - beq a1, zero, 2f - addu a1, 127 # Align - addu a1, a1, a0 - and a0, a0, -128 - subu a1, a1, a0 - srl a1, a1, 7 # Compute number of cache lines -1: - cache 0x15, 0(a0) - cache 0x15, 16(a0) - cache 0x15, 32(a0) - cache 0x15, 48(a0) - cache 0x15, 64(a0) - cache 0x15, 80(a0) - cache 0x15, 96(a0) - cache 0x15, 112(a0) - addu a1, -1 - bne a1, zero, 1b - addu a0, 128 - -2: - j ra nop -END(MachHitFlushDCache) -/*---------------------------------------------------------------------------- - * - * MachInvalidateDCache -- - * - * void MachFlushDCache(addr, len) - * vm_offset_t addr, len; - * - * Flush data cache for range of addr to addr + len - 1. - * The address can be any valid address as long as no TLB misses occur. - * (Be sure to use cached K0SEG kernel addresses or mapped addresses) - * Results: - * None. - * - * Side effects: - * The cache line is invalidated. - * - *---------------------------------------------------------------------------- - */ -LEAF(MachInvalidateDCache) - addu a1, a1, a0 # compute ending address -1: - addu a0, a0, 4 - bne a0, a1, 1b - cache 0x11,-4(a0) - + nop + nop +1: bc0f 1b + nop j ra nop -END(MachInvalidateDCache) - -/*---------------------------------------------------------------------------- - * - * XXX END of r4000-specific code XXX - * - *---------------------------------------------------------------------------- - */ +END(MachEmptyWriteBuffer) -#endif /* XXX -- r4000 support, not yet */ + /*---------------------------------------------------------------------------- * @@ -3832,6 +1498,7 @@ L* return (*(long *)addr); L* } */ LEAF(kdbpeek) +ALEAF(mdbpeek) li v0, KADBERR sw v0, UADDR+U_PCB_ONFAULT and v0, a0, 3 # unaligned address? @@ -3865,6 +1532,7 @@ L* *(long *)addr = value; L* } */ LEAF(kdbpoke) +ALEAF(mdbpoke) li v0, KADBERR sw v0, UADDR+U_PCB_ONFAULT and v0, a0, 3 # unaligned address? @@ -3878,7 +1546,7 @@ LEAF(kdbpoke) and a0, a0, ~3 # align address for cache flush 2: sw zero, UADDR+U_PCB_ONFAULT - b MachFlushICache # flush instruction cache + b _C_LABEL(MachFlushICache) # flush instruction cache li a1, 8 END(kdbpoke) @@ -3898,6 +1566,7 @@ L* } .comm kdb_savearea, (11 * 4) LEAF(kdbsetexit) +ALEAF(mdbsetexit) la a0, kdb_savearea sw s0, 0(a0) sw s1, 4(a0) @@ -3924,6 +1593,7 @@ L* return (x); L* } */ LEAF(kdbreset) +ALEAF(mdbreset) la v0, kdb_savearea lw ra, 40(v0) lw s0, 0(v0) @@ -3949,6 +1619,7 @@ L* { L* } */ LEAF(kdbpanic) +ALEAF(mdbpanic) break MACH_BREAK_KDB_VAL j ra nop @@ -3962,38 +1633,7 @@ LEAF(cpu_getregs) sw s8, 8(a0) END(cpu_getregs) + /* - * Interrupt counters for vmstat. + * Port-specific locore code moved to sys/arch///locore_machdep.S */ - .data - .globl _C_LABEL(intrcnt) - .globl _C_LABEL(eintrcnt) - .globl _C_LABEL(intrnames) - .globl _C_LABEL(eintrnames) -_C_LABEL(intrnames): - .asciiz "softclock" - .asciiz "softnet" - .asciiz "serial0" - .asciiz "serial1" - .asciiz "serial2" - .asciiz "ether" - .asciiz "scsi" - .asciiz "memory" - .asciiz "clock" - .asciiz "fpu" - .asciiz "tcslot0" - .asciiz "tcslot1" - .asciiz "tcslot2" - .asciiz "dtop" - .asciiz "isdn" - .asciiz "floppy" - .asciiz "stray" - .asciiz "nmi" - .asciiz "lostclock" -_C_LABEL(eintrnames): - .align 2 -_C_LABEL(intrcnt): - .word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 -_C_LABEL(eintrcnt): - .word 0 # This shouldn't be needed but with 4.4bsd's as, the eintrcnt - # label ends end up in a different section otherwise. diff --git a/sys/arch/pmax/pmax/locore_machdep.S b/sys/arch/pmax/pmax/locore_machdep.S new file mode 100644 index 00000000000..b93d637541c --- /dev/null +++ b/sys/arch/pmax/pmax/locore_machdep.S @@ -0,0 +1,172 @@ +/* $NetBSD: locore_machdep.S,v 1.3 1996/10/22 20:46:09 mhitch Exp $ */ + +/* + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Digital Equipment Corporation and Ralph Campbell. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Copyright (C) 1989 Digital Equipment Corporation. + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose and without fee is hereby granted, + * provided that the above copyright notice appears in all copies. + * Digital Equipment Corporation makes no representations about the + * suitability of this software for any purpose. It is provided "as is" + * without express or implied warranty. + * + * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, + * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) + * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, + * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) + * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, + * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) + * + * @(#)locore.s 8.5 (Berkeley) 1/4/94 + */ + + +/* + * DEcstation-specific mips locore code. + */ + +#include + + .set noreorder + +/* + * Copy data to a DMA buffer padded with 16 bits of data, 16 + * bits of padding per 32bit word (e.g., for pmin/pmax sii (and lance) DMA). + * + * The DMA bufffer can only be written one short at a time + * (and takes ~14 cycles). + * + * CopyToBuffer(src, dst, length) + * u_short *src; NOTE: must be short aligned + * u_short *dst; + * int length; + */ +LEAF(CopyToBuffer) + blez a2, 2f + nop +1: + lhu t0, 0(a0) # read 2 bytes of data + subu a2, a2, 2 + addu a0, a0, 2 + addu a1, a1, 4 + bgtz a2, 1b + sh t0, -4(a1) # write 2 bytes of data to buffer +2: + j ra + nop +END(CopyToBuffer) + +/* + * Copy data from the DMA buffer. + * The DMA bufffer can only be read one short at a time + * (and takes ~12 cycles). + * + * CopyFromBuffer(src, dst, length) + * u_short *src; + * char *dst; + * int length; + */ +LEAF(CopyFromBuffer) + and t0, a1, 1 # test for aligned dst + beq t0, zero, 3f + nop + blt a2, 2, 7f # at least 2 bytes to copy? + nop +1: + lhu t0, 0(a0) # read 2 bytes of data from buffer + addu a0, a0, 4 # keep buffer pointer word aligned + addu a1, a1, 2 + subu a2, a2, 2 + sb t0, -2(a1) + srl t0, t0, 8 + bge a2, 2, 1b + sb t0, -1(a1) +3: + blt a2, 2, 7f # at least 2 bytes to copy? + nop +6: + lhu t0, 0(a0) # read 2 bytes of data from buffer + addu a0, a0, 4 # keep buffer pointer word aligned + addu a1, a1, 2 + subu a2, a2, 2 + bge a2, 2, 6b + sh t0, -2(a1) +7: + ble a2, zero, 9f # done? + nop + lhu t0, 0(a0) # copy one more byte + nop + sb t0, 0(a1) +9: + j ra + nop +END(CopyFromBuffer) + +/* + * Interrupt counters for vmstat. + */ + .data + .globl _C_LABEL(intrcnt) + .globl _C_LABEL(eintrcnt) + .globl _C_LABEL(intrnames) + .globl _C_LABEL(eintrnames) +_C_LABEL(intrnames): + .asciiz "softclock" + .asciiz "softnet" + .asciiz "serial0" + .asciiz "serial1" + .asciiz "serial2" + .asciiz "ether" + .asciiz "scsi" + .asciiz "memory" + .asciiz "clock" + .asciiz "fpu" + .asciiz "tcslot0" + .asciiz "tcslot1" + .asciiz "tcslot2" + .asciiz "dtop" + .asciiz "isdn" + .asciiz "floppy" + .asciiz "stray" + .asciiz "nmi" + .asciiz "lostclock" +_C_LABEL(eintrnames): + .align 2 +_C_LABEL(intrcnt): + .word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 +_C_LABEL(eintrcnt): + .word 0 # This shouldn't be needed but with 4.4bsd's as, the eintrcnt + # label ends end up in a different section otherwise. diff --git a/sys/arch/pmax/pmax/locore_r2000.S b/sys/arch/pmax/pmax/locore_r2000.S index 75edd70ad45..aa3b77f342e 100644 --- a/sys/arch/pmax/pmax/locore_r2000.S +++ b/sys/arch/pmax/pmax/locore_r2000.S @@ -1,9 +1,62 @@ +/* $NetBSD: locore_r2000.S,v 1.27 1996/10/13 21:37:41 jonathan Exp $ */ + +/* + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Digital Equipment Corporation and Ralph Campbell. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Copyright (C) 1989 Digital Equipment Corporation. + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose and without fee is hereby granted, + * provided that the above copyright notice appears in all copies. + * Digital Equipment Corporation makes no representations about the + * suitability of this software for any purpose. It is provided "as is" + * without express or implied warranty. + * + * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, + * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) + * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, + * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) + * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, + * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) + * + * @(#)locore.s 8.5 (Berkeley) 1/4/94 + */ /* *---------------------------------------------------------------------------- * - * mips_r2000_UTLBmiss -- - * MachUTLBmiss -- + * mips1_UTLBmiss -- * * Vector code for a MIPS-I user-space TLB miss from user-space. * @@ -12,10 +65,8 @@ * handle user level TLB translation misses. * NOTE: This code must be relocatable!!! */ - .globl _C_LABEL(mips_R2000_UTLBMiss) -_C_LABEL(mips_R2000_UTLBMiss): - .globl _C_LABEL(MachUTLBMiss) -_C_LABEL(MachUTLBMiss): + .globl _C_LABEL(mips1_UTLBMiss) +_C_LABEL(mips1_UTLBMiss): .set noat mfc0 k0, MACH_COP_0_BAD_VADDR # get the virtual address lw k1, UADDR+U_PCB_SEGTAB # get the current segment table @@ -43,20 +94,17 @@ _C_LABEL(MachUTLBMiss): j k1 rfe 2: - j mips_r2000_SlowFault # handle the rest + j mips1_SlowFault # handle the rest nop .set at - .globl _C_LABEL(MachUTLBMissEnd) -_C_LABEL(MachUTLBMissEnd): - - .globl _C_LABEL(mips_R2000_UTLBMissEnd) -_C_LABEL(mips_R2000_UTLBMissEnd): + .globl _C_LABEL(mips1_UTLBMissEnd) +_C_LABEL(mips1_UTLBMissEnd): /* *---------------------------------------------------------------------------- * - * mips_R2000_execption -- + * mips1_execption -- * * Vector code for the general exception vector 0x80000080 * on an r2000 or r3000. @@ -67,8 +115,8 @@ _C_LABEL(mips_R2000_UTLBMissEnd): * *---------------------------------------------------------------------------- */ - .globl _C_LABEL(mips_R2000_exception) -_C_LABEL(mips_R2000_exception): + .globl _C_LABEL(mips1_exception) +_C_LABEL(mips1_exception): /* * Find out what mode we came from and jump to the proper handler. */ @@ -80,7 +128,7 @@ _C_LABEL(mips_R2000_exception): and k1, k1, MIPS_3K_CR_EXC_CODE # Mask out the cause bits. or k1, k1, k0 # change index to user table 1: - la k0, _C_LABEL(mips_r2000_ExceptionTable) # get base of the jump table + la k0, _C_LABEL(mips1_ExceptionTable) # get base of the jump table addu k0, k0, k1 # Get the address of the # function entry. Note that # the cause is already @@ -91,28 +139,28 @@ _C_LABEL(mips_R2000_exception): j k0 # Jump to the function. nop .set at - .globl _C_LABEL(mips_R2000_exceptionEnd) -_C_LABEL(mips_R2000_exceptionEnd): + .globl _C_LABEL(mips1_exceptionEnd) +_C_LABEL(mips1_exceptionEnd): /*---------------------------------------------------------------------------- * - * mips_r2000_SlowFault -- + * mips1_SlowFault -- * - * Alternate entry point into the mips_r2000_UserGenExceptionor or - * or mips_r2000_user_Kern_exception, when the ULTB miss handler couldn't + * Alternate entry point into the mips1_UserGenExceptionor or + * or mips1_user_Kern_exception, when the ULTB miss handler couldn't * find a TLB entry. * * Find out what mode we came from and call the appropriate handler. */ -mips_r2000_SlowFault: +mips1_SlowFault: .set noat mfc0 k0, MACH_COP_0_STATUS_REG nop and k0, k0, MACH_SR_KU_PREV - bne k0, zero, _C_LABEL(mips_r2000_UserGenException) + bne k0, zero, _C_LABEL(mips1_UserGenException) nop .set at /* @@ -121,7 +169,7 @@ mips_r2000_SlowFault: /*---------------------------------------------------------------------------- * - * mips_r2000_KernGenException -- + * mips1_KernGenException -- * * Handle an exception from kernel mode. * @@ -146,7 +194,7 @@ mips_r2000_SlowFault: #define KERN_MULT_HI_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 8) #define KERN_EXC_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) -NNON_LEAF(mips_r2000_KernGenException, KERN_EXC_FRAME_SIZE, ra) +NNON_LEAF(mips1_KernGenException, KERN_EXC_FRAME_SIZE, ra) .set noat #ifdef KADB la k0, kdbpcb # save registers for kadb @@ -222,11 +270,11 @@ NNON_LEAF(mips_r2000_KernGenException, KERN_EXC_FRAME_SIZE, ra) j k0 # Now return from the rfe # exception. .set at -END(mips_r2000_KernGenException) +END(mips1_KernGenException) /*---------------------------------------------------------------------------- * - * mips_r2000_UserGenException -- + * mips1_UserGenException -- * * Handle an exception from user mode. * @@ -238,7 +286,7 @@ END(mips_r2000_KernGenException) * *---------------------------------------------------------------------------- */ -NNON_LEAF(mips_r2000_UserGenException, STAND_FRAME_SIZE, ra) +NNON_LEAF(mips1_UserGenException, STAND_FRAME_SIZE, ra) .set noat .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) /* @@ -309,16 +357,16 @@ NNON_LEAF(mips_r2000_UserGenException, STAND_FRAME_SIZE, ra) lw AT, UADDR+U_PCB_REGS+(AST * 4) lw v0, UADDR+U_PCB_REGS+(V0 * 4) - RESTORE_USER_REGS() + RESTORE_USER_REGS(UADDR) j k0 rfe .set at -END(mips_r2000_UserGenException) +END(mips1_UserGenException) /*---------------------------------------------------------------------------- * - * mips_r2000_KernIntr -- + * mips1_KernIntr -- * * Handle an interrupt from kernel mode. * Interrupts use the standard kernel stack. @@ -339,7 +387,7 @@ END(mips_r2000_UserGenException) #define KINTR_GP_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) #define KINTR_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 16) -NNON_LEAF(mips_r2000_KernIntr, KINTR_FRAME_SIZE, ra) +NNON_LEAF(mips1_KernIntr, KINTR_FRAME_SIZE, ra) .set noat subu sp, sp, KINTR_FRAME_SIZE # allocate stack frame .mask 0x80000000, (STAND_RA_OFFSET - KINTR_FRAME_SIZE) @@ -402,11 +450,11 @@ NNON_LEAF(mips_r2000_KernIntr, KINTR_FRAME_SIZE, ra) j k0 # Now return from the rfe # interrupt. .set at -END(mips_r2000_KernIntr) +END(mips1_KernIntr) /*---------------------------------------------------------------------------- * - * mips_r2000_UserIntr -- + * mips1_UserIntr -- * * Handle an interrupt from user mode. * Note: we save minimal state in the u.u_pcb struct and use the standard @@ -423,7 +471,7 @@ END(mips_r2000_KernIntr) * *---------------------------------------------------------------------------- */ -NNON_LEAF(mips_r2000_UserIntr, STAND_FRAME_SIZE, ra) +NNON_LEAF(mips1_UserIntr, STAND_FRAME_SIZE, ra) .set noat .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) /* @@ -540,13 +588,20 @@ NNON_LEAF(mips_r2000_UserIntr, STAND_FRAME_SIZE, ra) lw AT, UADDR+U_PCB_REGS+(AST * 4) lw v0, UADDR+U_PCB_REGS+(V0 * 4) - RESTORE_USER_REGS() + RESTORE_USER_REGS(UADDR) j k0 rfe .set at -END(mips_r2000_UserIntr) +END(mips1_UserIntr) + +/* + * Mark where code entreed from exception hander jumptable + * ends, for stack traceback code. + */ + .globl _C_LABEL(mips1_exceptionentry_end) +_C_LABEL(mips1_exceptionentry_end): /*---------------------------------------------------------------------------- @@ -561,7 +616,7 @@ END(mips_r2000_UserIntr) #if 0 /*---------------------------------------------------------------------------- * - * mips_r2000_TLBModException -- + * mips1_TLBModException -- * * Handle a TLB modified exception. * The BaddVAddr, Context, and EntryHi registers contain the failed @@ -575,7 +630,7 @@ END(mips_r2000_UserIntr) * *---------------------------------------------------------------------------- */ -NLEAF(mips_r2000_TLBModException) +NLEAF(mips1_TLBModException) .set noat tlbp # find the TLB entry mfc0 k0, MACH_COP_0_TLB_LOW # get the physical address @@ -599,12 +654,12 @@ NLEAF(mips_r2000_TLBModException) 4: break 0 # panic .set at -END(mips_r2000_TLBModException) +END(mips1_TLBModException) #endif /*---------------------------------------------------------------------------- * - * mips_r2000_TLBMissException -- + * mips1_TLBMissException -- * * Handle a TLB miss exception from kernel mode. * The BaddVAddr, Context, and EntryHi registers contain the failed @@ -618,7 +673,7 @@ END(mips_r2000_TLBModException) * *---------------------------------------------------------------------------- */ -NLEAF(mips_r2000_TLBMissException) +NLEAF(mips1_TLBMissException) .set noat mfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address li k1, VM_MIN_KERNEL_ADDRESS # compute index @@ -635,7 +690,7 @@ NLEAF(mips_r2000_TLBMissException) mfc0 k1, MACH_COP_0_EXC_PC # get return address mtc0 k0, MACH_COP_0_TLB_LOW # save PTE entry and k0, k0, PG_V # check for valid entry - beq k0, zero, _C_LABEL(mips_r2000_KernGenException) # PTE invalid + beq k0, zero, _C_LABEL(mips1_KernGenException) # PTE invalid nop tlbwr # update TLB j k1 @@ -644,7 +699,7 @@ NLEAF(mips_r2000_TLBMissException) 1: subu k0, sp, UADDR + 0x200 # check to see if we have a sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack - bne k0, zero, _C_LABEL(mips_r2000_KernGenException) # Go panic + bne k0, zero, _C_LABEL(mips1_KernGenException) # Go panic nop la a0, start - START_FRAME - 8 # set sp to a valid place @@ -668,16 +723,16 @@ NLEAF(mips_r2000_TLBMissException) la sp, start - START_FRAME # set sp to a valid place PANIC("kernel stack overflow") .set at -END(mips_r2000_TLBMissException) +END(mips1_TLBMissException) /*-------------------------------------------------------------------------- * - * mips_r2000_TLBWriteIndexed -- + * mips1_TLBWriteIndexed -- * * Write the given entry into the TLB at the given index. * - * mips_r2000_TLBWriteIndexed(index, highEntry, lowEntry) + * mips1_TLBWriteIndexed(index, highEntry, lowEntry) * int index; * int highEntry; * int lowEntry; @@ -690,7 +745,7 @@ END(mips_r2000_TLBMissException) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBWriteIndexed) +LEAF(mips1_TLBWriteIndexed) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Save the current PID. @@ -705,16 +760,16 @@ LEAF(mips_r2000_TLBWriteIndexed) mtc0 t0, MACH_COP_0_TLB_HI # Restore the PID. j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBWriteIndexed) +END(mips1_TLBWriteIndexed) #if 0 /*-------------------------------------------------------------------------- * - * mips_r2000_TLBWriteRandom -- + * mips1_TLBWriteRandom -- * * Write the given entry into the TLB at a random location. * - * mips_r2000_TLBWriteRandom(highEntry, lowEntry) + * mips1_TLBWriteRandom(highEntry, lowEntry) * unsigned highEntry; * unsigned lowEntry; * @@ -726,7 +781,7 @@ END(mips_r2000_TLBWriteIndexed) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBWriteRandom) +LEAF(mips1_TLBWriteRandom) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 v0, MACH_COP_0_TLB_HI # Save the current PID. @@ -740,16 +795,16 @@ LEAF(mips_r2000_TLBWriteRandom) mtc0 v0, MACH_COP_0_TLB_HI # Restore the PID. j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBWriteRandom) +END(mips1_TLBWriteRandom) #endif /*-------------------------------------------------------------------------- * - * mips_r2000_SetPID -- + * mips1_SetPID -- * * Write the given pid into the TLB pid reg. * - * mips_r2000_SetPID(pid) + * mips1_SetPID(pid) * int pid; * * Results: @@ -760,20 +815,20 @@ END(mips_r2000_TLBWriteRandom) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_SetPID) +LEAF(mips1_SetPID) sll a0, a0, VMMACH_TLB_PID_SHIFT # put PID in right spot mtc0 a0, MACH_COP_0_TLB_HI # Write the hi reg value j ra nop -END(mips_r2000_SetPID) +END(mips1_SetPID) /*-------------------------------------------------------------------------- * - * mips_r2000_TLBFlush -- + * mips1_TLBFlush -- * * Flush the "random" entries from the TLB. * - * mips_r2000_TLBFlush() + * mips1_TLBFlush() * * Results: * None. @@ -783,7 +838,7 @@ END(mips_r2000_SetPID) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBFlush) +LEAF(mips1_TLBFlush) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Save the PID @@ -804,16 +859,16 @@ LEAF(mips_r2000_TLBFlush) mtc0 t0, MACH_COP_0_TLB_HI # Restore the PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBFlush) +END(mips1_TLBFlush) #if 0 /*-------------------------------------------------------------------------- * - * mips_r2000_TLBFlushPID -- + * mips1_TLBFlushPID -- * * Flush all entries with the given PID from the TLB. * - * mips_r2000_TLBFlushPID(pid) + * mips1_TLBFlushPID(pid) * int pid; * * Results: @@ -824,7 +879,7 @@ END(mips_r2000_TLBFlush) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBFlushPID) +LEAF(mips1_TLBFlushPID) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Save the current PID @@ -854,16 +909,16 @@ LEAF(mips_r2000_TLBFlushPID) mtc0 t0, MACH_COP_0_TLB_HI # restore PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBFlushPID) +END(mips1_TLBFlushPID) #endif /*-------------------------------------------------------------------------- * - * mips_r2000_TLBFlushAddr -- + * mips1_TLBFlushAddr -- * * Flush any TLB entries for the given address and TLB PID. * - * mips_r2000_TLBFlushAddr(highreg) + * mips1_TLBFlushAddr(highreg) * unsigned highreg; * * Results: @@ -874,7 +929,7 @@ END(mips_r2000_TLBFlushPID) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBFlushAddr) +LEAF(mips1_TLBFlushAddr) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Get current PID @@ -894,15 +949,15 @@ LEAF(mips_r2000_TLBFlushAddr) mtc0 t0, MACH_COP_0_TLB_HI # restore PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBFlushAddr) +END(mips1_TLBFlushAddr) /*-------------------------------------------------------------------------- * - * mips_r2000_TLBUpdate -- + * mips1_TLBUpdate -- * * Update the TLB if highreg is found; otherwise, enter the data. * - * mips_r2000_TLBUpdate(highreg, lowreg) + * mips1_TLBUpdate(highreg, lowreg) * unsigned highreg, lowreg; * * Results: @@ -913,7 +968,7 @@ END(mips_r2000_TLBFlushAddr) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBUpdate) +LEAF(mips1_TLBUpdate) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Save current PID @@ -935,15 +990,15 @@ LEAF(mips_r2000_TLBUpdate) mtc0 t0, MACH_COP_0_TLB_HI # restore PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBUpdate) +END(mips1_TLBUpdate) /*-------------------------------------------------------------------------- * - * mips_r2000_TLBFind -- + * mips1_TLBFind -- * * Search the TLB for the given entry. * - * mips_r2000_TLBFind(hi) + * mips1_TLBFind(hi) * unsigned hi; * * Results: @@ -957,7 +1012,7 @@ END(mips_r2000_TLBUpdate) */ .comm tlbhi, 4 .comm tlblo, 4 -LEAF(mips_r2000_TLBFind) +LEAF(mips1_TLBFind) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Get current PID @@ -979,15 +1034,15 @@ LEAF(mips_r2000_TLBFind) mtc0 t0, MACH_COP_0_TLB_HI # Restore current PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBFind) +END(mips1_TLBFind) /*-------------------------------------------------------------------------- * - * mips_r2000_TLBRead -- + * mips1_TLBRead -- * * Read the TLB entry. * - * mips_r2000_TLBRead(entry) + * mips1_TLBRead(entry) * unsigned entry; * * Results: @@ -998,7 +1053,7 @@ END(mips_r2000_TLBFind) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBRead) +LEAF(mips1_TLBRead) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t0, MACH_COP_0_TLB_HI # Get current PID @@ -1015,13 +1070,13 @@ LEAF(mips_r2000_TLBRead) mtc0 t0, MACH_COP_0_TLB_HI # restore PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r2000_TLBRead) +END(mips1_TLBRead) /*-------------------------------------------------------------------------- * - * mips_r2000_TLBGetPID -- + * mips1_TLBGetPID -- * - * mips_r2000_TLBGetPID() + * mips1_TLBGetPID() * * Results: * Returns the current TLB pid reg. @@ -1031,13 +1086,13 @@ END(mips_r2000_TLBRead) * *-------------------------------------------------------------------------- */ -LEAF(mips_r2000_TLBGetPID) +LEAF(mips1_TLBGetPID) mfc0 v0, MACH_COP_0_TLB_HI # get PID nop and v0, v0, VMMACH_TLB_PID # mask off PID j ra srl v0, v0, VMMACH_TLB_PID_SHIFT # put PID in right spot -END(mips_r2000_TLBGetPID) +END(mips1_TLBGetPID) /*---------------------------------------------------------------------------- @@ -1050,7 +1105,7 @@ END(mips_r2000_TLBGetPID) /*---------------------------------------------------------------------------- * - * mips_r2000_ConfigCache -- + * mips1_ConfigCache -- * * Size the caches. * NOTE: should only be called from mach_init(). @@ -1064,7 +1119,7 @@ END(mips_r2000_TLBGetPID) * *---------------------------------------------------------------------------- */ -NON_LEAF(mips_r2000_ConfigCache, STAND_FRAME_SIZE, ra) +NON_LEAF(mips1_ConfigCache, STAND_FRAME_SIZE, ra) subu sp, sp, STAND_FRAME_SIZE sw ra, STAND_RA_OFFSET(sp) # Save return address. .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) @@ -1079,7 +1134,7 @@ NON_LEAF(mips_r2000_ConfigCache, STAND_FRAME_SIZE, ra) * linker still thinks SizeCache is in the cached region so it computes * the correct address without complaining. */ - jal _C_LABEL(mips_r2000_SizeCache) # Get the size of the d-cache. + jal _C_LABEL(mips1_SizeCache) # Get the size of the d-cache. nop sw v0, _C_LABEL(machDataCacheSize) nop # Make sure sw out of pipe @@ -1092,7 +1147,7 @@ NON_LEAF(mips_r2000_ConfigCache, STAND_FRAME_SIZE, ra) nop nop nop - jal _C_LABEL(mips_r2000_SizeCache) # Get the size of the i-cache. + jal _C_LABEL(mips1_SizeCache) # Get the size of the i-cache. nop mtc0 zero, MACH_COP_0_STATUS_REG # Swap back caches and enable. nop @@ -1108,11 +1163,11 @@ NON_LEAF(mips_r2000_ConfigCache, STAND_FRAME_SIZE, ra) addu sp, sp, STAND_FRAME_SIZE # Restore sp. j ra nop -END(mips_r2000_ConfigCache) +END(mips1_ConfigCache) /*---------------------------------------------------------------------------- * - * mips_r2000_SizeCache -- + * mips1_SizeCache -- * * Get the size of the cache. * @@ -1124,7 +1179,7 @@ END(mips_r2000_ConfigCache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r2000_SizeCache) +LEAF(mips1_SizeCache) mfc0 t0, MACH_COP_0_STATUS_REG # Save the current status reg. nop or v0, t0, MACH_SR_ISOL_CACHES # Isolate the caches. @@ -1166,11 +1221,11 @@ LEAF(mips_r2000_SizeCache) nop j ra nop -END(mips_r2000_SizeCache) +END(mips1_SizeCache) /*---------------------------------------------------------------------------- * - * mips_r2000_FlushCache -- + * mips1_FlushCache -- * * Flush the caches. * @@ -1182,7 +1237,7 @@ END(mips_r2000_SizeCache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r2000_FlushCache) +LEAF(mips1_FlushCache) lw t1, _C_LABEL(machInstCacheSize) # Must load before isolating lw t2, _C_LABEL(machDataCacheSize) # Must load before isolating mfc0 t3, MACH_COP_0_STATUS_REG # Save the status register. @@ -1239,13 +1294,13 @@ LEAF(mips_r2000_FlushCache) nop j ra nop -END(mips_r2000_FlushCache) +END(mips1_FlushCache) /*---------------------------------------------------------------------------- * - * mips_r2000_FlushICache -- + * mips1_FlushICache -- * - * void mips_r2000_FlushICache(addr, len) + * void mips1_FlushICache(addr, len) * vm_offset_t addr, len; * * Flush instruction cache for range of addr to addr + len - 1. @@ -1259,7 +1314,7 @@ END(mips_r2000_FlushCache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r2000_FlushICache) +LEAF(mips1_FlushICache) mfc0 t0, MACH_COP_0_STATUS_REG # Save SR mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. @@ -1281,13 +1336,13 @@ LEAF(mips_r2000_FlushICache) mtc0 t0, MACH_COP_0_STATUS_REG # enable interrupts j ra # return and run cached nop -END(mips_r2000_FlushICache) +END(mips1_FlushICache) /*---------------------------------------------------------------------------- * - * mips_r2000_FlushDCache -- + * mips1_FlushDCache -- * - * void mips_r2000_FlushDCache(addr, len) + * void mips1_FlushDCache(addr, len) * vm_offset_t addr, len; * * Flush data cache for range of addr to addr + len - 1. @@ -1301,7 +1356,7 @@ END(mips_r2000_FlushICache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r2000_FlushDCache) +LEAF(mips1_FlushDCache) mfc0 t0, MACH_COP_0_STATUS_REG # Save SR mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts. nop @@ -1332,7 +1387,7 @@ LEAF(mips_r2000_FlushDCache) nop j ra # return and run cached nop -END(mips_r2000_FlushDCache) +END(mips1_FlushDCache) /*---------------------------------------------------------------------------- * diff --git a/sys/arch/pmax/pmax/locore_r4000.S b/sys/arch/pmax/pmax/locore_r4000.S index 21668b06306..27d82c538d8 100644 --- a/sys/arch/pmax/pmax/locore_r4000.S +++ b/sys/arch/pmax/pmax/locore_r4000.S @@ -12,7 +12,7 @@ /* *---------------------------------------------------------------------------- * - * mips_R4000_TLBMiss -- + * mips3_TLBMiss -- * MachTLBMiss -- * * Vector code for the TLB-miss exception vector 0x80000180 @@ -26,8 +26,8 @@ * *---------------------------------------------------------------------------- */ - .globl _C_LABEL(mips_R4000_TLBMiss) -_C_LABEL(mips_R4000_TLBMiss): + .globl _C_LABEL(mips3_TLBMiss) +_C_LABEL(mips3_TLBMiss): .globl _C_LABEL(MachTLBMiss) _C_LABEL(MachTLBMiss): .set noat @@ -60,23 +60,22 @@ _C_LABEL(MachTLBMiss): nop eret 1: - j MachTLBMissException + j mips3_TLBMissException nop 2: - j SlowFault + j mips3_SlowFault nop .globl _C_LABEL(MachTLBMissEnd) -C_LABEL(MachTLBMissEnd): - .globl _C_LABEL(mips_R4000_TLBMissEnd) -_C_LABEL(mips_R4000_TLBMissEnd): +_C_LABEL(MachTLBMissEnd): + .globl _C_LABEL(mips3_TLBMissEnd) +_C_LABEL(mips3_TLBMissEnd): .set at -#endif /* XXX doesn't assemble in default pmax kernel *//* - +/* *---------------------------------------------------------------------------- * - * Mips_R4000_execption -- + * mips3_execption -- * * Vector code for the general exception vector 0x80000080 * on an r4000 or r4400. @@ -86,8 +85,8 @@ _C_LABEL(mips_R4000_TLBMissEnd): * NOTE: This code must be relocatable!!! *---------------------------------------------------------------------------- */ - .globl mips_r4000_exception -_C_LABEL(mips_R4000_exception): + .globl mips3_exception +_C_LABEL(mips3_exception): /* * Find out what mode we came from and jump to the proper handler. */ @@ -101,7 +100,7 @@ _C_LABEL(mips_R4000_exception): and k1, k1, MIPS_4K_CR_EXC_CODE # Mask out the cause bits. or k1, k1, k0 # change index to user table 1: - la k0, machExceptionTable # get base of the jump table + la k0, mips3_ExceptionTable # get base of the jump table addu k0, k0, k1 # Get the address of the # function entry. Note that # the cause is already @@ -112,13 +111,13 @@ _C_LABEL(mips_R4000_exception): j k0 # Jump to the function. nop .set at - .globl mips_R4000_exceptionEnd -_C_LABEL(mips_R4000_exceptionEnd): + .globl mips3_exceptionEnd +_C_LABEL(mips3_exceptionEnd): /*---------------------------------------------------------------------------- * - * mips_r4000_SlowFault -- + * mips3_SlowFault -- * * Alternate entry point into the mips_r2000_UserGenExceptionor or * or mips_r2000_user_Kern_exception, when the ULTB miss handler couldn't @@ -133,12 +132,12 @@ _C_LABEL(mips_R4000_exceptionEnd): * We couldn't find a TLB entry. * Find out what mode we came from and call the appropriate handler. */ -mips_r4000_SlowFault: +mips3_SlowFault: .set noat mfc0 k0, MACH_COP_0_STATUS_REG nop and k0, k0, MACH_SR_KSU_USER - bne k0, zero, mips_r4000_UserGenException + bne k0, zero, mips3_UserGenException nop .set at /* @@ -147,7 +146,7 @@ mips_r4000_SlowFault: /*---------------------------------------------------------------------------- * - * mips_r4000_KernGenException -- + * mips3_KernGenException -- * * Handle an exception from kernel mode. * @@ -172,7 +171,18 @@ mips_r4000_SlowFault: #define KERN_MULT_HI_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 8) #define KERN_EXC_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) -NNON_LEAF(mips_r4000_KernGenException, KERN_EXC_FRAME_SIZE, ra) +/* + * Similar definition for interrupt-exception frames. + */ +#define KINTR_REG_OFFSET (STAND_FRAME_SIZE) +#define KINTR_SR_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE) +#define KINTR_MULT_LO_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 4) +#define KINTR_MULT_HI_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 8) +#define KINTR_MULT_GP_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) +#define KINTR_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 16) + + +NNON_LEAF(mips3_KernGenException, KERN_EXC_FRAME_SIZE, ra) .set noat #ifdef DEBUG la k0, mdbpcb # save registers for mdb @@ -250,11 +260,11 @@ NNON_LEAF(mips_r4000_KernGenException, KERN_EXC_FRAME_SIZE, ra) addu sp, sp, KERN_EXC_FRAME_SIZE eret # exception. .set at -END(mips_r4000_KernGenException) +END(mips3_KernGenException) /*---------------------------------------------------------------------------- * - * mips_r4000_UserGenException -- + * mips3_UserGenException -- * * Handle an exception from user mode. * @@ -266,7 +276,7 @@ END(mips_r4000_KernGenException) * *---------------------------------------------------------------------------- */ -NNON_LEAF(mips_r4000_UserGenException, STAND_FRAME_SIZE, ra) +NNON_LEAF(mips3_UserGenException, STAND_FRAME_SIZE, ra) .set noat .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) /* @@ -345,15 +355,15 @@ NNON_LEAF(mips_r4000_UserGenException, STAND_FRAME_SIZE, ra) lw v0, UADDR+U_PCB_REGS+(V0 * 4) dmtc0 a0, MACH_COP_0_EXC_PC # set return address - RESTORE_USER_REGS() + RESTORE_USER_REGS(UADDR) /* XXX FIXME */ eret .set at -END(mips_r4000_UserGenException) +END(mips3_UserGenException) /*---------------------------------------------------------------------------- * - * mips_r4000_KernIntr -- + * mips3_KernIntr -- * * Handle an interrupt from kernel mode. * Interrupts use the standard kernel stack. @@ -367,14 +377,7 @@ END(mips_r4000_UserGenException) * *---------------------------------------------------------------------------- */ -#define KINTR_REG_OFFSET (STAND_FRAME_SIZE) -#define KINTR_SR_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE) -#define KINTR_MULT_LO_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 4) -#define KINTR_MULT_HI_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 8) -#define KINTR_MULT_GP_OFFSET (STAND_FRAME_SIZE + KERN_REG_SIZE + 12) -#define KINTR_FRAME_SIZE (STAND_FRAME_SIZE + KERN_REG_SIZE + 16) - -NNON_LEAF(mips_r4000_KernIntr, KINTR_FRAME_SIZE, ra) +NNON_LEAF(mips3_KernIntr, KINTR_FRAME_SIZE, ra) .set noat subu sp, sp, KINTR_FRAME_SIZE # allocate stack frame .mask 0x80000000, (STAND_RA_OFFSET - KINTR_FRAME_SIZE) @@ -436,11 +439,11 @@ NNON_LEAF(mips_r4000_KernIntr, KINTR_FRAME_SIZE, ra) addu sp, sp, KINTR_FRAME_SIZE eret # interrupt. .set at -END(mips_r4000_KernIntr) +END(mips3_KernIntr) /*---------------------------------------------------------------------------- * - * mips_r4000_UserIntr -- + * mips3_UserIntr -- * * Handle an interrupt from user mode. * Note: we save minimal state in the u.u_pcb struct and use the standard @@ -457,7 +460,7 @@ END(mips_r4000_KernIntr) * *---------------------------------------------------------------------------- */ -NNON_LEAF(mips_r4000_UserIntr, STAND_FRAME_SIZE, ra) +NNON_LEAF(mips3_UserIntr, STAND_FRAME_SIZE, ra) .set noat .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) /* @@ -589,11 +592,11 @@ NNON_LEAF(mips_r4000_UserIntr, STAND_FRAME_SIZE, ra) dmtc0 a0, MACH_COP_0_EXC_PC # set return address /*XXX*/ - RESTORE_USER_REGS() + RESTORE_USER_REGS(UADDR) /* XXX FIXME */ eret .set at -END(mips_r4000_UserIntr) +END(mips3_UserIntr) /*---------------------------------------------------------------------------- @@ -614,7 +617,7 @@ END(mips_r4000_UserIntr) /*---------------------------------------------------------------------------- * - * mips_r4000_TLBMInvalidException -- + * mips3_TLBMInvalidException -- * * Handle a TLB invalid exception from kernel mode in kernel space. * The BaddVAddr, Context, and EntryHi registers contain the failed @@ -628,7 +631,7 @@ END(mips_r4000_UserIntr) * *---------------------------------------------------------------------------- */ -NLEAF(mips_r4000_TLBInvalidException) +NLEAF(mips3_TLBInvalidException) .set noat dmfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address li k1, VM_MIN_KERNEL_ADDRESS # compute index @@ -658,7 +661,7 @@ NLEAF(mips_r4000_TLBInvalidException) dsrl k0, k0, 34 dmtc0 k0, MACH_COP_0_TLB_LO0 # load PTE entry and k0, k0, PG_V # check for valid entry - beq k0, zero, mips_r4000_KernGenException # PTE invalid + beq k0, zero, mips3_KernGenException # PTE invalid lw k0, 4(k1) # get odd PTE entry dsll k0, k0, 34 dsrl k0, k0, 34 @@ -685,7 +688,7 @@ KernTLBIOdd: dsrl k0, k0, 34 dmtc0 k0, MACH_COP_0_TLB_LO1 # save PTE entry and k0, k0, PG_V # check for valid entry - beq k0, zero, mips_r4000_KernGenException # PTE invalid + beq k0, zero, mips3_KernGenException # PTE invalid lw k0, -4(k1) # get even PTE entry dsll k0, k0, 34 dsrl k0, k0, 34 @@ -698,11 +701,11 @@ KernTLBIOdd: nop nop eret -END(mips_r4000_TLBInvalidException) +END(mips3_TLBInvalidException) /*---------------------------------------------------------------------------- * - * mips_r4000_TLBMissException -- + * mips3_TLBMissException -- * * Handle a TLB miss exception from kernel mode in kernel space. * The BaddVAddr, Context, and EntryHi registers contain the failed @@ -716,7 +719,7 @@ END(mips_r4000_TLBInvalidException) * *---------------------------------------------------------------------------- */ -NLEAF(mips_r4000_TLBMissException) +NLEAF(mips3_TLBMissException) .set noat dmfc0 k0, MACH_COP_0_BAD_VADDR # get the fault address li k1, VM_MIN_KERNEL_ADDRESS # compute index @@ -749,7 +752,7 @@ NLEAF(mips_r4000_TLBMissException) sys_stk_chk: subu k0, sp, UADDR + 0x200 # check to see if we have a sltiu k0, UPAGES*NBPG - 0x200 # valid kernel stack - bne k0, zero, mips_r4000_KernGenException # Go panic + bne k0, zero, mips3_KernGenException # Go panic nop la a0, start - START_FRAME - 8 # set sp to a valid place @@ -772,16 +775,25 @@ sys_stk_chk: la sp, start - START_FRAME # set sp to a valid place PANIC("kernel stack overflow") .set at -END(mips_r4000_TLBMissException) +END(mips3_TLBMissException) + +/* + * Mark where code entreed from exception hander jumptable + * ends, for stack traceback code. + */ + + .globl _C_LABEL(mips3_exceptionentry_end) +_C_LABEL(mips3_exceptionentry_end): /*-------------------------------------------------------------------------- * - * mips_r4000_TLBWriteIndexed -- + * mips3_TLBWriteIndexedVPS -- * * Write the given entry into the TLB at the given index. + * Pass full r4000 tlb info icnluding variable page size mask. * - * mips_r4000_TLBWriteIndexed(index, tlb) + * mips3_TLBWriteIndexed(index, tlb) * unsigned index; * tlb *tlb; * @@ -793,7 +805,56 @@ END(mips_r4000_TLBMissException) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_TLBWriteIndexed) +LEAF(mips3_TLBWriteIndexedVPS) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts + nop + lw a2, 8(a1) + lw a3, 12(a1) + dmfc0 t0, MACH_COP_0_TLB_HI # Save the current PID. + + dmtc0 a2, MACH_COP_0_TLB_LO0 # Set up entry low0. + dmtc0 a3, MACH_COP_0_TLB_LO1 # Set up entry low1. + lw a2, 0(a1) + lw a3, 4(a1) + mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index. + dmtc0 a2, MACH_COP_0_TLB_PG_MASK # Set up entry mask. + dmtc0 a3, MACH_COP_0_TLB_HI # Set up entry high. + nop + tlbwi # Write the TLB + nop + nop + nop # Delay for effect + nop + + dmtc0 t0, MACH_COP_0_TLB_HI # Restore the PID. + nop + dmtc0 zero, MACH_COP_0_TLB_PG_MASK # Default mask value. + j ra + mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register +END(mips3_TLBWriteIndexedVPS) + +/*-------------------------------------------------------------------------- + * + * mips3_TLBWriteIndexed -- + * + * Write the given entry into the TLB at the given index. + * + * mips3_TLBWriteIndexed(index, highentry, lowentry0, lowentry1) + * unsigned index; + * int highEntry; + * int lowEntry0; + * int lowEntry1; + * + * Results: + * None. + * + * Side effects: + * TLB entry set. + * + *-------------------------------------------------------------------------- + */ +LEAF(mips3_TLBWriteIndexed) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts nop @@ -820,15 +881,15 @@ LEAF(mips_r4000_TLBWriteIndexed) dmtc0 zero, MACH_COP_0_TLB_PG_MASK # Default mask value. j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r4000_TLBWriteIndexed) +END(mips3_TLBWriteIndexed) /*-------------------------------------------------------------------------- * - * mips_r4000_SetPID -- + * mips3_SetPID -- * * Write the given pid into the TLB pid reg. * - * mips_r4000_SetPID(pid) + * mips3_SetPID(pid) * int pid; * * Results: @@ -839,19 +900,19 @@ END(mips_r4000_TLBWriteIndexed) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_SetPID) +LEAF(mips3_SetPID) dmtc0 a0, MACH_COP_0_TLB_HI # Write the hi reg value j ra nop -END(mips_r4000_SetPID) +END(mips3_SetPID) /*-------------------------------------------------------------------------- * - * mips_r4000_SetWIRED -- + * mips3_SetWIRED -- * * Write the given value into the TLB wired reg. * - * mips_r4000_SetPID(wired) + * mips3_SetPID(wired) * int wired; * * Results: @@ -862,19 +923,19 @@ END(mips_r4000_SetPID) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_SetWIRED) +LEAF(mips3_SetWIRED) mtc0 a0, MACH_COP_0_TLB_WIRED j ra nop -END(mips_r4000_SetWIRED) +END(mips3_SetWIRED) /*-------------------------------------------------------------------------- * - * mips_r4000_GetWIRED -- + * mips3_GetWIRED -- * * Get the value from the TLB wired reg. * - * mips_r4000_GetWIRED(void) + * mips3_GetWIRED(void) * * Results: * Value of wired reg. @@ -884,20 +945,20 @@ END(mips_r4000_SetWIRED) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_GetWIRED) +LEAF(mips3_GetWIRED) mfc0 v0, MACH_COP_0_TLB_WIRED j ra nop -END(mips_r4000_GetWIRED) +END(mips3_GetWIRED) /*-------------------------------------------------------------------------- * - * mips_r4000_TLBFlush -- + * mips3_TLBFlush -- * * Flush the "random" entries from the TLB. * Uses "wired" register to determine what register to start with. * - * mips_r4000_TLBFlush() + * mips3_TLBFlush() * * Results: * None. @@ -907,7 +968,7 @@ END(mips_r4000_GetWIRED) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_TLBFlush) +LEAF(mips3_TLBFlush) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts mfc0 t1, MACH_COP_0_TLB_WIRED @@ -934,16 +995,16 @@ LEAF(mips_r4000_TLBFlush) dmtc0 t0, MACH_COP_0_TLB_HI # Restore the PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r4000_TLBFlush) +END(mips3_TLBFlush) /*-------------------------------------------------------------------------- * - * mips_r4000_TLBFlushAddr -- + * mips3_TLBFlushAddr -- * * Flush any TLB entries for the given address and TLB PID. * - * mips_r4000_TLBFlushAddr(TLBhi) + * mips3_TLBFlushAddr(TLBhi) * unsigned TLBhi; * * Results: @@ -954,7 +1015,7 @@ END(mips_r4000_TLBFlush) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_TLBFlushAddr) +LEAF(mips3_TLBFlushAddr) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts nop @@ -987,15 +1048,15 @@ LEAF(mips_r4000_TLBFlushAddr) dmtc0 t0, MACH_COP_0_TLB_HI # restore PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r4000_TLBFlushAddr) +END(mips3_TLBFlushAddr) /*-------------------------------------------------------------------------- * - * mips_r4000_TLBUpdate -- + * mips3_TLBUpdate -- * * Update the TLB if highreg is found; otherwise, enter the data. * - * mips_r4000_TLBUpdate(virpageadr, lowregx) + * mips3_TLBUpdate(virpageadr, lowregx) * unsigned virpageadr, lowregx; * * Results: @@ -1006,7 +1067,7 @@ END(mips_r4000_TLBFlushAddr) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_TLBUpdate) +LEAF(mips3_TLBUpdate) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts and t1, a0, 0x1000 # t1 = Even/Odd flag @@ -1076,15 +1137,63 @@ LEAF(mips_r4000_TLBUpdate) dmtc0 t0, MACH_COP_0_TLB_HI # restore PID j ra mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register -END(mips_r4000_TLBUpdate) +END(mips3_TLBUpdate) + +/*-------------------------------------------------------------------------- + * + * mips3_TLBReadVPS -- + * + * Read the TLB entry, including variable-page-size mask. + * + * mips3_TLBReadVPS(entry, tlb) + * unsigned entry; + * struct tlb *tlb; + * + * Results: + * None. + * + * Side effects: + * tlb will contain the TLB entry found. + * + *-------------------------------------------------------------------------- + */ +LEAF(mips3_TLBReadVPS) + mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. + mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts + nop + nop + nop + dmfc0 t0, MACH_COP_0_TLB_HI # Get current PID + + mtc0 a0, MACH_COP_0_TLB_INDEX # Set the index register + nop + tlbr # Read from the TLB + nop + nop + nop + mfc0 t2, MACH_COP_0_TLB_PG_MASK # fetch the hi entry + dmfc0 t3, MACH_COP_0_TLB_HI # fetch the hi entry + dmfc0 t4, MACH_COP_0_TLB_LO0 # See what we got + dmfc0 t5, MACH_COP_0_TLB_LO1 # See what we got + dmtc0 t0, MACH_COP_0_TLB_HI # restore PID + nop + nop + nop # wait for PID active + mtc0 v1, MACH_COP_0_STATUS_REG # Restore the status register + sw t2, 0(a1) + sw t3, 4(a1) + sw t4, 8(a1) + j ra + sw t5, 12(a1) +END(mips3_TLBReadVPS) /*-------------------------------------------------------------------------- * - * mips_r4000_TLBRead -- + * mips3_TLBRead -- * * Read the TLB entry. * - * mips_r4000_TLBRead(entry, tlb) + * mips3_TLBRead(entry, tlb) * unsigned entry; * struct tlb *tlb; * @@ -1096,7 +1205,7 @@ END(mips_r4000_TLBUpdate) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_TLBRead) +LEAF(mips3_TLBRead) mfc0 v1, MACH_COP_0_STATUS_REG # Save the status register. mtc0 zero, MACH_COP_0_STATUS_REG # Disable interrupts nop @@ -1124,13 +1233,13 @@ LEAF(mips_r4000_TLBRead) sw t4, 8(a1) j ra sw t5, 12(a1) -END(mips_r4000_TLBRead) +END(mips3_TLBRead) /*-------------------------------------------------------------------------- * - * mips_r4000_TLBGetPID -- + * mips3_TLBGetPID -- * - * mips_r4000_TLBGetPID() + * mips3_TLBGetPID() * * Results: * Returns the current TLB pid reg. @@ -1140,11 +1249,11 @@ END(mips_r4000_TLBRead) * *-------------------------------------------------------------------------- */ -LEAF(mips_r4000_TLBGetPID) +LEAF(mips3_TLBGetPID) dmfc0 v0, MACH_COP_0_TLB_HI # get PID j ra and v0, v0, VMMACH_TLB_PID # mask off PID -END(mips_r4000_TLBGetPID) +END(mips3_TLBGetPID) @@ -1158,7 +1267,7 @@ END(mips_r4000_TLBGetPID) /*---------------------------------------------------------------------------- * - * mips_r4000_ConfigCache -- + * mips3_ConfigCache -- * * Size the caches. * NOTE: should only be called from mach_init(). @@ -1173,7 +1282,7 @@ END(mips_r4000_TLBGetPID) * *---------------------------------------------------------------------------- */ -LEAF(mips_r4000_ConfigCache) +LEAF(mips3_ConfigCache) mfc0 v0, MACH_COP_0_CONFIG # Get configuration register nop srl t1, v0, 9 # Get I cache size. @@ -1201,11 +1310,11 @@ LEAF(mips_r4000_ConfigCache) sw t2, machPrimaryInstCacheLSize j ra nop -END(mips_r4000_ConfigCache) +END(mips3_ConfigCache) /*---------------------------------------------------------------------------- * - * mips_r4000_FlushCache -- + * mips3_FlushCache -- * * Flush the caches. Assumes a line size of 16 bytes for speed. * @@ -1217,7 +1326,7 @@ END(mips_r4000_ConfigCache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r4000_FlushCache) +LEAF(mips3_FlushCache) lw t1, machPrimaryInstCacheSize lw t2, machPrimaryDataCacheSize # lw t3, machPrimaryInstCacheLSize @@ -1260,13 +1369,13 @@ LEAF(mips_r4000_FlushCache) j ra nop -END(mips_r4000_FlushCache) +END(mips3_FlushCache) /*---------------------------------------------------------------------------- * - * mips_r4000_FlushICache -- + * mips3_FlushICache -- * - * void mips_r4000_FlushICache(addr, len) + * void mips3_FlushICache(addr, len) * vm_offset_t addr, len; * * Flush instruction cache for range of addr to addr + len - 1. @@ -1282,7 +1391,7 @@ END(mips_r4000_FlushCache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r4000_FlushICache) +LEAF(mips3_FlushICache) addu a1, 127 # Align srl a1, a1, 7 # Number of unrolled loops 1: @@ -1300,13 +1409,13 @@ LEAF(mips_r4000_FlushICache) j ra nop -END(mips_r4000_FlushICache) +END(mips3_FlushICache) /*---------------------------------------------------------------------------- * - * mips_r4000_FlushDCache -- + * mips3_FlushDCache -- * - * void mips_r4000_FlushDCache(addr, len) + * void mips3_FlushDCache(addr, len) * vm_offset_t addr, len; * * Flush data cache for index range of addr to addr + len - 1. @@ -1321,7 +1430,7 @@ END(mips_r4000_FlushICache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r4000_FlushDCache) +LEAF(mips3_FlushDCache) lw a2, machPrimaryDataCacheSize addiu a2, -1 and a0, a0, a2 @@ -1347,13 +1456,13 @@ LEAF(mips_r4000_FlushDCache) j ra nop -END(mips_r4000_FlushDCache) +END(mips3_FlushDCache) /*---------------------------------------------------------------------------- * - * mips_r4000_HitFlushDCache -- + * mips3_HitFlushDCache -- * - * void mips_r4000_HitFlushDCache(addr, len) + * void mips3_HitFlushDCache(addr, len) * vm_offset_t addr, len; * * Flush data cache for range of addr to addr + len - 1. @@ -1370,7 +1479,8 @@ END(mips_r4000_FlushDCache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r4000_HitFlushDCache) +LEAF(mips3_HitFlushDCache) +ALEAF(MachHitFlushDCache) /* XXX */ beq a1, zero, 2f addu a1, 127 # Align addu a1, a1, a0 @@ -1393,12 +1503,12 @@ LEAF(mips_r4000_HitFlushDCache) 2: j ra nop -END(mips_r4000_HitFlushDCache) +END(mips3_HitFlushDCache) /*---------------------------------------------------------------------------- * - * mips_r4000_InvalidateDCache -- + * mips3_InvalidateDCache -- * - * void mips_r4000_FlushDCache(addr, len) + * void mips3_FlushDCache(addr, len) * vm_offset_t addr, len; * * Flush data cache for range of addr to addr + len - 1. @@ -1412,7 +1522,7 @@ END(mips_r4000_HitFlushDCache) * *---------------------------------------------------------------------------- */ -LEAF(mips_r4000_InvalidateDCache) +LEAF(mips3_InvalidateDCache) addu a1, a1, a0 # compute ending address 1: addu a0, a0, 4 @@ -1421,7 +1531,7 @@ LEAF(mips_r4000_InvalidateDCache) j ra nop -END(mips_r4000_InvalidateDCache) +END(mips3_InvalidateDCache) /*---------------------------------------------------------------------------- * diff --git a/sys/arch/pmax/pmax/machdep.c b/sys/arch/pmax/pmax/machdep.c index d3c6b0fb2c7..31bda4db0f8 100644 --- a/sys/arch/pmax/pmax/machdep.c +++ b/sys/arch/pmax/pmax/machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.51.2.4 1996/06/25 21:52:17 jtc Exp $ */ +/* $NetBSD: machdep.c,v 1.67 1996/10/23 20:04:40 mhitch Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -103,9 +103,6 @@ #include -#include /* XXX */ - - #include "pm.h" #include "cfb.h" #include "mfb.h" @@ -236,6 +233,9 @@ volatile u_int *Mach_reset_addr; #endif /* DS5000_200 || DS5000_25 || DS5000_100 || DS5000_240 */ +void prom_halt __P((int, char *)) __attribute__((__noreturn__)); + + /* * safepri is a safe priority for sleep to set for a spin-wait * during autoconfiguration or after a panic. @@ -283,31 +283,16 @@ mach_init(argc, argv, code, cv) argv++; } -#if 0 - /* - * Copy down exception vector code. - */ - if (MachUTLBMissEnd - MachUTLBMiss > 0x80) - panic("startup: UTLB code too large"); - bcopy(MachUTLBMiss, (char *)MACH_UTLB_MISS_EXC_VEC, - MachUTLBMissEnd - MachUTLBMiss); - bcopy(mips_R2000_exception, (char *)MACH_GEN_EXC_VEC, - mips_R2000_exceptionEnd - mips_R2000_exception); - - /* - * Copy locore-function vector. - */ - bcopy(&R2000_locore_vec, &mips_locore_jumpvec, - sizeof(mips_locore_jumpvec_t)); - /* + * Copy exception-dispatch code down to exception vector. + * Initialize locore-function vector. * Clear out the I and D caches. */ - mips_r2000_ConfigCache(); - mips_r2000_FlushCache(); +#ifdef notyet + /* XXX locore doesn't set up cpu type early enough for this */ + mips_vector_init(); #else - /*XXX*/ - r2000_vector_init(); + mips1_vector_init(); #endif /* look at argv[0] and compute bootdev */ @@ -1123,8 +1108,12 @@ sys_sigreturn(p, v, retval) } int waittime = -1; +struct pcb dumppcb; +/* + * These variables are needed by /sbin/savecore + */ int dumpmag = (int)0x8fca0101; /* magic number for savecore */ int dumpsize = 0; /* also for savecore */ long dumplo = 0; @@ -1160,6 +1149,9 @@ dumpsys() { int error; + /* Save registers. */ + savectx(&dumppcb, 0); + msgbufmapped = 0; if (dumpdev == NODEV) return; @@ -1206,10 +1198,40 @@ dumpsys() } } + +/* + * call PROM to halt or reboot. + */ +volatile void +prom_halt(howto, bootstr) + int howto; + char *bootstr; + +{ + if (callv != &callvec) { + if (howto & RB_HALT) + (*callv->_rex)('h'); + else { + (*callv->_rex)('b'); + } + } else if (howto & RB_HALT) { + volatile void (*f)() = (volatile void (*)())DEC_PROM_REINIT; + + (*f)(); /* jump back to prom monitor */ + } else { + volatile void (*f)() = (volatile void (*)())DEC_PROM_AUTOBOOT; + (*f)(); /* jump back to prom monitor and do 'auto' cmd */ + } + + while(1) ; /* fool gcc */ + /*NOTREACHED*/ +} + void boot(howto) register int howto; { + extern int cold; /* take a snap shot before clobbering any registers */ if (curproc) @@ -1220,13 +1242,23 @@ boot(howto) stacktrace(); #endif + /* If system is cold, just halt. */ + if (cold) { + howto |= RB_HALT; + goto haltsys; + } + + /* If "always halt" was specified as a boot flag, obey. */ + if ((boothowto & RB_HALT) != 0) + howto |= RB_HALT; + boothowto = howto; if ((howto & RB_NOSYNC) == 0 && waittime < 0) { /* * Synchronize the disks.... */ waittime = 0; - vfs_shutdown (); + vfs_shutdown(); /* * If we've been adjusting the clock, the todr @@ -1234,32 +1266,30 @@ boot(howto) */ resettodr(); } - (void) splhigh(); /* extreme priority */ - if (callv != &callvec) { - if (howto & RB_HALT) - (*callv->_rex)('h'); - else { - if (howto & RB_DUMP) - dumpsys(); - (*callv->_rex)('b'); - } - } else if (howto & RB_HALT) { - volatile void (*f)() = (volatile void (*)())DEC_PROM_REINIT; - (*f)(); /* jump back to prom monitor */ - } else { - volatile void (*f)() = (volatile void (*)())DEC_PROM_AUTOBOOT; + /* Disable interrupts. */ + splhigh(); - if (howto & RB_DUMP) - dumpsys(); - (*f)(); /* jump back to prom monitor and do 'auto' cmd */ - } - while(1) ; /* fool gcc */ + /* If rebooting and a dump is requested do it. */ +#if 0 + if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) +#else + if (howto & RB_DUMP) +#endif + dumpsys(); + + /* run any shutdown hooks */ + doshutdownhooks(); + +haltsys: + + /* Finally, halt/reboot the system. */ + printf("%s\n\n", howto & RB_HALT ? "halted." : "rebooting..."); + prom_halt(howto & RB_HALT, NULL); /*NOTREACHED*/ } - /* * Read a high-resolution clock, if one is available, and return * the current microsecond offset from time-of-day. @@ -1609,7 +1639,7 @@ kmin_enable_intr(slotno, handler, sc, on) #if defined(DEBUG) || defined(DIAGNOSTIC) printf("3MIN: imask %x, %sabling slot %d, sc %x addr 0x%x\n", - kn03_tc3_imask, (on? "en" : "dis"), slotno, sc, handler); + kmin_tc3_imask, (on? "en" : "dis"), slotno, sc, handler); #endif /* diff --git a/sys/arch/pmax/pmax/mainbus.c b/sys/arch/pmax/pmax/mainbus.c index 7d409bacd1a..46cc5f27a83 100644 --- a/sys/arch/pmax/pmax/mainbus.c +++ b/sys/arch/pmax/pmax/mainbus.c @@ -1,4 +1,4 @@ -/* $NetBSD: mainbus.c,v 1.11.4.3 1996/06/16 17:24:42 mhitch Exp $ */ +/* $NetBSD: mainbus.c,v 1.18 1996/10/13 03:39:51 christos Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -54,7 +54,7 @@ struct mainbus_softc { /* Definition of the mainbus driver. */ static int mbmatch __P((struct device *, void *, void *)); static void mbattach __P((struct device *, struct device *, void *)); -static int mbprint __P((void *, const char *)); +static int mbprint __P((void *, /* const TTTTT */ char *)); struct cfattach mainbus_ca = { sizeof (struct mainbus_softc), mbmatch, mbattach @@ -80,9 +80,6 @@ void kn01_intr_establish __P((struct device *parent, void *cookie, void kn01_intr_disestablish __P((struct confargs *)); static void kn01_attach __P((struct device *, struct device *, void *)); -void config_tcbus __P((struct device *parent, int cputype, - int (*printfn) __P((void *, char *)) )); - static int mbmatch(parent, cfdata, aux) @@ -238,7 +235,7 @@ dev slot > number of slots for %s", static int mbprint(aux, pnp) void *aux; - const char *pnp; + /* const TTTTT */ char *pnp; { if (pnp) diff --git a/sys/arch/pmax/pmax/mips_machdep.c b/sys/arch/pmax/pmax/mips_machdep.c index d54751b7ffa..7540870b44e 100644 --- a/sys/arch/pmax/pmax/mips_machdep.c +++ b/sys/arch/pmax/pmax/mips_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: mips_machdep.c,v 1.1 1996/05/19 00:31:57 jonathan Exp $ */ +/* $NetBSD: mips_machdep.c,v 1.6 1996/10/13 21:37:51 jonathan Exp $ */ /* * Copyright 1996 The Board of Trustees of The Leland Stanford @@ -13,8 +13,12 @@ * express or implied warranty. */ +#include +#include + #include /* declaration of of cpu_id */ -#include +#include +#include /* declaration of of cpu_id */ mips_locore_jumpvec_t mips_locore_jumpvec = { NULL, NULL, NULL, NULL, @@ -22,74 +26,50 @@ mips_locore_jumpvec_t mips_locore_jumpvec = { NULL, NULL }; - /* - * MIPS-I (r2000) locore-function vector. + * Forward declarations + * XXX should be in a header file so each mips port can include it. */ -mips_locore_jumpvec_t R2000_locore_vec = -{ - mips_r2000_ConfigCache, - mips_r2000_FlushCache, - mips_r2000_FlushDCache, - mips_r2000_FlushICache, - /*mips_r2000_FlushICache*/ mips_r2000_FlushCache, - mips_r2000_SetPID, - mips_r2000_TLBFlush, - mips_r2000_TLBFlushAddr, - mips_r2000_TLBUpdate, - mips_r2000_TLBWriteIndexed -}; +extern void cpu_identify __P((void)); +extern void mips_vector_init __P((void)); -#ifdef CPU_R4000 -/* - * MIPS-III (r4000) locore-function vector. - */ -mips_locore_jumpvec_t R4000_locore_vec = -{ - mips_r4000_ConfigCache, - mips_r4000_FlushCache, - mips_r4000_FlushDCache, - mips_r4000_FlushICache, - mips_r4000_ForceCacheUpdate, - mips_r4000_SetPID, - mips_r4000_TLBFlush, - mips_r4000_TLBFlushAddr, - mips_r4000_TLBUpdate, - mips_r4000_TLBWriteIndexed -}; -#endif /* CPU_R4000 */ +void mips1_vector_init __P((void)); +void mips3_vector_init __P((void)); +#ifdef MIPS1 /* r2000 family (mips-I cpu) */ /* - * Do all the stuff that locore normally does before calling main(), - * that is common to all mips-CPU NetBSD ports. - * - * The principal purpose of this function is to examine the - * variable cpu_id, into which the kernel locore start code - * writes the cpu ID register, and to then copy appropriate - * cod into the CPU exception-vector entries and the jump tables - * used to hide the differences in cache and TLB handling in - * different MIPS CPUs. - * - * This should be the very first thing called by each port's - * init_main() function. + * MIPS-I (r2000) locore-function vector. */ +mips_locore_jumpvec_t R2000_locore_vec = +{ + mips1_ConfigCache, + mips1_FlushCache, + mips1_FlushDCache, + mips1_FlushICache, + /*mips1_FlushICache*/ mips1_FlushCache, + mips1_SetPID, + mips1_TLBFlush, + mips1_TLBFlushAddr, + mips1_TLBUpdate, + mips1_TLBWriteIndexed +}; void -r2000_vector_init() +mips1_vector_init() { - extern char MachUTLBMiss[], MachUTLBMissEnd[]; - extern char mips_R2000_exception[], mips_R2000_exceptionEnd[]; + extern char mips1_UTLBMiss[], mips1_UTLBMissEnd[]; + extern char mips1_exception[], mips1_exceptionEnd[]; /* * Copy down exception vector code. */ - if (MachUTLBMissEnd - MachUTLBMiss > 0x80) + if (mips1_UTLBMissEnd - mips1_UTLBMiss > 0x80) panic("startup: UTLB code too large"); - bcopy(MachUTLBMiss, (char *)MACH_UTLB_MISS_EXC_VEC, - MachUTLBMissEnd - MachUTLBMiss); - bcopy(mips_R2000_exception, (char *)MACH_GEN_EXC_VEC, - mips_R2000_exceptionEnd - mips_R2000_exception); + bcopy(mips1_UTLBMiss, (char *)MACH_UTLB_MISS_EXC_VEC, + mips1_UTLBMissEnd - mips1_UTLBMiss); + bcopy(mips1_exception, (char *)MACH_GEN_EXC_VEC, + mips1_exceptionEnd - mips1_exception); /* * Copy locore-function vector. @@ -100,29 +80,57 @@ r2000_vector_init() /* * Clear out the I and D caches. */ - mips_r2000_ConfigCache(); - mips_r2000_FlushCache(); + mips1_ConfigCache(); + mips1_FlushCache(); } +#endif /* MIPS1 */ -#ifdef CPU_R4000 +#ifdef MIPS3 /* r4000 family (mips-III cpu) */ +/* + * MIPS-III (r4000) locore-function vector. + */ +mips_locore_jumpvec_t R4000_locore_vec = +{ + mips3_ConfigCache, + mips3_FlushCache, + mips3_FlushDCache, + mips3_FlushICache, +#if 0 + /* + * No such vector exists, perhaps it was meant to be HitFlushDCache? + */ + mips3_ForceCacheUpdate, +#else + mips3_FlushCache, +#endif + mips3_SetPID, + mips3_TLBFlush, + mips3_TLBFlushAddr, + mips3_TLBUpdate, + mips3_TLBWriteIndexed +}; + void -r4000_vector_init() +mips3_vector_init() { - extern char MachUTLBMiss[], MachUTLBMissEnd[]; - extern char mips_R4000_exception[], mips_R4000_exceptionEnd[]; + /* TLB miss handler address and end */ + extern char mips3_exception[], mips3_exceptionEnd[]; + + /* r4000 exception handler address and end */ + extern char mips3_TLBMiss[], mips3_TLBMissEnd[]; /* * Copy down exception vector code. */ - if (MachUTLBMissEnd - MachUTLBMiss > 0x80) + if (mips3_TLBMissEnd - mips3_TLBMiss > 0x80) panic("startup: UTLB code too large"); - bcopy(MachUTLBMiss, (char *)MACH_UTLB_MISS_EXC_VEC, - MachUTLBMissEnd - MachUTLBMiss); + bcopy(mips3_TLBMiss, (char *)MACH_UTLB_MISS_EXC_VEC, + mips3_TLBMissEnd - mips3_TLBMiss); - bcopy(mips_r4000_exception, (char *)MACH_GEN_EXC_VEC, - mips_r4000_exceptionEnd - mips_r4000_exception); + bcopy(mips3_exception, (char *)MACH_GEN_EXC_VEC, + mips3_exceptionEnd - mips3_exception); /* * Copy locore-function vector. @@ -133,18 +141,33 @@ r4000_vector_init() /* * Clear out the I and D caches. */ - mips_r4000_ConfigCache(); - mips_r4000_FlushCache(); + mips3_ConfigCache(); + mips3_FlushCache(); } -#endif +#endif /* MIPS3 */ + + +/* + * Do all the stuff that locore normally does before calling main(), + * that is common to all mips-CPU NetBSD ports. + * + * The principal purpose of this function is to examine the + * variable cpu_id, into which the kernel locore start code + * writes the cpu ID register, and to then copy appropriate + * cod into the CPU exception-vector entries and the jump tables + * used to hide the differences in cache and TLB handling in + * different MIPS CPUs. + * + * This should be the very first thing called by each port's + * init_main() function. + */ /* * Initialize the hardware exception vectors, and the jump table used to * call locore cache and TLB management functions, based on the kind * of CPU the kernel is running on. */ -void -mips_vector_init() +void mips_vector_init() { register caddr_t v; extern char edata[], end[]; @@ -156,16 +179,19 @@ mips_vector_init() /* Work out what kind of CPU and FPU are present. */ switch(cpu_id.cpu.cp_imp) { +#ifdef MIPS1 /* r2000 family (mips-I cpu) */ case MIPS_R2000: case MIPS_R3000: - r2000_vector_init(); + mips1_vector_init(); break; +#endif /* MIPS1 */ + -#ifdef CPU_R4000 +#ifdef MIPS3 /* r4000 family (mips-III cpu) */ case MIPS_R4000: - r4000_vector_init(); + mips3_vector_init(); break; -#endif CPU_R4000 +#endif /* MIPS3 */ default: panic("Unconfigured or unsupported MIPS cpu\n"); diff --git a/sys/arch/pmax/pmax/nameglue.h b/sys/arch/pmax/pmax/nameglue.h index 25833dc8561..5ddb31f961b 100644 --- a/sys/arch/pmax/pmax/nameglue.h +++ b/sys/arch/pmax/pmax/nameglue.h @@ -1,4 +1,4 @@ -/* $NetBSD: nameglue.h,v 1.1 1995/08/10 05:29:11 jonathan Exp $ */ +/* $NetBSD: nameglue.h,v 1.3 1996/10/13 03:39:52 christos Exp $ */ /* * Use macros to glue names for "machine-independent" functions diff --git a/sys/arch/pmax/pmax/pmap.c b/sys/arch/pmax/pmax/pmap.c index 4fdbf20e843..46b0b1e95c8 100644 --- a/sys/arch/pmax/pmax/pmap.c +++ b/sys/arch/pmax/pmax/pmap.c @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.10 1996/05/19 01:58:35 jonathan Exp $ */ +/* $NetBSD: pmap.c,v 1.13 1996/10/13 03:39:53 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -718,7 +718,7 @@ pmap_protect(pmap, sva, eva, prot) } } -#ifdef CPU_R4000 +#ifdef MIPS3 /* r4000,r4400,r4600 */ /* * Return RO protection of page. */ @@ -789,7 +789,7 @@ pmap_page_cache(pa,mode) splx(s); } -#endif /* CPU_R4000 */ +#endif /* MIPS3 */ /* r4000,r4400,r4600 */ /* diff --git a/sys/arch/pmax/pmax/pmax_trap.c b/sys/arch/pmax/pmax/pmax_trap.c index f5457833846..e6300d3bc53 100644 --- a/sys/arch/pmax/pmax/pmax_trap.c +++ b/sys/arch/pmax/pmax/pmax_trap.c @@ -1,4 +1,4 @@ -/* $NetBSD: pmax_trap.c,v 1.35.4.2 1996/06/16 17:26:29 mhitch Exp $ */ +/* $NetBSD: pmax_trap.c,v 1.39 1996/10/13 03:39:54 christos Exp $ */ /* * Copyright (c) 1988 University of Utah. diff --git a/sys/arch/pmax/pmax/swapgeneric.c b/sys/arch/pmax/pmax/swapgeneric.c index d38ef03fd6e..a59b3158af5 100644 --- a/sys/arch/pmax/pmax/swapgeneric.c +++ b/sys/arch/pmax/pmax/swapgeneric.c @@ -1,4 +1,4 @@ -/* $NetBSD: swapgeneric.c,v 1.7 1995/09/13 19:36:04 jonathan Exp $ */ +/* $NetBSD: swapgeneric.c,v 1.9 1996/10/13 03:39:55 christos Exp $ */ /* * Copyright (c) 1992, 1993 diff --git a/sys/arch/pmax/pmax/trap.c b/sys/arch/pmax/pmax/trap.c index 14b8b134f1e..92d3721a567 100644 --- a/sys/arch/pmax/pmax/trap.c +++ b/sys/arch/pmax/pmax/trap.c @@ -1,4 +1,4 @@ -/* $NetBSD: trap.c,v 1.37.2.2 1996/09/09 20:39:56 thorpej Exp $ */ +/* $NetBSD: trap.c,v 1.50 1996/10/13 21:37:49 jonathan Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -42,8 +42,8 @@ * @(#)trap.c 8.5 (Berkeley) 1/11/94 */ -#if #defined(CPU_R4000) && !defined(CPU_R3000) -#error Must define at least one of CPU_R3000 or CPU_R4000. +#if !defined(MIPS1) && !defined(MIPS3) +#error Neither "MIPS1" (r2000 family), "MIP3" (r4000 family) was configured. #endif #include @@ -60,6 +60,8 @@ #endif #include +#include + #include #include #include @@ -101,166 +103,178 @@ int (*mips_hardware_intr) __P((u_int mask, u_int pc, u_int status, extern void MachTLBModException __P((void)); extern void MachTLBMissException __P((void)); -extern void mips_r2000_KernGenException __P((void)); -extern void mips_r2000_UserGenException __P((void)); -extern void mips_r2000_KernIntr __P((void)); -extern void mips_r2000_UserIntr __P((void)); -extern void mips_r2000_TLBModException __P((void)); -extern void mips_r2000_TLBMissException __P((void)); +extern void mips1_KernGenException __P((void)); +extern void mips1_UserGenException __P((void)); +extern void mips1_KernIntr __P((void)); +extern void mips1_UserIntr __P((void)); +extern void mips1_TLBModException __P((void)); + +extern void mips1_TLBMissException __P((void)); +/* marks end of vector code */ +extern void mips1_UTLBMiss __P((void)); +extern void mips1_exceptionentry_end __P((void)); + +extern void mips3_KernGenException __P((void)); +extern void mips3_UserGenException __P((void)); +extern void mips3_KernIntr __P((void)); +extern void mips3_UserIntr __P((void)); +extern void mips3_TLBModException __P((void)); +extern void mips3_TLBMissException __P((void)); +/* marks end of vector code */ +extern void mips3_TLBMiss __P((void)); +extern void mips3_exceptionentry_end __P((void)); -extern void mips_r4000_KernGenException __P((void)); -extern void mips_r4000_UserGenException __P((void)); -extern void mips_r4000_KernIntr __P((void)); -extern void mips_r4000_UserIntr __P((void)); -extern void mips_r4000_TLBModException __P((void)); -extern void mips_r4000_TLBMissException __P((void)); -void (*mips_r2000_ExceptionTable[]) __P((void)) = { +void (*mips1_ExceptionTable[]) __P((void)) = { /* * The kernel exception handlers. */ - mips_r2000_KernIntr, /* 0 external interrupt */ - mips_r2000_KernGenException, /* 1 TLB modification */ - mips_r2000_TLBMissException, /* 2 TLB miss (load or instr. fetch) */ - mips_r2000_TLBMissException, /* 3 TLB miss (store) */ - mips_r2000_KernGenException, /* 4 address error (load or I-fetch) */ - mips_r2000_KernGenException, /* 5 address error (store) */ - mips_r2000_KernGenException, /* 6 bus error (I-fetch) */ - mips_r2000_KernGenException, /* 7 bus error (load or store) */ - mips_r2000_KernGenException, /* 8 system call */ - mips_r2000_KernGenException, /* 9 breakpoint */ - mips_r2000_KernGenException, /* 10 reserved instruction */ - mips_r2000_KernGenException, /* 11 coprocessor unusable */ - mips_r2000_KernGenException, /* 12 arithmetic overflow */ - mips_r2000_KernGenException, /* 13 r4k trap excpt, r3k reserved */ - mips_r2000_KernGenException, /* 14 r4k virt coherence, r3k reserved */ - mips_r2000_KernGenException, /* 15 r4k FP exception, r3k reserved */ - mips_r2000_KernGenException, /* 16 reserved */ - mips_r2000_KernGenException, /* 17 reserved */ - mips_r2000_KernGenException, /* 18 reserved */ - mips_r2000_KernGenException, /* 19 reserved */ - mips_r2000_KernGenException, /* 20 reserved */ - mips_r2000_KernGenException, /* 21 reserved */ - mips_r2000_KernGenException, /* 22 reserved */ - mips_r2000_KernGenException, /* 23 watch exception */ - mips_r2000_KernGenException, /* 24 reserved */ - mips_r2000_KernGenException, /* 25 reserved */ - mips_r2000_KernGenException, /* 26 reserved */ - mips_r2000_KernGenException, /* 27 reserved */ - mips_r2000_KernGenException, /* 28 reserved */ - mips_r2000_KernGenException, /* 29 reserved */ - mips_r2000_KernGenException, /* 30 reserved */ - mips_r2000_KernGenException, /* 31 virt. coherence exception data */ + mips1_KernIntr, /* 0 external interrupt */ + mips1_KernGenException, /* 1 TLB modification */ + mips1_TLBMissException, /* 2 TLB miss (load or instr. fetch) */ + mips1_TLBMissException, /* 3 TLB miss (store) */ + mips1_KernGenException, /* 4 address error (load or I-fetch) */ + mips1_KernGenException, /* 5 address error (store) */ + mips1_KernGenException, /* 6 bus error (I-fetch) */ + mips1_KernGenException, /* 7 bus error (load or store) */ + mips1_KernGenException, /* 8 system call */ + mips1_KernGenException, /* 9 breakpoint */ + mips1_KernGenException, /* 10 reserved instruction */ + mips1_KernGenException, /* 11 coprocessor unusable */ + mips1_KernGenException, /* 12 arithmetic overflow */ + mips1_KernGenException, /* 13 r4k trap excpt, r3k reserved */ + mips1_KernGenException, /* 14 r4k virt coherence, r3k reserved */ + mips1_KernGenException, /* 15 r4k FP exception, r3k reserved */ + mips1_KernGenException, /* 16 reserved */ + mips1_KernGenException, /* 17 reserved */ + mips1_KernGenException, /* 18 reserved */ + mips1_KernGenException, /* 19 reserved */ + mips1_KernGenException, /* 20 reserved */ + mips1_KernGenException, /* 21 reserved */ + mips1_KernGenException, /* 22 reserved */ + mips1_KernGenException, /* 23 watch exception */ + mips1_KernGenException, /* 24 reserved */ + mips1_KernGenException, /* 25 reserved */ + mips1_KernGenException, /* 26 reserved */ + mips1_KernGenException, /* 27 reserved */ + mips1_KernGenException, /* 28 reserved */ + mips1_KernGenException, /* 29 reserved */ + mips1_KernGenException, /* 30 reserved */ + mips1_KernGenException, /* 31 virt. coherence exception data */ /* * The user exception handlers. */ - mips_r2000_UserIntr, /* 0 */ - mips_r2000_UserGenException, /* 1 */ - mips_r2000_UserGenException, /* 2 */ - mips_r2000_UserGenException, /* 3 */ - mips_r2000_UserGenException, /* 4 */ - mips_r2000_UserGenException, /* 5 */ - mips_r2000_UserGenException, /* 6 */ - mips_r2000_UserGenException, /* 7 */ - mips_r2000_UserGenException, /* 8 */ - mips_r2000_UserGenException, /* 9 */ - mips_r2000_UserGenException, /* 10 */ - mips_r2000_UserGenException, /* 11 */ - mips_r2000_UserGenException, /* 12 */ - mips_r2000_UserGenException, /* 13 */ - mips_r2000_UserGenException, /* 14 */ - mips_r2000_UserGenException, /* 15 */ - mips_r2000_UserGenException, /* 16 */ - mips_r2000_UserGenException, /* 17 */ - mips_r2000_UserGenException, /* 18 */ - mips_r2000_UserGenException, /* 19 */ - mips_r2000_UserGenException, /* 20 */ - mips_r2000_UserGenException, /* 21 */ - mips_r2000_UserGenException, /* 22 */ - mips_r2000_UserGenException, /* 23 */ - mips_r2000_UserGenException, /* 24 */ - mips_r2000_UserGenException, /* 25 */ - mips_r2000_UserGenException, /* 26 */ - mips_r2000_UserGenException, /* 27 */ - mips_r2000_UserGenException, /* 28 */ - mips_r2000_UserGenException, /* 29 */ - mips_r2000_UserGenException, /* 20 */ - mips_r2000_UserGenException, /* 31 */ + mips1_UserIntr, /* 0 */ + mips1_UserGenException, /* 1 */ + mips1_UserGenException, /* 2 */ + mips1_UserGenException, /* 3 */ + mips1_UserGenException, /* 4 */ + mips1_UserGenException, /* 5 */ + mips1_UserGenException, /* 6 */ + mips1_UserGenException, /* 7 */ + mips1_UserGenException, /* 8 */ + mips1_UserGenException, /* 9 */ + mips1_UserGenException, /* 10 */ + mips1_UserGenException, /* 11 */ + mips1_UserGenException, /* 12 */ + mips1_UserGenException, /* 13 */ + mips1_UserGenException, /* 14 */ + mips1_UserGenException, /* 15 */ + mips1_UserGenException, /* 16 */ + mips1_UserGenException, /* 17 */ + mips1_UserGenException, /* 18 */ + mips1_UserGenException, /* 19 */ + mips1_UserGenException, /* 20 */ + mips1_UserGenException, /* 21 */ + mips1_UserGenException, /* 22 */ + mips1_UserGenException, /* 23 */ + mips1_UserGenException, /* 24 */ + mips1_UserGenException, /* 25 */ + mips1_UserGenException, /* 26 */ + mips1_UserGenException, /* 27 */ + mips1_UserGenException, /* 28 */ + mips1_UserGenException, /* 29 */ + mips1_UserGenException, /* 20 */ + mips1_UserGenException, /* 31 */ }; -void (*machExceptionTable[]) __P((void)) = { +#ifdef MIPS3 /* r4000 family (mips-III cpu) */ + +void (*mips3_ExceptionTable[]) __P((void)) = { /* * The kernel exception handlers. */ - mips_r2000_KernIntr, /* 0 external interrupt */ - mips_r2000_KernGenException, /* 1 TLB modification */ - mips_r2000_TLBMissException, /* 2 TLB miss (load or instr. fetch) */ - mips_r2000_TLBMissException, /* 3 TLB miss (store) */ - mips_r2000_KernGenException, /* 4 address error (load or I-fetch) */ - mips_r2000_KernGenException, /* 5 address error (store) */ - mips_r2000_KernGenException, /* 6 bus error (I-fetch) */ - mips_r2000_KernGenException, /* 7 bus error (load or store) */ - mips_r2000_KernGenException, /* 8 system call */ - mips_r2000_KernGenException, /* 9 breakpoint */ - mips_r2000_KernGenException, /* 10 reserved instruction */ - mips_r2000_KernGenException, /* 11 coprocessor unusable */ - mips_r2000_KernGenException, /* 12 arithmetic overflow */ - mips_r2000_KernGenException, /* 13 r4k trap excpt, r3k reserved */ - mips_r2000_KernGenException, /* 14 r4k virt coherence, r3k reserved */ - mips_r2000_KernGenException, /* 15 r4k FP exception, r3k reserved */ - mips_r2000_KernGenException, /* 16 reserved */ - mips_r2000_KernGenException, /* 17 reserved */ - mips_r2000_KernGenException, /* 18 reserved */ - mips_r2000_KernGenException, /* 19 reserved */ - mips_r2000_KernGenException, /* 20 reserved */ - mips_r2000_KernGenException, /* 21 reserved */ - mips_r2000_KernGenException, /* 22 reserved */ - mips_r2000_KernGenException, /* 23 watch exception */ - mips_r2000_KernGenException, /* 24 reserved */ - mips_r2000_KernGenException, /* 25 reserved */ - mips_r2000_KernGenException, /* 26 reserved */ - mips_r2000_KernGenException, /* 27 reserved */ - mips_r2000_KernGenException, /* 28 reserved */ - mips_r2000_KernGenException, /* 29 reserved */ - mips_r2000_KernGenException, /* 30 reserved */ - mips_r2000_KernGenException, /* 31 virt. coherence exception data */ + mips3_KernIntr, /* 0 external interrupt */ + mips3_KernGenException, /* 1 TLB modification */ + mips3_TLBMissException, /* 2 TLB miss (load or instr. fetch) */ + mips3_TLBMissException, /* 3 TLB miss (store) */ + mips3_KernGenException, /* 4 address error (load or I-fetch) */ + mips3_KernGenException, /* 5 address error (store) */ + mips3_KernGenException, /* 6 bus error (I-fetch) */ + mips3_KernGenException, /* 7 bus error (load or store) */ + mips3_KernGenException, /* 8 system call */ + mips3_KernGenException, /* 9 breakpoint */ + mips3_KernGenException, /* 10 reserved instruction */ + mips3_KernGenException, /* 11 coprocessor unusable */ + mips3_KernGenException, /* 12 arithmetic overflow */ + mips3_KernGenException, /* 13 r4k trap excpt, r3k reserved */ + mips3_KernGenException, /* 14 r4k virt coherence, r3k reserved */ + mips3_KernGenException, /* 15 r4k FP exception, r3k reserved */ + mips3_KernGenException, /* 16 reserved */ + mips3_KernGenException, /* 17 reserved */ + mips3_KernGenException, /* 18 reserved */ + mips3_KernGenException, /* 19 reserved */ + mips3_KernGenException, /* 20 reserved */ + mips3_KernGenException, /* 21 reserved */ + mips3_KernGenException, /* 22 reserved */ + mips3_KernGenException, /* 23 watch exception */ + mips3_KernGenException, /* 24 reserved */ + mips3_KernGenException, /* 25 reserved */ + mips3_KernGenException, /* 26 reserved */ + mips3_KernGenException, /* 27 reserved */ + mips3_KernGenException, /* 28 reserved */ + mips3_KernGenException, /* 29 reserved */ + mips3_KernGenException, /* 30 reserved */ + mips3_KernGenException, /* 31 virt. coherence exception data */ /* * The user exception handlers. */ - mips_r2000_UserIntr, /* 0 */ - mips_r2000_UserGenException, /* 1 */ - mips_r2000_UserGenException, /* 2 */ - mips_r2000_UserGenException, /* 3 */ - mips_r2000_UserGenException, /* 4 */ - mips_r2000_UserGenException, /* 5 */ - mips_r2000_UserGenException, /* 6 */ - mips_r2000_UserGenException, /* 7 */ - mips_r2000_UserGenException, /* 8 */ - mips_r2000_UserGenException, /* 9 */ - mips_r2000_UserGenException, /* 10 */ - mips_r2000_UserGenException, /* 11 */ - mips_r2000_UserGenException, /* 12 */ - mips_r2000_UserGenException, /* 13 */ - mips_r2000_UserGenException, /* 14 */ - mips_r2000_UserGenException, /* 15 */ - mips_r2000_UserGenException, /* 16 */ - mips_r2000_UserGenException, /* 17 */ - mips_r2000_UserGenException, /* 18 */ - mips_r2000_UserGenException, /* 19 */ - mips_r2000_UserGenException, /* 20 */ - mips_r2000_UserGenException, /* 21 */ - mips_r2000_UserGenException, /* 22 */ - mips_r2000_UserGenException, /* 23 */ - mips_r2000_UserGenException, /* 24 */ - mips_r2000_UserGenException, /* 25 */ - mips_r2000_UserGenException, /* 26 */ - mips_r2000_UserGenException, /* 27 */ - mips_r2000_UserGenException, /* 28 */ - mips_r2000_UserGenException, /* 29 */ - mips_r2000_UserGenException, /* 20 */ - mips_r2000_UserGenException, /* 31 */ + mips3_UserIntr, /* 0 */ + mips3_UserGenException, /* 1 */ + mips3_UserGenException, /* 2 */ + mips3_UserGenException, /* 3 */ + mips3_UserGenException, /* 4 */ + mips3_UserGenException, /* 5 */ + mips3_UserGenException, /* 6 */ + mips3_UserGenException, /* 7 */ + mips3_UserGenException, /* 8 */ + mips3_UserGenException, /* 9 */ + mips3_UserGenException, /* 10 */ + mips3_UserGenException, /* 11 */ + mips3_UserGenException, /* 12 */ + mips3_UserGenException, /* 13 */ + mips3_UserGenException, /* 14 */ + mips3_UserGenException, /* 15 */ + mips3_UserGenException, /* 16 */ + mips3_UserGenException, /* 17 */ + mips3_UserGenException, /* 18 */ + mips3_UserGenException, /* 19 */ + mips3_UserGenException, /* 20 */ + mips3_UserGenException, /* 21 */ + mips3_UserGenException, /* 22 */ + mips3_UserGenException, /* 23 */ + mips3_UserGenException, /* 24 */ + mips3_UserGenException, /* 25 */ + mips3_UserGenException, /* 26 */ + mips3_UserGenException, /* 27 */ + mips3_UserGenException, /* 28 */ + mips3_UserGenException, /* 29 */ + mips3_UserGenException, /* 20 */ + mips3_UserGenException, /* 31 */ }; +#endif /* MIPS3 */ + char *trap_type[] = { "external interrupt", @@ -286,7 +300,7 @@ char *trap_type[] = { "reserved 20", "reserved 21", "reserved 22", - "r4k watch", + "r4000 watch", "reserved 24", "reserved 25", "reserved 26", @@ -294,7 +308,7 @@ char *trap_type[] = { "reserved 28", "reserved 29", "reserved 30", - "r4k virtual coherency data", + "r4000 virtual coherency data", }; #ifdef DEBUG @@ -439,7 +453,7 @@ trap(statusReg, causeReg, vadr, pc, args) if (!(entry & PG_V) || (entry & PG_M)) panic("trap: ktlbmod: invalid pte"); #endif - if (entry & PG_RO) { + if (PAGE_IS_RDONLY(entry, vadr)) { /* write to read only page in the kernel */ ftype = VM_PROT_WRITE; goto kernel_fault; @@ -448,7 +462,7 @@ trap(statusReg, causeReg, vadr, pc, args) pte->pt_entry = entry; vadr &= ~PGOFSET; MachTLBUpdate(vadr, entry); - pa = entry & PG_FRAME; + pa = PTE_TO_PADDR(entry); #ifdef ATTR pmap_attributes[atop(pa)] |= PMAP_ATTR_MOD; #else @@ -476,7 +490,7 @@ trap(statusReg, causeReg, vadr, pc, args) panic("trap: utlbmod: invalid pte"); } #endif - if (entry & PG_RO) { + if (PAGE_IS_RDONLY(entry, vadr)) { /* write to read only page */ ftype = VM_PROT_WRITE; goto dofault; @@ -486,7 +500,7 @@ trap(statusReg, causeReg, vadr, pc, args) vadr = (vadr & ~PGOFSET) | (pmap->pm_tlbpid << VMMACH_TLB_PID_SHIFT); MachTLBUpdate(vadr, entry); - pa = entry & PG_FRAME; + pa = PTE_TO_PADDR(entry); #ifdef ATTR pmap_attributes[atop(pa)] |= PMAP_ATTR_MOD; #else @@ -582,7 +596,7 @@ trap(statusReg, causeReg, vadr, pc, args) goto err; } ucode = vadr; - i = (rv == KERN_PROTECTION_FAILURE) ? SIGBUS : SIGSEGV; + i = SIGSEGV; break; } @@ -590,7 +604,7 @@ trap(statusReg, causeReg, vadr, pc, args) case T_ADDR_ERR_ST+T_USER: /* misaligned or kseg access */ case T_BUS_ERR_IFETCH+T_USER: /* BERR asserted to cpu */ case T_BUS_ERR_LD_ST+T_USER: /* BERR asserted to cpu */ - i = SIGSEGV; + i = SIGBUS; break; case T_SYSCALL+T_USER: @@ -770,6 +784,13 @@ trap(statusReg, causeReg, vadr, pc, args) locr0[V0] = i; locr0[A3] = 1; } + + /* + * If we modified code or data, flush caches. + * XXX code unyderling ptrace() and/or proc fs should do this? + */ + if (code == SYS_ptrace) + MachFlushCache(); done: #ifdef SYSCALL_DEBUG scdebug_ret(p, code, i, rval); @@ -1049,7 +1070,7 @@ interrupt(statusReg, causeReg, pc /* XXX what, args */ ) intrcnt[SOFTCLOCK_INTR]++; cnt.v_soft++; softclock(); - } + } } @@ -1131,6 +1152,19 @@ trapDump(msg) */ static unsigned GetBranchDest __P((InstFmt *InstPtr)); + +/* + * Compute destination of a branch instruction. + * XXX Compute desination of r4000 squashed branches? + */ +static unsigned +GetBranchDest(InstPtr) + InstFmt *InstPtr; +{ + return ((unsigned)InstPtr + 4 + ((short)InstPtr->IType.imm << 2)); +} + + /* * Return the resulting PC as if the branch was executed. */ @@ -1145,13 +1179,9 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) unsigned retAddr; int condition; -#ifdef notyet /* Compute desination of r4000 squashed branches */ -#define GetBranchDest(InstPtr, inst) \ - ((unsigned)InstPtr + 4 + ((short)inst.IType.imm << 2)) - inst.word = (instPC < MACH_CACHED_MEMORY_ADDR) ? fuiword((caddr_t)instPC) : *(unsigned*)instPC; -#endif + #if 0 printf("regsPtr=%x PC=%x Inst=%x fpcCsr=%x\n", regsPtr, instPC, inst.word, fpcCSR); /* XXX */ @@ -1275,12 +1305,6 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch) return (retAddr); } -static unsigned -GetBranchDest(InstPtr) - InstFmt *InstPtr; -{ - return ((unsigned)InstPtr + 4 + ((short)InstPtr->IType.imm << 2)); -} /* * This routine is called by procxmt() to single step one instruction. @@ -1482,12 +1506,12 @@ specialframe: Between((unsigned)a, pc, (unsigned)b) - /* Backtraces should contine through interrupts from kernel mode */ -#ifdef CPU_R3000 - if (pcBetween(mips_r2000_KernIntr, mips_r2000_UserIntr)) { + /* Backtraces should continue through interrupts from kernel mode */ +#ifdef MIPS1 /* r2000 family (mips-I cpu) */ + if (pcBetween(mips1_KernIntr, mips1_UserIntr)) { /* NOTE: the offsets depend on the code in locore.s */ (*printfn)("r3000 KernIntr+%x: (%x, %x ,%x) -------\n", - pc-(unsigned)mips_r2000_KernIntr, a0, a1, a2); + pc-(unsigned)mips1_KernIntr, a0, a1, a2); a0 = kdbpeek(sp + 36); a1 = kdbpeek(sp + 40); a2 = kdbpeek(sp + 44); @@ -1498,13 +1522,13 @@ specialframe: sp = sp + 108; goto specialframe; } -#endif /* CPU_R3000 */ +#endif /* MIPS1 */ -#ifdef CPU_R4000 - if (pcBetween(mips_r4000_KernIntr, mips_r4000_UserIntr) { +#ifdef MIPS3 /* r4000 family (mips-III cpu) */ + if (pcBetween(mips3_KernIntr, mips3_UserIntr)) { /* NOTE: the offsets depend on the code in locore.s */ (*printfn)("R4000 KernIntr+%x: (%x, %x ,%x) -------\n", - pc-(unsigned)mips_r4000_KernIntr, a0, a1, a2); + pc-(unsigned)mips3_KernIntr, a0, a1, a2); a0 = kdbpeek(sp + 36); a1 = kdbpeek(sp + 40); a2 = kdbpeek(sp + 44); @@ -1515,7 +1539,7 @@ specialframe: sp = sp + 108; goto specialframe; } -#endif /* cpu_r4000 */ +#endif /* MIPS3 */ @@ -1528,34 +1552,46 @@ specialframe: /* XXX fixup tests after cutting and pasting in locore.S */ /* R4000 exception handlers */ - if (pcBetween(mips_r2000_KernGenException, mips_r2000_UserGenException)) - subr = (unsigned) mips_r2000_KernGenException; - else if (pcBetween(mips_r2000_UserGenException,mips_r2000_KernIntr)) - subr = (unsigned) mips_r2000_UserGenException; - else if (pcBetween(mips_r2000_KernIntr, mips_r2000_UserIntr)) - subr = (unsigned) mips_r2000_KernIntr; - else if (pcBetween(mips_r2000_UserIntr, mips_r2000_TLBMissException)) - subr = (unsigned) mips_r2000_UserIntr; +#ifdef MIPS1 /* r2000 family (mips-I cpu) */ + if (pcBetween(mips1_KernGenException, mips1_UserGenException)) + subr = (unsigned) mips1_KernGenException; + else if (pcBetween(mips1_UserGenException,mips1_KernIntr)) + subr = (unsigned) mips1_UserGenException; + else if (pcBetween(mips1_KernIntr, mips1_UserIntr)) + subr = (unsigned) mips1_KernIntr; + else if (pcBetween(mips1_UserIntr, mips1_TLBMissException)) + subr = (unsigned) mips1_UserIntr; + + else if (pcBetween(mips1_UserIntr, mips1_TLBMissException)) + subr = (unsigned) mips1_UserIntr; + else if (pcBetween(mips1_UTLBMiss, mips1_exceptionentry_end)) { + (*printfn)("<>"); + goto done; + } + else +#endif /* MIPS1 */ - else if (pcBetween(mips_r2000_UserIntr, mips_r2000_TLBMissException)) - subr = (unsigned) mips_r2000_UserIntr; +#ifdef MIPS3 /* r4000 family (mips-III cpu) */ /* R4000 exception handlers */ -#ifdef CPU_R4000 - else if (pcBetween(mips_r4000_KernGenException, mips_r4000_UserGenException)) - subr = (unsigned) mips_r4000_KernGenException; - else if (pcBetween(mips_r4000_UserGenException,mips_r4000_KernIntr)) - subr = (unsigned) mips_r4000_UserGenException; - else if (pcBetween(mips_r4000_KernIntr, mips_r4000_UserIntr)) - subr = (unsigned) mips_r4000_KernIntr; - - - else if (pcBetween(mips_r4000_UserIntr, mips_r4000_TLBMissException)) - subr = (unsigned) mips_r4000_UserIntr; -#endif /* CPU_R4000 */ + if (pcBetween(mips3_KernGenException, mips3_UserGenException)) + subr = (unsigned) mips3_KernGenException; + else if (pcBetween(mips3_UserGenException,mips3_KernIntr)) + subr = (unsigned) mips3_UserGenException; + else if (pcBetween(mips3_KernIntr, mips3_UserIntr)) + subr = (unsigned) mips3_KernIntr; + + + else if (pcBetween(mips3_UserIntr, mips3_TLBMissException)) + subr = (unsigned) mips3_UserIntr; + else if (pcBetween(mips3_TLBMiss, mips3_exceptionentry_end)) { + (*printfn)("<>"); + goto done; + } else +#endif /* MIPS3 */ - else if (pcBetween(splx, MachEmptyWriteBuffer)) + if (pcBetween(splx, wbflush)) subr = (unsigned) splx; else if (pcBetween(cpu_switch, fuword)) subr = (unsigned) cpu_switch; @@ -1564,12 +1600,9 @@ specialframe: ra = 0; goto done; } - else if (pc >= (unsigned)MachUTLBMiss && pc < (unsigned)setsoftclock) { - (*printfn)("<>"); - goto done; - } - /* check for bad PC */ + + /* Check for bad PC */ if (pc & 3 || pc < 0x80000000 || pc >= (unsigned)edata) { (*printfn)("PC 0x%x: not in kernel space\n", pc); ra = 0; @@ -1731,19 +1764,20 @@ static struct { void *addr; char *name;} names[] = { #ifdef pmax Name(am7990_meminit), #endif -#ifdef CPU_R3000 - Name(mips_r2000_KernGenException), - Name(mips_r2000_UserGenException), - Name(mips_r2000_KernIntr), - Name(mips_r2000_UserIntr), -#endif /* CPU_R3000 */ - -#ifdef CPU_R4000 - Name(mips_r4000_KernGenException), - Name(mips_r4000_UserGenException), - Name(mips_r4000_KernIntr), - Name(mips_r4000_UserIntr), -#endif /* CPU_R4000 */ + +#ifdef MIPS1 /* r2000 family (mips-I cpu) */ + Name(mips1_KernGenException), + Name(mips1_UserGenException), + Name(mips1_KernIntr), + Name(mips1_UserIntr), +#endif /* MIPS1 */ + +#ifdef MIPS3 /* r4000 family (mips-III cpu) */ + Name(mips3_KernGenException), + Name(mips3_UserGenException), + Name(mips3_KernIntr), + Name(mips3_UserIntr), +#endif /* MIPS3 */ Name(splx), Name(idle), diff --git a/sys/arch/pmax/pmax/vm_machdep.c b/sys/arch/pmax/pmax/vm_machdep.c index face91cc537..3a211a943a0 100644 --- a/sys/arch/pmax/pmax/vm_machdep.c +++ b/sys/arch/pmax/pmax/vm_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: vm_machdep.c,v 1.11 1996/05/19 15:55:31 jonathan Exp $ */ +/* $NetBSD: vm_machdep.c,v 1.13 1996/10/13 03:39:57 christos Exp $ */ /* * Copyright (c) 1988 University of Utah. diff --git a/sys/arch/pmax/stand/Makefile b/sys/arch/pmax/stand/Makefile index 19e6b1e8709..cc13b44058e 100644 --- a/sys/arch/pmax/stand/Makefile +++ b/sys/arch/pmax/stand/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.7 1996/02/01 22:32:19 mycroft Exp $ +# $NetBSD: Makefile,v 1.8 1996/10/18 06:08:15 thorpej Exp $ # @(#)Makefile 8.3 (Berkeley) 2/16/94 DESTDIR= @@ -98,8 +98,8 @@ clean cleandir: install: ./mkboot boot rzboot bootrz - install -o ${BINOWN} -g ${BINGRP} -m 444 rzboot ${DESTDIR}/usr/mdec - install -o ${BINOWN} -g ${BINGRP} -m 444 bootrz ${DESTDIR}/usr/mdec + ${INSTALL} -o ${BINOWN} -g ${BINGRP} -m 444 rzboot ${DESTDIR}/usr/mdec + ${INSTALL} -o ${BINOWN} -g ${BINGRP} -m 444 bootrz ${DESTDIR}/usr/mdec depend: ${SRCS} mkdep ${INCPATH} ${DEFS} ${SRCS} diff --git a/sys/arch/pmax/stand/dec_prom.h b/sys/arch/pmax/stand/dec_prom.h index f46e99ebb9b..6eecc47c5a7 100644 --- a/sys/arch/pmax/stand/dec_prom.h +++ b/sys/arch/pmax/stand/dec_prom.h @@ -1,4 +1,4 @@ -/* $NetBSD: dec_prom.h,v 1.8 1996/04/08 00:52:10 jonathan Exp $ */ +/* $NetBSD: dec_prom.h,v 1.9 1996/09/21 03:33:18 jonathan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -137,7 +137,7 @@ struct callback { int (*_console_init) __P((void)); /* 98 */ void (*_halt) __P((int *v, int cnt)); /* 9c */ void (*_showfault) __P((void)); /* a0 */ - tcinfo *(*_gettcinfo) __P(()); /* a4 */ + tcinfo *(*_gettcinfo) __P((void)); /*XXX* bogus proto */ /* a4 */ int (*_execute_cmd) __P((char *cmd)); /* a8 */ void (*_rex) __P((char cmd)); /* ac */ /* b0 to d4 reserved */ diff --git a/sys/arch/pmax/stand/filesystem.c b/sys/arch/pmax/stand/filesystem.c index c8462717812..f60323a72ef 100644 --- a/sys/arch/pmax/stand/filesystem.c +++ b/sys/arch/pmax/stand/filesystem.c @@ -30,7 +30,7 @@ * * filesystem.c * - * $Id: filesystem.c,v 1.2 1996/09/15 21:13:22 deraadt Exp $ + * $Id: filesystem.c,v 1.3 1996/12/22 15:18:50 graichen Exp $ */ #include diff --git a/sys/arch/pmax/stand/libsa/devopen.c b/sys/arch/pmax/stand/libsa/devopen.c index 4abb26af879..52c98a2a26b 100644 --- a/sys/arch/pmax/stand/libsa/devopen.c +++ b/sys/arch/pmax/stand/libsa/devopen.c @@ -1,4 +1,4 @@ -/* $NetBSD: devopen.c,v 1.5 1995/01/18 06:53:54 mellon Exp $ */ +/* $NetBSD: devopen.c,v 1.6 1996/09/30 01:02:06 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -47,10 +47,10 @@ */ devopen(f, fname, file) struct open_file *f; - char *fname; + const char *fname; char **file; /* out */ { - register char *cp; + register const char *cp; register char *ncp; register struct devsw *dp; register int c, i; @@ -153,6 +153,6 @@ fnd: f->f_dev = dp; if (file && *cp != '\0') - *file = cp; + *file = (char *)cp; /* XXX */ return (0); } diff --git a/sys/arch/pmax/stand/libsa/getenv.c b/sys/arch/pmax/stand/libsa/getenv.c index 8b77da2c9b1..0df210b1dd9 100644 --- a/sys/arch/pmax/stand/libsa/getenv.c +++ b/sys/arch/pmax/stand/libsa/getenv.c @@ -1,4 +1,4 @@ -/* $NetBSD: getenv.c,v 1.5 1995/01/18 06:53:55 mellon Exp $ */ +/* $NetBSD: getenv.c,v 1.6 1996/09/30 01:14:41 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -44,5 +44,5 @@ char * getenv(s) char *s; { - return (callv->getenv(s)); + return ((callv->_getenv)(s)); } diff --git a/sys/arch/pmax/stand/libsa/gets.c b/sys/arch/pmax/stand/libsa/gets.c index 36bc3eb75bc..b1c0ebb3da9 100644 --- a/sys/arch/pmax/stand/libsa/gets.c +++ b/sys/arch/pmax/stand/libsa/gets.c @@ -1,4 +1,4 @@ -/* $NetBSD: gets.c,v 1.5 1995/01/18 06:53:56 mellon Exp $ */ +/* $NetBSD: gets.c,v 1.6 1996/09/30 01:14:39 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -44,5 +44,5 @@ char * gets(s) char *s; { - return (callv->gets(s)); + return ((callv->_gets)(s)); } diff --git a/sys/arch/pmax/stand/libsa/strcat.c b/sys/arch/pmax/stand/libsa/strcat.c index 3596d4a7798..1855cba3197 100644 --- a/sys/arch/pmax/stand/libsa/strcat.c +++ b/sys/arch/pmax/stand/libsa/strcat.c @@ -1,4 +1,4 @@ -/* $NetBSD: strcat.c,v 1.5 1995/01/18 06:53:57 mellon Exp $ */ +/* $NetBSD: strcat.c,v 1.6 1996/09/30 01:14:42 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -44,5 +44,5 @@ char * strcat(s1, s2) char *s1, *s2; { - return (callv->strcat(s1, s2)); + return ((callv->_strcat) (s1, s2)); } diff --git a/sys/arch/pmax/stand/libsa/strcpy.c b/sys/arch/pmax/stand/libsa/strcpy.c index 1262d2685ae..cc5e2245cf9 100644 --- a/sys/arch/pmax/stand/libsa/strcpy.c +++ b/sys/arch/pmax/stand/libsa/strcpy.c @@ -1,4 +1,4 @@ -/* $NetBSD: strcpy.c,v 1.5 1995/01/18 06:53:59 mellon Exp $ */ +/* $NetBSD: strcpy.c,v 1.6 1996/09/30 01:14:43 jonathan Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -44,5 +44,5 @@ char * strcpy(s1, s2) char *s1, *s2; { - return (callv->strcpy(s1, s2)); + return (callv->_strcpy(s1, s2)); } diff --git a/sys/arch/pmax/tc/asic.c b/sys/arch/pmax/tc/asic.c index 98e89b22af4..270de0da728 100644 --- a/sys/arch/pmax/tc/asic.c +++ b/sys/arch/pmax/tc/asic.c @@ -1,4 +1,4 @@ -/* $NetBSD: asic.c,v 1.9.4.2 1996/09/09 20:19:11 thorpej Exp $ */ +/* $NetBSD: asic.c,v 1.15 1996/10/13 03:39:58 christos Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -69,7 +69,7 @@ struct asic_softc { /* Definition of the driver for autoconfig. */ int asicmatch __P((struct device *, void *, void *)); void asicattach __P((struct device *, struct device *, void *)); -int asicprint(void *, const char *); +int asicprint(void *, /* const TTTTT */ char *); /* Device locators. */ #define ioasiccf_offset cf_loc[0] /* offset */ @@ -248,7 +248,7 @@ asicattach(parent, self, aux) int asicprint(aux, pnp) void *aux; - const char *pnp; + /* const TTTTT */ char *pnp; { struct ioasicdev_attach_args *d = aux; diff --git a/sys/arch/pmax/tc/ds-asic-conf.c b/sys/arch/pmax/tc/ds-asic-conf.c index c9d0f3bb1c8..3d33e79ba93 100644 --- a/sys/arch/pmax/tc/ds-asic-conf.c +++ b/sys/arch/pmax/tc/ds-asic-conf.c @@ -1,4 +1,4 @@ -/* $NetBSD: ds-asic-conf.c,v 1.5.4.1 1996/05/30 04:13:22 mhitch Exp $ */ +/* $NetBSD: ds-asic-conf.c,v 1.6 1996/05/29 06:29:05 mhitch Exp $ */ /* * Copyright (c) 1995 Jonathan Stone diff --git a/sys/arch/pmax/tc/if_le.c b/sys/arch/pmax/tc/if_le.c deleted file mode 100644 index f843302b18a..00000000000 --- a/sys/arch/pmax/tc/if_le.c +++ /dev/null @@ -1,455 +0,0 @@ -/* $NetBSD: if_le.c,v 1.13 1996/05/07 01:23:31 thorpej Exp $ */ - -/*- - * Copyright (c) 1995 Charles M. Hannum. All rights reserved. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)if_le.c 8.2 (Berkeley) 11/16/93 - */ - -#include "bpfilter.h" - -#include -#include -#include -#include -#include -#include - -#include - -#ifdef INET -#include -#include -#endif - -#include - -#include -#include - -#include -#include -#include - -#ifdef pmax -#define wbflush() MachEmptyWriteBuffer() - -/* This should be in a header file, but where? */ -extern struct cfdriver mainbus_cd; /* XXX really 3100/5100 b'board */ - -#include -#include -#include - -#else /* Alpha */ -#include -#endif /* Alpha */ - -/* access LANCE registers */ -void lewritereg(); -#define LERDWR(cntl, src, dst) { (dst) = (src); wbflush(); } -#define LEWREG(src, dst) lewritereg(&(dst), (src)) - -#define LE_OFFSET_RAM 0x0 -#define LE_OFFSET_LANCE 0x100000 -#define LE_OFFSET_ROM 0x1c0000 - -extern caddr_t le_iomem; - -int le_pmax_match __P((struct device *, void *, void *)); -void le_pmax_attach __P((struct device *, struct device *, void *)); - -hide void le_pmax_copytobuf_gap2 __P((struct am7990_softc *, void *, - int, int)); -hide void le_pmax_copyfrombuf_gap2 __P((struct am7990_softc *, void *, - int, int)); - -hide void le_pmax_copytobuf_gap16 __P((struct am7990_softc *, void *, - int, int)); -hide void le_pmax_copyfrombuf_gap16 __P((struct am7990_softc *, void *, - int, int)); -hide void le_pmax_zerobuf_gap16 __P((struct am7990_softc *, int, int)); - -struct cfattach le_pmax_ca = { - sizeof(struct le_softc), le_pmax_match, le_pmax_attach -}; - -hide void le_pmax_wrcsr __P((struct am7990_softc *, u_int16_t, u_int16_t)); -hide u_int16_t le_pmax_rdcsr __P((struct am7990_softc *, u_int16_t)); - -hide void -le_pmax_wrcsr(sc, port, val) - struct am7990_softc *sc; - u_int16_t port, val; -{ - struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; - - LEWREG(port, ler1->ler1_rap); - LERDWR(port, val, ler1->ler1_rdp); -} - -hide u_int16_t -le_pmax_rdcsr(sc, port) - struct am7990_softc *sc; - u_int16_t port; -{ - struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; - u_int16_t val; - - LEWREG(port, ler1->ler1_rap); - LERDWR(0, ler1->ler1_rdp, val); - return (val); -} - -int -le_pmax_match(parent, match, aux) - struct device *parent; - void *match, *aux; -{ - struct cfdata *cf = match; - struct confargs *ca = aux; -#ifdef notdef /* XXX */ - struct tc_cfloc *tc_locp; - struct asic_cfloc *asic_locp; -#endif - -#ifdef notdef /* XXX */ - tclocp = (struct tc_cfloc *)cf->cf_loc; -#endif - - /* XXX CHECK BUS */ - /* make sure that we're looking for this type of device. */ - if (!TC_BUS_MATCHNAME(ca, "PMAD-BA ") && /* untested alpha TC option */ - !TC_BUS_MATCHNAME(ca, "PMAD-AA ") && /* KN02 b'board, old option */ - !TC_BUS_MATCHNAME(ca, "lance")) /* NetBSD name for b'board */ - return (0); - -#ifdef notdef /* XXX */ - /* make sure the unit matches the cfdata */ - if ((cf->cf_unit != tap->ta_unit && - tap->ta_unit != TA_ANYUNIT) || - (tclocp->cf_slot != tap->ta_slot && - tclocp->cf_slot != TC_SLOT_WILD) || - (tclocp->cf_offset != tap->ta_offset && - tclocp->cf_offset != TC_OFFSET_WILD)) - return (0); -#endif - - return (1); -} - -void -le_pmax_attach(parent, self, aux) - struct device *parent, *self; - void *aux; -{ - register struct le_softc *lesc = (void *)self; - register struct am7990_softc *sc = &lesc->sc_am7990; - struct confargs *ca = aux; - u_char *cp; /* pointer to MAC address */ - int i; - - if (parent->dv_cfdata->cf_driver == &ioasic_cd) { - /* It's on the system IOCTL ASIC */ - volatile u_int *ldp; - tc_addr_t dma_mask; - - lesc->sc_r1 = (struct lereg1 *) - MACH_PHYS_TO_UNCACHED(ca->ca_addr); -#ifdef alpha - lesc->sc_r1 = TC_DENSE_TO_SPARSE(sc->sc_r1); -#endif - sc->sc_mem = (void *)MACH_PHYS_TO_UNCACHED(le_iomem); -/* XXX */ cp = (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base); - - sc->sc_copytodesc = le_pmax_copytobuf_gap2; - sc->sc_copyfromdesc = le_pmax_copyfrombuf_gap2; - sc->sc_copytobuf = le_pmax_copytobuf_gap16; - sc->sc_copyfrombuf = le_pmax_copyfrombuf_gap16; - sc->sc_zerobuf = le_pmax_zerobuf_gap16; - - /* - * And enable Lance dma through the asic. - */ - ldp = (volatile u_int *) (IOASIC_REG_LANCE_DMAPTR(ioasic_base)); - dma_mask = ((tc_addr_t)le_iomem << 3); -#ifdef alpha - /* Set upper 64 bits of DMA mask */ - dma_mask = (dma_mask & ~(tc_addr_t)0x1f) | - (((tc_addr_t)le_iomem >> 29) & 0x1f); -#endif /*alpha*/ - *ldp = dma_mask; - *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) |= - IOASIC_CSR_DMAEN_LANCE; - wbflush(); - } - else - if (parent->dv_cfdata->cf_driver == &tc_cd) { - /* It's on the turbochannel proper, or on KN02 baseboard. */ - lesc->sc_r1 = (struct lereg1 *) - (ca->ca_addr + LE_OFFSET_LANCE); - sc->sc_mem = (void *) - (ca->ca_addr + LE_OFFSET_RAM); - cp = (u_char *)(ca->ca_addr + LE_OFFSET_ROM + 2); - - sc->sc_copytodesc = am7990_copytobuf_contig; - sc->sc_copyfromdesc = am7990_copyfrombuf_contig; - sc->sc_copytobuf = am7990_copytobuf_contig; - sc->sc_copyfrombuf = am7990_copyfrombuf_contig; - sc->sc_zerobuf = am7990_zerobuf_contig; - } -#ifdef pmax - else if (parent->dv_cfdata->cf_driver == &mainbus_cd) { - /* It's on the baseboard, attached directly to mainbus. */ - - lesc->sc_r1 = (struct lereg1 *)(ca->ca_addr); -/*XXX*/ sc->sc_mem = (void *)MACH_PHYS_TO_UNCACHED(0x19000000); -/*XXX*/ cp = (u_char *)(MACH_PHYS_TO_UNCACHED(KN01_SYS_CLOCK) + 1); - - sc->sc_copytodesc = le_pmax_copytobuf_gap2; - sc->sc_copyfromdesc = le_pmax_copyfrombuf_gap2; - sc->sc_copytobuf = le_pmax_copytobuf_gap2; - sc->sc_copyfrombuf = le_pmax_copyfrombuf_gap2; - sc->sc_zerobuf = le_pmax_zerobuf_gap2; - } -#endif - - sc->sc_rdcsr = le_pmax_rdcsr; - sc->sc_wrcsr = le_pmax_wrcsr; - sc->sc_hwinit = NULL; - - sc->sc_conf3 = 0; - sc->sc_addr = 0; - sc->sc_memsize = 65536; - - /* - * Get the ethernet address out of rom - */ - for (i = 0; i < sizeof(sc->sc_arpcom.ac_enaddr); i++) { - sc->sc_arpcom.ac_enaddr[i] = *cp; - cp += 4; - } - - am7990_config(sc); - - BUS_INTR_ESTABLISH(ca, am7990_intr, sc); - - if (parent->dv_cfdata->cf_driver == &ioasic_cd) { - /* XXX YEECH!!! */ - *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) |= - IOASIC_INTR_LANCE; - wbflush(); - } -} - -/* - * Write a lance register port, reading it back to ensure success. This seems - * to be necessary during initialization, since the chip appears to be a bit - * pokey sometimes. - */ -void -lewritereg(regptr, val) - register volatile u_short *regptr; - register u_short val; -{ - register int i = 0; - - while (*regptr != val) { - *regptr = val; - wbflush(); - if (++i > 10000) { - printf("le: Reg did not settle (to x%x): x%x\n", val, - *regptr); - return; - } - DELAY(100); - } -} - -/* - * Routines for accessing the transmit and receive buffers are provided - * by am7990.c, because of the LE_NEED_BUF_* macros defined above. - * Unfortunately, CPU addressing of these buffers is done in one of - * 3 ways: - * - contiguous (for the 3max and turbochannel option card) - * - gap2, which means shorts (2 bytes) interspersed with short (2 byte) - * spaces (for the pmax) - * - gap16, which means 16bytes interspersed with 16byte spaces - * for buffers which must begin on a 32byte boundary (for 3min and maxine) - * The buffer offset is the logical byte offset, assuming contiguous storage. - */ - -/* - * gap2: two bytes of data followed by two bytes of pad. - * - * Buffers must be 4-byte aligned. The code doesn't worry about - * doing an extra byte. - */ - -void -le_pmax_copytobuf_gap2(sc, fromv, boff, len) - struct am7990_softc *sc; - void *fromv; - int boff; - register int len; -{ - volatile caddr_t buf = sc->sc_mem; - register caddr_t from = fromv; - register volatile u_int16_t *bptr; - - if (boff & 0x1) { - /* handle unaligned first byte */ - bptr = ((volatile u_int16_t *)buf) + (boff - 1); - *bptr = (*from++ << 8) | (*bptr & 0xff); - bptr += 2; - len--; - } else - bptr = ((volatile u_int16_t *)buf) + boff; - while (len > 1) { - *bptr = (from[1] << 8) | (from[0] & 0xff); - bptr += 2; - from += 2; - len -= 2; - } - if (len == 1) - *bptr = (u_int16_t)*from; -} - -void -le_pmax_copyfrombuf_gap2(sc, tov, boff, len) - struct am7990_softc *sc; - void *tov; - int boff, len; -{ - volatile caddr_t buf = sc->sc_mem; - register caddr_t to = tov; - register volatile u_int16_t *bptr; - register u_int16_t tmp; - - if (boff & 0x1) { - /* handle unaligned first byte */ - bptr = ((volatile u_int16_t *)buf) + (boff - 1); - *to++ = (*bptr >> 8) & 0xff; - bptr += 2; - len--; - } else - bptr = ((volatile u_int16_t *)buf) + boff; - while (len > 1) { - tmp = *bptr; - *to++ = tmp & 0xff; - *to++ = (tmp >> 8) & 0xff; - bptr += 2; - len -= 2; - } - if (len == 1) - *to = *bptr & 0xff; -} - -/* - * gap16: 16 bytes of data followed by 16 bytes of pad. - * - * Buffers must be 32-byte aligned. - */ - -void -le_pmax_copytobuf_gap16(sc, fromv, boff, len) - struct am7990_softc *sc; - void *fromv; - int boff; - register int len; -{ - volatile caddr_t buf = sc->sc_mem; - register caddr_t from = fromv; - register caddr_t bptr; - register int xfer; - - bptr = buf + ((boff << 1) & ~0x1f); - boff &= 0xf; - xfer = min(len, 16 - boff); - while (len > 0) { - bcopy(from, bptr + boff, xfer); - from += xfer; - bptr += 32; - boff = 0; - len -= xfer; - xfer = min(len, 16); - } -} - -void -le_pmax_copyfrombuf_gap16(sc, tov, boff, len) - struct am7990_softc *sc; - void *tov; - int boff, len; -{ - volatile caddr_t buf = sc->sc_mem; - register caddr_t to = tov; - register caddr_t bptr; - register int xfer; - - bptr = buf + ((boff << 1) & ~0x1f); - boff &= 0xf; - xfer = min(len, 16 - boff); - while (len > 0) { - bcopy(bptr + boff, to, xfer); - to += xfer; - bptr += 32; - boff = 0; - len -= xfer; - xfer = min(len, 16); - } -} - -void -le_pmax_zerobuf_gap16(sc, boff, len) - struct am7990_softc *sc; - int boff, len; -{ - volatile caddr_t buf = sc->sc_mem; - register caddr_t bptr; - register int xfer; - - bptr = buf + ((boff << 1) & ~0x1f); - boff &= 0xf; - xfer = min(len, 16 - boff); - while (len > 0) { - bzero(bptr + boff, xfer); - bptr += 32; - boff = 0; - len -= xfer; - xfer = min(len, 16); - } -} diff --git a/sys/arch/pmax/tc/if_levar.h b/sys/arch/pmax/tc/if_levar.h deleted file mode 100644 index 4cbd9bf83ac..00000000000 --- a/sys/arch/pmax/tc/if_levar.h +++ /dev/null @@ -1,66 +0,0 @@ -/* $NetBSD: if_levar.h,v 1.3 1996/05/07 01:23:36 thorpej Exp $ */ - -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)if_lereg.h 8.1 (Berkeley) 6/10/93 - */ - -/* Local Area Network Controller for Ethernet (LANCE) registers */ -struct lereg1 { - volatile u_int16_t ler1_rdp; /* data port */ - int16_t pad0; -#ifdef alpha /* Should be here for Alpha, shouldn't for pmax */ - int32_t pad1; -#endif - volatile u_int16_t ler1_rap; /* register select port */ - int16_t pad2; -#ifdef alpha /* Should be here for Alpha, shouldn't for pmax */ - int32_t pad3; -#endif -}; - -/* - * Ethernet software status per interface. - * - * Each interface is referenced by a network interface structure, - * arpcom.ac_if, which the routing code uses to locate the interface. - * This structure contains the output queue for the interface, its address, ... - */ -struct le_softc { - struct am7990_softc sc_am7990; /* glue to MI code */ - - struct lereg1 *sc_r1; /* LANCE registers */ -}; diff --git a/sys/arch/pmax/tc/scc.c b/sys/arch/pmax/tc/scc.c index 22fc8c3c562..ca487ab7e6a 100644 --- a/sys/arch/pmax/tc/scc.c +++ b/sys/arch/pmax/tc/scc.c @@ -1,7 +1,7 @@ -/* $NetBSD: scc.c,v 1.11.4.2 1996/06/16 17:13:16 mhitch Exp $ */ +/* $NetBSD: scc.c,v 1.18 1996/10/16 05:04:51 jonathan Exp $ */ /* - * Copyright (c) 1991,1990,1989,1994,1995 Carnegie Mellon University + * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University * All rights reserved. * * Author: Chris G. Demetriou and Jonathan Stone @@ -62,7 +62,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * from: @(#)scc.c 8.2 (Berkeley) 11/30/93 + * @(#)scc.c 8.2 (Berkeley) 11/30/93 */ @@ -90,7 +90,7 @@ #include #include -#ifdef alpha +#ifndef pmax #include #endif @@ -99,9 +99,10 @@ #include #include #include +#include #ifdef pmax -#include +#include /* phys to uncached */ #include #include #include @@ -121,6 +122,8 @@ #include #include +#include + extern void ttrstrt __P((void *)); #ifdef alpha @@ -129,7 +132,9 @@ extern void ttrstrt __P((void *)); #endif /* - * rcons glass-tty console (as used on pmax and sparc) won't compile on Alphas. + * rcons glass-tty console (as used on pmax) needs lk-201 ASCII input + * support from the tty drivers. This is ugly and broken and won't + * compile on Alphas. */ #ifdef pmax #define HAVE_RCONS @@ -156,20 +161,20 @@ extern int pending_remcons; */ static inline int -raster_console() +raster_console(void) { return (cn_tab->cn_pri == CN_NORMAL || cn_tab->cn_pri == CN_INTERNAL); } -#define NSCCLINE (NSCC*2) #define SCCUNIT(dev) (minor(dev) >> 1) #define SCCLINE(dev) (minor(dev) & 0x1) -struct tty *scc_tty[NSCCLINE]; -void (*sccDivertXInput)(); /* X windows keyboard input routine */ -void (*sccMouseEvent)(); /* X windows mouse motion event routine */ -void (*sccMouseButtons)(); /* X windows mouse buttons event routine */ +/* QVSS-compatible in-kernel X input event parser, pointer tracker */ +void (*sccDivertXInput) __P((int cc)); /* X windows keyboard input routine */ +void (*sccMouseEvent) __P((int)); /* X windows mouse motion event routine */ +void (*sccMouseButtons) __P((int)); /* X windows mouse buttons event routine */ + #ifdef DEBUG int debugChar; #endif @@ -184,7 +189,16 @@ struct scc_softc { u_char wr5; u_char wr14; } scc_wreg[2]; + struct tty *scc_tty[2]; int scc_softCAR; + int scc_flags[2]; +#define SCC_CHAN_NEEDSDELAY 0x01 /* sw must delay 1.6us between output*/ +#define SCC_CHAN_NOMODEM 0x02 /* don't touch modem ctl lines (may + be left floating or x-wired */ +#define SCC_CHAN_MODEM_CROSSED 0x04 /* modem lines wired to other channel*/ +#define SCC_CHAN_KBDLINE 0x08 /* XXX special-case keyboard lines */ + int scc_unitflags; /* flags for both channels, e.g. */ +#define SCC_PREFERRED_CONSOLE 0x01 }; /* @@ -209,15 +223,15 @@ struct speedtab sccspeedtab[] = { { 1800, 126, }, { 2400, 94, }, { 4800, 46, }, - { 7200, 30, }, /* 7.2 (an d14.4, 28.8, 57.6) non-POSSIX */ + { 7200, 30, }, /* non-POSIX */ { 9600, 22, }, { 14400, 14, }, /* non-POSIX */ { 19200, 10, }, { 28800, 6, }, /* non-POSIX */ - { 38400, 4, }, /* all higher speeds are non-POSIX */ - { 57600, 2, }, - { 76800, 1, }, - { 115200, 0 }, + { 38400, 4, }, /* non-POSIX */ + { 57600, 2, }, /* non-POSIX */ + { 76800, 1, }, /* non-POSIX, doesn't work reliably */ + { 115200, 0 }, /* non-POSIX doesn't work reliably */ { -1, -1, }, }; @@ -254,16 +268,17 @@ struct speedtab sccspeedtab[] = { #endif /* Definition of the driver for autoconfig. */ -int sccmatch __P((struct device * parent, void *cfdata, void *aux)); -void sccattach __P((struct device *parent, struct device *self, void *aux)); -extern struct cfdriver scc_cd; +static int sccmatch __P((struct device * parent, void *cfdata, + void *aux)); +static void sccattach __P((struct device *parent, struct device *self, + void *aux)); struct cfattach scc_ca = { - sizeof (struct scc_softc), sccmatch, sccattach + sizeof (struct scc_softc), sccmatch, sccattach, }; struct cfdriver scc_cd = { - NULL, "scc", DV_TTY + NULL, "scc", DV_TTY, }; int sccGetc __P((dev_t)); @@ -272,56 +287,144 @@ void sccPollc __P((dev_t, int)); int sccparam __P((struct tty *, struct termios *)); void sccstart __P((struct tty *)); int sccmctl __P((dev_t, int, int)); +static int cold_sccparam __P((struct tty *, struct termios *, + struct scc_softc *sc)); +#ifdef SCC_DEBUG +static void rr __P((char *, scc_regmap_t *)); +#endif + static void scc_modem_intr __P((dev_t)); static void sccreset __P((struct scc_softc *)); int sccintr __P((void *)); +#ifdef alpha +void scc_alphaintr __P((int)); +#endif -void scc_consinit __P((struct scc_softc *sc)); +/* + * console variables, for using serial console while still cold and + * autoconfig has not attached the scc device. + */ +extern int cold; +scc_regmap_t *scc_cons_addr = 0; +static struct scc_softc coldcons_softc; +static struct consdev scccons = { + NULL, NULL, sccGetc, sccPutc, sccPollc, NODEV, 0 +}; +void scc_consinit __P((dev_t dev, scc_regmap_t *sccaddr)); -#ifdef alpha -void scc_alphaintr __P((int)); + +/* + * Set up a given unit as a serial console device. + * We need console output when cold, and before any device is configured. + * Should be callable when cold, to reset the chip and set parameters + * for a remote (serial) console or kgdb line. + * XXX + * As most DECstations only bring out one rs-232 lead from an SCC + * to the bulkhead, and use the other for mouse and keyboard, we + * only allow one unit per SCC to be console. + */ +void +scc_consinit(dev, sccaddr) + dev_t dev; + scc_regmap_t *sccaddr; +{ + struct scc_softc *sc; + struct termios cterm; + struct tty ctty; + int s; + + /* Save address in case we're cold. */ + if (cold && scc_cons_addr == 0) { + scc_cons_addr = sccaddr; + sc = &coldcons_softc; + coldcons_softc.scc_pdma[0].p_addr = sccaddr; + coldcons_softc.scc_pdma[1].p_addr = sccaddr; + } else { + /* being called from sccattach() to reset console */ + sc = scc_cd.cd_devs[SCCUNIT(dev)]; + } + + /* Reset chip. */ + sccreset(sc); + /* XXX make sure sccreset() called only once for this chip? */ + + /* set console-line parameters */ + s = spltty(); + ctty.t_dev = dev; + scccons.cn_dev = dev; + cterm.c_cflag = CS8; +#ifdef pmax + /* XXX -- why on pmax, not on Alpha? */ + cterm.c_cflag |= CLOCAL; #endif + cterm.c_ospeed = cterm.c_ispeed = 9600; + (void) cold_sccparam(&ctty, &cterm, sc); + *cn_tab = scccons; + DELAY(1000); + splx(s); +} + +void +scc_oconsinit(sc, dev) + struct scc_softc *sc; + dev_t dev; +{ + struct termios cterm; + struct tty ctty; + int s; + + s = spltty(); + ctty.t_dev = dev; + cterm.c_cflag = CS8; +#ifdef pmax + /* XXX -- why on pmax, not on Alpha? */ + cterm.c_cflag |= CLOCAL; +#endif + cterm.c_ospeed = cterm.c_ispeed = 9600; + (void) sccparam(&ctty, &cterm); + DELAY(1000); + splx(s); +} /* * Test to see if device is present. * Return true if found. */ int -sccmatch(parent, match, aux) +sccmatch(parent, cfdata, aux) struct device *parent; - void *match; + void *cfdata; void *aux; { - struct cfdata *cf = match; + struct cfdata *cf = cfdata; struct ioasicdev_attach_args *d = aux; void *sccaddr; - if (parent->dv_cfdata->cf_driver == &ioasic_cd) { - /* Make sure that we're looking for this type of device. */ - if (strncmp(d->iada_modname, "scc", TC_ROM_LLEN)) - return (0); - } - else { + if (parent->dv_cfdata->cf_driver != &ioasic_cd) { #ifdef DIAGNOSTIC printf("Cannot attach scc on %s\n", parent->dv_xname); #endif - return 0; + return (0); } - - /* Don't over-run softc. */ + /* Make sure that we're looking for this type of device. */ + if ((strncmp(d->iada_modname, "z8530 ", TC_ROM_LLEN) != 0) && + (strncmp(d->iada_modname, "scc", TC_ROM_LLEN)!= 0)) + return (0); + + /* XXX MATCH CFLOC */ if (cf->cf_unit >= NSCC) return (0); /* Get the address, and check it for validity. */ - sccaddr = (caddr_t)d->iada_addr; -#ifdef alpha - sccaddr = TC_DENSE_TO_SPARSE(sccaddr); -#endif /*alpha*/ + sccaddr = (void *)d->iada_addr; +#ifdef SPARSE + sccaddr = (void *)TC_DENSE_TO_SPARSE((tc_addr_t)sccaddr); +#endif if (badaddr(sccaddr, 2)) return (0); @@ -330,6 +433,10 @@ sccmatch(parent, match, aux) } #ifdef alpha +/* + * Enable ioasic SCC interrupts and scc DMA engine interrupts. + * XXX does not really belong here. + */ void scc_alphaintr(onoff) int onoff; @@ -351,7 +458,7 @@ scc_alphaintr(onoff) IOASIC_CSR_DMAEN_T2 | IOASIC_CSR_DMAEN_R2); #endif } - wbflush(); + alpha_mb(); } #endif /*alpha*/ @@ -383,9 +490,9 @@ sccattach(parent, self, aux) #endif /* defined(DEBUG) && defined(HAVE_RCONS)*/ sccaddr = (void*)MACH_PHYS_TO_UNCACHED(d->iada_addr); -#ifdef alpha - sccaddr = TC_DENSE_TO_SPARSE(sccaddr); -#endif /*alpha*/ +#ifdef SPARSE + sccaddr = (void *)TC_DENSE_TO_SPARSE((tc_addr_t)sccaddr); +#endif /* Register the interrupt handler. */ ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY, @@ -417,18 +524,18 @@ sccattach(parent, self, aux) /* init pseudo DMA structures */ for (cntr = 0; cntr < 2; cntr++) { pdp->p_addr = (void *)sccaddr; - tp = scc_tty[unit * 2 + cntr] = ttymalloc(); + tp = sc->scc_tty[cntr] = ttymalloc(); if (cputype == DS_MAXINE || cntr == 0) tty_attach(tp); /* XXX */ pdp->p_arg = (long)tp; - pdp->p_fcn = (void (*)())0; + pdp->p_fcn = (void (*)__P((struct tty*)))0; tp->t_dev = (dev_t)((unit << 1) | cntr); pdp++; } /* What's the warning here? Defaulting to softCAR on line 2? */ - sc->scc_softCAR = flags | 0x2; /* XXX */ + sc->scc_softCAR = flags | 0x2; /* XXX */ - /* reset chip */ + /* reset chip, initialize register-copies in softc */ sccreset(sc); /* @@ -442,19 +549,15 @@ sccattach(parent, self, aux) * wire up this driver as console ASAP. */ - static struct consdev scccons = { - NULL, NULL, sccGetc, sccPutc, sccPollc, NODEV, 0 - }; - - /*XXX*/ /* test for correct unit */ DELAY(10000); /* * XXX PROM and NetBSD unit numbers swapped * on kn03, maybe kmin? + * And what about maxine? */ - if (cn_tab->cn_dev == unit) + if (cn_tab->cn_dev == unit && cputype != DS_MAXINE) return; /* @@ -462,10 +565,15 @@ sccattach(parent, self, aux) * as console, now is the time to set up the scc * driver as console. */ - scc_consinit(sc); cn_tab = &scccons; cn_tab->cn_dev = makedev(SCCDEV, sc->sc_dv.dv_unit == 0 ? SCCCOMM2_PORT : SCCCOMM3_PORT); +#ifdef notyet + scc_consinit(cn_tab->cn_dev, sccaddr); +#else + scc_oconsinit(sc, cn_tab->cn_dev); +#endif + printf(" (In sccattach: cn_dev = 0x%x)", cn_tab->cn_dev); printf(" (Unit = %d)", unit); printf(": console"); @@ -533,9 +641,6 @@ sccattach(parent, self, aux) if ((cputype == ST_DEC_3000_500 && sc->sc_dv.dv_unit == 1) || (cputype == ST_DEC_3000_300 && sc->sc_dv.dv_unit == 0)) { - static struct consdev scccons = { - NULL, NULL, sccGetc, sccPutc, sccPollc, NODEV, 0 - }; cn_tab = &scccons; cn_tab->cn_dev = makedev(SCCDEV, sc->sc_dv.dv_unit * 2); @@ -549,37 +654,11 @@ sccattach(parent, self, aux) printf("\n"); } -/* - * Set up a given unit as a serial console device. - * XXX - * As most DECstations only bring out one rs-232 lead from an SCC - * to the bulkhead, and use the other for mouse and keyboard, we - * only allow one unit per SCC to be console. - */ -void -scc_consinit(sc) - struct scc_softc *sc; -{ - struct termios cterm; - struct tty ctty; - int s; - - s = spltty(); - ctty.t_dev = makedev(SCCDEV, - sc->sc_dv.dv_unit == 0 ? SCCCOMM2_PORT : SCCCOMM3_PORT); - cterm.c_cflag = CS8; -#ifdef pmax - /* XXX -- why on pmax, not on Alpha? */ - cterm.c_cflag |= CLOCAL; -#endif - cterm.c_ospeed = cterm.c_ispeed = 9600; - (void) sccparam(&ctty, &cterm); - DELAY(1000); - splx(s); -} /* - * Reset the chip. + * Reset the chip and the softc state. + * Resetting clobbers chip state and copies of registers for both channels. + * The driver assumes this is only ever called once per unit. */ static void sccreset(sc) @@ -621,6 +700,10 @@ sccreset(sc) SCC_WRITE_REG(regs, SCC_CHANNEL_B, ZSWR_IVEC, 0xf0); SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, ZSWR9_VECTOR_INCL_STAT); + /* + * Set softc copies of writable (write-only?) registers. + */ + /* receive parameters and control */ sc->scc_wreg[SCC_CHANNEL_A].wr3 = 0; sc->scc_wreg[SCC_CHANNEL_B].wr3 = 0; @@ -670,10 +753,9 @@ sccopen(dev, flag, mode, p) line = SCCLINE(dev); if (sc->scc_pdma[line].p_addr == NULL) return (ENXIO); - - tp = scc_tty[minor(dev)]; + tp = sc->scc_tty[line]; if (tp == NULL) { - tp = scc_tty[minor(dev)] = ttymalloc(); + tp = sc->scc_tty[line] = ttymalloc(); tty_attach(tp); } tp->t_oproc = sccstart; @@ -721,12 +803,12 @@ sccclose(dev, flag, mode, p) int flag, mode; struct proc *p; { - register struct scc_softc *sc = scc_cd.cd_devs[SCCUNIT(dev)]; + register struct scc_softc *sc = scc_cd.cd_devs[SCCUNIT(dev)]; register struct tty *tp; register int line; - tp = scc_tty[minor(dev)]; line = SCCLINE(dev); + tp = sc->scc_tty[line]; if (sc->scc_wreg[line].wr5 & ZSWR5_BREAK) { sc->scc_wreg[line].wr5 &= ~ZSWR5_BREAK; ttyoutput(0, tp); @@ -744,9 +826,11 @@ sccread(dev, uio, flag) struct uio *uio; int flag; { + register struct scc_softc *sc; register struct tty *tp; - tp = scc_tty[minor(dev)]; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/ + tp = sc->scc_tty[SCCLINE(dev)]; return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); } @@ -756,9 +840,11 @@ sccwrite(dev, uio, flag) struct uio *uio; int flag; { + register struct scc_softc *sc; register struct tty *tp; - tp = scc_tty[minor(dev)]; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/ + tp = sc->scc_tty[SCCLINE(dev)]; return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); } @@ -766,9 +852,13 @@ struct tty * scctty(dev) dev_t dev; { - /* What's the warning here? */ - struct tty *tp = scc_tty[minor(dev)]; /* XXX */ + register struct scc_softc *sc; + register struct tty *tp; + register int unit = SCCUNIT(dev); + if ((unit >= scc_cd.cd_ndevs) || (sc = scc_cd.cd_devs[unit]) == 0) + return (0); + tp = sc->scc_tty[SCCLINE(dev)]; return (tp); } @@ -785,7 +875,9 @@ sccioctl(dev, cmd, data, flag, p) register struct tty *tp; int error, line; - tp = scc_tty[minor(dev)]; + line = SCCLINE(dev); + sc = scc_cd.cd_devs[SCCUNIT(dev)]; + tp = sc->scc_tty[line]; error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); if (error >= 0) return (error); @@ -793,8 +885,6 @@ sccioctl(dev, cmd, data, flag, p) if (error >= 0) return (error); - line = SCCLINE(dev); - sc = scc_cd.cd_devs[SCCUNIT(dev)]; switch (cmd) { case TIOCSBRK: @@ -837,19 +927,39 @@ sccioctl(dev, cmd, data, flag, p) return (0); } +/* + * Set line parameters -- tty t_param entry point. + */ int sccparam(tp, t) register struct tty *tp; register struct termios *t; { register struct scc_softc *sc; + + /* Extract the softc and call cold_sccparam to do all the work. */ + sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)]; + return cold_sccparam(tp, t, sc); +} + + +/* + * Do what sccparam() (t_param entry point) does, but callable when cold. + */ +static int +cold_sccparam(tp, t, sc) + register struct tty *tp; + register struct termios *t; + register struct scc_softc *sc; +{ register scc_regmap_t *regs; register int line; register u_char value, wvalue; register int cflag = t->c_cflag; int ospeed; - if (t->c_ispeed && t->c_ispeed != t->c_ospeed) + /* Check arguments */ + if (t->c_ispeed && t->c_ispeed != t->c_ospeed) return (EINVAL); ospeed = ttspeedtab(t->c_ospeed, sccspeedtab); if (ospeed < 0) @@ -882,7 +992,6 @@ sccparam(tp, t) return (0); } - sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)]; line = SCCLINE(tp->t_dev); regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; @@ -990,30 +1099,32 @@ sccparam(tp, t) value = ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT; SCC_WRITE_REG(regs, line, SCC_WR9, value); SCC_WRITE_REG(regs, line, SCC_WR1, sc->scc_wreg[line].wr1); - wbflush(); + tc_mb(); #ifdef alpha - scc_alphaintr(1); + scc_alphaintr(1); /* XXX XXX XXX */ #endif /*alpha*/ return (0); } + /* * Check for interrupts from all devices. */ int sccintr(xxxsc) - void * xxxsc; + void *xxxsc; { register struct scc_softc *sc = (struct scc_softc *)xxxsc; - register int unit = sc->sc_dv.dv_unit; + register int unit = (long)sc->sc_dv.dv_unit; register scc_regmap_t *regs; register struct tty *tp; register struct pdma *dp; register int cc, chan, rr1, rr2, rr3; int overrun = 0; + rr1 = 0; /* shut up gcc -Wall */ regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr; unit <<= 1; for (;;) { @@ -1030,14 +1141,14 @@ sccintr(xxxsc) if ((rr2 == SCC_RR2_A_XMIT_DONE) || (rr2 == SCC_RR2_B_XMIT_DONE)) { chan = (rr2 == SCC_RR2_A_XMIT_DONE) ? SCC_CHANNEL_A : SCC_CHANNEL_B; - tp = scc_tty[unit | chan]; + tp = sc->scc_tty[chan]; dp = &sc->scc_pdma[chan]; if (dp->p_mem < dp->p_end) { SCC_WRITE_DATA(regs, chan, *dp->p_mem++); #ifdef pmax /* Alpha handles the 1.6 msec settle time in hardware */ DELAY(2); #endif - wbflush(); + tc_mb(); } else { tp->t_state &= ~TS_BUSY; if (tp->t_state & TS_FLUSH) @@ -1058,7 +1169,7 @@ sccintr(xxxsc) cc = sc->scc_wreg[chan].wr1 & ~ZSWR1_TIE; SCC_WRITE_REG(regs, chan, SCC_WR1, cc); sc->scc_wreg[chan].wr1 = cc; - wbflush(); + tc_mb(); } } } else if (rr2 == SCC_RR2_A_RECV_DONE || @@ -1068,7 +1179,7 @@ sccintr(xxxsc) chan = SCC_CHANNEL_A; else chan = SCC_CHANNEL_B; - tp = scc_tty[unit | chan]; + tp = sc->scc_tty[chan]; SCC_READ_DATA(regs, chan, cc); if (rr2 == SCC_RR2_A_RECV_SPECIAL || rr2 == SCC_RR2_B_RECV_SPECIAL) { @@ -1084,7 +1195,8 @@ sccintr(xxxsc) /* * Keyboard needs special treatment. */ - if (tp == scc_tty[SCCKBD_PORT] && raster_console()) { + if (tp == scctty(makedev(SCCDEV, SCCKBD_PORT)) && + raster_console()) { #ifdef KADB if (cc == LK_DO) { spl0(); @@ -1106,10 +1218,13 @@ sccintr(xxxsc) /* * Now for mousey */ - } else if (tp == scc_tty[SCCMOUSE_PORT] && sccMouseButtons) { + } else if (tp == scctty(makedev(SCCDEV, SCCMOUSE_PORT)) && + sccMouseButtons) { +#ifdef HAVE_RCONS /*XXX*/ mouseInput(cc); continue; +#endif } if (!(tp->t_state & TS_ISOPEN)) { wakeup((caddr_t)&tp->t_rawq); @@ -1162,7 +1277,7 @@ sccstart(tp) if (tp->t_outq.c_cc == 0) goto out; /* handle console specially */ - if (tp == scc_tty[SCCKBD_PORT] && raster_console()) { + if (tp == scctty(makedev(SCCDEV,SCCKBD_PORT)) && raster_console()) { while (tp->t_outq.c_cc > 0) { cc = getc(&tp->t_outq) & 0x7f; cnputc(cc); @@ -1180,7 +1295,6 @@ sccstart(tp) } goto out; } - cc = ndqb(&tp->t_outq, 0); tp->t_state |= TS_BUSY; @@ -1203,13 +1317,13 @@ sccstart(tp) #ifdef DIAGNOSTIC if (cc == 0) panic("sccstart: No chars"); -#endif /* DIAGNOSTIC */ +#endif SCC_WRITE_DATA(regs, chan, *dp->p_mem++); #ifdef pmax /* Alpha handles the 1.6 msec settle time in hardware */ DELAY(2); #endif } - wbflush(); + tc_mb(); out: splx(s); } @@ -1218,7 +1332,7 @@ out: * Stop output on a line. */ /*ARGSUSED*/ -int +void sccstop(tp, flag) register struct tty *tp; int flag; @@ -1236,8 +1350,6 @@ sccstop(tp, flag) tp->t_state |= TS_FLUSH; } splx(s); - - return 0; /* XXX should be void */ } int @@ -1296,7 +1408,7 @@ sccmctl(dev, bits, how) sc->scc_wreg[SCC_CHANNEL_A].wr5); } if ((mbits & DML_DTR) || (sc->scc_softCAR & (1 << line))) - scc_tty[minor(dev)]->t_state |= TS_CARR_ON; + sc->scc_tty[line]->t_state |= TS_CARR_ON; (void) splx(s); return (mbits); } @@ -1315,9 +1427,9 @@ scc_modem_intr(dev) register u_char value; int s; - sc = scc_cd.cd_devs[SCCUNIT(dev)]; - tp = scc_tty[minor(dev)]; chan = SCCLINE(dev); + sc = scc_cd.cd_devs[SCCUNIT(dev)]; + tp = sc->scc_tty[chan]; regs = (scc_regmap_t *)sc->scc_pdma[chan].p_addr; if (chan == SCC_CHANNEL_A) return; @@ -1330,7 +1442,8 @@ scc_modem_intr(dev) } /* - * XXX Why doesn't the Alpha driver follow carrier-detect? + * The pmax driver follows carrier-detect. The Alpha does not. + * XXX Why doesn't the Alpha driver follow carrier-detect? * (in the Alpha driver, this is an "#ifdef notdef"). * Is it related to console handling? */ @@ -1357,12 +1470,17 @@ sccGetc(dev) register scc_regmap_t *regs; register int c, line; register u_char value; - struct scc_softc *sc; int s; line = SCCLINE(dev); - sc = scc_cd.cd_devs[SCCUNIT(dev)]; - regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; + if (cold && scc_cons_addr) { + regs = scc_cons_addr; + } else { + register struct scc_softc *sc; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; + regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; + } + if (!regs) return (0); #ifdef pmax @@ -1403,7 +1521,6 @@ sccPutc(dev, c) register scc_regmap_t *regs; register int line; register u_char value; - struct scc_softc *sc; int s; #ifdef pmax @@ -1412,8 +1529,13 @@ sccPutc(dev, c) s = splhigh(); #endif line = SCCLINE(dev); - sc = scc_cd.cd_devs[SCCUNIT(dev)]; - regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; + if (cold && scc_cons_addr) { + regs = scc_cons_addr; + } else { + register struct scc_softc *sc; + sc = scc_cd.cd_devs[SCCUNIT(dev)]; + regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr; + } /* * Wait for transmitter to be not busy. @@ -1429,7 +1551,7 @@ sccPutc(dev, c) * Send the char. */ SCC_WRITE_DATA(regs, line, c); - wbflush(); + tc_mb(); splx(s); return; diff --git a/sys/arch/pmax/tc/tc.c b/sys/arch/pmax/tc/tc.c index 5b209e7df01..487bc8d854c 100644 --- a/sys/arch/pmax/tc/tc.c +++ b/sys/arch/pmax/tc/tc.c @@ -1,4 +1,4 @@ -/* $NetBSD: tc.c,v 1.9 1996/02/02 18:08:06 mycroft Exp $ */ +/* $NetBSD: tc.c,v 1.12 1996/10/13 03:40:02 christos Exp $ */ /* * Copyright (c) 1994, 1995 Carnegie-Mellon University. @@ -178,7 +178,7 @@ void config_tcbus(parent, cputype, printfn) struct device *parent; int cputype; - int printfn __P((void *, char *)); + int printfn __P((void *, const char *)); { struct tc_attach_args tc; diff --git a/sys/arch/pmax/tc/tc_subr.c b/sys/arch/pmax/tc/tc_subr.c index 7666184df16..22241ed5a5c 100644 --- a/sys/arch/pmax/tc/tc_subr.c +++ b/sys/arch/pmax/tc/tc_subr.c @@ -1,4 +1,4 @@ -/* $NetBSD: tc_subr.c,v 1.1.4.4 1996/09/09 20:12:58 thorpej Exp $ */ +/* $NetBSD: tc_subr.c,v 1.9 1996/10/13 03:40:03 christos Exp $ */ /* * Copyright 1996 The Board of Trustees of The Leland Stanford @@ -309,7 +309,7 @@ void config_tcbus(parent, cputype, printfn) struct device *parent; int cputype; - int printfn __P((void *, char *)); + int printfn __P((void *, const char *)); { struct tcbus_attach_args tcb;