From: jsg Date: Tue, 21 Jun 2022 11:21:22 +0000 (+0000) Subject: drm/i915/adl_p: Add ddc pin mapping X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=6e1ff440574c6e8b6e1aa5e69d1cfe05fb3575fc;p=openbsd drm/i915/adl_p: Add ddc pin mapping From Tejas Upadhyay af10ec31a81b2f8b9a3b2d1ef05f553cc9495701 in mainline linux --- diff --git a/sys/dev/pci/drm/i915/display/intel_bios.c b/sys/dev/pci/drm/i915/display/intel_bios.c index cf473f7a9ee..b1fd5680b6d 100644 --- a/sys/dev/pci/drm/i915/display/intel_bios.c +++ b/sys/dev/pci/drm/i915/display/intel_bios.c @@ -1656,12 +1656,24 @@ static const u8 gen9bc_tgp_ddc_pin_map[] = { [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP, }; +static const u8 adlp_ddc_pin_map[] = { + [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, + [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, + [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, + [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, + [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, + [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, +}; + static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) { const u8 *ddc_pin_map; int n_entries; - if (IS_ALDERLAKE_S(i915)) { + if (IS_ALDERLAKE_P(i915)) { + ddc_pin_map = adlp_ddc_pin_map; + n_entries = ARRAY_SIZE(adlp_ddc_pin_map); + } else if (IS_ALDERLAKE_S(i915)) { ddc_pin_map = adls_ddc_pin_map; n_entries = ARRAY_SIZE(adls_ddc_pin_map); } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { diff --git a/sys/dev/pci/drm/i915/display/intel_vbt_defs.h b/sys/dev/pci/drm/i915/display/intel_vbt_defs.h index a2108a8f544..f043d85ba64 100644 --- a/sys/dev/pci/drm/i915/display/intel_vbt_defs.h +++ b/sys/dev/pci/drm/i915/display/intel_vbt_defs.h @@ -330,7 +330,12 @@ enum vbt_gmbus_ddi { ADLS_DDC_BUS_PORT_TC1 = 0x2, ADLS_DDC_BUS_PORT_TC2, ADLS_DDC_BUS_PORT_TC3, - ADLS_DDC_BUS_PORT_TC4 + ADLS_DDC_BUS_PORT_TC4, + ADLP_DDC_BUS_PORT_TC1 = 0x3, + ADLP_DDC_BUS_PORT_TC2, + ADLP_DDC_BUS_PORT_TC3, + ADLP_DDC_BUS_PORT_TC4 + }; #define DP_AUX_A 0x40