From: jsg <jsg@openbsd.org>
Date: Fri, 4 Aug 2023 08:52:17 +0000 (+0000)
Subject: drm/amd/display: Set minimum requirement for using PSR-SU on Rembrandt
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=5dce716934b78e056930c86019fafa194b6c4054;p=openbsd

drm/amd/display: Set minimum requirement for using PSR-SU on Rembrandt

From Mario Limonciello
f8b61a2c29fc70f64daad698cf09c1f79a0e39f9 in linux-6.1.y/6.1.43
c35b6ea8f2ecfa9d775530b70d4e727869099a9c in mainline linux
---

diff --git a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
index 872d06fe143..3eb8794807d 100644
--- a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
+++ b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
@@ -24,6 +24,7 @@
  */
 
 #include "amdgpu_dm_psr.h"
+#include "dc_dmub_srv.h"
 #include "dc.h"
 #include "dm_helpers.h"
 #include "amdgpu_dm.h"
@@ -50,7 +51,7 @@ static bool link_supports_psrsu(struct dc_link *link)
 	    !link->dpcd_caps.psr_info.psr2_su_y_granularity_cap)
 		return false;
 
-	return true;
+	return dc_dmub_check_min_version(dc->ctx->dmub_srv->dmub);
 }
 
 /*
diff --git a/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c b/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c
index a461e946353..31bb7e782c6 100644
--- a/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c
+++ b/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c
@@ -1026,3 +1026,10 @@ void dc_send_update_cursor_info_to_dmu(
 		dc_send_cmd_to_dmu(pCtx->stream->ctx->dmub_srv, &cmd);
 	}
 }
+
+bool dc_dmub_check_min_version(struct dmub_srv *srv)
+{
+	if (!srv->hw_funcs.is_psrsu_supported)
+		return true;
+	return srv->hw_funcs.is_psrsu_supported(srv);
+}
diff --git a/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h b/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h
index d34f5563df2..9a248ced03b 100644
--- a/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h
+++ b/sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h
@@ -89,4 +89,5 @@ void dc_dmub_setup_subvp_dmub_command(struct dc *dc, struct dc_state *context, b
 void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv);
 
 void dc_send_update_cursor_info_to_dmu(struct pipe_ctx *pCtx, uint8_t pipe_idx);
+bool dc_dmub_check_min_version(struct dmub_srv *srv);
 #endif /* _DMUB_DC_SRV_H_ */
diff --git a/sys/dev/pci/drm/amd/display/dmub/dmub_srv.h b/sys/dev/pci/drm/amd/display/dmub/dmub_srv.h
index b53468aca4a..5f17b252e9b 100644
--- a/sys/dev/pci/drm/amd/display/dmub/dmub_srv.h
+++ b/sys/dev/pci/drm/amd/display/dmub/dmub_srv.h
@@ -350,6 +350,8 @@ struct dmub_srv_hw_funcs {
 
 	bool (*is_supported)(struct dmub_srv *dmub);
 
+	bool (*is_psrsu_supported)(struct dmub_srv *dmub);
+
 	bool (*is_hw_init)(struct dmub_srv *dmub);
 
 	bool (*is_phy_init)(struct dmub_srv *dmub);
diff --git a/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c
index c90b9ee42e1..89d24fb7024 100644
--- a/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c
+++ b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c
@@ -297,6 +297,11 @@ bool dmub_dcn31_is_supported(struct dmub_srv *dmub)
 	return supported;
 }
 
+bool dmub_dcn31_is_psrsu_supported(struct dmub_srv *dmub)
+{
+	return dmub->fw_version >= DMUB_FW_VERSION(4, 0, 59);
+}
+
 void dmub_dcn31_set_gpint(struct dmub_srv *dmub,
 			  union dmub_gpint_data_register reg)
 {
diff --git a/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.h b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.h
index f6db6f89d45..eb624109414 100644
--- a/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.h
+++ b/sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.h
@@ -219,6 +219,8 @@ bool dmub_dcn31_is_hw_init(struct dmub_srv *dmub);
 
 bool dmub_dcn31_is_supported(struct dmub_srv *dmub);
 
+bool dmub_dcn31_is_psrsu_supported(struct dmub_srv *dmub);
+
 void dmub_dcn31_set_gpint(struct dmub_srv *dmub,
 			  union dmub_gpint_data_register reg);
 
diff --git a/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c b/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
index 6d76ce327d6..0f43a05a418 100644
--- a/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
+++ b/sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
@@ -227,14 +227,16 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
 	case DMUB_ASIC_DCN314:
 	case DMUB_ASIC_DCN315:
 	case DMUB_ASIC_DCN316:
-		if (asic == DMUB_ASIC_DCN314)
+		if (asic == DMUB_ASIC_DCN314) {
 			dmub->regs_dcn31 = &dmub_srv_dcn314_regs;
-		else if (asic == DMUB_ASIC_DCN315)
+		} else if (asic == DMUB_ASIC_DCN315) {
 			dmub->regs_dcn31 = &dmub_srv_dcn315_regs;
-		else if (asic == DMUB_ASIC_DCN316)
+		} else if (asic == DMUB_ASIC_DCN316) {
 			dmub->regs_dcn31 = &dmub_srv_dcn316_regs;
-		else
+		} else {
 			dmub->regs_dcn31 = &dmub_srv_dcn31_regs;
+			funcs->is_psrsu_supported = dmub_dcn31_is_psrsu_supported;
+		}
 		funcs->reset = dmub_dcn31_reset;
 		funcs->reset_release = dmub_dcn31_reset_release;
 		funcs->backdoor_load = dmub_dcn31_backdoor_load;