From: drahn Date: Thu, 20 May 2021 15:14:30 +0000 (+0000) Subject: Significant overhaul of the floating point save/restore code. X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=57331f1fdfede9fca258a33cfb742a2b466ef45d;p=openbsd Significant overhaul of the floating point save/restore code. At this point the mechanism should closely resemble the powerpc64 save/restore points with one difference. (reload avoidance) The previous 'aggressive' fpu save code that was (mostly) implemented before and is present on arm32 and arm64. There is one piece from that other design that remains, if pcb->pcb_fpcpu == ci && ci->ci_fpuproc == p after sleep, this will automatically re-activate the FPU state without needing to reload it. To enable this, the pointer pair is not changed on FPU context save to indicate that the CPU still holds the valid content as long as both of those pointers are pointing to each other. Note that if another core steals the FPU conxtex (when we get to SMP) the pcb->pcb_fpcpu will be another cpu, and from that it will know to reload the FPU context. Also optimistically enabling this only makes sense on riscv64 because there is the notion of FPU on and clean. Other implimentations would need to 'fault on' the FPU enable, but could avoid the FPU context load if no other processor has run this FPU context and no other process has use FPU on this core. ok kettenis@ deraadt@ Prior to a couple of fixes. (this file was missing from original commit) --- diff --git a/sys/arch/riscv64/include/signal.h b/sys/arch/riscv64/include/signal.h index 952354b08e0..b2638e54b8d 100644 --- a/sys/arch/riscv64/include/signal.h +++ b/sys/arch/riscv64/include/signal.h @@ -1,4 +1,4 @@ -/* $OpenBSD: signal.h,v 1.3 2021/05/13 08:44:18 jsg Exp $ */ +/* $OpenBSD: signal.h,v 1.4 2021/05/20 15:14:30 drahn Exp $ */ /*- * Copyright (c) 1986, 1989, 1991, 1993 @@ -58,6 +58,10 @@ struct sigcontext { __register_t sc_a[8]; __register_t sc_sepc; + /* 64 bit floats as well as integer registers */ + __register_t sc_f[32]; /* floating-point registers */ + __register_t sc_fcsr; /* floating-point control register */ + long sc_cookie; };