From: stsp <stsp@openbsd.org>
Date: Sat, 10 Jan 2015 10:38:12 +0000 (+0000)
Subject: Merge two bwi(4) fixes from FreeBSD:
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=55d1ec63cd708ea899abfec1a2b8121183a78569;p=openbsd

Merge two bwi(4) fixes from FreeBSD:

------------------------------------------------------------------------
r192306 | imp | 2009-05-18 17:31:26 +0200 (Mon, 18 May 2009) | 10 lines

Fix a typo from the original driver.  We need to write ctrl2 into RF
register 0x52, not ctrl1.  This appears to be a mistake in the bcm
reverse engineering page, and has been corrected there.  Tracing
through the code, this is more in keeping with the "documented"
register. Sephe thinks it looks interesting and may be worth
fixing. :)

Submitted by:	ddkprog at yahoo com
Reviewed by:	Sepherosa Ziehau

------------------------------------------------------------------------
r192042 | nwhitehorn | 2009-05-13 16:25:55 +0200 (Wed, 13 May 2009) | 4 lines

Add a short delay after programming PHY registers to give some time for
the engine to catch up. This prevents a machine check exception from
illegal memory requests with a BCM4318.

------------------------------------------------------------------------

No regressions observed by myself, miod@, and Vesa Norrman (vesbula at gmail).
---

diff --git a/sys/dev/ic/bwi.c b/sys/dev/ic/bwi.c
index 2423858fe48..cdccf7bfbba 100644
--- a/sys/dev/ic/bwi.c
+++ b/sys/dev/ic/bwi.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bwi.c,v 1.113 2014/12/22 02:28:51 tedu Exp $	*/
+/*	$OpenBSD: bwi.c,v 1.114 2015/01/10 10:38:12 stsp Exp $	*/
 
 /*
  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
@@ -3061,7 +3061,7 @@ bwi_phy_init_11g(struct bwi_mac *mac)
 			RF_WRITE(mac, 0x52,
 			    (tpctl->tp_ctrl1 << 4) | tpctl->tp_ctrl2);
 		} else {
-			RF_FILT_SETBITS(mac, 0x52, 0xfff0, tpctl->tp_ctrl1);
+			RF_FILT_SETBITS(mac, 0x52, 0xfff0, tpctl->tp_ctrl2);
 		}
 
 		if (phy->phy_rev >= 6) {
@@ -3351,6 +3351,9 @@ bwi_phy_init_11b_rev6(struct bwi_mac *mac)
 	for (ofs = 0xa8; ofs < 0xc8; ++ofs) {
 		PHY_WRITE(mac, ofs, (val & 0x3f3f));
 		val += 0x202;
+
+		/* XXX: delay 10 us to avoid PCI parity errors with BCM4318 */
+		DELAY(10);
 	}
 
 	if (phy->phy_mode == IEEE80211_MODE_11G) {