From: jsg Date: Thu, 23 Feb 2023 02:29:39 +0000 (+0000) Subject: drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=4f60c9b911c8adab8ddc6aa3c3a9fd4c622ed09a;p=openbsd drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list From Matt Roper 2fc3ff76e96f48e5e4dd705f6794b8483f7c1624 in linux-6.1.y/6.1.13 d5a1224aa68c8b124a4c5c390186e571815ed390 in mainline linux --- diff --git a/sys/dev/pci/drm/i915/gt/intel_workarounds.c b/sys/dev/pci/drm/i915/gt/intel_workarounds.c index c7976b5ca10..2b6b12963ce 100644 --- a/sys/dev/pci/drm/i915/gt/intel_workarounds.c +++ b/sys/dev/pci/drm/i915/gt/intel_workarounds.c @@ -1249,6 +1249,13 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) GAMT_CHKN_BIT_REG, GAMT_CHKN_DISABLE_L3_COH_PIPE); + /* + * Wa_1408615072:icl,ehl (vsunit) + * Wa_1407596294:icl,ehl (hsunit) + */ + wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE, + VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS); + /* Wa_1407352427:icl,ehl */ wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2, PSDUNIT_CLKGATE_DIS); @@ -2368,13 +2375,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) wa_masked_en(wal, GEN9_CSFE_CHICKEN1_RCS, GEN11_ENABLE_32_PLANE_MODE); - /* - * Wa_1408615072:icl,ehl (vsunit) - * Wa_1407596294:icl,ehl (hsunit) - */ - wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE, - VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS); - /* * Wa_1408767742:icl[a2..forever],ehl[all] * Wa_1605460711:icl[a0..c0]