From: jsg <jsg@openbsd.org>
Date: Fri, 29 May 2015 05:48:07 +0000 (+0000)
Subject: add some more cortex A ids
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=4ccb67867061257d1a4fb5304775c81241a3eee4;p=openbsd

add some more cortex A ids
---

diff --git a/sys/arch/arm/arm/cpu.c b/sys/arch/arm/arm/cpu.c
index 9be602dee35..9bc13a03c56 100644
--- a/sys/arch/arm/arm/cpu.c
+++ b/sys/arch/arm/arm/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.20 2014/11/16 12:30:56 deraadt Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.21 2015/05/29 05:48:07 jsg Exp $	*/
 /*	$NetBSD: cpu.c,v 1.56 2004/04/14 04:01:49 bsh Exp $	*/
 
 
@@ -328,7 +328,23 @@ const struct cpuidtab cpuids[] = {
 	  generic_steppings },
 	{ CPU_ID_CORTEX_A15_R4,	CPU_CLASS_ARMv7,	"ARM Cortex A15 R4",
 	  generic_steppings },
+	{ CPU_ID_CORTEX_A17,	CPU_CLASS_ARMv7,	"ARM Cortex A17",
+	  generic_steppings },
+	{ CPU_ID_CORTEX_A17_R1,	CPU_CLASS_ARMv7,	"ARM Cortex A17 R1",
+	  generic_steppings },
 
+	{ CPU_ID_CORTEX_A53,	CPU_CLASS_ARMv7,	"ARM Cortex A53",
+	  generic_steppings },
+	{ CPU_ID_CORTEX_A53_R1,	CPU_CLASS_ARMv7,	"ARM Cortex A53 R1",
+	  generic_steppings },
+	{ CPU_ID_CORTEX_A57,	CPU_CLASS_ARMv7,	"ARM Cortex A57",
+	  generic_steppings },
+	{ CPU_ID_CORTEX_A57_R1,	CPU_CLASS_ARMv7,	"ARM Cortex A57 R1",
+	  generic_steppings },
+	{ CPU_ID_CORTEX_A72,	CPU_CLASS_ARMv7,	"ARM Cortex A72",
+	  generic_steppings },
+	{ CPU_ID_CORTEX_A72_R1,	CPU_CLASS_ARMv7,	"ARM Cortex A72 R1",
+	  generic_steppings },
 
 	{ 0, CPU_CLASS_NONE, NULL, NULL }
 };
diff --git a/sys/arch/arm/arm/cpufunc.c b/sys/arch/arm/arm/cpufunc.c
index 521cbf04f8f..aab8bc63659 100644
--- a/sys/arch/arm/arm/cpufunc.c
+++ b/sys/arch/arm/arm/cpufunc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.c,v 1.26 2014/04/03 10:17:34 mpi Exp $	*/
+/*	$OpenBSD: cpufunc.c,v 1.27 2015/05/29 05:48:07 jsg Exp $	*/
 /*	$NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $	*/
 
 /*
@@ -1002,7 +1002,8 @@ set_cpufuncs()
 	    (cputype & CPU_ID_CORTEX_A7_MASK) == CPU_ID_CORTEX_A7 ||
 	    (cputype & CPU_ID_CORTEX_A8_MASK) == CPU_ID_CORTEX_A8 ||
 	    (cputype & CPU_ID_CORTEX_A9_MASK) == CPU_ID_CORTEX_A9 ||
-	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15) {
+	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15 ||
+	    (cputype & CPU_ID_CORTEX_A17_MASK) == CPU_ID_CORTEX_A17) {
 		cpufuncs = armv7_cpufuncs;
 		cpu_reset_needs_v4_MMU_disable = 1;	/* V4 or higher */
 		arm_get_cachetype_cp15v7();
diff --git a/sys/arch/arm/cortex/agtimer.c b/sys/arch/arm/cortex/agtimer.c
index 60fbafb5cc5..8aa6da3a8f4 100644
--- a/sys/arch/arm/cortex/agtimer.c
+++ b/sys/arch/arm/cortex/agtimer.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: agtimer.c,v 1.2 2015/05/29 02:35:43 jsg Exp $ */
+/* $OpenBSD: agtimer.c,v 1.3 2015/05/29 05:48:07 jsg Exp $ */
 /*
  * Copyright (c) 2011 Dale Rahn <drahn@openbsd.org>
  * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
@@ -153,7 +153,8 @@ int
 agtimer_match(struct device *parent, void *cfdata, void *aux)
 {
 	if ((cpufunc_id() & CPU_ID_CORTEX_A7_MASK) == CPU_ID_CORTEX_A7 ||
-	    (cpufunc_id() & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15)
+	    (cpufunc_id() & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15 ||
+	    (cpufunc_id() & CPU_ID_CORTEX_A17_MASK) == CPU_ID_CORTEX_A17)
 		return (1);
 
 	return 0;
diff --git a/sys/arch/arm/cortex/ampintc.c b/sys/arch/arm/cortex/ampintc.c
index d9aa90d71fc..93451727680 100644
--- a/sys/arch/arm/cortex/ampintc.c
+++ b/sys/arch/arm/cortex/ampintc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ampintc.c,v 1.5 2014/12/13 21:05:32 doug Exp $ */
+/* $OpenBSD: ampintc.c,v 1.6 2015/05/29 05:48:07 jsg Exp $ */
 /*
  * Copyright (c) 2007,2009,2011 Dale Rahn <drahn@openbsd.org>
  *
@@ -221,7 +221,8 @@ ampintc_attach(struct device *parent, struct device *self, void *args)
 	icdsize = ICD_SIZE;
 
 	if ((cputype & CPU_ID_CORTEX_A7_MASK) == CPU_ID_CORTEX_A7 ||
-	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15) {
+	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15 ||
+	    (cputype & CPU_ID_CORTEX_A17_MASK) == CPU_ID_CORTEX_A17) {
 		icp = ia->ca_periphbase + ICP_A7_A15_ADDR;
 		icpsize = ICP_A7_A15_SIZE;
 		icd = ia->ca_periphbase + ICD_A7_A15_ADDR;
diff --git a/sys/arch/arm/cortex/cortex.c b/sys/arch/arm/cortex/cortex.c
index 464b88a79bd..73aa315a757 100644
--- a/sys/arch/arm/cortex/cortex.c
+++ b/sys/arch/arm/cortex/cortex.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cortex.c,v 1.2 2013/08/06 14:21:13 patrick Exp $	*/
+/*	$OpenBSD: cortex.c,v 1.3 2015/05/29 05:48:07 jsg Exp $	*/
 /* $NetBSD: mainbus.c,v 1.3 2001/06/13 17:52:43 nathanw Exp $ */
 
 /*
@@ -100,7 +100,8 @@ cortexmatch(struct device *parent, void *cf, void *aux)
 
 	if ((cputype & CPU_ID_CORTEX_A7_MASK) == CPU_ID_CORTEX_A7 ||
 	    (cputype & CPU_ID_CORTEX_A9_MASK) == CPU_ID_CORTEX_A9 ||
-	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15) {
+	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15 ||
+	    (cputype & CPU_ID_CORTEX_A17_MASK) == CPU_ID_CORTEX_A17) {
 		if (armv7_periphbase())
 			return (1);
 	}
diff --git a/sys/arch/arm/include/armreg.h b/sys/arch/arm/include/armreg.h
index b6e29ca75ec..17489501c85 100644
--- a/sys/arch/arm/include/armreg.h
+++ b/sys/arch/arm/include/armreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: armreg.h,v 1.15 2015/01/17 08:00:41 jsg Exp $	*/
+/*	$OpenBSD: armreg.h,v 1.16 2015/05/29 05:48:07 jsg Exp $	*/
 /*	$NetBSD: armreg.h,v 1.27 2003/09/06 08:43:02 rearnsha Exp $	*/
 
 /*
@@ -231,7 +231,18 @@
 #define CPU_ID_CORTEX_A15_R3	0x413fc0f0
 #define CPU_ID_CORTEX_A15_R4	0x414fc0f0
 #define CPU_ID_CORTEX_A15_MASK	0xff0ffff0
-
+#define CPU_ID_CORTEX_A17	0x410fc0e0
+#define CPU_ID_CORTEX_A17_R1	0x411fc0e0
+#define CPU_ID_CORTEX_A17_MASK	0xff0ffff0
+#define CPU_ID_CORTEX_A53	0x410fd030
+#define CPU_ID_CORTEX_A53_R1	0x411fd030
+#define CPU_ID_CORTEX_A53_MASK	0xff0ffff0
+#define CPU_ID_CORTEX_A57	0x410fd070
+#define CPU_ID_CORTEX_A57_R1	0x411fd070
+#define CPU_ID_CORTEX_A57_MASK	0xff0ffff0
+#define CPU_ID_CORTEX_A72	0x410fd080
+#define CPU_ID_CORTEX_A72_R1	0x411fd080
+#define CPU_ID_CORTEX_A57_MASK	0xff0ffff0
 
 /* ARM3-specific coprocessor 15 registers */
 #define ARM3_CP15_FLUSH		1