From: kettenis Date: Thu, 17 Jun 2021 12:55:38 +0000 (+0000) Subject: Like ARM, RISC-V does not implement floating point exceptions. X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=487aca8602a8b87ea56bd544fa9e22c3e0dcf0dc;p=openbsd Like ARM, RISC-V does not implement floating point exceptions. --- diff --git a/regress/lib/libc/ieeefp/except/Makefile b/regress/lib/libc/ieeefp/except/Makefile index cf73841c4ea..0a16eb762e8 100644 --- a/regress/lib/libc/ieeefp/except/Makefile +++ b/regress/lib/libc/ieeefp/except/Makefile @@ -1,10 +1,10 @@ -# $OpenBSD: Makefile,v 1.6 2020/10/18 17:40:06 kettenis Exp $ +# $OpenBSD: Makefile,v 1.7 2021/06/17 12:55:38 kettenis Exp $ PROG=except REGRESS_TARGETS+= fltdiv fltinv fltovf fltund -.if ${MACHINE} == arm64 || ${MACHINE} == armv7 +.if ${MACHINE} == arm64 || ${MACHINE} == armv7 || ${MACHINE} == riscv64 # Floating-point exceptions are optional and absent on most hardware REGRESS_EXPECTED_FAILURES+= fltdiv fltinv fltovf fltund .endif diff --git a/regress/lib/libc/setjmp-fpu/fpu.c b/regress/lib/libc/setjmp-fpu/fpu.c index 86378541776..e5857028874 100644 --- a/regress/lib/libc/setjmp-fpu/fpu.c +++ b/regress/lib/libc/setjmp-fpu/fpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpu.c,v 1.2 2020/10/19 08:50:35 kettenis Exp $ */ +/* $OpenBSD: fpu.c,v 1.3 2021/06/17 12:55:38 kettenis Exp $ */ #include #include @@ -34,7 +34,7 @@ main(int argc, char *argv[]) rv = fegetround(); if (rv != FE_UPWARD) errx(1, "fegetround returned %d, not FE_UPWARD", rv); -#if !defined(__arm__) && !defined(__aarch64__) +#if !defined(__arm__) && !defined(__aarch64__) && !defined(__riscv) rv = fegetexcept(); if (rv != FE_DIVBYZERO) errx(1, "fegetexcept returned %d, not FE_DIVBYZERO", diff --git a/regress/lib/libc/setjmp-fpu/setjmp-fpu.c b/regress/lib/libc/setjmp-fpu/setjmp-fpu.c index b74460e5eea..b5ffd8948e5 100644 --- a/regress/lib/libc/setjmp-fpu/setjmp-fpu.c +++ b/regress/lib/libc/setjmp-fpu/setjmp-fpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: setjmp-fpu.c,v 1.6 2020/10/19 08:50:35 kettenis Exp $ */ +/* $OpenBSD: setjmp-fpu.c,v 1.7 2021/06/17 12:55:38 kettenis Exp $ */ #include #include @@ -42,7 +42,7 @@ TEST_SETJMP(void) rv = fegetround(); if (rv != FE_UPWARD) errx(1, "fegetround returned %d, not FE_UPWARD", rv); -#if !defined(__arm__) && !defined(__aarch64__) +#if !defined(__arm__) && !defined(__aarch64__) && !defined(__riscv) rv = fegetexcept(); if (rv != FE_DIVBYZERO) errx(1, "fegetexcept returned %d, not FE_DIVBYZERO", diff --git a/regress/lib/libm/fenv/fenv.c b/regress/lib/libm/fenv/fenv.c index c5ee8f3a4af..c7268a02320 100644 --- a/regress/lib/libm/fenv/fenv.c +++ b/regress/lib/libm/fenv/fenv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv.c,v 1.7 2019/12/21 10:05:55 kettenis Exp $ */ +/* $OpenBSD: fenv.c,v 1.8 2021/06/17 12:55:38 kettenis Exp $ */ /*- * Copyright (c) 2004 David Schultz @@ -322,7 +322,7 @@ test_fegsetenv(void) static void test_masking(void) { -#if !defined(__arm__) && !defined(__aarch64__) +#if !defined(__arm__) && !defined(__aarch64__) && !defined(__riscv) struct sigaction act; int except, i, pass, raise, status; @@ -465,7 +465,7 @@ test_feholdupdate(void) assert(0); } } -#if defined(__arm__) || defined(__aarch64__) +#if defined(__arm__) || defined(__aarch64__) || defined(__riscv) break; #endif } diff --git a/regress/lib/libm/msun/fenv_test.c b/regress/lib/libm/msun/fenv_test.c index d63d82e84de..46f7406e84c 100644 --- a/regress/lib/libm/msun/fenv_test.c +++ b/regress/lib/libm/msun/fenv_test.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fenv_test.c,v 1.4 2020/10/19 09:35:44 kettenis Exp $ */ +/* $OpenBSD: fenv_test.c,v 1.5 2021/06/17 12:55:38 kettenis Exp $ */ /*- * Copyright (c) 2004 David Schultz * All rights reserved. @@ -394,7 +394,7 @@ test_fegsetenv(void) static void test_masking(void) { -#if !defined(__arm__) && !defined(__aarch64__) +#if !defined(__arm__) && !defined(__aarch64__) && !defined(__riscv) struct sigaction act; int except, pass, raise, status; unsigned i; @@ -539,7 +539,7 @@ test_feholdupdate(void) assert(0); } } -#if defined(__arm__) || defined(__aarch64__) +#if defined(__arm__) || defined(__aarch64__) || defined(__riscv) break; #endif }