From: jsg Date: Fri, 12 Jul 2024 03:55:50 +0000 (+0000) Subject: drm/amd/display: Check pipe offset before setting vblank X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=41f582bc418a44273d75ae7b83228be466e418ef;p=openbsd drm/amd/display: Check pipe offset before setting vblank From Alex Hung 96bf81cc1bd058bb8af6e755a548e926e934dfd1 in linux-6.6.y/6.6.39 5396a70e8cf462ec5ccf2dc8de103c79de9489e6 in mainline linux --- diff --git a/sys/dev/pci/drm/amd/display/dc/irq/dce110/irq_service_dce110.c b/sys/dev/pci/drm/amd/display/dc/irq/dce110/irq_service_dce110.c index 44649db5f3e..5646b7788f0 100644 --- a/sys/dev/pci/drm/amd/display/dc/irq/dce110/irq_service_dce110.c +++ b/sys/dev/pci/drm/amd/display/dc/irq/dce110/irq_service_dce110.c @@ -211,8 +211,12 @@ bool dce110_vblank_set(struct irq_service *irq_service, info->ext_id); uint8_t pipe_offset = dal_irq_src - IRQ_TYPE_VBLANK; - struct timing_generator *tg = - dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; + struct timing_generator *tg; + + if (pipe_offset >= MAX_PIPES) + return false; + + tg = dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; if (enable) { if (!tg || !tg->funcs->arm_vert_intr(tg, 2)) {