From: jsg Date: Tue, 5 Jul 2022 02:47:05 +0000 (+0000) Subject: workaround link training problems on s3 resume with alder lake X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=39642ac141eaad18e76ec63a7959fae493d2e04a;p=openbsd workaround link training problems on s3 resume with alder lake The firmware from multiple lenovo alder lake machines claim there are two eDP ports in the video bios table (VBT). Which results in link training problems on resume from S3 with the screen continually turning on and off. Forcing port B to not be recognised as eDP works around this. I believe port A is the normal eDP port. https://gitlab.freedesktop.org/drm/intel/-/issues/5531 https://gitlab.freedesktop.org/drm/intel/-/issues/4950 --- diff --git a/sys/dev/pci/drm/i915/display/intel_bios.c b/sys/dev/pci/drm/i915/display/intel_bios.c index b1fd5680b6d..eb3c1cc86f2 100644 --- a/sys/dev/pci/drm/i915/display/intel_bios.c +++ b/sys/dev/pci/drm/i915/display/intel_bios.c @@ -2664,6 +2664,17 @@ bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port) [PORT_F] = DVO_PORT_DPF, }; + /* + * XXX on T14 Gen 3 resume + * [drm] AUX A/DDI A/PHY A: timeout (status 0x7d4003ff) + * [drm] AUX A/DDI A/PHY A: Too many retries, giving up. First error: -60 + * intel_edp_init_source_oui *ERROR* [drm] *ERROR* Failed to write source OUI + * intel_dp_link_training_clock_recovery *ERROR* [drm] *ERROR* failed to enable link training + * https://gitlab.freedesktop.org/drm/intel/-/issues/5531 + */ + if (IS_ALDERLAKE_P(i915) && port == PORT_B) + return false; + if (HAS_DDI(i915)) { const struct intel_bios_encoder_data *devdata;