From: jsg <jsg@openbsd.org>
Date: Thu, 15 Aug 2024 02:59:50 +0000 (+0000)
Subject: drm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=26f37df53e62fafa6a69e36f433e4a435d5f6882;p=openbsd

drm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules

From Ma Jun
3a01bf2ca9f860fdc88c358567b8fa3033efcf30 in linux-6.6.y/6.6.46
d19fb10085a49b77578314f69fff21562f7cd054 in mainline linux
---

diff --git a/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 18b3545ad9d..4cd7e0e270d 100644
--- a/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -3314,8 +3314,7 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
 			const struct pp_power_state *current_ps)
 {
 	struct amdgpu_device *adev = hwmgr->adev;
-	struct smu7_power_state *smu7_ps =
-				cast_phw_smu7_power_state(&request_ps->hardware);
+	struct smu7_power_state *smu7_ps;
 	uint32_t sclk;
 	uint32_t mclk;
 	struct PP_Clocks minimum_clocks = {0};
@@ -3332,6 +3331,10 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
 	uint32_t latency;
 	bool latency_allowed = false;
 
+	smu7_ps = cast_phw_smu7_power_state(&request_ps->hardware);
+	if (!smu7_ps)
+		return -EINVAL;
+
 	data->battery_state = (PP_StateUILabel_Battery ==
 			request_ps->classification.ui_label);
 	data->mclk_ignore_signal = false;
diff --git a/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c b/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
index f8d864e7e9d..20a844b2be0 100644
--- a/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
+++ b/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
@@ -1065,16 +1065,18 @@ static int smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
 				struct pp_power_state  *prequest_ps,
 			const struct pp_power_state *pcurrent_ps)
 {
-	struct smu8_power_state *smu8_ps =
-				cast_smu8_power_state(&prequest_ps->hardware);
-
-	const struct smu8_power_state *smu8_current_ps =
-				cast_const_smu8_power_state(&pcurrent_ps->hardware);
-
+	struct smu8_power_state *smu8_ps;
+	const struct smu8_power_state *smu8_current_ps;
 	struct smu8_hwmgr *data = hwmgr->backend;
 	struct PP_Clocks clocks = {0, 0, 0, 0};
 	bool force_high;
 
+	smu8_ps = cast_smu8_power_state(&prequest_ps->hardware);
+	smu8_current_ps = cast_const_smu8_power_state(&pcurrent_ps->hardware);
+
+	if (!smu8_ps || !smu8_current_ps)
+		return -EINVAL;
+
 	smu8_ps->need_dfs_bypass = true;
 
 	data->battery_state = (PP_StateUILabel_Battery == prequest_ps->classification.ui_label);
diff --git a/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c b/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
index 7f72fd3f16e..8dd818f3e57 100644
--- a/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
+++ b/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
@@ -3259,8 +3259,7 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
 			const struct pp_power_state *current_ps)
 {
 	struct amdgpu_device *adev = hwmgr->adev;
-	struct vega10_power_state *vega10_ps =
-				cast_phw_vega10_power_state(&request_ps->hardware);
+	struct vega10_power_state *vega10_ps;
 	uint32_t sclk;
 	uint32_t mclk;
 	struct PP_Clocks minimum_clocks = {0};
@@ -3278,6 +3277,10 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
 	uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0;
 	uint32_t latency;
 
+	vega10_ps = cast_phw_vega10_power_state(&request_ps->hardware);
+	if (!vega10_ps)
+		return -EINVAL;
+
 	data->battery_state = (PP_StateUILabel_Battery ==
 			request_ps->classification.ui_label);