From: jsg <jsg@openbsd.org>
Date: Fri, 19 Nov 2021 03:10:49 +0000 (+0000)
Subject: drm/amd/display: dcn20_resource_construct reduce scope of FPU enabled
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=1a0f1eba86a82fb73f59eb43fdb1c5c45bc93154;p=openbsd

drm/amd/display: dcn20_resource_construct reduce scope of FPU enabled

From Anson Jacob
6f038b1a941e87886f6bbced0a65aea343a9859e in linux 5.10.y/5.10.80
bc39a69a2ac484e6575a958567c162ef56c9f278 in mainline linux
---

diff --git a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c
index 5dbc290bcbe..31218165464 100644
--- a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -3754,16 +3754,22 @@ static bool init_soc_bounding_box(struct dc *dc,
 			clock_limits_available = (status == PP_SMU_RESULT_OK);
 		}
 
-		if (clock_limits_available && uclk_states_available && num_states)
+		if (clock_limits_available && uclk_states_available && num_states) {
+			DC_FP_START();
 			dcn20_update_bounding_box(dc, loaded_bb, &max_clocks, uclk_states, num_states);
-		else if (clock_limits_available)
+			DC_FP_END();
+		} else if (clock_limits_available) {
+			DC_FP_START();
 			dcn20_cap_soc_clocks(loaded_bb, max_clocks);
+			DC_FP_END();
+		}
 	}
 
 	loaded_ip->max_num_otg = pool->base.res_cap->num_timing_generator;
 	loaded_ip->max_num_dpp = pool->base.pipe_count;
+	DC_FP_START();
 	dcn20_patch_bounding_box(dc, loaded_bb);
-
+	DC_FP_END();
 	return true;
 }
 
@@ -3783,8 +3789,6 @@ static bool dcn20_resource_construct(
 	enum dml_project dml_project_version =
 			get_dml_project_version(ctx->asic_id.hw_internal_rev);
 
-	DC_FP_START();
-
 	ctx->dc_bios->regs = &bios_regs;
 	pool->base.funcs = &dcn20_res_pool_funcs;
 
@@ -4128,12 +4132,10 @@ static bool dcn20_resource_construct(
 		pool->base.oem_device = NULL;
 	}
 
-	DC_FP_END();
 	return true;
 
 create_fail:
 
-	DC_FP_END();
 	dcn20_resource_destruct(pool);
 
 	return false;