From: kettenis Date: Sun, 31 Dec 2017 08:42:04 +0000 (+0000) Subject: Tighten the permissions used in the early stage page tables somewhat. X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=188153f0110ffcb729abdedea0ad37bc2c5bf6a8;p=openbsd Tighten the permissions used in the early stage page tables somewhat. Add an interface to establish additional VA=PA 1G block mappings for use by upcoming EFI runtime services support. ok guenther@ --- diff --git a/sys/arch/arm64/arm64/locore.S b/sys/arch/arm64/arm64/locore.S index f56bef7bce5..e85d210ee78 100644 --- a/sys/arch/arm64/arm64/locore.S +++ b/sys/arch/arm64/arm64/locore.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.S,v 1.19 2017/08/08 21:52:41 drahn Exp $ */ +/* $OpenBSD: locore.S,v 1.20 2017/12/31 08:42:04 kettenis Exp $ */ /*- * Copyright (c) 2012-2014 Andrew Turner * All rights reserved. @@ -82,8 +82,10 @@ pagetable: .space PAGE_SIZE * 2 // allocate 2 pages for pmapvp2 pagetable_l1_ttbr1: .space PAGE_SIZE * 2 // allocate 2 pages for pmapvp1 + .globl pagetable_l1_ttbr0 pagetable_l1_ttbr0: .space PAGE_SIZE * 2 // allocate 2 pages, reused later in pmap + .globl pagetable_l0_ttbr0 pagetable_l0_ttbr0: .space PAGE_SIZE .globl pagetable_end diff --git a/sys/arch/arm64/arm64/locore0.S b/sys/arch/arm64/arm64/locore0.S index 3a71bb4c16f..f4284fbd2bd 100644 --- a/sys/arch/arm64/arm64/locore0.S +++ b/sys/arch/arm64/arm64/locore0.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore0.S,v 1.2 2017/08/06 20:05:24 kettenis Exp $ */ +/* $OpenBSD: locore0.S,v 1.3 2017/12/31 08:42:04 kettenis Exp $ */ /*- * Copyright (c) 2012-2014 Andrew Turner * All rights reserved. @@ -486,8 +486,8 @@ build_l1_block_pagetable: /* Build the L1 block entry */ lsl x12, x7, #2 orr x12, x12, #L1_BLOCK - orr x12, x12, #(ATTR_AF) - orr x12, x12, ATTR_SH(SH_INNER) + orr x12, x12, #(ATTR_nG | ATTR_AF | ATTR_SH(SH_INNER)) + orr x12, x12, #ATTR_UXN /* Only use the output address bits */ lsr x9, x9, #L1_SHIFT @@ -525,8 +525,8 @@ build_l2_block_pagetable: /* Build the L2 block entry */ lsl x12, x7, #2 orr x12, x12, #L2_BLOCK - orr x12, x12, #(ATTR_AF) - orr x12, x12, ATTR_SH(SH_INNER) + orr x12, x12, #(ATTR_nG | ATTR_AF | ATTR_SH(SH_INNER)) + orr x12, x12, #ATTR_UXN /* Only use the output address bits */ lsr x9, x9, #L2_SHIFT diff --git a/sys/arch/arm64/arm64/pmap.c b/sys/arch/arm64/arm64/pmap.c index 2e7b0db7976..f68d2d23b27 100644 --- a/sys/arch/arm64/arm64/pmap.c +++ b/sys/arch/arm64/arm64/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.40 2017/12/27 14:13:05 kettenis Exp $ */ +/* $OpenBSD: pmap.c,v 1.41 2017/12/31 08:42:04 kettenis Exp $ */ /* * Copyright (c) 2008-2009,2014-2016 Dale Rahn * @@ -2018,6 +2018,23 @@ pmap_show_mapping(uint64_t va) pted, vp3->l3[VP_IDX3(va)], VP_IDX3(va)*8); } +void +pmap_map_early(paddr_t spa, psize_t len) +{ + extern pd_entry_t pagetable_l0_ttbr0[]; + extern pd_entry_t pagetable_l1_ttbr0[]; + paddr_t pa, epa = spa + len; + + for (pa = spa & ~(L1_SIZE - 1); pa < epa; pa += L1_SIZE) { + if (pagetable_l0_ttbr0[VP_IDX0(pa)] == 0) + panic("%s: outside existing L0 entry", __func__); + + pagetable_l1_ttbr0[VP_IDX1(pa)] = pa | L1_BLOCK | + ATTR_IDX(PTE_ATTR_WB) | ATTR_SH(SH_INNER) | + ATTR_nG | ATTR_UXN | ATTR_AF | ATTR_AP(0); + } +} + #define NUM_ASID (1 << 16) uint64_t pmap_asid[NUM_ASID / 64]; diff --git a/sys/arch/arm64/include/pmap.h b/sys/arch/arm64/include/pmap.h index 96c1a264e82..e4024d2ef0a 100644 --- a/sys/arch/arm64/include/pmap.h +++ b/sys/arch/arm64/include/pmap.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.h,v 1.6 2017/08/27 19:33:02 drahn Exp $ */ +/* $OpenBSD: pmap.h,v 1.7 2017/12/31 08:42:04 kettenis Exp $ */ /* * Copyright (c) 2008,2009,2014 Dale Rahn * @@ -95,9 +95,7 @@ struct pv_entry; #define pmap_unuse_final(p) do { /* nothing */ } while (0) int pmap_fault_fixup(pmap_t, vaddr_t, vm_prot_t, int); void pmap_postinit(void); -void pmap_map_section(vaddr_t, vaddr_t, paddr_t, int, int); -void pmap_map_entry(vaddr_t, vaddr_t, paddr_t, int, int); -vsize_t pmap_map_chunk(vaddr_t, vaddr_t, paddr_t, vsize_t, int, int); +void pmap_map_early(paddr_t, psize_t); #ifndef _LOCORE