From: visa Date: Fri, 7 Apr 2017 14:17:38 +0000 (+0000) Subject: Add prid for CN72xx/CN73xx. X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=183c606c44c85e03a654a0217ebc1890ab970cfc;p=openbsd Add prid for CN72xx/CN73xx. --- diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h index 5206d877a5d..0f31d10fdad 100644 --- a/sys/arch/mips64/include/cpu.h +++ b/sys/arch/mips64/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.114 2017/03/02 10:38:10 natano Exp $ */ +/* $OpenBSD: cpu.h,v 1.115 2017/04/07 14:17:38 visa Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -403,6 +403,7 @@ void cp0_calibrate(struct cpu_info *); #define MIPS_LOONGSON2 0x63 /* STC LoongSon2/3 CPU ISA III+ */ #define MIPS_CN61XX 0x93 /* Cavium OCTEON II CN6[01]xx MIPS64R2 */ #define MIPS_CN71XX 0x96 /* Cavium OCTEON III CN7[01]xx MIPS64R2 */ +#define MIPS_CN73XX 0x97 /* Cavium OCTEON III CN7[23]xx MIPS64R2 */ /* * MIPS FPU types. Only soft, rest is the same as cpu type. diff --git a/sys/arch/mips64/mips64/cpu.c b/sys/arch/mips64/mips64/cpu.c index 857a8fe9afd..36466fbc67e 100644 --- a/sys/arch/mips64/mips64/cpu.c +++ b/sys/arch/mips64/mips64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.63 2016/12/17 11:51:02 visa Exp $ */ +/* $OpenBSD: cpu.c,v 1.64 2017/04/07 14:17:38 visa Exp $ */ /* * Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se) @@ -225,6 +225,9 @@ cpuattach(struct device *parent, struct device *dev, void *aux) case MIPS_CN71XX: printf("CN70xx/CN71xx CPU"); break; + case MIPS_CN73XX: + printf("CN72xx/CN73xx CPU"); + break; default: printf("Unknown CPU type (0x%x)", ch->type); break; @@ -310,6 +313,9 @@ cpuattach(struct device *parent, struct device *dev, void *aux) case MIPS_CN71XX: printf("CN70xx/CN71xx FPU"); break; + case MIPS_CN73XX: + printf("CN72xx/CN73xx FPU"); + break; default: printf("Unknown FPU type (0x%x)", fptype); break; diff --git a/sys/arch/octeon/include/octeon_model.h b/sys/arch/octeon/include/octeon_model.h index 1ba3c76a602..a8eb647f0a4 100644 --- a/sys/arch/octeon/include/octeon_model.h +++ b/sys/arch/octeon/include/octeon_model.h @@ -1,4 +1,4 @@ -/* $OpenBSD: octeon_model.h,v 1.5 2016/12/17 14:14:09 visa Exp $ */ +/* $OpenBSD: octeon_model.h,v 1.6 2017/04/07 14:17:38 visa Exp $ */ /* * Copyright (c) 2007 @@ -54,6 +54,7 @@ #define OCTEON_MODEL_FAMILY_CN50XX 0x000d0600 #define OCTEON_MODEL_FAMILY_CN61XX 0x000d9300 #define OCTEON_MODEL_FAMILY_CN71XX 0x000d9600 +#define OCTEON_MODEL_FAMILY_CN73XX 0x000d9700 /* * get chip id diff --git a/sys/arch/octeon/octeon/machdep.c b/sys/arch/octeon/octeon/machdep.c index 2588e1711b7..29c24d79593 100644 --- a/sys/arch/octeon/octeon/machdep.c +++ b/sys/arch/octeon/octeon/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.84 2017/04/07 13:30:43 visa Exp $ */ +/* $OpenBSD: machdep.c,v 1.85 2017/04/07 14:17:38 visa Exp $ */ /* * Copyright (c) 2009, 2010 Miodrag Vallat. @@ -288,6 +288,7 @@ mips_init(__register_t a0, __register_t a1, __register_t a2 __unused, octeon_ver = OCTEON_2; break; case MIPS_CN71XX: + case MIPS_CN73XX: octeon_ver = OCTEON_3; break; }