From: jsg <jsg@openbsd.org>
Date: Tue, 6 Feb 2024 03:13:06 +0000 (+0000)
Subject: drm/amd/display: Fix tiled display misalignment
X-Git-Url: http://artulab.com/gitweb/?a=commitdiff_plain;h=0d503ef7f183f0e5409b5bf42975933f2b79ebdc;p=openbsd

drm/amd/display: Fix tiled display misalignment

From Meenakshikumar Somasundaram
1c563c04509080b374af5adf8e1c45718e3f37bf in linux-6.6.y/6.6.16
c4b8394e76adba4f50a3c2696c75b214a291e24a in mainline linux
---

diff --git a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c
index 8cdf380bf36..46b10ff8f6d 100644
--- a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c
+++ b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c
@@ -1948,6 +1948,10 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
 		wait_for_no_pipes_pending(dc, context);
 		/* pplib is notified if disp_num changed */
 		dc->hwss.optimize_bandwidth(dc, context);
+		/* Need to do otg sync again as otg could be out of sync due to otg
+		 * workaround applied during clock update
+		 */
+		dc_trigger_sync(dc, context);
 	}
 
 	if (dc->hwss.update_dsc_pg)