-/* $OpenBSD: azalia.c,v 1.281 2022/11/05 00:12:39 jsg Exp $ */
+/* $OpenBSD: azalia.c,v 1.282 2023/02/05 02:26:02 jsg Exp $ */
/* $NetBSD: azalia.c,v 1.20 2006/05/07 08:31:44 kent Exp $ */
/*-
case PCI_PRODUCT_INTEL_BSW_HDA:
case PCI_PRODUCT_INTEL_GLK_HDA:
case PCI_PRODUCT_INTEL_JSL_HDA:
+ case PCI_PRODUCT_INTEL_EHL_HDA:
reg = azalia_pci_read(az->pc, az->tag,
INTEL_PCIE_NOSNOOP_REG);
reg &= INTEL_PCIE_NOSNOOP_MASK;
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_600SERIES_LP_HDA },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_HDA },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_HDA },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_HDA },
};
int
-/* $OpenBSD: dwiic_pci.c,v 1.22 2022/10/24 05:57:58 jsg Exp $ */
+/* $OpenBSD: dwiic_pci.c,v 1.23 2023/02/05 02:26:02 jsg Exp $ */
/*
* Synopsys DesignWare I2C controller
* PCI attachment
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_I2C_3 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_I2C_4 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_I2C_5 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_1 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_2 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_3 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_4 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_5 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_6 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_7 },
};
int
-/* $OpenBSD: ichiic.c,v 1.50 2022/10/24 05:57:58 jsg Exp $ */
+/* $OpenBSD: ichiic.c,v 1.51 2023/02/05 02:26:02 jsg Exp $ */
/*
* Copyright (c) 2005, 2006 Alexander Yurchenko <grange@openbsd.org>
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_600SERIES_LP_SMB },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_700SERIES_SMB },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SMB },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SMB },
};
int