-/* $OpenBSD: zs.c,v 1.33 2024/03/29 21:09:04 miod Exp $ */
+/* $OpenBSD: zs.c,v 1.34 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: zs.c,v 1.29 2001/05/30 15:24:24 lukem Exp $ */
/*-
/*
* Attach a found zs.
- *
- * USE ROM PROPERTY keyboard FOR KEYBOARD/MOUSE?
*/
static void
zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
-/* $OpenBSD: z8530var.h,v 1.8 2013/04/21 14:44:16 sebastia Exp $ */
+/* $OpenBSD: z8530var.h,v 1.9 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: z8530var.h,v 1.4 2000/11/08 23:41:42 eeh Exp $ */
/*
/*
* Functions to read and write individual registers in a channel.
* The ZS chip requires a 1.6 uSec. recovery time between accesses.
- * On the SparcStation the recovery time is handled in hardware.
- * On the older Sun4 machine it isn't, and software must do it.
- *
- * However, it *is* a problem on some Sun4m's (i.e. the SS20) (XXX: why?).
- * Thus we leave in the delay (done in the functions below).
- * XXX: (ABB) Think about this more.
- *
- * The functions below could be macros instead if we are concerned
- * about the function call overhead where ZS_DELAY does nothing.
+ * On sparc64, the recovery time is handled in hardware.
*/
u_char zs_read_reg(struct zs_chanstate *cs, u_char reg);
-/* $OpenBSD: autoconf.c,v 1.146 2024/03/29 21:09:04 miod Exp $ */
+/* $OpenBSD: autoconf.c,v 1.147 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: autoconf.c,v 1.51 2001/07/24 19:32:11 eeh Exp $ */
/*
/*
* Determine mass storage and memory configuration for a machine.
* We get the PROM's root device and make sure we understand it, then
- * attach it as `mainbus0'. We also set up to handle the PROM `sync'
- * command.
+ * attach it as `mainbus0'.
*/
void
cpu_configure(void)
2, &col, &row);
/*
- * We are running on a 64-bit machine, so these things point to
- * 64-bit values. To convert them to pointers to interfaces, add
- * 4 to the address.
+ * We are running on a 64-bit big-endian machine, so these things
+ * point to 64-bit big-endian values. To convert them to pointers
+ * to int, add 4 to the address.
*/
if (row == 0 || col == 0)
return (-1);
-/* $OpenBSD: conf.c,v 1.88 2022/10/15 10:12:13 jsg Exp $ */
+/* $OpenBSD: conf.c,v 1.89 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: conf.c,v 1.17 2001/03/26 12:33:26 lukem Exp $ */
/*
#include "uk.h"
#include "wd.h"
-#ifdef notyet
-#include "fb.h"
-#endif
#include "zstty.h"
#include "sab.h"
#include "pcons.h"
#include "vldcp.h"
#include "vdsp.h"
-#include "fdc.h" /* has NFDC and NFD; see files.sparc */
+#include "fdc.h" /* has NFDC and NFD; see files.sparc64 */
#include "drm.h"
cdev_decl(drm);
bdev_notdef(), /* 0 */
bdev_notdef(), /* 1 */
bdev_notdef(), /* 2 */
- bdev_notdef(), /* 3: SMD disk -- not this arch */
+ bdev_notdef(), /* 3 */
bdev_swap_init(1,sw), /* 4 swap pseudo-device */
bdev_disk_init(NRD,rd), /* 5: ram disk */
bdev_notdef(), /* 6 */
bdev_disk_init(NSD,sd), /* 7: SCSI disk */
bdev_disk_init(NVND,vnd), /* 8: vnode disk driver */
bdev_notdef(), /* 9: was: concatenated disk driver */
- bdev_notdef(), /* 10: SMD disk -- not this arch */
+ bdev_notdef(), /* 10 */
bdev_notdef(), /* 11: was: SCSI tape */
bdev_disk_init(NWD,wd), /* 12: IDE disk */
bdev_notdef(), /* 13 */
struct cdevsw cdevsw[] =
{
cdev_cn_init(1,cn), /* 0: virtual console */
- cdev_notdef(), /* 1: tapemaster tape */
+ cdev_notdef(), /* 1 */
cdev_ctty_init(1,ctty), /* 2: controlling terminal */
cdev_mm_init(1,mm), /* 3: /dev/{null,mem,kmem,...} */
cdev_notdef(), /* 4 */
- cdev_notdef(), /* 5: tapemaster tape */
- cdev_notdef(), /* 6: systech/versatec */
+ cdev_notdef(), /* 5 */
+ cdev_notdef(), /* 6 */
cdev_notdef(), /* 7 was /dev/drum */
- cdev_notdef(), /* 8: Archive QIC-11 tape */
- cdev_notdef(), /* 9: SMD disk on Xylogics 450/451 */
- cdev_notdef(), /* 10: systech multi-terminal board */
- cdev_notdef(), /* 11: DES encryption chip */
+ cdev_notdef(), /* 8 */
+ cdev_notdef(), /* 9 */
+ cdev_notdef(), /* 10 */
+ cdev_notdef(), /* 11 */
cdev_tty_init(NZSTTY,zs), /* 12: Zilog 8530 serial port */
- cdev_notdef(), /* 13: /dev/mouse */
- cdev_notdef(), /* 14: cgone */
- cdev_notdef(), /* 15: sun /dev/winNNN */
+ cdev_notdef(), /* 13 */
+ cdev_notdef(), /* 14 */
+ cdev_notdef(), /* 15 */
cdev_log_init(1,log), /* 16: /dev/klog */
cdev_disk_init(NSD,sd), /* 17: SCSI disk */
cdev_tape_init(NST,st), /* 18: SCSI tape */
cdev_uperf_init(NUPERF,uperf), /* 25: performance counters */
cdev_disk_init(NWD,wd), /* 26: IDE disk */
cdev_notdef(), /* 27 */
- cdev_notdef(), /* 28: Systech VPC-2200 versatec/centronics */
+ cdev_notdef(), /* 28 */
cdev_notdef(), /* 29 */
cdev_dt_init(NDT,dt), /* 30: dynamic tracer */
- cdev_notdef(), /* 31: /dev/cgtwo */
- cdev_notdef(), /* 32: should be /dev/gpone */
+ cdev_notdef(), /* 31 */
+ cdev_notdef(), /* 32 */
cdev_notdef(), /* 33 */
cdev_notdef(), /* 34 */
cdev_notdef(), /* 35 */
cdev_notdef(), /* 39 */
cdev_notdef(), /* 40 */
cdev_notdef(), /* 41 */
- cdev_notdef(), /* 42: SMD disk */
+ cdev_notdef(), /* 42 */
cdev_notdef(), /* 43 */
cdev_video_init(NVIDEO,video), /* 44: generic video I/O */
cdev_notdef(), /* 45 */
cdev_disk_init(NRD,rd), /* 61: memory disk */
cdev_notdef(), /* 62 */
cdev_notdef(), /* 63 */
- cdev_notdef(), /* 64: /dev/cgeight */
+ cdev_notdef(), /* 64 */
cdev_notdef(), /* 65 */
cdev_notdef(), /* 66 */
cdev_notdef(), /* 67 */
* It cannot be provided to the users, because the
* swstrategy routine munches the b_dev and b_blkno entries
* before calling the appropriate driver. This would horribly
- * confuse, e.g. the hashing routines. Instead, /dev/drum is
- * provided as a character (raw) device.
+ * confuse, e.g. the hashing routines.
*/
dev_t swapdev = makedev(4, 0);
/*
* Routine that identifies /dev/mem and /dev/kmem.
- *
- * A minimal stub routine can always return 0.
*/
int
iskmemdev(dev_t dev)
{
-
return (major(dev) == mem_no && minor(dev) < 2);
}
-/* $OpenBSD: intr.c,v 1.64 2024/03/29 21:09:04 miod Exp $ */
+/* $OpenBSD: intr.c,v 1.65 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: intr.c,v 1.39 2001/07/19 23:38:11 eeh Exp $ */
/*
return rc;
}
-/*
- * Level 1 software interrupt (could also be SBus level 1 interrupt).
- * Three possible reasons:
- * Network software interrupt
- * Soft clock interrupt
- */
-
/*
* PCI devices can share interrupts so we need to have
* a handler to hand out interrupts.
/*
* Attach an interrupt handler to the vector chain for the given level.
- * This is not possible if it has been taken away as a fast vector.
*/
void
intr_establish(int level, struct intrhand *ih)
-/* $OpenBSD: locore.s,v 1.208 2024/03/29 21:16:38 miod Exp $ */
+/* $OpenBSD: locore.s,v 1.209 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: locore.s,v 1.137 2001/08/13 06:10:10 jdolecek Exp $ */
/*
#include <machine/pmap.h>
#include <machine/asm.h>
-#undef CURPROC
-#undef CPCB
-#undef FPPROC
-
/* Let us use same syntax as C code */
#define db_enter() ta 1; nop
* something like:
* foointr:
* TRAP_SETUP ... ! makes %o registers safe
- * INCR cnt+V_FOO ! count a foo
+ * INCR uvmexp+V_FOO ! count a foo
*/
.macro INCR what
sethi %hi(\what), %o0
* (oddly enough, the code looks about as slimy too). Thus, all the
* trap numbers are given as arguments to the trap macros. This means
* there is one line per trap. Sigh.
- *
- * Hardware interrupt vectors can be `linked'---the linkage is to regular
- * C code---or rewired to fast in-window handlers. The latter are good
- * for unbuffered hardware like the Zilog serial chip and the AMD audio
- * chip, where many interrupts can be handled trivially with pseudo-DMA
- * or similar. Only one `fast' interrupt can be used per level, however,
- * and direct and `fast' interrupts are incompatible. Routines in intr.c
- * handle setting these, with optional paranoia.
*/
/*
TA8
.endm
#endif /* DEBUG */
- /* hardware interrupts (can be linked or made `fast') */
+ /* hardware interrupts */
.macro HARDINT4U lev
VTRAP \lev, sparc_interrupt
.endm
- /* software interrupts (may not be made direct, sorry---but you
- should not be using them trivially anyway) */
+ /* software interrupts */
.macro SOFTINT4U lev, bit
- HARDINT4U lev
+ HARDINT4U \lev
.endm
/* traps that just call trap() */
.endm
#define SYSCALL VTRAP 0x100, syscall_setup
-#define ZS_INTERRUPT4U HARDINT4U 12
/*
* Macro to clear %tt so we don't get confused with old traps.
HARDINT4U 9 ! 049 = level 9 interrupt
HARDINT4U 10 ! 04a = level 10 interrupt
HARDINT4U 11 ! 04b = level 11 interrupt
- ZS_INTERRUPT4U ! 04c = level 12 (zs) interrupt
+ HARDINT4U 12 ! 04c = level 12 interrupt
HARDINT4U 13 ! 04d = level 13 interrupt
HARDINT4U 14 ! 04e = level 14 interrupt
HARDINT4U 15 ! 04f = nonmaskable interrupt
UTRAP 0x050; UTRAP 0x051; UTRAP 0x052; UTRAP 0x053; UTRAP 0x054; UTRAP 0x055
UTRAP 0x056; UTRAP 0x057; UTRAP 0x058; UTRAP 0x059; UTRAP 0x05a; UTRAP 0x05b
UTRAP 0x05c; UTRAP 0x05d; UTRAP 0x05e; UTRAP 0x05f
- VTRAP 0x060, interrupt_vector; ! 060 = interrupt vector
+ VTRAP 0x060, interrupt_vector; ! 060 = interrupt vector
TRAP T_PA_WATCHPT ! 061 = physical address data watchpoint
TRAP T_VA_WATCHPT ! 062 = virtual address data watchpoint
VTRAP T_ECCERR, cecc_catch ! 063 = Correctable ECC error
HARDINT4U 9 ! 049 = level 9 interrupt
HARDINT4U 10 ! 04a = level 10 interrupt
HARDINT4U 11 ! 04b = level 11 interrupt
- ZS_INTERRUPT4U ! 04c = level 12 (zs) interrupt
+ HARDINT4U 12 ! 04c = level 12 interrupt
HARDINT4U 13 ! 04d = level 13 interrupt
HARDINT4U 14 ! 04e = level 14 interrupt
HARDINT4U 15 ! 04f = nonmaskable interrupt
* is set. If so, it sets the H/W write bit, marks the tte modified,
* and enters the mapping into the MMU. Otherwise it does a regular
* data fault.
- *
- *
*/
ICACHE_ALIGN
dmmu_write_fault:
TRAP_SETUP -CC64FSZ-TF_SIZE
Ldatafault_internal:
- INCR uvmexp+V_FAULTS ! cnt.v_faults++ (clobbers %o0,%o1,%o2) should not fault
+ INCR uvmexp+V_FAULTS ! uvmexp.faults++ (clobbers %o0,%o1,%o2) should not fault
! ldx [%sp + CC64FSZ + BIAS + TF_FAULT], %g1 ! DEBUG make sure this has not changed
mov %g1, %o0 ! Move these to the out regs so we can save the globals
mov %g2, %o4
membar #Sync ! No real reason for this XXXX
TRAP_SETUP -CC64FSZ-TF_SIZE
- INCR uvmexp+V_FAULTS ! cnt.v_faults++ (clobbers %o0,%o1,%o2)
+ INCR uvmexp+V_FAULTS ! uvmexp.faults++ (clobbers %o0,%o1,%o2)
mov %g3, %o3
* When an interrupt comes in, interrupt_vector uses the interrupt
* vector number to lookup the appropriate intrhand from the intrlev
* array. It then looks up the interrupt level from the intrhand
- * structure. It uses the level to index the intrpending array,
+ * structure. It uses the level to index the per-cpu intrpending array,
* which is 8 slots for each possible interrupt level (so we can
* shift instead of multiply for address calculation). It hunts for
* any available slot at that level. Available slots are NULL.
* %l1 = return pc
* %l2 = return npc
* %l3 = interrupt level
- * (software interrupt only) %l4 = bits to clear in interrupt register
*
* Internal:
* %l4, %l5: local variables
#endif
rd %y, %l6
- INCR uvmexp+V_INTR ! cnt.v_intr++; (clobbers %o0,%o1,%o2)
+ INCR uvmexp+V_INTR ! uvmexp.intrs++; (clobbers %o0,%o1,%o2)
rdpr %tt, %l5 ! Find out our current IPL
rdpr %tstate, %l0
rdpr %tpc, %l1
END(cache_flush_virt)
/*
- * XXXXX Still needs lotsa cleanup after sendsig is complete and offsets are known
- *
- * The following code is copied to the top of the user stack when each
- * process is exec'ed, and signals are `trampolined' off it.
+ * The following code is copied to a dedicated page,
+ * and signals are `trampolined' off it.
*
* When this code is run, the stack looks like:
* [%sp] 128 bytes to which registers can be dumped
* The address of the function to call is in %g1; the old %g1 and %o0
* have already been saved in the sigcontext. We are running in a clean
* window, all previous windows now being saved to the stack.
- *
- * XXX this is bullshit
- * Note that [%sp + 128 + 8] == %sp + 128 + 16. The copy at %sp+128+8
- * will eventually be removed, with a hole left in its place, if things
- * work out.
*/
.section .rodata
.globl sigcode
restore %g0, SYS_sigreturn, %g1 ! get registers back & set syscall #
add %sp, BIAS + 128 + 16, %o0 ! compute scp
-! andn %o0, 0x0f, %o0
.globl sigcoderet
sigcoderet:
.globl sigcodecall
#endif /* defined(MULTIPROCESSOR) */
mov SONPROC, %o0 ! newproc->p_stat = SONPROC
stb %o0, [%i1 + P_STAT]
- ldx [%i1 + P_ADDR], %l1 ! newpcb = newpeoc->p_addr;
+ ldx [%i1 + P_ADDR], %l1 ! newpcb = newproc->p_addr;
flushw ! save all register windows except this one
/*
- * Not the old process. Save the old process, if any;
- * then load p.
+ * Save the old process, if any; then load p.
*/
brz,pn %i0, Lsw_load ! if no old process, go load
wrpr %g0, PSTATE_KERN, %pstate
END(snapshot)
/*
- * cpu_set_kpc() and cpu_fork() arrange for proc_trampoline() to run
+ * cpu_fork() arrange for proc_trampoline() to run
* after a process gets chosen in mi_switch(). The stack frame will
- * contain a function pointer in %l0, and an argument to pass to it in %l2.
+ * contain a function pointer in %l0, and an argument to pass to it in %l1.
*
* If the function *(%l0) returns, we arrange for an immediate return
* to user mode. This happens in two known cases: after execve(2) of init,
mov %l1, %o0
/*
- * Here we finish up as in syscall, but simplified. We need to
- * fiddle pc and npc a bit, as execve() / setregs() /cpu_set_kpc()
- * have only set npc, in anticipation that trap.c will advance past
- * the trap instruction; but we bypass that, so we must do it manually.
+ * Here we finish up as in syscall, but simplified.
*/
! save %sp, -CC64FSZ, %sp ! Save a kernel frame to emulate a syscall
-#if 0
- /* This code doesn't seem to work, but it should. */
- ldx [%sp + CC64FSZ + BIAS + TF_TSTATE], %g1
- ldx [%sp + CC64FSZ + BIAS + TF_NPC], %g2 ! pc = tf->tf_npc from execve/fork
- andn %g1, CWP, %g1 ! Clear the CWP bits
- add %g2, 4, %g3 ! npc = pc+4
- rdpr %cwp, %g5 ! Fixup %cwp in %tstate
- stx %g3, [%sp + CC64FSZ + BIAS + TF_NPC]
- or %g1, %g5, %g1
- stx %g2, [%sp + CC64FSZ + BIAS + TF_PC]
- stx %g1, [%sp + CC64FSZ + BIAS + TF_TSTATE]
-#else /* 0 */
mov PSTATE_USER, %g1 ! XXXX user pstate (no need to load it)
sllx %g1, TSTATE_PSTATE_SHIFT, %g1 ! Shift it into place
rdpr %cwp, %g5 ! Fixup %cwp in %tstate
or %g1, %g5, %g1
stx %g1, [%sp + CC64FSZ + BIAS + TF_TSTATE]
-#endif /* 0 */
CHKPT %o3,%o4,0x35
ba,a,pt %icc, return_from_trap
nop
* pmap_copy_phys(src, dst)
*
* Copy one page physically addressed
- *
- * We also need to blast the D$ and flush like
- * pmap_zero_phys.
*/
ENTRY(pmap_copy_phys)
set NBPG, %o3
END(kcopy)
/*
- * bcopy(src, dest, size - overlaps detected and copied in reverse
+ * bcopy(src, dest, size) - overlaps detected and copied in reverse
*/
ENTRY(bcopy)
/*
* void delay(N) -- delay N microseconds
*
* Register usage: %o0 = "N" number of usecs to go (counts down to zero)
- * %o1 = "timerblurb" (stays constant)
* %o2 = counter for 1 usec (counts down from %o1 to zero)
*
*
*
* %o0 = *ts
*/
- ENTRY(savetstate)
+ENTRY(savetstate)
mov %o0, %o1
CHKPT %o4,%o3,0x28
rdpr %tl, %o0
2:
retl
nop
- END(savetstate)
+END(savetstate)
/*
* Debug stuff. Restore trap registers from buffer.
*
* Maybe this should be re-written to increment tl instead of decrementing.
*/
- ENTRY(restoretstate)
+ENTRY(restoretstate)
CHKPT %o4,%o3,0x36
flushw ! Make sure we don't have stack probs & lose hibits of %o
brz,pn %o0, 2f
/*
* Switch to context in %o0
*/
- ENTRY(switchtoctx)
+ENTRY(switchtoctx)
set DEMAP_CTX_SECONDARY, %o3
stxa %o3, [%o3] ASI_DMMU_DEMAP
membar #Sync
flush %o2
retl
nop
- END(restoretstate)
+END(switchtoctx)
+END(restoretstate)
#endif /* DDB */ /* DDB */
-/* $OpenBSD: machdep.c,v 1.212 2024/03/29 21:11:32 miod Exp $ */
+/* $OpenBSD: machdep.c,v 1.213 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: machdep.c,v 1.108 2001/07/24 19:30:14 eeh Exp $ */
/*-
* Good {morning,afternoon,evening,night}.
*/
printf("%s", version);
- /*identifycpu();*/
printf("real mem = %lu (%luMB)\n", ptoa((psize_t)physmem),
ptoa((psize_t)physmem)/1024/1024);
for (sva = trunc_page((vaddr_t)addr); sva < eva; sva += PAGE_SIZE) {
/*
* Extract physical address for the page.
- * We use a cheezy hack to differentiate physical
- * page 0 from an invalid mapping, not that it
- * really matters...
*/
if (pmap_extract(pmap_kernel(), sva, &pa) == FALSE)
panic("bus_space_protect(): invalid page");
-/* $OpenBSD: pmap.c,v 1.113 2024/03/29 21:11:32 miod Exp $ */
+/* $OpenBSD: pmap.c,v 1.114 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: pmap.c,v 1.107 2001/08/31 16:47:41 eeh Exp $ */
/*
*
vmmap += NBPG;
{
extern vaddr_t u0[2];
- extern struct pcb* proc0paddr;
+ extern struct pcb *proc0paddr;
extern void main(void);
paddr_t pa;
/*
* Release any resources held by the given physical map.
- * Called when a pmap initialized by pmap_pinit is being released.
+ * Called when a pmap initialized by pmap_create is being released.
*/
void
pmap_release(struct pmap *pm)
* If it is the first entry on the list, it is actually
* in the header and we must copy the following entry up
* to the header. Otherwise we must search the list for
- * the entry. In either case we free the now unused entry.
+ * the entry.
*/
if (pmap == pv->pv_pmap && PV_MATCH(pv, va)) {
/* Save modified/ref bits */
-/* $OpenBSD: trap.c,v 1.123 2024/03/29 21:14:31 miod Exp $ */
+/* $OpenBSD: trap.c,v 1.124 2024/03/29 21:17:13 miod Exp $ */
/* $NetBSD: trap.c,v 1.73 2001/08/09 01:03:01 eeh Exp $ */
/*
}
/*
- * This routine handles MMU generated faults. About half
- * of them could be recoverable through uvm_fault.
+ * This routine handles MMU generated faults.
*/
void
data_access_fault(struct trapframe *tf, unsigned type, vaddr_t pc,
}
/*
- * This routine handles MMU generated faults. About half
- * of them could be recoverable through uvm_fault.
+ * This routine handles MMU generated faults.
*/
void
text_access_fault(struct trapframe *tf, unsigned type, vaddr_t pc,
projects / openbsd / commitdiff