-/* $OpenBSD: archdep.h,v 1.13 2010/01/02 12:16:35 kettenis Exp $ */
+/* $OpenBSD: archdep.h,v 1.14 2014/04/16 10:52:58 guenther Exp $ */
/*
* Copyright (c) 1998 Per Fogelstrom, Opsycon AB
Elf64_Addr val = v + s->st_value + r->r_addend -
(Elf64_Addr)(p);
*p = val;
- __asm __volatile("imb" : : : "memory");
+ __asm volatile("imb" : : : "memory");
} else if (ELF64_R_TYPE(r->r_info) == RELOC_GLOB_DAT) {
*p = v + s->st_value + r->r_addend;
} else {
-/* $OpenBSD: rtld_machine.c,v 1.50 2013/06/13 04:13:47 brad Exp $ */
+/* $OpenBSD: rtld_machine.c,v 1.51 2014/04/16 10:52:58 guenther Exp $ */
/*
* Copyright (c) 1999 Dale Rahn
if (ELF_ST_BIND(sym->st_info) != STB_WEAK)
fails++;
}
- __asm __volatile("imb" : : : "memory");
+ __asm volatile("imb" : : : "memory");
/* reprotect the unprotected segments */
if ((object->dyn.textrel == 1) && (rel == DT_REL || rel == DT_RELA)) {
-/* $OpenBSD: rtld_machine.c,v 1.28 2013/06/13 04:13:47 brad Exp $ */
+/* $OpenBSD: rtld_machine.c,v 1.29 2014/04/16 10:52:59 guenther Exp $ */
/*
* Copyright (c) 2004 Michael Shalayeff
*/
got[-7] = PLT_STUB_INSN1;
got[-6] = PLT_STUB_INSN2;
- __asm __volatile("fdc 0(%0)" :: "r" (&got[-7]));
- __asm __volatile("fdc 0(%0)" :: "r" (&got[-6]));
- __asm __volatile("sync");
- __asm __volatile("fic 0(%%sr0,%0)" :: "r" (&got[-7]));
- __asm __volatile("fic 0(%%sr0,%0)" :: "r" (&got[-6]));
- __asm __volatile("sync");
+ __asm volatile("fdc 0(%0)" :: "r" (&got[-7]));
+ __asm volatile("fdc 0(%0)" :: "r" (&got[-6]));
+ __asm volatile("sync");
+ __asm volatile("fic 0(%%sr0,%0)" :: "r" (&got[-7]));
+ __asm volatile("fic 0(%%sr0,%0)" :: "r" (&got[-6]));
+ __asm volatile("sync");
/*
* Fill in the PLT stub such that it invokes the
* There may be instructions in the same cache line
* and they end up being corrupted otherwise.
*/
- __asm __volatile("fdc 0(%0)" :: "r" (&got[-2]));
- __asm __volatile("fdc 0(%0)" :: "r" (&got[-1]));
- __asm __volatile("sync");
- __asm __volatile("fic 0(%%sr0,%0)" :: "r" (&got[-2]));
- __asm __volatile("fic 0(%%sr0,%0)" :: "r" (&got[-1]));
- __asm __volatile("sync");
+ __asm volatile("fdc 0(%0)" :: "r" (&got[-2]));
+ __asm volatile("fdc 0(%0)" :: "r" (&got[-1]));
+ __asm volatile("sync");
+ __asm volatile("fic 0(%%sr0,%0)" :: "r" (&got[-2]));
+ __asm volatile("fic 0(%%sr0,%0)" :: "r" (&got[-1]));
+ __asm volatile("sync");
for (i = 0; i < numrela; i++, rela++) {
Elf_Addr *r_addr = (Elf_Addr *)(ooff + rela->r_offset);
-/* $OpenBSD: rtld_machine.c,v 1.37 2013/06/13 04:13:47 brad Exp $ */
+/* $OpenBSD: rtld_machine.c,v 1.38 2014/04/16 10:52:59 guenther Exp $ */
/*
* Copyright (c) 1999 Dale Rahn
#define NOP 0x01000000
where[2] = JMP | (value & 0x000003ff);
where[1] = SETHI | ((value >> 10) & 0x003fffff);
- __asm __volatile("iflush %0+8" : : "r" (where));
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+8" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
/*
* iflush requires 5 subsequent cycles to be sure all copies
* are flushed from the CPU and the icache.
*/
- __asm __volatile("nop;nop;nop;nop;nop");
+ __asm volatile("nop;nop;nop;nop;nop");
}
int
((Elf_Addr)&_dl_bind_start - (Elf_Addr)&pltgot[1]) >> 2;
pltgot[2] = NOP;
pltgot[3] = (Elf_Addr) object;
- __asm __volatile("iflush %0+8" : : "r" (pltgot));
- __asm __volatile("iflush %0+4" : : "r" (pltgot));
- __asm __volatile("iflush %0+0" : : "r" (pltgot));
+ __asm volatile("iflush %0+8" : : "r" (pltgot));
+ __asm volatile("iflush %0+4" : : "r" (pltgot));
+ __asm volatile("iflush %0+0" : : "r" (pltgot));
/*
* iflush requires 5 subsequent cycles to be sure all copies
* are flushed from the CPU and the icache.
*/
- __asm __volatile("nop;nop;nop;nop;nop");
+ __asm volatile("nop;nop;nop;nop;nop");
}
object->got_addr = 0;
-/* $OpenBSD: rtld_machine.c,v 1.51 2013/06/13 04:13:47 brad Exp $ */
+/* $OpenBSD: rtld_machine.c,v 1.52 2014/04/16 10:52:59 guenther Exp $ */
/*
* Copyright (c) 1999 Dale Rahn
*
*/
where[1] = BAA | (((offset-4) >> 2) &0x3fffff);
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
} else if (value < (1UL<<32)) {
/*
* We're within 32-bits of address zero.
*/
where[2] = JMP | LOVAL(value);
where[1] = SETHI | HIVAL(value, 10);
- __asm __volatile("iflush %0+8" : : "r" (where));
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+8" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
} else if (value > -(1UL<<32)) {
/*
where[3] = JMP;
where[2] = XOR | ((~value) & 0x00001fff);
where[1] = SETHI | HIVAL(~value, 10);
- __asm __volatile("iflush %0+12" : : "r" (where));
- __asm __volatile("iflush %0+8" : : "r" (where));
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+12" : : "r" (where));
+ __asm volatile("iflush %0+8" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
} else if ((int64_t)(offset-8) <= (1L<<31) &&
(int64_t)(offset-8) >= -((1L<<31) - 4)) {
*/
where[3] = MOV17;
where[2] = CALL | (((offset-8) >> 2) & 0x3fffffff);
- __asm __volatile("iflush %0+12" : : "r" (where));
- __asm __volatile("iflush %0+8" : : "r" (where));
+ __asm volatile("iflush %0+12" : : "r" (where));
+ __asm volatile("iflush %0+8" : : "r" (where));
where[1] = MOV71;
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
} else if (value < (1L<<42)) {
/*
where[3] = SLLX | 10;
where[2] = OR | LOVAL(value >> 10);
where[1] = SETHI | HIVAL(value, 20);
- __asm __volatile("iflush %0+16" : : "r" (where));
- __asm __volatile("iflush %0+12" : : "r" (where));
- __asm __volatile("iflush %0+8" : : "r" (where));
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+16" : : "r" (where));
+ __asm volatile("iflush %0+12" : : "r" (where));
+ __asm volatile("iflush %0+8" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
} else if (value > -(1UL<<41)) {
/*
where[2] = OR | LOVAL(value >> 10);
where[1] = SETHI | HIVAL(value, 20);
- __asm __volatile("iflush %0+16" : : "r" (where));
- __asm __volatile("iflush %0+12" : : "r" (where));
- __asm __volatile("iflush %0+8" : : "r" (where));
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+16" : : "r" (where));
+ __asm volatile("iflush %0+12" : : "r" (where));
+ __asm volatile("iflush %0+8" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
} else {
/*
where[3] = ORG5 | LOVAL(value >> 32);
where[2] = SETHI | HIVAL(value, 10);
where[1] = SETHIG5 | HIVAL(value, 42);
- __asm __volatile("iflush %0+24" : : "r" (where));
- __asm __volatile("iflush %0+20" : : "r" (where));
- __asm __volatile("iflush %0+16" : : "r" (where));
- __asm __volatile("iflush %0+12" : : "r" (where));
- __asm __volatile("iflush %0+8" : : "r" (where));
- __asm __volatile("iflush %0+4" : : "r" (where));
+ __asm volatile("iflush %0+24" : : "r" (where));
+ __asm volatile("iflush %0+20" : : "r" (where));
+ __asm volatile("iflush %0+16" : : "r" (where));
+ __asm volatile("iflush %0+12" : : "r" (where));
+ __asm volatile("iflush %0+8" : : "r" (where));
+ __asm volatile("iflush %0+4" : : "r" (where));
}
}