Move definitions for CNTV_CTL_EL0 to armreg.h.

ok mpi@, jsg@, phessler@, patrick@

diff --git a/sys/arch/arm64/dev/aplintc.c b/sys/arch/arm64/dev/aplintc.c
index d8c508b..01970a9 100644 (file)
--- a/sys/arch/arm64/dev/aplintc.c
+++ b/sys/arch/arm64/dev/aplintc.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: aplintc.c,v 1.15 2022/11/08 11:40:47 kettenis Exp $   */
+/*     $OpenBSD: aplintc.c,v 1.16 2022/11/08 14:01:13 kettenis Exp $   */
 /*
  * Copyright (c) 2021 Mark Kettenis
  *
@@ -22,6 +22,7 @@
 #include <sys/malloc.h>
 #include <sys/systm.h>
 
+#include <machine/armreg.h>
 #include <machine/bus.h>
 #include <machine/fdt.h>
 #include <machine/intr.h>
@@ -39,10 +40,6 @@
 #define APL_IPI_SR_EL1         s3_5_c15_c1_1
 #define  APL_IPI_SR_EL1_PENDING        (1 << 0)
 
-#define CNTV_CTL_ENABLE                (1 << 0)
-#define CNTV_CTL_IMASK         (1 << 1)
-#define CNTV_CTL_ISTATUS       (1 << 2)
-
 #define AIC_INFO               0x0004
 #define  AIC_INFO_NDIE(val)    (((val) >> 24) & 0xf)
 #define  AIC_INFO_NIRQ(val)    ((val) & 0xffff)

diff --git a/sys/arch/arm64/include/armreg.h b/sys/arch/arm64/include/armreg.h
index edcfba1..1ddc427 100644 (file)
--- a/sys/arch/arm64/include/armreg.h
+++ b/sys/arch/arm64/include/armreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: armreg.h,v 1.22 2022/10/04 19:36:20 kettenis Exp $ */
+/* $OpenBSD: armreg.h,v 1.23 2022/11/08 14:01:13 kettenis Exp $ */
 /*-
  * Copyright (c) 2013, 2014 Andrew Turner
  * Copyright (c) 2015 The FreeBSD Foundation
@@ -72,6 +72,11 @@
 /* CNTKCTL_EL1 - Counter-timer Kernel Control Register */
 #define        CNTKCTL_EL0VCTEN        (1 << 1) /* Allow EL0 virtual counter access */
 
+/* CNTV_CTL_EL0 */
+#define        CNTV_CTL_ENABLE         (1 << 0)
+#define        CNTV_CTL_IMASK          (1 << 1)
+#define        CNTV_CTL_ISTATUS        (1 << 2)
+
 /* CPACR_EL1 */
 #define        CPACR_FPEN_MASK         (0x3 << 20)
 #define         CPACR_FPEN_TRAP_ALL1   (0x0 << 20) /* Traps from EL0 and EL1 */