drm/amd/display: Enable new commit sequence only for DCN32x

From Rodrigo Siqueira
4efb2d22003f51cf188b68b2f2c5980c39eb2e22 in linux-6.1.y/6.1.43
7b36f4d18e3e4941d12fe027ad6ad6123c257027 in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c
index 226c17e..a457b87 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c
+++ b/sys/dev/pci/drm/amd/display/dc/core/amdgpu_dc.c
@@ -1913,11 +1913,57 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
        return result;
 }
 
+enum dc_status dc_commit_streams(struct dc *dc, struct dc_state *context)
+{
+       enum dc_status res = DC_OK;
+       int i;
+
+       if (!streams_changed(dc, context->streams, context->stream_count))
+               return res;
+
+       DC_LOG_DC("%s: %d streams\n",
+                               __func__, context->stream_count);
+
+       for (i = 0; i < context->stream_count; i++) {
+               struct dc_stream_state *stream = context->streams[i];
+
+               dc_stream_log(dc, stream);
+       }
+
+       /*
+        * Previous validation was perfomred with fast_validation = true and
+        * the full DML state required for hardware programming was skipped.
+        *
+        * Re-validate here to calculate these parameters / watermarks.
+        */
+       res = dc_validate_global_state(dc, context, false);
+       if (res != DC_OK) {
+               DC_LOG_ERROR("DC commit global validation failure: %s (%d)",
+                            dc_status_to_str(res), res);
+               return res;
+       }
+
+       res = dc_commit_state_no_check(dc, context);
+
+       return (res == DC_OK);
+}
+
+/* TODO: When the transition to the new commit sequence is done, remove this
+ * function in favor of dc_commit_streams. */
 bool dc_commit_state(struct dc *dc, struct dc_state *context)
 {
        enum dc_status result = DC_ERROR_UNEXPECTED;
        int i;
 
+       /* TODO: Since change commit sequence can have a huge impact,
+        * we decided to only enable it for DCN3x. However, as soon as
+        * we get more confident about this change we'll need to enable
+        * the new sequence for all ASICs. */
+       if (dc->ctx->dce_version >= DCN_VERSION_3_2) {
+               result = dc_commit_streams(dc, context);
+               return result == DC_OK;
+       }
+
        if (!streams_changed(dc, context->streams, context->stream_count))
                return DC_OK;
 

diff --git a/sys/dev/pci/drm/amd/display/dc/dc.h b/sys/dev/pci/drm/amd/display/dc/dc.h
index 9245c90..846c88c 100644 (file)
--- a/sys/dev/pci/drm/amd/display/dc/dc.h
+++ b/sys/dev/pci/drm/amd/display/dc/dc.h
@@ -1326,15 +1326,10 @@ void dc_resource_state_destruct(struct dc_state *context);
 
 bool dc_resource_is_dsc_encoding_supported(const struct dc *dc);
 
-/*
- * TODO update to make it about validation sets
- * Set up streams and links associated to drive sinks
- * The streams parameter is an absolute set of all active streams.
- *
- * After this call:
- *   Phy, Encoder, Timing Generator are programmed and enabled.
- *   New streams are enabled with blank stream; no memory read.
- */
+enum dc_status dc_commit_streams(struct dc *dc, struct dc_state *context);
+
+/* TODO: When the transition to the new commit sequence is done, remove this
+ * function in favor of dc_commit_streams. */
 bool dc_commit_state(struct dc *dc, struct dc_state *context);
 
 struct dc_state *dc_create_state(struct dc *dc);