-/* $OpenBSD: dz.c,v 1.14 2006/08/05 16:58:47 miod Exp $ */
+/* $OpenBSD: dz.c,v 1.15 2008/08/15 22:50:25 miod Exp $ */
/* $NetBSD: dz.c,v 1.23 2000/06/04 02:14:12 matt Exp $ */
/*
* Copyright (c) 1996 Ken C. Wellsch. All rights reserved.
#include <arch/vax/qbus/dzreg.h>
#include <arch/vax/qbus/dzvar.h>
-#define DZ_READ_BYTE(adr) \
- bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
-#define DZ_READ_WORD(adr) \
- bus_space_read_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
-#define DZ_WRITE_BYTE(adr, val) \
- bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
-#define DZ_WRITE_WORD(adr, val) \
- bus_space_write_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
-
-
/* Flags used to monitor modem bits, make them understood outside driver */
#define DML_DTR TIOCM_DTR
sc->sc_rxint = sc->sc_brk = 0;
sc->sc_dr.dr_tcrw = sc->sc_dr.dr_tcr;
- DZ_WRITE_WORD(dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE);
+ DZ_WRITE_WORD(sc, dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE);
dzdrain(sc);
- DZ_WRITE_BYTE(dr_dtr, 0);
- DZ_WRITE_BYTE(dr_break, 0);
+ DZ_WRITE_BYTE(sc, dr_dtr, 0);
+ DZ_WRITE_BYTE(sc, dr_break, 0);
/* Initialize our softc structure. Should be done in open? */
sc->sc_rxint++;
- while ((c = DZ_READ_WORD(dr_rbuf)) & DZ_RBUF_DATA_VALID) {
+ while ((c = DZ_READ_WORD(sc, dr_rbuf)) & DZ_RBUF_DATA_VALID) {
cc = c & 0xFF;
line = DZ_PORT(c>>8);
tp = sc->sc_dz[line].dz_tty;
if (c & DZ_RBUF_PARITY_ERR)
cc |= TTY_PE;
-#if defined(DDB) && (defined(VAX410) || defined(VAX43) || defined(VAX46) || defined(VAX48) || defined(VAX49) || defined(VAX53))
+#if defined(DDB) && (defined(VAX410) || defined(VAX43) || defined(VAX46) || defined(VAX48) || defined(VAX49) || defined(VAX53) || defined(VAX60))
if (tp->t_dev == cn_tab->cn_dev) {
int j = kdbrint(cc);
(*linesw[tp->t_line].l_rint)(27, tp);
}
#endif
+
(*linesw[tp->t_line].l_rint)(cc, tp);
}
}
* Remove the pdma stuff; no great need of it right now.
*/
- while (((csr = DZ_READ_WORD(dr_csr)) & DZ_CSR_TX_READY) != 0) {
+ while (((csr = DZ_READ_WORD(sc, dr_csr)) & DZ_CSR_TX_READY) != 0) {
line = DZ_PORT(csr>>8);
if (cl->c_cc) {
tp->t_state |= TS_BUSY;
ch = getc(cl);
- DZ_WRITE_BYTE(dr_tbuf, ch);
+ DZ_WRITE_BYTE(sc, dr_tbuf, ch);
continue;
}
/* Nothing to send; clear the scan bit */
/* Clear xmit scanner bit; dzstart may set it again */
- tcr = DZ_READ_WORD(dr_tcrw);
+ tcr = DZ_READ_WORD(sc, dr_tcrw);
tcr &= 255;
tcr &= ~(1 << line);
- DZ_WRITE_BYTE(dr_tcr, tcr);
+ DZ_WRITE_BYTE(sc, dr_tcr, tcr);
if (sc->sc_dz[line].dz_catch)
continue;
tp->t_state |= TS_BUSY;
- state = DZ_READ_WORD(dr_tcrw) & 255;
+ state = DZ_READ_WORD(sc, dr_tcrw) & 255;
if ((state & (1 << line)) == 0) {
- DZ_WRITE_BYTE(dr_tcr, state | (1 << line));
+ DZ_WRITE_BYTE(sc, dr_tcr, state | (1 << line));
}
dzxint(sc);
splx(s);
if (cflag & CSTOPB)
lpr |= DZ_LPR_2_STOP;
- DZ_WRITE_WORD(dr_lpr, lpr);
+ DZ_WRITE_WORD(sc, dr_lpr, lpr);
splx(s);
return (0);
/* external signals as seen from the port */
- status = DZ_READ_BYTE(dr_dcd) | sc->sc_dsr;
+ status = DZ_READ_BYTE(sc, dr_dcd) | sc->sc_dsr;
if (status & bit)
mbits |= DML_DCD;
- status = DZ_READ_BYTE(dr_ring);
+ status = DZ_READ_BYTE(sc, dr_ring);
if (status & bit)
mbits |= DML_RI;
/* internal signals/state delivered to port */
- status = DZ_READ_BYTE(dr_dtr);
+ status = DZ_READ_BYTE(sc, dr_dtr);
if (status & bit)
mbits |= DML_DTR;
}
if (mbits & DML_DTR) {
- DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) | bit);
+ DZ_WRITE_BYTE(sc, dr_dtr, DZ_READ_BYTE(sc, dr_dtr) | bit);
} else {
- DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) & ~bit);
+ DZ_WRITE_BYTE(sc, dr_dtr, DZ_READ_BYTE(sc, dr_dtr) & ~bit);
}
if (mbits & DML_BRK) {
sc->sc_brk |= bit;
- DZ_WRITE_BYTE(dr_break, sc->sc_brk);
+ DZ_WRITE_BYTE(sc, dr_break, sc->sc_brk);
} else {
sc->sc_brk &= ~bit;
- DZ_WRITE_BYTE(dr_break, sc->sc_brk);
+ DZ_WRITE_BYTE(sc, dr_break, sc->sc_brk);
}
splx(s);
tp = sc->sc_dz[port].dz_tty;
bit = (1 << port);
- if ((DZ_READ_BYTE(dr_dcd) | sc->sc_dsr) & bit) {
+ if ((DZ_READ_BYTE(sc, dr_dcd) | sc->sc_dsr) & bit) {
if (!(tp->t_state & TS_CARR_ON))
(*linesw[tp->t_line].l_modem) (tp, 1);
} else if ((tp->t_state & TS_CARR_ON) &&
(*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
- DZ_WRITE_BYTE(dr_tcr,
- (DZ_READ_WORD(dr_tcrw) & 255) & ~bit);
+ DZ_WRITE_BYTE(sc, dr_tcr,
+ (DZ_READ_WORD(sc, dr_tcrw) & 255) & ~bit);
}
}
* if off unless the rate is appropriately low.
*/
- csr = DZ_READ_WORD(dr_csr);
+ csr = DZ_READ_WORD(sc, dr_csr);
if (sc->sc_rxint > (16*10)) {
if ((csr & DZ_CSR_SAE) == 0)
- DZ_WRITE_WORD(dr_csr, csr | DZ_CSR_SAE);
+ DZ_WRITE_WORD(sc, dr_csr, csr | DZ_CSR_SAE);
} else if ((csr & DZ_CSR_SAE) != 0)
if (sc->sc_rxint < 10)
- DZ_WRITE_WORD(dr_csr, csr & ~(DZ_CSR_SAE));
+ DZ_WRITE_WORD(sc, dr_csr, csr & ~(DZ_CSR_SAE));
sc->sc_rxint = 0;
}
static void
dzdrain(struct dz_softc *sc)
{
- while (DZ_READ_WORD(dr_rbuf) & DZ_RBUF_DATA_VALID)
+ while (DZ_READ_WORD(sc, dr_rbuf) & DZ_RBUF_DATA_VALID)
/*EMPTY*/;
}
-/* $OpenBSD: dzvar.h,v 1.6 2004/07/07 23:10:46 deraadt Exp $ */
+/* $OpenBSD: dzvar.h,v 1.7 2008/08/15 22:50:25 miod Exp $ */
/* $NetBSD: dzvar.h,v 1.8 2000/06/04 02:14:12 matt Exp $ */
/*
* Copyright (c) 1996 Ken C. Wellsch. All rights reserved.
struct dz_softc {
struct device sc_dev; /* Autoconf blaha */
- struct evcount sc_rintrcnt; /* recevive interrupt counts */
+ struct evcount sc_rintrcnt; /* receive interrupt counts */
struct evcount sc_tintrcnt; /* transmit interrupt counts */
- int sc_rcvec, sc_tcvec;
+ int sc_rcvec, sc_tcvec; /* XXX used by attachment glue only */
struct dz_regs sc_dr; /* reg pointers */
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
void dzrint(void *);
void dzxint(void *);
void dzreset(struct device *);
+
+#define DZ_READ_BYTE(sc, adr) \
+ bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_dr.adr)
+#define DZ_READ_WORD(sc, adr) \
+ bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_dr.adr)
+#define DZ_WRITE_BYTE(sc, adr, val) \
+ bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_dr.adr, val)
+#define DZ_WRITE_WORD(sc, adr, val) \
+ bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_dr.adr, val)