Only enable PAE if the CPU we're running on has NX support. Without NX

support we're only wasting memory on the larger PAE page tables without
any real benefit.  This allows some simplifications of the low-level
assembly code.

ok mlarkin@, deraadt@

diff --git a/sys/arch/i386/i386/locore.s b/sys/arch/i386/i386/locore.s
index 1e8b4d1..cea9a84 100644 (file)
--- a/sys/arch/i386/i386/locore.s
+++ b/sys/arch/i386/i386/locore.s
@@ -1,4 +1,4 @@
-/*     $OpenBSD: locore.s,v 1.156 2015/04/25 21:31:24 guenther Exp $   */
+/*     $OpenBSD: locore.s,v 1.157 2015/04/26 09:48:29 kettenis Exp $   */
 /*     $NetBSD: locore.s,v 1.145 1996/05/03 19:41:19 christos Exp $    */
 
 /*-
@@ -1660,7 +1660,7 @@ ENTRY(i686_pagezero)
 ENTRY(cpu_paenable)
        movl    $-1, %eax
        testl   $CPUID_PAE, _C_LABEL(cpu_feature)
-       jz      2f
+       jz      1f
 
        pushl   %esi
        pushl   %edi
@@ -1677,21 +1677,9 @@ ENTRY(cpu_paenable)
        orl     $CR4_PAE, %eax
        movl    %eax, %cr4      /* BANG!!! */
 
-       movl    $MSR_EFER,%ecx
+       movl    $MSR_EFER, %ecx
        rdmsr
-       movl    %edx, %edi              # %edx is needed by wrmsr below
-
-       # Check if we need to enable NXE
-       movl    $0x80000001, %eax
-       cpuid
-       andl    $CPUID_NXE, %edx
-       xorl    %eax,%eax
-       testl   %edx, %edx
-       jz      1f
        orl     $EFER_NXE, %eax
-1:
-       movl    %edi, %edx              # Restore saved %edx
-       movl    $MSR_EFER,%ecx
        wrmsr
 
        movl    12(%esp), %eax
@@ -1703,7 +1691,7 @@ ENTRY(cpu_paenable)
        xorl    %eax, %eax
        popl    %edi
        popl    %esi
-2:
+1:
        ret
 
 /*

diff --git a/sys/arch/i386/i386/mptramp.s b/sys/arch/i386/i386/mptramp.s
index a6e80b8..3a5ca00 100644 (file)
--- a/sys/arch/i386/i386/mptramp.s
+++ b/sys/arch/i386/i386/mptramp.s
@@ -1,4 +1,4 @@
-/*     $OpenBSD: mptramp.s,v 1.16 2015/04/24 12:52:38 kettenis Exp $   */
+/*     $OpenBSD: mptramp.s,v 1.17 2015/04/26 09:48:29 kettenis Exp $   */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -170,19 +170,7 @@ _TRMP_LABEL(mp_startup)
        
        movl    $MSR_EFER,%ecx
        rdmsr
-       movl    %edx, %edi              # %edx is needed by wrmsr below
-
-       # Check if we need to enable NXE
-       movl    $0x80000001, %eax
-       cpuid
-       andl    $CPUID_NXE, %edx
-       xorl    %eax,%eax
-       testl   %edx, %edx
-       jz      1f
        orl     $EFER_NXE, %eax
-1:
-       movl    %edi, %edx              # Restore saved %edx
-       movl    $MSR_EFER,%ecx
        wrmsr
 
 nopae:

diff --git a/sys/arch/i386/i386/pmapae.c b/sys/arch/i386/i386/pmapae.c
index 44fab2f..28c7aa1 100644 (file)
--- a/sys/arch/i386/i386/pmapae.c
+++ b/sys/arch/i386/i386/pmapae.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: pmapae.c,v 1.35 2015/04/24 19:41:58 kettenis Exp $    */
+/*     $OpenBSD: pmapae.c,v 1.36 2015/04/26 09:48:29 kettenis Exp $    */
 
 /*
  * Copyright (c) 2006-2008 Michael Shalayeff
@@ -411,6 +411,8 @@
 typedef u_int64_t pd_entry_t;          /* PDE */
 typedef u_int64_t pt_entry_t;          /* PTE */
 
+#define PG_NX  0x8000000000000000ULL   /* execute-disable */
+
 /*
  * Number of PTEs per cache line. 8 byte pte, 64-byte cache line
  * Used to avoid false sharing of cache lines.
@@ -423,7 +425,6 @@ typedef u_int64_t pt_entry_t;               /* PTE */
 
 extern u_int32_t protection_codes[];   /* maps MI prot to i386 prot code */
 extern boolean_t pmap_initialized;     /* pmap_init done yet? */
-pt_entry_t pg_nx;
 
 /*
  * MULTIPROCESSOR: special VA's/ PTE's are actually allocated inside a
@@ -581,7 +582,7 @@ pmap_pte_paddr_pae(vaddr_t va)
  * Switch over to PAE page tables
  */
 void
-pmap_bootstrap_pae()
+pmap_bootstrap_pae(void)
 {
        extern int cpu_pae, nkpde;
        struct pmap *kpm = pmap_kernel();
@@ -591,13 +592,11 @@ pmap_bootstrap_pae()
        vaddr_t va, eva;
        int i, pn, pe;
 
-       if (!(cpu_feature & CPUID_PAE)){
+       if ((cpu_feature & CPUID_PAE) == 0 ||
+           (ecpu_feature & CPUID_NXE) == 0)
                return;
-       }
 
        cpu_pae = 1;
-       if (ecpu_feature & CPUID_NXE)
-               pg_nx = (1ULL << 63);
 
        va = (vaddr_t)kpm->pm_pdir;
        kpm->pm_pdidx[0] = (va + 0*NBPG - KERNBASE) | PG_V;
@@ -1353,7 +1352,7 @@ pmap_write_protect_pae(struct pmap *pmap, vaddr_t sva, vaddr_t eva,
 
                md_prot = protection_codes[prot];
                if (!(prot & PROT_EXEC))
-                       md_prot |= pg_nx;
+                       md_prot |= PG_NX;
                if (va < VM_MAXUSER_ADDRESS)
                        md_prot |= PG_u;
                else if (va < VM_MAX_ADDRESS)
@@ -1610,7 +1609,7 @@ enter_now:
 
        npte = pa | protection_codes[prot] | PG_V;
        if (!(prot & PROT_EXEC))
-               npte |= pg_nx;
+               npte |= PG_NX;
        pmap_exec_account(pmap, va, opte, npte);
        if (wired)
                npte |= PG_W;