drm/i915: Add Wa_14019877138
authorjsg <jsg@openbsd.org>
Fri, 14 Jun 2024 05:28:34 +0000 (05:28 +0000)
committerjsg <jsg@openbsd.org>
Fri, 14 Jun 2024 05:28:34 +0000 (05:28 +0000)
From Haridhar Kalvala
97bb5e691189d342fc617dc0f1ab3e51a3676602 in mainline linux

sys/dev/pci/drm/i915/gt/intel_gt_regs.h
sys/dev/pci/drm/i915/gt/intel_workarounds.c

index 64dca60..9e147ea 100644 (file)
 #define XEHP_PSS_MODE2                         MCR_REG(0x703c)
 #define   SCOREBOARD_STALL_FLUSH_CONTROL       REG_BIT(5)
 
+#define XEHP_PSS_CHICKEN                       MCR_REG(0x7044)
+#define   FD_END_COLLECT                       REG_BIT(5)
+
 #define GEN7_SC_INSTDONE                       _MMIO(0x7100)
 #define GEN12_SC_INSTDONE_EXTRA                        _MMIO(0x7104)
 #define GEN12_SC_INSTDONE_EXTRA2               _MMIO(0x7108)
index 8fbb068..a2401cd 100644 (file)
@@ -781,6 +781,9 @@ static void dg2_ctx_workarounds_init(struct intel_engine_cs *engine,
 
        /* Wa_18019271663:dg2 */
        wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
+
+       /* Wa_14019877138:dg2 */
+       wa_mcr_masked_en(wal, XEHP_PSS_CHICKEN, FD_END_COLLECT);
 }
 
 static void xelpg_ctx_gt_tuning_init(struct intel_engine_cs *engine,