Use an iorw fence since we're syncing cpu access and device access to

memory.

ok miod@

diff --git a/sys/arch/riscv64/riscv64/bus_dma.c b/sys/arch/riscv64/riscv64/bus_dma.c
index 08935d2..7659eb5 100644 (file)
--- a/sys/arch/riscv64/riscv64/bus_dma.c
+++ b/sys/arch/riscv64/riscv64/bus_dma.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: bus_dma.c,v 1.5 2021/05/14 06:48:52 jsg Exp $ */
+/*     $OpenBSD: bus_dma.c,v 1.6 2022/12/29 11:30:58 kettenis Exp $    */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -401,7 +401,7 @@ _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
         * and return.
         */
        if (t->_flags & BUS_DMA_COHERENT) {
-               membar_sync();
+               __asm volatile ("fence iorw,iorw" ::: "memory");
                return;
        }