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drm/amdgpu: mmVM_L2_CNTL3 register not initialized correctly
author
jsg
<jsg@openbsd.org>
Fri, 16 Sep 2022 02:24:23 +0000
(
02:24
+0000)
committer
jsg
<jsg@openbsd.org>
Fri, 16 Sep 2022 02:24:23 +0000
(
02:24
+0000)
From Qu Huang
ad5ef763dbbea8193bd2095a1401aeac6e8f74e8
in linux 5.15.y/5.15.68
b8983d42524f10ac6bf35bbce6a7cc8e45f61e04
in mainline linux
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c
patch
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diff --git
a/sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c
b/sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c
index
b3bede1
..
4259f62
100644
(file)
--- a/
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c
@@
-176,6
+176,7
@@
static void mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp);
+ tmp = mmVM_L2_CNTL3_DEFAULT;
if (adev->gmc.translate_further) {
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3,