amd64: identify IBT capability in cpu(4) dmesg lines

requested by and ok deraadt@

diff --git a/sys/arch/amd64/amd64/identcpu.c b/sys/arch/amd64/amd64/identcpu.c
index 5ed23d6..2c18350 100644 (file)
--- a/sys/arch/amd64/amd64/identcpu.c
+++ b/sys/arch/amd64/amd64/identcpu.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: identcpu.c,v 1.131 2023/01/14 03:28:51 jsg Exp $      */
+/*     $OpenBSD: identcpu.c,v 1.132 2023/03/26 18:12:45 mlarkin Exp $  */
 /*     $NetBSD: identcpu.c,v 1.1 2003/04/26 18:39:28 fvdl Exp $        */
 
 /*
@@ -216,6 +216,7 @@ const struct {
        { SEFF0EDX_SRBDS_CTRL,  "SRBDS_CTRL" },
        { SEFF0EDX_MD_CLEAR,    "MD_CLEAR" },
        { SEFF0EDX_TSXFA,       "TSXFA" },
+       { SEFF0EDX_IBT,         "IBT" },
        { SEFF0EDX_IBRS,        "IBRS,IBPB" },
        { SEFF0EDX_STIBP,       "STIBP" },
        { SEFF0EDX_L1DF,        "L1DF" },

diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h
index 862f1f6..2dee8d1 100644 (file)
--- a/sys/arch/amd64/include/specialreg.h
+++ b/sys/arch/amd64/include/specialreg.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: specialreg.h,v 1.98 2023/01/14 03:28:51 jsg Exp $     */
+/*     $OpenBSD: specialreg.h,v 1.99 2023/03/26 18:12:45 mlarkin Exp $ */
 /*     $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $      */
 /*     $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $  */
 
@@ -221,6 +221,7 @@
 #define SEFF0EDX_SRBDS_CTRL    0x00000200 /* MCU_OPT_CTRL MSR */
 #define SEFF0EDX_MD_CLEAR      0x00000400 /* Microarch Data Clear */
 #define SEFF0EDX_TSXFA         0x00002000 /* TSX Forced Abort */
+#define SEFF0EDX_IBT           0x00100000 /* Indirect Branch Tracking */
 #define SEFF0EDX_IBRS          0x04000000 /* IBRS / IBPB Speculation Control */
 #define SEFF0EDX_STIBP         0x08000000 /* STIBP Speculation Control */
 #define SEFF0EDX_L1DF          0x10000000 /* L1D_FLUSH */