-/* $OpenBSD: pcireg.h,v 1.46 2014/04/09 06:36:33 dlg Exp $ */
+/* $OpenBSD: pcireg.h,v 1.47 2014/04/27 14:55:09 stsp Exp $ */
/* $NetBSD: pcireg.h,v 1.26 2000/05/10 16:58:42 thorpej Exp $ */
/*
* Power Management Control Status Register; access via capability pointer.
*/
#define PCI_PMCSR 0x04
-#define PCI_PMCSR_STATE_MASK 0x03
-#define PCI_PMCSR_STATE_D0 0x00
-#define PCI_PMCSR_STATE_D1 0x01
-#define PCI_PMCSR_STATE_D2 0x02
-#define PCI_PMCSR_STATE_D3 0x03
+#define PCI_PMCSR_STATE_MASK 0x0003
+#define PCI_PMCSR_STATE_D0 0x0000
+#define PCI_PMCSR_STATE_D1 0x0001
+#define PCI_PMCSR_STATE_D2 0x0002
+#define PCI_PMCSR_STATE_D3 0x0003
+#define PCI_PMCSR_PME_STATUS 0x8000
+#define PCI_PMCSR_PME_EN 0x0100
/*
* HyperTransport; access via capability pointer.