-/* $OpenBSD: atomic.h,v 1.1 2010/09/20 06:32:30 syuu Exp $ */
-/* public domain */
+/* $OpenBSD: atomic.h,v 1.2 2018/01/08 13:44:43 visa Exp $ */
+
+/*
+ * Copyright (c) 2017 Visa Hankala
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _OCTEON_ATOMIC_H_
+#define _OCTEON_ATOMIC_H_
+
+#ifdef _KERNEL
+
+static inline void
+octeon_syncw(void)
+{
+ __asm__ volatile (
+ " .set push\n"
+ " .set arch=octeon\n"
+ /* Issue the barrier twice to work around CN3xxx erratum Core-401.
+ * A single syncw might not enforce write ordering properly. */
+ " syncw\n"
+ " syncw\n"
+ " .set pop\n"
+ : : : "memory");
+}
+
+#define membar_producer() octeon_syncw()
+
+#endif /* _KERNEL */
+
#include <mips64/atomic.h>
+
+#endif /* !_OCTEON_ATOMIC_H_ */