Hibernate on IBT-capable MP systems broke when trying to quiesce
cpus. Instead of finding the locations of endbr64 in the asm indirect
jumps in acpi_wakecode.S, simply disable CR4.CET beforehand and
re-enable on resume.
This will also disable shadowstack, but there are no plans to use it.
"this approach is fine" deraadt@
-/* $OpenBSD: acpi_machdep.c,v 1.106 2022/11/08 17:34:12 cheloha Exp $ */
+/* $OpenBSD: acpi_machdep.c,v 1.107 2023/04/24 09:04:03 dv Exp $ */
/*
* Copyright (c) 2005 Thorsten Lockert <tholo@sigmasoft.com>
*
return (ECANCELED);
}
/* Resume path */
+ if (curcpu()->ci_feature_sefflags_edx & SEFF0EDX_IBT)
+ lcr4(rcr4() | CR4_CET);
fpureset();
/* Reset the vectors */
-/* $OpenBSD: cpu.c,v 1.167 2023/04/22 18:27:28 guenther Exp $ */
+/* $OpenBSD: cpu.c,v 1.168 2023/04/24 09:04:03 dv Exp $ */
/* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */
/*-
delay(10);
#ifdef HIBERNATE
if ((ci->ci_flags & CPUF_PARK) != 0) {
+ if (ci->ci_feature_sefflags_edx & SEFF0EDX_IBT)
+ lcr4(rcr4() & ~CR4_CET);
atomic_clearbits_int(&ci->ci_flags, CPUF_PARK);
hibernate_drop_to_real_mode();
}
-/* $OpenBSD: hibernate_machdep.c,v 1.49 2022/09/02 09:02:37 mlarkin Exp $ */
+/* $OpenBSD: hibernate_machdep.c,v 1.50 2023/04/24 09:04:03 dv Exp $ */
/*
* Copyright (c) 2012 Mike Larkin <mlarkin@openbsd.org>
pmap_kenter_pa(ACPI_TRAMP_DATA, ACPI_TRAMP_DATA,
PROT_READ | PROT_WRITE);
+ if (curcpu()->ci_feature_sefflags_edx & SEFF0EDX_IBT)
+ lcr4(rcr4() & ~CR4_CET);
+
for (i = 0; i < MAXCPUS; i++) {
ci = cpu_info[i];
if (ci == NULL)