-/* $OpenBSD: pte.h,v 1.16 2024/03/29 21:06:14 miod Exp $ */
+/* $OpenBSD: pte.h,v 1.17 2024/04/14 19:08:09 miod Exp $ */
/* $NetBSD: pte.h,v 1.7 2001/07/31 06:55:46 eeh Exp $ */
/*
typedef struct sun4u_tte pte_t;
/* Assembly routine to flush a mapping */
-extern void sp_tlb_flush_pte(vaddr_t addr, int ctx);
-extern void sp_tlb_flush_ctx(int ctx);
+extern void (*sp_tlb_flush_pte)(vaddr_t, uint64_t);
+extern void (*sp_tlb_flush_ctx)(uint64_t);
#if defined(MULTIPROCESSOR)
-void smp_tlb_flush_pte(vaddr_t, int);
-void smp_tlb_flush_ctx(int);
+void smp_tlb_flush_pte(vaddr_t, uint64_t);
+void smp_tlb_flush_ctx(uint64_t);
#define tlb_flush_pte(va,ctx) smp_tlb_flush_pte(va, ctx)
#define tlb_flush_ctx(ctx) smp_tlb_flush_ctx(ctx)
#else
-#define tlb_flush_pte(va,ctx) sp_tlb_flush_pte(va, ctx)
-#define tlb_flush_ctx(ctx) sp_tlb_flush_ctx(ctx)
+#define tlb_flush_pte(va,ctx) (*sp_tlb_flush_pte)(va, ctx)
+#define tlb_flush_ctx(ctx) (*sp_tlb_flush_ctx)(ctx)
#endif
#endif /* _LOCORE */
-/* $OpenBSD: autoconf.c,v 1.148 2024/04/08 19:59:28 miod Exp $ */
+/* $OpenBSD: autoconf.c,v 1.149 2024/04/14 19:08:09 miod Exp $ */
/* $NetBSD: autoconf.c,v 1.51 2001/07/24 19:32:11 eeh Exp $ */
/*
void sun4v_sdio_init(void);
#endif
+extern void us_tlb_flush_pte(vaddr_t, uint64_t);
+extern void us3_tlb_flush_pte(vaddr_t, uint64_t);
+extern void sun4v_tlb_flush_pte(vaddr_t, uint64_t);
+extern void us_tlb_flush_ctx(uint64_t);
+extern void us3_tlb_flush_ctx(uint64_t);
+extern void sun4v_tlb_flush_ctx(uint64_t);
+
+void (*sp_tlb_flush_pte)(vaddr_t, uint64_t) = us_tlb_flush_pte;
+void (*sp_tlb_flush_ctx)(uint64_t) = us_tlb_flush_ctx;
+
#ifdef DEBUG
#define ACDB_BOOTDEV 0x1
#define ACDB_PROBE 0x2
}
cacheinfo.c_dcache_flush_page = us3_dcache_flush_page;
+ sp_tlb_flush_pte = us3_tlb_flush_pte;
+ sp_tlb_flush_ctx = us3_tlb_flush_ctx;
}
if ((impl >= IMPL_ZEUS && impl <= IMPL_JUPITER) || CPU_ISSUN4V) {
#ifdef SUN4V
if (CPU_ISSUN4V) {
- u_int32_t insn;
- int32_t disp;
-
- disp = (vaddr_t)hv_mmu_demap_page - (vaddr_t)sp_tlb_flush_pte;
- insn = 0x10800000 | disp >> 2; /* ba hv_mmu_demap_page */
- ((u_int32_t *)sp_tlb_flush_pte)[0] = insn;
- insn = 0x94102003; /* mov MAP_ITLB|MAP_DTLB, %o2 */
- ((u_int32_t *)sp_tlb_flush_pte)[1] = insn;
-
- disp = (vaddr_t)hv_mmu_demap_ctx - (vaddr_t)sp_tlb_flush_ctx;
- insn = 0x10800000 | disp >> 2; /* ba hv_mmu_demap_ctx */
- ((u_int32_t *)sp_tlb_flush_ctx)[0] = insn;
- insn = 0x92102003; /* mov MAP_ITLB|MAP_DTLB, %o1 */
- ((u_int32_t *)sp_tlb_flush_ctx)[1] = insn;
-
- {
struct sun4v_patch {
u_int32_t addr;
u_int32_t insn;
flush((void *)(vaddr_t)p->addr);
}
#endif
- }
+ sp_tlb_flush_pte = sun4v_tlb_flush_pte;
+ sp_tlb_flush_ctx = sun4v_tlb_flush_ctx;
}
#endif
-/* $OpenBSD: locore.s,v 1.222 2024/04/08 20:09:18 miod Exp $ */
+/* $OpenBSD: locore.s,v 1.223 2024/04/14 19:08:09 miod Exp $ */
/* $NetBSD: locore.s,v 1.137 2001/08/13 06:10:10 jdolecek Exp $ */
/*
* @(#)locore.s 8.4 (Berkeley) 12/10/93
*/
-#define HORRID_III_HACK
-
.register %g2,
.register %g3,
.endm
.macro KCLEANWIN
- clr %l0
#ifdef DEBUG
set 0xbadbeef, %l0 ! DEBUG
+#else
+ clr %l0
#endif /* DEBUG */
mov %l0, %l1; mov %l0, %l2 ! 024-027 = clean window trap
rdpr %cleanwin, %o7 ! This handler is in-lined and cannot fault
* Finally, we may now call C code.
*
* This macro will destroy %g5-%g7. %g0-%g4 remain unchanged.
- *
- * In order to properly handle nested traps without lossage, alternate
- * global %g6 is used as a kernel stack pointer. It is set to the last
- * allocated stack pointer (trapframe) and the old value is stored in
- * tf_kstack. It is restored when returning from a trap. It is cleared
- * on entering user mode.
*/
/*
#ifdef SUN4V
/*
- * Perform an inline pseg_get(), to retrieve the pte associated to the given
- * virtual address.
+ * Perform an inline pseg_get(), to retrieve the address of the PTE associated
+ * to the given virtual address.
* On entry: %g3 = va (won't be modified), %g6 = context
* Registers used: %g4,%g5, %g6
* Branches to the "failure" label if translation invalid, otherwise ends
nop
NOTREACHED
-#endif
+ .align 8
+NENTRY(sun4v_tlb_flush_pte)
+ ba hv_mmu_demap_page
+ mov MAP_ITLB|MAP_DTLB, %o2
+END(sun4v_tlb_flush_pte)
+
+ .align 8
+NENTRY(sun4v_tlb_flush_ctx)
+ ba hv_mmu_demap_ctx
+ mov MAP_ITLB|MAP_DTLB, %o1
+END(sun4v_tlb_flush_ctx)
+
+#endif /* SUN4V */
/*
* We're here because we took an alignment fault in NUCLEUS context.
*
*/
.align 8
-NENTRY(sp_tlb_flush_pte)
-#ifdef HORRID_III_HACK
+NENTRY(us_tlb_flush_pte)
+ mov CTX_SECONDARY, %o2
+ andn %o0, 0xfff, %g2 ! drop unused va bits
+ ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
+ sethi %hi(KERNBASE), %o4
+ membar #LoadStore
+ stxa %o1, [%o2] ASI_DMMU ! Insert context to demap
+ membar #Sync
+ or %g2, DEMAP_PAGE_SECONDARY, %g2 ! Demap page from secondary context only
+ stxa %g0, [%g2] ASI_DMMU_DEMAP ! Do the demap
+ stxa %g0, [%g2] ASI_IMMU_DEMAP ! to both TLBs
+ membar #Sync ! No real reason for this XXXX
+ flush %o4
+ stxa %g1, [%o2] ASI_DMMU ! Restore asi
+ membar #Sync ! No real reason for this XXXX
+ flush %o4
+ retl
+ nop
+END(us_tlb_flush_pte)
+
+ .align 8
+NENTRY(us3_tlb_flush_pte)
rdpr %pstate, %o5
andn %o5, PSTATE_IE, %o4
wrpr %o4, %pstate ! disable interrupts
stxa %o1, [%o2] ASI_DMMU ! Insert context to demap
membar #Sync
or %g2, DEMAP_PAGE_PRIMARY, %g2 ! Demap page from primary context only
-#else
- mov CTX_SECONDARY, %o2
- andn %o0, 0xfff, %g2 ! drop unused va bits
- ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
- sethi %hi(KERNBASE), %o4
- membar #LoadStore
- stxa %o1, [%o2] ASI_DMMU ! Insert context to demap
- membar #Sync
- or %g2, DEMAP_PAGE_SECONDARY, %g2 ! Demap page from secondary context only
-#endif
- stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
- membar #Sync
- stxa %g2, [%g2] ASI_IMMU_DEMAP ! to both TLBs
+ stxa %g0, [%g2] ASI_DMMU_DEMAP ! Do the demap
+ stxa %g0, [%g2] ASI_IMMU_DEMAP ! to both TLBs
membar #Sync ! No real reason for this XXXX
flush %o4
stxa %g1, [%o2] ASI_DMMU ! Restore asi
membar #Sync ! No real reason for this XXXX
flush %o4
-#ifdef HORRID_III_HACK
wrpr %g0, %o3, %tl ! Restore traplevel
wrpr %o5, %pstate ! Restore interrupts
-#endif
retl
nop
-END(sp_tlb_flush_pte)
+END(us_tlb_flush_pte)
/*
* tlb_flush_ctx(int ctx)
*
*/
.align 8
-NENTRY(sp_tlb_flush_ctx)
-#ifdef HORRID_III_HACK
+NENTRY(us_tlb_flush_ctx)
+ mov CTX_SECONDARY, %o2
+ sethi %hi(KERNBASE), %o4
+ ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
+ membar #LoadStore
+ stxa %o0, [%o2] ASI_DMMU ! Insert context to demap
+ membar #Sync
+ set DEMAP_CTX_SECONDARY, %g2 ! Demap context from secondary context only
+ stxa %g0, [%g2] ASI_DMMU_DEMAP ! Do the demap
+ stxa %g0, [%g2] ASI_IMMU_DEMAP ! Do the demap
+ membar #Sync
+ stxa %g1, [%o2] ASI_DMMU ! Restore secondary asi
+ membar #Sync ! No real reason for this XXXX
+ flush %o4
+ retl
+ nop
+END(us_tlb_flush_ctx)
+
+ .align 8
+NENTRY(us3_tlb_flush_ctx)
rdpr %pstate, %o5
andn %o5, PSTATE_IE, %o4
wrpr %o4, %pstate ! disable interrupts
stxa %o0, [%o2] ASI_DMMU ! Insert context to demap
membar #Sync
set DEMAP_CTX_PRIMARY, %g2 ! Demap context from primary context only
-#else
- mov CTX_SECONDARY, %o2
- sethi %hi(KERNBASE), %o4
- ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
- membar #LoadStore
- stxa %o0, [%o2] ASI_DMMU ! Insert context to demap
- membar #Sync
- set DEMAP_CTX_SECONDARY, %g2 ! Demap context from secondary context only
-#endif
- stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
- membar #Sync ! No real reason for this XXXX
- stxa %g2, [%g2] ASI_IMMU_DEMAP ! Do the demap
+ stxa %g0, [%g2] ASI_DMMU_DEMAP ! Do the demap
+ stxa %g0, [%g2] ASI_IMMU_DEMAP ! Do the demap
membar #Sync
stxa %g1, [%o2] ASI_DMMU ! Restore secondary asi
membar #Sync ! No real reason for this XXXX
flush %o4
-#ifdef HORRID_III_HACK
wrpr %g0, %o3, %tl ! Restore traplevel
wrpr %o5, %pstate ! Restore interrupts
-#endif
retl
nop
-END(sp_tlb_flush_ctx)
+END(us3_tlb_flush_ctx)
/*
* dcache_flush_page(paddr_t pa)