drm/i915: Don't explode when the dig port we don't have an AUX CH

From Ville Syrjala
e21fee1035b9172fb7dc0e77692df7ebdbfce425 in linux-6.6.y/6.6.24
0b385be4c3ccd5636441923d7cad5eda6b4651cb in mainline linux

diff --git a/sys/dev/pci/drm/i915/display/intel_display_power_well.c b/sys/dev/pci/drm/i915/display/intel_display_power_well.c
index 9e13a8e..2c0ff79 100644 (file)
--- a/sys/dev/pci/drm/i915/display/intel_display_power_well.c
+++ b/sys/dev/pci/drm/i915/display/intel_display_power_well.c
@@ -246,7 +246,14 @@ static enum phy icl_aux_pw_to_phy(struct drm_i915_private *i915,
        enum aux_ch aux_ch = icl_aux_pw_to_ch(power_well);
        struct intel_digital_port *dig_port = aux_ch_to_digital_port(i915, aux_ch);
 
-       return intel_port_to_phy(i915, dig_port->base.port);
+       /*
+        * FIXME should we care about the (VBT defined) dig_port->aux_ch
+        * relationship or should this be purely defined by the hardware layout?
+        * Currently if the port doesn't appear in the VBT, or if it's declared
+        * as HDMI-only and routed to a combo PHY, the encoder either won't be
+        * present at all or it will not have an aux_ch assigned.
+        */
+       return dig_port ? intel_port_to_phy(i915, dig_port->base.port) : PHY_NONE;
 }
 
 static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
@@ -414,7 +421,8 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
 
        intel_de_rmw(dev_priv, regs->driver, 0, HSW_PWR_WELL_CTL_REQ(pw_idx));
 
-       if (DISPLAY_VER(dev_priv) < 12)
+       /* FIXME this is a mess */
+       if (phy != PHY_NONE)
                intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),
                             0, ICL_LANE_ENABLE_AUX);
 
@@ -437,7 +445,10 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
 
        drm_WARN_ON(&dev_priv->drm, !IS_ICELAKE(dev_priv));
 
-       intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy), ICL_LANE_ENABLE_AUX, 0);
+       /* FIXME this is a mess */
+       if (phy != PHY_NONE)
+               intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),
+                            ICL_LANE_ENABLE_AUX, 0);
 
        intel_de_rmw(dev_priv, regs->driver, HSW_PWR_WELL_CTL_REQ(pw_idx), 0);