drm/i915/gt: Cleanup aux invalidation registers

From Andi Shyti
37f6073f7db329c9db4357f82e565958fb64ea16 in linux-6.1.y/6.1.45
d14560ac1b595aa2e792365e91fea6aeaee66c2b in mainline linux

diff --git a/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c b/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c
index e49fa6f..b283873 100644 (file)
--- a/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c
+++ b/sys/dev/pci/drm/i915/gt/gen8_engine_cs.c
@@ -256,8 +256,8 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
 
                if (!HAS_FLAT_CCS(rq->engine->i915)) {
                        /* hsdes: 1809175790 */
-                       cs = gen12_emit_aux_table_inv(rq->engine->gt,
-                                                     cs, GEN12_GFX_CCS_AUX_NV);
+                       cs = gen12_emit_aux_table_inv(rq->engine->gt, cs,
+                                                     GEN12_CCS_AUX_INV);
                }
 
                *cs++ = preparser_disable(false);
@@ -317,10 +317,10 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
        if (aux_inv) { /* hsdes: 1809175790 */
                if (rq->engine->class == VIDEO_DECODE_CLASS)
                        cs = gen12_emit_aux_table_inv(rq->engine->gt,
-                                                     cs, GEN12_VD0_AUX_NV);
+                                                     cs, GEN12_VD0_AUX_INV);
                else
                        cs = gen12_emit_aux_table_inv(rq->engine->gt,
-                                                     cs, GEN12_VE0_AUX_NV);
+                                                     cs, GEN12_VE0_AUX_INV);
        }
 
        if (mode & EMIT_INVALIDATE)

diff --git a/sys/dev/pci/drm/i915/gt/intel_gt_regs.h b/sys/dev/pci/drm/i915/gt/intel_gt_regs.h
index 2275ee4..dd00656 100644 (file)
--- a/sys/dev/pci/drm/i915/gt/intel_gt_regs.h
+++ b/sys/dev/pci/drm/i915/gt/intel_gt_regs.h
@@ -301,9 +301,11 @@
 #define GEN8_PRIVATE_PAT_HI                    _MMIO(0x40e0 + 4)
 #define GEN10_PAT_INDEX(index)                 _MMIO(0x40e0 + (index) * 4)
 #define BSD_HWS_PGA_GEN7                       _MMIO(0x4180)
-#define GEN12_GFX_CCS_AUX_NV                   _MMIO(0x4208)
-#define GEN12_VD0_AUX_NV                       _MMIO(0x4218)
-#define GEN12_VD1_AUX_NV                       _MMIO(0x4228)
+
+#define GEN12_CCS_AUX_INV                      _MMIO(0x4208)
+#define GEN12_VD0_AUX_INV                      _MMIO(0x4218)
+#define GEN12_VE0_AUX_INV                      _MMIO(0x4238)
+#define GEN12_BCS0_AUX_INV                     _MMIO(0x4248)
 
 #define GEN8_RTCR                              _MMIO(0x4260)
 #define GEN8_M1TCR                             _MMIO(0x4264)
@@ -311,14 +313,12 @@
 #define GEN8_BTCR                              _MMIO(0x426c)
 #define GEN8_VTCR                              _MMIO(0x4270)
 
-#define GEN12_VD2_AUX_NV                       _MMIO(0x4298)
-#define GEN12_VD3_AUX_NV                       _MMIO(0x42a8)
-#define GEN12_VE0_AUX_NV                       _MMIO(0x4238)
-
 #define BLT_HWS_PGA_GEN7                       _MMIO(0x4280)
 
-#define GEN12_VE1_AUX_NV                       _MMIO(0x42b8)
+#define GEN12_VD2_AUX_INV                      _MMIO(0x4298)
+#define GEN12_CCS0_AUX_INV                     _MMIO(0x42c8)
 #define   AUX_INV                              REG_BIT(0)
+
 #define VEBOX_HWS_PGA_GEN7                     _MMIO(0x4380)
 
 #define GEN12_AUX_ERR_DBG                      _MMIO(0x43f4)

diff --git a/sys/dev/pci/drm/i915/gt/intel_lrc.c b/sys/dev/pci/drm/i915/gt/intel_lrc.c
index c62235d..81ceb5e 100644 (file)
--- a/sys/dev/pci/drm/i915/gt/intel_lrc.c
+++ b/sys/dev/pci/drm/i915/gt/intel_lrc.c
@@ -1304,7 +1304,7 @@ gen12_emit_indirect_ctx_rcs(const struct intel_context *ce, u32 *cs)
        /* hsdes: 1809175790 */
        if (!HAS_FLAT_CCS(ce->engine->i915))
                cs = gen12_emit_aux_table_inv(ce->engine->gt,
-                                             cs, GEN12_GFX_CCS_AUX_NV);
+                                             cs, GEN12_CCS_AUX_INV);
 
        /* Wa_16014892111 */
        if (IS_DG2(ce->engine->i915))
@@ -1331,10 +1331,10 @@ gen12_emit_indirect_ctx_xcs(const struct intel_context *ce, u32 *cs)
        if (!HAS_FLAT_CCS(ce->engine->i915)) {
                if (ce->engine->class == VIDEO_DECODE_CLASS)
                        cs = gen12_emit_aux_table_inv(ce->engine->gt,
-                                                     cs, GEN12_VD0_AUX_NV);
+                                                     cs, GEN12_VD0_AUX_INV);
                else if (ce->engine->class == VIDEO_ENHANCEMENT_CLASS)
                        cs = gen12_emit_aux_table_inv(ce->engine->gt,
-                                                     cs, GEN12_VE0_AUX_NV);
+                                                     cs, GEN12_VE0_AUX_INV);
        }
 
        return cs;