change names to not conflict with omap intc

From Patrick Wildt in bitrig

diff --git a/sys/arch/armv7/sunxi/a1xintc.c b/sys/arch/armv7/sunxi/a1xintc.c
index f46c42a..b316d7b 100644 (file)
--- a/sys/arch/armv7/sunxi/a1xintc.c
+++ b/sys/arch/armv7/sunxi/a1xintc.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: a1xintc.c,v 1.4 2014/07/12 18:44:41 tedu Exp $        */
+/*     $OpenBSD: a1xintc.c,v 1.5 2015/05/19 06:09:35 jsg Exp $ */
 /*
  * Copyright (c) 2007,2009 Dale Rahn <drahn@openbsd.org>
  * Copyright (c) 2013 Artturi Alm
@@ -31,9 +31,9 @@
 #include <armv7/sunxi/a1xintc.h>
 
 #ifdef DEBUG_INTC
-#define DPRINTF(x)     do { if (intcdebug) printf x; } while (0)
-#define DPRINTFN(n,x)  do { if (intcdebug>(n)) printf x; } while (0)
-int    intcdebug = 10;
+#define DPRINTF(x)     do { if (a1xintcdebug) printf x; } while (0)
+#define DPRINTFN(n,x)  do { if (a1xintcdebug>(n)) printf x; } while (0)
+int    a1xintcdebug = 10;
 char *ipl_strtbl[NIPL] = {
        "IPL_NONE",
        "IPL_SOFT",
@@ -130,21 +130,21 @@ struct intrq {
        int iq_ist;                     /* share type */
 };
 
-volatile int softint_pending;
+volatile int a1xsoftint_pending;
 
-struct intrq intc_handler[NIRQ];
-u_int32_t intc_smask[NIPL];
-u_int32_t intc_imask[NBANKS][NIPL];
+struct intrq a1xintc_handler[NIRQ];
+u_int32_t a1xintc_smask[NIPL];
+u_int32_t a1xintc_imask[NBANKS][NIPL];
 
-bus_space_tag_t                intc_iot;
-bus_space_handle_t     intc_ioh;
-int                    intc_nirq;
+bus_space_tag_t                a1xintc_iot;
+bus_space_handle_t     a1xintc_ioh;
+int                    a1xintc_nirq;
 
 void   a1xintc_attach(struct device *, struct device *, void *);
-int    intc_spllower(int);
-int    intc_splraise(int);
-void   intc_setipl(int);
-void   intc_calc_masks(void);
+int    a1xintc_spllower(int);
+int    a1xintc_splraise(int);
+void   a1xintc_setipl(int);
+void   a1xintc_calc_masks(void);
 
 struct cfattach        a1xintc_ca = {
        sizeof (struct device), NULL, a1xintc_attach
@@ -154,7 +154,7 @@ struct cfdriver a1xintc_cd = {
        NULL, "a1xintc", DV_DULL
 };
 
-int intc_attached = 0;
+int a1xintc_attached = 0;
 
 void
 a1xintc_attach(struct device *parent, struct device *self, void *args)
@@ -162,45 +162,45 @@ a1xintc_attach(struct device *parent, struct device *self, void *args)
        struct armv7_attach_args *aa = args;
        int i, j;
 
-       intc_iot = aa->aa_iot;
-       if (bus_space_map(intc_iot, aa->aa_dev->mem[0].addr,
-           aa->aa_dev->mem[0].size, 0, &intc_ioh))
+       a1xintc_iot = aa->aa_iot;
+       if (bus_space_map(a1xintc_iot, aa->aa_dev->mem[0].addr,
+           aa->aa_dev->mem[0].size, 0, &a1xintc_ioh))
                panic("a1xintc_attach: bus_space_map failed!");
 
        /* disable/mask/clear all interrupts */
        for (i = 0; i < NBANKS; i++) {
-               bus_space_write_4(intc_iot, intc_ioh, INTC_ENABLE_REG(i), 0);
-               bus_space_write_4(intc_iot, intc_ioh, INTC_MASK_REG(i), 0);
-               bus_space_write_4(intc_iot, intc_ioh, INTC_IRQ_PENDING_REG(i),
+               bus_space_write_4(a1xintc_iot, a1xintc_ioh, INTC_ENABLE_REG(i), 0);
+               bus_space_write_4(a1xintc_iot, a1xintc_ioh, INTC_MASK_REG(i), 0);
+               bus_space_write_4(a1xintc_iot, a1xintc_ioh, INTC_IRQ_PENDING_REG(i),
                    0xffffffff);
                for (j = 0; j < NIPL; j++)
-                       intc_imask[i][j] = 0;
+                       a1xintc_imask[i][j] = 0;
        }
 
        /* XXX */
-       bus_space_write_4(intc_iot, intc_ioh, INTC_PROTECTION_REG, 1);
-       bus_space_write_4(intc_iot, intc_ioh, INTC_NMI_CTRL_REG, 0);
+       bus_space_write_4(a1xintc_iot, a1xintc_ioh, INTC_PROTECTION_REG, 1);
+       bus_space_write_4(a1xintc_iot, a1xintc_ioh, INTC_NMI_CTRL_REG, 0);
 
        for (i = 0; i < NIRQ; i++)
-               TAILQ_INIT(&intc_handler[i].iq_list);
+               TAILQ_INIT(&a1xintc_handler[i].iq_list);
 
-       intc_calc_masks();
+       a1xintc_calc_masks();
 
        arm_init_smask();
-       intc_attached = 1;
+       a1xintc_attached = 1;
 
        /* insert self as interrupt handler */
-       arm_set_intr_handler(intc_splraise, intc_spllower, intc_splx,
-           intc_setipl,
-           intc_intr_establish, intc_intr_disestablish, intc_intr_string,
-           intc_irq_handler);
-       intc_setipl(IPL_HIGH);  /* XXX ??? */
+       arm_set_intr_handler(a1xintc_splraise, a1xintc_spllower, a1xintc_splx,
+           a1xintc_setipl,
+           a1xintc_intr_establish, a1xintc_intr_disestablish, a1xintc_intr_string,
+           a1xintc_irq_handler);
+       a1xintc_setipl(IPL_HIGH);  /* XXX ??? */
        enable_interrupts(I32_bit);
        printf("\n");
 }
 
 void
-intc_calc_masks(void)
+a1xintc_calc_masks(void)
 {
        struct cpu_info *ci = curcpu();
        int irq;
@@ -210,14 +210,14 @@ intc_calc_masks(void)
        for (irq = 0; irq < NIRQ; irq++) {
                int max = IPL_NONE;
                int min = IPL_HIGH;
-               TAILQ_FOREACH(ih, &intc_handler[irq].iq_list, ih_list) {
+               TAILQ_FOREACH(ih, &a1xintc_handler[irq].iq_list, ih_list) {
                        if (ih->ih_ipl > max)
                                max = ih->ih_ipl;
                        if (ih->ih_ipl < min)
                                min = ih->ih_ipl;
                }
 
-               intc_handler[irq].iq_irq = max;
+               a1xintc_handler[irq].iq_irq = max;
 
                if (max == IPL_NONE)
                        min = IPL_NONE;
@@ -231,38 +231,38 @@ intc_calc_masks(void)
 #endif
                /* Enable interrupts at lower levels, clear -> enable */
                for (i = 0; i < min; i++)
-                       intc_imask[IRQ2REG32(irq)][i] &=
+                       a1xintc_imask[IRQ2REG32(irq)][i] &=
                            ~(1 << IRQ2BIT32(irq));
                for (; i < NIPL; i++)
-                       intc_imask[IRQ2REG32(irq)][i] |=
+                       a1xintc_imask[IRQ2REG32(irq)][i] |=
                            (1 << IRQ2BIT32(irq));
                /* XXX - set enable/disable, priority */ 
        }
 
-       intc_setipl(ci->ci_cpl);
+       a1xintc_setipl(ci->ci_cpl);
 }
 
 void
-intc_splx(int new)
+a1xintc_splx(int new)
 {
        struct cpu_info *ci = curcpu();
-       intc_setipl(new);
+       a1xintc_setipl(new);
 
        if (ci->ci_ipending & arm_smask[ci->ci_cpl])
                arm_do_pending_intr(ci->ci_cpl);
 }
 
 int
-intc_spllower(int new)
+a1xintc_spllower(int new)
 {
        struct cpu_info *ci = curcpu();
        int old = ci->ci_cpl;
-       intc_splx(new);
+       a1xintc_splx(new);
        return (old);
 }
 
 int
-intc_splraise(int new)
+a1xintc_splraise(int new)
 {
        struct cpu_info *ci = curcpu();
        int old;
@@ -278,13 +278,13 @@ intc_splraise(int new)
        if (old > new)
                new = old;
 
-       intc_setipl(new);
+       a1xintc_setipl(new);
   
        return (old);
 }
 
 void
-intc_setipl(int new)
+a1xintc_setipl(int new)
 {
        struct cpu_info *ci = curcpu();
        int i, psw;
@@ -293,7 +293,7 @@ intc_setipl(int new)
         * XXX not needed, because all interrupts are disabled
         * by default, so touching maskregs has no effect, i hope.
         */
-       if (intc_attached == 0) {
+       if (a1xintc_attached == 0) {
                ci->ci_cpl = new;
                return;
        }
@@ -301,20 +301,20 @@ intc_setipl(int new)
        psw = disable_interrupts(I32_bit);
        ci->ci_cpl = new;
        for (i = 0; i < NBANKS; i++)
-               bus_space_write_4(intc_iot, intc_ioh,
-                   INTC_MASK_REG(i), intc_imask[i][new]);
+               bus_space_write_4(a1xintc_iot, a1xintc_ioh,
+                   INTC_MASK_REG(i), a1xintc_imask[i][new]);
        restore_interrupts(psw);
 }
 
 void
-intc_irq_handler(void *frame)
+a1xintc_irq_handler(void *frame)
 {
        struct intrhand *ih;
        void *arg;
        uint32_t pr;
        int irq, prio, s;
 
-       irq = bus_space_read_4(intc_iot, intc_ioh, INTC_VECTOR_REG) >> 2;
+       irq = bus_space_read_4(a1xintc_iot, a1xintc_ioh, INTC_VECTOR_REG) >> 2;
        if (irq == 0)
                return;
        if (irq == 1)
@@ -322,30 +322,30 @@ intc_irq_handler(void *frame)
 
        sxipio_setpin(SXIPIO_LED_GREEN);
 
-       prio = intc_handler[irq].iq_irq;
-       s = intc_splraise(prio);
+       prio = a1xintc_handler[irq].iq_irq;
+       s = a1xintc_splraise(prio);
        splassert(prio);
 
-       pr = bus_space_read_4(intc_iot, intc_ioh,
+       pr = bus_space_read_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)));
-       bus_space_write_4(intc_iot, intc_ioh,
+       bus_space_write_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)),
            pr & ~(1 << IRQ2BIT32(irq)));
 
        /* clear pending */
-       pr = bus_space_read_4(intc_iot, intc_ioh,
+       pr = bus_space_read_4(a1xintc_iot, a1xintc_ioh,
            INTC_IRQ_PENDING_REG(IRQ2REG32(irq)));
-       bus_space_write_4(intc_iot, intc_ioh,
+       bus_space_write_4(a1xintc_iot, a1xintc_ioh,
            INTC_IRQ_PENDING_REG(IRQ2REG32(irq)),
            pr | (1 << IRQ2BIT32(irq)));
 
-       pr = bus_space_read_4(intc_iot, intc_ioh,
+       pr = bus_space_read_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)));
-       bus_space_write_4(intc_iot, intc_ioh,
+       bus_space_write_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)),
            pr | (1 << IRQ2BIT32(irq)));
 
-       TAILQ_FOREACH(ih, &intc_handler[irq].iq_list, ih_list) {
+       TAILQ_FOREACH(ih, &a1xintc_handler[irq].iq_list, ih_list) {
                if (ih->ih_arg != 0)
                        arg = ih->ih_arg;
                else
@@ -354,13 +354,13 @@ intc_irq_handler(void *frame)
                if (ih->ih_func(arg)) 
                        ih->ih_count.ec_count++;
        }
-       intc_splx(s);
+       a1xintc_splx(s);
 
        sxipio_clrpin(SXIPIO_LED_GREEN);
 }
 
 void *
-intc_intr_establish(int irq, int lvl, int (*f)(void *), void *arg, char *name)
+a1xintc_intr_establish(int irq, int lvl, int (*f)(void *), void *arg, char *name)
 {
        int psw;
        struct intrhand *ih;
@@ -385,25 +385,25 @@ intc_intr_establish(int irq, int lvl, int (*f)(void *), void *arg, char *name)
        ih->ih_irq = irq;
        ih->ih_name = name;
 
-       TAILQ_INSERT_TAIL(&intc_handler[irq].iq_list, ih, ih_list);
+       TAILQ_INSERT_TAIL(&a1xintc_handler[irq].iq_list, ih, ih_list);
 
        if (name != NULL)
                evcount_attach(&ih->ih_count, name, &ih->ih_irq);
 
-       er = bus_space_read_4(intc_iot, intc_ioh,
+       er = bus_space_read_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)));
-       bus_space_write_4(intc_iot, intc_ioh,
+       bus_space_write_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)),
            er | (1 << IRQ2BIT32(irq)));
 
-       intc_calc_masks();
+       a1xintc_calc_masks();
        
        restore_interrupts(psw);
        return (ih);
 }
 
 void
-intc_intr_disestablish(void *cookie)
+a1xintc_intr_disestablish(void *cookie)
 {
        struct intrhand *ih = cookie;
        int irq = ih->ih_irq;
@@ -412,26 +412,26 @@ intc_intr_disestablish(void *cookie)
 
        psw = disable_interrupts(I32_bit);
 
-       TAILQ_REMOVE(&intc_handler[irq].iq_list, ih, ih_list);
+       TAILQ_REMOVE(&a1xintc_handler[irq].iq_list, ih, ih_list);
 
        if (ih->ih_name != NULL)
                evcount_detach(&ih->ih_count);
 
        free(ih, M_DEVBUF, 0);
 
-       er = bus_space_read_4(intc_iot, intc_ioh,
+       er = bus_space_read_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)));
-       bus_space_write_4(intc_iot, intc_ioh,
+       bus_space_write_4(a1xintc_iot, a1xintc_ioh,
            INTC_ENABLE_REG(IRQ2REG32(irq)),
            er & ~(1 << IRQ2BIT32(irq)));
 
-       intc_calc_masks();
+       a1xintc_calc_masks();
 
        restore_interrupts(psw);
 }
 
 const char *
-intc_intr_string(void *cookie)
+a1xintc_intr_string(void *cookie)
 {
        return "asd?";
 }

diff --git a/sys/arch/armv7/sunxi/a1xintc.h b/sys/arch/armv7/sunxi/a1xintc.h
index 1d0bebb..2d8c1d2 100644 (file)
--- a/sys/arch/armv7/sunxi/a1xintc.h
+++ b/sys/arch/armv7/sunxi/a1xintc.h
@@ -1,4 +1,4 @@
-/*     $OpenBSD: a1xintc.h,v 1.2 2014/03/29 18:09:29 guenther Exp $ */
+/*     $OpenBSD: a1xintc.h,v 1.3 2015/05/19 06:09:35 jsg Exp $ */
 /*
  * Copyright (c) 2007,2009 Dale Rahn <drahn@openbsd.org>
  *
@@ -27,19 +27,19 @@
 
 extern volatile int current_spl_level;
 extern volatile int softint_pending;
-void intc_do_pending(void);
+void a1xintc_do_pending(void);
 
 #define SI_TO_IRQBIT(si)  (1U<<(si))
-void intc_setipl(int);
-void intc_splx(int);
-int intc_splraise(int);
-int intc_spllower(int);
-void intc_setsoftintr(int);
-
-void intc_irq_handler(void *);
-void *intc_intr_establish(int, int, int (*)(void *), void *, char *);
-void intc_intr_disestablish(void *);
-const char *intc_intr_string(void *);
+void a1xintc_setipl(int);
+void a1xintc_splx(int);
+int a1xintc_splraise(int);
+int a1xintc_spllower(int);
+void a1xintc_setsoftintr(int);
+
+void a1xintc_irq_handler(void *);
+void *a1xintc_intr_establish(int, int, int (*)(void *), void *, char *);
+void a1xintc_intr_disestablish(void *);
+const char *a1xintc_intr_string(void *);
 
 #endif /* ! _LOCORE */