-# $OpenBSD: Makefile.cross,v 1.109 2020/08/14 16:55:07 patrick Exp $
+# $OpenBSD: Makefile.cross,v 1.110 2021/05/01 16:10:29 visa Exp $
cross-tools: cross-includes cross-binutils cross-gcc cross-lib
cross-distrib: cross-tools cross-bin cross-share cross-sys cross-etc-root-var
TARGET_ARCH= arm
.elif (${TARGET} == "luna88k")
TARGET_ARCH= m88k
-.elif (${TARGET} == "sgi" || ${TARGET} == "octeon")
+.elif (${TARGET} == "octeon")
TARGET_ARCH= mips64
.elif (${TARGET} == "loongson")
TARGET_ARCH= mips64el
-# $OpenBSD: Makefile,v 1.54 2021/04/28 15:11:27 jsg Exp $
+# $OpenBSD: Makefile,v 1.55 2021/05/01 16:10:33 visa Exp $
SUBDIR= special notes
.if make(obj)
SUBDIR+=alpha amd64 armv7 arm64 hppa i386 \
landisk loongson luna88k macppc \
- octeon powerpc64 riscv64 sgi sparc64
+ octeon powerpc64 riscv64 sparc64
.elif exists(${MACHINE})
SUBDIR+=${MACHINE}
.endif
-# $OpenBSD: Makefile,v 1.49 2020/07/04 21:11:04 kettenis Exp $
+# $OpenBSD: Makefile,v 1.50 2021/05/01 16:10:35 visa Exp $
NOPROG=
NOMAN=
allarchs:
@cd $(.CURDIR); \
for arch in alpha amd64 arm64 armv7 hppa i386 landisk \
- loongson luna88k macppc octeon powerpc64 sgi sparc64; \
+ loongson luna88k macppc octeon powerpc64 sparc64; \
do ${MAKE} M=$$arch; done
$(TARG): $(DEP)
+++ /dev/null
-dnl $OpenBSD: contents,v 1.29 2017/09/25 10:47:46 jsg Exp $
-TopPart
-
-OpenBSDdistsets
-
-dnl six flavours of OpenBSDbsd
- bsd.IP22 A stock GENERIC-IP22 MACHINE kernel for IP22 class
- machines, which will be installed on such systems
- during the install.
-
- bsd.IP26 A stock GENERIC-IP26 MACHINE kernel for IP26 class
- machines, which will be installed on such systems
- during the install.
-
- bsd.IP27 A stock GENERIC-IP27 MACHINE kernel for IP27 and IP35
- class machines, which will be installed on such
- systems during the install.
-
- bsd.IP28 A stock GENERIC-IP28 MACHINE kernel for IP28 class
- machines, which will be installed on such systems
- during the install.
-
- bsd.IP30 A stock GENERIC-IP30 MACHINE kernel for IP30 class
- machines, which will be installed on such systems
- during the install.
-
- bsd.IP32 A stock GENERIC-IP32 MACHINE kernel for IP32 class
- machines, which will be installed on such systems
- during the install.
-
-dnl one flavour of OpenBSDbsdmp so far...
- bsd.IP30.mp A stock GENERIC-IP30.MP MACHINE kernel for IP30 class
- machines, with support for multiprocessor systems,
- which can be used instead of the GENERIC-IP30 kernel
- after the install.
-
-dnl six flavours of OpenBSDrd
- bsd.rd.IP22 A RAMDISK-IP22 kernel; the embedded filesystem
- contains the installation tools.
- Used for installation and upgrades.
-
- bsd.rd.IP26 A RAMDISK-IP26 kernel; the embedded filesystem
- contains the installation tools.
- Used for installation and upgrades.
-
- bsd.rd.IP27 A RAMDISK-IP27 kernel; the embedded filesystem
- contains the installation tools.
- Used for installation and upgrades.
-
- bsd.rd.IP28 A RAMDISK-IP28 kernel; the embedded filesystem
- contains the installation tools.
- Used for installation and upgrades.
-
- bsd.rd.IP30 A RAMDISK-IP30 kernel; the embedded filesystem
- contains the installation tools.
- Used for installation and upgrades.
-
- bsd.rd.IP32 A RAMDISK-IP32 kernel; the embedded filesystem
- contains the installation tools.
- Used for installation and upgrades.
-
-OpenBSDinstalliso
-
-dnl can't use OpenBSDcd because of the multiple bsd.rd
- cd{:--:}OSrev.iso A simple bootable filesystem image consisting of
- all the bsd.rd.* installation kernels above, suitable
- to be used as a bootable CD-ROM image, but will require
- the base and X sets be found via another media or
- network.
-
- boot32 A 32-bit ELF boot block for IP32 systems; will be
- installed into the ``volume header'' of the boot
- disk.
-
- boot64 A 64-bit relocatable ELF boot block for IP26, IP27,
- IP28, IP30 and IP35 systems; will be installed into
- the ``volume header'' of the boot disk.
-
- bootecoff A 32-bit ECOFF boot block for IP22 systems, also
- used to boot ELF kernels over the network on
- ELF-unaware PROM; will be installed into the
- ``volume header'' of the boot disk.
-
-
-DistributionDescription(eight)
-
-OpenBSDbase(177217431,327870464)
-
-OpenBSDcomp(50946727,199839744)
-
-OpenBSDgame(2789440,7450624)
-
-OpenBSDman(7328221,31416320)
-
-OpenBSDxbase(17144104,66990080)
-
-OpenBSDxfont(40298008,59377664)
-
-OpenBSDxserv(6880358,21202944)
-
-OpenBSDxshare(4525224,30216192)
+++ /dev/null
-dnl $OpenBSD: features,v 1.5 2021/03/15 09:29:51 jsg Exp $
-dnl
-dnl This file lists almost all the conditional features of this port,
-dnl which are used to provide accurate installation notes.
-dnl
-dnl Information about the installer script features should be in sync with
-dnl src/distrib/sgi/ramdisk/install.md
-dnl and the list files in
-dnl src/distrib/sgi/ramdisk/list
-dnl
-dnl ====
-dnl
-dnl architecture name (for the packages directory)
-define({:-MACHINE_ARCH-:},mips64)dnl
-dnl
-dnl define if /sbin/kbd exists on the media
-define({:-MDKBD-:},1)dnl
-dnl
-dnl define if serial consoles needs to be enabled in /etc/ttys
-dnl (i.e. md_consoleinfo is not empty)
-define({:-MDSERCONS-:},)dnl
-dnl
-dnl define if SMP kernels are provided
-define({:-MDSMP-:},1)dnl
-dnl
-dnl define if shared libraries are provided
-define({:-MDSO-:},1)dnl
-dnl
-dnl define if some media have timezone information (TZ in their list)
-define({:-MDTZ-:},1)dnl
-dnl
-dnl define if glass console is possible
-dnl (XXX does not imply availability of X servers though)
-define({:-MDX-:},1)dnl
-dnl
-dnl define if the X server can't start until machdep.allow_aperture is set
-define({:-MDXAPERTURE-:},)dnl
-dnl
-dnl define if the X server can start without a configuration file
-define({:-MDXDM-:},)dnl
+++ /dev/null
-dnl $OpenBSD: hardware,v 1.23 2015/09/20 15:24:39 miod Exp $
-OpenBSD/MACHINE OSREV runs on the following machine families:
-
- IP22 class machines:
- Indigo (R4x00 flavour only) (IP20)
- Indigo2, Challenge M (IP22)
- Indy, Challenge S (IP24)
- (all processor configurations are supported)
-
- IP26 class machines:
- POWER Indigo2 (R8000)
-
- IP27 class machines:
- Origin 200
-dnl Origin 2000, Onyx 2
-
- IP28 class machines:
- POWER Indigo2 R10000
-
- IP30 class machines:
- Octane
- Octane 2
-
- IP32 class machines:
- O2
- O2+
- (both R50000/RM52xx/RM70000 and R10000/R12000 configurations
- are supported)
-
- IP35 class machines:
-dnl Origin 300, Onyx 300
- Origin 3000
- Origin 350, Onyx 350
- Fuel
- Tezro
- Onyx 4
+++ /dev/null
-dnl $OpenBSD: install,v 1.30 2021/03/15 09:29:51 jsg Exp $
-OpenBSDInstallPrelude
-
-There are several ways to install OpenBSD onto a disk. The easiest way
-in terms of preliminary setup is to use the bootable CD-ROM mini image.
-Alternatively, the OpenBSD ramdisk kernel can be booted from the network,
-using a bootp/tftp server.
-
-Booting from CD-ROM installation media:
-
- From the System Maintenance Menu, select '2' (or click on the
- appropriate icon if in graphics console) to Install System Software.
-
- If necessary, select the proper CD-ROM drive, and press enter to
- confirm your choice. Insert the installation CD-ROM (if you did not
- do so already) and press enter to boot the system.
-
- If the boot is successful, you will get a loader version message,
- executable sizes, and then the kernel copyright and device probe
- messages. Boot failure modes are typically a lot of CD-ROM drive
- activity, but no messages or complaints about magic numbers,
- checksums or formats.
-
- If the system does not complain about being able to read the CD-ROM,
- but of not being able to load a particular file, you can nevertheless
- boot manually. This is the case on IP22 systems.
-
- To boot manually from the CD-ROM, select ``Enter Command Monitor''
- at the menu, and invoke the bootloader and ramdisk image manually.
- For example, on an IP22 system, automatic boot may fail with:
-
-dnl IP22
- Cannot load scsi(1)cdrom(4)partition(8)sashARCS.
- Text start 0x10000, size 0xa120 doesn't fit in a FreeMemory area.
- Cannot load scsi(1)cdrom(4)partition(8)sashARCS -- not enough space.
-
- or:
-
-dnl IP20, changed from scsi(0) to scsi(1) for consistency
- Cannot load scsi(1)cdrom(4)partition(8)sashARCS.
- Error 15 while loading scsi(1)cdrom(4)partition(8)sashARCS
-
- The name of the CD-ROM drive is then ``scsi(1)cdrom(4)'', and the manual
- boot command will be:
-
- >> scsi(1)cdrom(4)partition(8)bootecoff
- scsi(1)cdrom(4)partition(0)/bsd.rd.IP22
-
- Note that this is a single commandline, the two paths should be separated
- with spaces.
-
-Booting over the network:
-dnl XXX provide more details!!!
-
- First, a bootp or dhcpd server needs to be set up. The bootpd(8) or
- dhcpd(8) manual page on your server should provide detailed information
- on how to set up the server.
-
- The PROM, by default, will configure itself to use the IP address set in
- the `netaddr' environment variable. To force the PROM to always get an
- address from a bootp or dhcp server, clear the variable (`unsetenv netaddr')
- before attempting to boot from the network. Alternatively, you may want to
- make sure the value of this variable is correct.
-
- Note that, if the `netaddr' variable is unset, the PROM will initialize it
- to the address obtained from the bootp or dhcp server.
-
- The bootp or dhcp server needs to know the ethernet address of the system.
- On Indigo, Indigo2, Indy and O2 systems, this address can be found by using
- the ``printenv'' command in the Maintenance Console, looking for the
- ``eaddr'' variable.
- On other systems, or if this variable is missing, this address is usually
- written on a factory sticker on the back of the machine.
-
- The server should also provide a tftp location, where the proper bsd.rd
- file should be available.
-
- IMPORTANT! Older PROM are unable to connect to a tftp server
- on a port number greater than 32767; if booting stalls almost
- immediately, it might be necessary to restrict the tftp server
- to only use 15-bit port numbers.
-
- This situation can be detected by running tcpdump on the tftp
- server, and looking for icmp `port unreachable' errors from the
- MACHINE system.
-
-dnl The following list is not intended to be exhaustive. Once enough samples
-dnl are collected, it would be nice to be able to tell `PROM versions before
-dnl that date are affected, PROM versions after that date are fine' rather
-dnl than listing per-machine version strings. But then the actual cutoff
-dnl point might differ across systems, argh.
- The following PROM versions are known to exhibit this troublesome
- behaviour:
- - on Indigo:
- >> version
- PROM Monitor SGI Version 4.0.5G Rev B IP20, Nov 10, 1992 (BE)
- - on Indy:
- >> version
- PROM Monitor SGI Version 5.1 Rev B3 IP24 Sep 17, 1993 (BE)
-
- On the other hand, the following PROM versions are known to be
- unaffected by this problem:
- - on Indigo2:
- >> version
- PROM Monitor SGI Version 5.3 Rev C IP22 Oct 20, 1994 (BE)
- - on Indy:
- >> version
- PROM Monitor SGI Version 5.3 Rev B7 R4X00 IP24 Feb 16, 1995 (BE)
- PROM Monitor SGI Version 5.3 Rev B10 R4X00/R5000 IP24 Feb 12, 1996 (BE)
-
- Note that these lists do not pretend to be complete.
-
- If the server system runs OpenBSD, the following command can be
- used to enforce a safe port number:
-
- # sysctl net.inet.ip.portlast=32767
-
- don't forget to restore the previous value of this sysctl after
- the troublesome system has booted.
-
- Once the server is set up, boot with the following command in the
- Maintenance Console:
-
- >> bootp()bsd.rd.IP32
-
- (replacing `IP32' by the family name suitable for your machine).
-
- On IP22-class systems, or if the PROM complains about the file format,
- such as:
-
- >> bootp()bsd.rd.IP22
- [...]
- Cannot load bootp()bsd.rd.IP22.
- Problem reading elf structure at offset -2004877312.
- Unable to execute bootp()bsd.rd.IP22
-
- ... then this means that the PROM is too old to know about the ELF file
- format the OpenBSD kernel is provided in. In this case, the kernel needs
- to be booted from the ``bootecoff'' boot block, which has to be put on the
- tftp server as well, with:
-
- >> bootp()bootecoff bootp()bsd.rd.IP22
-
- If the boot aborts early with a memory related error message, such as:
-
- >> bootp()bootecoff bootp()bsd.rd.IP22
- [...]
- Cannot load bootp()bootecoff.
- Text start 0x80020f0, size 0xa030 doesn't fit in a FreeMemory area.
- Unable to execute bootp()/bootecoff
-
- ... then it is necessary to clean up after an earlier unsuccessful (or
- aborted) boot attempt. Just leave the PROM interactive mode with `exit',
- and at the maintenance menu, choose `Enter Command Monitor' again.
-
-Installing the system:
-
-OpenBSDInstallPart2
-
- Boot your machine from the installation media as described above.
-
- It will take a while to load the kernel especially from a slow
- network connection, most likely more than a minute. If some action
- doesn't eventually happen, or the spinning cursor has stopped and
- nothing further has happened, either your boot media is bad, your
- diskless setup isn't correct, or you may have a hardware or
- configuration problem.
-
-OpenBSDInstallPart3(,"sd0")
-
-OpenBSDInstallPart4
-
-OpenBSDInstallPart5
-
- No partitions should overlap with the SGI Volume Header, which by
- default will use the first 3134 sectors.
-
-OpenBSDInstallPart6({:-CD-ROM, NFS -:})
-
-OpenBSDURLInstall
-
-OpenBSDCDROMInstall
-
-OpenBSDNFSInstall
-
-OpenBSDDISKInstall(,{:-only -:})
-
-OpenBSDCommonInstall
-
-OpenBSDInstallWrapup
-
-OpenBSDCongratulations
-
-
-
-OpenBSDUnattendedInstallation
+++ /dev/null
-dnl $OpenBSD: prep,v 1.27 2015/09/20 15:24:39 miod Exp $
-Before you install your system, you should identify your system family and
-familiarize yourself with the ARCBios setup and how to run programs from
-the Command monitor prompt.
-
-Identifying your system:
-
- Due to significant design differences in SGI systems, OpenBSD
- needs to use different kernels, depending on the system family.
-
- There are currently five system families supported by OpenBSD:
-
- IP22 family:
- Indigo (R4x00 flavour only)
- Indigo2, Challenge M
- Indy, Challenge S
-
- IP26 family:
- POWER Indigo2 (R8000)
-
- IP27 family:
- Origin 200, Onyx 2
- Origin 2000
-
- IP28 family:
- POWER Indigo2 R10000
-
- IP30 family:
- Octane, Octane 2
-
- IP32 family:
- O2, O2+
-
- IP35 family:
-dnl Origin 300, Origin 3000, Onyx 300
- Origin 350, Onyx 350
- Fuel
- Tezro
- Onyx 4
-
- You should use the kernels (bsd and bsd.rd) with the IP suffix
- matching your family number, except for IP35 systems which use
- IP27 kernels.
-
- On Indigo2 systems, the particular family is not always easy to
- figure out. When in doubt, access the maintenance console (see
- below) and enter the ``version'' command. Its output will report
- the IPxx family number of the system.
-
-Accessing the Maintenance Console:
-
- When the system starts up, press the ESC key or use the mouse and
- click the ``stop for maintenance'' button. Once in the System
- Maintenance Menu, select '5' (or click the appropriate icon if you
- are using the graphics console) to go into the Command Monitor.
-
- If the internal disk with the lowest SCSI ID does not contain a
- valid Volume Header, but is bootable, the Maintenance Console will
- be entered by default.
-
- The first time the Maintenance Console is entered, it may be
- necessary to force a reset of the environment to its default
- settings by entering the ``resetenv'' command at the chevron
- prompt. If some variables have been set explicitly, this may
- disturb the normal OpenBSD boot process.
-
-Switching from serial to graphics console and vice versa:
-
- To change to serial console, go into the ARCBios Maintenance Console
- and change the ``console'' environment variable, and power-cycle
- the machine.
-
- >> setenv console d
-
- will select 8N1, no flow control, serial console on the first serial
- port (labeled ``(1)''), while
-
- >> setenv console g
-
- will select the graphics console.
-
- The speed of the serial console is controlled by the ``dbaud'' environment
- variable, and defaults to 9600 bps if this variable is not set.
-
- Not all graphics options are currently supported by OpenBSD. If your
- system is configured for graphics console but the kernel does not
- support your frame buffer, it will fallback to serial console on the
- first serial port.
-
- As of OpenBSD OSREV, the only unsupported graphics console devices are:
- - Infinite Reality (Kona) frame buffer on IP27/IP35 Onyx systems
- - Voyager (Ultimate Vision) frame buffer on IP35 Onyx 4 systems
-
-Switching from L1 console to serial console and vice versa:
-
- IP35 systems without a graphics console can have the PROM console output
- either on the L1 console serial port, or the regular serial port.
-
- The `console' command at the PROM prompt, can select between them:
-
- >> console sc
-
- will switch to the L1 serial port, while
-
- >> console ioc3
-
- or
-
- >> console ioc4
-
- will select the regular serial port, depending on the I/O board type.
-
- On Fuel systems, there is no external L1 serial port, so `console sc'
- should never be used on these machines.
-
- Origin 300 and 3000 families can switch between `sc' and `ioc3', while
- Origin 350 and 3500 families (including Tezro and Onyx 4) can switch
- between `sc' and `ioc4'.
-
- The OpenBSD kernel only supports serial console on the regular serial
- ports; if your PROM console is on the L1 port, the kernel console will
- nevertheless pick the first IOC3 or IOC4 serial port.
-
-Setting the environment:
-
- When setting up the system to boot from disk, the ``OSLoader''
- environment variable will need to be changed.
-
- Its default value is ``sashARCS'', ``sash'' or ``sash64'', which is
- IRIX's standalone shell and loader. Set it to ``boot'', the name under
- which the OpenBSD boot loader has been installed.
-
- The kernel image loaded by default is specified in the ``OSLoadFilename''
- variable, which defaults to ``unix''. To boot OpenBSD, set it to
- ``bsd''.
-
- To enable automatic booting of OpenBSD once the machine has passed its
- diagnostic tests, change the value of ``AutoLoad'' to ``Yes''.
-
+++ /dev/null
-dnl $OpenBSD: upgrade,v 1.3 2008/03/10 22:00:12 miod Exp $
-OpenBSDUpgrade({:-the CD-ROM or the bsd.rd kernel-:})
+++ /dev/null
-dnl $OpenBSD: whatis,v 1.6 2015/09/20 15:24:39 miod Exp $
-
-OpenBSD/MACHINE runs on several SGI workstations and servers built upon
-64-bit MIPS processors (R4000 and up), including the Indigo, Indigo2,
-Indy, O2, Octane, Origin/Onyx and Fuel/Tezro families.
+++ /dev/null
-dnl $OpenBSD: xfer,v 1.8 2015/06/10 06:38:40 jasper Exp $
-Installation is supported from several media types, including:
-
- CD-ROM
- FFS partitions
- Remote NFS partition
- HTTP
-
-OpenBSDXferPrelude
-
-OpenBSDXferNFS
-
-OpenBSDXferFFS
+++ /dev/null
-./etc/examples/wsconsctl.conf
-./etc/firmware/3c990
-./etc/firmware/3c990-license
-./etc/firmware/atu-at76c503-i3863-ext
-./etc/firmware/atu-at76c503-i3863-int
-./etc/firmware/atu-at76c503-rfmd-acc-ext
-./etc/firmware/atu-at76c503-rfmd-acc-int
-./etc/firmware/atu-at76c505-rfmd-ext
-./etc/firmware/atu-at76c505-rfmd-int
-./etc/firmware/atu-intersil-ext
-./etc/firmware/atu-intersil-int
-./etc/firmware/atu-license
-./etc/firmware/atu-rfmd-ext
-./etc/firmware/atu-rfmd-int
-./etc/firmware/atu-rfmd2958-ext
-./etc/firmware/atu-rfmd2958-int
-./etc/firmware/atu-rfmd2958smc-ext
-./etc/firmware/atu-rfmd2958smc-int
-./etc/firmware/bnx-b06
-./etc/firmware/bnx-b09
-./etc/firmware/bnx-license
-./etc/firmware/bnx-rv2p
-./etc/firmware/bnx-xi-rv2p
-./etc/firmware/bnx-xi90-rv2p
-./etc/firmware/fxp-d101a
-./etc/firmware/fxp-d101b0
-./etc/firmware/fxp-d101ma
-./etc/firmware/fxp-d101s
-./etc/firmware/fxp-d102
-./etc/firmware/fxp-d102c
-./etc/firmware/fxp-d102e
-./etc/firmware/fxp-license
-./etc/firmware/kue
-./etc/firmware/kue-license
-./etc/firmware/myx-eth_z8e
-./etc/firmware/myx-ethp_z8e
-./etc/firmware/myx-license
-./etc/firmware/ral-license
-./etc/firmware/ral-rt2561
-./etc/firmware/ral-rt2561s
-./etc/firmware/ral-rt2661
-./etc/firmware/ral-rt2860
-./etc/firmware/ral-rt3290
-./etc/firmware/rum-license
-./etc/firmware/rum-rt2573
-./etc/firmware/run-license
-./etc/firmware/run-rt2870
-./etc/firmware/run-rt3071
-./etc/firmware/symbol-eprim
-./etc/firmware/symbol-esec
-./etc/firmware/symbol-license
-./etc/firmware/tht
-./etc/firmware/tht-license
-./etc/firmware/tigon-license
-./etc/firmware/tigon1
-./etc/firmware/tigon2
-./etc/firmware/tusb3410
-./etc/firmware/tusb3410-license
-./etc/firmware/udl_huffman
-./etc/firmware/yds
-./etc/firmware/yds-license
-./etc/firmware/zd1211
-./etc/firmware/zd1211-license
-./etc/firmware/zd1211b
-./sbin/kbd
-./sbin/wsconsctl
-./usr/bin/clang
-./usr/bin/clang++
-./usr/bin/clang-cpp
-./usr/bin/ld.bfd
-./usr/bin/objcopy
-./usr/lib/crtbegin.o
-./usr/lib/crtbeginS.o
-./usr/lib/crtend.o
-./usr/lib/crtendS.o
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1/collect2
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1/libgcc.a
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1/specs
-./usr/lib/libLLVM.so.5.0
-./usr/lib/libc++.so.8.0
-./usr/lib/libc++abi.so.5.0
-./usr/lib/libcompiler_rt.a
-./usr/lib/libstdc++.so.57.0
-./usr/libdata/perl5/mips64-openbsd
-./usr/libdata/perl5/mips64-openbsd/.packlist
-./usr/libdata/perl5/mips64-openbsd/B
-./usr/libdata/perl5/mips64-openbsd/B.pm
-./usr/libdata/perl5/mips64-openbsd/B/Concise.pm
-./usr/libdata/perl5/mips64-openbsd/B/Showlex.pm
-./usr/libdata/perl5/mips64-openbsd/B/Terse.pm
-./usr/libdata/perl5/mips64-openbsd/B/Xref.pm
-./usr/libdata/perl5/mips64-openbsd/CORE
-./usr/libdata/perl5/mips64-openbsd/CORE/EXTERN.h
-./usr/libdata/perl5/mips64-openbsd/CORE/INTERN.h
-./usr/libdata/perl5/mips64-openbsd/CORE/XSUB.h
-./usr/libdata/perl5/mips64-openbsd/CORE/av.h
-./usr/libdata/perl5/mips64-openbsd/CORE/bitcount.h
-./usr/libdata/perl5/mips64-openbsd/CORE/charclass_invlists.h
-./usr/libdata/perl5/mips64-openbsd/CORE/config.h
-./usr/libdata/perl5/mips64-openbsd/CORE/cop.h
-./usr/libdata/perl5/mips64-openbsd/CORE/cv.h
-./usr/libdata/perl5/mips64-openbsd/CORE/dosish.h
-./usr/libdata/perl5/mips64-openbsd/CORE/ebcdic_tables.h
-./usr/libdata/perl5/mips64-openbsd/CORE/embed.h
-./usr/libdata/perl5/mips64-openbsd/CORE/embedvar.h
-./usr/libdata/perl5/mips64-openbsd/CORE/fakesdio.h
-./usr/libdata/perl5/mips64-openbsd/CORE/feature.h
-./usr/libdata/perl5/mips64-openbsd/CORE/form.h
-./usr/libdata/perl5/mips64-openbsd/CORE/git_version.h
-./usr/libdata/perl5/mips64-openbsd/CORE/gv.h
-./usr/libdata/perl5/mips64-openbsd/CORE/handy.h
-./usr/libdata/perl5/mips64-openbsd/CORE/hv.h
-./usr/libdata/perl5/mips64-openbsd/CORE/hv_func.h
-./usr/libdata/perl5/mips64-openbsd/CORE/hv_macro.h
-./usr/libdata/perl5/mips64-openbsd/CORE/inline.h
-./usr/libdata/perl5/mips64-openbsd/CORE/intrpvar.h
-./usr/libdata/perl5/mips64-openbsd/CORE/invlist_inline.h
-./usr/libdata/perl5/mips64-openbsd/CORE/iperlsys.h
-./usr/libdata/perl5/mips64-openbsd/CORE/keywords.h
-./usr/libdata/perl5/mips64-openbsd/CORE/l1_char_class_tab.h
-./usr/libdata/perl5/mips64-openbsd/CORE/malloc_ctl.h
-./usr/libdata/perl5/mips64-openbsd/CORE/metaconfig.h
-./usr/libdata/perl5/mips64-openbsd/CORE/mg.h
-./usr/libdata/perl5/mips64-openbsd/CORE/mg_data.h
-./usr/libdata/perl5/mips64-openbsd/CORE/mg_names.inc
-./usr/libdata/perl5/mips64-openbsd/CORE/mg_raw.h
-./usr/libdata/perl5/mips64-openbsd/CORE/mg_vtable.h
-./usr/libdata/perl5/mips64-openbsd/CORE/mydtrace.h
-./usr/libdata/perl5/mips64-openbsd/CORE/nostdio.h
-./usr/libdata/perl5/mips64-openbsd/CORE/op.h
-./usr/libdata/perl5/mips64-openbsd/CORE/op_reg_common.h
-./usr/libdata/perl5/mips64-openbsd/CORE/opcode.h
-./usr/libdata/perl5/mips64-openbsd/CORE/opnames.h
-./usr/libdata/perl5/mips64-openbsd/CORE/overload.h
-./usr/libdata/perl5/mips64-openbsd/CORE/overload.inc
-./usr/libdata/perl5/mips64-openbsd/CORE/packsizetables.inc
-./usr/libdata/perl5/mips64-openbsd/CORE/pad.h
-./usr/libdata/perl5/mips64-openbsd/CORE/parser.h
-./usr/libdata/perl5/mips64-openbsd/CORE/patchlevel.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perl.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perl_inc_macro.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perl_langinfo.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perlapi.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perlio.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perliol.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perlsdio.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perlvars.h
-./usr/libdata/perl5/mips64-openbsd/CORE/perly.h
-./usr/libdata/perl5/mips64-openbsd/CORE/pp.h
-./usr/libdata/perl5/mips64-openbsd/CORE/pp_proto.h
-./usr/libdata/perl5/mips64-openbsd/CORE/proto.h
-./usr/libdata/perl5/mips64-openbsd/CORE/reentr.h
-./usr/libdata/perl5/mips64-openbsd/CORE/regcharclass.h
-./usr/libdata/perl5/mips64-openbsd/CORE/regcomp.h
-./usr/libdata/perl5/mips64-openbsd/CORE/regexp.h
-./usr/libdata/perl5/mips64-openbsd/CORE/regnodes.h
-./usr/libdata/perl5/mips64-openbsd/CORE/sbox32_hash.h
-./usr/libdata/perl5/mips64-openbsd/CORE/scope.h
-./usr/libdata/perl5/mips64-openbsd/CORE/stadtx_hash.h
-./usr/libdata/perl5/mips64-openbsd/CORE/sv.h
-./usr/libdata/perl5/mips64-openbsd/CORE/thread.h
-./usr/libdata/perl5/mips64-openbsd/CORE/time64.h
-./usr/libdata/perl5/mips64-openbsd/CORE/time64_config.h
-./usr/libdata/perl5/mips64-openbsd/CORE/uconfig.h
-./usr/libdata/perl5/mips64-openbsd/CORE/uni_keywords.h
-./usr/libdata/perl5/mips64-openbsd/CORE/unicode_constants.h
-./usr/libdata/perl5/mips64-openbsd/CORE/unixish.h
-./usr/libdata/perl5/mips64-openbsd/CORE/utf8.h
-./usr/libdata/perl5/mips64-openbsd/CORE/utfebcdic.h
-./usr/libdata/perl5/mips64-openbsd/CORE/util.h
-./usr/libdata/perl5/mips64-openbsd/CORE/uudmap.h
-./usr/libdata/perl5/mips64-openbsd/CORE/vutil.h
-./usr/libdata/perl5/mips64-openbsd/CORE/vxs.inc
-./usr/libdata/perl5/mips64-openbsd/CORE/warnings.h
-./usr/libdata/perl5/mips64-openbsd/CORE/zaphod32_hash.h
-./usr/libdata/perl5/mips64-openbsd/Compress
-./usr/libdata/perl5/mips64-openbsd/Compress/Raw
-./usr/libdata/perl5/mips64-openbsd/Compress/Raw/Bzip2.pm
-./usr/libdata/perl5/mips64-openbsd/Compress/Raw/Zlib.pm
-./usr/libdata/perl5/mips64-openbsd/Compress/Zlib.pm
-./usr/libdata/perl5/mips64-openbsd/Config.pm
-./usr/libdata/perl5/mips64-openbsd/Config.pod
-./usr/libdata/perl5/mips64-openbsd/Config_git.pl
-./usr/libdata/perl5/mips64-openbsd/Config_heavy.pl
-./usr/libdata/perl5/mips64-openbsd/Cwd.pm
-./usr/libdata/perl5/mips64-openbsd/DB_File.pm
-./usr/libdata/perl5/mips64-openbsd/Data
-./usr/libdata/perl5/mips64-openbsd/Data/Dumper.pm
-./usr/libdata/perl5/mips64-openbsd/Devel
-./usr/libdata/perl5/mips64-openbsd/Devel/PPPort.pm
-./usr/libdata/perl5/mips64-openbsd/Devel/Peek.pm
-./usr/libdata/perl5/mips64-openbsd/Digest
-./usr/libdata/perl5/mips64-openbsd/Digest/MD5.pm
-./usr/libdata/perl5/mips64-openbsd/Digest/SHA.pm
-./usr/libdata/perl5/mips64-openbsd/DynaLoader.pm
-./usr/libdata/perl5/mips64-openbsd/Encode
-./usr/libdata/perl5/mips64-openbsd/Encode.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Alias.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Byte.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/CJKConstants.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/CN
-./usr/libdata/perl5/mips64-openbsd/Encode/CN.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/CN/HZ.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Config.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/EBCDIC.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Encoder.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Encoding.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/GSM0338.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Guess.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/JP
-./usr/libdata/perl5/mips64-openbsd/Encode/JP.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/JP/H2Z.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/JP/JIS7.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/KR
-./usr/libdata/perl5/mips64-openbsd/Encode/KR.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/KR/2022_KR.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/MIME
-./usr/libdata/perl5/mips64-openbsd/Encode/MIME/Header
-./usr/libdata/perl5/mips64-openbsd/Encode/MIME/Header.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/MIME/Header/ISO_2022_JP.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/MIME/Name.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Symbol.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/TW.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Unicode
-./usr/libdata/perl5/mips64-openbsd/Encode/Unicode.pm
-./usr/libdata/perl5/mips64-openbsd/Encode/Unicode/UTF7.pm
-./usr/libdata/perl5/mips64-openbsd/Errno.pm
-./usr/libdata/perl5/mips64-openbsd/Fcntl.pm
-./usr/libdata/perl5/mips64-openbsd/File
-./usr/libdata/perl5/mips64-openbsd/File/DosGlob.pm
-./usr/libdata/perl5/mips64-openbsd/File/Glob.pm
-./usr/libdata/perl5/mips64-openbsd/File/GlobMapper.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec
-./usr/libdata/perl5/mips64-openbsd/File/Spec.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/AmigaOS.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/Cygwin.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/Epoc.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/Functions.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/Mac.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/OS2.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/Unix.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/VMS.pm
-./usr/libdata/perl5/mips64-openbsd/File/Spec/Win32.pm
-./usr/libdata/perl5/mips64-openbsd/Filter
-./usr/libdata/perl5/mips64-openbsd/Filter/Util
-./usr/libdata/perl5/mips64-openbsd/Filter/Util/Call.pm
-./usr/libdata/perl5/mips64-openbsd/Hash
-./usr/libdata/perl5/mips64-openbsd/Hash/Util
-./usr/libdata/perl5/mips64-openbsd/Hash/Util.pm
-./usr/libdata/perl5/mips64-openbsd/Hash/Util/FieldHash.pm
-./usr/libdata/perl5/mips64-openbsd/I18N
-./usr/libdata/perl5/mips64-openbsd/I18N/Langinfo.pm
-./usr/libdata/perl5/mips64-openbsd/IO
-./usr/libdata/perl5/mips64-openbsd/IO.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Adapter
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Adapter/Bzip2.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Adapter/Deflate.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Adapter/Identity.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Base
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Base.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Base/Common.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Bzip2.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Deflate.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Gzip
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Gzip.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Gzip/Constants.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/RawDeflate.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Zip
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Zip.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Zip/Constants.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Zlib
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Zlib/Constants.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Compress/Zlib/Extra.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Dir.pm
-./usr/libdata/perl5/mips64-openbsd/IO/File.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Handle.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Pipe.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Poll.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Seekable.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Select.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Socket
-./usr/libdata/perl5/mips64-openbsd/IO/Socket.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Socket/INET.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Socket/UNIX.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Adapter
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Adapter/Bunzip2.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Adapter/Identity.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Adapter/Inflate.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/AnyInflate.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/AnyUncompress.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Base.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Bunzip2.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Gunzip.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Inflate.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/RawInflate.pm
-./usr/libdata/perl5/mips64-openbsd/IO/Uncompress/Unzip.pm
-./usr/libdata/perl5/mips64-openbsd/IPC
-./usr/libdata/perl5/mips64-openbsd/IPC/Msg.pm
-./usr/libdata/perl5/mips64-openbsd/IPC/Semaphore.pm
-./usr/libdata/perl5/mips64-openbsd/IPC/SharedMem.pm
-./usr/libdata/perl5/mips64-openbsd/IPC/SysV.pm
-./usr/libdata/perl5/mips64-openbsd/List
-./usr/libdata/perl5/mips64-openbsd/List/Util
-./usr/libdata/perl5/mips64-openbsd/List/Util.pm
-./usr/libdata/perl5/mips64-openbsd/List/Util/XS.pm
-./usr/libdata/perl5/mips64-openbsd/MIME
-./usr/libdata/perl5/mips64-openbsd/MIME/Base64.pm
-./usr/libdata/perl5/mips64-openbsd/MIME/QuotedPrint.pm
-./usr/libdata/perl5/mips64-openbsd/Math
-./usr/libdata/perl5/mips64-openbsd/Math/BigInt
-./usr/libdata/perl5/mips64-openbsd/Math/BigInt/FastCalc.pm
-./usr/libdata/perl5/mips64-openbsd/NDBM_File.pm
-./usr/libdata/perl5/mips64-openbsd/O.pm
-./usr/libdata/perl5/mips64-openbsd/Opcode.pm
-./usr/libdata/perl5/mips64-openbsd/OpenBSD
-./usr/libdata/perl5/mips64-openbsd/OpenBSD/MkTemp.pm
-./usr/libdata/perl5/mips64-openbsd/OpenBSD/Pledge.pm
-./usr/libdata/perl5/mips64-openbsd/OpenBSD/Unveil.pm
-./usr/libdata/perl5/mips64-openbsd/POSIX.pm
-./usr/libdata/perl5/mips64-openbsd/POSIX.pod
-./usr/libdata/perl5/mips64-openbsd/PerlIO
-./usr/libdata/perl5/mips64-openbsd/PerlIO/encoding.pm
-./usr/libdata/perl5/mips64-openbsd/PerlIO/mmap.pm
-./usr/libdata/perl5/mips64-openbsd/PerlIO/scalar.pm
-./usr/libdata/perl5/mips64-openbsd/PerlIO/via.pm
-./usr/libdata/perl5/mips64-openbsd/SDBM_File.pm
-./usr/libdata/perl5/mips64-openbsd/Scalar
-./usr/libdata/perl5/mips64-openbsd/Scalar/Util.pm
-./usr/libdata/perl5/mips64-openbsd/Socket.pm
-./usr/libdata/perl5/mips64-openbsd/Storable.pm
-./usr/libdata/perl5/mips64-openbsd/Sub
-./usr/libdata/perl5/mips64-openbsd/Sub/Util.pm
-./usr/libdata/perl5/mips64-openbsd/Sys
-./usr/libdata/perl5/mips64-openbsd/Sys/Hostname.pm
-./usr/libdata/perl5/mips64-openbsd/Sys/Syslog.pm
-./usr/libdata/perl5/mips64-openbsd/Term
-./usr/libdata/perl5/mips64-openbsd/Term/ReadKey.pm
-./usr/libdata/perl5/mips64-openbsd/Time
-./usr/libdata/perl5/mips64-openbsd/Time/HiRes.pm
-./usr/libdata/perl5/mips64-openbsd/Time/Piece.pm
-./usr/libdata/perl5/mips64-openbsd/Time/Seconds.pm
-./usr/libdata/perl5/mips64-openbsd/Unicode
-./usr/libdata/perl5/mips64-openbsd/Unicode/Collate
-./usr/libdata/perl5/mips64-openbsd/Unicode/Collate.pm
-./usr/libdata/perl5/mips64-openbsd/Unicode/Collate/Locale.pm
-./usr/libdata/perl5/mips64-openbsd/Unicode/Normalize.pm
-./usr/libdata/perl5/mips64-openbsd/attributes.pm
-./usr/libdata/perl5/mips64-openbsd/auto
-./usr/libdata/perl5/mips64-openbsd/auto/B
-./usr/libdata/perl5/mips64-openbsd/auto/B/B.so
-./usr/libdata/perl5/mips64-openbsd/auto/Compress
-./usr/libdata/perl5/mips64-openbsd/auto/Compress/Raw
-./usr/libdata/perl5/mips64-openbsd/auto/Compress/Raw/Bzip2
-./usr/libdata/perl5/mips64-openbsd/auto/Compress/Raw/Bzip2/Bzip2.so
-./usr/libdata/perl5/mips64-openbsd/auto/Compress/Raw/Zlib
-./usr/libdata/perl5/mips64-openbsd/auto/Compress/Raw/Zlib/Zlib.so
-./usr/libdata/perl5/mips64-openbsd/auto/Cwd
-./usr/libdata/perl5/mips64-openbsd/auto/Cwd/Cwd.so
-./usr/libdata/perl5/mips64-openbsd/auto/DB_File
-./usr/libdata/perl5/mips64-openbsd/auto/DB_File/DB_File.so
-./usr/libdata/perl5/mips64-openbsd/auto/Data
-./usr/libdata/perl5/mips64-openbsd/auto/Data/Dumper
-./usr/libdata/perl5/mips64-openbsd/auto/Data/Dumper/Dumper.so
-./usr/libdata/perl5/mips64-openbsd/auto/Devel
-./usr/libdata/perl5/mips64-openbsd/auto/Devel/Peek
-./usr/libdata/perl5/mips64-openbsd/auto/Devel/Peek/Peek.so
-./usr/libdata/perl5/mips64-openbsd/auto/Digest
-./usr/libdata/perl5/mips64-openbsd/auto/Digest/MD5
-./usr/libdata/perl5/mips64-openbsd/auto/Digest/MD5/MD5.so
-./usr/libdata/perl5/mips64-openbsd/auto/Digest/SHA
-./usr/libdata/perl5/mips64-openbsd/auto/Digest/SHA/SHA.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/Byte
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/Byte/Byte.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/CN
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/CN/CN.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/EBCDIC
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/EBCDIC/EBCDIC.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/Encode.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/JP
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/JP/JP.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/KR
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/KR/KR.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/Symbol
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/Symbol/Symbol.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/TW
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/TW/TW.so
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/Unicode
-./usr/libdata/perl5/mips64-openbsd/auto/Encode/Unicode/Unicode.so
-./usr/libdata/perl5/mips64-openbsd/auto/Fcntl
-./usr/libdata/perl5/mips64-openbsd/auto/Fcntl/Fcntl.so
-./usr/libdata/perl5/mips64-openbsd/auto/File
-./usr/libdata/perl5/mips64-openbsd/auto/File/DosGlob
-./usr/libdata/perl5/mips64-openbsd/auto/File/DosGlob/DosGlob.so
-./usr/libdata/perl5/mips64-openbsd/auto/File/Glob
-./usr/libdata/perl5/mips64-openbsd/auto/File/Glob/Glob.so
-./usr/libdata/perl5/mips64-openbsd/auto/Filter
-./usr/libdata/perl5/mips64-openbsd/auto/Filter/Util
-./usr/libdata/perl5/mips64-openbsd/auto/Filter/Util/Call
-./usr/libdata/perl5/mips64-openbsd/auto/Filter/Util/Call/Call.so
-./usr/libdata/perl5/mips64-openbsd/auto/Hash
-./usr/libdata/perl5/mips64-openbsd/auto/Hash/Util
-./usr/libdata/perl5/mips64-openbsd/auto/Hash/Util/FieldHash
-./usr/libdata/perl5/mips64-openbsd/auto/Hash/Util/FieldHash/FieldHash.so
-./usr/libdata/perl5/mips64-openbsd/auto/Hash/Util/Util.so
-./usr/libdata/perl5/mips64-openbsd/auto/I18N
-./usr/libdata/perl5/mips64-openbsd/auto/I18N/Langinfo
-./usr/libdata/perl5/mips64-openbsd/auto/I18N/Langinfo/Langinfo.so
-./usr/libdata/perl5/mips64-openbsd/auto/IO
-./usr/libdata/perl5/mips64-openbsd/auto/IO/IO.so
-./usr/libdata/perl5/mips64-openbsd/auto/IPC
-./usr/libdata/perl5/mips64-openbsd/auto/IPC/SysV
-./usr/libdata/perl5/mips64-openbsd/auto/IPC/SysV/SysV.so
-./usr/libdata/perl5/mips64-openbsd/auto/List
-./usr/libdata/perl5/mips64-openbsd/auto/List/Util
-./usr/libdata/perl5/mips64-openbsd/auto/List/Util/Util.so
-./usr/libdata/perl5/mips64-openbsd/auto/MIME
-./usr/libdata/perl5/mips64-openbsd/auto/MIME/Base64
-./usr/libdata/perl5/mips64-openbsd/auto/MIME/Base64/Base64.so
-./usr/libdata/perl5/mips64-openbsd/auto/Math
-./usr/libdata/perl5/mips64-openbsd/auto/Math/BigInt
-./usr/libdata/perl5/mips64-openbsd/auto/Math/BigInt/FastCalc
-./usr/libdata/perl5/mips64-openbsd/auto/Math/BigInt/FastCalc/FastCalc.so
-./usr/libdata/perl5/mips64-openbsd/auto/NDBM_File
-./usr/libdata/perl5/mips64-openbsd/auto/NDBM_File/NDBM_File.so
-./usr/libdata/perl5/mips64-openbsd/auto/Opcode
-./usr/libdata/perl5/mips64-openbsd/auto/Opcode/Opcode.so
-./usr/libdata/perl5/mips64-openbsd/auto/OpenBSD
-./usr/libdata/perl5/mips64-openbsd/auto/OpenBSD/MkTemp
-./usr/libdata/perl5/mips64-openbsd/auto/OpenBSD/MkTemp/MkTemp.so
-./usr/libdata/perl5/mips64-openbsd/auto/OpenBSD/Pledge
-./usr/libdata/perl5/mips64-openbsd/auto/OpenBSD/Pledge/Pledge.so
-./usr/libdata/perl5/mips64-openbsd/auto/OpenBSD/Unveil
-./usr/libdata/perl5/mips64-openbsd/auto/OpenBSD/Unveil/Unveil.so
-./usr/libdata/perl5/mips64-openbsd/auto/POSIX
-./usr/libdata/perl5/mips64-openbsd/auto/POSIX/POSIX.so
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/encoding
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/encoding/encoding.so
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/mmap
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/mmap/mmap.so
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/scalar
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/scalar/scalar.so
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/via
-./usr/libdata/perl5/mips64-openbsd/auto/PerlIO/via/via.so
-./usr/libdata/perl5/mips64-openbsd/auto/SDBM_File
-./usr/libdata/perl5/mips64-openbsd/auto/SDBM_File/SDBM_File.so
-./usr/libdata/perl5/mips64-openbsd/auto/Socket
-./usr/libdata/perl5/mips64-openbsd/auto/Socket/Socket.so
-./usr/libdata/perl5/mips64-openbsd/auto/Storable
-./usr/libdata/perl5/mips64-openbsd/auto/Storable/Storable.so
-./usr/libdata/perl5/mips64-openbsd/auto/Sys
-./usr/libdata/perl5/mips64-openbsd/auto/Sys/Hostname
-./usr/libdata/perl5/mips64-openbsd/auto/Sys/Hostname/Hostname.so
-./usr/libdata/perl5/mips64-openbsd/auto/Sys/Syslog
-./usr/libdata/perl5/mips64-openbsd/auto/Sys/Syslog/Syslog.so
-./usr/libdata/perl5/mips64-openbsd/auto/Term
-./usr/libdata/perl5/mips64-openbsd/auto/Term/ReadKey
-./usr/libdata/perl5/mips64-openbsd/auto/Term/ReadKey/ReadKey.so
-./usr/libdata/perl5/mips64-openbsd/auto/Time
-./usr/libdata/perl5/mips64-openbsd/auto/Time/HiRes
-./usr/libdata/perl5/mips64-openbsd/auto/Time/HiRes/HiRes.so
-./usr/libdata/perl5/mips64-openbsd/auto/Time/Piece
-./usr/libdata/perl5/mips64-openbsd/auto/Time/Piece/Piece.so
-./usr/libdata/perl5/mips64-openbsd/auto/Unicode
-./usr/libdata/perl5/mips64-openbsd/auto/Unicode/Collate
-./usr/libdata/perl5/mips64-openbsd/auto/Unicode/Collate/Collate.so
-./usr/libdata/perl5/mips64-openbsd/auto/Unicode/Normalize
-./usr/libdata/perl5/mips64-openbsd/auto/Unicode/Normalize/Normalize.so
-./usr/libdata/perl5/mips64-openbsd/auto/attributes
-./usr/libdata/perl5/mips64-openbsd/auto/attributes/attributes.so
-./usr/libdata/perl5/mips64-openbsd/auto/mro
-./usr/libdata/perl5/mips64-openbsd/auto/mro/mro.so
-./usr/libdata/perl5/mips64-openbsd/auto/re
-./usr/libdata/perl5/mips64-openbsd/auto/re/re.so
-./usr/libdata/perl5/mips64-openbsd/auto/threads
-./usr/libdata/perl5/mips64-openbsd/auto/threads/shared
-./usr/libdata/perl5/mips64-openbsd/auto/threads/shared/shared.so
-./usr/libdata/perl5/mips64-openbsd/auto/threads/threads.so
-./usr/libdata/perl5/mips64-openbsd/encoding.pm
-./usr/libdata/perl5/mips64-openbsd/lib.pm
-./usr/libdata/perl5/mips64-openbsd/mro.pm
-./usr/libdata/perl5/mips64-openbsd/ops.pm
-./usr/libdata/perl5/mips64-openbsd/re.pm
-./usr/libdata/perl5/mips64-openbsd/threads
-./usr/libdata/perl5/mips64-openbsd/threads.pm
-./usr/libdata/perl5/mips64-openbsd/threads/shared.pm
-./usr/local/libdata/perl5/site_perl/mips64-openbsd
-./usr/mdec/boot-IP22
-./usr/mdec/boot-IP26
-./usr/mdec/boot-IP27
-./usr/mdec/boot-IP28
-./usr/mdec/boot-IP30
-./usr/mdec/boot-IP32
-./usr/mdec/boot32
-./usr/mdec/boot64
-./usr/mdec/bootecoff
-./usr/mdec/sgivol
-./usr/sbin/hotplugd
-./usr/sbin/pcidump
-./usr/sbin/wsconscfg
./usr/share/man/man3
./usr/share/man/man3/loongson
./usr/share/man/man3/octeon
-./usr/share/man/man3/sgi
./usr/share/man/man3p
./usr/share/man/man4
./usr/share/man/man4/alpha
./usr/share/man/man4/octeon
./usr/share/man/man4/powerpc64
./usr/share/man/man4/riscv64
-./usr/share/man/man4/sgi
./usr/share/man/man4/sparc64
./usr/share/man/man5
./usr/share/man/man5/sparc64
./usr/share/man/man8/octeon
./usr/share/man/man8/powerpc64
./usr/share/man/man8/riscv64
-./usr/share/man/man8/sgi
./usr/share/man/man8/sparc64
./usr/share/man/man8/user.8
./usr/share/man/man8/useradd.8
+++ /dev/null
-./usr/bin/ld.lld
-./usr/bin/llvm-config
-./usr/include/c++
-./usr/include/c++/v1
-./usr/include/c++/v1/__bit_reference
-./usr/include/c++/v1/__bsd_locale_defaults.h
-./usr/include/c++/v1/__bsd_locale_fallbacks.h
-./usr/include/c++/v1/__config
-./usr/include/c++/v1/__config_site.in
-./usr/include/c++/v1/__cxxabi_config.h
-./usr/include/c++/v1/__debug
-./usr/include/c++/v1/__errc
-./usr/include/c++/v1/__functional_03
-./usr/include/c++/v1/__functional_base
-./usr/include/c++/v1/__functional_base_03
-./usr/include/c++/v1/__hash_table
-./usr/include/c++/v1/__libcpp_version
-./usr/include/c++/v1/__libunwind_config.h
-./usr/include/c++/v1/__locale
-./usr/include/c++/v1/__mutex_base
-./usr/include/c++/v1/__node_handle
-./usr/include/c++/v1/__nullptr
-./usr/include/c++/v1/__split_buffer
-./usr/include/c++/v1/__sso_allocator
-./usr/include/c++/v1/__std_stream
-./usr/include/c++/v1/__string
-./usr/include/c++/v1/__threading_support
-./usr/include/c++/v1/__tree
-./usr/include/c++/v1/__tuple
-./usr/include/c++/v1/__undef_macros
-./usr/include/c++/v1/algorithm
-./usr/include/c++/v1/any
-./usr/include/c++/v1/array
-./usr/include/c++/v1/atomic
-./usr/include/c++/v1/barrier
-./usr/include/c++/v1/bit
-./usr/include/c++/v1/bitset
-./usr/include/c++/v1/cassert
-./usr/include/c++/v1/ccomplex
-./usr/include/c++/v1/cctype
-./usr/include/c++/v1/cerrno
-./usr/include/c++/v1/cfenv
-./usr/include/c++/v1/cfloat
-./usr/include/c++/v1/charconv
-./usr/include/c++/v1/chrono
-./usr/include/c++/v1/cinttypes
-./usr/include/c++/v1/ciso646
-./usr/include/c++/v1/climits
-./usr/include/c++/v1/clocale
-./usr/include/c++/v1/cmath
-./usr/include/c++/v1/codecvt
-./usr/include/c++/v1/compare
-./usr/include/c++/v1/complex
-./usr/include/c++/v1/complex.h
-./usr/include/c++/v1/concepts
-./usr/include/c++/v1/condition_variable
-./usr/include/c++/v1/csetjmp
-./usr/include/c++/v1/csignal
-./usr/include/c++/v1/cstdarg
-./usr/include/c++/v1/cstdbool
-./usr/include/c++/v1/cstddef
-./usr/include/c++/v1/cstdint
-./usr/include/c++/v1/cstdio
-./usr/include/c++/v1/cstdlib
-./usr/include/c++/v1/cstring
-./usr/include/c++/v1/ctgmath
-./usr/include/c++/v1/ctime
-./usr/include/c++/v1/ctype.h
-./usr/include/c++/v1/cwchar
-./usr/include/c++/v1/cwctype
-./usr/include/c++/v1/cxxabi.h
-./usr/include/c++/v1/deque
-./usr/include/c++/v1/errno.h
-./usr/include/c++/v1/exception
-./usr/include/c++/v1/execution
-./usr/include/c++/v1/experimental
-./usr/include/c++/v1/experimental/__config
-./usr/include/c++/v1/experimental/__memory
-./usr/include/c++/v1/experimental/algorithm
-./usr/include/c++/v1/experimental/coroutine
-./usr/include/c++/v1/experimental/deque
-./usr/include/c++/v1/experimental/filesystem
-./usr/include/c++/v1/experimental/forward_list
-./usr/include/c++/v1/experimental/functional
-./usr/include/c++/v1/experimental/iterator
-./usr/include/c++/v1/experimental/list
-./usr/include/c++/v1/experimental/map
-./usr/include/c++/v1/experimental/memory_resource
-./usr/include/c++/v1/experimental/propagate_const
-./usr/include/c++/v1/experimental/regex
-./usr/include/c++/v1/experimental/set
-./usr/include/c++/v1/experimental/simd
-./usr/include/c++/v1/experimental/string
-./usr/include/c++/v1/experimental/type_traits
-./usr/include/c++/v1/experimental/unordered_map
-./usr/include/c++/v1/experimental/unordered_set
-./usr/include/c++/v1/experimental/utility
-./usr/include/c++/v1/experimental/vector
-./usr/include/c++/v1/ext
-./usr/include/c++/v1/ext/__hash
-./usr/include/c++/v1/ext/hash_map
-./usr/include/c++/v1/ext/hash_set
-./usr/include/c++/v1/fenv.h
-./usr/include/c++/v1/filesystem
-./usr/include/c++/v1/float.h
-./usr/include/c++/v1/forward_list
-./usr/include/c++/v1/fstream
-./usr/include/c++/v1/functional
-./usr/include/c++/v1/future
-./usr/include/c++/v1/initializer_list
-./usr/include/c++/v1/inttypes.h
-./usr/include/c++/v1/iomanip
-./usr/include/c++/v1/ios
-./usr/include/c++/v1/iosfwd
-./usr/include/c++/v1/iostream
-./usr/include/c++/v1/istream
-./usr/include/c++/v1/iterator
-./usr/include/c++/v1/latch
-./usr/include/c++/v1/libunwind.h
-./usr/include/c++/v1/limits
-./usr/include/c++/v1/limits.h
-./usr/include/c++/v1/list
-./usr/include/c++/v1/locale
-./usr/include/c++/v1/locale.h
-./usr/include/c++/v1/mach-o
-./usr/include/c++/v1/mach-o/compact_unwind_encoding.h
-./usr/include/c++/v1/map
-./usr/include/c++/v1/math.h
-./usr/include/c++/v1/memory
-./usr/include/c++/v1/module.modulemap
-./usr/include/c++/v1/mutex
-./usr/include/c++/v1/new
-./usr/include/c++/v1/numbers
-./usr/include/c++/v1/numeric
-./usr/include/c++/v1/optional
-./usr/include/c++/v1/ostream
-./usr/include/c++/v1/queue
-./usr/include/c++/v1/random
-./usr/include/c++/v1/ratio
-./usr/include/c++/v1/regex
-./usr/include/c++/v1/scoped_allocator
-./usr/include/c++/v1/semaphore
-./usr/include/c++/v1/set
-./usr/include/c++/v1/setjmp.h
-./usr/include/c++/v1/shared_mutex
-./usr/include/c++/v1/span
-./usr/include/c++/v1/sstream
-./usr/include/c++/v1/stack
-./usr/include/c++/v1/stdbool.h
-./usr/include/c++/v1/stddef.h
-./usr/include/c++/v1/stdexcept
-./usr/include/c++/v1/stdint.h
-./usr/include/c++/v1/stdio.h
-./usr/include/c++/v1/stdlib.h
-./usr/include/c++/v1/streambuf
-./usr/include/c++/v1/string
-./usr/include/c++/v1/string.h
-./usr/include/c++/v1/string_view
-./usr/include/c++/v1/strstream
-./usr/include/c++/v1/support
-./usr/include/c++/v1/support/newlib
-./usr/include/c++/v1/support/newlib/xlocale.h
-./usr/include/c++/v1/support/xlocale
-./usr/include/c++/v1/support/xlocale/__nop_locale_mgmt.h
-./usr/include/c++/v1/support/xlocale/__posix_l_fallback.h
-./usr/include/c++/v1/support/xlocale/__strtonum_fallback.h
-./usr/include/c++/v1/system_error
-./usr/include/c++/v1/tgmath.h
-./usr/include/c++/v1/thread
-./usr/include/c++/v1/tuple
-./usr/include/c++/v1/type_traits
-./usr/include/c++/v1/typeindex
-./usr/include/c++/v1/typeinfo
-./usr/include/c++/v1/unordered_map
-./usr/include/c++/v1/unordered_set
-./usr/include/c++/v1/unwind.h
-./usr/include/c++/v1/utility
-./usr/include/c++/v1/valarray
-./usr/include/c++/v1/variant
-./usr/include/c++/v1/vector
-./usr/include/c++/v1/version
-./usr/include/c++/v1/wchar.h
-./usr/include/c++/v1/wctype.h
-./usr/include/llvm
-./usr/include/llvm-c
-./usr/include/llvm-c/Analysis.h
-./usr/include/llvm-c/BitReader.h
-./usr/include/llvm-c/BitWriter.h
-./usr/include/llvm-c/Comdat.h
-./usr/include/llvm-c/Core.h
-./usr/include/llvm-c/DataTypes.h
-./usr/include/llvm-c/DebugInfo.h
-./usr/include/llvm-c/Disassembler.h
-./usr/include/llvm-c/DisassemblerTypes.h
-./usr/include/llvm-c/Error.h
-./usr/include/llvm-c/ErrorHandling.h
-./usr/include/llvm-c/ExecutionEngine.h
-./usr/include/llvm-c/ExternC.h
-./usr/include/llvm-c/IRReader.h
-./usr/include/llvm-c/Initialization.h
-./usr/include/llvm-c/LinkTimeOptimizer.h
-./usr/include/llvm-c/Linker.h
-./usr/include/llvm-c/Object.h
-./usr/include/llvm-c/Orc.h
-./usr/include/llvm-c/OrcBindings.h
-./usr/include/llvm-c/Remarks.h
-./usr/include/llvm-c/Support.h
-./usr/include/llvm-c/Target.h
-./usr/include/llvm-c/TargetMachine.h
-./usr/include/llvm-c/Transforms
-./usr/include/llvm-c/Transforms/AggressiveInstCombine.h
-./usr/include/llvm-c/Transforms/Coroutines.h
-./usr/include/llvm-c/Transforms/IPO.h
-./usr/include/llvm-c/Transforms/InstCombine.h
-./usr/include/llvm-c/Transforms/PassManagerBuilder.h
-./usr/include/llvm-c/Transforms/Scalar.h
-./usr/include/llvm-c/Transforms/Utils.h
-./usr/include/llvm-c/Transforms/Vectorize.h
-./usr/include/llvm-c/Types.h
-./usr/include/llvm-c/lto.h
-./usr/include/llvm/ADT
-./usr/include/llvm/ADT/APFloat.h
-./usr/include/llvm/ADT/APInt.h
-./usr/include/llvm/ADT/APSInt.h
-./usr/include/llvm/ADT/AllocatorList.h
-./usr/include/llvm/ADT/Any.h
-./usr/include/llvm/ADT/ArrayRef.h
-./usr/include/llvm/ADT/BitVector.h
-./usr/include/llvm/ADT/Bitfields.h
-./usr/include/llvm/ADT/BitmaskEnum.h
-./usr/include/llvm/ADT/BreadthFirstIterator.h
-./usr/include/llvm/ADT/CachedHashString.h
-./usr/include/llvm/ADT/CoalescingBitVector.h
-./usr/include/llvm/ADT/DAGDeltaAlgorithm.h
-./usr/include/llvm/ADT/DeltaAlgorithm.h
-./usr/include/llvm/ADT/DenseMap.h
-./usr/include/llvm/ADT/DenseMapInfo.h
-./usr/include/llvm/ADT/DenseSet.h
-./usr/include/llvm/ADT/DepthFirstIterator.h
-./usr/include/llvm/ADT/DirectedGraph.h
-./usr/include/llvm/ADT/EnumeratedArray.h
-./usr/include/llvm/ADT/EpochTracker.h
-./usr/include/llvm/ADT/EquivalenceClasses.h
-./usr/include/llvm/ADT/FloatingPointMode.h
-./usr/include/llvm/ADT/FoldingSet.h
-./usr/include/llvm/ADT/FunctionExtras.h
-./usr/include/llvm/ADT/GraphTraits.h
-./usr/include/llvm/ADT/Hashing.h
-./usr/include/llvm/ADT/ImmutableList.h
-./usr/include/llvm/ADT/ImmutableMap.h
-./usr/include/llvm/ADT/ImmutableSet.h
-./usr/include/llvm/ADT/IndexedMap.h
-./usr/include/llvm/ADT/IntEqClasses.h
-./usr/include/llvm/ADT/IntervalMap.h
-./usr/include/llvm/ADT/IntrusiveRefCntPtr.h
-./usr/include/llvm/ADT/MapVector.h
-./usr/include/llvm/ADT/None.h
-./usr/include/llvm/ADT/Optional.h
-./usr/include/llvm/ADT/PackedVector.h
-./usr/include/llvm/ADT/PointerEmbeddedInt.h
-./usr/include/llvm/ADT/PointerIntPair.h
-./usr/include/llvm/ADT/PointerSumType.h
-./usr/include/llvm/ADT/PointerUnion.h
-./usr/include/llvm/ADT/PostOrderIterator.h
-./usr/include/llvm/ADT/PriorityQueue.h
-./usr/include/llvm/ADT/PriorityWorklist.h
-./usr/include/llvm/ADT/SCCIterator.h
-./usr/include/llvm/ADT/STLExtras.h
-./usr/include/llvm/ADT/ScopeExit.h
-./usr/include/llvm/ADT/ScopedHashTable.h
-./usr/include/llvm/ADT/Sequence.h
-./usr/include/llvm/ADT/SetOperations.h
-./usr/include/llvm/ADT/SetVector.h
-./usr/include/llvm/ADT/SmallBitVector.h
-./usr/include/llvm/ADT/SmallPtrSet.h
-./usr/include/llvm/ADT/SmallSet.h
-./usr/include/llvm/ADT/SmallString.h
-./usr/include/llvm/ADT/SmallVector.h
-./usr/include/llvm/ADT/SparseBitVector.h
-./usr/include/llvm/ADT/SparseMultiSet.h
-./usr/include/llvm/ADT/SparseSet.h
-./usr/include/llvm/ADT/Statistic.h
-./usr/include/llvm/ADT/StringExtras.h
-./usr/include/llvm/ADT/StringMap.h
-./usr/include/llvm/ADT/StringMapEntry.h
-./usr/include/llvm/ADT/StringRef.h
-./usr/include/llvm/ADT/StringSet.h
-./usr/include/llvm/ADT/StringSwitch.h
-./usr/include/llvm/ADT/TinyPtrVector.h
-./usr/include/llvm/ADT/Triple.h
-./usr/include/llvm/ADT/Twine.h
-./usr/include/llvm/ADT/TypeSwitch.h
-./usr/include/llvm/ADT/UniqueVector.h
-./usr/include/llvm/ADT/Waymarking.h
-./usr/include/llvm/ADT/bit.h
-./usr/include/llvm/ADT/edit_distance.h
-./usr/include/llvm/ADT/fallible_iterator.h
-./usr/include/llvm/ADT/ilist.h
-./usr/include/llvm/ADT/ilist_base.h
-./usr/include/llvm/ADT/ilist_iterator.h
-./usr/include/llvm/ADT/ilist_node.h
-./usr/include/llvm/ADT/ilist_node_base.h
-./usr/include/llvm/ADT/ilist_node_options.h
-./usr/include/llvm/ADT/iterator.h
-./usr/include/llvm/ADT/iterator_range.h
-./usr/include/llvm/ADT/simple_ilist.h
-./usr/include/llvm/Analysis
-./usr/include/llvm/Analysis/AliasAnalysis.h
-./usr/include/llvm/Analysis/AliasAnalysisEvaluator.h
-./usr/include/llvm/Analysis/AliasSetTracker.h
-./usr/include/llvm/Analysis/AssumeBundleQueries.h
-./usr/include/llvm/Analysis/AssumptionCache.h
-./usr/include/llvm/Analysis/BasicAliasAnalysis.h
-./usr/include/llvm/Analysis/BlockFrequencyInfo.h
-./usr/include/llvm/Analysis/BlockFrequencyInfoImpl.h
-./usr/include/llvm/Analysis/BranchProbabilityInfo.h
-./usr/include/llvm/Analysis/CFG.h
-./usr/include/llvm/Analysis/CFGPrinter.h
-./usr/include/llvm/Analysis/CFLAliasAnalysisUtils.h
-./usr/include/llvm/Analysis/CFLAndersAliasAnalysis.h
-./usr/include/llvm/Analysis/CFLSteensAliasAnalysis.h
-./usr/include/llvm/Analysis/CGSCCPassManager.h
-./usr/include/llvm/Analysis/CallGraph.h
-./usr/include/llvm/Analysis/CallGraphSCCPass.h
-./usr/include/llvm/Analysis/CallPrinter.h
-./usr/include/llvm/Analysis/CaptureTracking.h
-./usr/include/llvm/Analysis/CmpInstAnalysis.h
-./usr/include/llvm/Analysis/CodeMetrics.h
-./usr/include/llvm/Analysis/ConstantFolding.h
-./usr/include/llvm/Analysis/DDG.h
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-./usr/include/g++/ext/pb_ds/detail/trie_policy/sample_trie_e_access_traits.hpp
-./usr/include/g++/ext/pb_ds/detail/trie_policy/sample_trie_node_update.hpp
-./usr/include/g++/ext/pb_ds/detail/trie_policy/string_trie_e_access_traits_imp.hpp
-./usr/include/g++/ext/pb_ds/detail/trie_policy/trie_policy_base.hpp
-./usr/include/g++/ext/pb_ds/detail/type_utils.hpp
-./usr/include/g++/ext/pb_ds/detail/types_traits.hpp
-./usr/include/g++/ext/pb_ds/detail/unordered_iterator
-./usr/include/g++/ext/pb_ds/detail/unordered_iterator/const_iterator.hpp
-./usr/include/g++/ext/pb_ds/detail/unordered_iterator/const_point_iterator.hpp
-./usr/include/g++/ext/pb_ds/detail/unordered_iterator/iterator.hpp
-./usr/include/g++/ext/pb_ds/detail/unordered_iterator/point_iterator.hpp
-./usr/include/g++/ext/pb_ds/exception.hpp
-./usr/include/g++/ext/pb_ds/hash_policy.hpp
-./usr/include/g++/ext/pb_ds/list_update_policy.hpp
-./usr/include/g++/ext/pb_ds/priority_queue.hpp
-./usr/include/g++/ext/pb_ds/tag_and_trait.hpp
-./usr/include/g++/ext/pb_ds/tree_policy.hpp
-./usr/include/g++/ext/pb_ds/trie_policy.hpp
-./usr/include/g++/ext/pod_char_traits.h
-./usr/include/g++/ext/pool_allocator.h
-./usr/include/g++/ext/rb_tree
-./usr/include/g++/ext/rc_string_base.h
-./usr/include/g++/ext/rope
-./usr/include/g++/ext/ropeimpl.h
-./usr/include/g++/ext/slist
-./usr/include/g++/ext/sso_string_base.h
-./usr/include/g++/ext/stdio_filebuf.h
-./usr/include/g++/ext/stdio_sync_filebuf.h
-./usr/include/g++/ext/throw_allocator.h
-./usr/include/g++/ext/type_traits.h
-./usr/include/g++/ext/typelist.h
-./usr/include/g++/ext/vstring.h
-./usr/include/g++/ext/vstring.tcc
-./usr/include/g++/ext/vstring_fwd.h
-./usr/include/g++/ext/vstring_util.h
-./usr/include/g++/fstream
-./usr/include/g++/functional
-./usr/include/g++/iomanip
-./usr/include/g++/ios
-./usr/include/g++/iosfwd
-./usr/include/g++/iostream
-./usr/include/g++/istream
-./usr/include/g++/iterator
-./usr/include/g++/limits
-./usr/include/g++/list
-./usr/include/g++/locale
-./usr/include/g++/map
-./usr/include/g++/memory
-./usr/include/g++/mips64-unknown-openbsd6.9
-./usr/include/g++/mips64-unknown-openbsd6.9/bits
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/atomic_word.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/basic_file.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/c++allocator.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/c++config.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/c++io.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/c++locale.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/c++locale_internal.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/compatibility.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/cpu_defines.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/ctype_base.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/ctype_inline.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/ctype_noninline.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/cxxabi_tweaks.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/gthr-default.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/gthr-posix.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/gthr-single.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/gthr-tpf.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/gthr.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/messages_members.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/os_defines.h
-./usr/include/g++/mips64-unknown-openbsd6.9/bits/time_members.h
-./usr/include/g++/new
-./usr/include/g++/numeric
-./usr/include/g++/ostream
-./usr/include/g++/queue
-./usr/include/g++/set
-./usr/include/g++/sstream
-./usr/include/g++/stack
-./usr/include/g++/stdexcept
-./usr/include/g++/streambuf
-./usr/include/g++/string
-./usr/include/g++/tr1
-./usr/include/g++/tr1/array
-./usr/include/g++/tr1/bind_iterate.h
-./usr/include/g++/tr1/bind_repeat.h
-./usr/include/g++/tr1/boost_shared_ptr.h
-./usr/include/g++/tr1/cctype
-./usr/include/g++/tr1/cfenv
-./usr/include/g++/tr1/cfloat
-./usr/include/g++/tr1/cinttypes
-./usr/include/g++/tr1/climits
-./usr/include/g++/tr1/cmath
-./usr/include/g++/tr1/common.h
-./usr/include/g++/tr1/complex
-./usr/include/g++/tr1/cstdarg
-./usr/include/g++/tr1/cstdbool
-./usr/include/g++/tr1/cstdint
-./usr/include/g++/tr1/cstdio
-./usr/include/g++/tr1/cstdlib
-./usr/include/g++/tr1/ctgmath
-./usr/include/g++/tr1/ctime
-./usr/include/g++/tr1/ctype.h
-./usr/include/g++/tr1/cwchar
-./usr/include/g++/tr1/cwctype
-./usr/include/g++/tr1/fenv.h
-./usr/include/g++/tr1/float.h
-./usr/include/g++/tr1/functional
-./usr/include/g++/tr1/functional_hash.h
-./usr/include/g++/tr1/functional_iterate.h
-./usr/include/g++/tr1/hashtable
-./usr/include/g++/tr1/hashtable_policy.h
-./usr/include/g++/tr1/inttypes.h
-./usr/include/g++/tr1/limits.h
-./usr/include/g++/tr1/math.h
-./usr/include/g++/tr1/memory
-./usr/include/g++/tr1/mu_iterate.h
-./usr/include/g++/tr1/random
-./usr/include/g++/tr1/random.tcc
-./usr/include/g++/tr1/ref_fwd.h
-./usr/include/g++/tr1/ref_wrap_iterate.h
-./usr/include/g++/tr1/repeat.h
-./usr/include/g++/tr1/stdarg.h
-./usr/include/g++/tr1/stdbool.h
-./usr/include/g++/tr1/stdint.h
-./usr/include/g++/tr1/stdio.h
-./usr/include/g++/tr1/stdlib.h
-./usr/include/g++/tr1/tgmath.h
-./usr/include/g++/tr1/tuple
-./usr/include/g++/tr1/tuple_defs.h
-./usr/include/g++/tr1/tuple_iterate.h
-./usr/include/g++/tr1/type_traits
-./usr/include/g++/tr1/type_traits_fwd.h
-./usr/include/g++/tr1/unordered_map
-./usr/include/g++/tr1/unordered_set
-./usr/include/g++/tr1/utility
-./usr/include/g++/tr1/wchar.h
-./usr/include/g++/tr1/wctype.h
-./usr/include/g++/typeinfo
-./usr/include/g++/utility
-./usr/include/g++/valarray
-./usr/include/g++/vector
-./usr/lib/gcc-lib
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1/cc1
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1/cc1obj
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1/cc1plus
-./usr/lib/gcc-lib/mips64-unknown-openbsd6.9/4.2.1/libgcov.a
-./usr/lib/libstdc++.a
-./usr/lib/libstdc++_p.a
-./usr/lib/libsupc++.a
-./usr/lib/libsupc++_p.a
-./usr/share/info/cpp.info
-./usr/share/info/cppinternals.info
-./usr/share/info/gcc.info
-./usr/share/info/gccint.info
-./usr/share/man/man1/gcc.1
-./usr/share/man/man1/gcov.1
-./usr/share/man/man1/ld.bfd.1
./usr/include/mips64
./usr/include/mips64/_float.h
./usr/include/mips64/_types.h
-./usr/include/mips64/arcbios.h
./usr/include/mips64/archtype.h
./usr/include/mips64/asm.h
./usr/include/mips64/atomic.h
./usr/include/mips64
./usr/include/mips64/_float.h
./usr/include/mips64/_types.h
-./usr/include/mips64/arcbios.h
./usr/include/mips64/archtype.h
./usr/include/mips64/asm.h
./usr/include/mips64/atomic.h
+++ /dev/null
-./usr/bin/addr2line
-./usr/bin/as
-./usr/bin/gdb
-./usr/bin/readelf
-./usr/include/ieeefp.h
-./usr/include/mips64
-./usr/include/mips64/_float.h
-./usr/include/mips64/_types.h
-./usr/include/mips64/arcbios.h
-./usr/include/mips64/archtype.h
-./usr/include/mips64/asm.h
-./usr/include/mips64/atomic.h
-./usr/include/mips64/autoconf.h
-./usr/include/mips64/cache.h
-./usr/include/mips64/cdefs.h
-./usr/include/mips64/cpu.h
-./usr/include/mips64/cpustate.h
-./usr/include/mips64/db_machdep.h
-./usr/include/mips64/endian.h
-./usr/include/mips64/exec.h
-./usr/include/mips64/fenv.h
-./usr/include/mips64/fpu.h
-./usr/include/mips64/frame.h
-./usr/include/mips64/ieee.h
-./usr/include/mips64/ieeefp.h
-./usr/include/mips64/kcore.h
-./usr/include/mips64/limits.h
-./usr/include/mips64/lock.h
-./usr/include/mips64/loongson2.h
-./usr/include/mips64/loongson3.h
-./usr/include/mips64/memconf.h
-./usr/include/mips64/mips_cpu.h
-./usr/include/mips64/mips_opcode.h
-./usr/include/mips64/mplock.h
-./usr/include/mips64/mutex.h
-./usr/include/mips64/param.h
-./usr/include/mips64/pcb.h
-./usr/include/mips64/pmap.h
-./usr/include/mips64/proc.h
-./usr/include/mips64/profile.h
-./usr/include/mips64/pte.h
-./usr/include/mips64/ptrace.h
-./usr/include/mips64/reg.h
-./usr/include/mips64/regdef.h
-./usr/include/mips64/regnum.h
-./usr/include/mips64/reloc.h
-./usr/include/mips64/setjmp.h
-./usr/include/mips64/signal.h
-./usr/include/mips64/spinlock.h
-./usr/include/mips64/sysarch.h
-./usr/include/mips64/tcb.h
-./usr/include/mips64/timetc.h
-./usr/include/mips64/trap.h
-./usr/include/mips64/vmparam.h
-./usr/include/sgi
-./usr/include/sgi/_float.h
-./usr/include/sgi/_types.h
-./usr/include/sgi/asm.h
-./usr/include/sgi/atomic.h
-./usr/include/sgi/autoconf.h
-./usr/include/sgi/bus.h
-./usr/include/sgi/cdefs.h
-./usr/include/sgi/conf.h
-./usr/include/sgi/cpu.h
-./usr/include/sgi/cpustate.h
-./usr/include/sgi/db_machdep.h
-./usr/include/sgi/disklabel.h
-./usr/include/sgi/eisa_machdep.h
-./usr/include/sgi/endian.h
-./usr/include/sgi/exec.h
-./usr/include/sgi/fenv.h
-./usr/include/sgi/fpu.h
-./usr/include/sgi/frame.h
-./usr/include/sgi/ieee.h
-./usr/include/sgi/ieeefp.h
-./usr/include/sgi/intr.h
-./usr/include/sgi/kcore.h
-./usr/include/sgi/limits.h
-./usr/include/sgi/loadfile_machdep.h
-./usr/include/sgi/lock.h
-./usr/include/sgi/memconf.h
-./usr/include/sgi/mips_opcode.h
-./usr/include/sgi/mnode.h
-./usr/include/sgi/mplock.h
-./usr/include/sgi/mutex.h
-./usr/include/sgi/param.h
-./usr/include/sgi/pcb.h
-./usr/include/sgi/pmap.h
-./usr/include/sgi/proc.h
-./usr/include/sgi/profile.h
-./usr/include/sgi/pte.h
-./usr/include/sgi/ptrace.h
-./usr/include/sgi/rbus_machdep.h
-./usr/include/sgi/reg.h
-./usr/include/sgi/regdef.h
-./usr/include/sgi/regnum.h
-./usr/include/sgi/reloc.h
-./usr/include/sgi/setjmp.h
-./usr/include/sgi/signal.h
-./usr/include/sgi/spinlock.h
-./usr/include/sgi/sysarch.h
-./usr/include/sgi/tcb.h
-./usr/include/sgi/timetc.h
-./usr/include/sgi/trap.h
-./usr/include/sgi/vmparam.h
-./usr/include/sgi/z8530var.h
-./usr/include/unwind.h
-./usr/libdata/ldscripts
-./usr/libdata/ldscripts/elf32btsmip.x
-./usr/libdata/ldscripts/elf32btsmip.xbn
-./usr/libdata/ldscripts/elf32btsmip.xc
-./usr/libdata/ldscripts/elf32btsmip.xd
-./usr/libdata/ldscripts/elf32btsmip.xdc
-./usr/libdata/ldscripts/elf32btsmip.xdcz
-./usr/libdata/ldscripts/elf32btsmip.xdw
-./usr/libdata/ldscripts/elf32btsmip.xdz
-./usr/libdata/ldscripts/elf32btsmip.xn
-./usr/libdata/ldscripts/elf32btsmip.xr
-./usr/libdata/ldscripts/elf32btsmip.xs
-./usr/libdata/ldscripts/elf32btsmip.xsc
-./usr/libdata/ldscripts/elf32btsmip.xsw
-./usr/libdata/ldscripts/elf32btsmip.xu
-./usr/libdata/ldscripts/elf32btsmip.xw
-./usr/libdata/ldscripts/elf32btsmip.xz
-./usr/libdata/ldscripts/elf32btsmipn32.x
-./usr/libdata/ldscripts/elf32btsmipn32.xbn
-./usr/libdata/ldscripts/elf32btsmipn32.xc
-./usr/libdata/ldscripts/elf32btsmipn32.xd
-./usr/libdata/ldscripts/elf32btsmipn32.xdc
-./usr/libdata/ldscripts/elf32btsmipn32.xdcz
-./usr/libdata/ldscripts/elf32btsmipn32.xdw
-./usr/libdata/ldscripts/elf32btsmipn32.xdz
-./usr/libdata/ldscripts/elf32btsmipn32.xn
-./usr/libdata/ldscripts/elf32btsmipn32.xr
-./usr/libdata/ldscripts/elf32btsmipn32.xs
-./usr/libdata/ldscripts/elf32btsmipn32.xsc
-./usr/libdata/ldscripts/elf32btsmipn32.xsw
-./usr/libdata/ldscripts/elf32btsmipn32.xu
-./usr/libdata/ldscripts/elf32btsmipn32.xw
-./usr/libdata/ldscripts/elf32btsmipn32.xz
-./usr/libdata/ldscripts/elf32ltsmip.x
-./usr/libdata/ldscripts/elf32ltsmip.xbn
-./usr/libdata/ldscripts/elf32ltsmip.xc
-./usr/libdata/ldscripts/elf32ltsmip.xd
-./usr/libdata/ldscripts/elf32ltsmip.xdc
-./usr/libdata/ldscripts/elf32ltsmip.xdcz
-./usr/libdata/ldscripts/elf32ltsmip.xdw
-./usr/libdata/ldscripts/elf32ltsmip.xdz
-./usr/libdata/ldscripts/elf32ltsmip.xn
-./usr/libdata/ldscripts/elf32ltsmip.xr
-./usr/libdata/ldscripts/elf32ltsmip.xs
-./usr/libdata/ldscripts/elf32ltsmip.xsc
-./usr/libdata/ldscripts/elf32ltsmip.xsw
-./usr/libdata/ldscripts/elf32ltsmip.xu
-./usr/libdata/ldscripts/elf32ltsmip.xw
-./usr/libdata/ldscripts/elf32ltsmip.xz
-./usr/libdata/ldscripts/elf32ltsmipn32.x
-./usr/libdata/ldscripts/elf32ltsmipn32.xbn
-./usr/libdata/ldscripts/elf32ltsmipn32.xc
-./usr/libdata/ldscripts/elf32ltsmipn32.xd
-./usr/libdata/ldscripts/elf32ltsmipn32.xdc
-./usr/libdata/ldscripts/elf32ltsmipn32.xdcz
-./usr/libdata/ldscripts/elf32ltsmipn32.xdw
-./usr/libdata/ldscripts/elf32ltsmipn32.xdz
-./usr/libdata/ldscripts/elf32ltsmipn32.xn
-./usr/libdata/ldscripts/elf32ltsmipn32.xr
-./usr/libdata/ldscripts/elf32ltsmipn32.xs
-./usr/libdata/ldscripts/elf32ltsmipn32.xsc
-./usr/libdata/ldscripts/elf32ltsmipn32.xsw
-./usr/libdata/ldscripts/elf32ltsmipn32.xu
-./usr/libdata/ldscripts/elf32ltsmipn32.xw
-./usr/libdata/ldscripts/elf32ltsmipn32.xz
-./usr/libdata/ldscripts/elf64btsmip_obsd.x
-./usr/libdata/ldscripts/elf64btsmip_obsd.xbn
-./usr/libdata/ldscripts/elf64btsmip_obsd.xc
-./usr/libdata/ldscripts/elf64btsmip_obsd.xd
-./usr/libdata/ldscripts/elf64btsmip_obsd.xdc
-./usr/libdata/ldscripts/elf64btsmip_obsd.xdcz
-./usr/libdata/ldscripts/elf64btsmip_obsd.xdw
-./usr/libdata/ldscripts/elf64btsmip_obsd.xdz
-./usr/libdata/ldscripts/elf64btsmip_obsd.xn
-./usr/libdata/ldscripts/elf64btsmip_obsd.xr
-./usr/libdata/ldscripts/elf64btsmip_obsd.xs
-./usr/libdata/ldscripts/elf64btsmip_obsd.xsc
-./usr/libdata/ldscripts/elf64btsmip_obsd.xsw
-./usr/libdata/ldscripts/elf64btsmip_obsd.xu
-./usr/libdata/ldscripts/elf64btsmip_obsd.xw
-./usr/libdata/ldscripts/elf64btsmip_obsd.xz
-./usr/libdata/ldscripts/elf64ltsmip.x
-./usr/libdata/ldscripts/elf64ltsmip.xbn
-./usr/libdata/ldscripts/elf64ltsmip.xc
-./usr/libdata/ldscripts/elf64ltsmip.xd
-./usr/libdata/ldscripts/elf64ltsmip.xdc
-./usr/libdata/ldscripts/elf64ltsmip.xdcz
-./usr/libdata/ldscripts/elf64ltsmip.xdw
-./usr/libdata/ldscripts/elf64ltsmip.xdz
-./usr/libdata/ldscripts/elf64ltsmip.xn
-./usr/libdata/ldscripts/elf64ltsmip.xr
-./usr/libdata/ldscripts/elf64ltsmip.xs
-./usr/libdata/ldscripts/elf64ltsmip.xsc
-./usr/libdata/ldscripts/elf64ltsmip.xsw
-./usr/libdata/ldscripts/elf64ltsmip.xu
-./usr/libdata/ldscripts/elf64ltsmip.xw
-./usr/libdata/ldscripts/elf64ltsmip.xz
-./usr/share/info/annotate.info
-./usr/share/info/as.info
-./usr/share/info/bfd.info
-./usr/share/info/gdb.info
-./usr/share/info/gdbint.info
-./usr/share/info/ld.info
-./usr/share/info/stabs.info
-./usr/share/man/man1/as.1
-./usr/share/man/man1/gdb.1
./usr/share/man/man3/setmode.3
./usr/share/man/man3/setproctitle.3
./usr/share/man/man3/setvbuf.3
-./usr/share/man/man3/sgi/cacheflush.3
-./usr/share/man/man3/sgi/get_fpc_csr.3
./usr/share/man/man3/shm_open.3
./usr/share/man/man3/sigaddset.3
./usr/share/man/man3/sigblock.3
./usr/share/man/man4/se.4
./usr/share/man/man4/ses.4
./usr/share/man/man4/sf.4
-./usr/share/man/man4/sgi/dpclock.4
-./usr/share/man/man4/sgi/dsclock.4
-./usr/share/man/man4/sgi/dsrtc.4
-./usr/share/man/man4/sgi/gbe.4
-./usr/share/man/man4/sgi/gio.4
-./usr/share/man/man4/sgi/grtwo.4
-./usr/share/man/man4/sgi/hpc.4
-./usr/share/man/man4/sgi/iec.4
-./usr/share/man/man4/sgi/imc.4
-./usr/share/man/man4/sgi/impact.4
-./usr/share/man/man4/sgi/intro.4
-./usr/share/man/man4/sgi/ioc.4
-./usr/share/man/man4/sgi/iockbc.4
-./usr/share/man/man4/sgi/iof.4
-./usr/share/man/man4/sgi/light.4
-./usr/share/man/man4/sgi/macebus.4
-./usr/share/man/man4/sgi/mavb.4
-./usr/share/man/man4/sgi/mec.4
-./usr/share/man/man4/sgi/mkbc.4
-./usr/share/man/man4/sgi/newport.4
-./usr/share/man/man4/sgi/odyssey.4
-./usr/share/man/man4/sgi/owmac.4
-./usr/share/man/man4/sgi/owserial.4
-./usr/share/man/man4/sgi/panel.4
-./usr/share/man/man4/sgi/power.4
-./usr/share/man/man4/sgi/sq.4
-./usr/share/man/man4/sgi/xbow.4
-./usr/share/man/man4/sgi/xbridge.4
-./usr/share/man/man4/sgi/xheart.4
-./usr/share/man/man4/sgi/zs.4
./usr/share/man/man4/sili.4
./usr/share/man/man4/simpleamp.4
./usr/share/man/man4/simpleaudio.4
./usr/share/man/man4/wbsio.4
./usr/share/man/man4/wd.4
./usr/share/man/man4/wdc.4
-./usr/share/man/man4/wdsc.4
./usr/share/man/man4/we.4
./usr/share/man/man4/wg.4
./usr/share/man/man4/wi.4
./usr/share/man/man8/sendmail.8
./usr/share/man/man8/sensorsd.8
./usr/share/man/man8/sftp-server.8
-./usr/share/man/man8/sgi/MAKEDEV.8
-./usr/share/man/man8/sgi/sgivol.8
./usr/share/man/man8/showmount.8
./usr/share/man/man8/shutdown.8
./usr/share/man/man8/skeyprune.8
+++ /dev/null
-# $OpenBSD: Makefile,v 1.5 2019/04/30 17:46:05 deraadt Exp $
-
-SUBDIR= ramdisk cdfs
-
-.if make(obj) || make(cleandir) || make(clean)
-SUBDIR+= iso
-.endif
-
-unconfig:
- cd ramdisk; ${MAKE} unconfig
-
-.include <bsd.subdir.mk>
+++ /dev/null
-# $OpenBSD: Makefile,v 1.31 2021/02/14 17:11:02 semarie Exp $
-
-FS= miniroot${OSrev}.img
-CDROM= cd${OSrev}.iso
-# must match the size of `minicdroot' in disktab
-CDFSMB= 15
-MOUNT_POINT= /mnt
-
-all: ${CDROM}
-
-ALLIP= 22 26 27 28 30 32
-
-# Note regarding sgivol -h value:
-# boot32 currently (2012/05/25) needs 87 512 byte sectors, boot64 needs 200,
-# bootecoff needs 77, the XFS partition needs 32768, and we need to keep some
-# room for growth.
-SGIVOLSZ= 33500
-
-${CDROM}:
- dd if=/dev/zero of=${FS} bs=1m count=${CDFSMB}
- vnconfig -v ${FS} > vnd
- disklabel -w `cat vnd` minicdroot "OpenBSD/${MACHINE}"
- newfs -O 1 -m 0 -o space -i 524288 /dev/r`cat vnd`a
- mount /dev/`cat vnd`a ${MOUNT_POINT}
- mkdir -p ${MOUNT_POINT}/${OSrev}/${MACHINE}
-.for IP in ${ALLIP}
- gzip -9cf ${.OBJDIR}/../ramdisk/bsd.rd.IP${IP} > \
- ${MOUNT_POINT}/bsd.IP${IP}
- ln ${MOUNT_POINT}/bsd.IP${IP} ${MOUNT_POINT}/bsd.rd.IP${IP}
- ln ${MOUNT_POINT}/bsd.IP${IP} ${MOUNT_POINT}/${OSrev}/${MACHINE}/bsd.IP${IP}
- ln ${MOUNT_POINT}/bsd.IP${IP} ${MOUNT_POINT}/${OSrev}/${MACHINE}/bsd.rd.IP${IP}
-.endfor
- cp ${DESTDIR}/usr/mdec/bootecoff ${MOUNT_POINT}/bootecoff
- cp ${DESTDIR}/usr/mdec/boot32 ${MOUNT_POINT}/boot32
- cp ${DESTDIR}/usr/mdec/boot64 ${MOUNT_POINT}/boot64
- umount ${MOUNT_POINT}
- df -i /dev/`cat vnd`a
- vnconfig -u `cat vnd`
- rm -f vnd
- dd if=/dev/zero of=${.OBJDIR}/${CDROM} bs=1m count=`expr ${CDFSMB} + 1 + ${SGIVOLSZ} / 2048`
- vnconfig -v ${CDROM} > vnd
- /usr/mdec/sgivol -i -h ${SGIVOLSZ} `cat vnd`
- uudecode -o ${.OBJDIR}/xfs512.bin.gz ${.CURDIR}/xfs512.bin.gz.uue
- gzip -d ${.OBJDIR}/xfs512.bin.gz
- cat ${DESTDIR}/usr/mdec/boot64 >> ${.OBJDIR}/xfs512.bin
- dd if=${.OBJDIR}/xfs512.bin of=${.OBJDIR}/xfs obs=16m conv=osync
- /usr/mdec/sgivol -w xfsboot ${.OBJDIR}/xfs `cat vnd`
- /usr/mdec/sgivol -w bootecoff ${DESTDIR}/usr/mdec/bootecoff `cat vnd`
- /usr/mdec/sgivol -l bootecoff sash `cat vnd`
- /usr/mdec/sgivol -w boot32 ${DESTDIR}/usr/mdec/boot32 `cat vnd`
- /usr/mdec/sgivol -l boot32 sashARCS `cat vnd`
- /usr/mdec/sgivol -w boot64 ${DESTDIR}/usr/mdec/boot64 `cat vnd`
- /usr/mdec/sgivol -l boot64 sash64 `cat vnd`
- vnconfig -u `cat vnd`
- rm -f vnd
- dd if=${FS} of=${CDROM} bs=512 seek=${SGIVOLSZ}
-
-unconfig:
- -umount -f ${MOUNT_POINT}
- -[ -f vnd ] && vnconfig -u `cat vnd` && rm -f vnd
-
-.ifdef RELEASEDIR
-install:
- cp ${CDROM} ${RELEASEDIR}
-.endif
-
-clean cleandir:
- rm -f ${CDROM} ${FS} xfs512.bin xfs
- rm -rf cd-dir
-
-.include <bsd.obj.mk>
+++ /dev/null
-This file contains the beginning of a minimal XFS filesystem, containing a
-single 1MB file, up to the beginning of the file, which is stored as
-contiguous sectors.
-
-It has been generated with
-
-dd if=/dev/zero of=xfs512.bin count=32768
-dd if=/dev/zero of=bootblk count=2048
-cat > proto << __EOF__
-dummy
-0 0
-d---777 0 0
-bootblk ---555 0 0 bootblk
-$
-__EOF__
-mkfs.xfs -p proto xfs512.bin
-
-begin 644 xfs512.bin.gz
-M'XL("#A@GE("`WAF<S4Q,BYB:6X`[-R]2L-0%`#@FUI!2P<'%S=7P4=PL/6W
-M='"P0C=W!Y^A.OL,3DY.'?P!$7'P`?H.(DZ"LX(UFFM3*PB.C=\')X<;0D+N
-MR85<R$U[?;L>PDS(?.7<UN[,WN+#VLMQX_'N?N'H->XN9ZG9B?D@YL-TD\3S
-M)/'0[ME):;#S2W5ZJEP-82XVEV->RE)E,_RN--+^N%8E!G_0KFVLY[4:U*TT
-MU*_)T.$36>TKJUE0@/HW1NJ_'.N<9..QV>G3+^X34#Y+XSR-BS0NC0@`@&*K
-MU5OUCW?]_#UW\MK<#@````HW_U\Q_P<``(!B:]3JK>_S_\]O^I=B\UD/`0``
-MP/A[>[JZ"?F:[]F0K_<>K/N.ZU^3[FVO]\^[*_GY/X3.V-]3&E.G\R'L[Q@/
-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
-M`````````````````````````````````````````````````+RW3_<X!`1A
-M`(9WEX12X0@*I2O0B42A<``MHG&`%1?0J?2.H708=_`74VS\)XJ1/$_S92<S
-MD[R9+```````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
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-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
-M````````````````````````````````````````````````````````````
-M`````````````````````````,2OVV\?L[2PE#W:-]CL#Z5JN1GF;;G^8&OA
-M_/'L<GTOKR2MT6PV'TW&YZ]E//UYDA6+T^?]G6V8+ZX,MY5#?]SO_TW_L!7F
-M!_W)?_0OIA_W-U:[,*^+M;LCZ;O^=9Y&UO_DA_^1^-]?OW[]^O7KUZ]?OW[]
-M^O7KUZ]?OW[]^O7KUZ]?OW[]^O7KUZ]?OW[]^O7KUZ]?OW[]^O7KUZ]?OW[]
-3^O7KUZ]?O_YXG`"3QN[X`,!+````
-`
-end
+++ /dev/null
-# $OpenBSD: Makefile,v 1.39 2021/02/14 17:11:02 semarie Exp $
-
-CDROM= install${OSrev}.iso
-RELXDIR?= /home/relx-${MACHINE}
-RELDIR?= /home/rel-${MACHINE}
-
-ALLIP= 22 26 27 28 30 32
-
-BASE= ${RELDIR}/base${OSrev}.tgz ${RELDIR}/comp${OSrev}.tgz \
- ${RELDIR}/game${OSrev}.tgz ${RELDIR}/man${OSrev}.tgz \
- ${RELDIR}/INSTALL.${MACHINE}
-.for IP in ${ALLIP}
-BASE+= ${RELDIR}/bsd.IP${IP} ${RELDIR}/bsd.rd.IP${IP}
-.endfor
-BASE+= ${RELDIR}/bsd.mp.IP27 ${RELDIR}/bsd.mp.IP30
-XBASE= ${RELXDIR}/xbase${OSrev}.tgz ${RELXDIR}/xfont${OSrev}.tgz \
- ${RELXDIR}/xshare${OSrev}.tgz ${RELXDIR}/xserv${OSrev}.tgz
-
-all: ${CDROM}
-
-# Note regarding volume header size:
-# boot32 currently (2013/12/29) needs 81 512 byte sectors, boot64 needs 190,
-# bootecoff needs 73, the XFS partition needs 32768, and we need to keep some
-# room for growth.
-
-# The following values need to be consistent with the `cdroot' layout in
-# /etc/disktab
-SGIVOLSZ=8320 # oa, pp (size of volume header in 2048 byte sectors)
-CDROMSZ=489 # nt (size of the iso image in megabytes)
-
-# Creating an IP27 bootable CD-ROM image with a usable FFS filesystem on it
-# is extremely tricky. We are facing the following challenges:
-# - the IP27 XFS filesystem will only get recognized correctly if the volume
-# header uses 512 byte sectors.
-# - the OpenBSD disklabel will reuse the sector size from the volume header,
-# yet we need to build a label with 2048 byte sectors.
-# This can be overcome by building a 512 byte sector volume header, then
-# filling the 2048 byte sector filesystem.
-
-${CDROM}:
- rm -rf ${.OBJDIR}/cd-dir
- mkdir -p ${.OBJDIR}/cd-dir/
-
- dd if=/dev/zero of=${.OBJDIR}/${CDROM} bs=2048b count=${CDROMSZ}
-
- # Create the 512 byte sector volume header
-
- vnconfig -v ${CDROM} > vnd
-
- /usr/mdec/sgivol -qi -h `expr ${SGIVOLSZ} \* 4` `cat vnd`
- uudecode -o ${.OBJDIR}/xfs512.bin.gz \
- ${.CURDIR}/../cdfs/xfs512.bin.gz.uue
- gzip -d ${.OBJDIR}/xfs512.bin.gz
- cat ${DESTDIR}/usr/mdec/boot64 >> ${.OBJDIR}/xfs512.bin
- dd if=${.OBJDIR}/xfs512.bin of=${.OBJDIR}/xfs obs=16m conv=osync
- /usr/mdec/sgivol -qw xfsboot ${.OBJDIR}/xfs `cat vnd`
- /usr/mdec/sgivol -qw bootecof ${DESTDIR}/usr/mdec/bootecoff `cat vnd`
- /usr/mdec/sgivol -ql bootecof sash `cat vnd`
- /usr/mdec/sgivol -qw boot32 ${DESTDIR}/usr/mdec/boot32 `cat vnd`
- /usr/mdec/sgivol -ql boot32 sashARCS `cat vnd`
- /usr/mdec/sgivol -qw boot64 ${DESTDIR}/usr/mdec/boot64 `cat vnd`
- /usr/mdec/sgivol -ql boot64 sash64 `cat vnd`
-
- vnconfig -u `cat vnd`
- rm -f vnd
-
- # Create the 2048 byte sector media with the FFS partition
-
- vnconfig -v -t cdroot ${CDROM} > vnd
-
- disklabel -w `cat vnd` cdroot "OpenBSD/${MACHINE}"
- newfs -O 1 -m 0 -o space -i 524288 /dev/r`cat vnd`a
- mount /dev/`cat vnd`a ${.OBJDIR}/cd-dir
- mkdir -p ${.OBJDIR}/cd-dir/${OSREV}/${MACHINE}
-
- cp ${DESTDIR}/usr/mdec/bootecoff ${.OBJDIR}/cd-dir/bootecoff
- cp ${DESTDIR}/usr/mdec/boot32 ${.OBJDIR}/cd-dir/boot32
- cp ${DESTDIR}/usr/mdec/boot64 ${.OBJDIR}/cd-dir/boot64
-
- ln ${.OBJDIR}/cd-dir/bootecoff ${.OBJDIR}/cd-dir/boot-IP22
- ln ${.OBJDIR}/cd-dir/boot64 ${.OBJDIR}/cd-dir/boot-IP26
- ln ${.OBJDIR}/cd-dir/boot64 ${.OBJDIR}/cd-dir/boot-IP27
- ln ${.OBJDIR}/cd-dir/boot64 ${.OBJDIR}/cd-dir/boot-IP28
- ln ${.OBJDIR}/cd-dir/boot64 ${.OBJDIR}/cd-dir/boot-IP30
- ln ${.OBJDIR}/cd-dir/boot32 ${.OBJDIR}/cd-dir/boot-IP32
-
- cp -p ${BASE} ${.OBJDIR}/cd-dir/${OSREV}/${MACHINE}
- cp -p ${XBASE} ${.OBJDIR}/cd-dir/${OSREV}/${MACHINE}
-
- cat ${RELDIR}/SHA256 ${RELXDIR}/SHA256 > \
- ${.OBJDIR}/cd-dir/${OSREV}/${MACHINE}/SHA256
- # XXX no SHA256.sig
-
-.for IP in ${ALLIP}
- ln -f ${.OBJDIR}/cd-dir/${OSREV}/${MACHINE}/bsd.rd.IP${IP} \
- ${.OBJDIR}/cd-dir/bsd.rd.IP${IP}
-.endfor
-
- umount ${.OBJDIR}/cd-dir
-
- # Summary
- disklabel `cat vnd`
- /usr/mdec/sgivol `cat vnd`
-
- vnconfig -u `cat vnd`
- rm -f vnd
-
-unconfig:
- -umount -f ${MOUNT_POINT}
- -[ -f vnd ] && vnconfig -u `cat vnd` && rm -f vnd
-
-install:
- cp ${CDROM} ${RELDIR}/
-
-clean cleandir:
- rm -f ${CDROM} xfs512.bin xfs
- rm -rf cd-dir
-
-.include <bsd.obj.mk>
+++ /dev/null
-# $OpenBSD: Makefile,v 1.31 2019/05/03 20:03:59 deraadt Exp $
-
-MTREE= ${UTILS}/mtree.conf
-
-LISTS= ${.CURDIR}/list
-UTILS= ${.CURDIR}/../../miniroot
-
-MRDISKTYPE= rdroot
-MRMAKEFSARGS= -o disklabel=${MRDISKTYPE},minfree=0,density=4096
-
-ALLIP= 22 26 27 28 30 32
-ALLBSDRD=
-.for IP in ${ALLIP}
-ALLBSDRD+= bsd.rd.IP${IP}
-all: ${ALLBSDRD}
-.endfor
-
-.for IP in ${ALLIP}
-bsd.rd.IP${IP}: mr.fs bsd.IP${IP}
- cp bsd.IP${IP} bsd.rd.IP${IP}
- rdsetroot bsd.rd.IP${IP} mr.fs
-
-bsd.IP${IP}:
- cd ${.CURDIR}/../../../sys/arch/${MACHINE}/compile/RAMDISK-IP${IP} && \
- su ${BUILDUSER} -c '${MAKE} config && ${MAKE} clean && exec ${MAKE}'
- cp -p ${.CURDIR}/../../../sys/arch/${MACHINE}/compile/RAMDISK-IP${IP}/obj/bsd bsd.IP${IP}
-.endfor
-
-mr.fs: instbin
- rm -rf $@.d
- install -d -o root -g wheel $@.d
- mtree -def ${MTREE} -p $@.d -u
- CURDIR=${.CURDIR} OBJDIR=${.OBJDIR} OSrev=${OSrev} \
- TARGDIR=$@.d UTILS=${UTILS} RELEASEDIR=${RELEASEDIR} \
- sh ${UTILS}/runlist.sh ${LISTS}
- rm $@.d/instbin
- makefs ${MRMAKEFSARGS} $@ $@.d
-
-instbin.mk instbin.cache instbin.c: instbin.conf
- crunchgen -M -E -D ${.CURDIR}/../../.. -L ${DESTDIR}/usr/lib \
- -c instbin.c -e instbin -m instbin.mk instbin.conf
-
-instbin: instbin.mk instbin.cache instbin.c
- ${MAKE} -f instbin.mk SRCLIBDIR=${.CURDIR}/../../../lib all
-
-instbin.conf: ${LISTS}
- awk -f ${UTILS}/makeconf.awk ${LISTS} > instbin.conf
-
-.ifdef RELEASEDIR
-install:
- cp ${ALLBSDRD} ${RELEASEDIR}
-.endif
-
-
-clean cleandir:
- rm -f *.core mr.fs instbin instbin.mk instbin.cache \
- lib*.a lib*.olist instbin.map ${ALLBSD} ${ALLBSDRD} *.o *.lo *.c
- rm -rf mr.fs.d
-
-.include <bsd.obj.mk>
+++ /dev/null
-# $OpenBSD: install.md,v 1.46 2020/05/25 06:18:53 otto Exp $
-#
-# Copyright (c) 1996 The NetBSD Foundation, Inc.
-# All rights reserved.
-#
-# This code is derived from software contributed to The NetBSD Foundation
-# by Jason R. Thorpe.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-#
-# machine dependent section of installation/upgrade script.
-#
-
-IPARCH=$(sysctl -n hw.model)
-NCPU=$(sysctl -n hw.ncpufound)
-MDKERNEL=GENERIC-$IPARCH
-
-# FFS2 not supported for booting, use FFS1
-MDROOTFSOPT=-O1
-
-MDSETS="bsd.$IPARCH bsd.rd.$IPARCH"
-MDSANESETS=bsd.$IPARCH
-if ((NCPU > 1)); then
- MDSETS="$MDSETS bsd.mp.$IPARCH"
- MDSANESETS="$MDSANESETS bsd.mp.$IPARCH"
-fi
-
-md_installboot() {
- local _disk=$1
-
- echo "Installing boot loader in volume header."
- if ! /usr/mdec/sgivol -w boot /mnt/usr/mdec/boot-$IPARCH $_disk; then
- echo "\nWARNING: Boot install failed. Booting from disk will not be possible"
- fi
-
- for _k in /mnt/bsd{,.mp,.rd}; do
- [[ -f $_k.$IPARCH ]] && mv $_k.$IPARCH $_k
- done
-}
-
-md_prep_disklabel()
-{
- local _disk=$1 _f=/tmp/i/fstab.$1
-
- echo "\nChecking SGI Volume Header:"
- /usr/mdec/sgivol -q $_disk >/dev/null 2>/dev/null
- case $? in
- 0) /usr/mdec/sgivol $_disk
- cat <<__EOT
-
-An SGI Volume Header was found on the disk. Normally you want to replace it
-with a new Volume Header suitable for installing OpenBSD. Doing this will
-of course delete all data currently on the disk.
-__EOT
- if ask_yn "Do you want to overwrite the current header?" y; then
- /usr/mdec/sgivol -qi $_disk
- else
- cat <<__EOT
-
-If the Volume Header was installed by a previous OpenBSD install keeping
-it is OK as long as the Volume Header has room for the 'boot' program.
-If you are trying to keep an old IRIX Volume Header, OpenBSD install will
-use the 'a' partition on the disk for the install and any data in that
-partition will be lost.
-__EOT
- if ! ask_yn "Are you sure you want to try to keep the old header?" y; then
- ask_yn "Do you want to overwrite the old header instead?" ||
- return 1
- /usr/mdec/sgivol -qi $_disk
- fi
- fi
- ;;
- 1) echo "\nYour disk seems to be unaccessible. It was not possible"
- echo "determine if there is a proper Volume Header or not."
- ask_yn "Do you want to continue anyway?" || return 1
- ;;
- 2) echo "\nThere is no Volume Header found on the disk. A Volume"
- echo "header is required to be able to boot from the disk."
- ask_yn "Do you want to install a Volume Header?" y || return 1
- /usr/mdec/sgivol -qi $_disk
- ;;
- esac
-
- disklabel_autolayout $_disk $_f || return
- [[ -s $_f ]] && return
-
- cat <<__EOT
-
-You will now create an OpenBSD disklabel. The disklabel must have an
-'a' partition, being the space available for OpenBSD's root file system.
-The 'p' partition must be retained since it contains the SGI Volume Header;
-this in turn contains the boot loader. No other partitions should overlap
-with the SGI Volume Header, which by default will use the first 3134 sectors.
-
-Do not change any parameters except the partition layout and the label name.
-
-__EOT
- disklabel -c -F /tmp/i/fstab.$_disk -E $_disk
-}
-
-md_congrats() {
- cat <<__EOT
-
-INSTALL.$ARCH describes how to configure the ARCS PROM to boot OpenBSD.
-__EOT
-}
-
-md_consoleinfo() {
-}
+++ /dev/null
-# $OpenBSD: list,v 1.59 2019/06/07 14:39:57 deraadt Exp $
-
-SRCDIRS distrib/special
-
-# copy the crunched binary, link to it, and kill it
-COPY ${OBJDIR}/instbin instbin
-LINK instbin bin/arch
-LINK instbin bin/cat
-LINK instbin bin/chmod bin/chgrp sbin/chown
-LINK instbin bin/cp
-LINK instbin bin/date
-LINK instbin bin/dd
-LINK instbin bin/df
-LINK instbin bin/ed
-LINK instbin bin/hostname
-LINK instbin bin/ksh bin/sh
-LINK instbin bin/ln
-LINK instbin bin/ls
-LINK instbin bin/md5 bin/sha256 bin/sha512
-LINK instbin bin/mkdir
-LINK instbin bin/mt bin/eject
-LINK instbin bin/mv
-LINK instbin bin/pax bin/tar
-LINK instbin bin/rm
-LINK instbin bin/sleep
-LINK instbin bin/stty
-LINK instbin bin/sync
-LINK instbin sbin/bioctl
-LINK instbin sbin/dhclient
-LINK instbin sbin/disklabel
-LINK instbin sbin/dmesg
-LINK instbin sbin/fsck
-LINK instbin sbin/fsck_ffs
-LINK instbin sbin/growfs
-LINK instbin sbin/ifconfig
-LINK instbin sbin/init
-LINK instbin sbin/kbd
-LINK instbin sbin/mknod
-LINK instbin sbin/mount
-LINK instbin sbin/mount_cd9660
-LINK instbin sbin/mount_ffs
-LINK instbin sbin/mount_nfs
-LINK instbin sbin/newfs
-LINK instbin sbin/ping sbin/ping6
-LINK instbin sbin/reboot sbin/halt
-LINK instbin sbin/route
-LINK instbin sbin/slaacd
-LINK instbin sbin/sysctl
-LINK instbin sbin/umount
-LINK instbin usr/bin/doas
-LINK instbin usr/bin/encrypt
-LINK instbin usr/bin/ftp
-LINK instbin usr/bin/grep usr/bin/egrep usr/bin/fgrep
-LINK instbin usr/bin/gzip usr/bin/gunzip usr/bin/gzcat
-LINK instbin usr/bin/more usr/bin/less
-LINK instbin usr/bin/sed
-LINK instbin usr/bin/signify
-LINK instbin usr/bin/tee
-LINK instbin usr/sbin/chroot
-LINK instbin usr/sbin/pwd_mkdb
-ARGVLINK ksh -sh
-SPECIAL rm bin/md5
-
-# firmware we might need
-#COPY ${DESTDIR}/etc/firmware/tigon1 etc/firmware/tigon1
-#COPY ${DESTDIR}/etc/firmware/tigon2 etc/firmware/tigon2
-COPY ${DESTDIR}/etc/firmware/bnx-b06 etc/firmware/bnx-b06
-COPY ${DESTDIR}/etc/firmware/bnx-b09 etc/firmware/bnx-b09
-COPY ${DESTDIR}/etc/firmware/bnx-rv2p etc/firmware/bnx-rv2p
-COPY ${DESTDIR}/etc/firmware/bnx-xi-rv2p etc/firmware/bnx-xi-rv2p
-COPY ${DESTDIR}/etc/firmware/bnx-xi90-rv2p etc/firmware/bnx-xi90-rv2p
-
-COPY ${DESTDIR}/usr/mdec/sgivol usr/mdec/sgivol
-
-# copy the MAKEDEV script and make some devices
-SCRIPT ${DESTDIR}/dev/MAKEDEV dev/MAKEDEV
-SPECIAL cd dev; sh MAKEDEV ramdisk
-
-# various files that we need in /etc for the install
-COPY ${CURDIR}/../../miniroot/group etc/group
-COPY ${CURDIR}/../../miniroot/master.passwd etc/master.passwd
-SPECIAL pwd_mkdb -p -d etc master.passwd; rm etc/master.passwd
-COPY ${DESTDIR}/etc/signify/openbsd-${OSrev}-base.pub etc/signify/openbsd-${OSrev}-base.pub
-COPY ${CURDIR}/../../miniroot/protocols etc/protocols
-COPY ${CURDIR}/../../miniroot/services etc/services
-TERMCAP vt100,vt220,dumb usr/share/misc/termcap
-
-SYMLINK /tmp/i/fstab.shadow etc/fstab
-SYMLINK /tmp/i/resolv.conf.shadow etc/resolv.conf
-SYMLINK /tmp/i/hosts etc/hosts
-
-# and the installation tools
-SCRIPT ${CURDIR}/../../miniroot/dot.profile .profile
-SCRIPT ${CURDIR}/../../miniroot/install.sub install.sub
-SCRIPT ${CURDIR}/install.md install.md
-SPECIAL chmod 755 install.sub
-SYMLINK install.sub autoinstall
-SYMLINK install.sub install
-SYMLINK install.sub upgrade
-
-TZ
-# $OpenBSD: Makefile,v 1.483 2021/04/28 15:11:27 jsg Exp $
+# $OpenBSD: Makefile,v 1.484 2021/05/01 16:11:07 visa Exp $
.include <bsd.own.mk>
SUBDIR+= etc.alpha etc.amd64 etc.arm64 etc.armv7
SUBDIR+= etc.hppa etc.i386 etc.landisk etc.loongson etc.luna88k
SUBDIR+= etc.macppc etc.octeon etc.powerpc64 etc.riscv64
-SUBDIR+= etc.sgi etc.sparc64
+SUBDIR+= etc.sparc64
.include <bsd.subdir.mk>
.include <bsd.prog.mk>
+++ /dev/null
-#!/bin/sh -
-#
-# THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
-# generated from:
-#
-# OpenBSD: etc.sgi/MAKEDEV.md,v 1.56 2021/04/02 02:29:56 deraadt Exp
-# OpenBSD: MAKEDEV.common,v 1.113 2021/02/12 10:26:33 jsg Exp
-# OpenBSD: MAKEDEV.mi,v 1.83 2016/09/11 03:06:31 deraadt Exp
-# OpenBSD: MAKEDEV.sub,v 1.14 2005/02/07 06:14:18 david Exp
-#
-#
-# Copyright (c) 2001-2004 Todd T. Fries <todd@OpenBSD.org>
-#
-# Permission to use, copy, modify, and distribute this software for any
-# purpose with or without fee is hereby granted, provided that the above
-# copyright notice and this permission notice appear in all copies.
-#
-# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-#
-# Device "make" file. Valid arguments:
-# all makes all known devices, including local devices.
-# Tries to make the ``standard'' number of each type.
-# ramdisk Ramdisk kernel devices
-# std Standard devices
-# local Configuration specific devices
-# Disks:
-# cd* ATAPI and SCSI CD-ROM drives
-# rd* "rd" pseudo-disks
-# sd* SCSI disks, including flopticals
-# vnd* "file" pseudo-disk devices
-# wd* "winchester" disk drives (ST506, IDE, ESDI, RLL, ...)
-# Tapes:
-# ch* SCSI media changers
-# st* SCSI tape drives
-# Terminal ports:
-# tty[0-7][0-9a-f] NS16x50 serial ports
-# tty[a-b]* Zilog 8530 serial port
-# Pseudo terminals:
-# ptm pty master device
-# pty* Set of 62 master pseudo terminals
-# tty* Set of 62 slave pseudo terminals
-# Console ports:
-# ttyC-J* wscons display devices
-# wscons Minimal wscons devices
-# wskbd* wscons keyboards
-# wsmux wscons keyboard/mouse mux devices
-# Pointing devices:
-# wsmouse* wscons mice
-# USB devices:
-# ttyU* USB serial ports
-# uall All USB devices
-# ugen* Generic USB devices
-# uhid* Generic HID devices
-# fido fido/* nodes
-# ujoy ujoy/* nodes
-# ulpt* Printer devices
-# usb* Bus control devices used by usbd for attach/detach
-# Special purpose devices:
-# audio* Audio devices
-# bio ioctl tunnel pseudo-device
-# bpf Berkeley Packet Filter
-# dt Dynamic Tracer
-# diskmap Disk mapper
-# fd fd/* nodes
-# fuse Userland Filesystem
-# hotplug devices hot plugging
-# pci* PCI bus devices
-# pf* Packet Filter
-# pppx* PPP Multiplexer
-# pppac* PPP Access Concentrator
-# *random In-kernel random data source
-# tun* Network tunnel driver
-# tap* Ethernet tunnel driver
-# uk* Unknown SCSI devices
-# video* Video V4L2 devices
-# vscsi* Virtual SCSI controller
-# switch* Switch driver
-# kstat Kernel Statistics
-PATH=/sbin:/usr/sbin:/bin:/usr/bin
-T=$0
-
-# set this to echo for Echo-Only debugging
-[ "$eo" ] || eo=
-
-hex()
-{
- case $1 in
- [0-9]) echo -n $1;;
- 10) echo -n a;;
- 11) echo -n b;;
- 12) echo -n c;;
- 13) echo -n d;;
- 14) echo -n e;;
- 15) echo -n f;;
- esac
-}
-
-alph2d()
-{
- local t="$1"
- local p="0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ"
- local sub=${p%${t}*}
- echo ${#sub}
-}
-
-h2d()
-{
- local s="$1"
- local f=${s%*[0-9a-f]} n=${s#[0-9a-f]*}
-
- echo $(($(_h2d $f)*16+ $(_h2d $n) ))
-}
-
-_h2d()
-{
- case $1 in
- [0-9]) echo -n $1;;
- a) echo -n 10;;
- b) echo -n 11;;
- c) echo -n 12;;
- d) echo -n 13;;
- e) echo -n 14;;
- f) echo -n 15;;
- esac
-}
-
-unt()
-{
- # XXX pdksh can't seem to deal with locally scoped variables
- # in ${foo#$bar} expansions
- arg="$1"
- tmp="${arg#[a-zA-Z]*}"
- tmp="${tmp%*[a-zA-Z]}"
- while [ "$tmp" != "$arg" ]
- do
- arg=$tmp
- tmp="${arg#[a-zA-Z]*}"
- tmp="${tmp%*[a-zA-Z]}"
- done
- echo $arg
-}
-
-dodisk()
-{
- [ "$DEBUG" ] && set -x
- n=$(($((${5}*${7:-16}))+${6})) count=0
- [ 0$7 -ne 8 ] && l="i j k l m n o p"
- for d in a b c d e f g h $l
- do
- M $1$2$d b $3 $(($n+$count)) 640 operator
- M r$1$2$d c $4 $(($n+$count)) 640 operator
- let count=count+1
- done
-}
-
-dodisk2()
-{
- n=$(($(($5*${7:-16}))+$6))
- M $1$2a b $3 $n 640 operator
- M r$1$2a c $4 $n 640 operator
- n=$(($n+2))
- M $1$2c b $3 $n 640 operator
- M r$1$2c c $4 $n 640 operator
-}
-
-# M name b/c major minor [mode] [group]
-RMlist[0]="rm -f"
-
-mkl() {
- : ${mklist[0]:=";mknod"}
- mklist[${#mklist[*]}]=" -m $1 $2 $3 $4 $5"
-}
-
-M() {
- RMlist[${#RMlist[*]}]=$1
- mkl ${5-666} $1 $2 $3 $4
- G=${6:-wheel}
- [ "$7" ] && {
- MKlist[${#MKlist[*]}]="&& chown $7:$G $1"
- } || {
- case $G in
- wheel)
- [ ${#whlist[*]} = 0 ] && whlist[0]="&& chgrp wheel"
- whlist[${#whlist[*]}]="$1"
- ;;
- operator)
- [ ${#oplist[*]} = 0 ] && oplist[0]="&& chgrp operator"
- oplist[${#oplist[*]}]="$1"
- ;;
- *)
- MKlist[${#MKlist[*]}]="&& chgrp $G $1";
- esac
- }
- return 0
-}
-
-R() {
-[ "$DEBUG" ] && set -x
-for i in "$@"
-do
-U=`unt $i`
-[ "$U" ] || U=0
-
-case $i in
-std)
- M console c 0 0 600
- M tty c 2 0
- M mem c 3 0 640 kmem
- M kmem c 3 1 640 kmem
- M null c 3 2
- M zero c 3 12
- M stdin c 7 0
- M stdout c 7 1
- M stderr c 7 2
- M ksyms c 35 0 640 kmem
- M klog c 6 0 600
- ;;
-
-kstat)
- M kstat c 51 0 640
- ;;
-
-switch*)
- M switch$U c 75 $U 600
- ;;
-
-vscsi*)
- M vscsi$U c 68 $U 600
- ;;
-
-video*)
- M video$U c 45 $U 600
- MKlist[${#MKlist[*]}]=";[ -e video ] || ln -s video$U video"
- ;;
-
-uk*)
- M uk$U c 32 $U 640 operator
- ;;
-
-tap*)
- M tap$U c 74 $U 600
- ;;
-
-tun*)
- M tun$U c 13 $U 600
- ;;
-
-*random)
- M urandom c 33 0 644
- RMlist[${#RMlist[*]}]=random
- MKlist[${#MKlist[*]}]=";ln -s urandom random"
- ;;
-
-pppac*)
- M pppac$U c 77 $U 600
- ;;
-
-pppx*)
- M pppx$U c 70 $U 600
- ;;
-
-pf*)
- M pf c 31 0 600
- ;;
-
-pci*)
- M pci$U c 29 $U 600
- MKlist[${#MKlist[*]}]=";[ -h pci ] || ln -sf pci0 pci"
- ;;
-
-hotplug)
- M hotplug c 67 $U 400
- ;;
-
-fuse)
- M fuse$U c 73 $U 600
- ;;
-
-fd)
- RMlist[${#RMlist[*]}]=";mkdir -p fd;rm -f" n=0
- while [ $n -lt 64 ];do M fd/$n c 7 $n;n=$(($n+1));done
- MKlist[${#MKlist[*]}]=";chmod 555 fd"
- ;;
-
-diskmap)
- M diskmap c 69 0 640 operator
- ;;
-
-dt)
- M dt c 30 0 600
- ;;
-
-bpf)
- M bpf c 12 0 600
- M bpf0 c 12 0 600
- ;;
-
-bio)
- M bio c 49 0 600
- ;;
-
-audio*)
- M audio$U c 44 $U 660 _sndiop
- M audioctl$U c 44 $(($U+192)) 660 _sndiop
- ;;
-
-usb*)
- [ "$i" = "usb" ] && u= || u=$U
- M usb$u c 61 $U 640
- ;;
-
-ulpt*)
- M ulpt$U c 64 $U 600
- ;;
-
-ujoy)
- RMlist[${#RMlist[*]}]=";mkdir -p ujoy;rm -f" n=0
- while [ $n -lt 4 ];do M ujoy/$n c 78 $n 444;n=$(($n+1));done
- MKlist[${#MKlist[*]}]=";chmod 555 ujoy"
- ;;
-
-fido)
- RMlist[${#RMlist[*]}]=";mkdir -p fido;rm -f" n=0
- while [ $n -lt 4 ];do M fido/$n c 76 $n 666;n=$(($n+1));done
- MKlist[${#MKlist[*]}]=";chmod 555 fido"
- ;;
-
-uhid*)
- M uhid$U c 62 $U 600
- ;;
-
-ugen*)
- n=$(($U*16))
- for j in 0{0,1,2,3,4,5,6,7,8,9} 1{0,1,2,3,4,5}
- do
- M ugen$U.$j c 63 $(($n+10#$j)) 600
- done
- ;;
-
-uall)
- R ttyU0 ttyU1 ttyU2 ttyU3 ugen0 ugen1 ugen2 ugen3 ugen4 ugen5
- R ugen6 ugen7 ulpt0 ulpt1 ujoy fido uhid0 uhid1 uhid2 uhid3
- R uhid4 uhid5 uhid6 uhid7 usb0 usb1 usb2 usb3 usb4 usb5 usb6
- R usb7
- ;;
-
-ttyU[0-9a-zA-Z])
- U=${i#ttyU*}
- o=$(alph2d $U)
- M ttyU$U c 66 $o 660 dialer root
- M cuaU$U c 66 $(($o+128)) 660 dialer root
- ;;
-
-wsmouse[0-9]*)
- M wsmouse$U c 27 $U 600
- ;;
-
-wsmux|wsmouse|wskbd)
- M wsmouse c 28 0 600
- M wskbd c 28 1 600
- ;;
-
-wskbd[0-9]*)
- M wskbd$U c 26 $U 600
- ;;
-
-wscons)
- R wsmouse0 wsmouse1 wsmouse2 wsmouse3 wsmouse4 wsmouse5
- R wsmouse6 wsmouse7 wsmouse8 wsmouse9 wskbd0 wskbd1 wskbd2
- R wskbd3 wsmux ttyFcfg ttyF0 ttyF1 ttyF2 ttyF3 ttyF4 ttyF5
- R ttyF6 ttyF7 ttyF8 ttyF9 ttyFa ttyFb ttyEcfg ttyE0 ttyE1
- R ttyE2 ttyE3 ttyE4 ttyE5 ttyE6 ttyE7 ttyE8 ttyE9 ttyEa ttyEb
- R ttyDcfg ttyD0 ttyD1 ttyD2 ttyD3 ttyD4 ttyD5 ttyD6 ttyD7
- R ttyD8 ttyD9 ttyDa ttyDb ttyCcfg ttyC0 ttyC1 ttyC2 ttyC3
- R ttyC4 ttyC5 ttyC6 ttyC7 ttyC8 ttyC9 ttyCa ttyCb
- ;;
-
-tty[C-J]*)
- U=${i##tty[C-J]}
- case $i in
- ttyC*) n=C m=0;;
- ttyD*) n=D m=256;;
- ttyE*) n=E m=512;;
- ttyF*) n=F m=768;;
- ttyG*) n=G m=1024;;
- ttyH*) n=H m=1280;;
- ttyI*) n=I m=1536;;
- ttyJ*) n=J m=1792;;
- esac
- case $U in
- [0-9a-f]) M tty$n$U c 25 $((16#$U+$m)) 600;;
- cfg) M tty${n}cfg c 25 $((255+$m)) 600;;
- *) echo bad unit $U for $i; exit 1;;
- esac
- ;;
-
-pty*)
- if [ $U -gt 15 ]; then
- echo bad unit for pty in: $i
- continue
- fi
- set -A letters p q r s t u v w x y z P Q R S T
- set -A suffixes 0 1 2 3 4 5 6 7 8 9 a b c d e f g h i j k l m n o p q \
- r s t u v w x y z A B C D E F G H I J K L M N O P Q R S T U V W X \
- Y Z
-
- name=${letters[$U]}
- n=0
- while [ $n -lt 62 ]
- do
- nam=$name${suffixes[$n]}
- off=$(($U*62))
- M tty$nam c 4 $(($off+$n))
- M pty$nam c 5 $(($off+$n))
- n=$(($n+1))
- done
- ;;
-
-ptm)
- M ptm c 52 0 666
- ;;
-
-tty[a-b])
- u=${i#tty*}
- case $u in
- a) n=0 ;;
- b) n=1 ;;
- *) echo unknown tty device $i ;;
- esac
- M tty$u c 19 $n 660 dialer root
- M cua$u c 19 $(($n+128)) 660 dialer root
- ;;
-
-tty[0-7][0-9a-f])
- U=${i#tty*}
- o=$(h2d $U)
- M tty$U c 17 $o 660 dialer root
- M cua$U c 17 $(($o+128)) 660 dialer root
- ;;
-
-st*)
- n=$(($U*16))
- for pre in " " n e en
- do
- M ${pre}rst$U c 10 $n 660 operator
- n=$(($n+1))
- done
- ;;
-
-ch*)
- M ch$U c 36 $U 660 operator
- ;;
-
-vnd*)
- dodisk vnd $U 2 11 $U 0
- ;;
-
-rd*)
- dodisk2 rd $U 8 22 $U 0
- ;;
-
-cd*)
- dodisk2 cd $U 3 8 $U 0
- ;;
-
-local)
- test -s $T.local && sh $T.local
- ;;
-
-ramdisk)
- R diskmap bio rd0 cd0 cd1 st0 st1 wd0 wd1 wd2 wd3 wd4 sd0 sd1
- R sd2 sd3 sd4 tty00 tty01 bpf std
- ;;
-
-all)
- R ttya ttyb switch0 switch1 switch2 switch3 vnd0 vnd1 vnd2
- R vnd3 sd0 sd1 sd2 sd3 sd4 sd5 sd6 sd7 sd8 sd9 cd0 cd1 rd0
- R tap0 tap1 tap2 tap3 tun0 tun1 tun2 tun3 bio pty0 pty1 pty2
- R diskmap vscsi0 ch0 audio0 audio1 audio2 audio3 kstat dt bpf
- R fuse pppac pppx hotplug ptm local wscons pci0 pci1 pci2 pci3
- R uall video0 video1 uk0 random tty00 tty01 tty02 tty03 tty04
- R tty05 tty06 tty07 tty08 tty09 tty0a tty0b pf wd0 wd1 wd2 wd3
- R std st0 st1 fd
- ;;
-
-wd*|sd*)
- case $i in
- wd*) dodisk wd $U 4 18 $U 0;;
- sd*) dodisk sd $U 0 9 $U 0;;
- esac
- ;;
-
-*)
- echo $i: unknown device
- ;;
-esac
-done
-}
-R "$@"
-{
-echo -n ${RMlist[*]}
-echo -n ${mklist[*]}
-echo -n ${MKlist[*]}
-echo -n ${whlist[*]}
-echo ${oplist[*]}
-} | if [ "$eo" = "echo" ]; then
- cat
-else
- sh
-fi
+++ /dev/null
-define(MACHINE,sgi)dnl
-vers(__file__,
- {-$OpenBSD: MAKEDEV.md,v 1.56 2021/04/02 02:29:56 deraadt Exp $-},
-etc.MACHINE)dnl
-dnl
-dnl Copyright (c) 2001-2006 Todd T. Fries <todd@OpenBSD.org>
-dnl All rights reserved.
-dnl
-dnl Redistribution and use in source and binary forms, with or without
-dnl modification, are permitted provided that the following conditions
-dnl are met:
-dnl 1. Redistributions of source code must retain the above copyright
-dnl notice, this list of conditions and the following disclaimer.
-dnl 2. The name of the author may not be used to endorse or promote products
-dnl derived from this software without specific prior written permission.
-dnl
-dnl THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
-dnl INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
-dnl AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-dnl THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-dnl EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-dnl PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-dnl OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-dnl WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-dnl OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-dnl ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-dnl
-dnl
-__devitem(zs, tty[a-b]*, Zilog 8530 serial port,zs)dnl
-_mkdev(zs, {-tty[a-b]-}, {-u=${i#tty*}
- case $u in
- a) n=0 ;;
- b) n=1 ;;
- *) echo unknown tty device $i ;;
- esac
- M tty$u c major_zs_c $n 660 dialer root
- M cua$u c major_zs_c Add($n, 128) 660 dialer root-})dnl
-_TITLE(make)
-_DEV(all)
-_DEV(ramd)
-_DEV(std)
-_DEV(local)
-_TITLE(dis)
-_DEV(cd, 8, 3)
-_DEV(rd, 22, 8)
-_DEV(sd, 9, 0)
-_DEV(vnd, 11, 2)
-_DEV(wd, 18, 4)
-_TITLE(tap)
-_DEV(ch, 36)
-_DEV(st, 10)
-_TITLE(term)
-_DEV(com, 17)
-_DEV(zs, 19)
-_TITLE(pty)
-_DEV(ptm, 52)
-_DEV(pty, 5)
-_DEV(tty, 4)
-_TITLE(cons)
-_DEV(wsdisp, 25)
-_DEV(wscons)
-_DEV(wskbd, 26)
-_DEV(wsmux, 28)
-_TITLE(point)
-_DEV(wsmouse, 27)
-_TITLE(usb)
-_DEV(ttyU, 66)
-_DEV(uall)
-_DEV(ugen, 63)
-_DEV(uhid, 62)
-_DEV(fido, 76)
-_DEV(ujoy, 78)
-_DEV(ulpt, 64)
-_DEV(usb, 61)
-_TITLE(spec)
-_DEV(au, 44)
-_DEV(bio, 49)
-_DEV(bpf, 12)
-_DEV(dt, 30)
-_DEV(diskmap, 69)
-_DEV(fdesc, 7)
-_DEV(fuse, 73)
-_DEV(hotplug, 67)
-_DEV(pci, 29)
-_DEV(pf, 31)
-_DEV(pppx, 70)
-_DEV(pppac, 77)
-_DEV(rnd, 33)
-_DEV(tun, 13)
-_DEV(tap, 74)
-_DEV(uk, 32)
-_DEV(vi, 45)
-_DEV(vscsi, 68)
-_DEV(switch, 75)
-_DEV(kstat, 51)
-dnl
-divert(__mddivert)dnl
-dnl
-_std(2, 3, 35, 6)
- ;;
-dnl
-dnl *** sgi specific targets
-dnl
-twrget(all, au, audio, 0, 1, 2, 3)dnl
-target(all, ch, 0)dnl
-target(all, vscsi, 0)dnl
-target(all, diskmap)dnl
-target(all, pty, 0, 1, 2)dnl
-target(all, bio)dnl
-target(all, tun, 0, 1, 2, 3)dnl
-target(all, tap, 0, 1, 2, 3)dnl
-target(all, rd, 0)dnl
-target(all, cd, 0, 1)dnl
-target(all, sd, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9)dnl
-target(all, vnd, 0, 1, 2, 3)dnl
-target(all, switch, 0, 1, 2, 3)dnl
-twrget(all, zs, tty, a, b)dnl
-twrget(wscons, wscons, ttyD, cfg, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b)dnl
-twrget(wscons, wscons, ttyE, cfg, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b)dnl
-twrget(wscons, wscons, ttyF, cfg, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b)dnl
-target(ramd, bio)dnl
-target(ramd, diskmap)dnl
-target(ramd, random)dnl
+++ /dev/null
-# $OpenBSD: Makefile,v 1.2 2008/06/15 01:51:56 todd Exp $
-
-all: MAKEDEV
-
-.include <bsd.prog.mk>
+++ /dev/null
-# $OpenBSD: Makefile.inc,v 1.19 2017/04/04 00:03:12 deraadt Exp $
-
-ALLIP= 22 26 27 28 30 32
-KERNELS=
-MDEXT=
-
-.for IP in ${ALLIP}
-KERNELS+= GENERIC-IP${IP} bsd.IP${IP}
-MDEXT+= bsd.rd.IP${IP}
-.endfor
-KERNELS+= GENERIC-IP30.MP bsd.mp.IP30
-KERNELS+= GENERIC-IP27.MP bsd.mp.IP27
-
-bootblocks:
- cp -p ${DESTDIR}/usr/mdec/boot32 ${RELEASEDIR}
- cp -p ${DESTDIR}/usr/mdec/boot64 ${RELEASEDIR}
- cp -p ${DESTDIR}/usr/mdec/bootecoff ${RELEASEDIR}
-
-MDEXT+= boot32 boot64 bootecoff cd${OSrev}.iso
+++ /dev/null
-# $OpenBSD: disktab,v 1.19 2019/03/17 16:32:29 deraadt Exp $
-
-rdroot|ramdiskroot|RAM-disk root FS image:\
- :dt=rdroot:se#512:nc#20:nt#4:ns#128:\
- :ta=4.2BSD:oa#0:pa#10240:fa#512:ba#4096:\
- :ob#0:pb#0:oc#0:pc#10240:
-
-minicdroot|minicdramdiskroot|Boot CD-ROM image:\
- :dt=rdroot:se#512:nc#60:nt#4:ns#128:\
- :ta=4.2BSD:oa#0:pa#30720:fa#512:ba#4096:\
- :ob#0:pb#0:oc#0:pc#30720:
-
-cdroot|cdramdiskroot|Installation CD-ROM image:\
- :dt=rdroot:se#2048:nc#17:nt#460:ns#32:\
- :ta=4.2BSD:oa#8320:pa#241920:fa#2048:ba#16384:\
- :ob#0:pb#0:oc#0:pc#250240:op#0:pp#8320:
+++ /dev/null
-/dev/tty00 0600 /dev/console
-/dev/ttyC0 0600 /dev/console:/dev/wskbd:/dev/wskbd0:/dev/wsmouse:/dev/wsmouse0:/dev/ttyCcfg:/dev/ttyC4
+++ /dev/null
-# $OpenBSD: login.conf,v 1.13 2021/04/25 16:36:57 mortimer Exp $
-
-#
-# Sample login.conf file. See login.conf(5) for details.
-#
-
-#
-# Standard authentication styles:
-#
-# passwd Use only the local password file
-# chpass Do not authenticate, but change user's password (change
-# the YP password if the user has one, else change the
-# local password)
-# lchpass Do not login; change user's local password instead
-# radius Use radius authentication
-# reject Use rejected authentication
-# skey Use S/Key authentication
-# activ ActivCard X9.9 token authentication
-# crypto CRYPTOCard X9.9 token authentication
-# snk Digital Pathways SecureNet Key authentication
-# tis TIS Firewall Toolkit authentication
-# token Generic X9.9 token authentication
-# yubikey YubiKey authentication
-#
-
-# Default allowed authentication styles
-auth-defaults:auth=passwd,skey:
-
-# Default allowed authentication styles for authentication type ftp
-auth-ftp-defaults:auth-ftp=passwd:
-
-#
-# The default values
-# To alter the default authentication types change the line:
-# :tc=auth-defaults:\
-# to read something like: (enables passwd, "myauth", and activ)
-# :auth=passwd,myauth,activ:\
-# Any value changed in the daemon class should be reset in default
-# class.
-#
-default:\
- :path=/usr/bin /bin /usr/sbin /sbin /usr/X11R6/bin /usr/local/bin /usr/local/sbin:\
- :umask=022:\
- :datasize-max=1024M:\
- :datasize-cur=1024M:\
- :maxproc-max=256:\
- :maxproc-cur=128:\
- :openfiles-max=1024:\
- :openfiles-cur=512:\
- :stacksize-cur=4M:\
- :localcipher=blowfish,8:\
- :tc=auth-defaults:\
- :tc=auth-ftp-defaults:
-
-#
-# Settings used by /etc/rc and root
-# This must be set properly for daemons started as root by inetd as well.
-# Be sure to reset these values to system defaults in the default class!
-#
-daemon:\
- :ignorenologin:\
- :datasize=infinity:\
- :maxproc=infinity:\
- :openfiles-max=1024:\
- :openfiles-cur=128:\
- :stacksize-cur=8M:\
- :localcipher=blowfish,9:\
- :tc=default:
-
-#
-# Staff have fewer restrictions and can login even when nologins are set.
-#
-staff:\
- :datasize-cur=768M:\
- :datasize-max=infinity:\
- :maxproc-max=512:\
- :maxproc-cur=128:\
- :ignorenologin:\
- :requirehome@:\
- :tc=default:
-
-#
-# Authpf accounts get a special motd and shell
-#
-authpf:\
- :welcome=/etc/motd.authpf:\
- :shell=/usr/sbin/authpf:\
- :tc=default:
-
-#
-# Building ports with DPB uses raised limits
-#
-pbuild:\
- :datasize-max=infinity:\
- :datasize-cur=4096M:\
- :maxproc-max=1024:\
- :maxproc-cur=256:\
- :stacksize-cur=8M:\
- :priority=5:\
- :tc=default:
-
-#
-# Override resource limits for certain daemons started by rc.d(8)
-#
-bgpd:\
- :openfiles=512:\
- :tc=daemon:
-
-unbound:\
- :openfiles=512:\
- :tc=daemon:
-
-xenodm:\
- :openfiles=512:\
- :tc=daemon:
+++ /dev/null
-#
-# $OpenBSD: ttys,v 1.4 2012/03/29 20:27:53 miod Exp $
-#
-# name getty type status comments
-#
-console "/usr/libexec/getty std.9600" vt220 on secure
-# wsdisplay(4) glass console
-ttyC0 "/usr/libexec/getty std.9600" vt220 off secure
-# com(4) serial ports
-tty00 "/usr/libexec/getty std.9600" unknown off secure
-tty01 "/usr/libexec/getty std.9600" unknown off secure
-tty02 "/usr/libexec/getty std.9600" unknown off secure
-tty03 "/usr/libexec/getty std.9600" unknown off secure
-# zstty(4) serial ports
-ttya "/usr/libexec/getty std.9600" unknown off secure
-ttyb "/usr/libexec/getty std.9600" unknown off secure
-# $OpenBSD: 4.4BSD.dist,v 1.317 2021/04/28 14:25:15 jsg Exp $
+# $OpenBSD: 4.4BSD.dist,v 1.318 2021/05/01 16:11:07 visa Exp $
/set type=dir uname=root gname=wheel mode=0755
..
octeon
..
- sgi
- ..
..
# ./usr/share/man/man3p
..
riscv64
..
- sgi
- ..
sparc64
..
..
..
riscv64
..
- sgi
- ..
sparc64
..
..
-# $OpenBSD: Makefile,v 1.5 2017/10/08 15:14:17 visa Exp $
+# $OpenBSD: Makefile,v 1.6 2021/05/01 16:11:09 visa Exp $
MAN= cacheflush.3 get_fpc_csr.3
-MANSUBDIR= loongson octeon sgi
+MANSUBDIR= loongson octeon
#.if ${MACHINE_CPU} == "mips64"
#NOPIC=
-.\" $OpenBSD: ptrace.2,v 1.39 2016/09/01 10:08:03 tedu Exp $
+.\" $OpenBSD: ptrace.2,v 1.40 2021/05/01 16:11:09 visa Exp $
.\" $NetBSD: ptrace.2,v 1.3 1996/02/23 01:39:41 jtc Exp $
.\"
.\" This file is in the public domain.
-.Dd $Mdocdate: September 1 2016 $
+.Dd $Mdocdate: May 1 2021 $
.Dt PTRACE 2
.Os
.Sh NAME
.Pq single-step .
.\" mips64 (fp registers in the main reg structure)
.It Xo Dv PT_GETFPREGS
-.No (not available on luna88k or sgi)
+.No (not available on luna88k or mips64)
.Xc
This request reads the traced process' floating-point registers into
the
pointed to by
.Fa addr .
.It Xo Dv PT_SETFPREGS
-.No (not available on luna88k or sgi)
+.No (not available on luna88k or mips64)
.Xc
This request is the converse of
.Dv PT_GETFPREGS ;
-# $OpenBSD: Makefile.inc,v 1.5 2019/05/11 13:05:25 tb Exp $
+# $OpenBSD: Makefile.inc,v 1.6 2021/05/01 16:11:09 visa Exp $
# mips64-specific libcrypto build rules
# bf
SRCS+= bf_enc.c
# bn
-.if ${MACHINE} == "sgi" # because of R4000 support
-SRCS+= bn_asm.c
-.else
SSLASM+= bn mips bn-mips
CFLAGS+= -DBN_DIV3W
-.endif
SSLASM+= bn mips-mont mips-mont
CFLAGS+= -DOPENSSL_BN_ASM_MONT
# camellia
-# $OpenBSD: Makefile,v 1.36 2019/05/11 07:18:15 deraadt Exp $
+# $OpenBSD: Makefile,v 1.37 2021/05/01 16:11:09 visa Exp $
MAKEDEVARCHS+=alpha amd64 armv7 hppa i386 landisk
MAKEDEVARCHS+=loongson luna88k macppc
-MAKEDEVARCHS+=sgi sparc64
+MAKEDEVARCHS+=sparc64
MAKEDEVTARGS?=all ramdisk
-# $OpenBSD: Makefile,v 1.796 2021/04/24 07:49:11 visa Exp $
+# $OpenBSD: Makefile,v 1.797 2021/05/01 16:11:09 visa Exp $
MAN= aac.4 abcrtc.4 abl.4 ac97.4 acphy.4 acrtc.4 \
acpi.4 acpiac.4 acpials.4 acpiasus.4 acpibat.4 \
vioblk.4 viocon.4 viomb.4 viornd.4 vioscsi.4 virtio.4 vlan.4 \
vmmci.4 vmt.4 vmwpvs.4 vmx.4 vnd.4 vr.4 \
vscsi.4 vte.4 vxlan.4 \
- watchdog.4 wb.4 wbenv.4 wbng.4 wbsd.4 wbsio.4 wd.4 wdc.4 wdsc.4 we.4 \
+ watchdog.4 wb.4 wbenv.4 wbng.4 wbsd.4 wbsio.4 wd.4 wdc.4 we.4 \
wg.4 wi.4 witness.4 wpi.4 wscons.4 wsdisplay.4 wskbd.4 wsmouse.4 \
wsmux.4 \
xbf.4 xe.4 xen.4 xf86.4 xge.4 xhci.4 xl.4 xmphy.4 xnf.4 xspd.4 \
SUBDIR= man4.alpha man4.amd64 man4.arm64 man4.armv7 \
man4.hppa man4.i386 man4.landisk man4.loongson man4.luna88k \
- man4.macppc man4.octeon man4.powerpc64 man4.sgi man4.sparc64
+ man4.macppc man4.octeon man4.powerpc64 man4.sparc64
CLEANFILES+= wi.4
-.\" $OpenBSD: com.4,v 1.46 2020/01/22 05:19:24 jsg Exp $
+.\" $OpenBSD: com.4,v 1.47 2021/05/01 16:11:09 visa Exp $
.\" $NetBSD: com.4,v 1.5 1996/03/16 00:07:08 thorpej Exp $
.\"
.\" Copyright (c) 1990, 1991 The Regents of the University of California.
.\"
.\" from: @(#)dca.4 5.2 (Berkeley) 3/27/91
.\"
-.Dd $Mdocdate: January 22 2020 $
+.Dd $Mdocdate: May 1 2021 $
.Dt COM 4
.Os
.Sh NAME
.Cd "# octeon"
.Cd "com* at fdt?"
.Pp
-.Cd "# sgi"
-.Cd "com0 at macebus0 base 0x00390000 irq 5"
-.Cd "com1 at macebus0 base 0x00398000 irq 5"
-.Cd "com0 at ioc? base 0x00020178"
-.Cd "com1 at ioc? base 0x00020170"
-.Pp
.Cd "# sparc64"
.Cd "com* at asio?"
.Cd "com* at ebus?"
+++ /dev/null
-# $OpenBSD: Makefile,v 1.24 2016/03/30 06:38:44 jmc Exp $
-
-MAN= dpclock.4 dsclock.4 dsrtc.4 gbe.4 gio.4 grtwo.4 hpc.4 iec.4 imc.4 \
- impact.4 intro.4 ioc.4 iockbc.4 iof.4 light.4 \
- macebus.4 mavb.4 mec.4 mkbc.4 newport.4 odyssey.4 \
- owmac.4 owserial.4 panel.4 power.4 \
- sq.4 xbow.4 xbridge.4 xheart.4 zs.4
-
-MANSUBDIR=sgi
-
-.include <bsd.prog.mk>
+++ /dev/null
-.\" $OpenBSD: dpclock.4,v 1.6 2018/06/18 06:06:52 jmc Exp $
-.\" $NetBSD: dpclock.4,v 1.5 2008/04/30 13:10:56 martin Exp $
-.\"
-.\" Copyright (c) 2004 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This document is derived from work contributed to The NetBSD Foundation
-.\" by Steve Rumble.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: June 18 2018 $
-.Dt DPCLOCK 4 sgi
-.Os
-.Sh NAME
-.Nm dpclock
-.Nd DS8573A real-time clock
-.Sh SYNOPSIS
-.Cd "dpclock* at hpc0"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the DP8573A real-time clock.
-This device appears on SGI Indigo machines.
-.Sh SEE ALSO
-.Xr hpc 4 ,
-.Xr intro 4
+++ /dev/null
-.\" $OpenBSD: dsclock.4,v 1.6 2018/06/18 06:06:52 jmc Exp $
-.\" $NetBSD: dsclock.4,v 1.4 2008/04/30 13:10:56 martin Exp $
-.\"
-.\" Copyright (c) 2004 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This document is derived from work contributed to The NetBSD Foundation
-.\" by Steve Rumble.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: June 18 2018 $
-.Dt DSCLOCK 4 sgi
-.Os
-.Sh NAME
-.Nm dsclock
-.Nd DS1286 real-time clock
-.Sh SYNOPSIS
-.Cd "dsclock* at hpc0"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the DS1286 real-time clock.
-This device appears on SGI Indy and Indigo2 machines.
-.Sh SEE ALSO
-.Xr hpc 4 ,
-.Xr intro 4
+++ /dev/null
-.\" $OpenBSD: dsrtc.4,v 1.3 2009/11/16 20:13:13 miod Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: November 16 2009 $
-.Dt DSRTC 4 sgi
-.Os
-.Sh NAME
-.Nm dsrtc
-.Nd time-of-day clock
-.Sh SYNOPSIS
-.Cd "dsrtc0 at macebus0"
-.Cd "dsrtc0 at ioc?"
-.Cd "dsrtc0 at iof?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the Dallas DS1687 and DS1742W realtime
-clocks used on SGI systems.
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr ioc 4 ,
-.Xr iof 4 ,
-.Xr macebus 4
+++ /dev/null
-.\" $OpenBSD: gbe.4,v 1.8 2012/05/29 17:38:39 mikeb Exp $
-.\"
-.\" Copyright (c) 2007, 2009, Joel Sing <jsing@openbsd.org>
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: May 29 2012 $
-.Dt GBE 4 sgi
-.Os
-.Sh NAME
-.Nm gbe
-.Nd SGI Graphics Back End (GBE) frame buffer
-.Sh SYNOPSIS
-.Cd "gbe0 at mainbus0"
-.Cd "wsdisplay* at gbe?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the on-board Graphics Back End (GBE) frame
-buffer found in SGI
-.Tn O2
-machines.
-Console support is provided by the
-.Xr wscons 4
-console framework.
-.Pp
-A special option
-.Em nosog
-can be passed from the ARCS firmware to the driver
-via the
-.Sy OSLoadOptions
-environment variable to disable Sync-on-Green signal.
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr mainbus 4 ,
-.Xr wscons 4 ,
-.Xr wsdisplay 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.3 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Joel Sing .
-.Sh CAVEATS
-Hardware initialization must currently be performed by the ARCS firmware.
-The resolution configured by the firmware will be used, with a fixed
-color depth of 8 bits.
+++ /dev/null
-.\" $OpenBSD: gio.4,v 1.6 2012/04/18 18:01:56 miod Exp $
-.\" $NetBSD: gio.4,v 1.20 2008/04/30 13:10:56 martin Exp $
-.\"
-.\" Copyright (c) 2002 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This document is derived from work contributed to The NetBSD Foundation
-.\" by Antti Kantee.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: April 18 2012 $
-.Dt GIO 4 sgi
-.Os
-.Sh NAME
-.Nm gio
-.Nd Graphics I/O GIO bus
-.Sh SYNOPSIS
-.Cd "gio0 at imc0"
-.Sh DESCRIPTION
-The
-.Nm
-bus is a bus for connecting high-speed peripherals to the main memory and
-CPU.
-The devices themselves are typically (but not necessarily) connected to the
-.Xr hpc 4
-peripheral controller, and memory and CPU are accessed through the
-.Xr imc 4
-system controller.
-The
-.Nm
-bus is found on the Indigo, Indy, Challenge S,
-Challenge M, and Indigo2 machines and exists in three incarnations:
-GIO32, GIO32-bis, and GIO64.
-.Pp
-The devices currently supported under
-.Ox
-are:
-.Pp
-.Bl -tag -width 10n -compact -offset indent
-.\" .It Xr giopci 4
-.\" GIO-PCI bridge
-.It Xr grtwo 4
-SGI Express graphics
-.It Xr hpc 4
-SGI High performance Peripheral Controller
-.It Xr impact 4
-SGI Impact (aka Mardigras) graphics
-.It Xr light 4
-SGI Light graphics
-.It Xr newport 4
-SGI Newport graphics
-.El
-.Sh SEE ALSO
-.Xr imc 4 ,
-.Xr intro 4
-.Sh CAVEATS
-Challenge S systems may use only one
-.Nm
-DMA-capable expansion card, despite having two slots.
-Cards based on the
-.Xr hpc 4
-controller, such as the GIO32 SCSI and E++ Ethernet adapters, must be
-placed in slot 1 (closest to the side of the case).
-All other cards must be placed in slot 0 (adjacent to the memory banks).
-.Pp
-Indigo2 and Challenge M systems contain either three or four GIO64 connectors,
-depending on the model.
-However, in both cases only two electrically distinct slots are present.
-Therefore, distinct expansion cards may not share physical connectors
-associated with the same slot.
-On the other hand, these apparently redundant slot connectors allow
-multiple board assemblies to draw more power from the bus, and also
-helps mix
-.Nm
-and EISA boards in the same chassis.
-In all systems, the upper two GIO64 connectors are GIO slot 1, while
-the lower connectors (either one or two of them) are GIO slot 0.
+++ /dev/null
-.\" $OpenBSD: grtwo.4,v 1.2 2015/01/15 20:37:36 schwarze Exp $
-.\" $NetBSD: grtwo.4,v 1.3 2006/12/26 04:43:10 rumble Exp $
-.\"
-.\" Copyright (c) 2006 Stephen M. Rumble
-.\" Copyright (c) 2003 Ilpo Ruotsalainen
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\" 3. The name of the author may not be used to endorse or promote products
-.\" derived from this software without specific prior written permission.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-.\"
-.\" <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
-.\"
-.Dd $Mdocdate: January 15 2015 $
-.Dt GRTWO 4 sgi
-.Os
-.Sh NAME
-.Nm grtwo
-.Nd SGI Express graphics
-.Sh SYNOPSIS
-.Cd "grtwo* at gio?"
-.Cd "wsdisplay* at grtwo?"
-.Sh DESCRIPTION
-The
-.Nm
-driver supports the SGI
-.Sq Express
-series of graphics controllers, also known as
-.Sq XS ,
-.Sq XZ ,
-.Sq Elan
-and
-.Sq Extreme ,
-which may be found on Indigo, Crimson, Personal Iris, Indy and Indigo2
-systems.
-.Sh SEE ALSO
-.Xr gio 4 ,
-.Xr impact 4 ,
-.Xr light 4 ,
-.Xr newport 4 ,
-.Xr wscons 4 ,
-.Xr wsdisplay 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Nx 2.0 .
-It was significantly reworked and improved in
-.Ox 5.2 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Christopher SEKIYA .
+++ /dev/null
-.\" $OpenBSD: hpc.4,v 1.8 2018/06/18 06:06:52 jmc Exp $
-.\" $NetBSD: hpc.4,v 1.12 2008/04/30 13:10:56 martin Exp $
-.\"
-.\" Copyright (c) 2002 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This document is derived from work contributed to The NetBSD Foundation
-.\" by Antti Kantee.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: June 18 2018 $
-.Dt HPC 4 sgi
-.Os
-.Sh NAME
-.Nm hpc
-.Nd SGI High performance Peripheral Controller
-.Sh SYNOPSIS
-.Cd "hpc0 at gio0 addr 0x1fb80000"
-.Cd "hpc1 at gio0 addr 0x1fb00000"
-.Cd "hpc2 at gio0 addr 0x1fb98000"
-.\" .Cd "hpc3 at gio0 addr 0x1fb90000"
-.Sh DESCRIPTION
-.Nm
-interfaces the peripherals connected to it to the
-.Xr gio 4
-bus.
-.Nm
-is found on the Indigo, Indy, Challenge S, Challenge M,
-and Indigo2 machines.
-.Pp
-There are three different numerical revisions of the
-.Nm
-controller.
-Revisions 1 and 1.5 exist on Indigo machines,
-as well as GIO32bis expansion cards such as the E++ SEEQ-based
-Ethernet adapter.
-Revision 1.5 supports bi-endian operation.
-Revision 3 exists on Indy, Challenge S, Indigo2, and Challenge M systems.
-It is possible to have an on-board HPC3 as well as HPC1.5-based
-GIO32bis adapters in the Indy and Challenge S systems.
-Additionally, the Challenge S may have a secondary HPC3 if the IOPLUS
-(a.k.a. ''mezzanine'') board is installed.
-.Sh LIST OF DEVICES
-The devices currently supported are:
-.Pp
-.Bl -tag -width 10n -offset 3n -compact
-.It Xr dpclock 4
-DP8573A real-time clock
-.It Xr dsclock 4
-DS1286 real-time clock
-.\" .It Xr haltwo 4
-.\" HAL2 audio controller
-.It Xr panel 4
-front-panel buttons
-.It Xr sq 4
-Seeq 8003/80C03 Ethernet controller
-.It Xr wdsc 4
-WD33c93 SCSI controller
-.It Xr zs 4
-Zilog 8530 (ZSCC) Serial Communications Controller
-.El
-.Sh SEE ALSO
-.Xr gio 4 ,
-.Xr imc 4 ,
-.Xr intro 4
+++ /dev/null
-.\" $OpenBSD: iec.4,v 1.3 2009/11/03 18:52:41 miod Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: November 3 2009 $
-.Dt IEC 4 sgi
-.Os
-.Sh NAME
-.Nm iec
-.Nd IOC3 Ethernet interface
-.Sh SYNOPSIS
-.Cd "iec* at ioc?"
-.Cd "icsphy* at mii?"
-.Cd "nsphy* at mii?"
-.Cd "nsphyter* at mii?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the 10/100 Mbit/s Ethernet controller
-found on
-.Xr ioc 4
-devices.
-.Sh SEE ALSO
-.Xr arp 4 ,
-.Xr icsphy 4 ,
-.Xr ifmedia 4 ,
-.Xr intro 4 ,
-.Xr ioc 4 ,
-.Xr netintro 4 ,
-.Xr nsphy 4 ,
-.Xr nsphyter 4 ,
-.Xr hostname.if 5 ,
-.Xr ifconfig 8
-.Sh HISTORY
-The
-.Nm
-device driver first appeared in
-.Ox 4.7 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat ,
-.\" borrowing significant parts from the
-.\" .Xr mec 4
-.\" driver written by Izumi Tsutsui and Christopher Sekiya.
+++ /dev/null
-.\" $OpenBSD: imc.4,v 1.4 2012/03/28 20:44:23 miod Exp $
-.\" $NetBSD: imc.4,v 1.8 2008/04/30 13:10:56 martin Exp $
-.\"
-.\" Copyright (c) 2002 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This document is derived from work contributed to The NetBSD Foundation
-.\" by Antti Kantee.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: March 28 2012 $
-.Dt IMC 4 sgi
-.Os
-.Sh NAME
-.Nm imc
-.Nd Indy Memory Controller and system controller
-.Sh SYNOPSIS
-.Cd "imc0 at mainbus0"
-.Sh DESCRIPTION
-The Indy Memory Controller is responsible for acting as an interface from
-the
-.Xr gio 4
-bus to the main memory and CPU.
-The
-.Nm
-is found in the Indigo R4k, Indy, Challenge S, Challenge M, and Indigo2
-machines.
-.Sh SEE ALSO
-.Xr gio 4 ,
-.\" .Xr int 4 ,
-.Xr intro 4
+++ /dev/null
-.\" $OpenBSD: impact.4,v 1.2 2012/04/18 18:01:56 miod Exp $
-.\"
-.\" Copyright (c) 2010 Joel Sing <jsing@openbsd.org>
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: April 18 2012 $
-.Dt IMPACT 4 sgi
-.Os
-.Sh NAME
-.Nm impact
-.Nd SGI Impact (aka Mardigras) graphics
-.Sh SYNOPSIS
-.Cd "impact* at gio?"
-.Cd "impact* at xbow?"
-.Cd "wsdisplay* at impact?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the Impact (aka Mardigras) graphics card,
-which can be found in SGI
-Indigo2, Octane, Octane 2 and Onyx systems.
-Console support is provided by the
-.Xr wscons 4
-console framework.
-.Sh SEE ALSO
-.Xr gio 4 ,
-.Xr intro 4 ,
-.Xr wscons 4 ,
-.Xr wsdisplay 4 ,
-.Xr xbow 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.7 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: intro.4,v 1.27 2015/09/20 15:24:39 miod Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.\" Copyright (c) 2003 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
-.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: September 20 2015 $
-.Dt INTRO 4 sgi
-.Os
-.Sh NAME
-.Nm intro
-.Nd introduction to special files and hardware support
-.Sh DESCRIPTION
-The manual pages in section 4 describe the special files,
-related driver functions, and networking support
-available in the system.
-In this part of the manual,
-the SYNOPSIS section of each configurable device gives a sample specification
-for use in constructing a system description for the
-.Xr config 8
-program.
-The DIAGNOSTICS section lists messages which may appear on the console
-and/or in the system error log
-.Pa /var/log/messages
-due to errors in device operation; see
-.Xr syslogd 8
-for more information.
-.Pp
-This section contains both devices which may be configured into
-the system and network related information.
-The networking support is introduced in
-.Xr netintro 4 .
-.Sh DEVICE SUPPORT
-This section describes the hardware supported on the sgi platform.
-Software support for these devices comes in two forms.
-A hardware device may be supported with a character or block
-.Em device driver ,
-or it may be used within the networking subsystem and have a
-.Em network interface driver .
-Block and character devices are accessed through files in the file
-system of a special type; see
-.Xr mknod 8 .
-Network interfaces are indirectly accessed through the interprocess
-communication facilities provided by the system; see
-.Xr socket 2 .
-.Pp
-A hardware device is identified to the system at configuration time
-and the appropriate device or network interface driver is then
-compiled into the system.
-When the resultant system is booted, the autoconfiguration facilities
-in the system probe for the device and, if found, enable the software
-support for it.
-If a device does not respond at autoconfiguration time it is not
-accessible at any time afterwards.
-To enable a device which did not autoconfigure, the system must be rebooted.
-.Pp
-The autoconfiguration system is described in
-.Xr autoconf 4 .
-A list of the supported devices is given below.
-.Sh HARDWARE
-The following systems are supported:
-.Bl -column "Hardware" "Family" "Kernel" "Model" -offset 3n
-.It Sy Hardware Ta Sy Family Ta Sy Kernel Ta Sy Model
-.It Li IP20 Ta IP20 Ta IP22 Ta "Indigo (R4k)"
-.It Li IP22 Ta IP22 Ta IP22 Ta "Indigo2, Challenge M (R4k)"
-.It Li IP24 Ta IP22 Ta IP22 Ta "Indy, Challenge S"
-.It Li IP26 Ta IP22 Ta IP26 Ta "POWER Indigo2 (R8000)"
-.It Li IP27 Ta IP27 Ta IP27 Ta "Origin 2x00, Onyx 2"
-.It Li IP28 Ta IP22 Ta IP28 Ta "POWER Indigo2 (R10000)"
-.It Li IP29 Ta IP27 Ta IP27 Ta "Origin 200"
-.It Li IP30 Ta IP30 Ta IP30 Ta "Octane, Octane 2 (Speedracer)"
-.It Li IP31 Ta IP27 Ta IP27 Ta "Origin 200/2x00, Onyx 2 (250+\ MHz)"
-.It Li IP32 Ta IP32 Ta IP32 Ta "O2, O2+ (Moosehead)"
-.It Li IP34 Ta IP35 Ta IP27 Ta "Fuel (Asterix)"
-.It Li IP35 Ta IP35 Ta IP27 Ta "Origin 3x00, Onyx 3x000, Onyx 3"
-.It Li IP39 Ta IP35 Ta IP27 Ta "Onyx 4"
-.It Li IP45 Ta IP35 Ta IP27 Ta "Origin 300, Onyx 300"
-.It Li IP53 Ta IP35 Ta IP27 Ta "Origin 350, Onyx 350, Tezro"
-.\" IP59 are the 1GHz IP53 designs
-.It Li IP59 Ta IP35 Ta IP27 Ta "Origin 350, Onyx 350, Tezro (1GHz)"
-.El
-.Sh LIST OF DEVICES
-The devices listed below are supported in this incarnation of the
-system.
-.\" Devices are indicated by their functional interface.
-Not all supported devices are listed.
-.Pp
-.Bl -tag -width 10n -offset 3n -compact
-.It Xr gbe 4
-SGI Graphics Back End (GBE) frame buffer
-.It Xr ioc 4
-IOC3 generic workstation I/O device
-.It Xr iof 4
-IOC4 generic workstation I/O device
-.It Xr macebus 4
-Multimedia, Audio and Communications Engine I/O ASIC
-.It Xr mainbus 4
-SGI main processor bus device
-.It Xr mavb 4
-Moosehead A/V Board audio device
-.It Xr mec 4
-MAC-110 10/100 Ethernet device
-.It Xr power 4
-power button
-.El
-.Pp
-A further list of available devices is contained within the pages
-describing the system buses and controllers.
-For example, a PCI device would be listed in the
-.Xr pci 4
-man page.
-The following buses and controllers list these devices:
-.Pp
-.Bl -tag -width "cardbus(4)XX" -offset 3n -compact
-.It Xr gio 4
-Graphics I/O GIO bus
-.It Xr pci 4
-introduction to PCI bus support
-.It Xr usb 4
-introduction to Universal Serial Bus support
-.It Xr xbow 4
-Octane and Origin family XIO bus
-.El
-.Sh SEE ALSO
-.Xr autoconf 4 ,
-.Xr config 8
-.Sh HISTORY
-This
-.Tn sgi
-.Nm
-appeared in
-.Ox 3.6 .
+++ /dev/null
-.\" $OpenBSD: ioc.4,v 1.7 2009/11/16 20:13:13 miod Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: November 16 2009 $
-.Dt IOC 4 sgi
-.Os
-.Sh NAME
-.Nm ioc
-.Nd IOC3 generic workstation I/O device
-.Sh SYNOPSIS
-.Cd "ioc* at pci?"
-.Cd "com0 at ioc? base 0x20178"
-.Cd "com1 at ioc? base 0x20170"
-.Cd "dsrtc0 at ioc?"
-.Cd "iec* at ioc?"
-.Cd "iockbc* at ioc?"
-.Cd "onewire* at ioc?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the various SGI IOC3 flavours on Octane and Origin
-family systems.
-.Pp
-Depending on their particular configuration, the IOC3 boards may provide:
-.Pp
-.Bl -tag -width 10n -offset ind -compact
-.It Xr com 4
-Two serial ports.
-.It Xr dsrtc 4
-Time-of-day chip.
-.It Xr iec 4
-10/100 Mbit/s Ethernet interface.
-.It Xr iockbc 4
-PS/2 keyboard and mouse interface.
-.El
-.Pp
-In order to tell these configurations apart, all IOC3 boards, except those
-on-board Origin family systems, contain a factory-setup
-.Xr onewire 4
-bus with
-.Xr owserial 4
-components identifying the IOC3 flavour, as well as
-.Xr owmac 4
-components storing the Ethernet address, for IOC3 devices with Ethernet
-interfaces.
-.Sh SEE ALSO
-.Xr com 4 ,
-.Xr dsrtc 4 ,
-.Xr iec 4 ,
-.Xr intro 4 ,
-.Xr iockbc 4 ,
-.Xr onewire 4 ,
-.Xr owmac 4 ,
-.Xr owserial 4 ,
-.Xr pci 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.4 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: iockbc.4,v 1.3 2009/11/18 19:03:21 miod Exp $
-.\"
-.\" Copyright (c) 2009 Joel Sing <jsing@openbsd.org>
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: November 18 2009 $
-.Dt IOCKBC 4 sgi
-.Os
-.Sh NAME
-.Nm iockbc
-.Nd IOC PS/2 keyboard and mouse interface
-.Sh SYNOPSIS
-.Cd "iockbc* at ioc?"
-.Cd "iockbc* at iof?"
-.Cd "pckbd* at iockbc?"
-.Cd "pms* at iockbc?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the keyboard and mouse interface found on
-.Xr ioc 4
-and
-.Xr iof 4
-devices.
-.Sh SEE ALSO
-.Xr ioc 4 ,
-.Xr iof 4 ,
-.Xr pckbd 4 ,
-.Xr pms 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.7 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Joel Sing .
+++ /dev/null
-.\" $OpenBSD: iof.4,v 1.5 2009/11/18 19:03:21 miod Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: November 18 2009 $
-.Dt IOF 4 sgi
-.Os
-.Sh NAME
-.Nm iof
-.Nd IOC4 generic workstation I/O device
-.Sh SYNOPSIS
-.Cd "iof* at pci?"
-.Cd "com0 at iof? base 0x380"
-.Cd "com* at iof?"
-.Cd "dsrtc0 at iof?"
-.Cd "iockbc* at iof?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the SGI IOC4-based basic I/O device on Origin 350
-and Tezro systems.
-.Pp
-The IOC4 chip provides:
-.Pp
-.Bl -tag -width 10n -offset ind -compact
-.It Xr com 4
-Four serial ports.
-.It Xr dsrtc 4
-Time-of-day chip.
-.It Xr iockbc 4
-PS/2 keyboard and mouse interface.
-.It Xr wdc 4
-WD100x compatible hard disk controller driver
-.El
-.Sh SEE ALSO
-.Xr com 4 ,
-.Xr dsrtc 4 ,
-.Xr intro 4 ,
-.Xr iockbc 4 ,
-.Xr pci 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.6 .
-.Sh BUGS
-The ATAPI interface is not supported yet.
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: light.4,v 1.3 2014/12/07 18:17:22 jmc Exp $
-.\" $NetBSD: light.4,v 1.1 2006/12/26 04:43:10 rumble Exp $
-.\"
-.\" Copyright (c) 2006 Stephen M. Rumble
-.\" Copyright (c) 2003 Ilpo Ruotsalainen
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\" 3. The name of the author may not be used to endorse or promote products
-.\" derived from this software without specific prior written permission.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-.\"
-.\" <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
-.\"
-.Dd $Mdocdate: December 7 2014 $
-.Dt LIGHT 4 sgi
-.Os
-.Sh NAME
-.Nm light
-.Nd SGI Light graphics
-.Sh SYNOPSIS
-.Cd "light* at gio?"
-.Cd "wsdisplay* at light?"
-.Sh DESCRIPTION
-The
-.Nm
-driver supports the SGI
-.Sq Light
-series of graphics controllers, also known as
-.Sq Entry
-or
-.Sq Starter
-graphics, and designated as LG1 or LG2,
-which may be found in Indigo and Crimson systems.
-.Pp
-These controllers have a fixed 1024x768 resolution with 8-bit colour depth.
-Unlike most SGI offerings, both 13W3 and VGA video cables are supported.
-.Sh SEE ALSO
-.Xr gio 4 ,
-.Xr grtwo 4 ,
-.Xr impact 4 ,
-.Xr newport 4 ,
-.Xr wscons 4 ,
-.Xr wsdisplay 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Nx 5.0
-and was ported to
-.Ox 5.2 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Stephen M. Rumble .
-.Sh CAVEATS
-Much is unknown about the REX chipset.
-Therefore, the driver relies on the PROM to properly initialise the graphics.
-.\" .Pp
-.\" This driver will not run without modification on Crimson machines.
+++ /dev/null
-.\" $OpenBSD: macebus.4,v 1.13 2015/11/21 08:04:20 jmc Exp $
-.\" $NetBSD: mace.4,v 1.4 2004/02/10 16:54:02 wiz Exp $
-.\"
-.\" Copyright (c) 2002 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: November 21 2015 $
-.Dt MACEBUS 4 sgi
-.Os
-.Sh NAME
-.Nm macebus ,
-.Nm macepcibr
-.Nd Multimedia, Audio and Communications Engine I/O ASIC
-.Sh SYNOPSIS
-.Cd "macebus0 at mainbus0"
-.Pp
-.Cd "clock0 at macebus0"
-.Cd "com0 at macebus0 base 0x00390000"
-.Cd "com1 at macebus0 base 0x00398000"
-.Cd "dsrtc0 at macebus0"
-.Cd "mavb0 at macebus0"
-.Cd "mec0 at macebus0"
-.Cd "mkbc0 at macebus0"
-.Cd "power0 at macebus0"
-.Pp
-.Cd "macepcibr0 at macebus0"
-.Cd "pci* at macepcibr?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides access to the MACE I/O ASIC, which manages all
-on-board devices in an SGI O2 machine.
-The
-.Nm
-also provides a
-.Tn PCI
-bridge.
-.Sh SEE ALSO
-.Xr com 4 ,
-.Xr dsrtc 4 ,
-.Xr intro 4 ,
-.Xr mainbus 4 ,
-.Xr mavb 4 ,
-.Xr mec 4 ,
-.Xr mkbc 4 ,
-.Xr pci 4 ,
-.Xr power 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 3.6 .
+++ /dev/null
-.\" $OpenBSD: mavb.4,v 1.8 2015/01/15 20:37:36 schwarze Exp $
-.\"
-.\" Copyright (c) 2005 Mark Kettenis
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: January 15 2015 $
-.Dt MAVB 4 sgi
-.Os
-.Sh NAME
-.Nm mavb
-.Nd Moosehead A/V Board audio device
-.Sh SYNOPSIS
-.Cd "mavb0 at macebus0"
-.Cd "audio* at mavb?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the Moosehead A/V Board found on SGI
-.Tn O2
-machines.
-.Pp
-The Moosehead A/V Board uses an AD1843 codec that supports 8- and
-16-bit audio sample recording and playback at rates from 5 to 54 kHz,
-with 1 Hz resolution.
-The
-.Nm
-driver also makes it possible to control the playback volume by using
-the buttons on the front of the
-.Tn O2 .
-.Sh SEE ALSO
-.Xr audio 4 ,
-.Xr intro 4 ,
-.Xr macebus 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 3.7 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Mark Kettenis .
-.Sh CAVEATS
-The analog mixer in the AD1843 codec does not provide a master volume
-control.
-Therefore, the
-.Tn O2
-volume buttons only control the output volume of the DAC.
-.Sh BUGS
-Currently only sample rates up to 48 kHz are supported.
-The second DAC on the AD1843 codec sits idle.
+++ /dev/null
-.\" $OpenBSD: mec.4,v 1.11 2015/01/15 20:37:36 schwarze Exp $
-.\"
-.\" Written by Michael Shalayeff, 2004. Public Domain.
-.\"
-.Dd $Mdocdate: January 15 2015 $
-.Dt MEC 4 sgi
-.Os
-.Sh NAME
-.Nm mec
-.Nd MAC-110 10/100 Ethernet device
-.Sh SYNOPSIS
-.Cd "mec0 at macebus0"
-.Cd "icsphy* at mii?"
-.Cd "nsphy* at mii?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the MAC-110 Fast Ethernet controller
-found on
-.Tn O2
-machines.
-.Sh SEE ALSO
-.Xr arp 4 ,
-.Xr icsphy 4 ,
-.Xr ifmedia 4 ,
-.Xr intro 4 ,
-.Xr macebus 4 ,
-.Xr netintro 4 ,
-.Xr nsphy 4 ,
-.Xr hostname.if 5 ,
-.Xr ifconfig 8
-.Sh HISTORY
-The
-.Nm
-device driver first appeared in
-.Ox 3.6 .
-.Sh AUTHORS
-.An -nosplit
-The
-.Nm
-device driver was written by
-.An Izumi Tsutsui
-and
-.An Christopher SEKIYA .
-The
-.Ox
-port was done by
-.An Michael Shalayeff .
+++ /dev/null
-.\" $OpenBSD: mkbc.4,v 1.4 2009/10/26 18:38:09 miod Exp $
-.\"
-.\" Copyright (c) 2007 Joel Sing
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: October 26 2009 $
-.Dt MKBC 4 sgi
-.Os
-.Sh NAME
-.Nm mkbc
-.Nd Moosehead PS/2 Controller
-.Sh SYNOPSIS
-.Cd "mkbc0 at macebus0"
-.Cd "pckbd* at mkbc?"
-.Cd "pms* at mkbc?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the Moosehead PS/2 Controllers found on SGI
-.Tn O2
-machines.
-.Sh SEE ALSO
-.Xr macebus 4 ,
-.Xr pckbd 4 ,
-.Xr pms 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.3 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Joel Sing .
+++ /dev/null
-.\" $OpenBSD: newport.4,v 1.6 2012/04/19 13:47:09 jmc Exp $
-.\" $NetBSD: newport.4,v 1.6 2006/12/26 04:43:10 rumble Exp $
-.\"
-.\" Copyright (c) 2003 Ilpo Ruotsalainen
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\" 3. The name of the author may not be used to endorse or promote products
-.\" derived from this software without specific prior written permission.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-.\"
-.\" <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
-.\"
-.Dd $Mdocdate: April 19 2012 $
-.Dt NEWPORT 4 sgi
-.Os
-.Sh NAME
-.Nm newport
-.Nd SGI Newport graphics
-.Sh SYNOPSIS
-.Cd "newport* at gio?"
-.Cd "wsdisplay* at newport?"
-.Sh DESCRIPTION
-The
-.Nm
-driver supports the SGI
-.Sq Newport
-series of graphics controllers, also known as
-.Sq Indy 8-bit ,
-.Sq Indy 24-bit ,
-.Sq XGE
-and
-.Sq XL ,
-which may be found on Indy and Indigo2 systems.
-.Sh SEE ALSO
-.Xr gio 4 ,
-.Xr grtwo 4 ,
-.Xr impact 4 ,
-.Xr light 4 ,
-.Xr wscons 4 ,
-.Xr wsdisplay 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Nx 2.0
-and was ported to
-.Ox 5.2 .
+++ /dev/null
-.\" $OpenBSD: odyssey.4,v 1.2 2010/03/07 14:13:58 jsing Exp $
-.\"
-.\" Copyright (c) 2010 Joel Sing <jsing@openbsd.org>
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: March 7 2010 $
-.Dt ODYSSEY 4 sgi
-.Os
-.Sh NAME
-.Nm odyssey
-.Nd SGI VPro (aka Odyssey) graphics
-.Sh SYNOPSIS
-.Cd "odyssey* at xbow?"
-.Cd "wsdisplay* at odyssey?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the VPro (aka Odyssey) graphics card, which can be
-found in SGI
-.Tn Octane ,
-.Tn Octane2 ,
-.Tn Fuel ,
-.Tn Tezro
-and
-.Tn Onyx
-systems.
-Console support is provided by the
-.Xr wscons 4
-console framework.
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr wscons 4 ,
-.Xr wsdisplay 4 ,
-.Xr xbow 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.7 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Joel Sing .
+++ /dev/null
-.\" $OpenBSD: owmac.4,v 1.2 2009/05/18 06:55:33 jmc Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: May 18 2009 $
-.Dt OWMAC 4 sgi
-.Os
-.Sh NAME
-.Nm owmac
-.Nd 1-Wire Ethernet address
-.Sh SYNOPSIS
-.Cd "owmac* at onewire?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the Dallas DS1981, DS1982 and DS2502
-add-only memory devices, found on SGI IOC3 devices.
-.Pp
-These devices are used to store the Ethernet address of the
-.Nm ioc
-Ethernet interface, when such an interface is present.
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr ioc 4 ,
-.Xr onewire 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.4 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: owserial.4,v 1.2 2009/05/18 06:55:33 jmc Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: May 18 2009 $
-.Dt OWSERIAL 4 sgi
-.Os
-.Sh NAME
-.Nm owserial
-.Nd 1-Wire serial number
-.Sh SYNOPSIS
-.Cd "owserial* at onewire?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the Dallas DS2505 and DS2506
-add-only memory devices, found on various SGI devices.
-.Pp
-These devices are used to store the various serial numbers of the
-system components.
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr ioc 4 ,
-.Xr onewire 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.4 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: panel.4,v 1.2 2012/04/19 13:47:09 jmc Exp $
-.\"
-.\"
-.\" Copyright (c) 2012 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: April 19 2012 $
-.Dt PANEL 4 sgi
-.Os
-.Sh NAME
-.Nm panel
-.Nd front-panel buttons
-.Sh SYNOPSIS
-.Cd "panel* at hpc?"
-.Sh DESCRIPTION
-The
-.Nm
-driver handles the front-panel power and, on Indy, volume buttons.
-If the
-.Va hw.allowpowerdown
-.Xr sysctl 8
-is set to 1,
-.Nm
-will signal
-.Xr init 8
-to do a clean
-.Xr shutdown 8
-when the power button is pressed.
-.Sh SEE ALSO
-.Xr hpc 4 ,
-.Xr intro 4 ,
-.Xr init 8 ,
-.Xr rc.shutdown 8 ,
-.Xr sysctl 8
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 5.2 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: power.4,v 1.5 2013/07/16 16:05:49 schwarze Exp $
-.\"
-.\" Copyright (c) 2007 Jasper Lievisse Adriaanse <jasper@openbsd.org>
-.\" All rights reserved.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: July 16 2013 $
-.Dt POWER 4 sgi
-.Os
-.Sh NAME
-.Nm power
-.Nd power button
-.Sh SYNOPSIS
-.Cd "power0 at macebus0" Pq "O2"
-.Cd "power0 at mainbus0" Pq "Octane"
-.Sh DESCRIPTION
-The SGI O2 and Octane machines generate an interrupt when the power button
-on the front panel is pressed.
-The
-.Nm
-driver catches that interrupt.
-If the
-.Va hw.allowpowerdown
-.Xr sysctl 8
-is set to 1,
-.Nm
-will then signal
-.Xr init 8
-to do a clean
-.Xr shutdown 8 .
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr macebus 4 ,
-.Xr init 8 ,
-.Xr rc.shutdown 8 ,
-.Xr sysctl 8
-.Sh HISTORY
-Support for the
-.Nm
-driver first appeared in
-.Ox 4.3 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Jasper Lievisse Adriaanse Aq Mt jasper@openbsd.org .
+++ /dev/null
-.\" $OpenBSD: sq.4,v 1.1 2012/03/28 20:44:23 miod Exp $
-.\" $NetBSD: sq.4,v 1.5 2008/04/30 13:10:56 martin Exp $
-.\"
-.\" Copyright (c) 2004 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This document is derived from work contributed to The NetBSD Foundation
-.\" by Steve Rumble.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS BE
-.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: March 28 2012 $
-.Dt SQ 4 sgi
-.Os
-.Sh NAME
-.Nm sq
-.Nd Seeq 8003/80C03 Ethernet controller
-.Sh SYNOPSIS
-.Cd "sq* at hpc?"
-.Sh DESCRIPTION
-The
-.Nm
-interface provides support for the SEEQ 8003 and 80c03 (aka SGI EDLC)
-Ethernet controller.
-DMA is provided by
-.Xr hpc 4 .
-.Pp
-The
-.Nm
-is found in the Indigo, Indy, Challenge S, Challenge M and
-Indigo2 machines, as well as the SGI E++ GIO32bis Ethernet adapter.
-.Sh SEE ALSO
-.Xr arp 4 ,
-.Xr hpc 4 ,
-.\" .Xr ifmedia 4 ,
-.Xr intro 4 ,
-.Xr netintro 4 ,
-.Xr hostname.if 5 ,
-.Xr ifconfig 8
+++ /dev/null
-.\" $OpenBSD: xbow.4,v 1.5 2010/03/07 21:26:24 miod Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: March 7 2010 $
-.Dt XBOW 4 sgi
-.Os
-.Sh NAME
-.Nm xbow
-.Nd Octane and Origin family XIO bus
-.Sh SYNOPSIS
-.Cd "xbow0 at mainbus0"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the XIO bus found on SGI
-.Sq ccNUMA
-designs, such as the Octane
-.Pq IP30
-and Origin
-.Pq IP27 and IP35
-families, as well as related systems such as Onyx and Tezro.
-.Pp
-XIO components are called
-.Sq widgets
-and contain either I/O devices, processors, or memory.
-.Pp
-A XIO bus supports up to 16 widgets, but the existing designs only use
-up to 8.
-.Pp
-Special
-.Sq hub
-widgets allow several XIO buses to be interconnected, expanding the
-capacity of a given system, and allowing complex multi-node systems to be built.
-.Pp
-The widgets currently supported under
-.Ox
-are:
-.Pp
-.Bl -tag -width 10n -compact -offset indent
-.It Xr impact 4
-SGI Impact (aka Mardigras) graphics
-.It Xr odyssey 4
-SGI VPro (aka Odyssey) graphics
-.It Xr xbridge 4
-XIO-PCI bridge
-.It Xr xheart 4
-Octane core system widget
-.El
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr mainbus 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.4 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: xbridge.4,v 1.6 2015/11/21 08:04:20 jmc Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: November 21 2015 $
-.Dt XBRIDGE 4 sgi
-.Os
-.Sh NAME
-.Nm xbridge ,
-.Nm xbpci
-.Nd XIO-PCI bridge
-.Sh SYNOPSIS
-.Cd "xbridge* at xbow?"
-.Cd "xbpci* at xbridge?"
-.Cd "pci* at xbpci?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the XIO-PCI and XIO-PCI-X bridges commonly found
-on Octane and Origin family systems.
-.Pp
-All these systems feature at least one
-.Nm
-device to which the on-board devices are connected.
-.Pp
-.Nm
-devices support up to 8 different PCI devices, or two distinct
-buses of 4 PCI-X devices.
-Each PCI or PCI-X device is attached to a logical
-.Nm xbpci
-device.
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr pci 4 ,
-.Xr xbow 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.4 .
-Support for the PCI-X bridges was added in
-.Ox 4.7 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: xheart.4,v 1.2 2009/11/16 20:13:13 miod Exp $
-.\"
-.\" Copyright (c) 2009 Miodrag Vallat.
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: November 16 2009 $
-.Dt XHEART 4 sgi
-.Os
-.Sh NAME
-.Nm xheart
-.Nd Octane core system widget
-.Sh SYNOPSIS
-.Cd "xheart* at xbow?"
-.Cd "onewire* at xheart?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the interrupt logic on Octane systems.
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr onewire 4 ,
-.Xr xbow 4
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.4 .
-.\" .Sh AUTHORS
-.\" The
-.\" .Nm
-.\" driver was written by
-.\" .An Miod Vallat .
+++ /dev/null
-.\" $OpenBSD: zs.4,v 1.5 2012/05/12 16:47:44 miod Exp $
-.\" $NetBSD: zstty.4,v 1.14 2011/06/07 20:22:56 wiz Exp $
-.\"
-.\" Copyright (c) 1997 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This code is derived from software contributed to The NetBSD Foundation
-.\" by Gordon W. Ross.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
-.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: May 12 2012 $
-.Dt ZS 4 sgi
-.Os
-.Sh NAME
-.Nm zs ,
-.Nm zskbd ,
-.Nm zsms ,
-.Nm zstty
-.Nd Zilog 8530 (ZSCC) Serial Communications Controller
-.Sh SYNOPSIS
-.Cd "zs0 at hpc0"
-.Cd "zs1 at hpc0"
-.Cd "zskbd* at zs1 channel 0 " Pq "Indigo"
-.Cd "zsms* at zs1 channel 1 " Pq "Indigo"
-.Cd "zstty* at zs0 channel ?"
-.Sh DESCRIPTION
-The
-.Nm
-driver provides TTY support for Zilog 8530 Dual UART chips.
-On Indigo systems, one of the interfaces is hardwired for use by the
-keyboard and mouse.
-The
-.Nm zskbd
-devices connect keyboard devices to the generic keyboard driver
-.Nm wskbd .
-The
-.Nm zsms
-devices connect mice to the generic mouse driver
-.Xr wsmouse 4 .
-The remaining additional
-.Nm zstty
-interfaces provide RS-423
-and RS-232 serial ports for general purpose use.
-.Pp
-The
-.Nm
-driver supports all of the standard
-.Xr tty 4
-ioctl calls.
-The status of the DTR, RTS, CTS, and DCD signals can be queried with
-TIOCMGET command, but, due to limitations in the hardware,
-only the DTR and RTS signals can be modified with TIOCMSET, TIOCMBIC,
-and TIOCMBIS
-.Xr ioctl 2
-commands.
-.Pp
-Input and output for each line may set to any baud rate in the
-range 50 to 38400 (and higher on some machines).
-.Pp
-On some systems, the hardware design causes the state of the CTS, DCD, DTR
-and RTS lines to be inverted.
-While the
-.Nm zstty
-driver attempts to correctly account for this quirk,
-it can be forced to reverse its logic by setting
-.Ar flags
-to
-.Ar 1
-(either via
-.Xr config 8
-or
-.Xr boot_config 8 ) .
-Misconfiguration of these line settings usually leads to
-.Xr getty 8
-processes being unable to open the device or sleeping on
-.Sq Dv ttyopn .
-.Sh FILES
-.Bl -tag -width Pa -compact
-.It Pa /dev/ttya
-.It Pa /dev/ttyb
-.El
-.Sh DIAGNOSTICS
-.Bl -tag -width indent
-.It zs0*: fifo overflow
-.br
-The on-chip
-.Dq FIFO
-has overflowed and incoming data has been lost.
-This generally means the machine is not responding to
-interrupts from the ZS chip fast enough, which can be
-remedied only by using a lower baud rate.
-.It zs0*: ring overflow
-.br
-The software input
-.Qq ring
-has overflowed.
-This usually means input flow-control is not configured correctly
-.Pq i.e. incorrect cable wiring .
-.El
-.Sh SEE ALSO
-.Xr hpc 4 ,
-.Xr intro 4 ,
-.Xr tty 4 ,
-.Xr wskbd 4 ,
-.Xr wsmouse 4
-.\" $OpenBSD: onewire.4,v 1.10 2013/07/16 16:05:49 schwarze Exp $
+.\" $OpenBSD: onewire.4,v 1.11 2021/05/01 16:11:09 visa Exp $
.\"
.\" Copyright (c) 2006 Alexander Yurchenko <grange@openbsd.org>
.\"
.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
.\"
-.Dd $Mdocdate: July 16 2013 $
+.Dd $Mdocdate: May 1 2021 $
.Dt ONEWIRE 4
.Os
.Sh NAME
.Sh SYNOPSIS
.Cd "onewire* at gpioow?"
.Cd "onewire* at uow?"
-.Cd "onewire* at ioc? " Pq sgi
-.Cd "onewire* at xheart? " Pq sgi
.Pp
.Cd "option ONEWIREVERBOSE"
.Sh DESCRIPTION
-.\" $OpenBSD: pci.4,v 1.384 2020/12/03 22:53:08 jmc Exp $
+.\" $OpenBSD: pci.4,v 1.385 2021/05/01 16:11:09 visa Exp $
.\" $NetBSD: pci.4,v 1.29 2000/04/01 00:32:23 tsarna Exp $
.\"
.\" Copyright (c) 2000 Theo de Raadt. All rights reserved.
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
-.Dd $Mdocdate: December 3 2020 $
+.Dd $Mdocdate: May 1 2021 $
.Dt PCI 4
.Os
.Sh NAME
.Cd "# octeon"
.Cd "pci* at octpcie?"
.Pp
-.Cd "# sgi"
-.Cd "pci* at macepcibr?"
-.Cd "pci* at xbridge?"
-.Pp
.Cd "# sparc64"
.Cd "pci* at psycho?"
.Cd "pci* at schizo?"
-.\" $OpenBSD: pckbd.4,v 1.41 2019/05/11 14:19:16 abieber Exp $
+.\" $OpenBSD: pckbd.4,v 1.42 2021/05/01 16:11:09 visa Exp $
.\" $NetBSD: pckbd.4,v 1.3 1999/12/21 11:31:07 drochner Exp $
.\"
.\" Copyright (c) 1999
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
-.Dd $Mdocdate: May 11 2019 $
+.Dd $Mdocdate: May 1 2021 $
.Dt PCKBD 4
.Os
.Sh NAME
.Sh SYNOPSIS
.Cd "pckbd* at pckbc?"
.Cd "pckbd* at gsckbc?" Pq hppa
-.Cd "pckbd* at mkbc?" Pq sgi
.Cd "wskbd* at pckbd?"
.Cd "option PCKBD_LAYOUT=XXX"
.Sh DESCRIPTION
.Sh SEE ALSO
.Xr intro 4 ,
.Xr isa 4 ,
-.Xr mkbc 4 ,
.Xr pckbc 4 ,
.Xr wskbd 4 ,
.Xr wsconsctl 8
-.\" $OpenBSD: pms.4,v 1.12 2010/09/26 20:39:08 miod Exp $
+.\" $OpenBSD: pms.4,v 1.13 2021/05/01 16:11:09 visa Exp $
.\" $NetBSD: pms.4,v 1.4 2000/07/05 15:45:34 msaitoh Exp $
.\"
.\" Copyright (c) 1993 Christopher G. Demetriou
.\"
.\" <<Id: LICENSE,v 1.2 2000/06/14 15:57:33 cgd Exp>>
.\"
-.Dd $Mdocdate: September 26 2010 $
+.Dd $Mdocdate: May 1 2021 $
.Dt PMS 4
.Os
.Sh NAME
.Sh SYNOPSIS
.Cd "pms* at pckbc?"
.Cd "pms* at gsckbc?" Pq "hppa"
-.Cd "pms* at mkbc?" Pq "sgi"
.Cd "wsmouse* at pms? mux 0"
.Sh DESCRIPTION
The
.Xr gsckbc 4 ,
.Xr intro 4 ,
.Xr lms 4 ,
-.Xr mkbc 4 ,
.Xr mms 4 ,
.Xr pckbc 4 ,
.Xr ums 4 ,
-.\" $OpenBSD: spdmem.4,v 1.7 2013/07/16 16:05:49 schwarze Exp $
+.\" $OpenBSD: spdmem.4,v 1.8 2021/05/01 16:11:09 visa Exp $
.\"
.\" Copyright (c) 2007 Jonathan Gray <jsg@openbsd.org>
.\"
.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
.\"
-.Dd $Mdocdate: July 16 2013 $
+.Dd $Mdocdate: May 1 2021 $
.Dt SPDMEM 4
.Os
.Sh NAME
.Pp
.Cd "# macppc"
.Cd "spdmem* at mem?"
-.Pp
-.Cd "# sgi"
-.Cd "spdmem* at mainbus?"
.Sh DESCRIPTION
The
.Nm
+++ /dev/null
-.\" $OpenBSD: wdsc.4,v 1.2 2014/03/18 22:36:31 miod Exp $
-.\" $NetBSD: wdsc.4,v 1.10 2009/03/09 19:24:30 joerg Exp $
-.\"
-.\" Copyright (c) 1999 The NetBSD Foundation, Inc.
-.\" All rights reserved.
-.\"
-.\" This code is derived from software contributed to The NetBSD Foundation
-.\" by Steve C. Woodford.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
-.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-.\" POSSIBILITY OF SUCH DAMAGE.
-.\"
-.Dd $Mdocdate: March 18 2014 $
-.Dt WDSC 4
-.Os
-.Sh NAME
-.Nm wdsc
-.Nd WD33c93 SCSI controller
-.Sh SYNOPSIS
-.Cd "wdsc* at hpc? " Pq sgi
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for the Western Digital WD33c93 and WD33c93B SCSI
-controllers.
-.Pp
-In addition to sending the required SCSI commands to
-target devices on the SCSI bus, the
-.Nm
-driver deals with DMA, device interrupts, sync/async negotiation,
-and target disconnects/reconnects.
-.Sh DEVICE FLAGS
-.Bl -tag -width "Bits XX-XX" -compact
-.It Bits 0-7
-Disable disconnect/reselect for the corresponding target
-.It Bits 8-15
-Disable synchronous negotiation for target "[bit - 8]"
-.It Bits 16-23
-Disable tagged queuing for target "[bit - 16]"
-.El
-.Pp
-The
-.Nm
-device flags may be OR'd together to enable any combination of
-the features listed above.
-Tape devices should be allowed to disconnect for the SCSI bus to operate
-acceptably.
-.Sh SEE ALSO
-.Xr hpc 4 ,
-.Xr intro 4 ,
-.\" .Xr pcc 4 ,
-.Xr scsibus 4
-.\" $OpenBSD: core.5,v 1.24 2019/09/06 19:25:08 schwarze Exp $
+.\" $OpenBSD: core.5,v 1.25 2021/05/01 16:11:10 visa Exp $
.\" $NetBSD: core.5,v 1.4 1994/11/30 19:31:11 jtc Exp $
.\"
.\" Copyright (c) 1980, 1991, 1993
.\"
.\" @(#)core.5 8.3 (Berkeley) 12/11/93
.\"
-.Dd $Mdocdate: September 6 2019 $
+.Dd $Mdocdate: May 1 2021 $
.Dt CORE 5
.Os
.Sh NAME
For each thread, an
.Dv NT_OPENBSD_REGS
note is included containing the state of the regular registers of
-the thread and, on architectures other than luna88k and sgi, an
+the thread and, on architectures other than luna88k, an
.Dv NT_OPENBSD_FPREGS
note is also included containing the state of the floating-point
registers of the thread.
-.\" $OpenBSD: mdoc.7,v 1.174 2021/04/28 14:29:50 jsg Exp $
+.\" $OpenBSD: mdoc.7,v 1.175 2021/05/01 16:11:10 visa Exp $
.\"
.\" Copyright (c) 2009, 2010, 2011 Kristaps Dzonsons <kristaps@bsd.lv>
.\" Copyright (c) 2010, 2011, 2013-2020 Ingo Schwarze <schwarze@openbsd.org>
.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
.\"
-.Dd $Mdocdate: April 28 2021 $
+.Dd $Mdocdate: May 1 2021 $
.Dt MDOC 7
.Os
.Sh NAME
.Cm octeon ,
.Cm powerpc64 ,
.Cm riscv64 ,
-.Cm sgi ,
and
.Cm sparc64 .
.El
-# $OpenBSD: Makefile,v 1.101 2021/04/28 15:11:27 jsg Exp $
+# $OpenBSD: Makefile,v 1.102 2021/05/01 16:11:10 visa Exp $
# $NetBSD: Makefile,v 1.13 1996/03/28 21:36:40 mark Exp $
# @(#)Makefile 8.1 (Berkeley) 6/5/93
SUBDIR= man8.alpha man8.amd64 man8.arm64 man8.armv7 \
man8.hppa man8.i386 man8.landisk \
man8.loongson man8.luna88k man8.macppc \
- man8.octeon man8.powerpc64 man8.riscv64 man8.sgi man8.sparc64
+ man8.octeon man8.powerpc64 man8.riscv64 man8.sparc64
.include <bsd.prog.mk>
-.\" $OpenBSD: diskless.8,v 1.70 2020/11/29 20:14:06 deraadt Exp $
+.\" $OpenBSD: diskless.8,v 1.71 2021/05/01 16:11:10 visa Exp $
.\" $NetBSD: diskless.8,v 1.7.4.1 1996/05/30 18:58:10 cgd Exp $
.\"
.\"
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
-.Dd $Mdocdate: November 29 2020 $
+.Dd $Mdocdate: May 1 2021 $
.Dt DISKLESS 8
.Os
.Sh NAME
192.197.96.12 myclient
.Ed
.It
-If booting an alpha, amd64, hppa, i386, sgi,
+If booting an alpha, amd64, hppa, i386,
or sparc64 client,
ensure that
.Xr tftpd 8
.Xr rbootd 8
manual page for more information.
.It
-If booting a newer alpha, amd64, hppa, i386, sgi,
+If booting a newer alpha, amd64, hppa, i386,
or sparc64 client,
install a copy of the appropriate diskless boot loader in the
.Pa /tftpboot
can be used to discover which filename the client is trying to read.
.Pp
Architectures using DHCP
-(newer alpha, amd64, hppa, i386, or sgi)
+(newer alpha, amd64, hppa, or i386)
should ensure that
.Xr dhcpd 8
is configured on the server to serve BOOTP protocol requests.
and
.Xr rpc.bootparamd 8 .
.Pp
-For alpha, amd64, hppa, i386, sgi, and sparc64 clients:
+For alpha, amd64, hppa, i386, and sparc64 clients:
.Xr tftpd 8
.Pp
For HP 300 and older HPPA clients:
.Xr rbootd 8
.Pp
-For newer alpha, amd64, hppa, i386, and sgi clients:
+For newer alpha, amd64, hppa, and i386 clients:
.Xr dhcpd 8
.Pp
For older alpha clients:
+++ /dev/null
-.\" $OpenBSD: MAKEDEV.8,v 1.67 2021/01/23 17:36:23 deraadt Exp $
-.\"
-.\" THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
-.\" generated from:
-.\"
-.\" OpenBSD: etc.sgi/MAKEDEV.md,v 1.55 2021/01/23 05:08:33 thfr Exp
-.\" OpenBSD: MAKEDEV.common,v 1.112 2021/01/23 05:08:33 thfr Exp
-.\" OpenBSD: MAKEDEV.man,v 1.9 2017/06/06 08:11:23 tb Exp
-.\" OpenBSD: MAKEDEV.mansub,v 1.2 2004/02/20 19:13:01 miod Exp
-.\"
-.\" Copyright (c) 2004, Miodrag Vallat
-.\" Copyright (c) 2001-2004 Todd T. Fries <todd@OpenBSD.org>
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: January 23 2021 $
-.Dt MAKEDEV 8 sgi
-.Os
-.Sh NAME
-.Nm MAKEDEV
-.Nd create system and device special files
-.Sh SYNOPSIS
-.Nm MAKEDEV
-.Op Ar name ...
-.Sh DESCRIPTION
-The shell script
-.Nm ,
-found in the
-.Pa /dev
-directory, is used to create various special files.
-See
-.Xr intro 4
-for a more complete discussion of special files.
-.Pp
-.Nm
-takes any number of device names as arguments, where the names are
-the common abbreviation for the device or group of devices.
-Files are created in the current working directory.
-.Pp
-Where a device name is followed by a star
-.Sq * ,
-the star must be replaced by a unit number.
-If units are expected for a device but not provided,
-.Nm
-will supply the standard numbers in most cases.
-.Pp
-The sgi supports the following devices:
-.Pp
-.Sy Special device names
-.Bl -tag -width tenletters -compact
-.It Ar all
-Creates special files for all devices on sgi.
-.It Ar ramdisk
-Ramdisk kernel devices.
-.It Ar std
-Creates the
-.Sq standard
-devices (console, klog, kmem, ksyms, mem, null,
-stderr, stdin, stdout, tty, zero)
-which are absolutely necessary for the system to function properly.
-.It Ar local
-Creates configuration-specific devices, by invoking the shell file
-.Pa MAKEDEV.local .
-.El
-.Pp
-.Sy Disks
-.Bl -tag -width tenletters -compact
-.It Ar cd*
-ATAPI and SCSI CD-ROM drives, see
-.Xr cd 4 .
-.It Ar rd*
-.Dq rd
-pseudo-disks, see
-.Xr rd 4 .
-.It Ar sd*
-SCSI disks, including flopticals, see
-.Xr sd 4 .
-.It Ar vnd*
-.Dq file
-pseudo-disk devices, see
-.Xr vnd 4 .
-.It Ar wd*
-.Dq winchester
-disk drives (ST506, IDE, ESDI, RLL, ...), see
-.Xr wd 4 .
-.El
-.Pp
-.Sy Tapes
-.Bl -tag -width tenletters -compact
-.It Ar ch*
-SCSI media changers, see
-.Xr ch 4 .
-.It Ar st*
-SCSI tape drives, see
-.Xr st 4 .
-.El
-.Pp
-.Sy Terminal ports
-.Bl -tag -width tenletters -compact
-.It Ar tty[0-7][0-9a-f]
-NS16x50 serial ports, see
-.Xr com 4 .
-.It Ar tty[a-b]*
-Zilog 8530 serial port, see
-.Xr zs 4 .
-.El
-.Pp
-.Sy Pseudo terminals
-.Bl -tag -width tenletters -compact
-.It Ar ptm
-pty master device, see
-.Xr ptm 4 .
-.It Ar pty*
-Set of 62 master pseudo terminals, see
-.Xr pty 4 .
-.It Ar tty*
-Set of 62 slave pseudo terminals, see
-.Xr tty 4 .
-.El
-.Pp
-.Sy Console ports
-.Bl -tag -width tenletters -compact
-.It Ar ttyC-J*
-wscons display devices, see
-.Xr wsdisplay 4 .
-.It Ar wscons
-Minimal wscons devices, see
-.Xr wscons 4 .
-.It Ar wskbd*
-wscons keyboards, see
-.Xr wskbd 4 .
-.It Ar wsmux
-wscons keyboard/mouse mux devices, see
-.Xr wsmux 4 .
-.El
-.Pp
-.Sy Pointing devices
-.Bl -tag -width tenletters -compact
-.It Ar wsmouse*
-wscons mice, see
-.Xr wsmouse 4 .
-.El
-.Pp
-.Sy USB devices
-.Bl -tag -width tenletters -compact
-.It Ar ttyU*
-USB serial ports, see
-.Xr ucom 4 .
-.It Ar uall
-All USB devices, see
-.Xr usb 4 .
-.It Ar ugen*
-Generic USB devices, see
-.Xr ugen 4 .
-.It Ar uhid*
-Generic HID devices, see
-.Xr uhid 4 .
-.It Ar fido
-fido/* nodes, see
-.Xr fido 4 .
-.It Ar ujoy
-ujoy/* nodes, see
-.Xr ujoy 4 .
-.It Ar ulpt*
-Printer devices, see
-.Xr ulpt 4 .
-.It Ar usb*
-Bus control devices used by usbd for attach/detach, see
-.Xr usb 4 .
-.El
-.Pp
-.Sy Special purpose devices
-.Bl -tag -width tenletters -compact
-.It Ar audio*
-Audio devices, see
-.Xr audio 4 .
-.It Ar bio
-ioctl tunnel pseudo-device, see
-.Xr bio 4 .
-.It Ar bpf
-Berkeley Packet Filter, see
-.Xr bpf 4 .
-.It Ar dt
-Dynamic Tracer, see
-.Xr dt 4 .
-.It Ar diskmap
-Disk mapper, see
-.Xr diskmap 4 .
-.It Ar fd
-fd/* nodes, see
-.Xr fd 4 .
-.It Ar fuse
-Userland Filesystem, see
-.Xr fuse 4 .
-.It Ar hotplug
-devices hot plugging, see
-.Xr hotplug 4 .
-.It Ar pci*
-PCI bus devices, see
-.Xr pci 4 .
-.It Ar pf*
-Packet Filter, see
-.Xr pf 4 .
-.It Ar pppx*
-PPP Multiplexer, see
-.Xr pppx 4 .
-.It Ar pppac*
-PPP Access Concentrator, see
-.Xr pppac 4 .
-.It Ar *random
-In-kernel random data source, see
-.Xr random 4 .
-.It Ar tun*
-Network tunnel driver, see
-.Xr tun 4 .
-.It Ar tap*
-Ethernet tunnel driver, see
-.Xr tap 4 .
-.It Ar uk*
-Unknown SCSI devices, see
-.Xr uk 4 .
-.It Ar video*
-Video V4L2 devices, see
-.Xr video 4 .
-.It Ar vscsi*
-Virtual SCSI controller, see
-.Xr vscsi 4 .
-.It Ar switch*
-Switch driver, see
-.Xr switch 4 .
-.It Ar kstat
-Kernel Statistics, see
-.Xr kstat 4 .
-.El
-.Sh FILES
-.Bl -tag -width /dev -compact
-.It Pa /dev
-The special file directory.
-.El
-.Sh SEE ALSO
-.Xr intro 4 ,
-.Xr config 8 ,
-.Xr mknod 8
+++ /dev/null
-# $OpenBSD: Makefile,v 1.1 2004/08/06 23:05:19 mickey Exp $
-
-MAN= MAKEDEV.8 # boot_sgi.8
-MANSUBDIR=sgi
-
-.include <bsd.prog.mk>
-.\" $OpenBSD: pci_conf_read.9,v 1.12 2015/02/15 22:26:45 bentley Exp $
+.\" $OpenBSD: pci_conf_read.9,v 1.13 2021/05/01 16:11:10 visa Exp $
.\"
.\" Copyright (c) 2005 Michael Shalayeff
.\" All rights reserved.
.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
.\"
-.Dd $Mdocdate: February 15 2015 $
+.Dd $Mdocdate: May 1 2021 $
.Dt PCI_CONF_READ 9
.Os
.Sh NAME
.In alpha/pci/pci_machdep.h
.In i386/pci/pci_machdep.h
.In powerpc/pci/pci_machdep.h
-.In sgi/pci/pci_machdep.h
.In machine/pci_machdep.h
.Ft pcitag_t
.Fn pci_make_tag "pci_chipset_tag_t pc" "int bus" "int dev" "int func"
-.\" $OpenBSD: pci_intr_map.9,v 1.17 2020/06/17 08:20:42 dlg Exp $
+.\" $OpenBSD: pci_intr_map.9,v 1.18 2021/05/01 16:11:10 visa Exp $
.\"
.\" Copyright (c) 2005 Michael Shalayeff
.\" All rights reserved.
.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
.\"
-.Dd $Mdocdate: June 17 2020 $
+.Dd $Mdocdate: May 1 2021 $
.Dt PCI_INTR_MAP 9
.Os
.Sh NAME
.In alpha/pci/pci_machdep.h
.In i386/pci/pci_machdep.h
.In powerpc/pci/pci_machdep.h
-.In sgi/pci/pci_machdep.h
.In machine/pci_machdep.h
.Ft int
.Fn pci_intr_map "struct pci_attach_args *paa" "pci_intr_handle_t *ih"
-# $OpenBSD: bsd.own.mk,v 1.208 2021/04/29 19:21:31 drahn Exp $
+# $OpenBSD: bsd.own.mk,v 1.209 2021/05/01 16:11:10 visa Exp $
# $NetBSD: bsd.own.mk,v 1.24 1996/04/13 02:08:09 thorpej Exp $
# Host-specific overrides
GCC3_ARCH=m88k
LLD_ARCH=aarch64 amd64 arm i386 powerpc64 riscv64
-.if ${MACHINE} == "sgi"
-GCC4_ARCH+=mips64
-.endif
-
# m88k: ?
PIE_ARCH=aarch64 alpha amd64 arm hppa i386 mips64 mips64el powerpc powerpc64 riscv64 sh sparc64
STATICPIE_ARCH=aarch64 alpha amd64 arm hppa i386 mips64 mips64el powerpc powerpc64 riscv64 sh sparc64
-# $OpenBSD: Makefile,v 1.52 2021/04/29 11:32:20 jsg Exp $
+# $OpenBSD: Makefile,v 1.53 2021/05/01 16:11:10 visa Exp $
# $NetBSD: Makefile,v 1.5 1995/09/15 21:05:21 pk Exp $
SUBDIR= dev/microcode \
arch/hppa arch/i386 \
arch/landisk arch/loongson arch/luna88k \
arch/macppc arch/octeon arch/powerpc64 \
- arch/riscv64 arch/sgi arch/sparc64
+ arch/riscv64 arch/sparc64
tags:
cd ${.CURDIR}/kern; make tags
-# $OpenBSD: files.mips64,v 1.29 2018/01/25 15:06:29 mpi Exp $
+# $OpenBSD: files.mips64,v 1.30 2021/05/01 16:11:10 visa Exp $
-file arch/mips64/mips64/arcbios.c arcbios
file arch/mips64/mips64/clock.c clock
file arch/mips64/mips64/cpu.c
file arch/mips64/mips64/interrupt.c
file arch/mips64/mips64/cache_loongson3.c cpu_loongson3
file arch/mips64/mips64/cache_mips64r2.c cpu_mips64r2
file arch/mips64/mips64/cache_octeon.c cpu_octeon
-file arch/mips64/mips64/cache_r4k.c cpu_r4000
-file arch/mips64/mips64/cache_r5k.c cpu_r5000 | cpu_rm7000
-file arch/mips64/mips64/cache_r10k.c cpu_r10000
-file arch/mips64/mips64/cache_tfp.c cpu_r8000
-file arch/mips64/mips64/cache_tfp_subr.S cpu_r8000
file arch/mips64/mips64/context.S
file arch/mips64/mips64/cp0access.S
-file arch/mips64/mips64/exception.S !cpu_r8000
-file arch/mips64/mips64/exception_tfp.S cpu_r8000
+file arch/mips64/mips64/exception.S
file arch/mips64/mips64/fp_emulate.c
file arch/mips64/mips64/lcore_access.S
file arch/mips64/mips64/lcore_float.S
file arch/mips64/mips64/mips64r2.S cpu_mips64r2
-file arch/mips64/mips64/r4000_errata.c cpu_r4000
-file arch/mips64/mips64/tlbhandler.S !cpu_r8000
-file arch/mips64/mips64/tlb_tfp.S cpu_r8000
+file arch/mips64/mips64/tlbhandler.S
file arch/mips64/mips64/db_disasm.c ddb
file arch/mips64/mips64/db_machdep.c ddb
+++ /dev/null
-/* $OpenBSD: arcbios.h,v 1.25 2015/02/06 22:11:49 miod Exp $ */
-/*-
- * Copyright (c) 1996 M. Warner Losh. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/types.h>
-
-typedef struct arc_sid
-{
- char vendor[8];
- char prodid[8];
-} arc_sid_t;
-
-typedef enum arc_config_class
-{
- arc_SystemClass,
- arc_ProcessorClass,
- arc_CacheClass,
-#ifdef __sgi__
- arc_MemoryClass,
-#endif
- arc_AdapterClass,
- arc_ControllerClass,
- arc_PeripheralClass,
-#ifdef __arc__
- arc_MemoryClass
-#endif
-} arc_config_class_t;
-
-typedef enum arc_config_type
-{
- arc_System,
-
- arc_CentralProcessor,
- arc_FloatingPointProcessor,
-
- arc_PrimaryIcache,
- arc_PrimaryDcache,
- arc_SecondaryIcache,
- arc_SecondaryDcache,
- arc_SecondaryCache,
-
-#ifdef __sgi__
- arc_SystemMemory,
-#endif
-
- arc_EisaAdapter, /* Eisa adapter */
- arc_TcAdapter, /* Turbochannel adapter */
- arc_ScsiAdapter, /* SCSI adapter */
- arc_DtiAdapter, /* AccessBus adapter */
- arc_MultiFunctionAdapter,
-
- arc_DiskController,
- arc_TapeController,
- arc_CdromController,
- arc_WormController,
- arc_SerialController,
- arc_NetworkController,
- arc_DisplayController,
- arc_ParallelController,
- arc_PointerController,
- arc_KeyboardController,
- arc_AudioController,
- arc_OtherController, /* denotes a controller not otherwise defined */
-
- arc_DiskPeripheral,
- arc_FloppyDiskPeripheral,
- arc_TapePeripheral,
- arc_ModemPeripheral,
- arc_MonitorPeripheral,
- arc_PrinterPeripheral,
- arc_PointerPeripheral,
- arc_KeyboardPeripheral,
- arc_TerminalPeripheral,
-#ifdef __arc__
- arc_OtherPeripheral, /* denotes a peripheral not otherwise defined */
-#endif
- arc_LinePeripheral,
- arc_NetworkPeripheral,
-#ifdef __arc__
- arc_SystemMemory,
-#endif
-#ifdef __sgi__
- arc_OtherPeripheral, /* denotes a peripheral not otherwise defined */
-#endif
-} arc_config_type_t;
-
-typedef u_int32_t arc_dev_flags_t;
-
-#define ARCBIOS_DEVFLAGS_FAILED 0x01
-#define ARCBIOS_DEVFLAGS_READONLY 0x02
-#define ARCBIOS_DEVFLAGS_REMOVABLE 0x04
-#define ARCBIOS_DEVFLAGS_CONSOLE_INPUT 0x08
-#define ARCBIOS_DEVFLAGS_CONSOLE_OUTPUT 0x10
-#define ARCBIOS_DEVFLAGS_INPUT 0x20
-#define ARCBIOS_DEVFLAGS_OUTPUT 0x40
-
-typedef struct arc_config
-{
- arc_config_class_t class;
- arc_config_type_t type;
- arc_dev_flags_t flags;
- u_int16_t version;
- u_int16_t revision;
- u_int32_t key;
- u_int32_t affinity_mask;
- u_int32_t config_data_len;
- u_int32_t id_len;
- int32_t id;
-} arc_config_t;
-
-typedef struct arc_config64
-{
- arc_config_class_t class;
- arc_config_type_t type;
- arc_dev_flags_t flags;
- u_int16_t version;
- u_int16_t revision;
- u_int64_t key;
- u_int64_t affinity_mask;
- u_int64_t config_data_len;
- u_int64_t id_len;
- int64_t id;
-} arc_config64_t;
-
-typedef enum arc_status
-{
- arc_ESUCCESS, /* Success */
- arc_E2BIG, /* Arg list too long */
- arc_EACCES, /* No such file or directory */
- arc_EAGAIN, /* Try again */
- arc_EBADF, /* Bad file number */
- arc_EBUSY, /* Device or resource busy */
- arc_EFAULT, /* Bad address */
- arc_EINVAL, /* Invalid argument */
- arc_EIO, /* I/O error */
- arc_EISDIR, /* Is a directory */
- arc_EMFILE, /* Too many open files */
- arc_EMLINK, /* Too many links */
- arc_ENAMETOOLONG, /* File name too long */
- arc_ENODEV, /* No such device */
- arc_ENOENT, /* No such file or directory */
- arc_ENOEXEC, /* Exec format error */
- arc_ENOMEM, /* Out of memory */
- arc_ENOSPC, /* No space left on device */
- arc_ENOTDIR, /* Not a directory */
- arc_ENOTTY, /* Not a typewriter */
- arc_ENXIO, /* No such device or address */
- arc_EROFS, /* Read-only file system */
-} arc_status_t;
-
-/*
- * Oops! Arc systems and SGI's have different order of types.
- */
-#ifdef __arc__
-typedef enum {
- ExceptionBlock, SystemParameterBlock, FreeMemory,
- BadMemory, LoadedProgram, FirmwareTemporary,
- FirmwarePermanent, FreeContigous
-} MEMORYTYPE;
-#endif
-
-#ifdef __sgi__
-typedef enum {
- ExceptionBlock, SystemParameterBlock, FreeContigous,
- FreeMemory, BadMemory, LoadedProgram,
- FirmwareTemporary, FirmwarePermanent,
-} MEMORYTYPE;
-#endif
-
-typedef struct arc_mem {
- MEMORYTYPE Type; /* Memory chunk type */
- u_int32_t BasePage; /* Page no, first page */
- u_int32_t PageCount; /* Number of pages */
-} arc_mem_t;
-
-typedef struct arc_mem64 {
- MEMORYTYPE Type; /* Memory chunk type */
- u_int64_t BasePage; /* Page no, first page */
- u_int64_t PageCount; /* Number of pages */
-} arc_mem64_t;
-
-typedef struct arc_time {
- u_int16_t Year;
- u_int16_t Month;
- u_int16_t Day;
- u_int16_t Hour;
- u_int16_t Minutes;
- u_int16_t Seconds;
- u_int16_t Milliseconds;
-} arc_time_t;
-
-typedef struct arc_dsp_stat {
- u_int16_t CursorXPosition;
- u_int16_t CursorYPosition;
- u_int16_t CursorMaxXPosition;
- u_int16_t CursorMaxYPosition;
- u_char ForegroundColor;
- u_char BackgroundColor;
- u_char HighIntensity;
- u_char Underscored;
- u_char ReverseVideo;
-} arc_dsp_stat_t;
-
-typedef caddr_t arc_dirent_t; /* XXX */
-typedef u_int32_t arc_open_mode_t; /* XXX */
-typedef u_int32_t arc_seek_mode_t; /* XXX */
-typedef u_int32_t arc_mount_t; /* XXX */
-
-typedef struct arc_quad {
-#ifdef __MIPSEB__
- long hi;
- u_long lo;
-#else
- u_long lo;
- long hi;
-#endif
-} arc_quad_t;
-
-typedef struct arc_calls
-{
- arc_status_t (*load)( /* Load 1 */
- char *, /* Image to load */
- u_long, /* top address */
- u_long *, /* Entry address */
- u_long *); /* Low address */
-
- arc_status_t (*invoke)( /* Invoke 2 */
- u_long, /* Entry Address */
- u_long, /* Stack Address */
- u_long, /* Argc */
- char **, /* argv */
- char **); /* envp */
-
- arc_status_t (*execute)( /* Execute 3 */
- char *, /* Image path */
- u_long, /* Argc */
- char **, /* argv */
- char **); /* envp */
-
- __dead void (*halt)(void); /* Halt 4 */
-
- __dead void (*power_down)(void); /* PowerDown 5 */
-
- __dead void (*restart)(void); /* Restart 6 */
-
- __dead void (*reboot)(void); /* Reboot 7 */
-
- __dead void (*enter_interactive_mode)(void); /* EnterInteractiveMode 8 */
-
- __dead void (*return_from_main)(void); /* ReturnFromMain 9 */
-
- arc_config_t *(*get_peer)( /* GetPeer 10 */
- arc_config_t *); /* Component */
-
- arc_config_t *(*get_child)( /* GetChild 11 */
- arc_config_t *); /* Component */
-
- arc_config_t *(*get_parent)( /* GetParent 12 */
- arc_config_t *); /* Component */
-
- arc_status_t (*get_config_data)( /* GetConfigurationData 13 */
- caddr_t, /* Configuration Data */
- arc_config_t *); /* Component */
-
- arc_config_t *(*add_child)( /* AddChild 14 */
- arc_config_t *, /* Component */
- arc_config_t *); /* New Component */
-
- arc_status_t (*delete_component)( /* DeleteComponent 15 */
- arc_config_t *); /* Component */
-
- arc_config_t *(*get_component)( /* GetComponent 16 */
- char *); /* Path */
-
- arc_status_t (*save_config)(void); /* SaveConfiguration 17 */
-
- arc_sid_t *(*get_system_id)(void); /* GetSystemId 18 */
-
- arc_mem_t *(*get_memory_descriptor)( /* GetMemoryDescriptor 19 */
- arc_mem_t *); /* MemoryDescriptor */
-
-#ifdef __arc__
- void (*signal)( /* Signal 20 */
- u_int32_t, /* Signal number */
-/**/ caddr_t); /* Handler */
-#else
- void *unused;
-#endif
-
- arc_time_t *(*get_time)(void); /* GetTime 21 */
-
- u_long (*get_relative_time)(void); /* GetRelativeTime 22 */
-
- arc_status_t (*get_dir_entry)( /* GetDirectoryEntry 23 */
- u_long, /* FileId */
- arc_dirent_t *, /* Directory entry */
- u_long, /* Length */
- u_long *); /* Count */
-
- arc_status_t (*open)( /* Open 24 */
- char *, /* Path */
- arc_open_mode_t, /* Open mode */
- u_long *); /* FileId */
-
- arc_status_t (*close)( /* Close 25 */
- u_long); /* FileId */
-
- arc_status_t (*read)( /* Read 26 */
- u_long, /* FileId */
- caddr_t, /* Buffer */
- u_long, /* Length */
- u_long *); /* Count */
-
- arc_status_t (*get_read_status)( /* GetReadStatus 27 */
- u_long); /* FileId */
-
- arc_status_t (*write)( /* Write 28 */
- u_long, /* FileId */
- caddr_t, /* Buffer */
- u_long, /* Length */
- u_long *); /* Count */
-
- arc_status_t (*seek)( /* Seek 29 */
- u_long, /* FileId */
- arc_quad_t *, /* Offset */
- arc_seek_mode_t); /* Mode */
-
- arc_status_t (*mount)( /* Mount 30 */
- char *, /* Path */
- arc_mount_t); /* Operation */
-
- char *(*getenv)( /* GetEnvironmentVariable 31 */
- char *); /* Variable */
-
- arc_status_t (*putenv)( /* SetEnvironmentVariable 32 */
- char *, /* Variable */
- char *); /* Value */
-
- arc_status_t (*get_file_info)(void); /* GetFileInformation 33 */
-
- arc_status_t (*set_file_info)(void); /* SetFileInformation 34 */
-
- void (*flush_all_caches)(void); /* FlushAllCaches 35 */
-
-#ifdef __arc__
- arc_status_t (*test_unicode)( /* TestUnicodeCharacter 36 */
- u_int32_t, /* FileId */
- u_int16_t); /* UnicodeCharacter */
-
- arc_dsp_stat_t *(*get_display_status)( /* GetDisplayStatus 37 */
- u_int32_t); /* FileId */
-#endif
-} arc_calls_t;
-
-#define ARC_PARAM_BLK_MAGIC 0x53435241
-#define ARC_PARAM_BLK_MAGIC_BUG 0x41524353 /* This is wrong... but req */
-
-typedef struct arc_param_blk_32
-{
- u_int32_t magic; /* Magic Number */
- u_int32_t length; /* Length of parameter block */
- u_int16_t version; /* ?? */
- u_int16_t revision; /* ?? */
- int32_t restart_block; /* ?? */
- int32_t debug_block; /* Debugging info -- unused */
- int32_t general_exp_vect; /* ?? */
- int32_t tlb_miss_exp_vect; /* ?? */
- u_int32_t firmware_length; /* Size of Firmware jumptable in bytes */
- int32_t firmware_vect; /* Firmware jumptable */
- int32_t vendor_length; /* Size of Vendor specific jumptable */
- u_int32_t vendor_vect; /* Vendor specific jumptable */
- u_int32_t adapter_count; /* ?? */
- u_int32_t adapter0_type; /* ?? */
- u_int32_t adapter0_length; /* ?? */
- int32_t adapter0_vect; /* ?? */
-} arc_param_blk_32_t;
-
-typedef struct arc_param_blk_64
-{
- u_int64_t magic; /* Magic Number */
- u_int64_t length; /* Length of parameter block */
- u_int16_t version; /* ?? */
- u_int16_t revision; /* ?? */
- int64_t restart_block; /* ?? */
- int64_t debug_block; /* Debugging info -- unused */
- int64_t general_exp_vect; /* ?? */
- int64_t tlb_miss_exp_vect; /* ?? */
- u_int64_t firmware_length; /* Size of Firmware jumptable in bytes */
- int64_t firmware_vect; /* Firmware jumptable */
- u_int64_t vendor_length; /* Size of Vendor specific jumptable */
- int64_t vendor_vect; /* Vendor specific jumptable */
- u_int64_t adapter_count; /* ?? */
- u_int64_t adapter0_type; /* ?? */
- u_int64_t adapter0_length; /* ?? */
- int64_t adapter0_vect; /* ?? */
-} arc_param_blk_64_t;
-
-#define ARCBIOS_BASE 0x0000001000 /* physical */
-extern void *bios_base;
-#define ArcBiosBase32 ((arc_param_blk_32_t *)bios_base)
-#define ArcBiosBase64 ((arc_param_blk_64_t *)bios_base)
-
-#define ARCBIOS_PAGE_SIZE 4096
-
-extern int bios_is_32bit;
-extern int bios_consrate;
-extern char bios_enaddr[20];
-extern char bios_console[30];
-extern char bios_graphics[6];
-extern char bios_keyboard[6];
-
-extern void (*bios_halt)(void);
-extern void (*bios_powerdown)(void);
-extern void (*bios_restart)(void);
-extern void (*bios_reboot)(void);
-extern void (*bios_eim)(void);
-
-int bios_getchar(void);
-void bios_putchar(char);
-void bios_putstring(char *);
-void bios_printf(const char *, ...)
- __attribute__((__format__(__kprintf__,1,2)));
-void bios_ident(void);
-void bios_display_info(int *, int *, int *, int *);
-
-/*
- * Direct ARC-BIOS calls.
- */
-long Bios_Load(char *, u_long, u_long, u_long *);
-long Bios_Invoke(u_long, u_long, u_long, char **, char **);
-long Bios_Execute(char *, u_long, char **, char **);
-void Bios_Halt(void);
-void Bios_PowerDown(void);
-void Bios_Restart(void);
-void Bios_Reboot(void);
-void Bios_EnterInteractiveMode(void);
-long Bios_GetPeer(void *);
-arc_config_t *Bios_GetChild(void *);
-long Bios_GetParent(void *);
-long Bios_GetConfigurationData(void *, void *);
-long Bios_AddChild(void *, void *);
-long Bios_DeleteComponent(void *);
-long Bios_GetComponent(char *);
-long Bios_SaveConfiguration(void);
-arc_sid_t *Bios_GetSystemId(void);
-arc_mem_t *Bios_GetMemoryDescriptor(void *);
-arc_time_t *Bios_GetTime(void);
-long Bios_GetRelativeTime(void);
-long Bios_GetDirectoryEntry(u_long, void *, u_long, u_long *);
-long Bios_Open(char *, int, long *);
-long Bios_Close(long);
-long Bios_Read(long, char *, long, long *);
-long Bios_GetReadStatus(u_long);
-long Bios_Write(long, char *, long, long *);
-long Bios_Seek(long, arc_quad_t *, int);
-long Bios_Mount(char *, void *);
-char *Bios_GetEnvironmentVariable(const char *);
-long Bios_SetEnvironmentVariable(char *, char *);
-long Bios_GetFileInformation(u_long, u_long, u_long);
-long Bios_SetFileInformation(u_long, u_long, u_long);
-void Bios_FlushAllCaches(void);
-long Bios_TestUnicodeCharacter(u_long, u_int16_t);
-arc_dsp_stat_t *Bios_GetDisplayStatus(u_long);
-/* $OpenBSD: asm.h,v 1.26 2021/03/11 11:16:59 jsg Exp $ */
+/* $OpenBSD: asm.h,v 1.27 2021/05/01 16:11:10 visa Exp $ */
/*
* Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
#define PTR_VAL .dword
#endif
-/*
- * The following macros are here to benefit the R8000 processor:
- * - all coprocessor 0 control registers are 64-bit
- * - the regular nop (sll zero, zero, 0) has the drawback of using the
- * shifter, potentially breaking instruction dispatch if occurring after
- * another instruction using the shifter.
- */
-#ifdef CPU_R8000
-#define SSNOP sll zero, zero, 1 /* ``ssnop'' */
-#define NOP PTR_ADDU zero, zero, zero /* real nop for R8000 */
-#define DMFC0 SSNOP; dmfc0
-#define DMTC0 SSNOP; dmtc0
-#define MFC0 SSNOP; dmfc0
-#define MTC0 SSNOP; dmtc0
-#define ERET eret; mul k0, k0; mflo k0
-#else
#define NOP nop
#define DMFC0 dmfc0
#define DMTC0 dmtc0
#define MFC0 mfc0
#define MTC0 mtc0
#define ERET sync; eret
-#endif
/*
* Define -pg profile entry code.
#define TLB_HAZARD /* nothing */
#endif
-#ifdef CPU_RM7000
-/*
- * Due to a flaw in RM7000 1.x processors a pipeline 'drain' is
- * required after some mtc0 instructions.
- * Ten nops in sequence does the trick.
- */
-#define MTC0_HAZARD NOP;NOP;NOP;NOP;NOP;NOP;NOP;NOP;NOP;NOP
-#define MTC0_SR_IE_HAZARD MTC0_HAZARD
-/*
- * The RM7000 needs twice as much nops around tlb* instructions.
- */
-#define TLB_HAZARD NOP; NOP; NOP; NOP
-#endif
-
-#ifdef CPU_R8000
-/*
- * The R8000 needs a lot of care inserting proper superscalar dispatch breaks
- * to prevent unwanted side-effects or avoid collisions on the internal MiscBus
- * and the E and W stages of the pipelines.
- *
- * The following settings are a bit pessimistic, but better run safely than
- * not at all.
- */
-#define PRE_MFC0_ADDR_HAZARD .align 5; SSNOP
-#define MFC0_HAZARD SSNOP
-#define MTC0_HAZARD SSNOP; SSNOP; SSNOP; SSNOP
-#define MTC0_SR_IE_HAZARD MTC0_HAZARD
-#define MTC0_SR_CU_HAZARD MTC0_HAZARD
-#endif
-
/* Hazard between {d,}mfc0 of COP_0_VADDR */
#ifndef PRE_MFC0_ADDR_HAZARD
#define PRE_MFC0_ADDR_HAZARD /* nothing */
-/* $OpenBSD: cpu.h,v 1.130 2020/07/11 15:18:08 visa Exp $ */
+/* $OpenBSD: cpu.h,v 1.131 2021/05/01 16:11:10 visa Exp $ */
/*-
* Copyright (c) 1992, 1993
#define CCA_CACHED CCA_NONCOHERENT
#endif
-/*
- * Uncached spaces.
- * R1x000 processors use bits 58:57 of uncached virtual addresses (CCA_NC)
- * to select different spaces. Unfortunately, other processors need these
- * bits to be zero, so uncached address have to be decided at runtime.
- */
-#define SP_HUB 0UL /* Hub space */
-#define SP_IO 1UL /* I/O space */
-#define SP_SPECIAL 2UL /* Memory Special space */
-#define SP_NC 3UL /* Memory Uncached space */
-
#define XKSSSEG_BASE 0x4000000000000000UL
#define XKPHYS_BASE 0x8000000000000000UL
#define XKSSEG_BASE 0xc000000000000000UL
#define XKPHYS_TO_PHYS(x) ((paddr_t)(x) & 0x0000000fffffffffUL)
#define PHYS_TO_XKPHYS(x,c) ((paddr_t)(x) | XKPHYS_BASE | ((c) << 59))
-#define PHYS_TO_XKPHYS_UNCACHED(x,s) \
- (PHYS_TO_XKPHYS(x, CCA_NC) | ((s) << 57))
#define IS_XKPHYS(va) (((va) >> 62) == 2)
#define XKPHYS_TO_CCA(x) (((x) >> 59) & 0x07)
-#define XKPHYS_TO_SP(x) (((x) >> 57) & 0x03)
#endif /* _LOCORE */
#define aston(p) ((p)->p_md.md_astpending = 1)
-#ifdef CPU_R8000
-#define mips_sync() __asm__ volatile ("lw $0, 0(%0)" :: \
- "r" (PHYS_TO_XKPHYS(0, CCA_NC)) : "memory")
-#else
#define mips_sync() __asm__ volatile ("sync" ::: "memory")
-#endif
#endif /* _KERNEL && !_LOCORE */
#define INSNCLASS_CALL 1
#define INSNCLASS_BRANCH 2
-/*
- * R4000 end-of-page errata workaround routines
- */
-
-extern int r4000_errata;
-u_int eop_page_check(paddr_t);
-void eop_tlb_flush_addr(struct pmap *, vaddr_t, u_long);
-int eop_tlb_miss_handler(struct trapframe *, struct cpu_info *,
- struct proc *);
-void eop_cleanup(struct trapframe *, struct proc *);
-
/*
* Low level access routines to CPU registers
*/
-/* $OpenBSD: mips_cpu.h,v 1.9 2020/07/18 08:37:43 visa Exp $ */
+/* $OpenBSD: mips_cpu.h,v 1.10 2021/05/01 16:11:11 visa Exp $ */
/*-
* Copyright (c) 1992, 1993
#define SR_INT_MASK_4 0x00004000
#define SR_INT_MASK_5 0x00008000
-/* R8000-specific bits */
-#define SR_SERIALIZE_FPU 0x0000010000000000
-#define SR_KPGSZ_SHIFT 36
-#define SR_UPGSZ_SHIFT 32
-#define SR_PGSZ_4K 0
-#define SR_PGSZ_8K 1
-#define SR_PGSZ_16K 2
-#define SR_PGSZ_64K 3
-#define SR_PGSZ_1M 4
-#define SR_PGSZ_4M 5
-#define SR_PGSZ_16M 6
-#define SR_PGSZ_MASK 0x0f
-
-#define SR_INT_MASK_6 0x00010000
-#define SR_INT_MASK_7 0x00020000
-#define SR_INT_MASK_8 0x00040000
-
-#ifdef CPU_R8000
-#define SR_XX 0x00000040
-#define SR_KSU_MASK 0x00000010
-#define SR_KSU_KERNEL 0x00000000
-#define SR_INT_MASK 0x0007ff00
-#else
#define SR_XX 0x80000000
#define SR_KSU_MASK 0x00000018
#define SR_KSU_SUPER 0x00000008
#define SR_KSU_KERNEL 0x00000000
#define SR_INT_MASK 0x0000ff00
-#endif
/* SR_KSU_USER is in <mips64/cpu.h> for CLKF_USERMODE() */
#ifndef SR_KSU_USER
#define SR_KSU_USER 0x00000010
#endif
-/*
- * Interrupt control register in RM7000. Expansion of interrupts.
- */
-
-#define IC_INT_MASK 0x00003f00 /* Two msb reserved */
-#define IC_INT_MASK_6 0x00000100
-#define IC_INT_MASK_7 0x00000200
-#define IC_INT_MASK_8 0x00000400
-#define IC_INT_MASK_9 0x00000800
-#define IC_INT_TIMR 0x00001000 /* 12 Timer */
-#define IC_INT_PERF 0x00002000 /* 13 Performance counter */
-#define IC_INT_TE 0x00000080 /* Timer on INT11 */
-
#define SOFT_INT_MASK (SOFT_INT_MASK_0 | SOFT_INT_MASK_1)
/*
* Cause register.
*/
-#ifdef CPU_R8000
-#define CR_BR_DELAY 0x8000000000000000
-#define CR_EXC_CODE 0x000000f8
-#define CR_EXC_CODE_SHIFT 3
-#define CR_COP_ERR 0x10000000
-#else
#define CR_BR_DELAY 0x80000000
#define CR_EXC_CODE 0x0000007c
#define CR_EXC_CODE_SHIFT 2
#define CR_COP_ERR 0x30000000
-#endif
#define CR_COP1_ERR 0x10000000
#define CR_COP2_ERR 0x20000000
#define CR_COP3_ERR 0x20000000
#define CR_INT_3 0x00002000
#define CR_INT_4 0x00004000
#define CR_INT_5 0x00008000
-/* Following on RM7000 and R8000 */
-#define CR_INT_6 0x00010000
-#define CR_INT_7 0x00020000
-#define CR_INT_8 0x00040000
-/* Following on RM7000 */
-#define CR_INT_9 0x00080000
-#define CR_INT_HARD 0x000ffc00
-#define CR_INT_TIMR 0x00100000 /* 12 Timer */
-#define CR_INT_PERF 0x00200000 /* 13 Performance counter */
-/* R8000 specific */
-#define CR_FPE 0x01000000
-#define CR_VCE 0x02000000
-#define CR_BERR 0x04000000
-#define CR_NMI 0x08000000
-#ifdef CPU_R8000
-#define CR_INT_MASK 0x0007ff00
-#else
#define CR_INT_MASK 0x003fff00
-#endif
/*
* Config register.
* Location of exception vectors.
*/
-#ifdef CPU_R8000
-#define RESET_EXC_VEC PHYS_TO_XKPHYS(0x1fc00000, CCA_NC)
-/* all the others are relative to COP_0_TRAPBASE */
-/* #define UTLB_MISS_EXC_VEC 0x00000000 */
-/* #define KV1TLB_MISS_EXC_VEC 0x00000400 */
-/* #define KV0TLB_MISS_EXC_VEC 0x00000800 */
-/* #define GEN_EXC_VEC 0x00000c00 */
-#else
#define RESET_EXC_VEC (CKSEG1_BASE + 0x1fc00000)
#define TLB_MISS_EXC_VEC (CKSEG1_BASE + 0x00000000)
#define XTLB_MISS_EXC_VEC (CKSEG1_BASE + 0x00000080)
#define CACHE_ERR_EXC_VEC (CKSEG1_BASE + 0x00000100)
#define GEN_EXC_VEC (CKSEG1_BASE + 0x00000180)
-#endif
/*
* Coprocessor 0 registers
#define COP_0_TAG_HI $29
#define COP_0_ERROR_PC $30
-/* R8000 specific */
-#define COP_0_TLB_SET $0
-#define COP_0_TLB_LO $2
-#define COP_0_UBASE $4
-#define COP_0_SHIFTAMT $5
-#define COP_0_TRAPBASE $6
-#define COP_0_BAD_PADDR $7
-#define COP_0_VADDR $8
-#define COP_0_WORK0 $18
-#define COP_0_WORK1 $19
-#define COP_0_PBASE $20
-#define COP_0_GBASE $21
-#define COP_0_TFP_TLB_WIRED $24
-#define COP_0_DCACHE $28
-#define COP_0_ICACHE $29
-
-/* RM7000 specific */
-#define COP_0_WATCH_1 $18
-#define COP_0_WATCH_2 $19
-#define COP_0_WATCH_M $24
-#define COP_0_PC_COUNT $25
-#define COP_0_PC_CTRL $22
-
-#define COP_0_ICR $20 /* Use cfc0/ctc0 to access */
-
-/* R10000 specific */
-#define COP_0_TLB_FR_MASK $21
-
/* Loongson-2 specific */
#define COP_0_DIAG $22
/*
* COP_0_COUNT speed divider.
*/
-#if defined(CPU_OCTEON) || defined(CPU_R8000)
+#if defined(CPU_OCTEON)
#define CP0_CYCLE_DIVIDER 1
#else
#define CP0_CYCLE_DIVIDER 2
-/* $OpenBSD: pmap.h,v 1.48 2019/08/21 16:14:34 visa Exp $ */
+/* $OpenBSD: pmap.h,v 1.49 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 1987 Carnegie-Mellon University
#define PGF_CACHED PG_PMAP1 /* Page is currently cached */
#define PGF_ATTR_MOD PG_PMAP2
#define PGF_ATTR_REF PG_PMAP3
-#define PGF_EOP_CHECKED PG_PMAP4
-#define PGF_EOP_VULN PG_PMAP5
#define PGF_PRESERVE (PGF_ATTR_MOD | PGF_ATTR_REF)
#define PMAP_NOCACHE PMAP_MD0
#define pmap_unuse_final(p) do { /* nothing yet */ } while (0)
#define pmap_remove_holes(vm) do { /* nothing */ } while (0)
-/*
- * Most R5000 processors (and related families) have a silicon bug preventing
- * the ll/sc (and lld/scd) instructions from honouring the caching mode
- * when accessing XKPHYS addresses.
- *
- * Since pool memory is allocated with pmap_map_direct() if __HAVE_PMAP_DIRECT,
- * and many structures containing fields which will be used with
- * <machine/atomic.h> routines are allocated from pools, __HAVE_PMAP_DIRECT can
- * not be defined on systems which may use flawed processors.
- */
-#if !defined(CPU_R5000) && !defined(CPU_RM7000)
#define __HAVE_PMAP_DIRECT
vaddr_t pmap_map_direct(vm_page_t);
vm_page_t pmap_unmap_direct(vaddr_t);
-#endif
/*
* MD flags to pmap_enter:
-/* $OpenBSD: pte.h,v 1.22 2019/04/26 16:27:36 visa Exp $ */
+/* $OpenBSD: pte.h,v 1.23 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 1988 University of Utah.
/* entryhi values */
-#ifndef CPU_R8000
#define PG_HVPN (-2 * PAGE_SIZE) /* Hardware page number mask */
#define PG_ODDPG PAGE_SIZE
-#endif /* !R8000 */
/* Address space ID */
-#ifdef CPU_R8000
-#define PG_ASID_MASK 0x0000000000000ff0
-#define PG_ASID_SHIFT 4
-#define ICACHE_ASID_SHIFT 40
-#define MIN_USER_ASID 0
-#else
#define PG_ASID_MASK 0x00000000000000ff
#define PG_ASID_SHIFT 0
#define MIN_USER_ASID 1
-#endif
#define PG_ASID_COUNT 256 /* Number of available ASID */
/* entrylo values */
-#ifdef CPU_R8000
-#define PG_FRAME 0xfffff000
-#define PG_SHIFT 0
-#else
#ifdef MIPS_PTE64
#define PG_FRAMEBITS 61
#else
#endif
#define PG_FRAME ((1ULL << PG_FRAMEBITS) - (1ULL << PG_SHIFT))
#define PG_SHIFT 6
-#endif
/* software pte bits - not put in entrylo */
-#if defined(CPU_R8000)
-#define PG_WIRED 0x00000010
-#define PG_RO 0x00000020
-#elif defined(CPU_R4000)
-#define PG_WIRED (1ULL << (PG_FRAMEBITS + 2))
-#define PG_RO (1ULL << (PG_FRAMEBITS + 1))
-#define PG_SP (1ULL << (PG_FRAMEBITS + 0)) /* ``special'' bit */
-#else
#define PG_WIRED (1ULL << (PG_FRAMEBITS + 2))
/* 1ULL << (PG_FRAMEBITS + 1) is PG_XI. */
#define PG_RO (1ULL << (PG_FRAMEBITS + 0))
-#endif
#ifdef CPU_MIPS64R2
#define PG_XI (1ULL << (PTE_BITS - 2))
#endif
#define PG_NV 0x00000000
-#ifdef CPU_R8000
-#define PG_G 0x00000000 /* no such concept for R8000 */
-#define PG_V 0x00000080
-#define PG_M 0x00000100
-#define PG_CCA_SHIFT 9
-#else
#define PG_G 0x00000001
#define PG_V 0x00000002
#define PG_M 0x00000004
#define PG_CCA_SHIFT 3
-#endif
-#define PG_NV 0x00000000
#define PG_UNCACHED (CCA_NC << PG_CCA_SHIFT)
#define PG_CACHED_NC (CCA_NONCOHERENT << PG_CCA_SHIFT)
#define pfn_to_pad(pa) ((((paddr_t)pa) & PG_FRAME) << PG_SHIFT)
#define vad_to_pfn(va) (((va) >> PG_SHIFT) & PG_FRAME)
-#ifndef CPU_R8000
#define PG_SIZE_4K 0x00000000
#define PG_SIZE_16K 0x00006000
#define PG_SIZE_64K 0x0001e000
#elif PAGE_SHIFT == 14
#define TLB_PAGE_MASK PG_SIZE_16K
#endif
-#endif /* !R8000 */
#endif /* !_MIPS64_PTE_H_ */
+++ /dev/null
-/* $OpenBSD: arcbios.c,v 1.36 2019/06/30 07:41:50 visa Exp $ */
-/*-
- * Copyright (c) 1996 M. Warner Losh. All rights reserved.
- * Copyright (c) 1996-2004 Opsycon AB. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-
-#include <machine/autoconf.h>
-#include <machine/cpu.h>
-#include <machine/memconf.h>
-#include <machine/vmparam.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-
-#include <uvm/uvm_extern.h>
-
-#ifdef TGT_ORIGIN
-#include <machine/mnode.h>
-#endif
-
-int bios_is_32bit;
-void *bios_base;
-
-/*
- * If we cannot get the onboard Ethernet address to override this bogus
- * value, ether_ifattach() will pick a valid address.
- */
-char bios_enaddr[20] = "ff:ff:ff:ff:ff:ff";
-
-int bios_consrate; /* Serial console speed. */
-char bios_console[30]; /* Primary console. */
-char bios_graphics[6]; /* Graphics state. */
-char bios_keyboard[6]; /* Keyboard layout. */
-
-void (*bios_halt)(void);
-void (*bios_powerdown)(void);
-void (*bios_restart)(void);
-void (*bios_reboot)(void);
-void (*bios_eim)(void);
-
-extern int physmem; /* Total physical memory size */
-extern int rsvdmem; /* Total reserved memory size */
-
-void bios_configure_memory(void);
-int bios_get_system_type(void);
-
-arc_dsp_stat_t displayinfo; /* Save area for display status info. */
-
-static struct systypes {
- char *sys_vend; /* Vendor ID if name is ambiguous */
- char *sys_name; /* May be left NULL if name is sufficient */
- int sys_type;
-} sys_types[] = {
-#if 0
- { NULL, "PICA-61", ACER_PICA_61 },
- { NULL, "NEC-R94", ACER_PICA_61 },
- { NULL, "DESKTECH-TYNE", DESKSTATION_TYNE },
- { NULL, "DESKTECH-ARCStation I", DESKSTATION_RPC44 },
- { NULL, "Microsoft-Jazz", MAGNUM },
- { NULL, "RM200PCI", SNI_RM200 },
-#endif
- { NULL, "SGI-IP17", SGI_IP17 },
- { NULL, "SGI-IP19", SGI_IP19 },
- { NULL, "SGI-IP20", SGI_IP20 },
- { NULL, "SGI-IP21", SGI_IP21 },
- { NULL, "SGI-IP22", SGI_IP22 },
- { NULL, "SGI-IP25", SGI_IP25 },
- { NULL, "SGI-IP26", SGI_IP26 },
- { NULL, "SGI-IP28", SGI_IP28 },
- { NULL, "SGI-IP30", SGI_OCTANE },
- { NULL, "SGI-IP32", SGI_O2 }
-};
-
-#define KNOWNSYSTEMS (sizeof(sys_types) / sizeof(struct systypes))
-
-/*
- * ARC Bios trampoline code.
- */
-
-#define ARC_Call(Name,Offset) \
-__asm__("\n" \
-" .text\n" \
-" .ent " #Name "\n" \
-" .align 3\n" \
-" .set noreorder\n" \
-" .globl " #Name "\n" \
-#Name":\n" \
-" lw $3, bios_is_32bit\n"\
-" ld $2, bios_base\n"\
-" beqz $3, 1f\n" \
-" nop\n" \
-" lw $3, 0x20($2)\n" \
-" lw $2," #Offset "($3)\n"\
-" jr $2\n" \
-" nop\n" \
-"1:\n" \
-" ld $3, 2*0x20($2)\n"\
-" ld $2, 2*" #Offset "($3)\n"\
-" jr $2\n" \
-" nop\n" \
-" .end " #Name "\n" );
-
-/*
- * Invoke an ARC routine through a function pointer (set up in bios_ident()),
- * also forcing the stack to be in CKSEG0 (actually, whatever area proc0 stack
- * was allocated in) if this is a 32-bit ARCBios; used by restart functions,
- * which aren't supposed to return anyway.
- */
-#define ARC_Call_Via_Pointer(Name,fnptr) \
-__asm__("\n" \
-" .text\n" \
-" .ent " #Name "\n" \
-" .align 3\n" \
-" .set noreorder\n" \
-" .globl " #Name "\n" \
-#Name":\n" \
-" lw $3, bios_is_32bit\n"\
-" beqz $3, 1f\n" \
-" nop\n" \
-" ld $3, proc0paddr\n" \
-" addi $29, $3, 16384 - 64\n" /* assumes USPACE >= 16384 */ \
-"1:\n" \
-" ld $2, " #fnptr "\n"\
-" jr $2\n" \
-" nop\n" \
-" .end " #Name "\n");
-
-#if 0
-ARC_Call(Bios_Load, 0x00);
-ARC_Call(Bios_Invoke, 0x04);
-ARC_Call(Bios_Execute, 0x08);
-#endif
-ARC_Call_Via_Pointer(Bios_Halt, bios_halt);
-ARC_Call_Via_Pointer(Bios_PowerDown, bios_powerdown);
-ARC_Call_Via_Pointer(Bios_Restart, bios_restart);
-ARC_Call_Via_Pointer(Bios_Reboot, bios_reboot);
-ARC_Call_Via_Pointer(Bios_EnterInteractiveMode, bios_eim);
-#if 0
-ARC_Call(Bios_Unused1, 0x20);
-#endif
-ARC_Call(Bios_GetPeer, 0x24);
-ARC_Call(Bios_GetChild, 0x28);
-#if 0
-ARC_Call(Bios_GetParent, 0x2c);
-#endif
-#if 0
-ARC_Call(Bios_GetConfigurationData, 0x30);
-#endif
-#if 0
-ARC_Call(Bios_AddChild, 0x34);
-ARC_Call(Bios_DeleteComponent, 0x38);
-#endif
-#if 0
-ARC_Call(Bios_GetComponent, 0x3c);
-ARC_Call(Bios_SaveConfiguration, 0x40);
-#endif
-ARC_Call(Bios_GetSystemId, 0x44);
-ARC_Call(Bios_GetMemoryDescriptor, 0x48);
-#if 0
-ARC_Call(Bios_Unused2, 0x4c);
-#endif
-ARC_Call(Bios_GetTime, 0x50);
-#if 0
-ARC_Call(Bios_GetRelativeTime, 0x54);
-ARC_Call(Bios_GetDirectoryEntry, 0x58);
-ARC_Call(Bios_Open, 0x5c);
-ARC_Call(Bios_Close, 0x60);
-ARC_Call(Bios_Read, 0x64);
-ARC_Call(Bios_GetReadStatus, 0x68);
-#endif
-ARC_Call(Bios_Write, 0x6c);
-#if 0
-ARC_Call(Bios_Seek, 0x70);
-ARC_Call(Bios_Mount, 0x74);
-#endif
-ARC_Call(Bios_GetEnvironmentVariable, 0x78);
-#if 0
-ARC_Call(Bios_SetEnvironmentVariable, 0x7c);
-ARC_Call(Bios_GetFileInformation, 0x80);
-ARC_Call(Bios_SetFileInformation, 0x84);
-#endif
-ARC_Call(Bios_FlushAllCaches, 0x88);
-#if 0
-ARC_Call(Bios_TestUnicodeCharacter, 0x8c);
-ARC_Call(Bios_GetDisplayStatus, 0x90);
-#endif
-
-/*
- * Simple getchar/putchar interface.
- */
-
-#if 0
-int
-bios_getchar()
-{
- char buf[4];
- long cnt;
-
- if (Bios_Read(0, &buf[0], 1, &cnt) != 0)
- return(-1);
- return(buf[0] & 255);
-}
-#endif
-
-void
-bios_putchar(char c)
-{
- char buf[4];
- long cnt;
-
- if (c == '\n') {
- buf[0] = '\r';
- buf[1] = c;
- cnt = 2;
-#ifdef __arc__
- if (displayinfo.CursorYPosition < displayinfo.CursorMaxYPosition)
- displayinfo.CursorYPosition++;
-#endif
- }
- else {
- buf[0] = c;
- cnt = 1;
- }
- Bios_Write(1, &buf[0], cnt, &cnt);
-}
-
-void
-bios_putstring(char *s)
-{
- while (*s) {
- bios_putchar(*s++);
- }
-}
-
-void
-bios_printf(const char *fmt, ...)
-{
- va_list ap;
- char buf[1024];
-
- va_start(ap, fmt);
- vsnprintf(buf, sizeof(buf), fmt, ap);
- bios_putstring(buf);
- va_end(ap);
-}
-
-/*
- * Get memory descriptor for the memory configuration and
- * create a layout database used by pmap init to set up
- * the memory system.
- *
- * Concatenate obvious adjacent segments.
- */
-void
-bios_configure_memory()
-{
- arc_mem_t *descr = NULL;
- uint64_t start, count, prevend = 0;
- MEMORYTYPE type, prevtype = BadMemory;
- uint64_t seg_start, seg_end;
-#ifdef TGT_ORIGIN
- int seen_free = 0;
-#endif
-#ifdef ARCBIOS_DEBUG
- int i;
-#endif
-
- descr = (arc_mem_t *)Bios_GetMemoryDescriptor(descr);
- while (descr != NULL) {
- if (bios_is_32bit) {
- start = descr->BasePage;
- count = descr->PageCount;
- type = descr->Type;
- } else {
- start = ((arc_mem64_t *)descr)->BasePage;
- count = ((arc_mem64_t *)descr)->PageCount;
- type = descr->Type;
-
-#ifdef TGT_OCTANE
- /*
- * Memory above 1GB physical (address 1.5GB)
- * gets reported as reserved on Octane, while
- * it isn't.
- * Abort scan at this point, platform dependent
- * code will add the remaining memory, if any.
- */
- if (sys_config.system_type == SGI_OCTANE &&
- type == FirmwarePermanent &&
- start >= 0x60000)
- break;
-#endif
-
-#ifdef TGT_ORIGIN
- if (sys_config.system_type == SGI_IP27) {
- /*
- * For the lack of a better way to tell
- * IP27 apart from IP35, look at the
- * start of the first chunk of free
- * memory. On IP27, it starts under
- * 0x20000 (which allows us to link
- * kernels at 0xa800000000020000).
- * On IP35, it starts at 0x40000.
- */
- if (type == FreeMemory && seen_free == 0) {
- seen_free = 1;
- if (start >= 0x20) /* IP35 */
- sys_config.system_type =
- SGI_IP35;
- }
-
- /*
- * On IP27 and IP35 systems, data after the
- * first FirmwarePermanent entry is not
- * reliable (entries conflict with each other),
- * and memory after 32MB (or 64MB on IP35) is
- * not listed anyway.
- * So, break from the loop as soon as a
- * FirmwarePermanent entry is found, after
- * making it span the end of the first 32MB
- * (64MB on IP35).
- *
- * The rest of the memory will be gathered
- * from the node structures. This loses some
- * of the first few MB (well... all of them
- * but the kernel image), but at least we're
- * safe to use ARCBios after going virtual.
- */
- if (type == FirmwarePermanent) {
- descr = NULL; /* abort loop */
- count = ((sys_config.system_type ==
- SGI_IP27 ? 32 : 64) << (20 - 12)) -
- start;
- }
- }
-#endif /* O200 || O300 */
- }
-
- switch (type) {
- case BadMemory: /* have no use for these */
- break;
- case LoadedProgram:
- /*
- * LoadedProgram areas are either the boot loader,
- * if the kernel has not been directly loaded by
- * ARCBios, or the kernel image itself.
- * Since we will move the kernel image out of the
- * memory segments later anyway, it makes sense to
- * claim this memory as free.
- */
- /* FALLTHROUGH */
- case FreeMemory:
- case FreeContigous:
- /*
- * Convert from ARCBios page size to kernel page size.
- * As this can yield a smaller range due to possible
- * different page size, we try to force coalescing
- * with the previous range if this is safe.
- */
- seg_start = atop(round_page(start * ARCBIOS_PAGE_SIZE));
- seg_end = atop(trunc_page((start + count) *
- ARCBIOS_PAGE_SIZE));
- if (start == prevend)
- switch (prevtype) {
- case LoadedProgram:
- case FreeMemory:
- case FreeContigous:
- seg_start = atop(trunc_page(start *
- ARCBIOS_PAGE_SIZE));
- break;
- default:
- break;
- }
- if (seg_start < seg_end)
- memrange_register(seg_start, seg_end, 0);
- break;
- case ExceptionBlock:
- case SystemParameterBlock:
- case FirmwareTemporary:
- case FirmwarePermanent:
- rsvdmem += count;
- break;
- default: /* Unknown type, leave it alone... */
- break;
- }
- prevtype = type;
- prevend = start + count;
-#ifdef TGT_ORIGIN
- if (descr == NULL)
- break;
-#endif
- descr = (arc_mem_t *)Bios_GetMemoryDescriptor(descr);
- }
-
- /* convert rsvdmem to kernel pages, and count it in physmem */
- rsvdmem = atop(round_page(rsvdmem * ARCBIOS_PAGE_SIZE));
- physmem += rsvdmem;
-
-#ifdef ARCBIOS_DEBUG
- for (i = 0; i < MAXMEMSEGS; i++) {
- if (mem_layout[i].mem_last_page) {
- bios_printf("MEM %d, %p to %p\n", i,
- ptoa(mem_layout[i].mem_first_page),
- ptoa(mem_layout[i].mem_last_page));
- }
- }
-#endif
-}
-
-/*
- * Find out system type.
- */
-int
-bios_get_system_type()
-{
- arc_config_t *cf;
- arc_sid_t *sid;
- register_t prid;
- char *sysid;
- int sysid_len;
- int i;
-
- /*
- * Figure out where ARCBios can be addressed. On R8000, we can not
- * use compatibility space, but on IP27/IP35, we can not blindly
- * use XKPHYS due to subspacing, while compatibility space works.
- * Fortunately we can get the processor ID to tell these apart, even
- * though 32-bit coprocessor 0 instructions are not supposed to be
- * supported on the R8000 (they probably misbehave somehow if the
- * register has bits sets in the upper 32 bits, which is not the
- * case of the R8000 PrId register).
- */
- __asm__ volatile ("mfc0 %0, $15" /* COP_0_PRID */ : "=r" (prid));
- if ((prid & 0xff00) == (MIPS_R8000 << 8))
- bios_base = (void *)PHYS_TO_XKPHYS(ARCBIOS_BASE, CCA_CACHED);
- else
- bios_base = (void *)PHYS_TO_CKSEG0(ARCBIOS_BASE);
-
- /*
- * Figure out if this is an ARCBios machine and if it is, see if we're
- * dealing with a 32 or 64 bit version.
- */
- if ((ArcBiosBase32->magic == ARC_PARAM_BLK_MAGIC) ||
- (ArcBiosBase32->magic == ARC_PARAM_BLK_MAGIC_BUG)) {
- bios_is_32bit = 1;
- bios_printf("ARCS32 Firmware Version %d.%d\n",
- ArcBiosBase32->version, ArcBiosBase32->revision);
- } else if ((ArcBiosBase64->magic == ARC_PARAM_BLK_MAGIC) ||
- (ArcBiosBase64->magic == ARC_PARAM_BLK_MAGIC_BUG)) {
- bios_is_32bit = 0;
- bios_printf("ARCS64 Firmware\n");
- } else {
- return -1; /* Today is not your lucky day */
- }
-
- sid = (arc_sid_t *)Bios_GetSystemId();
-
- cf = (arc_config_t *)Bios_GetChild(NULL);
- if (cf != NULL) {
- if (bios_is_32bit) {
- sysid = (char *)(long)cf->id;
- sysid_len = cf->id_len;
- } else {
- sysid = (char *)((arc_config64_t *)cf)->id;
- sysid_len = ((arc_config64_t *)cf)->id_len;
- }
-
- if (sysid_len > 0 && sysid != NULL) {
- sysid_len--;
- for (i = 0; i < KNOWNSYSTEMS; i++) {
- if (strlen(sys_types[i].sys_name) !=sysid_len)
- continue;
- if (strncmp(sys_types[i].sys_name, sysid,
- sysid_len) != 0)
- continue;
- if (sys_types[i].sys_vend &&
- strncmp(sys_types[i].sys_vend, sid->vendor,
- 8) != 0)
- continue;
- return (sys_types[i].sys_type); /* Found it. */
- }
- }
- } else {
-#ifdef TGT_ORIGIN
- if (IP27_KLD_KLCONFIG(0)->magic == IP27_KLDIR_MAGIC) {
- /*
- * If we find a kldir assume IP27 for now.
- * We'll decide whether this is IP27 or IP35 later.
- */
- return SGI_IP27;
- }
-#endif
- }
-
- bios_printf("UNRECOGNIZED SYSTEM '%s' VENDOR '%8.8s' PRODUCT '%8.8s'\n",
- cf == NULL ? "??" : sysid, sid->vendor, sid->prodid);
- bios_printf("Halting system!\n");
- Bios_Halt();
- bios_printf("Halting failed, use manual reset!\n");
- while(1);
-}
-
-/*
- * Incomplete version of bios_ident
- */
-void
-bios_ident()
-{
- sys_config.system_type = bios_get_system_type();
-
- if (bios_is_32bit) {
-#define bios_fnptr(slot) \
- (int64_t)*(int32_t *)((int64_t)ArcBiosBase32->firmware_vect + (slot) * 4)
- bios_halt = (void (*)(void))bios_fnptr(3);
- bios_powerdown = (void (*)(void))bios_fnptr(4);
- bios_restart = (void (*)(void))bios_fnptr(5);
- bios_reboot = (void (*)(void))bios_fnptr(6);
- bios_eim = (void (*)(void))bios_fnptr(7);
-#undef bios_fnptr
- } else {
-#define bios_fnptr(slot) \
- *(int64_t *)(ArcBiosBase64->firmware_vect + (slot) * 8)
- bios_halt = (void (*)(void))bios_fnptr(3);
- bios_powerdown = (void (*)(void))bios_fnptr(4);
- bios_restart = (void (*)(void))bios_fnptr(5);
- bios_reboot = (void (*)(void))bios_fnptr(6);
- bios_eim = (void (*)(void))bios_fnptr(7);
-#undef bios_fnptr
- }
-
- bios_configure_memory();
-#ifdef __arc__
- displayinfo = *(arc_dsp_stat_t *)Bios_GetDisplayStatus(1);
-#endif
-}
-
-#if 0
-/*
- * Return geometry of the display. Used by pccons.c to set up the
- * display configuration.
- */
-void
-bios_display_info(int *xpos, int *ypos, int *xsize, int *ysize)
-{
-#ifdef __arc__
- *xpos = displayinfo.CursorXPosition;
- *ypos = displayinfo.CursorYPosition;
- *xsize = displayinfo.CursorMaxXPosition;
- *ysize = displayinfo.CursorMaxYPosition;
-#endif
-}
-#endif
+++ /dev/null
-/* $OpenBSD: cache_r10k.c,v 1.7 2016/01/05 05:27:54 visa Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Cache handling code for R10000 processor family (R10000, R12000,
- * R14000, R16000).
- *
- * R10000 caches are :
- * - L1 I$ is 2-way, VIPT, 64 bytes/line, 32KB total
- * - L1 D$ is 2-way, VIPT, write-back, 32 bytes/line, 32KB total
- * - L2 is 2-way, PIPT, write-back, 64 or 128 bytes/line, 512KB up to 16MB
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <mips64/cache.h>
-#include <machine/cpu.h>
-
-#include <uvm/uvm_extern.h>
-
-#define IndexInvalidate_I 0x00
-#define IndexWBInvalidate_D 0x01
-#define IndexWBInvalidate_S 0x03
-
-#define HitInvalidate_D 0x11
-#define HitInvalidate_S 0x13
-
-#define CacheBarrier 0x14
-
-#define HitWBInvalidate_D 0x15
-#define HitWBInvalidate_S 0x17
-
-#define cache(op,set,addr) \
- __asm__ volatile \
- ("cache %0, %1(%2)" :: "i"(op), "i"(set), "r"(addr) : "memory")
-
-static __inline__ void mips10k_hitinv_primary(vaddr_t, vsize_t);
-static __inline__ void mips10k_hitinv_secondary(vaddr_t, vsize_t, vsize_t);
-static __inline__ void mips10k_hitwbinv_primary(vaddr_t, vsize_t);
-static __inline__ void mips10k_hitwbinv_secondary(vaddr_t, vsize_t, vsize_t);
-
-#define R10K_L1I_LINE 64UL
-#define R10K_L1D_LINE 32UL
-
-void
-Mips10k_ConfigCache(struct cpu_info *ci)
-{
- uint32_t cfg, valias_mask;
-
- cfg = cp0_get_config();
-
- ci->ci_l1inst.size = (1 << 12) << ((cfg >> 29) & 0x07); /* IC */
- ci->ci_l1inst.linesize = R10K_L1I_LINE;
- ci->ci_l1inst.setsize = ci->ci_l1inst.size / 2;
- ci->ci_l1inst.sets = 2;
-
- ci->ci_l1data.size = (1 << 12) << ((cfg >> 26) & 0x07); /* DC */
- ci->ci_l1data.linesize = R10K_L1D_LINE;
- ci->ci_l1data.setsize = ci->ci_l1data.size / 2;
- ci->ci_l1data.sets = 2;
-
- ci->ci_l2.size = (1 << 19) << ((cfg >> 16) & 0x07);
- ci->ci_l2.linesize = (cfg & (1 << 13)) ? 128 : 64;
- ci->ci_l2.setsize = ci->ci_l2.size / 2;
- ci->ci_l2.sets = 2;
-
- memset(&ci->ci_l3, 0, sizeof(struct cache_info));
-
- valias_mask = (max(ci->ci_l1inst.setsize, ci->ci_l1data.setsize) - 1) &
- ~PAGE_MASK;
-
- if (valias_mask != 0) {
- valias_mask |= PAGE_MASK;
-#ifdef MULTIPROCESSOR
- if (valias_mask > cache_valias_mask) {
-#endif
- cache_valias_mask = valias_mask;
- pmap_prefer_mask = valias_mask;
-#ifdef MULTIPROCESSOR
- }
-#endif
- }
-
- ci->ci_SyncCache = Mips10k_SyncCache;
- ci->ci_InvalidateICache = Mips10k_InvalidateICache;
- ci->ci_InvalidateICachePage = Mips10k_InvalidateICachePage;
- ci->ci_SyncICache = Mips10k_SyncICache;
- ci->ci_SyncDCachePage = Mips10k_SyncDCachePage;
- ci->ci_HitSyncDCachePage = Mips10k_HitSyncDCachePage;
- ci->ci_HitSyncDCache = Mips10k_HitSyncDCache;
- ci->ci_HitInvalidateDCache = Mips10k_HitInvalidateDCache;
- ci->ci_IOSyncDCache = Mips10k_IOSyncDCache;
-}
-
-static __inline__ void
-mips10k_hitwbinv_primary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWBInvalidate_D, 0, va);
- va += R10K_L1D_LINE;
- }
-}
-
-static __inline__ void
-mips10k_hitwbinv_secondary(vaddr_t va, vsize_t sz, vsize_t line)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWBInvalidate_S, 0, va);
- va += line;
- }
-}
-
-static __inline__ void
-mips10k_hitinv_primary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitInvalidate_D, 0, va);
- va += R10K_L1D_LINE;
- }
-}
-
-static __inline__ void
-mips10k_hitinv_secondary(vaddr_t va, vsize_t sz, vsize_t line)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitInvalidate_S, 0, va);
- va += line;
- }
-}
-
-/*
- * Writeback and invalidate all caches.
- */
-void
-Mips10k_SyncCache(struct cpu_info *ci)
-{
- vaddr_t sva, eva;
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l1inst.setsize;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, sva);
- cache(IndexInvalidate_I, 1, sva);
- sva += R10K_L1I_LINE;
- }
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l1data.setsize;
- while (sva != eva) {
- cache(IndexWBInvalidate_D, 0, sva);
- cache(IndexWBInvalidate_D, 1, sva);
- sva += R10K_L1D_LINE;
- }
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l2.setsize;
- while (sva != eva) {
- cache(IndexWBInvalidate_S, 0, sva);
- cache(IndexWBInvalidate_S, 1, sva);
- sva += ci->ci_l2.linesize;
- }
-}
-
-/*
- * Invalidate I$ for the given range.
- */
-void
-Mips10k_InvalidateICache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va, sva, eva;
- vsize_t sz;
-
- /* extend the range to integral cache lines */
- va = _va & ~(R10K_L1I_LINE - 1);
- sz = ((_va + _sz + R10K_L1I_LINE - 1) & ~(R10K_L1I_LINE - 1)) - va;
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- /* keep only the index bits */
- sva |= va & ((1UL << 14) - 1);
- eva = sva + sz;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, sva);
- cache(IndexInvalidate_I, 1, sva);
- sva += R10K_L1I_LINE;
- }
-}
-
-/*
- * Register a given page for I$ invalidation.
- */
-void
-Mips10k_InvalidateICachePage(struct cpu_info *ci, vaddr_t va)
-{
-#if PAGE_SHIFT < 14
- /*
- * Mark the particular page index bits as needing to be flushed.
- */
- ci->ci_cachepending_l1i |=
- 1ULL << ((va & ((1UL << 14) - 1)) >> PAGE_SHIFT);
-#else
- /*
- * Since the page size matches the I$ set size, all we need to do
- * here is remember there are postponed flushes.
- */
- ci->ci_cachepending_l1i = 1;
-#endif
-}
-
-/*
- * Perform postponed I$ invalidation.
- */
-void
-Mips10k_SyncICache(struct cpu_info *ci)
-{
- vaddr_t sva, eva;
-
- if (ci->ci_cachepending_l1i != 0) {
-#if PAGE_SHIFT < 14
- /*
- * Iterate on all pending page index bits.
- */
- uint64_t idx;
-
- for (idx = 0; ci->ci_cachepending_l1i != 0; idx++) {
- if ((ci->ci_cachepending_l1i & (1ULL << idx)) == 0)
- continue;
-
- sva = PHYS_TO_XKPHYS(idx << PAGE_SHIFT, CCA_CACHED);
- eva = sva + PAGE_SIZE;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, sva);
- cache(IndexInvalidate_I, 1, sva);
- sva += R10K_L1I_LINE;
- }
-
- ci->ci_cachepending_l1i &= ~(1ULL << idx);
- }
-#else
- /* inline Mips10k_InvalidateICache(ci, 0, PAGE_SIZE); */
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + PAGE_SIZE;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, sva);
- cache(IndexInvalidate_I, 1, sva);
- sva += R10K_L1I_LINE;
- }
- ci->ci_cachepending_l1i = 0;
-#endif
- }
-}
-
-/*
- * Writeback D$ for the given page.
- */
-void
-Mips10k_SyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
-#if PAGE_SHIFT < 14
- vaddr_t sva, eva;
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- /* keep only the index bits */
- sva += va & ((1UL << 14) - 1);
- eva = sva + PAGE_SIZE;
- while (sva != eva) {
- cache(IndexWBInvalidate_D, 0 + 0 * R10K_L1D_LINE, sva);
- cache(IndexWBInvalidate_D, 0 + 1 * R10K_L1D_LINE, sva);
- cache(IndexWBInvalidate_D, 0 + 2 * R10K_L1D_LINE, sva);
- cache(IndexWBInvalidate_D, 0 + 3 * R10K_L1D_LINE, sva);
- cache(IndexWBInvalidate_D, 1 + 0 * R10K_L1D_LINE, sva);
- cache(IndexWBInvalidate_D, 1 + 1 * R10K_L1D_LINE, sva);
- cache(IndexWBInvalidate_D, 1 + 2 * R10K_L1D_LINE, sva);
- cache(IndexWBInvalidate_D, 1 + 3 * R10K_L1D_LINE, sva);
- sva += 4 * R10K_L1D_LINE;
- }
-#else
- /*
- * Since the page size is not smaller than the L1 virtual index space,
- * it is cheaper to use Hit operations to make sure we do not affect
- * innocent cache lines.
- */
- mips10k_hitwbinv_primary(PHYS_TO_XKPHYS(pa, CCA_CACHED), PAGE_SIZE);
-#endif
-}
-
-/*
- * Writeback D$ for the given page, which is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-void
-Mips10k_HitSyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
- mips10k_hitwbinv_primary(va, PAGE_SIZE);
-}
-
-/*
- * Writeback D$ for the given range. Range is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-void
-Mips10k_HitSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
-
- /* extend the range to integral cache lines */
- va = _va & ~(R10K_L1D_LINE - 1);
- sz = ((_va + _sz + R10K_L1D_LINE - 1) & ~(R10K_L1D_LINE - 1)) - va;
- mips10k_hitwbinv_primary(va, sz);
-}
-
-/*
- * Invalidate D$ for the given range. Range is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-void
-Mips10k_HitInvalidateDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
-
- /* extend the range to integral cache lines */
- va = _va & ~(R10K_L1D_LINE - 1);
- sz = ((_va + _sz + R10K_L1D_LINE - 1) & ~(R10K_L1D_LINE - 1)) - va;
- mips10k_hitinv_primary(va, sz);
-}
-
-/*
- * Backend for bus_dmamap_sync(). Enforce coherency of the given range
- * by performing the necessary cache writeback and/or invalidate
- * operations.
- */
-void
-Mips10k_IOSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz, int how)
-{
- vaddr_t va;
- vsize_t sz;
- vsize_t line;
- int partial_start, partial_end;
-
- line = ci->ci_l2.linesize;
- /* extend the range to integral cache lines */
- if (line == 64) {
- va = _va & ~(64UL - 1);
- sz = ((_va + _sz + 64UL - 1) & ~(64UL - 1)) - va;
- } else {
- va = _va & ~(128UL - 1);
- sz = ((_va + _sz + 128UL - 1) & ~(128UL - 1)) - va;
- }
-
- switch (how) {
- case CACHE_SYNC_R:
- /* writeback partial cachelines */
- if (((_va | _sz) & (line - 1)) != 0) {
- partial_start = va != _va;
- partial_end = va + sz != _va + _sz;
- } else {
- partial_start = partial_end = 0;
- }
- if (partial_start) {
- cache(HitWBInvalidate_S, 0, va);
- va += line;
- sz -= line;
- }
- if (sz != 0 && partial_end) {
- cache(HitWBInvalidate_S, 0, va + sz - line);
- sz -= line;
- }
- if (sz != 0) {
- if (line == 64)
- mips10k_hitinv_secondary(va, sz, 64UL);
- else
- mips10k_hitinv_secondary(va, sz, 128UL);
- }
- break;
- case CACHE_SYNC_X:
- case CACHE_SYNC_W:
- if (line == 64)
- mips10k_hitwbinv_secondary(va, sz, 64UL);
- else
- mips10k_hitwbinv_secondary(va, sz, 128UL);
- break;
- }
-}
+++ /dev/null
-/* $OpenBSD: cache_r4k.c,v 1.15 2016/01/05 05:27:54 visa Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <mips64/cache.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-
-#include <uvm/uvm_extern.h>
-
-#define IndexInvalidate_I 0x00
-#define IndexWBInvalidate_D 0x01
-#define IndexWBInvalidate_S 0x03
-
-#define HitInvalidate_D 0x11
-#define HitInvalidate_S 0x13
-
-#define HitWBInvalidate_D 0x15
-#define HitWBInvalidate_S 0x17
-
-#define cache(op,addr) \
- __asm__ volatile ("cache %0, 0(%1)" :: "i"(op), "r"(addr) : "memory")
-
-static __inline__ void mips4k_hitinv_primary(vaddr_t, vsize_t, vsize_t);
-static __inline__ void mips4k_hitinv_secondary(vaddr_t, vsize_t, vsize_t);
-static __inline__ void mips4k_hitwbinv_primary(vaddr_t, vsize_t, vsize_t);
-static __inline__ void mips4k_hitwbinv_secondary(vaddr_t, vsize_t, vsize_t);
-
-/*
- * Invoke a simple routine from uncached space (either CKSEG1 or uncached
- * XKPHYS).
- */
-
-static void
-run_uncached(void (*fn)(register_t), register_t arg)
-{
- vaddr_t va;
- paddr_t pa;
-
- va = (vaddr_t)fn;
- if (IS_XKPHYS(va)) {
- pa = XKPHYS_TO_PHYS(va);
- va = PHYS_TO_XKPHYS(pa, CCA_NC);
- } else {
- pa = CKSEG0_TO_PHYS(va);
- va = PHYS_TO_CKSEG1(pa);
- }
- fn = (void (*)(register_t))va;
-
- (*fn)(arg);
-}
-
-
-void
-Mips4k_ConfigCache(struct cpu_info *ci)
-{
- register_t cfg, ncfg;
-
- cfg = cp0_get_config();
-
- ci->ci_l1inst.size = (1 << 12) << ((cfg >> 9) & 0x07); /* IC */
- if (cfg & (1 << 5)) /* IB */
- ci->ci_l1inst.linesize = 32;
- else
- ci->ci_l1inst.linesize = 16;
-
- ci->ci_l1data.size = (1 << 12) << ((cfg >> 6) & 0x07); /* DC */
- if (cfg & (1 << 4)) /* DB */
- ci->ci_l1data.linesize = 32;
- else
- ci->ci_l1data.linesize = 16;
-
- /* R4000 and R4400 L1 caches are direct */
- ci->ci_l1inst.setsize = ci->ci_l1inst.size;
- ci->ci_l1inst.sets = 1;
- ci->ci_l1data.setsize = ci->ci_l1data.size;
- ci->ci_l1data.sets = 1;
-
- cache_valias_mask =
- (max(ci->ci_l1inst.size, ci->ci_l1data.size) - 1) &
- ~PAGE_MASK;
-
- if ((cfg & (1 << 17)) == 0) { /* SC */
- /*
- * We expect the setup code to have set up ci->ci_l2 for us.
- * Unfortunately we aren't allowed to panic() there if it
- * didn't, because the console is not available.
- */
-
- /* fixed 32KB aliasing to avoid VCE */
- pmap_prefer_mask = ((1 << 15) - 1);
- } else {
- memset(&ci->ci_l2, 0, sizeof(struct cache_info));
- }
- memset(&ci->ci_l3, 0, sizeof(struct cache_info));
-
- if (cache_valias_mask != 0) {
- cache_valias_mask |= PAGE_MASK;
- pmap_prefer_mask |= cache_valias_mask;
- }
-
- ci->ci_SyncCache = Mips4k_SyncCache;
- ci->ci_InvalidateICache = Mips4k_InvalidateICache;
- ci->ci_InvalidateICachePage = Mips4k_InvalidateICachePage;
- ci->ci_SyncICache = Mips4k_SyncICache;
- ci->ci_SyncDCachePage = Mips4k_SyncDCachePage;
- ci->ci_HitSyncDCachePage = Mips4k_HitSyncDCachePage;
- ci->ci_HitSyncDCache = Mips4k_HitSyncDCache;
- ci->ci_HitInvalidateDCache = Mips4k_HitInvalidateDCache;
- ci->ci_IOSyncDCache = Mips4k_IOSyncDCache;
-
- ncfg = (cfg & ~CFGR_CCA_MASK) | CCA_CACHED;
- ncfg &= ~CFGR_CU;
- if (cfg != ncfg)
- run_uncached(cp0_set_config, ncfg);
-}
-
-/*
- * Writeback and invalidate all caches.
- */
-void
-Mips4k_SyncCache(struct cpu_info *ci)
-{
- vaddr_t sva, eva;
- vsize_t line;
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l1inst.size;
- line = ci->ci_l1inst.linesize;
- while (sva != eva) {
- cache(IndexInvalidate_I, sva);
- sva += line;
- }
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l1data.size;
- line = ci->ci_l1data.linesize;
- while (sva != eva) {
- cache(IndexWBInvalidate_D, sva);
- sva += line;
- }
-
- if (ci->ci_l2.size != 0) {
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l2.size;
- line = ci->ci_l2.linesize;
- while (sva != eva) {
- cache(IndexWBInvalidate_S, sva);
- sva += line;
- }
- }
-
- mips_sync();
-}
-
-/*
- * Invalidate I$ for the given range.
- */
-void
-Mips4k_InvalidateICache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va, sva, eva;
- vsize_t sz;
- vsize_t line;
-
- line = ci->ci_l1inst.linesize;
- /* extend the range to integral cache lines */
- if (line == 16) {
- va = _va & ~(16UL - 1);
- sz = ((_va + _sz + 16 - 1) & ~(16UL - 1)) - va;
- } else {
- va = _va & ~(32UL - 1);
- sz = ((_va + _sz + 32 - 1) & ~(32UL - 1)) - va;
- }
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- /* keep only the index bits */
- sva += va & ((1UL << 15) - 1);
- if (sz > ci->ci_l1inst.size)
- sz = ci->ci_l1inst.size;
- eva = sva + sz;
- while (sva != eva) {
- cache(IndexInvalidate_I, sva);
- sva += line;
- }
-
- mips_sync();
-}
-
-/*
- * Register a given page for I$ invalidation.
- */
-void
-Mips4k_InvalidateICachePage(struct cpu_info *ci, vaddr_t va)
-{
- /*
- * Mark the particular page index bits as needing to be flushed.
- */
- ci->ci_cachepending_l1i |=
- 1ULL << ((va & ((1UL << 15) - 1)) >> PAGE_SHIFT);
-}
-
-/*
- * Perform postponed I$ invalidation.
- */
-void
-Mips4k_SyncICache(struct cpu_info *ci)
-{
- vaddr_t sva, eva;
- vsize_t line;
- uint64_t idx;
-
- if (ci->ci_cachepending_l1i != 0) {
- line = ci->ci_l1inst.linesize;
-
- if (ci->ci_l1inst.size <= PAGE_SIZE) {
- ci->ci_cachepending_l1i = 0;
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l1inst.size;
- while (sva != eva) {
- cache(IndexInvalidate_I, sva);
- sva += line;
- }
- return;
- }
-
- /*
- * Iterate on all pending page index bits.
- */
- for (idx = 0; ci->ci_cachepending_l1i != 0; idx++) {
- if ((ci->ci_cachepending_l1i & (1ULL << idx)) == 0)
- continue;
-
- sva = PHYS_TO_XKPHYS(idx << PAGE_SHIFT, CCA_CACHED);
- eva = sva + PAGE_SIZE;
- while (sva != eva) {
- cache(IndexInvalidate_I, sva);
- sva += line;
- }
-
- ci->ci_cachepending_l1i &= ~(1ULL << idx);
- }
- }
-}
-
-/*
- * Writeback D$ for the given page.
- */
-void
-Mips4k_SyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
- vaddr_t sva, eva;
- vsize_t line;
-
- line = ci->ci_l1data.linesize;
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- /* keep only the index bits */
- sva += va & ((1UL << 15) - 1);
- if (PAGE_SIZE > ci->ci_l1data.size)
- eva = sva + ci->ci_l1data.size;
- else
- eva = sva + PAGE_SIZE;
- while (sva != eva) {
- cache(IndexWBInvalidate_D, sva);
- sva += line;
- }
-
- if (ci->ci_l2.size != 0) {
- line = ci->ci_l2.linesize;
- sva = PHYS_TO_XKPHYS(pa, CCA_CACHED);
- eva = sva + PAGE_SIZE;
- while (sva != eva) {
- cache(IndexWBInvalidate_S, sva);
- sva += line;
- }
- }
-
- mips_sync();
-}
-
-static __inline__ void
-mips4k_hitwbinv_primary(vaddr_t va, vsize_t sz, vsize_t line)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWBInvalidate_D, va);
- va += line;
- }
-}
-
-static __inline__ void
-mips4k_hitwbinv_secondary(vaddr_t va, vsize_t sz, vsize_t line)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWBInvalidate_S, va);
- va += line;
- }
-}
-
-/*
- * Writeback D$ for the given page, which is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-void
-Mips4k_HitSyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
- mips4k_hitwbinv_primary(va, PAGE_SIZE, ci->ci_l1data.linesize);
- if (ci->ci_l2.size != 0)
- mips4k_hitwbinv_secondary(va, PAGE_SIZE, ci->ci_l2.linesize);
-
- mips_sync();
-}
-
-/*
- * Writeback D$ for the given range. Range is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-void
-Mips4k_HitSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
- vsize_t line;
-
- line = ci->ci_l1data.linesize;
- /* extend the range to integral cache lines */
- if (line == 16) {
- va = _va & ~(16UL - 1);
- sz = ((_va + _sz + 16 - 1) & ~(16UL - 1)) - va;
- } else {
- va = _va & ~(32UL - 1);
- sz = ((_va + _sz + 32 - 1) & ~(32UL - 1)) - va;
- }
- mips4k_hitwbinv_primary(va, sz, line);
-
- if (ci->ci_l2.size != 0) {
- line = ci->ci_l2.linesize;
- /* extend the range to integral cache lines */
- va = _va & ~(line - 1);
- sz = ((_va + _sz + line - 1) & ~(line - 1)) - va;
- mips4k_hitwbinv_secondary(va, sz, line);
- }
-
- mips_sync();
-}
-
-/*
- * Invalidate D$ for the given range. Range is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-static __inline__ void
-mips4k_hitinv_primary(vaddr_t va, vsize_t sz, vsize_t line)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitInvalidate_D, va);
- va += line;
- }
-}
-
-static __inline__ void
-mips4k_hitinv_secondary(vaddr_t va, vsize_t sz, vsize_t line)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitInvalidate_S, va);
- va += line;
- }
-}
-
-void
-Mips4k_HitInvalidateDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
- vsize_t line;
-
- line = ci->ci_l1data.linesize;
- /* extend the range to integral cache lines */
- if (line == 16) {
- va = _va & ~(16UL - 1);
- sz = ((_va + _sz + 16 - 1) & ~(16UL - 1)) - va;
- } else {
- va = _va & ~(32UL - 1);
- sz = ((_va + _sz + 32 - 1) & ~(32UL - 1)) - va;
- }
- mips4k_hitinv_primary(va, sz, line);
-
- if (ci->ci_l2.size != 0) {
- line = ci->ci_l2.linesize;
- /* extend the range to integral cache lines */
- va = _va & ~(line - 1);
- sz = ((_va + _sz + line - 1) & ~(line - 1)) - va;
- mips4k_hitinv_secondary(va, sz, line);
- }
-
- mips_sync();
-}
-
-/*
- * Backend for bus_dmamap_sync(). Enforce coherency of the given range
- * by performing the necessary cache writeback and/or invalidate
- * operations.
- */
-void
-Mips4k_IOSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz, int how)
-{
- vaddr_t va;
- vsize_t sz;
- vsize_t line;
- int partial_start, partial_end;
-
- /*
- * L1
- */
-
- line = ci->ci_l1data.linesize;
- /* extend the range to integral cache lines */
- if (line == 16) {
- va = _va & ~(16UL - 1);
- sz = ((_va + _sz + 16 - 1) & ~(16UL - 1)) - va;
- } else {
- va = _va & ~(32UL - 1);
- sz = ((_va + _sz + 32 - 1) & ~(32UL - 1)) - va;
- }
-
- switch (how) {
- case CACHE_SYNC_R:
- /* writeback partial cachelines */
- if (((_va | _sz) & (line - 1)) != 0) {
- partial_start = va != _va;
- partial_end = va + sz != _va + _sz;
- } else {
- partial_start = partial_end = 0;
- }
- if (partial_start) {
- cache(HitWBInvalidate_D, va);
- va += line;
- sz -= line;
- }
- if (sz != 0 && partial_end) {
- sz -= line;
- cache(HitWBInvalidate_D, va + sz);
- }
- if (sz != 0)
- mips4k_hitinv_primary(va, sz, line);
- break;
- case CACHE_SYNC_X:
- case CACHE_SYNC_W:
- mips4k_hitwbinv_primary(va, sz, line);
- break;
- }
-
- /*
- * L2
- */
-
- if (ci->ci_l2.size != 0) {
- line = ci->ci_l2.linesize;
- /* extend the range to integral cache lines */
- va = _va & ~(line - 1);
- sz = ((_va + _sz + line - 1) & ~(line - 1)) - va;
-
- switch (how) {
- case CACHE_SYNC_R:
- /* writeback partial cachelines */
- if (((_va | _sz) & (line - 1)) != 0) {
- partial_start = va != _va;
- partial_end = va + sz != _va + _sz;
- } else {
- partial_start = partial_end = 0;
- }
- if (partial_start) {
- cache(HitWBInvalidate_S, va);
- va += line;
- sz -= line;
- }
- if (sz != 0 && partial_end) {
- sz -= line;
- cache(HitWBInvalidate_S, va + sz);
- }
- if (sz != 0)
- mips4k_hitinv_secondary(va, sz, line);
- break;
- case CACHE_SYNC_X:
- case CACHE_SYNC_W:
- mips4k_hitwbinv_secondary(va, sz, line);
- break;
- }
- }
-}
+++ /dev/null
-/* $OpenBSD: cache_r5k.c,v 1.15 2016/01/05 05:27:54 visa Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 1998-2004 Opsycon AB (www.opsycon.se)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * Cache handling for R5000 processor and close relatives:
- * R4600/R4700, R5000, RM52xx, RM7xxx, RM9xxx.
- *
- * The following assumptions are made:
- * - L1 I$ is 2-way or 4-way (RM7k/RM9k), VIPT, 32 bytes/line, up to 32KB
- * - L1 D$ is 2-way or 4-way (RM7k/RM9k), VIPT, write-back, 32 bytes/line,
- * up to 32KB
- * - `internal' L2 on RM7k/RM9k is 4-way, PIPT, write-back, 32 bytes/line,
- * 256KB total
- * - L3 (on RM7k/RM9k) or `external' L2 (all others) may not exist. If it
- * does, it is direct-mapped, PIPT, write-through
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <mips64/cache.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-
-#include <uvm/uvm_extern.h>
-
-#define IndexInvalidate_I 0x00
-#define IndexWBInvalidate_D 0x01
-#define IndexWBInvalidate_S 0x03
-
-#define IndexStoreTag_S 0x0b
-
-#define HitInvalidate_D 0x11
-#define HitInvalidate_S 0x13
-
-#define HitWBInvalidate_D 0x15
-#define InvalidatePage_T 0x16 /* Only RM7k/RM9k */
-#define HitWBInvalidate_S 0x17
-#define InvalidatePage_S 0x17 /* Only RM527[0-1] */
-
-#define HitWriteback_D 0x19
-#define HitWriteback_S 0x1b
-
-/*
- * R5000 and RM52xx config register bits.
- */
-#define CF_5_SE (1U << 12) /* Secondary cache enable */
-#define CF_5_SC (1U << 17) /* Secondary cache not present */
-#define CF_5_SS (3U << 20) /* Secondary cache size */
-#define CF_5_SS_AL 20 /* Shift to align */
-
-/*
- * RM7000 config register bits.
- */
-#define CF_7_SE (1U << 3) /* Secondary cache enable */
-#define CF_7_SC (1U << 31) /* Secondary cache not present */
-#define CF_7_TE (1U << 12) /* Tertiary cache enable */
-#define CF_7_TC (1U << 17) /* Tertiary cache not present */
-#define CF_7_TS (3U << 20) /* Tertiary cache size */
-#define CF_7_TS_AL 20 /* Shift to align */
-
-
-#define R5K_LINE 32UL /* internal cache line */
-#define R5K_PAGE 4096UL /* external cache page */
-
-
-/*
- * Cache configuration
- */
-#define CTYPE_HAS_IL2 0x01 /* Internal L2 Cache present */
-#define CTYPE_HAS_XL2 0x02 /* External L2 Cache present */
-#define CTYPE_HAS_XL3 0x04 /* External L3 Cache present */
-
-#define nop4() __asm__ volatile \
- ("nop; nop; nop; nop")
-#define nop10() __asm__ volatile \
- ("nop; nop; nop; nop; nop; nop; nop; nop; nop; nop")
-
-#define cache(op,offs,addr) __asm__ volatile \
- ("cache %0, %1(%2)" :: "i"(op), "i"(offs), "r"(addr) : "memory")
-
-#define reset_taglo() __asm__ volatile \
- ("mtc0 $zero, $28") /* COP_0_TAG_LO */
-#define reset_taghi() __asm__ volatile \
- ("mtc0 $zero, $29") /* COP_0_TAG_HI */
-
-static __inline__ register_t
-get_config(void)
-{
- register_t cfg;
- __asm__ volatile ("mfc0 %0, $16" : "=r"(cfg)); /* COP_0_CONFIG */
- return cfg;
-}
-
-static __inline__ void
-set_config(register_t cfg)
-{
- __asm__ volatile ("mtc0 %0, $16" :: "r"(cfg)); /* COP_0_CONFIG */
- /* MTC0_HAZARD */
-#ifdef CPU_RM7000
- nop10();
-#else
- nop4();
-#endif
-}
-
-static __inline__ void mips5k_hitinv_primary(vaddr_t, vsize_t);
-static __inline__ void mips5k_hitinv_secondary(vaddr_t, vsize_t);
-static __inline__ void mips5k_hitwbinv_primary(vaddr_t, vsize_t);
-static __inline__ void mips5k_hitwbinv_secondary(vaddr_t, vsize_t);
-static __inline__ void mips5k_hitwb_primary(vaddr_t, vsize_t);
-#if 0
-static __inline__ void mips5k_hitwb_secondary(vaddr_t, vsize_t);
-#endif
-
-void mips5k_l2_init(register_t);
-void mips7k_l2_init(register_t);
-void mips7k_l3_init(register_t);
-void mips5k_c0_cca_update(register_t);
-static void run_uncached(void (*)(register_t), register_t);
-
-/*
- * Invoke a simple routine from uncached space (either CKSEG1 or uncached
- * XKPHYS).
- */
-
-static void
-run_uncached(void (*fn)(register_t), register_t arg)
-{
- vaddr_t va;
- paddr_t pa;
-
- va = (vaddr_t)fn;
- if (IS_XKPHYS(va)) {
- pa = XKPHYS_TO_PHYS(va);
- va = PHYS_TO_XKPHYS(pa, CCA_NC);
- } else {
- pa = CKSEG0_TO_PHYS(va);
- va = PHYS_TO_CKSEG1(pa);
- }
- fn = (void (*)(register_t))va;
-
- (*fn)(arg);
-}
-
-
-/*
- * Initialize the external L2 cache of an R5000 (or close relative) processor.
- * INTENDED TO BE RUN UNCACHED - BE SURE TO CHECK THAT IT WON'T STORE ANYTHING
- * ON THE STACK IN THE ASSEMBLY OUTPUT EVERYTIME YOU CHANGE IT.
- */
-void
-mips5k_l2_init(register_t l2size)
-{
- register vaddr_t va, eva;
- register register_t cfg;
-
- cfg = get_config();
- cfg |= CF_5_SE;
- set_config(cfg);
-
- reset_taglo();
- reset_taghi();
-
- va = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = va + l2size;
- while (va != eva) {
- cache(InvalidatePage_S, 0, va);
- va += R5K_PAGE;
- }
-}
-
-/*
- * Initialize the internal L2 cache of an RM7000 (or close relative) processor.
- * INTENDED TO BE RUN UNCACHED - BE SURE TO CHECK THAT IT WON'T STORE ANYTHING
- * ON THE STACK IN THE ASSEMBLY OUTPUT EVERYTIME YOU CHANGE IT.
- */
-void
-mips7k_l2_init(register_t l2size)
-{
- register vaddr_t va, eva;
- register register_t cfg;
-
- cfg = get_config();
- cfg |= CF_7_SE;
- set_config(cfg);
-
- reset_taglo();
- reset_taghi();
-
- va = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = va + l2size;
- while (va != eva) {
- cache(IndexStoreTag_S, 0, va);
- va += R5K_LINE;
- }
- mips_sync();
-
- va = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = va + l2size;
- while (va != eva) {
- __asm__ volatile
- ("lw $zero, 0(%0)" :: "r"(va));
- va += R5K_LINE;
- }
- mips_sync();
-
- va = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = va + l2size;
- while (va != eva) {
- cache(IndexStoreTag_S, 0, va);
- va += R5K_LINE;
- }
- mips_sync();
-}
-
-/*
- * Initialize the external L3 cache of an RM7000 (or close relative) processor.
- * INTENDED TO BE RUN UNCACHED - BE SURE TO CHECK THAT IT WON'T STORE ANYTHING
- * ON THE STACK IN THE ASSEMBLY OUTPUT EVERYTIME YOU CHANGE IT.
- */
-void
-mips7k_l3_init(register_t l3size)
-{
- register vaddr_t va, eva;
- register register_t cfg;
-
- cfg = get_config();
- cfg |= CF_7_TE;
- set_config(cfg);
-
- reset_taglo();
- reset_taghi();
-
- va = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = va + l3size;
- while (va != eva) {
- cache(InvalidatePage_T, 0, va);
- va += R5K_PAGE;
- }
-}
-
-/*
- * Update the coherency of KSEG0.
- * INTENDED TO BE RUN UNCACHED - BE SURE TO CHECK THAT IT WON'T STORE ANYTHING
- * ON THE STACK IN THE ASSEMBLY OUTPUT EVERYTIME YOU CHANGE IT.
- */
-void
-mips5k_c0_cca_update(register_t cfg)
-{
- set_config(cfg);
-
-#if defined(CPU_R5000) || defined(CPU_RM7000)
- /*
- * RM52xx and RM7000 hazard: after updating the K0 field of the Config
- * register, the KSEG0 and CKSEG0 address segments should not be used
- * for 5 cycles. The register modification and the use of these address
- * segments should be separated by at least five (RM52xx) or
- * ten (RM7000) integer instructions.
- */
- nop10();
-#endif
-}
-
-/*
- * Discover cache configuration and update cpu_info accordingly.
- * Initialize L2 and L3 caches found if necessary.
- */
-void
-Mips5k_ConfigCache(struct cpu_info *ci)
-{
- register_t cfg, ncfg;
- uint setshift;
-
- cfg = cp0_get_config();
-
- /* L1 cache */
- ci->ci_l1inst.size = (1 << 12) << ((cfg >> 9) & 0x07); /* IC */
- ci->ci_l1inst.linesize = R5K_LINE;
- ci->ci_l1data.size = (1 << 12) << ((cfg >> 6) & 0x07); /* DC */
- ci->ci_l1data.linesize = R5K_LINE;
-
- /* sane defaults */
- setshift = 1;
- memset(&ci->ci_l2, 0, sizeof(struct cache_info));
- memset(&ci->ci_l3, 0, sizeof(struct cache_info));
- ci->ci_cacheconfiguration = 0;
-
- switch ((cp0_get_prid() >> 8) & 0xff) {
- default:
- /* shouldn't happen, really; but we can't panic here */
- break;
-#ifdef CPU_R4600
- case MIPS_R4600:
- case MIPS_R4700:
- /* no external L2 interface */
- break;
-#endif
-#ifdef CPU_R5000
- case MIPS_R5000:
- case MIPS_RM52X0:
- /* optional external direct L2 cache */
- if ((cfg & CF_5_SC) == 0) {
- ci->ci_l2.size = (1 << 19) <<
- ((cfg & CF_5_SS) >> CF_5_SS_AL);
- ci->ci_l2.linesize = R5K_LINE;
- ci->ci_l2.setsize = ci->ci_l2.size;
- ci->ci_l2.sets = 1;
- }
- if (ci->ci_l2.size != 0) {
- ci->ci_cacheconfiguration |= CTYPE_HAS_XL2;
- cfg |= CF_5_SE;
- run_uncached(mips5k_l2_init, ci->ci_l2.size);
- }
- break;
-#endif /* CPU_R5000 */
-#ifdef CPU_RM7000
- case MIPS_RM7000:
- case MIPS_RM9000:
- setshift = 2;
- /* optional external direct L3 cache */
- if ((cfg & CF_7_TC) == 0) {
-#ifndef L3SZEXT
- /*
- * Assume L3 size is provided in the system information
- * field of the Config register. This is usually the
- * case on systems where the RM7k/RM9k processor is
- * an upgrade from an R5000/RM52xx processor, such as
- * the SGI O2.
- */
- ci->ci_l3.size = (1 << 19) <<
- ((cfg & CF_7_TS) >> CF_7_TS_AL);
- ci->ci_l3.linesize = R5K_LINE;
- ci->ci_l3.setsize = ci->ci_l3.size;
- ci->ci_l3.sets = 1;
-#else
- /*
- * Assume machdep has initialized ci_l3 for us.
- */
-#endif
- }
- if (ci->ci_l3.size != 0) {
- ci->ci_cacheconfiguration |= CTYPE_HAS_XL3;
- cfg |= CF_7_TE;
- run_uncached(mips7k_l3_init, ci->ci_l3.size);
-
- }
- /* internal 4-way L2 cache */
- if ((cfg & CF_7_SC) == 0) {
- ci->ci_l2.size = 256 * 1024; /* fixed size */
- ci->ci_l2.linesize = R5K_LINE;
- ci->ci_l2.setsize = ci->ci_l2.size / 4;
- ci->ci_l2.sets = 4;
- }
- if (ci->ci_l2.size != 0) {
- ci->ci_cacheconfiguration |= CTYPE_HAS_IL2;
- if ((cfg & CF_7_SE) == 0) {
- cfg |= CF_7_SE;
- run_uncached(mips7k_l2_init, ci->ci_l2.size);
- }
- }
- break;
-#endif /* CPU_RM7000 */
- }
-
- ci->ci_l1inst.setsize = ci->ci_l1inst.size >> setshift;
- ci->ci_l1inst.sets = setshift == 2 ? 4 : 2;
- ci->ci_l1data.setsize = ci->ci_l1data.size >> setshift;
- ci->ci_l1data.sets = setshift == 2 ? 4 : 2;
-
- cache_valias_mask =
- (max(ci->ci_l1inst.setsize, ci->ci_l1data.setsize) - 1) &
- ~PAGE_MASK;
-
- if (cache_valias_mask != 0) {
- cache_valias_mask |= PAGE_MASK;
- pmap_prefer_mask = cache_valias_mask;
- }
-
- ci->ci_SyncCache = Mips5k_SyncCache;
- ci->ci_InvalidateICache = Mips5k_InvalidateICache;
- ci->ci_InvalidateICachePage = Mips5k_InvalidateICachePage;
- ci->ci_SyncICache = Mips5k_SyncICache;
- ci->ci_SyncDCachePage = Mips5k_SyncDCachePage;
- ci->ci_HitSyncDCachePage = Mips5k_HitSyncDCachePage;
- ci->ci_HitSyncDCache = Mips5k_HitSyncDCache;
- ci->ci_HitInvalidateDCache = Mips5k_HitInvalidateDCache;
- ci->ci_IOSyncDCache = Mips5k_IOSyncDCache;
-
- ncfg = (cfg & ~CFGR_CCA_MASK) | CCA_CACHED;
- if (cfg != ncfg)
- run_uncached(mips5k_c0_cca_update, ncfg);
-}
-
-/*
- * Writeback and invalidate all caches.
- */
-void
-Mips5k_SyncCache(struct cpu_info *ci)
-{
- vaddr_t sva, eva;
-#ifdef CPU_R4600
- /*
- * Revision 1 R4600 need to perform `Index' cache operations with
- * interrupt disabled, to make sure both ways are correctly updated.
- */
- register_t sr = disableintr();
-#endif
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l1inst.size;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, sva);
- sva += R5K_LINE;
- }
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l1data.size;
- while (sva != eva) {
- cache(IndexWBInvalidate_D, 0, sva);
- sva += R5K_LINE;
- }
-
-#ifdef CPU_R4600
- setsr(sr);
-#endif
-
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2) {
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l2.size;
- while (sva != eva) {
- cache(IndexWBInvalidate_S, 0, sva);
- sva += R5K_LINE;
- }
- } else
-#endif
-#ifdef CPU_R5000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_XL2) {
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l2.size;
- reset_taglo();
- while (sva != eva) {
- cache(InvalidatePage_S, 0, sva);
- sva += R5K_PAGE;
- }
- } else
-#endif
- {
- }
-
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_XL3) {
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + ci->ci_l3.size;
- reset_taglo();
- while (sva != eva) {
- cache(InvalidatePage_T, 0, sva);
- sva += R5K_PAGE;
- }
- }
-#endif
-
- mips_sync();
-}
-
-/*
- * Invalidate I$ for the given range.
- */
-void
-Mips5k_InvalidateICache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va, sva, eva, iva;
- vsize_t sz, offs;
-#ifdef CPU_R4600
- /*
- * Revision 1 R4600 need to perform `Index' cache operations with
- * interrupt disabled, to make sure both ways are correctly updated.
- */
- register_t sr = disableintr();
-#endif
-
- /* extend the range to integral cache lines */
- va = _va & ~(R5K_LINE - 1);
- sz = ((_va + _sz + R5K_LINE - 1) & ~(R5K_LINE - 1)) - va;
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- offs = ci->ci_l1inst.setsize;
- /* keep only the index bits */
- sva |= va & (offs - 1);
- eva = sva + sz;
-
- switch (ci->ci_l1inst.sets) {
- default:
-#ifdef CPU_RM7000
- case 4:
- while (sva != eva) {
- iva = sva;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- sva += R5K_LINE;
- }
- break;
-#endif
-#if defined(CPU_R5000) || defined(CPU_R4600)
- case 2:
- iva = sva + offs;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, iva);
- cache(IndexInvalidate_I, 0, sva);
- iva += R5K_LINE;
- sva += R5K_LINE;
- }
- break;
-#endif
- }
-
-#ifdef CPU_R4600
- setsr(sr);
-#endif
- mips_sync();
-}
-
-/*
- * Register a given page for I$ invalidation.
- */
-void
-Mips5k_InvalidateICachePage(struct cpu_info *ci, vaddr_t va)
-{
- /*
- * Mark the particular page index bits as needing to be flushed.
- */
- ci->ci_cachepending_l1i |=
- 1ULL << ((va & (ci->ci_l1inst.setsize - 1)) >> PAGE_SHIFT);
-}
-
-/*
- * Perform postponed I$ invalidation.
- */
-void
-Mips5k_SyncICache(struct cpu_info *ci)
-{
- vaddr_t sva, eva, iva;
- vsize_t offs;
- uint64_t idx;
-#ifdef CPU_R4600
- register_t sr;
-#endif
-
- if (ci->ci_cachepending_l1i == 0)
- return;
-
-#ifdef CPU_R4600
- /*
- * Revision 1 R4600 need to perform `Index' cache operations with
- * interrupt disabled, to make sure both ways are correctly updated.
- */
- sr = disableintr();
-#endif
-
- offs = ci->ci_l1inst.setsize;
-
- if (ci->ci_l1inst.setsize <= PAGE_SIZE) {
- ci->ci_cachepending_l1i = 0;
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- eva = sva + offs;
- switch (ci->ci_l1inst.sets) {
- default:
-#ifdef CPU_RM7000
- case 4:
- while (sva != eva) {
- iva = sva;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- sva += R5K_LINE;
- }
- break;
-#endif
-#if defined(CPU_R5000) || defined(CPU_R4600)
- case 2:
- iva = sva + offs;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, iva);
- cache(IndexInvalidate_I, 0, sva);
- iva += R5K_LINE;
- sva += R5K_LINE;
- }
- break;
-#endif
- }
- } else {
- /*
- * Iterate on all pending page index bits.
- */
- for (idx = 0; ci->ci_cachepending_l1i != 0; idx++) {
- if ((ci->ci_cachepending_l1i & (1ULL << idx)) == 0)
- continue;
-
- sva = PHYS_TO_XKPHYS(idx << PAGE_SHIFT, CCA_CACHED);
- eva = sva + offs;
- switch (ci->ci_l1inst.sets) {
- default:
-#ifdef CPU_RM7000
- case 4:
- while (sva != eva) {
- iva = sva;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- iva += offs;
- cache(IndexInvalidate_I, 0, iva);
- sva += R5K_LINE;
- }
- break;
-#endif
-#if defined(CPU_R5000) || defined(CPU_R4600)
- case 2:
- iva = sva + offs;
- while (sva != eva) {
- cache(IndexInvalidate_I, 0, iva);
- cache(IndexInvalidate_I, 0, sva);
- iva += R5K_LINE;
- sva += R5K_LINE;
- }
- break;
-#endif
- }
-
- ci->ci_cachepending_l1i &= ~(1ULL << idx);
- }
- }
-
-#ifdef CPU_R4600
- setsr(sr);
-#endif
-}
-
-static __inline__ void
-mips5k_hitwbinv_primary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWBInvalidate_D, 0, va);
- va += R5K_LINE;
- }
-}
-
-static __inline__ void
-mips5k_hitwbinv_secondary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWBInvalidate_S, 0, va);
- cache(HitWBInvalidate_D, 0, va); /* orphans in L1 */
- va += R5K_LINE;
- }
-}
-
-/*
- * Writeback D$ for the given page.
- */
-void
-Mips5k_SyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
-#ifdef CPU_R4600
- /*
- * Revision 1 R4600 need to perform `Index' cache operations with
- * interrupt disabled, to make sure both ways are correctly updated.
- */
- register_t sr = disableintr();
-#endif
-
- switch (ci->ci_l1data.sets) {
- default:
-#ifdef CPU_RM7000
- case 4:
- /*
- * On RM7000 and RM9000, the D$ cache set is never larger than
- * the page size, causing it to behave as a physically-indexed
- * cache. We can thus use Hit operations on the physical
- * address.
- */
- if ((ci->ci_cacheconfiguration & CTYPE_HAS_IL2) == 0) {
- mips5k_hitwbinv_primary(PHYS_TO_XKPHYS(pa, CCA_CACHED),
- PAGE_SIZE);
- } /* else
- done below */
- break;
-#endif
-#if defined(CPU_R5000) || defined(CPU_R4600)
- case 2:
- {
- vaddr_t sva, eva, iva;
- vsize_t offs;
-
- sva = PHYS_TO_XKPHYS(0, CCA_CACHED);
- offs = ci->ci_l1data.setsize;
- /* keep only the index bits */
- sva |= va & (offs - 1);
- eva = sva + PAGE_SIZE;
-
- iva = sva + offs;
- while (sva != eva) {
- cache(IndexWBInvalidate_D, 0, iva);
- cache(IndexWBInvalidate_D, 0, sva);
- iva += R5K_LINE;
- sva += R5K_LINE;
- }
- }
- break;
-#endif
- }
-
-#ifdef CPU_R4600
- setsr(sr);
-#endif
-
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2) {
- mips5k_hitwbinv_secondary(PHYS_TO_XKPHYS(pa, CCA_CACHED),
- PAGE_SIZE);
- }
-#endif
-
- mips_sync();
-}
-
-/*
- * Writeback D$ for the given page, which is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-void
-Mips5k_HitSyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- mips5k_hitwbinv_secondary(va, PAGE_SIZE);
- else {
-#ifdef CPU_R4600
- /*
- * R4600 revision 2 needs to load from an uncached address
- * before any Hit or CreateDEX operation. Alternatively, 12
- * nop (cycles) will empty the cache load buffer.
- * We are only putting 10 here, and hope the overhead of the
- * code around will provide the rest.
- */
- nop10();
-#endif
- mips5k_hitwbinv_primary(va, PAGE_SIZE);
- }
-
- mips_sync();
-}
-
-/*
- * Writeback D$ for the given range. Range is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-void
-Mips5k_HitSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
-
- /* extend the range to integral cache lines */
- va = _va & ~(R5K_LINE - 1);
- sz = ((_va + _sz + R5K_LINE - 1) & ~(R5K_LINE - 1)) - va;
-
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- mips5k_hitwbinv_secondary(va, sz);
- else {
-#ifdef CPU_R4600
- /*
- * R4600 revision 2 needs to load from an uncached address
- * before any Hit or CreateDEX operation. Alternatively, 12
- * nop (cycles) will empty the cache load buffer.
- * We are only putting 10 here, and hope the overhead of the
- * code around will provide the rest.
- */
- nop10();
-#endif
- mips5k_hitwbinv_primary(va, sz);
- }
-
- mips_sync();
-}
-
-/*
- * Invalidate D$ for the given range. Range is expected to be currently
- * mapped, allowing the use of `Hit' operations. This is less aggressive
- * than using `Index' operations.
- */
-
-static __inline__ void
-mips5k_hitinv_primary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitInvalidate_D, 0, va);
- va += R5K_LINE;
- }
-}
-
-static __inline__ void
-mips5k_hitinv_secondary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitInvalidate_S, 0, va);
- cache(HitInvalidate_D, 0, va); /* orphans in L1 */
- va += R5K_LINE;
- }
-}
-
-void
-Mips5k_HitInvalidateDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
-
- /* extend the range to integral cache lines */
- va = _va & ~(R5K_LINE - 1);
- sz = ((_va + _sz + R5K_LINE - 1) & ~(R5K_LINE - 1)) - va;
-
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- mips5k_hitinv_secondary(va, sz);
- else {
-#ifdef CPU_R4600
- /*
- * R4600 revision 2 needs to load from an uncached address
- * before any Hit or CreateDEX operation. Alternatively, 12
- * nop (cycles) will empty the cache load buffer.
- * We are only putting 10 here, and hope the overhead of the
- * code around will provide the rest.
- */
- nop10();
-#endif
- mips5k_hitinv_primary(va, sz);
- }
-
- mips_sync();
-}
-
-static __inline__ void
-mips5k_hitwb_primary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWriteback_D, 0, va);
- va += R5K_LINE;
- }
-}
-
-#if 0
-static __inline__ void
-mips5k_hitwb_secondary(vaddr_t va, vsize_t sz)
-{
- vaddr_t eva;
-
- eva = va + sz;
- while (va != eva) {
- cache(HitWriteback_S, 0, va);
- cache(HitWriteback_D, 0, va); /* orphans in L1 */
- va += R5K_LINE;
- }
-}
-#endif
-
-/*
- * Backend for bus_dmamap_sync(). Enforce coherency of the given range
- * by performing the necessary cache writeback and/or invalidate
- * operations.
- */
-void
-Mips5k_IOSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz, int how)
-{
- vaddr_t va;
- vsize_t sz;
- int partial_start, partial_end;
-
- /*
- * internal cache
- */
-
- /* extend the range to integral cache lines */
- va = _va & ~(R5K_LINE - 1);
- sz = ((_va + _sz + R5K_LINE - 1) & ~(R5K_LINE - 1)) - va;
-
-#ifdef CPU_R4600
- /*
- * R4600 revision 2 needs to load from an uncached address
- * before any Hit or CreateDEX operation. Alternatively, 12
- * nop (cycles) will empty the cache load buffer.
- * We are only putting 10 here, and hope the overhead of the
- * code around will provide the rest.
- */
- nop10();
-#endif
-
- switch (how) {
- case CACHE_SYNC_R:
- /* writeback partial cachelines */
- if (((_va | _sz) & (R5K_LINE - 1)) != 0) {
- partial_start = va != _va;
- partial_end = va + sz != _va + _sz;
- } else {
- partial_start = partial_end = 0;
- }
- if (partial_start) {
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- cache(HitWBInvalidate_S, 0, va);
-#endif
- cache(HitWBInvalidate_D, 0, va);
- va += R5K_LINE;
- sz -= R5K_LINE;
- }
- if (sz != 0 && partial_end) {
- sz -= R5K_LINE;
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- cache(HitWBInvalidate_S, 0, va + sz);
-#endif
- cache(HitWBInvalidate_D, 0, va + sz);
- }
-
- if (sz != 0) {
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- mips5k_hitinv_secondary(va, sz);
- else
-#endif
- mips5k_hitinv_primary(va, sz);
- }
- break;
-
- case CACHE_SYNC_W:
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- mips5k_hitwbinv_secondary(va, sz); /* XXX */
- else
-#endif
- mips5k_hitwb_primary(va, sz);
- break;
-
- case CACHE_SYNC_X:
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_IL2)
- mips5k_hitwbinv_secondary(va, sz);
- else
-#endif
- mips5k_hitwbinv_primary(va, sz);
- break;
- }
-
- /*
- * external cache
- */
-
- switch (how) {
- case CACHE_SYNC_W:
- break;
- case CACHE_SYNC_X:
- case CACHE_SYNC_R:
-#ifdef CPU_R5000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_XL2) {
- /* align on external page size */
- va = _va & ~(R5K_PAGE - 1);
- sz = ((_va + _sz + R5K_PAGE - 1) - va) / R5K_PAGE;
- reset_taglo();
- while (sz != 0) {
- cache(InvalidatePage_S, 0, va);
- va += R5K_PAGE;
- sz--;
- }
- } else
-#endif
-#ifdef CPU_RM7000
- if (ci->ci_cacheconfiguration & CTYPE_HAS_XL3) {
- /* align on external page size */
- va = _va & ~(R5K_PAGE - 1);
- sz = ((_va + _sz + R5K_PAGE - 1) - va) / R5K_PAGE;
- reset_taglo();
- while (sz != 0) {
- cache(InvalidatePage_T, 0, va);
- va += R5K_PAGE;
- sz--;
- }
- } else
-#endif
- {
- }
- break;
- }
-
- mips_sync();
-}
+++ /dev/null
-/* $OpenBSD: cache_tfp.c,v 1.8 2021/03/11 11:16:59 jsg Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * R8000 cache routines.
- *
- * These routines only handle the L1 cache found onboard the R8000.
- * The L2 (Streaming Cache) cache handling is apparently quite different
- * across R8000-based designs (well... the two of them: IP21 and IP26),
- * and is handled on a per-platform basis.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <mips64/cache.h>
-#include <machine/cpu.h>
-
-#include <uvm/uvm_extern.h>
-
-void tfp_dctw_zero(vaddr_t);
-void tfp_inval_icache(vsize_t);
-
-#define TFP_DCTW_STEP 16UL /* 4 words per tag */
-
-void
-tfp_ConfigCache(struct cpu_info *ci)
-{
- register_t cfg;
-
- cfg = cp0_get_config();
-
- /*
- * XXX It would make sense to trust the configuration register,
- * XXX but at least on my system it would report a 32KB I$, while
- * XXX ARCS reports the architected 16KB.
- * XXX Better not trust anything from the configuration register,
- * XXX then.
- */
-#if 0
- ci->ci_l1inst.size = (1 << 11) << ((cfg >> 9) & 0x07); /* IC */
- if (cfg & (1 << 5)) /* IB */
- ci->ci_l1inst.linesize = 32;
- else
- ci->ci_l1inst.linesize = 16;
-
- ci->ci_l1data.size = (1 << 12) << ((cfg >> 6) & 0x07); /* DC */
- if (cfg & (1 << 4)) /* DB */
- ci->ci_l1data.linesize = 32;
- else
- ci->ci_l1data.linesize = 16;
-#else
- ci->ci_l1inst.size = 16384;
- ci->ci_l1inst.linesize = TFP_DCTW_STEP; /* but handled in 32b chunks */
- ci->ci_l1data.size = 16384;
- ci->ci_l1data.linesize = TFP_DCTW_STEP;
-#endif
-
- /* R8000 L1 caches are direct */
- ci->ci_l1inst.setsize = ci->ci_l1inst.size;
- ci->ci_l1inst.sets = 1;
- ci->ci_l1data.setsize = ci->ci_l1data.size;
- ci->ci_l1data.sets = 1;
-
- cache_valias_mask =
- (max(ci->ci_l1inst.size, ci->ci_l1data.size) - 1) &
- ~PAGE_MASK;
-#ifdef DIAGNOSTIC
- if (cache_valias_mask != 0)
- panic("page size is too small");
-#endif
-
- /* R8000 L2 cache are platform-specific, and not covered here */
- memset(&ci->ci_l2, 0, sizeof(struct cache_info));
- memset(&ci->ci_l3, 0, sizeof(struct cache_info));
-
- ci->ci_SyncCache = tfp_SyncCache;
- ci->ci_InvalidateICache = tfp_InvalidateICache;
- ci->ci_InvalidateICachePage = tfp_InvalidateICachePage;
- ci->ci_SyncICache = tfp_SyncICache;
- ci->ci_SyncDCachePage = tfp_SyncDCachePage;
- ci->ci_HitSyncDCachePage = tfp_SyncDCachePage;
- ci->ci_HitSyncDCache = tfp_HitSyncDCache;
- ci->ci_HitInvalidateDCache = tfp_HitInvalidateDCache;
- ci->ci_IOSyncDCache = tfp_IOSyncDCache;
-}
-
-/*
- * Writeback and invalidate all caches.
- */
-void
-tfp_SyncCache(struct cpu_info *ci)
-{
- vaddr_t va, eva;
- register_t sr;
-
- tfp_InvalidateICache(ci, 0, ci->ci_l1inst.size);
-
- sr = disableintr();
- eva = ci->ci_l1data.size;
- for (va = 0; va < eva; va += TFP_DCTW_STEP)
- tfp_dctw_zero(va);
- setsr(sr);
-}
-
-/*
- * Invalidate I$ for the given range.
- */
-void
-tfp_InvalidateICache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
- void (*inval_subr)(vsize_t);
-
- if (ci->ci_cachepending_l1i != 0)
- return;
-
- if (_sz >= ci->ci_l1inst.size) {
- ci->ci_cachepending_l1i = 1;
- } else {
- /* extend the range to multiple of 32 bytes */
- va = _va & ~(32UL - 1);
- sz = ((_va + _sz + 32 - 1) & ~(32UL - 1)) - va;
-
- /* compute cache offset */
- va &= (ci->ci_l1inst.size - 1);
- inval_subr = (void (*)(vsize_t))
- ((vaddr_t)tfp_inval_icache + va);
- (*inval_subr)(sz);
- }
-}
-
-/*
- * Register a given page for I$ invalidation.
- */
-void
-tfp_InvalidateICachePage(struct cpu_info *ci, vaddr_t va)
-{
- /*
- * Since the page size matches the size of the instruction cache,
- * all we need to do here is remember there are postponed flushes.
- */
- ci->ci_cachepending_l1i = 1;
-}
-
-/*
- * Perform postponed I$ invalidation.
- */
-void
-tfp_SyncICache(struct cpu_info *ci)
-{
- if (ci->ci_cachepending_l1i != 0) {
- tfp_inval_icache(ci->ci_l1inst.size);
- ci->ci_cachepending_l1i = 0;
- }
-}
-
-/*
- * Writeback D$ for the given page.
- */
-void
-tfp_SyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
- /* nothing to do, D$ is write-through */
-}
-
-/*
- * Writeback D$ for the given range.
- */
-void
-tfp_HitSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- /* nothing to do, D$ is write-through */
-}
-
-/*
- * Invalidate D$ for the given range.
- */
-void
-tfp_HitInvalidateDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va, eva;
- vsize_t sz;
- register_t sr;
-
- /* extend the range to multiples of the D$ tag span */
- va = _va & ~(TFP_DCTW_STEP - 1);
- sz = ((_va + _sz + TFP_DCTW_STEP - 1) & ~(TFP_DCTW_STEP - 1)) - va;
-
- sr = disableintr();
- for (eva = va + sz; va < eva; va += TFP_DCTW_STEP)
- tfp_dctw_zero(va);
- setsr(sr);
-}
-
-/*
- * Backend for bus_dmamap_sync(). Enforce coherency of the given range
- * by performing the necessary cache writeback and/or invalidate
- * operations.
- */
-void
-tfp_IOSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz, int how)
-{
- switch (how) {
- case CACHE_SYNC_R:
- case CACHE_SYNC_X:
- tfp_HitInvalidateDCache(ci, _va, _sz);
- break;
- case CACHE_SYNC_W:
- /* nothing to do */
- break;
- }
-}
+++ /dev/null
-/* $OpenBSD: cache_tfp_subr.S,v 1.3 2015/09/23 19:04:31 miod Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <machine/param.h>
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-
-#include "assym.h"
-
- .set mips4
- .set noreorder
-
-/*
- * The R8000 processor does not have documented cache maintainance
- * instructions. While this is not really a problem for D$, which is
- * write-through and physically tagged, this is a problem for I$,
- * which is virtually tagged.
- *
- * Since there is no way to invalidate I$, the best we can do is
- * override existing cache lines to evict them from the cache.
- *
- * The following routine will attempt to do so. It spans the whole I$
- * cache size, and may be invoked from any offset multiple of 32 bytes
- * (in case a smaller portion of the cache needs to be invalidated).
- *
- * void tfp_inval_icache(register_t size)
- */
- .align 14
-LEAF(tfp_inval_icache, 0) /* { */
-
-#define ICACHE_CHUNK_INVALIDATE \
- subu a0, 32; \
- NOP; \
- NOP; \
- NOP; \
- blez a0, 9f; \
- NOP; \
- NOP; \
- NOP
-
-#define ICACHE_256B_INVALIDATE \
- ICACHE_CHUNK_INVALIDATE; ICACHE_CHUNK_INVALIDATE; \
- ICACHE_CHUNK_INVALIDATE; ICACHE_CHUNK_INVALIDATE; \
- ICACHE_CHUNK_INVALIDATE; ICACHE_CHUNK_INVALIDATE; \
- ICACHE_CHUNK_INVALIDATE; ICACHE_CHUNK_INVALIDATE;
-
-#define ICACHE_2KB_INVALIDATE \
- ICACHE_256B_INVALIDATE; ICACHE_256B_INVALIDATE; \
- ICACHE_256B_INVALIDATE; ICACHE_256B_INVALIDATE; \
- ICACHE_256B_INVALIDATE; ICACHE_256B_INVALIDATE; \
- ICACHE_256B_INVALIDATE; ICACHE_256B_INVALIDATE
-
-#define ICACHE_16KB_INVALIDATE \
- ICACHE_2KB_INVALIDATE; ICACHE_2KB_INVALIDATE; \
- ICACHE_2KB_INVALIDATE; ICACHE_2KB_INVALIDATE; \
- ICACHE_2KB_INVALIDATE; ICACHE_2KB_INVALIDATE; \
- ICACHE_2KB_INVALIDATE; ICACHE_2KB_INVALIDATE
-
- ICACHE_16KB_INVALIDATE
-
- b tfp_inval_icache /* wrap around */
- NOP
-9:
- j ra
- NOP
-END(tfp_inval_icache) /* } */
-
-/*
- * Clear the D$ cache tag for the given address.
- * Interrupts must be disabled (to be free to alter the Vaddr register).
- */
-
-#define DCTW .align 4; .word 0x4300000a; SSNOP; SSNOP; SSNOP
-
-LEAF(tfp_dctw_zero, 0) /* { */
- DMTC0 a0, COP_0_VADDR
- MTC0_HAZARD
- DMTC0 zero, COP_0_DCACHE
- MTC0_HAZARD
- DCTW
- j ra
- NOP
-END(tfp_dctw_zero) /* } */
-/* $OpenBSD: clock.c,v 1.43 2021/03/04 15:38:06 visa Exp $ */
+/* $OpenBSD: clock.c,v 1.44 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
{
struct mainbus_attach_args *maa = aux;
-#ifdef CPU_R8000
- return 0; /* shouldn't be in the kernel configuration anyway */
-#endif
return strcmp(maa->maa_name, clock_cd.cd_name) == 0;
}
-/* $OpenBSD: context.S,v 1.62 2021/04/29 12:49:19 visa Exp $ */
+/* $OpenBSD: context.S,v 1.63 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
NOP
END(cpu_idle_cycle_wait)
-LEAF(cpu_idle_cycle_rm7k, 0)
- /*
- * RM7000 errata #38: The R4600, R4640, R4700, R5000, RM52xx,
- * and RM7xxx processors do not handle bus signalling properly
- * in the standby mode, which can cause incorrect behaviour
- * upon leaving the mode. This can be avoided by flushing
- * any writes from the pipeline before the WAIT instruction
- * is executed.
- */
- mfc0 a0, COP_0_STATUS_REG # save status
- ori a1, a0, SR_INT_ENAB
- xori a1, SR_INT_ENAB
- mtc0 a1, COP_0_STATUS_REG # disable interrupts
- sync # flush pending writes
- mtc0 a1, COP_0_STATUS_REG # stall until W stage
- wait # enter standby mode
- mtc0 a0, COP_0_STATUS_REG # stall until W stage,
- # and restore status
- j ra
- NOP
-END(cpu_idle_cycle_rm7k)
-
/*
* cpu_switchto_asm(struct proc *oldproc, struct proc *newproc)
*/
REG_S ra, CF_RA_OFFS(sp)
.mask 0x80000000, (CF_RA_OFFS - FRAMESZ(CF_SZ))
-#ifdef CPU_R8000 /* XXX everywhere where MFC0_HAZARD is not empty */
- MFC0 v0, COP_0_STATUS_REG
- MFC0_HAZARD
- beqz a0, 1f
- NOP
-#else
beqz a0, 1f
MFC0 v0, COP_0_STATUS_REG
-#endif
REG_S s0, PCB_CONTEXT+0*REGSZ(t3) # do a 'savectx()'
REG_S s1, PCB_CONTEXT+1*REGSZ(t3)
PTR_ADDU t1, t1, v0
#endif
lw v0, PM_ASID(t1) # ->pm_asid[cpuid].pma_asid
-#ifdef CPU_R8000
- PTR_L t0, PCB_SEGTAB(t3) # save pcb_segtab for
- DMTC0 t0, COP_0_UBASE # Utlbmiss handler
- MTC0_HAZARD
-#endif
-
-#ifdef CPU_R4000
- /*
- * Restore the number of wired TLB entries to the minimal possible
- * value, in case the EOP errata workaround has caused more wired
- * entries to be created.
- */
- lw a0, PCB_NWIRED(t3)
- beqz a0, 1f
- sw zero, PCB_NWIRED(t3)
-
- li a1, UPAGES / 2
- move s0, v0 # save asid
- mtc0 a1, COP_0_TLB_WIRED
- jal tlb_flush # clear formerly wired entries
- addu a0, a1, a0
- move v0, s0
-1:
-#endif
#if UPAGES > 1 /* { */
-#ifdef CPU_R8000
-#error Your processor has just been eaten by a grue.
-#endif
or v0, t3
dmtc0 v0, COP_0_TLB_HI # init high entry (tlbid)
-/* $OpenBSD: cp0access.S,v 1.22 2021/04/29 12:49:19 visa Exp $ */
+/* $OpenBSD: cp0access.S,v 1.23 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
NOP
END(cp0_get_count)
-#ifndef CPU_R8000
LEAF(cp0_set_compare, 0)
MTC0 a0, COP_0_COMPARE
MTC0_HAZARD
j ra
NOP
END(cp0_set_compare)
-#endif
-
-#ifdef CPU_R8000
-LEAF(cp0_reset_cause, 0)
- DMFC0 v0, COP_0_CAUSE_REG
- MFC0_HAZARD
- or v0, a0
- xor v0, a0
- DMTC0 v0, COP_0_CAUSE_REG
- MTC0_HAZARD
- j ra
- NOP
-END(cp0_reset_cause)
-
-LEAF(cp0_set_trapbase, 0)
- DMTC0 a0, COP_0_TRAPBASE
- MTC0_HAZARD
- j ra
- NOP
-END(cp0_set_trapbase)
-#endif
LEAF(cpu_rnd_messybits, 0)
MFC0 v0, COP_0_COUNT
MFC0_HAZARD
-#ifndef CPU_R8000
MFC0 v1, COP_0_BAD_VADDR
MFC0_HAZARD
xor v0, v1
-#endif
j ra
NOP
END(cpu_rnd_messybits)
-/* $OpenBSD: cpu.c,v 1.77 2020/07/22 08:04:41 fcambus Exp $ */
+/* $OpenBSD: cpu.c,v 1.78 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se)
#endif
extern void cpu_idle_cycle_nop(void);
-extern void cpu_idle_cycle_rm7k(void);
extern void cpu_idle_cycle_wait(void);
void (*cpu_idle_cycle_func)(void) = cpu_idle_cycle_nop;
struct cpu_hwinfo *ch = caa->caa_hw;
struct cpu_info *ci;
int cpuno = dev->dv_unit;
- int isr16k = 0;
int fptype, vers_maj, vers_min;
int displayver;
vers_maj = (ch->c0prid >> 4) & 0x0f;
vers_min = ch->c0prid & 0x0f;
switch (ch->type) {
- case MIPS_R4000:
- if (vers_maj < 4)
- printf("MIPS R4000 CPU");
- else {
- vers_maj -= 3;
- printf("MIPS R4400 CPU");
- }
- fptype = MIPS_R4000;
- break;
-#if 0
- case MIPS_R4100:
- printf("NEC VR41xx CPU");
- break;
- case MIPS_R4200:
- printf("NEC VR4200 CPU (ICE)");
- break;
- case MIPS_R4300:
- printf("NEC VR4300 CPU");
- break;
-#endif
- case MIPS_R4600:
- printf("QED R4600 Orion CPU");
- break;
-#if 0
- case MIPS_R4700:
- printf("QED R4700 Orion CPU");
- break;
-#endif
- case MIPS_R5000:
- printf("MIPS R5000 CPU");
- break;
- case MIPS_RM52X0:
- printf("PMC-Sierra RM52X0 CPU");
- break;
- case MIPS_RM7000:
- if (vers_maj < 2)
- printf("PMC-Sierra RM7000 CPU");
- else
- printf("PMC-Sierra RM7000A CPU");
- break;
- case MIPS_R8000:
- printf("MIPS R8000 CPU");
- break;
- case MIPS_RM9000:
- printf("PMC-Sierra RM9000 CPU");
- break;
- case MIPS_R10000:
- printf("MIPS R10000 CPU");
- break;
- case MIPS_R12000:
- printf("MIPS R12000 CPU");
- break;
- case MIPS_R14000:
- if (vers_maj > 2) {
- vers_maj -= 2;
- isr16k = 1;
- }
- printf("R1%d000 CPU", isr16k ? 6 : 4);
- break;
case MIPS_LOONGSON2:
switch (ch->c0prid & 0xff) {
case 0x00:
#endif
displayver = 0;
break;
- case MIPS_R4000:
- printf("R4010 FPC");
- break;
-#if 0
- case MIPS_R4200:
- printf("VR4200 FPC (ICE)");
- break;
-#endif
- case MIPS_R4600:
- printf("R4600 Orion FPC");
- break;
-#if 0
- case MIPS_R4700:
- printf("R4700 Orion FPC");
- break;
-#endif
- case MIPS_R5000:
- printf("R5000 based FPC");
- break;
- case MIPS_RM52X0:
- printf("RM52X0 FPC");
- break;
- case MIPS_RM7000:
- printf("RM7000 FPC");
- break;
- case MIPS_R8000:
- printf("R8010 FPU");
- break;
- case MIPS_RM9000:
- printf("RM9000 FPC");
- break;
- case MIPS_R10000:
- printf("R10000 FPU");
- break;
- case MIPS_R12000:
- printf("R12000 FPU");
- break;
- case MIPS_R14000:
- if (isr16k) {
- if (ch->c0prid == ch->c1prid)
- vers_maj -= 2;
- printf("R16000 FPU");
- } else
- printf("R14000 FPU");
- break;
case MIPS_LOONGSON2:
switch (ch->c1prid & 0xff) {
case 0x00:
if (cpuno == 0) {
switch (ch->type) {
- case MIPS_R4600:
- case MIPS_R4700:
- case MIPS_R5000:
- case MIPS_RM52X0:
- case MIPS_RM7000:
- cpu_idle_cycle_func = cpu_idle_cycle_rm7k;
- break;
case MIPS_CN50XX:
case MIPS_CN61XX:
case MIPS_CN71XX:
-/* $OpenBSD: db_machdep.c,v 1.55 2019/11/07 14:44:53 mpi Exp $ */
+/* $OpenBSD: db_machdep.c,v 1.56 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 1998-2003 Opsycon AB (www.opsycon.se)
void
db_print_tlb(uint tlbno, uint64_t tlblo)
{
- paddr_t pa;
-#ifndef CPU_R8000
/* short description of coherency attributes */
static const char *attr[] = {
"CCA 0",
"CCA 6",
"NCACC"
};
-#endif
+ paddr_t pa;
pa = pfn_to_pad(tlblo);
-#ifdef CPU_R8000
- pa |= ptoa(tlbno % 128);
-#endif
if (tlblo & PG_V) {
db_printf("%016lx ", pa);
#ifdef CPU_MIPS64R2
db_printf("%c", tlblo & PG_XI ? 'X' : ' ');
#endif
db_printf("%c", tlblo & PG_M ? 'M' : ' ');
-#ifndef CPU_R8000
db_printf("%c", tlblo & PG_G ? 'G' : ' ');
db_printf("%s ", attr[(tlblo >> 3) & 7]);
-#endif
} else {
db_printf("invalid ");
}
asid = (tlb.tlb_hi & PG_ASID_MASK) >> PG_ASID_SHIFT;
va = tlb.tlb_hi & ~((vaddr_t)PG_ASID_MASK);
-#ifdef CPU_R8000
- if ((int64_t)va < 0)
- asid = 0; /* KV1 addresses ignore ASID */
- va |= ptoa((tlbno ^ asid) % 128);
-#endif
db_printf("%3d v=%016lx", tlbno, va);
db_printf("/%02x ", asid);
db_print_tlb(tlbno, tlb.tlb_lo0);
-#ifndef CPU_R8000
db_print_tlb(tlbno, tlb.tlb_lo1);
db_printf(" sz=%llx", tlb.tlb_mask);
-#endif
} else if (pid < 0) {
db_printf("%3d v=invalid ", tlbno);
}
-/* $OpenBSD: exception.S,v 1.42 2021/04/29 12:49:19 visa Exp $ */
+/* $OpenBSD: exception.S,v 1.43 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
PTR_VAL k_general /* T_COP_UNUSABLE */
PTR_VAL k_general /* T_OVFLOW */
PTR_VAL k_general /* T_TRAP */
-#ifdef CPU_R4000
- PTR_VAL vcei /* T_VCEI */
-#else
PTR_VAL k_general /* T_VCEI */
-#endif
PTR_VAL k_general /* T_FPE */
PTR_VAL k_general /* T_IWATCH */
PTR_VAL k_general
PTR_VAL k_general
PTR_VAL k_general
PTR_VAL k_general /* T_CACHEERR */
-#ifdef CPU_R4000
- PTR_VAL vced /* T_VCED */
-#else
PTR_VAL k_general /* T_VCED */
-#endif
u_exception_table:
PTR_VAL u_intr /* T_INT */
PTR_VAL u_general /* T_COP_UNUSABLE */
PTR_VAL u_general /* T_OVFLOW */
PTR_VAL u_general /* T_TRAP */
-#ifdef CPU_R4000
- PTR_VAL vcei /* T_VCEI */
-#else
PTR_VAL u_general /* T_VCEI */
-#endif
PTR_VAL u_general /* T_FPE */
PTR_VAL u_general /* T_IWATCH */
PTR_VAL u_general
PTR_VAL u_general
PTR_VAL u_general
PTR_VAL u_general /* T_CACHEERR */
-#ifdef CPU_R4000
- PTR_VAL vced /* T_VCED */
-#else
PTR_VAL u_general /* T_VCED */
-#endif
.set noreorder # Noreorder is default style!
* to the vector area and must thus be PIC and less than 128
* bytes long to fit. Only k0 and k1 may be used at this time.
*/
- .globl cache_err
-cache_err:
-#ifdef CPU_R4000
- nop
-#endif
.globl exception
exception:
.set noat
ERET
.set at
END(u_general)
-
-#ifdef CPU_R4000
-LEAF(vced, 0)
- .set noat
- dmfc0 k0, COP_0_BAD_VADDR
- ori k0, k0, 3 # need to align badvaddr...
- xori k0, k0, 3 # ...to a word boundary.
- cache 0x17, 0(k0) # HitWBInvalidate_S
- cache 0x11, 0(k0) # HitWBInvalidate_D
- LI k0, 0
- ERET
- .set at
-END(vced)
-
-LEAF(vcei, 0)
- .set noat
- dmfc0 k0, COP_0_BAD_VADDR
- cache 0x17, 0(k0) # HitWBInvalidate_S
- cache 0x10, 0(k0) # HitInvalidate_I
- LI k0, 0
- ERET
- .set at
-END(vcei)
-#endif
+++ /dev/null
-/* $OpenBSD: exception_tfp.S,v 1.8 2021/02/11 14:44:13 visa Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * k_general and u_general are heavily based upon their counterparts in
- * exception.S under the following licence terms:
- */
-/*
- * Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * Trap handling subpage for R8000 systems.
- */
-
-#include <machine/param.h>
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/pte.h>
-#include <machine/regnum.h>
-#include <machine/cpustate.h>
-
-#include "assym.h"
-
-#ifdef MIPS_PTE64
-#error "R8000 doesn't need 64-bit PTE"
-#endif
-
-#define TLBW .align 4; .word 0x43000002
-
- .set mips4
- .set noreorder
-
- .text
-
- .align 12
- .globl tfp_trapbase
-tfp_trapbase:
-
- /*
- * 000: tlb miss handler for U region
- */
- .align 10
-
- .ent utlb_miss, 0
-utlb_miss:
- .set noat
- .align 4
- PRE_MFC0_ADDR_HAZARD
- DMFC0 k0, COP_0_VADDR
- MFC0_HAZARD
- DMTC0 k0, COP_0_WORK0
- MTC0_HAZARD
- PTR_SRL k0, SEGSHIFT
- sltiu k1, k0, PMAP_SEGTABSIZE
- beqz k1, _inv_seg
- NOP
- DMFC0 k1, COP_0_UBASE # PCB_SEGTAB(CI_CURPROCPADDR(curcpu))
- MFC0_HAZARD
- PTR_SLL k0, LOGREGSZ
- PTR_ADDU k1, k0
- PTR_L k1, 0(k1) # get pointer to page directory
- DMFC0 k0, COP_0_WORK0 # saved COP_0_VADDR
- MFC0_HAZARD
- PTR_SRL k0, (DIRSHIFT - LOGREGSZ)
- beqz k1, _inv_seg
- andi k0, (NPDEPG - 1) << LOGREGSZ
- PTR_ADDU k1, k0
- PTR_L k1, 0(k1) # get pointer to page table
- DMFC0 k0, COP_0_WORK0 # saved COP_0_VADDR
- MFC0_HAZARD
- beqz k1, _inv_seg
- PTR_SRL k0, PAGE_SHIFT - PTE_LOG
- andi k0, (NPTEPG - 1) << PTE_LOG
- PTR_ADDU k1, k0
- PTE_LOAD k0, 0(k1) # get pte
- DMTC0 k0, COP_0_TLB_LO
- MTC0_HAZARD
- TLBW
- ERET
-
-_inv_seg:
- DMFC0 k0, COP_0_STATUS_REG
- MFC0_HAZARD
- andi k0, SR_KSU_USER
- bnez k0, u_general
- NOP
- b k_general
- NOP
-
- .set at
- .end utlb_miss
-
- /*
- * 400: tlb miss handler for KV0 region
- */
- .align 10
-
- .ent kv0tlb_miss, 0
-kv0tlb_miss:
- .set noat
- /*
- * Since we do not set up KV0 mappings, fall through directly
- * into the `invalid address' fault handling.
- */
- .align 4
- b _inv_seg
- NOP
- .set at
- .end kv0tlb_miss
-
- /*
- * 800: tlb miss handler for KV1 region
- */
- .align 10
-
- .ent kv1tlb_miss, 0
-kv1tlb_miss:
- .set noat
- .align 4
- PRE_MFC0_ADDR_HAZARD
- DMFC0 k0, COP_0_VADDR
- MFC0_HAZARD
- DMFC0 k1, COP_0_STATUS_REG
- MFC0_HAZARD
- andi k1, SR_KSU_USER
- bnez k1, u_general
- LA k1, VM_MIN_KERNEL_ADDRESS
- PTR_SUBU k0, k1
- DMFC0 k1, COP_0_WORK1 # Sysmapsize
- MFC0_HAZARD
- PTR_SRL k0, PAGE_SHIFT
- sltu k1, k0, k1
- beqz k1, k_general
- PTR_SLL k0, 2
- DMFC0 k1, COP_0_GBASE # Sysmap
- MFC0_HAZARD
- PTR_ADDU k1, k0
- PTE_LOAD k0, 0(k1) # get pte
- DMTC0 k0, COP_0_TLB_LO
- MTC0_HAZARD
- TLBW
- ERET
- .set at
- .end kv1tlb_miss
-
- /*
- * C00: tlb miss exception while servicing an exception
- * tlb invalid exception
- * tlb modified exception
- * all other exceptions
- */
- .align 10
- .ent exception, 0
-exception:
- .set noat
- .align 4
- DMFC0 k0, COP_0_STATUS_REG
- MFC0_HAZARD
- andi k0, SR_KSU_USER
- DMFC0 k1, COP_0_CAUSE_REG
- MFC0_HAZARD
- bnez k0, u_general
- and k1, CR_EXC_CODE
-
- LA k0, k_exception_table
- PTR_ADDU k0, k1
- PTR_L k1, 0(k0)
- j k1
- NOP
-
- .set at
- .end exception
-
- /*
- * Handle a TLB invalid exception from kernel mode. This implies there
- * is a TLB match, but currently not valid. Check if the pte is now
- * valid and update, or pass the mess to the regular exception handler.
- */
-k_tlb_inv:
- .set noat
- .align 4
- PRE_MFC0_ADDR_HAZARD
- DMFC0 k0, COP_0_VADDR
- MFC0_HAZARD
- LA k1, VM_MIN_KERNEL_ADDRESS
- PTR_SUBU k0, k1
- DMFC0 k1, COP_0_WORK1 # Sysmapsize
- MFC0_HAZARD
- PTR_SRL k0, PAGE_SHIFT
- sltu k1, k0, k1
- beqz k1, k_general
- PTR_SLL k0, 2
- DMFC0 k1, COP_0_GBASE # Sysmap
- MFC0_HAZARD
- PTR_ADDU k1, k0
- PTE_LOAD k0, 0(k1) # get pte
- andi k1, k0, PG_V
- beqz k1, k_general # if not valid
- NOP
-
- DMTC0 k0, COP_0_TLB_LO
- MTC0_HAZARD
- TLBW
- ERET
- .set at
-
-k_exception_table:
- PTR_VAL k_general # interrupt
- PTR_VAL k_general # TLB modification
- PTR_VAL k_tlb_inv
- PTR_VAL k_tlb_inv
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
- PTR_VAL k_general
-
- .align 5
-NNON_LEAF(u_general, FRAMESZ(CF_SZ), ra)
- .globl u_intr # for trap.c peace of mind
-u_intr:
- .set noat
- .mask 0x80000000, (CF_RA_OFFS - FRAMESZ(CF_SZ))
-
- GET_CPU_INFO(k1, k0)
- PTR_L k0, CI_CURPROCPADDR(k1)
- SAVE_CPU(k0, 0)
- SAVE_CPU_SREG(k0, 0)
- PTR_ADDU sp, k0, USPACE-FRAMESZ(CF_SZ)
- .set at
- and t0, a1, ~(SR_COP_1_BIT | SR_EXL | SR_INT_ENAB | SR_KSU_MASK)
- DMTC0 t0, COP_0_STATUS_REG
- MTC0_SR_IE_HAZARD
-
- jal trap
- PTR_S a3, CF_RA_OFFS(sp) # for debugging
-
- DMFC0 t0, COP_0_STATUS_REG # enable interrupts before checking
- ori t0, SR_INT_ENAB # for ast.
- DMTC0 t0, COP_0_STATUS_REG
- MTC0_SR_IE_HAZARD
-
-0:
- GET_CPU_INFO(t1, t0)
- PTR_L t0, CI_CURPROC(t1)
- lw v0, P_ASTPENDING(t0) # any pending AST?
- beq v0, zero, 4f
- NOP
-
- jal ast
- NOP
-
- b 0b
- NOP
-
-4:
- DMFC0 t0, COP_0_STATUS_REG # disable interrupts
- MFC0_HAZARD
- ori t0, SR_INT_ENAB
- xori t0, SR_INT_ENAB
- DMTC0 t0, COP_0_STATUS_REG
- MTC0_SR_IE_HAZARD
-
- ori t0, SR_EXL # restoring to user mode.
- DMTC0 t0, COP_0_STATUS_REG # must set exception level bit.
- MTC0_SR_IE_HAZARD
-
- # t1 is curcpu() from earlier
- move k1, t1
- PTR_L k0, CI_CURPROCPADDR(k1)
- RESTORE_REG(a3, CPL, k0, 0)
- sw a3, CI_IPL(k1)
- .set noat
- RESTORE_CPU_SREG(k0, 0)
- RESTORE_REG(a0, PC, k0, 0)
- RESTORE_CPU(k0, 0)
- RESTORE_REG(sp, SP, k0, 0)
- LI k0, 0
- LI k1, 0
- ERET
- .set at
-END(u_general)
-
- .align 5
-NNON_LEAF(k_general, FRAMESZ(KERN_EXC_FRAME_SIZE), ra)
- .globl k_intr # for trap.c peace of mind
-k_intr:
- .set noat
- .mask 0x80000000, (CF_RA_OFFS - FRAMESZ(KERN_EXC_FRAME_SIZE))
-
-#ifdef DEBUG
- GET_CPU_INFO(k1, k0)
- PTR_L k1, CI_CURPROCPADDR(k1)
- PTR_SUBU k0, sp, k1
- sltiu k0, 2048
- beqz k0, 8f
- NOP
-
- LA a0, start - FRAMESZ(CF_SZ) - 4 * REGSZ
- move a6, sp
- move sp, a0
- DMFC0 a1, COP_0_EXC_PC
- MFC0_HAZARD
- LA a0, 1f
- PRE_MFC0_ADDR_HAZARD
- DMFC0 a3, COP_0_VADDR
- MFC0_HAZARD
- DMFC0 a4, COP_0_STATUS_REG
- MFC0_HAZARD
- DMFC0 a5, COP_0_CAUSE_REG
- MFC0_HAZARD
- jal printf
- move a2, ra
-
- LA sp, start-FRAMESZ(CF_SZ)
-#ifdef DDB
- LA a1, db_printf
- LA a0, 2f
- jal trapDump
- NOP
-#endif
- PANIC("kernel stack overflow")
-
- .data
-1:
- .asciiz "\rtfptrap: PC %p RA %p ADR %p\nSR %p CR %p SP %p\n"
-2:
- .asciiz "stack oflow"
-
- .text
-8:
-#endif
-
- PTR_SUB k0, sp, FRAMESZ(KERN_EXC_FRAME_SIZE)
- SAVE_CPU(k0, CF_RA_OFFS)
-#if defined(DDB)
- SAVE_CPU_SREG(k0, CF_RA_OFFS)
-#endif
- .set at
- move sp, k0 # Already on kernel stack
- and t0, a1, ~(SR_COP_1_BIT | SR_EXL | SR_INT_ENAB | SR_KSU_MASK)
- DMTC0 t0, COP_0_STATUS_REG
- MTC0_SR_IE_HAZARD
- PTR_S a0, 0(sp)
- jal trap
- PTR_S a3, CF_RA_OFFS + KERN_REG_SIZE(sp)
-
- DMFC0 t0, COP_0_STATUS_REG # disable interrupts
- MFC0_HAZARD
- ori t0, SR_INT_ENAB
- xori t0, SR_INT_ENAB
- DMTC0 t0, COP_0_STATUS_REG
- MTC0_SR_IE_HAZARD
-
- .set noat
- RESTORE_REG(a0, PC, sp, CF_RA_OFFS)
- RESTORE_CPU(sp, CF_RA_OFFS)
- PTR_ADDU sp, sp, FRAMESZ(KERN_EXC_FRAME_SIZE)
- ERET
- .set at
-END(k_general)
-/* $OpenBSD: lcore_access.S,v 1.30 2020/10/21 15:50:00 deraadt Exp $ */
+/* $OpenBSD: lcore_access.S,v 1.31 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
GET_CPU_INFO(t1, t0)
PTR_L t3, CI_CURPROCPADDR(t1)
-#ifndef CPU_R8000
li a3, SR_BOOT_EXC_VEC
MFC0 a2, COP_0_STATUS_REG
or a4, a2, a3
xor a4, a4, a3
-#endif
li v0, KT_GUARDERR
lw v1, PCB_ONFAULT(t3)
sw v0, PCB_ONFAULT(t3)
-#ifndef CPU_R8000
MTC0 a4, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
lb v0, 0(a0)
sb v0, 0(a1)
-#ifndef CPU_R8000
MTC0 a2, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
sw v1, PCB_ONFAULT(t3)
j ra
GET_CPU_INFO(t1, t0)
PTR_L t3, CI_CURPROCPADDR(t1)
-#ifndef CPU_R8000
li a3, SR_BOOT_EXC_VEC
MFC0 a2, COP_0_STATUS_REG
or a4, a2, a3
xor a4, a4, a3
-#endif
li v0, KT_GUARDERR
lw v1, PCB_ONFAULT(t3)
sw v0, PCB_ONFAULT(t3)
-#ifndef CPU_R8000
MTC0 a4, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
lh v0, 0(a0)
sh v0, 0(a1)
-#ifndef CPU_R8000
MTC0 a2, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
sw v1, PCB_ONFAULT(t3)
j ra
GET_CPU_INFO(t1, t0)
PTR_L t3, CI_CURPROCPADDR(t1)
-#ifndef CPU_R8000
li a3, SR_BOOT_EXC_VEC
MFC0 a2, COP_0_STATUS_REG
or a4, a2, a3
xor a4, a4, a3
-#endif
li v0, KT_GUARDERR
lw v1, PCB_ONFAULT(t3)
sw v0, PCB_ONFAULT(t3)
-#ifndef CPU_R8000
MTC0 a4, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
lw v0, 0(a0)
sw v0, 0(a1)
-#ifndef CPU_R8000
MTC0 a2, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
sw v1, PCB_ONFAULT(t3)
j ra
GET_CPU_INFO(t1, t0)
PTR_L t3, CI_CURPROCPADDR(t1)
-#ifndef CPU_R8000
li a3, SR_BOOT_EXC_VEC
MFC0 a2, COP_0_STATUS_REG
or a4, a2, a3
xor a4, a4, a3
-#endif
li v0, KT_GUARDERR
lw v1, PCB_ONFAULT(t3)
sw v0, PCB_ONFAULT(t3)
-#ifndef CPU_R8000
MTC0 a4, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
sw a1, 0(a0)
-#ifndef CPU_R8000
MTC0 a2, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
sw v1, PCB_ONFAULT(t3)
j ra
END(guarded_write_4)
_guarderr:
-#ifndef CPU_R8000
MTC0 a2, COP_0_STATUS_REG
MTC0_HAZARD
-#endif
sw v1, PCB_ONFAULT(t3)
j ra
-/* $OpenBSD: mips64_machdep.c,v 1.36 2021/04/29 12:49:19 visa Exp $ */
+/* $OpenBSD: mips64_machdep.c,v 1.37 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 2009, 2010, 2012 Miodrag Vallat.
* Prototype status registers value for userland processes.
*/
register_t protosr = SR_FR_32 | SR_XX | SR_UX | SR_KSU_USER | SR_EXL |
-#ifdef CPU_R8000
- SR_SERIALIZE_FPU |
-#else
- SR_KX |
-#endif
- SR_INT_ENAB;
+ SR_KX | SR_INT_ENAB;
/*
* Set registers on exec for native exec format. For o64/64.
void
tlb_init(unsigned int tlbsize)
{
-#ifdef CPU_R8000
- register_t sr;
-
- sr = getsr();
- sr &= ~(((uint64_t)SR_PGSZ_MASK << SR_KPGSZ_SHIFT) |
- ((uint64_t)SR_PGSZ_MASK << SR_UPGSZ_SHIFT));
- sr |= ((uint64_t)SR_PGSZ_16K << SR_KPGSZ_SHIFT) |
- ((uint64_t)SR_PGSZ_16K << SR_UPGSZ_SHIFT);
- protosr |= ((uint64_t)SR_PGSZ_16K << SR_KPGSZ_SHIFT) |
- ((uint64_t)SR_PGSZ_16K << SR_UPGSZ_SHIFT);
- setsr(sr);
-#else
tlb_set_page_mask(TLB_PAGE_MASK);
-#endif
tlb_set_wired(0);
tlb_flush(tlbsize);
#if UPAGES > 1
tlb_asid_wrap(struct cpu_info *ci)
{
tlb_flush(ci->ci_hw.tlbsize);
-#if defined(CPU_OCTEON) || defined(CPU_R8000)
+#if defined(CPU_OCTEON)
Mips_InvalidateICache(ci, 0, ci->ci_l1inst.size);
#endif
}
-/* $OpenBSD: pmap.c,v 1.116 2021/03/11 11:16:59 jsg Exp $ */
+/* $OpenBSD: pmap.c,v 1.117 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
u_long asid = pmap->pm_asid[cpuid].pma_asid << PG_ASID_SHIFT;
if (pmap->pm_asid[cpuid].pma_asidgen ==
- pmap_asid_info[cpuid].pma_asidgen) {
-#ifdef CPU_R4000
- if (r4000_errata != 0)
- eop_tlb_flush_addr(pmap, va, asid);
- else
-#endif
- tlb_flush_addr(va | asid);
- }
+ pmap_asid_info[cpuid].pma_asidgen)
+ tlb_flush_addr(va | asid);
}
void
pmap_bootstrap(void)
{
u_int i;
-#ifndef CPU_R8000
pt_entry_t *spte;
-#endif
/*
* Create a mapping table for kernel virtual memory. This
Sysmapsize = (VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) /
PAGE_SIZE;
-#ifndef CPU_R8000
if (Sysmapsize & 1)
Sysmapsize++; /* force even number of pages */
-#endif
Sysmap = (pt_entry_t *)
uvm_pageboot_alloc(sizeof(pt_entry_t) * Sysmapsize);
pmap_kernel()->pm_count = 1;
-#ifndef CPU_R8000
/*
* The 64 bit Mips architecture stores the AND result
* of the Global bits in the pte pair in the on chip
*/
for (i = Sysmapsize, spte = Sysmap; i != 0; i--, spte++)
*spte = PG_G;
-#else
- bzero(Sysmap, sizeof(pt_entry_t) * Sysmapsize);
-#endif
+
tlb_set_gbase((vaddr_t)Sysmap, Sysmapsize);
for (i = 0; i < MAXCPUS; i++) {
if (vendp)
*vendp = virtual_end;
-#ifdef __sgi__
-#ifndef CPU_R8000
- /*
- * Return a CKSEG0 address whenever possible.
- */
- if (pa + size < CKSEG_SIZE)
- va = PHYS_TO_CKSEG0(pa);
- else
-#endif
- va = PHYS_TO_XKPHYS(pa, CCA_CACHED);
-#else
va = PHYS_TO_XKPHYS(pa, CCA_CACHED);
-#endif
bzero((void *)va, size);
return (va);
DPRINTF(PDB_ENTER, ("pmap_enter: new pte 0x%08x\n", npte));
}
-#ifdef CPU_R4000
- /*
- * If mapping an executable page, check for the R4000 EOP bug, and
- * flag it in the pte.
- */
- if (r4000_errata != 0) {
- if (pg != NULL && (prot & PROT_EXEC)) {
- if ((pg->pg_flags & PGF_EOP_CHECKED) == 0)
- atomic_setbits_int(&pg->pg_flags,
- PGF_EOP_CHECKED |
- eop_page_check(pa));
-
- if (pg->pg_flags & PGF_EOP_VULN)
- npte |= PG_SP;
- }
- }
-#endif
-
opte = *pte;
*pte = npte;
pmap_update_user_page(pmap, va, npte);
if (pmap == pmap_kernel()) {
if (IS_XKPHYS(va))
pa = XKPHYS_TO_PHYS(va);
-#ifndef CPU_R8000
else if (va >= (vaddr_t)CKSEG0_BASE &&
va < (vaddr_t)CKSEG0_BASE + CKSEG_SIZE)
pa = CKSEG0_TO_PHYS(va);
else if (va >= (vaddr_t)CKSEG1_BASE &&
va < (vaddr_t)CKSEG1_BASE + CKSEG_SIZE)
pa = CKSEG1_TO_PHYS(va);
-#endif
else {
#ifdef DIAGNOSTIC
if (va < VM_MIN_KERNEL_ADDRESS ||
mem_zero_page(va);
if (df || cache_valias_mask != 0)
Mips_HitSyncDCachePage(ci, va, phys);
-
-#ifdef CPU_R4000
- atomic_clearbits_int(&pg->pg_flags, PGF_EOP_CHECKED | PGF_EOP_VULN);
-#endif
}
/*
Mips_HitInvalidateDCache(ci, s, PAGE_SIZE);
if (df || cache_valias_mask != 0)
Mips_HitSyncDCachePage(ci, d, dst);
-
-#ifdef CPU_R4000
- atomic_clearbits_int(&dstpg->pg_flags, PGF_EOP_CHECKED | PGF_EOP_VULN);
- atomic_setbits_int(&dstpg->pg_flags,
- srcpg->pg_flags & (PGF_EOP_CHECKED | PGF_EOP_VULN));
-#endif
}
/*
paddr_t pa = VM_PAGE_TO_PHYS(pg);
vaddr_t va;
-#ifdef __sgi__
-#ifndef CPU_R8000
- /*
- * Return a CKSEG0 address whenever possible.
- */
- if (pa < CKSEG_SIZE)
- va = PHYS_TO_CKSEG0(pa);
- else
-#endif
- va = PHYS_TO_XKPHYS(pa, CCA_CACHED);
-#else
va = PHYS_TO_XKPHYS(pa, CCA_CACHED);
-#endif
return va;
}
paddr_t pa;
vm_page_t pg;
-#ifdef __sgi__
-#ifndef CPU_R8000
- if (va >= CKSEG0_BASE)
- pa = CKSEG0_TO_PHYS(va);
- else
-#endif
- pa = XKPHYS_TO_PHYS(va);
-#else
pa = XKPHYS_TO_PHYS(va);
-#endif
-
pg = PHYS_TO_VM_PAGE(pa);
if (cache_valias_mask)
Mips_HitSyncDCachePage(curcpu(), va, pa);
+++ /dev/null
-/* $OpenBSD: r4000_errata.c,v 1.7 2016/12/22 15:33:36 visa Exp $ */
-
-/*
- * Copyright (c) 2014 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * The following routines attempt to workaround the `end-of-page' errata
- * affecting R4000 processors rev < 3.
- *
- * This particular errata, scarcely documented as errata #4 and #14 in the
- * `R4000PC, R4000SC Errata, Processor Revision 2.2 and 3.0' document,
- * is not recoverable.
- *
- *
- * This errata is triggered by branch instructions in the last word of a
- * page, when the next page (containing the delay slot instruction) causes
- * a TLB miss. The only safe way to avoid it is to have the toolchain
- * force all branch instructions to be aligned on 8-byte boundaries, but
- * that wouldn't prevent a rogue binary (or just-in-time compilation) to
- * fail this requirement.
- *
- * The following logic is a ``best effort'' (well, ok, ``lazy man's effort'')
- * at trying to prevent the errata from triggering. It will not be enough
- * when confronted to a carefully crafted binary (but then, there are easier
- * way to get kernel mode privileges from userland, when running on the R4000
- * processors vulnerable to the end-of-page errata, so why bother?). Yet,
- * experience has shown this code is surprisingly good enough to allow for
- * regular binaries to run, with a minimal performance hit.
- *
- *
- * The idea behind this code is simple:
- * - executable pages are checked - with eop_page_check() - for a branch in
- * their last word. If they are vulnerable to this errata, page table entries
- * for these pages get the `special' bit set.
- * - tlb miss handlers will check for the `special' bit set in the pte and
- * will always defer to the C code in trap() in that case. trap() will
- * then invoke eop_tlb_miss_handler(), which will 1) force the next page
- * to be faulted in, and 2) set up wired TLB entries for both the vulnerable
- * page and the next page (and their neighbors if they do not share the same
- * TLB pair), so that there is no risk of a TLB miss when the branch
- * instruction is reached.
- * - context switches will remove these wired entries.
- * - tlb modification handlers will check for the current exception PC, and
- * will remove the wired entries if the exception PC is no longer in the
- * vulnerable page.
- *
- *
- * There are a few limitations:
- * - heavy paging may cause the page next to a vulnerable page to be swapped
- * out (this code does not attempt to wire the vm_page). It would be worth
- * mapping a page full of special break instructions when the page gets
- * swapped out.
- * - there might be other vulnerable pages in the wired tlb entries being
- * set up. It should be simple enough to walk the next pages until the last
- * would-be-wired TLB pair contains two safe pages. However, the amount of
- * TLB is quite limited, so a limit has to be set at some point.
- * - no effort has been put to catch executable pages being temporarily made
- * writable, then vulnerable (by putting a branch instruction in the last
- * word). This is unlikely to happen (except for just-in-time compilation).
- *
- *
- * Note that, by using 16KB page sizes, the number of vulnerable pages is
- * reduced.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/user.h>
-
-#include <machine/cpu.h>
-
-#include <uvm/uvm_extern.h>
-
-int r4000_errata;
-
-static inline void eop_undo(struct pcb *);
-
-static inline void
-eop_undo(struct pcb *pcb)
-{
- tlb_set_wired(UPAGES / 2);
- tlb_flush((UPAGES / 2) + pcb->pcb_nwired);
- pcb->pcb_nwired = 0;
-}
-
-/*
- * Check for an R4000 end-of-page errata condition in an executable code page.
- * Returns a bitmask to set in the given page pg_flags.
- */
-u_int
-eop_page_check(paddr_t pa)
-{
- uint32_t insn;
-
- insn = *(uint32_t *)PHYS_TO_XKPHYS(pa + PAGE_SIZE - 4, CCA_CACHED);
- if (classify_insn(insn) != INSNCLASS_NEUTRAL)
- return PGF_EOP_VULN;
-
- return 0;
-}
-
-/*
- * Invalidate a TLB entry. If it is part of a wired pair, drop all wired
- * entries.
- *
- * Note that, in case of heavy swapping, this can cause the page following
- * a vulnerable page to be swapped out and immediately faulted back in,
- * iff the userland pc is in the vulnerable page. Help me, Obi Wan LRU.
- * You are my only hope.
- */
-void
-eop_tlb_flush_addr(struct pmap *pmap, vaddr_t va, u_long asid)
-{
- struct proc *p = curproc;
- struct pcb *pcb;
-
- if (p->p_vmspace->vm_map.pmap == pmap) {
- pcb = &p->p_addr->u_pcb;
- if (pcb->pcb_nwired != 0 &&
- (va - pcb->pcb_wiredva) < ptoa(pcb->pcb_nwired * 2)) {
- eop_undo(pcb);
- return;
- }
- }
-
- tlb_flush_addr(va | asid);
-}
-
-/*
- * Handle a TLB miss exception for a page marked as able to trigger the
- * end-of-page errata.
- * Returns nonzero if the exception has been completely serviced, and no
- * further processing in the trap handler is necessary.
- */
-int
-eop_tlb_miss_handler(struct trapframe *trapframe, struct cpu_info *ci,
- struct proc *p)
-{
- struct pcb *pcb;
- vaddr_t va, faultva;
- struct vmspace *vm;
- vm_map_t map;
- pmap_t pmap;
- pt_entry_t *pte, entry;
- int onfault;
- u_long asid;
- uint i, npairs;
- int64_t tlbidx;
-
- /*
- * Check for a valid pte with the `special' bit set (PG_SP)
- * in order to apply the end-of-page errata workaround.
- */
-
- vm = p->p_vmspace;
- map = &vm->vm_map;
- faultva = trunc_page((vaddr_t)trapframe->badvaddr);
- pmap = map->pmap;
-
- pte = pmap_pte_lookup(pmap, faultva);
- if (pte == NULL)
- return 0;
- entry = *pte;
- if ((entry & PG_SP) == 0)
- return 0;
-
- pcb = &p->p_addr->u_pcb;
- asid = pmap->pm_asid[ci->ci_cpuid].pma_asid << PG_ASID_SHIFT;
-
- /*
- * For now, only allow one EOP vulnerable page to get a wired TLB
- * entry. We will aggressively attempt to recycle the wired TLB
- * entries created for that purpose, as soon as we are no longer
- * needing the EOP page resident in the TLB.
- */
-
- /*
- * Figure out how many pages to wire in the TLB.
- */
-
- if ((faultva & PG_ODDPG) != 0) {
- /* odd page: need two pairs */
- npairs = 2;
- } else {
- /* even page: only need one pair */
- npairs = 1;
- }
-
- /*
- * Fault-in the next page.
- */
-
- va = faultva + PAGE_SIZE;
- pte = pmap_pte_lookup(pmap, va);
- if (pte == NULL || (*pte & PG_V) == 0) {
- onfault = pcb->pcb_onfault;
- pcb->pcb_onfault = 0;
- KERNEL_LOCK();
- (void)uvm_fault(map, va, 0, PROT_READ | PROT_EXEC);
- KERNEL_UNLOCK();
- pcb->pcb_onfault = onfault;
- }
-
- /*
- * Clear possible TLB entries for the pages we're about to wire.
- */
-
- for (i = npairs, va = faultva & PG_HVPN; i != 0;
- i--, va += 2 * PAGE_SIZE) {
- tlbidx = tlb_probe(va | asid);
- if (tlbidx >= 0)
- tlb_update_indexed(CKSEG0_BASE, PG_NV, PG_NV, tlbidx);
- }
-
- /*
- * Reserve the extra wired TLB, and fill them with the existing ptes.
- */
-
- tlb_set_wired((UPAGES / 2) + npairs);
- for (i = 0, va = faultva & PG_HVPN; i != npairs;
- i++, va += 2 * PAGE_SIZE) {
- pte = pmap_pte_lookup(pmap, va);
- if (pte == NULL)
- tlb_update_indexed(va | asid,
- PG_NV, PG_NV, (UPAGES / 2) + i);
- else
- tlb_update_indexed(va | asid,
- pte[0], pte[1], (UPAGES / 2) + i);
- }
-
- /*
- * Save the base address of the EOP vulnerable page, to be able to
- * figure out when the wired entry is no longer necessary.
- */
-
- pcb->pcb_nwired = npairs;
- pcb->pcb_wiredva = faultva & PG_HVPN;
- pcb->pcb_wiredpc = faultva;
-
- return 1;
-}
-
-/*
- * Attempt to cleanup the current end-of-page errata workaround, if the
- * current pc is no longer in an errata vulnerable page.
- */
-void
-eop_cleanup(struct trapframe *trapframe, struct proc *p)
-{
- struct pcb *pcb;
-
- pcb = &p->p_addr->u_pcb;
- if (pcb->pcb_nwired != 0) {
- if (trunc_page(trapframe->pc) != pcb->pcb_wiredpc)
- eop_undo(pcb);
- }
-}
+++ /dev/null
-/* $OpenBSD: tlb_tfp.S,v 1.4 2015/09/23 19:13:55 miod Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <machine/param.h>
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/pte.h>
-
-#include "assym.h"
-
-#ifdef MIPS_PTE64
-#error "R8000 doesn't need 64-bit PTE"
-#endif
-
-#define TLBR .align 4; .word 0x43000001; SSNOP; SSNOP; SSNOP; SSNOP
-#define TLBW .align 4; .word 0x43000002; SSNOP; SSNOP; SSNOP
-#define TLBP .align 4; .word 0x43000008; SSNOP; SSNOP; SSNOP; SSNOP
-
-#ifdef TLB_DEBUG
-#define TLBOP(crounha) Xtlb_##crounha
-#else
-#define TLBOP(crounha) tlb_##crounha
-#endif
-
- .set mips4
- .set noreorder
-
-/*
- * void tlb_flush(int);
- * Flush all the TLB entries. Argument is ignored (128x3 layout is hardcoded).
- * Assumes there are no wired entries.
- */
-LEAF(TLBOP(flush), 0) /* { */
- DMFC0 v1, COP_0_STATUS_REG # Save the status register.
- MFC0_HAZARD
- ori v0, v1, SR_INT_ENAB
- xori v0, SR_INT_ENAB
- DMTC0 v0, COP_0_STATUS_REG # Disable interrupts
- MTC0_SR_IE_HAZARD
-
- LI v0, 01
- dsll v0, v0, 62 # KV0 base
- DMFC0 a2, COP_0_TLB_HI # Read current ASID
- MFC0_HAZARD
- LI a1, 2 # TLB set counter
-1:
- DMTC0 a1, COP_0_TLB_SET
- MTC0_HAZARD
- LI a0, 127 # TLB index counter
-2:
- DMTC0 zero, COP_0_TLB_LO
- MTC0_HAZARD
- DMTC0 v0, COP_0_TLB_HI
- MTC0_HAZARD
- DMTC0 v0, COP_0_VADDR
- MTC0_HAZARD
-
- TLBW
- beqz a0, 3f
- addu v0, PAGE_SIZE # Make sure no duplicates will exist
- b 2b
- subu a0, 1
-3:
- beqz a1, 4f
- NOP
- b 1b
- subu a1, 1
-4:
- DMTC0 a2, COP_0_TLB_HI # Restore current ASID
- MTC0_HAZARD
- MTC0_SR_IE_HAZARD
- DMTC0 v1, COP_0_STATUS_REG # Restore the status register
- MTC0_SR_IE_HAZARD
-
- j ra
- NOP
-END(TLBOP(flush)) /* } */
-
-/*
- * void tlb_flush_addr(vaddr_t);
- * Flush matching TLB entry, if any, for the given address and ASID (the
- * ASID bits are in the same position as in EntryHi).
- */
-LEAF(TLBOP(flush_addr), 0) /* { */
- DMFC0 v1, COP_0_STATUS_REG # Save the status register.
- MFC0_HAZARD
- ori v0, v1, SR_INT_ENAB
- xori v0, v0, SR_INT_ENAB
- DMTC0 v0, COP_0_STATUS_REG # Disable interrupts
- MTC0_SR_IE_HAZARD
- DMFC0 a2, COP_0_TLB_HI # Read current ASID
- MFC0_HAZARD
-
- /*
- * NOTE: I used to only write the ASID bits of TLB_HI and not bother
- * about the VPN bits (since we are about to invalidate that entry
- * anyway), with this:
- * and a1, a0, PG_ASID_MASK
- * DMTC0 a1, COP_0_TLB_HI
- *
- * It turns out that this was a VERY BAD idea. Doing this seems to
- * work, but leaves the TLB in an inconsistent state (although
- * reading the TLB entry afterwards does not report anything wrong),
- * and eventually causes TLBX exceptions - although, at the time of
- * the exception, the TLB values obtained by TLBR are consistent and
- * no duplicate is to be found.
- * -- miod
- */
- DMTC0 a0, COP_0_TLB_HI
- MTC0_HAZARD
- DMTC0 a0, COP_0_VADDR
- MTC0_HAZARD
-
- TLBP
- DMFC0 v0, COP_0_TLB_SET
- MFC0_HAZARD
-
- bltz v0, 1f # Missing
- NOP
-
- DMTC0 zero, COP_0_TLB_LO
- MTC0_HAZARD
- TLBW
-
-1:
- DMTC0 a2, COP_0_TLB_HI # restore PID
- MTC0_HAZARD
- DMTC0 v1, COP_0_STATUS_REG # Restore the status register
- MTC0_SR_IE_HAZARD
- j ra
- NOP
-END(TLBOP(flush_addr)) /* } */
-
-/*
- * void tlb_update(vaddr_t, register_t);
- * Update (or create) TLB entry for given address and ASID, and PTE.
- */
-LEAF(TLBOP(update), 0) /* { */
- DMFC0 v1, COP_0_STATUS_REG # Save the status register.
- MFC0_HAZARD
- ori v0, v1, SR_INT_ENAB
- xori v0, v0, SR_INT_ENAB
- DMTC0 v0, COP_0_STATUS_REG # Disable interrupts
- MTC0_SR_IE_HAZARD
-
- DMFC0 a2, COP_0_TLB_HI # Read current ASID
- MFC0_HAZARD
- /*
- * If setting up a kernel mapping (va < 0), merge the ASID field
- * so that we do not need to write it back.
- */
- bgez a0, 1f
- andi a2, PG_ASID_MASK
- or a0, a2
-1:
-
- DMTC0 a0, COP_0_TLB_HI
- MTC0_HAZARD
- DMTC0 a0, COP_0_VADDR
- MTC0_HAZARD
-
- TLBP
- DMFC0 v0, COP_0_TLB_SET
- MFC0_HAZARD
-
- bgez v0, 2f
-
- /*
- * Page not found: pick a random set. This algorithm is biased as it
- * will select set #0 with a 1/2 probability, and sets #1 and #2 with
- * 1/4 probability. But it's simple, fast, and still better than
- * always picking set #0.
- */
- li a3, 1 # delay slot from above
- DMFC0 v0, COP_0_COUNT
- MFC0_HAZARD
- and v0, 3
- movz a3, zero, v0 # a3 = v0 == 0 ? 0 : 1
- subu v0, a3
- DMTC0 v0, COP_0_TLB_SET
- MTC0_HAZARD
-
-2:
- DMTC0 a1, COP_0_TLB_LO
- MTC0_HAZARD
- TLBW
-
- blez a0, 3f
- NOP
- DMTC0 a2, COP_0_TLB_HI # restore ASID
- MTC0_HAZARD
-3:
- DMTC0 v1, COP_0_STATUS_REG # Restore the status register
- MTC0_SR_IE_HAZARD
-
- j ra
- NOP
-END(TLBOP(update)) /* } */
-
-/*
- * void tlb_read(int, struct tlb_entry *);
- * Read the given TLB entry. On R8000, only the tlb_hi and tlb_lo0 fields are
- * filled.
- */
-LEAF(tlb_read, 0) /* { */
- DMFC0 v1, COP_0_STATUS_REG # Save the status register.
- MFC0_HAZARD
- ori v0, v1, SR_INT_ENAB
- xori v0, v0, SR_INT_ENAB
- DMTC0 v0, COP_0_STATUS_REG # Disable interrupts
- MTC0_SR_IE_HAZARD
-
- DMFC0 a3, COP_0_TLB_HI # Get current PID
- MFC0_HAZARD
-
- DMTC0 zero, COP_0_TLB_HI # Force ASID to zero so we don't need
- MTC0_HAZARD # to hash the index
-
- dsrl a2, a0, 7
- DMTC0 a2, COP_0_TLB_SET
- MTC0_HAZARD
- dsll a0, PAGE_SHIFT
- DMTC0 a0, COP_0_VADDR
- MTC0_HAZARD
-
- TLBR
-
- DMFC0 a0, COP_0_TLB_HI
- MFC0_HAZARD
- DMFC0 a2, COP_0_TLB_LO
- MFC0_HAZARD
-
- DMTC0 a3, COP_0_TLB_HI
- MTC0_HAZARD
- DMTC0 v1, COP_0_STATUS_REG # Restore the status register
- MTC0_SR_IE_HAZARD
-
- sd a0, 8(a1) # tlb_hi
- j ra
- sd a2, 16(a1) # tlb_lo0
-END(tlb_read) /* } */
-
-/*
- * uint tlb_get_pid(void);
- * Read the current TLB ASID.
- */
-LEAF(tlb_get_pid, 0) /* { */
- DMFC0 v0, COP_0_TLB_HI # get PID
- MFC0_HAZARD
- and v0, PG_ASID_MASK
- j ra
- dsrl v0, PG_ASID_SHIFT
-END(tlb_get_pid) /* } */
-
-/*
- * void tlb_set_pid(uint);
- * Set the current TLB ASID.
- */
-LEAF(TLBOP(set_pid), 0) /* { */
- DMFC0 v1, COP_0_STATUS_REG # Save the status register.
- MFC0_HAZARD
- ori v0, v1, SR_INT_ENAB
- xori v0, v0, SR_INT_ENAB
- DMTC0 v0, COP_0_STATUS_REG # Disable interrupts
- MTC0_SR_IE_HAZARD
-
- dsll a1, a0, ICACHE_ASID_SHIFT
- dsll a0, PG_ASID_SHIFT
- DMTC0 a0, COP_0_TLB_HI
- MTC0_HAZARD
- DMTC0 a1, COP_0_ICACHE
- MTC0_HAZARD
-
- DMTC0 v1, COP_0_STATUS_REG # Restore the status register
- MTC0_SR_IE_HAZARD
-
- j ra
- NOP
-END(TLBOP(set_pid)) /* } */
-
-/*
- * void tlb_set_wired(uint32_t);
- */
-LEAF(tlb_set_wired, 0) /* { */
- DMTC0 a0, COP_0_TFP_TLB_WIRED
- MTC0_HAZARD
- j ra
- NOP
-END(tlb_set_wired) /* } */
-
-/*
- * void tlb_set_gbase(vaddr_t, vsize_t);
- */
-LEAF(tlb_set_gbase, 0) /* { */
- DMTC0 a0, COP_0_GBASE
- MTC0_HAZARD
- DMTC0 a1, COP_0_WORK1
- MTC0_HAZARD
- j ra
- NOP
-END(tlb_set_gbase) /* } */
-/* $OpenBSD: tlbhandler.S,v 1.50 2019/01/05 12:18:13 visa Exp $ */
+/* $OpenBSD: tlbhandler.S,v 1.51 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 1995-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
*/
.set noat
-#ifdef CPU_R4000
- .globl xtlb_miss_err_r4k
- .ent xtlb_miss_err_r4k, 0
-xtlb_miss_err_r4k:
- /*
- * R4000 errata #27: TLB miss exception may be invoked with BadVAddr
- * being incorrect.
- */
- tlbp
- mfc0 k1, COP_0_TLB_INDEX
- bltz k1, xtlb_miss # missing!
- nop
- ERET
- nop
- .end xtlb_miss_err_r4k
-
- .globl xtlb_miss_err_r4000SC
- .ent xtlb_miss_err_r4000SC, 0
-xtlb_miss_err_r4000SC:
- /*
- * R4000SC errata #12: In addition to errata #27 above, the tlbp
- * instruction needs to be issued in uncached space, to prevent
- * BadVAddr to be further corrupted if a VCE exception occurs
- * immediately after the TLB miss exception has been serviced.
- */
- tlbp
- mfc0 k1, COP_0_TLB_INDEX
- bltz k1, 1f # missing!
- nop
- ERET
- nop
-1:
- LA k1, xtlb_miss
- jr k1
- nop
- .end xtlb_miss_err_r4000SC
-#endif /* CPU_R4000 */
-#if defined(CPU_R5000) || defined(CPU_RM7000)
- .globl xtlb_miss_err_r5k
- .ent xtlb_miss_err_r5k, 0
-xtlb_miss_err_r5k:
- /*
- * R5000 errata: edge cases can trigger a TLB miss exception
- * instead of an invalid TLB exception. Servicing the TLB miss
- * exception would cause a duplicate TLB to be inserted, which
- * causes the processor operation to become unpredictable (but
- * very bad for the kernel's health, ten times out of nine).
- *
- * More details about the problem can be found in:
- * http://www.linux-mips.org/archives/linux-mips/2000-02/msg00040.html
- *
- * We work around the issue by checking for an existing TLB entry,
- * and handling this as an invalid TLB exception (as it was intended
- * to be), in this case.
- */
- tlbp
- mfc0 k1, COP_0_TLB_INDEX
- bltz k1, xtlb_miss # missing!
- nop
- b k_tlb_inv
- nop
- .end xtlb_miss_err_r5k
-#endif /* CPU_R5000 || CPU_RM7000 */
-
.globl xtlb_miss
.ent xtlb_miss, 0
xtlb_miss:
PTR_ADDU k1, k1, k0
PTE_LOAD k0, 0(k1)
PTE_LOAD k1, PTE_OFFS(k1)
-#ifdef CPU_R4000
- dsll k0, k0, (64 - PG_FRAMEBITS - 1) # clear bits left of PG_FRAME...
- dsll k1, k1, (64 - PG_FRAMEBITS - 1) # ...but PG_SP
- bltz k0, _inv_seg # defer to trap() if PG_SP set.
- bltz k1, _inv_seg
- dsll k0, k0, 1
- dsll k1, k1, 1
- dsrl k0, k0, (64 - PG_FRAMEBITS)
- dsrl k1, k1, (64 - PG_FRAMEBITS)
-#else
PTE_CLEAR_SWBITS(k0)
PTE_CLEAR_SWBITS(k1)
-#endif
dmtc0 k0, COP_0_TLB_LO0
dmtc0 k1, COP_0_TLB_LO1
TLB_HAZARD
nop
END(tlb_set_wired)
-#ifdef CPU_RM7000
-/*
- * Similar to tlb_set_wired() above, but returns the value of the random
- * register.
- */
-LEAF(tlb_set_wired_get_random, 0)
- mtc0 a0, COP_0_TLB_WIRED
- j ra
- mfc0 v0, COP_0_TLB_RANDOM
-END(tlb_set_wired_get_random)
-#endif
-
/*
* Initialize the TLB page mask.
*/
-/* $OpenBSD: trap.c,v 1.153 2021/03/11 11:16:59 jsg Exp $ */
+/* $OpenBSD: trap.c,v 1.154 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 1988 University of Utah.
type = (trapframe->cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT;
-#if defined(CPU_R8000) && !defined(DEBUG_INTERRUPT)
- if (type != T_INT)
-#endif
- trapdebug_enter(ci, trapframe, -1);
+ trapdebug_enter(ci, trapframe, -1);
-#ifdef CPU_R8000
- if (type != T_INT && type != T_SYSCALL)
-#else
if (type != T_SYSCALL)
-#endif
atomic_inc_int(&uvmexp.traps);
if (USERMODE(trapframe->sr))
type |= T_USER;
* enable IPI interrupts only otherwise.
*/
switch (type) {
-#ifdef CPU_R8000
- case T_INT:
- case T_INT | T_USER:
-#endif
case T_BREAK:
break;
default:
break;
}
-#ifdef CPU_R8000
- /*
- * Some exception causes on R8000 are actually detected by external
- * circuitry, and as such are reported as external interrupts.
- * On R8000 kernels, external interrupts vector to trap() instead of
- * interrupt(), so that we can process these particular exceptions
- * as if they were triggered as regular exceptions.
- */
- if ((type & ~T_USER) == T_INT) {
- if (trapframe->cause & CR_VCE) {
-#ifndef DEBUG_INTERRUPT
- trapdebug_enter(ci, trapframe, -1);
-#endif
- panic("VCE or TLBX");
- }
-
- if (trapframe->cause & CR_FPE) {
-#ifndef DEBUG_INTERRUPT
- trapdebug_enter(ci, trapframe, -1);
-#endif
- atomic_inc_int(&uvmexp.traps);
- if (type & T_USER)
- refreshcreds(p);
- itsa(trapframe, ci, p, T_FPE | (type & T_USER));
- cp0_reset_cause(CR_FPE);
- }
-
- if (trapframe->cause & CR_INT_MASK) {
- /*
- * Similar reality check as done in interrupt(), in
- * case an interrupt occurred between a write to
- * COP_0_STATUS_REG and it taking effect.
- * (I have never seen this occurring on R8000 but
- * this is cheap)
- */
- if (ISSET(trapframe->sr, SR_INT_ENAB))
- interrupt(trapframe);
- }
-
- if ((trapframe->cause & CR_FPE) && (type & T_USER))
- userret(p);
-
- return;
- }
-#endif
-
if (type & T_USER)
refreshcreds(p);
uvm_map_inentry_sp, p->p_vmspace->vm_map.sserial))
return;
-#ifdef CPU_R4000
- if (r4000_errata != 0) {
- if (eop_tlb_miss_handler(trapframe, ci, p) != 0)
- return;
- }
-#endif
-
fault_common_no_miss:
-
-#ifdef CPU_R4000
- if (r4000_errata != 0) {
- eop_cleanup(trapframe, p);
- }
-#endif
-
{
vaddr_t va;
struct vmspace *vm;
}
goto err;
-#ifdef CPU_R10000
- case T_BUS_ERR_IFETCH:
- /*
- * At least R16000 processor have been found triggering
- * reproduceable bus error on instruction fetch in the
- * kernel code, which are trivially recoverable (and
- * look like an obscure errata to me).
- *
- * Thus, ignore these exceptions if the faulting address
- * is in the kernel.
- */
- {
- extern void *kernel_text;
- extern void *etext;
- vaddr_t va;
-
- va = (vaddr_t)trapframe->pc;
- if (trapframe->cause & CR_BR_DELAY)
- va += 4;
- if (va > (vaddr_t)&kernel_text && va < (vaddr_t)&etext)
- return;
- }
- goto err;
-#endif
-
default:
err:
disableintr();
if (ptrp->cause == 0)
break;
-#ifdef CPU_R8000
- (*pr)("%s: PC %p CR 0x%016lx SR 0x%011lx\n",
- trap_type[(ptrp->cause & CR_EXC_CODE) >>
- CR_EXC_CODE_SHIFT],
- ptrp->pc, ptrp->cause, ptrp->status);
-#else
(*pr)("%s: PC %p CR 0x%08lx SR 0x%08lx\n",
trap_type[(ptrp->cause & CR_EXC_CODE) >>
CR_EXC_CODE_SHIFT],
ptrp->pc, ptrp->cause & 0xffffffff,
ptrp->status & 0xffffffff);
-#endif
(*pr)(" RA %p SP %p ADR %p\n",
ptrp->ra, ptrp->sp, ptrp->vadr);
}
stacktrace_subr(regs, 6, printf);
}
-#ifdef CPU_R8000
-#define VALID_ADDRESS(va) \
- (((va) >= VM_MIN_KERNEL_ADDRESS && (va) < VM_MAX_KERNEL_ADDRESS) || \
- IS_XKPHYS(va))
-#else
#define VALID_ADDRESS(va) \
(((va) >= VM_MIN_KERNEL_ADDRESS && (va) < VM_MAX_KERNEL_ADDRESS) || \
IS_XKPHYS(va) || ((va) >= CKSEG0_BASE && (va) < CKSEG1_BASE))
-#endif
void
stacktrace_subr(struct trapframe *regs, int count,
-/* $OpenBSD: vm_machdep.c,v 1.40 2021/04/29 12:49:19 visa Exp $ */
+/* $OpenBSD: vm_machdep.c,v 1.41 2021/05/01 16:11:11 visa Exp $ */
/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1992, 1993
/* replace p_addr with a direct translation address */
p2->p_md.md_uarea = (vaddr_t)p2->p_addr;
pmap_extract(pmap_kernel(), p2->p_md.md_uarea, &pa);
-#ifdef __sgi__
-#ifndef CPU_R8000
- /*
- * Return a CKSEG0 address whenever possible.
- */
- if (pa < CKSEG_SIZE)
- p2->p_addr = (void *)PHYS_TO_CKSEG0(pa);
- else
-#endif
- p2->p_addr = (void *)PHYS_TO_XKPHYS(pa, CCA_CACHED);
-#else
p2->p_addr = (void *)PHYS_TO_XKPHYS(pa, CCA_CACHED);
-#endif
#endif
pcb = &p2->p_addr->u_pcb;
+++ /dev/null
-# $OpenBSD: Makefile,v 1.11 2017/01/22 03:27:31 tb Exp $
-
-.include <bsd.own.mk> # for KEEPKERNELS
-
-S= ${.CURDIR}/../..
-KFILE= GENERIC-IP30
-.if exists(conf/GENERIC.MP)
-KFILE= GENERIC-IP30.MP
-.endif
-TDIRS= ${_arch} include pci gio hpc localbus xbow
-TAGS= ${.CURDIR}/tags
-
-NOPROG=
-NOMAN=
-NOOBJ=
-SUBDIR= stand
-.if !defined(KEEPKERNELS) || !(make(clean) || make(cleandir))
-SUBDIR+=compile
-.endif
-
-# config the fattest kernel we can find into a temporary dir
-# to create a Makefile. Then use make to pull some variables
-# out and push them into the sub-shell to expand the paths,
-# and finally run ctags.
-tags::
- TDIR=`mktemp -d /tmp/_tagXXXXXXXXXX` || exit 1; \
- eval "S=${S}" && \
- config -s ${S} -b $${TDIR} ${.CURDIR}/conf/${KFILE} && \
- eval "_arch=\"`make -V _arch -f $${TDIR}/Makefile`\"" && \
- eval "_mach=\"`make -V _mach -f $${TDIR}/Makefile`\"" && \
- eval "_machdir=\$S/arch/$${_mach}" && \
- eval "_archdir=\$S/arch/$${_arch}" && \
- eval "HFILES=\"`find $S \( -path $S/arch -o -path $S/stand -o -path $S/lib/libsa -o -path $S/lib/libkern/arch \) -prune -o -name '*.h'; find $${_machdir} $${_archdir} $S/lib/libkern/arch/$${_arch} \( -name boot -o -name stand \) -prune -o -name '*.h'`\"" && \
- eval "SFILES=\"`make -V SFILES -f $${TDIR}/Makefile`\"" && \
- eval "CFILES=\"`make -V CFILES -f $${TDIR}/Makefile`\"" && \
- eval "AFILES=\"`make -V AFILES -f $${TDIR}/Makefile`\"" && \
- ctags -wd -f ${TAGS} $${CFILES} $${HFILES} && \
- egrep "^[_A-Z]*ENTRY[_A-Z]*\(.*\)" $${SFILES} $${AFILES} | \
- sed "s;\\([^:]*\\):\\([^(]*\\)(\\([^, )]*\\)\\(.*\\);\\3 \\1 /^\\2(\\3\\4$$/;" \
- >> ${TAGS} && \
- sort -o ${TAGS} ${TAGS} && \
- rm -rf $${TDIR}
-
-links:
- -for i in conf ${TDIRS}; do \
- (cd $$i && rm -f tags; ln -s tags tags); done
-
-obj: _SUBDIRUSE
-
-.include <bsd.prog.mk>
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-# $OpenBSD: Makefile,v 1.2 2016/10/15 13:45:08 deraadt Exp $
-
-.if make(obj) || make(clean) || make(cleandir)
-SUBDIR!=find . -type d -maxdepth 1 \! \( -name . -o -name CVS \) | cut -b3-
-.endif
-
-.include <bsd.subdir.mk>
+++ /dev/null
-SYSDIR != cd ${.CURDIR}/../../../..; pwd
-CONFDIR != cd ${.CURDIR}/../../conf; pwd
-
-.if ${.CURDIR} == ${.OBJDIR}
-.PHONY: config
-config:
- @echo make obj required first >&2
- @false
-.else
-.PHONY: config clean
-config:
- config ${.CURDIR:M*.PROF:C/.*/-p/} -b ${.OBJDIR} \
- -s ${SYSDIR} ${CONFDIR}/${.CURDIR:T:S/.PROF$//}
-.endif
-
-cleandir clean:
-
-.include <bsd.obj.mk>
-
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-.include "../Makefile.inc"
+++ /dev/null
-# $OpenBSD: GENERIC-IP22,v 1.18 2018/02/14 23:51:49 jsg Exp $
-#
-# THIS KERNEL IS FOR INDIGO (IP20), INDY (IP22) AND INDIGO2 (IP24) SYSTEMS ONLY.
-#
-# For further information on compiling OpenBSD kernels, see the config(8)
-# man page.
-#
-# For further information on hardware support for this architecture, see
-# the intro(4) man page. For further information about kernel options
-# for this architecture, see the options(4) man page. For an explanation
-# of each device driver in this file see the section 4 man page for the
-# device.
-
-machine sgi mips64
-include "../../../conf/GENERIC"
-maxusers 32 # Estimated number of users
-
-# Make options
-makeoption LINK_ADDRESS="0xffffffff88800000"
-option KERNBASE="0xffffffff88000000"
-# Force use of 16KB pages. The R5000 Indy, which has the infamous XKPHYS
-# coherency bug wrt ll/sc instructions, can not have more than 256MB of
-# physical memory, all of it fitting within CKSEG0.
-option PAGE_SHIFT="14"
-
-option WSDISPLAY_COMPAT_RAWKBD # Provide raw scancodes; needed for X11
-
-option EISAVERBOSE
-option PCIVERBOSE
-option USER_PCICONF # User-space PCI configuration
-
-# Define what targets to support
-option TGT_INDIGO # R4x00 Indigo (IP20)
-option TGT_INDIGO2 # Indigo2, Challenge M (IP22)
-option TGT_INDY # Indy, Challenge S (IP24)
-option ARCBIOS # mandatory
-option CPU_R4000 # R4000/R4400 support (IP20/IP22/IP24)
-option CPU_R4600 # R4600 support (IP22/IP24)
-option CPU_R5000 # R5000 support (IP24)
-
-config bsd swap generic
-
-#
-# Definition of system
-#
-mainbus0 at root
-cpu* at mainbus0
-clock0 at mainbus0 # scheduling clock on Indy
-
-int0 at mainbus0 # Interrupt Controller and scheduling clock
-imc0 at mainbus0 # Memory Controller
-gio0 at imc0
-eisa0 at imc0
-
-hpc0 at gio? addr 0x1fb80000
-hpc1 at gio? addr 0x1fb00000
-hpc2 at gio? addr 0x1f980000
-
-dpclock0 at hpc0 # IP20
-dsclock0 at hpc0 # IP22/24
-sq* at hpc? # On-board Ethernet or E++ adapter
-wdsc* at hpc? # On-board SCSI or GIO32 SCSI adapter
-panel* at hpc0 # Indy front panel buttons
-pckbc* at hpc0 # Indy/Indigo2 keyboard and mouse
-
-zs0 at hpc0
-zs1 at hpc0
-zstty* at zs0 # Serial ports
-zskbd* at zs1 channel 0
-wskbd* at zskbd? mux 1
-zsms* at zs1 channel 1
-wsmouse* at zsms? mux 0
-
-pckbd* at pckbc?
-wskbd* at pckbd? mux 1
-pms* at pckbc?
-wsmouse* at pms? mux 0
-
-grtwo* at gio? # Express (GR2/GR3) graphics
-wsdisplay* at grtwo?
-impact* at gio? # Impact graphics
-wsdisplay* at impact?
-light* at gio? # Light/Starter/Entry (LG1/LG2) graphics
-wsdisplay* at light?
-newport* at gio? # Indy Newport and Indigo2 XL graphics
-wsdisplay* at newport?
-
-giopci* at gio?
-pci* at giopci?
-
-#dc* at pci? # Phobos G100/G130/G160 Fast Ethernet
-#lxtphy* at mii? # Level1 LXT970 PHYs
-#ukphy* at mii? # "unknown" PHYs
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-ch* at scsibus?
-safte* at scsibus?
-ses* at scsibus?
-uk* at scsibus?
-
-#pseudo-device hotplug 1 # devices hot plugging
-pseudo-device wsmux 2 # Mouse and keyboard multiplexor
+++ /dev/null
-# $OpenBSD: GENERIC-IP26,v 1.4 2018/02/14 23:51:49 jsg Exp $
-#
-# THIS KERNEL IS FOR POWER INDIGO2 R8000 (IP26) SYSTEMS ONLY.
-#
-# For further information on compiling OpenBSD kernels, see the config(8)
-# man page.
-#
-# For further information on hardware support for this architecture, see
-# the intro(4) man page. For further information about kernel options
-# for this architecture, see the options(4) man page. For an explanation
-# of each device driver in this file see the section 4 man page for the
-# device.
-
-machine sgi mips64
-include "../../../conf/GENERIC"
-maxusers 32 # Estimated number of users
-
-# Make options
-makeoption LINK_ADDRESS="0xa800000008010000"
-option KERNBASE="0xa800000008000000"
-
-option WSDISPLAY_COMPAT_RAWKBD # Provide raw scancodes; needed for X11
-
-option EISAVERBOSE
-option PCIVERBOSE
-option USER_PCICONF # User-space PCI configuration
-
-# Define what targets to support
-option TGT_INDIGO2 # Indigo2
-option ARCBIOS # mandatory
-option CPU_R8000 # R8000 support
-
-config bsd swap generic
-
-#
-# Definition of system
-#
-mainbus0 at root
-cpu* at mainbus0
-
-tcc0 at mainbus0 # Streaming Cache Controller
-int0 at mainbus0 # Interrupt Controller and scheduling clock
-imc0 at mainbus0 # Memory Controller
-gio0 at imc0
-eisa0 at imc0
-
-hpc0 at gio? addr 0x1fb80000
-
-dsclock0 at hpc0
-sq* at hpc? # On-board Ethernet
-wdsc* at hpc? # On-board SCSI
-panel* at hpc0 # front panel buttons
-pckbc* at hpc0 # keyboard and mouse
-
-zs0 at hpc0
-zstty* at zs0 # Serial ports
-
-pckbd* at pckbc?
-wskbd* at pckbd? mux 1
-pms* at pckbc?
-wsmouse* at pms? mux 0
-
-grtwo* at gio? # Express (GR2/GR3) graphics
-wsdisplay* at grtwo?
-#impact* at gio? # Impact graphics
-#wsdisplay* at impact?
-newport* at gio? # XL graphics
-wsdisplay* at newport?
-
-giopci* at gio?
-pci* at giopci?
-
-#dc* at pci? # Phobos G100/G130/G160 Fast Ethernet
-#lxtphy* at mii? # Level1 LXT970 PHYs
-#ukphy* at mii? # "unknown" PHYs
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-ch* at scsibus?
-safte* at scsibus?
-ses* at scsibus?
-uk* at scsibus?
-
-#pseudo-device hotplug 1 # devices hot plugging
-pseudo-device wsmux 2 # Mouse and keyboard multiplexor
+++ /dev/null
-# $OpenBSD: GENERIC-IP27,v 1.68 2021/02/04 16:25:39 anton Exp $
-#
-# THIS KERNEL IS FOR Origin, Onyx, Fuel, Tezro (IP27, IP35) SYSTEMS ONLY.
-#
-# For further information on compiling OpenBSD kernels, see the config(8)
-# man page.
-#
-# For further information on hardware support for this architecture, see
-# the intro(4) man page. For further information about kernel options
-# for this architecture, see the options(4) man page. For an explanation
-# of each device driver in this file see the section 4 man page for the
-# device.
-
-machine sgi mips64
-include "../../../conf/GENERIC"
-maxusers 32 # Estimated number of users
-
-# Make options
-makeoption LINK_ADDRESS="0xa800000000040000"
-option KERNBASE="0xa800000000000000"
-
-option PCIVERBOSE
-option USER_PCICONF # User-space PCI configuration
-option USBVERBOSE
-
-# Define what targets to support
-option TGT_ORIGIN # IP27/IP35
-option TGT_COHERENT # mandatory
-option ARCBIOS # mandatory
-option CPU_R10000 # R10000/R12000/R14000/R16000 support
-option MIPS_PTE64
-
-config bsd swap generic
-
-#
-# Definition of system
-#
-mainbus0 at root
-cpu* at mainbus0
-spdmem* at mainbus0 # SPD memory eeproms
-clock0 at mainbus0
-
-#### Main local buses
-xbow* at mainbus0
-
-# XBow devices
-xbridge* at xbow?
-xbpci* at xbridge?
-pci* at xbpci?
-impact* at xbow?
-wsdisplay* at impact?
-odyssey* at xbow?
-wsdisplay* at odyssey?
-
-# IOC3
-ioc* at pci?
-com0 at ioc? base 0x00020178
-com1 at ioc? base 0x00020170
-com* at ioc?
-dsrtc0 at ioc?
-iec* at ioc?
-iockbc* at ioc?
-
-onewire* at ioc?
-option ONEWIREVERBOSE
-owmac* at onewire?
-owserial* at onewire?
-
-# IOC4
-iof* at pci?
-com0 at iof? base 0x380
-com1 at iof? base 0x388
-com2 at iof? base 0x390
-com3 at iof? base 0x398
-com* at iof?
-dsrtc0 at iof?
-iockbc* at iof?
-
-#### SCSI
-ahc* at pci?
-qlw* at pci?
-qla* at pci?
-qle* at pci?
-mpi* at pci?
-siop* at pci?
-
-
-# CardBus bus support
-cbb* at pci?
-cardslot* at cbb?
-cardbus* at cardslot?
-pcmcia* at cardslot?
-
-# USB Controllers
-ohci* at pci? # Open Host Controller
-ohci* at cardbus?
-uhci* at pci? # Universal Host Controller
-uhci* at cardbus?
-ehci* at pci? # Enhanced Host Controller
-ehci* at cardbus?
-
-# USB bus support
-usb* at ohci?
-usb* at uhci?
-usb* at ehci?
-
-# USB devices
-uhub* at usb? # USB Hubs
-uhub* at uhub? # USB Hubs
-urng* at uhub? # USB Random Number Generator
-uonerng* at uhub? # Moonbase Otago OneRNG
-umodem* at uhub? # USB Modems/Serial
-ucom* at umodem?
-uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
-ucom* at uvscom?
-ubsa* at uhub? # Belkin serial adapter
-ucom* at ubsa?
-uaudio* at uhub? # USB Audio
-audio* at uaudio?
-ulpt* at uhub? # USB Printers
-umass* at uhub? # USB Mass Storage devices
-uhidev* at uhub? # Human Interface Devices
-ums* at uhidev? # USB mouse
-wsmouse* at ums? mux 0
-ukbd* at uhidev? # USB keyboard
-wskbd* at ukbd? mux 1
-uslhcom* at uhidev? # Silicon Labs CP2110 USB HID UART
-ucom* at uslhcom?
-uhid* at uhidev? # USB generic HID support
-fido* at uhidev? # FIDO/U2F security key support
-ujoy* at uhidev? # USB joystick/gamecontroller support
-uhidpp* at uhidev? # Logitech HID++ Devices
-atu* at uhub? # Atmel AT76c50x based 802.11b
-aue* at uhub? # ADMtek AN986 Pegasus Ethernet
-axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
-axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
-cdce* at uhub? # CDC Ethernet
-cue* at uhub? # CATC USB-EL1201A based Ethernet
-kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
-mos* at uhub? # MOSCHIP MCS7730/7830 10/100 Ethernet
-otus* at uhub? # Atheros AR9001U
-rsu* at uhub? # Realtek RTL8188SU/RTL8191SU/RTL8192SU
-rum* at uhub? # Ralink RT2501USB/RT2601USB
-run* at uhub? # Ralink RT2700U/RT2800U/RT3000U
-smsc* at uhub? # SMSC LAN95xx Ethernet
-uath* at uhub? # Atheros AR5005UG/AR5005UX
-udav* at uhub? # Davicom DM9601 based Ethernet
-upgt* at uhub? # Conexant/Intersil PrismGT SoftMAC USB
-upl* at uhub? # Prolific PL2301/PL2302 host-to-host `network'
-ugl* at uhub? # Genesys Logic GL620USB-A host-to-host `network'
-ural* at uhub? # Ralink RT2500USB
-url* at uhub? # Realtek RTL8150L based adapters
-ure* at uhub? # Realtek RTL8152 based adapters
-urtw* at uhub? # Realtek 8187
-urtwn* at uhub? # Realtek RTL8188CU/RTL8192CU
-wi* at uhub? # WaveLAN IEEE 802.11DS
-zyd* at uhub? # Zydas ZD1211
-ugen* at uhub? # USB Generic driver
-uthum* at uhidev? # TEMPerHUM sensor
-ugold* at uhidev? # gold TEMPer sensor
-utwitch* at uhidev? # YUREX BBU sensor
-
-# USB Video
-uvideo* at uhub?
-video* at uvideo?
-
-utvfu* at uhub? # Fushicai Audio-Video Grabber
-video* at utvfu?
-audio* at utvfu?
-
-udl* at uhub?
-wsdisplay* at udl?
-
-ppb* at pci? # PCI-PCI bridges
-pci* at ppb?
-
-#### NICs
-pcn* at pci? # AMD PCnet-PCI Ethernet
-epic* at pci? # SMC EPIC/100 ethernet
-de* at pci? # DC21X4X-based ethernet
-dc* at pci? # 21143, "tulip" clone ethernet
-dc* at cardbus?
-sf* at pci? # Adaptec AIC-6915 ethernet
-em* at pci? # Intel Pro/1000 ethernet
-ep* at pci? # 3Com 3c59x
-ep* at pcmcia?
-fxp* at pci? # EtherExpress 10/100B ethernet
-fxp* at cardbus?
-mtd* at pci? # Myson MTD803 3-in-1 Ethernet
-ne* at pci? # NE2000-compatible Ethernet
-ne* at pcmcia?
-ti* at pci? # Alteon ACEnic gigabit Ethernet
-stge* at pci? # Sundance TC9021 GigE
-vr* at pci? # VIA Rhine Fast Ethernet
-xl* at pci? # 3C9xx ethernet
-xl* at cardbus?
-re* at pci? # Realtek 8169/8169S/8110S
-re* at cardbus?
-rl* at pci? # Realtek 81[23]9 ethernet
-rl* at cardbus?
-hme* at pci? # Sun Happy Meal
-gem* at pci? # Sun 'gem' ethernet
-cas* at pci? # Sun Cassini 100/Gigabit
-skc* at pci? # SysKonnect GEnesis 984x
-sk* at skc? # each port of above
-mskc* at pci? # Marvell Yukon-2
-msk* at mskc? # each port of above
-bge* at pci? # Broadcom BCM570x (aka Tigon3)
-vge* at pci? # VIA VT612x
-bnx* at pci? # Broadcom BCM5706/5708 GigE
-sis* at pci? # SiS 900/7016 ethernet
-
-##### Media Independent Interface (mii) drivers
-exphy* at mii? # 3Com internal PHYs
-inphy* at mii? # Intel 82555 PHYs
-iophy* at mii? # Intel 82553 PHYs
-icsphy* at mii? # ICS 1890 PHYs
-lxtphy* at mii? # Level1 LXT970 PHYs
-nsphy* at mii? # NS and compatible PHYs
-nsphyter* at mii? # NS and compatible PHYs
-qsphy* at mii? # Quality Semi QS6612 PHYs
-sqphy* at mii? # Seeq 8x220 PHYs
-luphy* at mii? # Lucent LU6612 PHY
-rlphy* at mii? # Realtek 8139 internal PHYs
-mtdphy* at mii? # Myson MTD972 PHYs
-dcphy* at mii? # Digital Clone PHYs
-acphy* at mii? # Altima AC101 PHYs
-amphy* at mii? # AMD 79C873 PHYs
-tqphy* at mii? # TDK 78Q212x PHYs
-bmtphy* at mii? # Broadcom 10/100 PHYs
-brgphy* at mii? # Broadcom Gigabit PHYs
-ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
-eephy* at mii? # Marvell 88E1000 series PHY
-xmphy* at mii? # XaQti XMAC-II PHYs
-nsgphy* at mii? # NS gigabit PHYs
-urlphy* at mii? # Realtek RTL8150L internal PHY
-rgephy* at mii? # Realtek 8169S/8110S PHY
-ipgphy* at mii? # IC Plus IP1000A PHYs
-gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
-ukphy* at mii? # "unknown" PHYs
-
-#### Wireless
-acx* at pci? # TI ACX100/ACX111 (802.11b/g)
-acx* at cardbus?
-malo* at pci? # Marvell Libertas
-wi* at pci? # WaveLAN IEEE 802.11DS
-wi* at pcmcia?
-
-#### Audio
-cmpci* at pci? # C-Media CMI8338/8738
-eap* at pci? # Ensoniq AudioPCI S5016
-emu* at pci? # SB Live!
-envy* at pci? # VIA Envy24 (aka ICE1712)
-
-audio* at cmpci?
-audio* at eap?
-audio* at emu?
-audio* at envy?
-
-# MIDI support
-midi* at eap?
-
-#### Keyboard and Mouse
-pckbd* at iockbc?
-pms* at iockbc?
-wskbd* at pckbd? mux 1
-wsmouse* at pms? mux 0
-
-#### SCSI Bus devices
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-ch* at scsibus?
-safte* at scsibus?
-ses* at scsibus?
-uk* at scsibus?
-
-#### Crypto devices
-hifn* at pci? # Hifn7751/7811/7951
-ubsec* at pci? # Broadcom 58xx
-
-# PCI "universal" communication device
-puc* at pci?
-com* at puc?
-#lpt* at puc?
-
-com* at pcmcia?
-com* at cardbus?
-
-pseudo-device hotplug 1 # devices hot plugging
-pseudo-device wsmux 2 # Mouse and keyboard multiplexor
+++ /dev/null
-# $OpenBSD: GENERIC-IP27.MP,v 1.1 2015/12/27 16:31:08 deraadt Exp $
-
-include "arch/sgi/conf/GENERIC-IP27"
-
-option MULTIPROCESSOR
-#option MP_LOCKDEBUG
+++ /dev/null
-# $OpenBSD: GENERIC-IP28,v 1.6 2018/02/14 23:51:49 jsg Exp $
-#
-# THIS KERNEL IS FOR POWER INDIGO2 R10000 (IP28) SYSTEMS ONLY.
-#
-# For further information on compiling OpenBSD kernels, see the config(8)
-# man page.
-#
-# For further information on hardware support for this architecture, see
-# the intro(4) man page. For further information about kernel options
-# for this architecture, see the options(4) man page. For an explanation
-# of each device driver in this file see the section 4 man page for the
-# device.
-
-machine sgi mips64
-include "../../../conf/GENERIC"
-maxusers 32 # Estimated number of users
-
-# Make options
-makeoption LINK_ADDRESS="0xa800000020020000"
-option KERNBASE="0xa800000020000000"
-
-option WSDISPLAY_COMPAT_RAWKBD # Provide raw scancodes; needed for X11
-
-option EISAVERBOSE
-option PCIVERBOSE
-option USER_PCICONF # User-space PCI configuration
-
-# Define what targets to support
-option TGT_INDIGO2 # Indigo2
-option ARCBIOS # mandatory
-option CPU_R10000 # R10000 support
-
-config bsd swap generic
-
-#
-# Definition of system
-#
-mainbus0 at root
-cpu* at mainbus0
-
-int0 at mainbus0 # Interrupt Controller and scheduling clock
-imc0 at mainbus0 # Memory Controller
-gio0 at imc0
-eisa0 at imc0
-
-hpc0 at gio? addr 0x1fb80000
-
-dsclock0 at hpc0
-sq* at hpc? # On-board Ethernet
-wdsc* at hpc? # On-board SCSI
-panel* at hpc0 # front panel buttons
-pckbc* at hpc0 # keyboard and mouse
-
-zs0 at hpc0
-zstty* at zs0 # Serial ports
-
-pckbd* at pckbc?
-wskbd* at pckbd? mux 1
-pms* at pckbc?
-wsmouse* at pms? mux 0
-
-grtwo* at gio? # Express (GR2/GR3) graphics
-wsdisplay* at grtwo?
-impact* at gio? # Impact graphics
-wsdisplay* at impact?
-newport* at gio? # XL graphics
-wsdisplay* at newport?
-
-giopci* at gio?
-pci* at giopci?
-
-#dc* at pci? # Phobos G100/G130/G160 Fast Ethernet
-#lxtphy* at mii? # Level1 LXT970 PHYs
-#ukphy* at mii? # "unknown" PHYs
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-ch* at scsibus?
-safte* at scsibus?
-ses* at scsibus?
-uk* at scsibus?
-
-#pseudo-device hotplug 1 # devices hot plugging
-pseudo-device wsmux 2 # Mouse and keyboard multiplexor
+++ /dev/null
-# $OpenBSD: GENERIC-IP30,v 1.61 2021/02/04 16:25:39 anton Exp $
-#
-# THIS KERNEL IS FOR Octane and Octane 2 (IP30) SYSTEMS ONLY.
-#
-# For further information on compiling OpenBSD kernels, see the config(8)
-# man page.
-#
-# For further information on hardware support for this architecture, see
-# the intro(4) man page. For further information about kernel options
-# for this architecture, see the options(4) man page. For an explanation
-# of each device driver in this file see the section 4 man page for the
-# device.
-
-machine sgi mips64
-include "../../../conf/GENERIC"
-maxusers 32 # Estimated number of users
-
-# Make options
-makeoption LINK_ADDRESS="0xa800000020020000"
-option KERNBASE="0xa800000020000000"
-
-option PCIVERBOSE
-option USER_PCICONF # User-space PCI configuration
-option USBVERBOSE
-
-# Define what targets to support
-option TGT_OCTANE # Octane, Octane 2
-option TGT_COHERENT # mandatory
-option ARCBIOS # mandatory
-option CPU_R10000 # R10000/R12000/R14000/R16000 support
-
-config bsd swap generic
-
-#
-# Definition of system
-#
-mainbus0 at root
-cpu* at mainbus0
-clock0 at mainbus0
-power0 at mainbus0
-
-#### Main local buses
-xbow0 at mainbus0
-
-# XBow devices
-xheart* at xbow?
-onewire* at xheart?
-xbridge* at xbow?
-xbpci* at xbridge?
-pci* at xbpci?
-impact* at xbow?
-wsdisplay* at impact?
-odyssey* at xbow?
-wsdisplay* at odyssey?
-
-# IOC3
-ioc* at pci?
-com0 at ioc? base 0x00020178
-com1 at ioc? base 0x00020170
-com* at ioc?
-dsrtc0 at ioc?
-iec* at ioc?
-iockbc* at ioc?
-
-onewire* at ioc?
-option ONEWIREVERBOSE
-owmac* at onewire?
-owserial* at onewire?
-
-#### SCSI
-ahc* at pci?
-qlw* at pci?
-qla* at pci?
-qle* at pci?
-mpi* at pci?
-siop* at pci?
-
-
-# CardBus bus support
-cbb* at pci?
-cardslot* at cbb?
-cardbus* at cardslot?
-pcmcia* at cardslot?
-
-# USB Controllers
-ohci* at pci? # Open Host Controller
-ohci* at cardbus?
-uhci* at pci? # Universal Host Controller
-uhci* at cardbus?
-ehci* at pci? # Enhanced Host Controller
-ehci* at cardbus?
-
-# USB bus support
-usb* at ohci?
-usb* at uhci?
-usb* at ehci?
-
-# USB devices
-uhub* at usb? # USB Hubs
-uhub* at uhub? # USB Hubs
-urng* at uhub? # USB Random Number Generator
-uonerng* at uhub? # Moonbase Otago OneRNG
-umodem* at uhub? # USB Modems/Serial
-ucom* at umodem?
-uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
-ucom* at uvscom?
-ubsa* at uhub? # Belkin serial adapter
-ucom* at ubsa?
-uaudio* at uhub? # USB Audio
-audio* at uaudio?
-ulpt* at uhub? # USB Printers
-umass* at uhub? # USB Mass Storage devices
-uhidev* at uhub? # Human Interface Devices
-ums* at uhidev? # USB mouse
-wsmouse* at ums? mux 0
-ukbd* at uhidev? # USB keyboard
-wskbd* at ukbd? mux 1
-uslhcom* at uhidev? # Silicon Labs CP2110 USB HID UART
-ucom* at uslhcom?
-uhid* at uhidev? # USB generic HID support
-fido* at uhidev? # FIDO/U2F security key support
-ujoy* at uhidev? # USB joystick/gamecontroller support
-uhidpp* at uhidev? # Logitech HID++ Devices
-atu* at uhub? # Atmel AT76c50x based 802.11b
-aue* at uhub? # ADMtek AN986 Pegasus Ethernet
-axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
-axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
-cdce* at uhub? # CDC Ethernet
-cue* at uhub? # CATC USB-EL1201A based Ethernet
-kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
-mos* at uhub? # MOSCHIP MCS7730/7830 10/100 Ethernet
-otus* at uhub? # Atheros AR9001U
-rsu* at uhub? # Realtek RTL8188SU/RTL8191SU/RTL8192SU
-rum* at uhub? # Ralink RT2501USB/RT2601USB
-run* at uhub? # Ralink RT2700U/RT2800U/RT3000U
-smsc* at uhub? # SMSC LAN95xx Ethernet
-uath* at uhub? # Atheros AR5005UG/AR5005UX
-udav* at uhub? # Davicom DM9601 based Ethernet
-upgt* at uhub? # Conexant/Intersil PrismGT SoftMAC USB
-upl* at uhub? # Prolific PL2301/PL2302 host-to-host `network'
-ugl* at uhub? # Genesys Logic GL620USB-A host-to-host `network'
-ural* at uhub? # Ralink RT2500USB
-url* at uhub? # Realtek RTL8150L based adapters
-ure* at uhub? # Realtek RTL8152 based adapters
-urtw* at uhub? # Realtek 8187
-urtwn* at uhub? # Realtek RTL8188CU/RTL8192CU
-wi* at uhub? # WaveLAN IEEE 802.11DS
-zyd* at uhub? # Zydas ZD1211
-ugen* at uhub? # USB Generic driver
-uthum* at uhidev? # TEMPerHUM sensor
-ugold* at uhidev? # gold TEMPer sensor
-utwitch* at uhidev? # YUREX BBU sensor
-
-# USB Video
-uvideo* at uhub?
-video* at uvideo?
-
-utvfu* at uhub? # Fushicai Audio-Video Grabber
-video* at utvfu?
-audio* at utvfu?
-
-udl* at uhub?
-wsdisplay* at udl?
-
-ppb* at pci? # PCI-PCI bridges
-pci* at ppb?
-
-#### NICs
-pcn* at pci? # AMD PCnet-PCI Ethernet
-epic* at pci? # SMC EPIC/100 ethernet
-de* at pci? # DC21X4X-based ethernet
-dc* at pci? # 21143, "tulip" clone ethernet
-dc* at cardbus?
-sf* at pci? # Adaptec AIC-6915 ethernet
-em* at pci? # Intel Pro/1000 ethernet
-ep* at pci? # 3Com 3c59x
-ep* at pcmcia?
-fxp* at pci? # EtherExpress 10/100B ethernet
-fxp* at cardbus?
-mtd* at pci? # Myson MTD803 3-in-1 Ethernet
-ne* at pci? # NE2000-compatible Ethernet
-ne* at pcmcia?
-ti* at pci? # Alteon ACEnic gigabit Ethernet
-stge* at pci? # Sundance TC9021 GigE
-vr* at pci? # VIA Rhine Fast Ethernet
-xl* at pci? # 3C9xx ethernet
-xl* at cardbus?
-re* at pci? # Realtek 8169/8169S/8110S
-re* at cardbus?
-rl* at pci? # Realtek 81[23]9 ethernet
-rl* at cardbus?
-hme* at pci? # Sun Happy Meal
-gem* at pci? # Sun 'gem' ethernet
-cas* at pci? # Sun Cassini 100/Gigabit
-skc* at pci? # SysKonnect GEnesis 984x
-sk* at skc? # each port of above
-mskc* at pci? # Marvell Yukon-2
-msk* at mskc? # each port of above
-bge* at pci? # Broadcom BCM570x (aka Tigon3)
-vge* at pci? # VIA VT612x
-bnx* at pci? # Broadcom BCM5706/5708 GigE
-sis* at pci? # SiS 900/7016 ethernet
-
-##### Media Independent Interface (mii) drivers
-exphy* at mii? # 3Com internal PHYs
-inphy* at mii? # Intel 82555 PHYs
-iophy* at mii? # Intel 82553 PHYs
-icsphy* at mii? # ICS 1890 PHYs
-lxtphy* at mii? # Level1 LXT970 PHYs
-nsphy* at mii? # NS and compatible PHYs
-nsphyter* at mii? # NS and compatible PHYs
-qsphy* at mii? # Quality Semi QS6612 PHYs
-sqphy* at mii? # Seeq 8x220 PHYs
-luphy* at mii? # Lucent LU6612 PHY
-rlphy* at mii? # Realtek 8139 internal PHYs
-mtdphy* at mii? # Myson MTD972 PHYs
-dcphy* at mii? # Digital Clone PHYs
-acphy* at mii? # Altima AC101 PHYs
-amphy* at mii? # AMD 79C873 PHYs
-tqphy* at mii? # TDK 78Q212x PHYs
-bmtphy* at mii? # Broadcom 10/100 PHYs
-brgphy* at mii? # Broadcom Gigabit PHYs
-ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
-eephy* at mii? # Marvell 88E1000 series PHY
-xmphy* at mii? # XaQti XMAC-II PHYs
-nsgphy* at mii? # NS gigabit PHYs
-urlphy* at mii? # Realtek RTL8150L internal PHY
-rgephy* at mii? # Realtek 8169S/8110S PHY
-ipgphy* at mii? # IC Plus IP1000A PHYs
-gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
-ukphy* at mii? # "unknown" PHYs
-
-#### Wireless
-acx* at pci? # TI ACX100/ACX111 (802.11b/g)
-acx* at cardbus?
-malo* at pci? # Marvell Libertas
-wi* at pci? # WaveLAN IEEE 802.11DS
-wi* at pcmcia?
-
-#### Audio
-cmpci* at pci? # C-Media CMI8338/8738
-eap* at pci? # Ensoniq AudioPCI S5016
-emu* at pci? # SB Live!
-envy* at pci? # VIA Envy24 (aka ICE1712)
-
-audio* at cmpci?
-audio* at eap?
-audio* at emu?
-audio* at envy?
-
-# MIDI support
-midi* at eap?
-
-#### Keyboard and Mouse
-pckbd* at iockbc?
-pms* at iockbc?
-wskbd* at pckbd? mux 1
-wsmouse* at pms? mux 0
-
-#### SCSI Bus devices
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-ch* at scsibus?
-safte* at scsibus?
-ses* at scsibus?
-uk* at scsibus?
-
-#### Crypto devices
-hifn* at pci? # Hifn7751/7811/7951
-ubsec* at pci? # Broadcom 58xx
-
-# PCI "universal" communication device
-puc* at pci?
-com* at puc?
-#lpt* at puc?
-
-com* at pcmcia?
-com* at cardbus?
-
-pseudo-device hotplug 1 # devices hot plugging
-pseudo-device wsmux 2 # Mouse and keyboard multiplexor
+++ /dev/null
-# $OpenBSD: GENERIC-IP30.MP,v 1.1 2010/01/18 17:05:52 miod Exp $
-
-include "arch/sgi/conf/GENERIC-IP30"
-
-option MULTIPROCESSOR
-#option MP_LOCKDEBUG
-
-cpu* at mainbus?
+++ /dev/null
-# $OpenBSD: GENERIC-IP32,v 1.52 2021/02/04 16:25:39 anton Exp $
-#
-# THIS KERNEL IS FOR O2 (IP32) SYSTEMS ONLY.
-#
-# For further information on compiling OpenBSD kernels, see the config(8)
-# man page.
-#
-# For further information on hardware support for this architecture, see
-# the intro(4) man page. For further information about kernel options
-# for this architecture, see the options(4) man page. For an explanation
-# of each device driver in this file see the section 4 man page for the
-# device.
-
-machine sgi mips64
-include "../../../conf/GENERIC"
-maxusers 32 # Estimated number of users
-
-# Make options
-makeoption LINK_ADDRESS="0xffffffff80100000"
-option KERNBASE="0xffffffff80000000"
-
-option WSDISPLAY_COMPAT_RAWKBD # Provide raw scancodes; needed for X11
-
-option PCIVERBOSE
-option USER_PCICONF # User-space PCI configuration
-
-# Define what targets to support
-option TGT_O2 # O2, O2+
-option ARCBIOS # mandatory
-option CPU_R5000 # R5000/RM5200 support
-option CPU_RM7000 # RM7000 support
-option CPU_R10000 # R10000/R12000/R14000/R16000 support
-
-config bsd swap generic
-
-#
-# Definition of system
-#
-mainbus0 at root
-cpu* at mainbus0
-clock0 at mainbus0
-
-#### Main local buses
-macebus0 at mainbus0 # MACE controller localbus.
-
-# GBE Framebuffer
-gbe0 at mainbus0
-
-# Localbus devices
-mec0 at macebus0
-mavb0 at macebus0
-mkbc0 at macebus0
-com0 at macebus0 base 0x00390000
-com1 at macebus0 base 0x00398000
-dsrtc0 at macebus0
-power0 at macebus0
-
-#### PCI Bus
-macepcibr0 at macebus0 # MACE controller PCI Bus bridge.
-pci* at macepcibr?
-
-#### SCSI
-ahc* at pci?
-qlw* at pci?
-qla* at pci?
-qle* at pci?
-mpi* at pci?
-siop* at pci?
-
-
-# CardBus bus support
-cbb* at pci?
-cardslot* at cbb?
-cardbus* at cardslot?
-pcmcia* at cardslot?
-
-# USB Controllers
-ohci* at pci? # Open Host Controller
-ohci* at cardbus?
-uhci* at pci? # Universal Host Controller
-uhci* at cardbus?
-ehci* at pci? # Enhanced Host Controller
-ehci* at cardbus?
-
-# USB bus support
-usb* at ohci?
-usb* at uhci?
-usb* at ehci?
-
-# USB devices
-uhub* at usb? # USB Hubs
-uhub* at uhub? # USB Hubs
-urng* at uhub? # USB Random Number Generator
-uonerng* at uhub? # Moonbase Otago OneRNG
-umodem* at uhub? # USB Modems/Serial
-ucom* at umodem?
-uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
-ucom* at uvscom?
-ubsa* at uhub? # Belkin serial adapter
-ucom* at ubsa?
-uaudio* at uhub? # USB Audio
-audio* at uaudio?
-ulpt* at uhub? # USB Printers
-umass* at uhub? # USB Mass Storage devices
-uhidev* at uhub? # Human Interface Devices
-ums* at uhidev? # USB mouse
-wsmouse* at ums? mux 0
-ukbd* at uhidev? # USB keyboard
-wskbd* at ukbd? mux 1
-uslhcom* at uhidev? # Silicon Labs CP2110 USB HID UART
-ucom* at uslhcom?
-uhid* at uhidev? # USB generic HID support
-fido* at uhidev? # FIDO/U2F security key support
-ujoy* at uhidev? # USB joystick/gamecontroller support
-uhidpp* at uhidev? # Logitech HID++ Devices
-atu* at uhub? # Atmel AT76c50x based 802.11b
-aue* at uhub? # ADMtek AN986 Pegasus Ethernet
-axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
-axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
-cdce* at uhub? # CDC Ethernet
-cue* at uhub? # CATC USB-EL1201A based Ethernet
-kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
-mos* at uhub? # MOSCHIP MCS7730/7830 10/100 Ethernet
-otus* at uhub? # Atheros AR9001U
-rsu* at uhub? # Realtek RTL8188SU/RTL8191SU/RTL8192SU
-rum* at uhub? # Ralink RT2501USB/RT2601USB
-run* at uhub? # Ralink RT2700U/RT2800U/RT3000U
-smsc* at uhub? # SMSC LAN95xx Ethernet
-uath* at uhub? # Atheros AR5005UG/AR5005UX
-udav* at uhub? # Davicom DM9601 based Ethernet
-upgt* at uhub? # Conexant/Intersil PrismGT SoftMAC USB
-upl* at uhub? # Prolific PL2301/PL2302 host-to-host `network'
-ugl* at uhub? # Genesys Logic GL620USB-A host-to-host `network'
-ural* at uhub? # Ralink RT2500USB
-url* at uhub? # Realtek RTL8150L based adapters
-ure* at uhub? # Realtek RTL8152 based adapters
-urtw* at uhub? # Realtek 8187
-urtwn* at uhub? # Realtek RTL8188CU/RTL8192CU
-wi* at uhub? # WaveLAN IEEE 802.11DS
-zyd* at uhub? # Zydas ZD1211
-ugen* at uhub? # USB Generic driver
-uthum* at uhidev? # TEMPerHUM sensor
-ugold* at uhidev? # gold TEMPer sensor
-utwitch* at uhidev? # YUREX BBU sensor
-
-# USB Video
-uvideo* at uhub?
-video* at uvideo?
-
-utvfu* at uhub? # Fushicai Audio-Video Grabber
-video* at utvfu?
-audio* at utvfu?
-
-udl* at uhub?
-wsdisplay* at udl?
-
-ppb* at pci? # PCI-PCI bridges
-pci* at ppb?
-
-#### NICs
-pcn* at pci? # AMD PCnet-PCI Ethernet
-epic* at pci? # SMC EPIC/100 ethernet
-de* at pci? # DC21X4X-based ethernet
-dc* at pci? # 21143, "tulip" clone ethernet
-dc* at cardbus?
-sf* at pci? # Adaptec AIC-6915 ethernet
-em* at pci? # Intel Pro/1000 ethernet
-ep* at pci? # 3Com 3c59x
-ep* at pcmcia?
-fxp* at pci? # EtherExpress 10/100B ethernet
-fxp* at cardbus?
-mtd* at pci? # Myson MTD803 3-in-1 Ethernet
-ne* at pci? # NE2000-compatible Ethernet
-ne* at pcmcia?
-ti* at pci? # Alteon ACEnic gigabit Ethernet
-stge* at pci? # Sundance TC9021 GigE
-vr* at pci? # VIA Rhine Fast Ethernet
-xl* at pci? # 3C9xx ethernet
-xl* at cardbus?
-re* at pci? # Realtek 8169/8169S/8110S
-re* at cardbus?
-rl* at pci? # Realtek 81[23]9 ethernet
-rl* at cardbus?
-hme* at pci? # Sun Happy Meal
-gem* at pci? # Sun 'gem' ethernet
-cas* at pci? # Sun Cassini 100/Gigabit
-skc* at pci? # SysKonnect GEnesis 984x
-sk* at skc? # each port of above
-mskc* at pci? # Marvell Yukon-2
-msk* at mskc? # each port of above
-bge* at pci? # Broadcom BCM570x (aka Tigon3)
-vge* at pci? # VIA VT612x
-bnx* at pci? # Broadcom BCM5706/5708 GigE
-sis* at pci? # SiS 900/7016 ethernet
-
-##### Media Independent Interface (mii) drivers
-exphy* at mii? # 3Com internal PHYs
-inphy* at mii? # Intel 82555 PHYs
-iophy* at mii? # Intel 82553 PHYs
-icsphy* at mii? # ICS 1890 PHYs
-lxtphy* at mii? # Level1 LXT970 PHYs
-nsphy* at mii? # NS and compatible PHYs
-nsphyter* at mii? # NS and compatible PHYs
-qsphy* at mii? # Quality Semi QS6612 PHYs
-sqphy* at mii? # Seeq 8x220 PHYs
-luphy* at mii? # Lucent LU6612 PHY
-rlphy* at mii? # Realtek 8139 internal PHYs
-mtdphy* at mii? # Myson MTD972 PHYs
-dcphy* at mii? # Digital Clone PHYs
-acphy* at mii? # Altima AC101 PHYs
-amphy* at mii? # AMD 79C873 PHYs
-tqphy* at mii? # TDK 78Q212x PHYs
-bmtphy* at mii? # Broadcom 10/100 PHYs
-brgphy* at mii? # Broadcom Gigabit PHYs
-ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
-eephy* at mii? # Marvell 88E1000 series PHY
-xmphy* at mii? # XaQti XMAC-II PHYs
-nsgphy* at mii? # NS gigabit PHYs
-urlphy* at mii? # Realtek RTL8150L internal PHY
-rgephy* at mii? # Realtek 8169S/8110S PHY
-ipgphy* at mii? # IC Plus IP1000A PHYs
-gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
-ukphy* at mii? # "unknown" PHYs
-
-#### Wireless
-acx* at pci? # TI ACX100/ACX111 (802.11b/g)
-acx* at cardbus?
-malo* at pci?
-wi* at pci? # WaveLAN IEEE 802.11DS
-wi* at pcmcia?
-
-#### Audio
-cmpci* at pci? # C-Media CMI8338/8738
-eap* at pci? # Ensoniq AudioPCI S5016
-emu* at pci? # SB Live!
-envy* at pci? # VIA Envy24 (aka ICE1712)
-
-audio* at cmpci?
-audio* at eap?
-audio* at emu?
-audio* at envy?
-audio* at mavb?
-
-# MIDI support
-midi* at eap?
-
-#### WS Console
-wsdisplay* at gbe?
-
-#### Keyboard and Mouse
-pckbd* at mkbc?
-pms* at mkbc?
-wskbd* at pckbd? mux 1
-wsmouse* at pms? mux 0
-
-#### SCSI Bus devices
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-ch* at scsibus?
-safte* at scsibus?
-ses* at scsibus?
-uk* at scsibus?
-
-#### Crypto devices
-hifn* at pci? # Hifn7751/7811/7951
-ubsec* at pci? # Broadcom 58xx
-
-# PCI "universal" communication device
-puc* at pci?
-com* at puc?
-#lpt* at puc?
-
-com* at pcmcia?
-com* at cardbus?
-
-pseudo-device hotplug 1 # devices hot plugging
-pseudo-device wsmux 2 # Mouse and keyboard multiplexor
+++ /dev/null
-# $OpenBSD: Makefile.sgi,v 1.101 2021/01/28 17:39:03 deraadt Exp $
-
-# For instructions on building kernels consult the config(8) and options(4)
-# manual pages.
-#
-# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
-# IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
-# DEBUG is set to -g by config if debugging is requested (config -g).
-# PROF is set to -pg by config if profiling is requested (config -p).
-
-.include <bsd.own.mk>
-
-SIZE?= size
-STRIP?= ctfstrip
-AS?= as
-CC?= cc
-LD?= ld ${ENDIAN}
-
-AS+=${ENDIAN}
-CC+=${ENDIAN}
-LD+=${ENDIAN}
-
-# source tree is located via $S relative to the compilation directory
-.ifndef S
-S!= cd ../../../..; pwd
-.endif
-
-_machdir?= $S/arch/${_mach}
-_archdir?= $S/arch/${_arch}
-
-INCLUDES= -nostdinc -I$S -I${.OBJDIR} -I$S/arch
-CPPFLAGS= ${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -D__${_mach}__ -MD -MP
-CWARNFLAGS= -Werror -Wall -Wimplicit-function-declaration \
- -Wno-uninitialized -Wno-pointer-sign \
- -Wframe-larger-than=2047
-
-CMACHFLAGS= -mno-abicalls ${ABI} -msoft-float -G 0
-CMACHFLAGS+= -ffreestanding ${NOPIE_FLAGS}
-SORTR= sort -R
-.if ${IDENT:M-DNO_PROPOLICE}
-CMACHFLAGS+= -fno-stack-protector
-.endif
-.if ${IDENT:M-DSMALL_KERNEL}
-SORTR= cat
-COPTIMIZE?= -Oz
-.endif
-
-DEBUG?= -g
-COPTIMIZE?= -O2
-CFLAGS= ${DEBUG} ${CWARNFLAGS} ${CMACHFLAGS} ${COPTIMIZE} ${COPTS} ${PIPE}
-AFLAGS= -D_LOCORE -x assembler-with-cpp ${CWARNFLAGS} ${CMACHFLAGS}
-LINKFLAGS= -e start -T ld.script -Ttext=${LINK_ADDRESS} --warn-common -nopie
-
-HOSTCC?= ${CC}
-HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//}
-HOSTED_CFLAGS= ${CFLAGS}
-HOSTED_C= ${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $<
-
-NORMAL_C_NOP= ${CC} ${CFLAGS} ${CPPFLAGS} -c $<
-NORMAL_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
-NORMAL_S= ${CC} ${AFLAGS} ${CPPFLAGS} ${PROF} -c $<
-
-%OBJS
-
-%CFILES
-
-%SFILES
-
-# load lines for config "xxx" will be emitted as:
-# xxx: ${SYSTEM_DEP} swapxxx.o
-# ${SYSTEM_LD_HEAD}
-# ${SYSTEM_LD} swapxxx.o
-# ${SYSTEM_LD_TAIL}
-SYSTEM_HEAD= locore0.o gap.o
-SYSTEM_OBJ= ${SYSTEM_HEAD} ${OBJS} param.o ioconf.o
-SYSTEM_DEP= Makefile ${SYSTEM_OBJ} ld.script
-SYSTEM_LD_HEAD= @rm -f $@
-SYSTEM_LD= @echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_HEAD} vers.o $${OBJS}'; \
- umask 007; \
- echo ${OBJS} param.o ioconf.o vers.o | tr " " "\n" | ${SORTR} > lorder; \
- ${LD} ${LINKFLAGS} -o $@ ${SYSTEM_HEAD} `cat lorder`
-SYSTEM_LD_TAIL= @${SIZE} $@
-
-.if ${DEBUG} == "-g"
-STRIPFLAGS= -S
-SYSTEM_LD_TAIL+=; umask 007; \
- echo mv $@ $@.gdb; rm -f $@.gdb; mv $@ $@.gdb; \
- echo ${STRIP} ${STRIPFLAGS} -o $@ $@.gdb; \
- ${STRIP} ${STRIPFLAGS} -o $@ $@.gdb
-.else
-LINKFLAGS+= -S
-.endif
-
-%LOAD
-
-# cc's -MD puts the source and output paths in the dependency file;
-# since those are temp files here we need to fix it up. It also
-# puts the file in /tmp, so we use -MF to put it in the current
-# directory as assym.P and then generate assym.d from it with a
-# good target name
-assym.h: $S/kern/genassym.sh Makefile \
- ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf
- cat ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf | \
- sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} -MF assym.P > assym.h.tmp
- sed '1s/.*/assym.h: \\/' assym.P > assym.d
- sort -u assym.h.tmp > assym.h
-
-param.c: $S/conf/param.c
- rm -f param.c
- cp $S/conf/param.c .
-
-param.o: param.c Makefile
- ${NORMAL_C}
-
-mcount.o: $S/lib/libkern/mcount.c Makefile
- ${NORMAL_C_NOP}
-
-ioconf.o: ioconf.c
- ${NORMAL_C}
-
-ld.script: ${_machdir}/conf/ld.script
- cp ${_machdir}/conf/ld.script $@
-
-gapdummy.o:
- echo '__asm(".section .rodata,\"a\"");' > gapdummy.c
- ${CC} -c ${CFLAGS} ${CPPFLAGS} gapdummy.c -o $@
-
-makegap.sh:
- cp $S/conf/makegap.sh $@
-
-MAKE_GAP = LD="${LD}" sh makegap.sh 0xefefefef gapdummy.o
-
-gap.o: Makefile makegap.sh gapdummy.o vers.o
- ${MAKE_GAP}
-
-vers.o: ${SYSTEM_DEP:Ngap.o}
- sh $S/conf/newvers.sh
- ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c
-
-clean:
- rm -f *bsd *bsd.gdb *.[dio] [a-z]*.s assym.* \
- gap.link gapdummy.c ld.script lorder makegap.sh param.c
-
-cleandir: clean
- rm -f Makefile *.h ioconf.c options machine ${_mach} vers.c
-
-depend obj:
-
-locore0.o: ${_machdir}/${_mach}/locore0.S assym.h
-context.o cp0access.o exception.o exception_tfp.o: assym.h
-lcore_access.o lcore_ddb.o lcore_float.o locore.o: assym.h
-tlb_tfp.o tlbhandler.o: assym.h
-cache_tfp_subr.o ip30_nmi.o: assym.h
-
-hardlink-obsd:
- [[ ! -f /bsd ]] || cmp -s bsd /bsd || ln -f /bsd /obsd
-
-newinstall:
- install -m 700 -F bsd /bsd && sha256 -h /var/db/kernel.SHA256 /bsd
-
-install: update-link hardlink-obsd newinstall
-
-# pull in the dependency information
-.ifnmake clean
-. for o in ${SYSTEM_OBJ:Ngap.o} assym.h
-. if exists(${o:R}.d)
-. include "${o:R}.d"
-. elif exists($o)
- .PHONY: $o
-. endif
-. endfor
-.endif
-
-%RULES
+++ /dev/null
-# $OpenBSD: RAMDISK-IP22,v 1.17 2020/04/06 02:10:33 visa Exp $
-#
-# THIS KERNEL IS FOR INDIGO (IP20), INDY (IP22) AND INDIGO2 (IP24) SYSTEMS ONLY.
-
-machine sgi mips64
-maxusers 4
-
-option SMALL_KERNEL
-option NO_PROPOLICE
-option BOOT_CONFIG
-
-option MINIROOTSIZE=10240
-option RAMDISK_HOOKS
-
-option EISAVERBOSE
-option PCIVERBOSE
-
-option FFS
-option FFS2
-option CD9660
-option NFSCLIENT
-option INET6
-
-makeoption LINK_ADDRESS="0xffffffff88800000"
-option KERNBASE="0xffffffff88000000"
-# Force use of 16KB pages. The R5000 Indy, which has the infamous XKPHYS
-# coherency bug wrt ll/sc instructions, can not have more than 256MB of
-# physical memory, all of it fitting within CKSEG0.
-option PAGE_SHIFT="14"
-option TGT_INDIGO # R4x00 Indigo (IP20)
-option TGT_INDIGO2 # Indigo2, Challenge M (IP22)
-option TGT_INDY # Indy, Challenge S (IP24)
-option ARCBIOS # mandatory
-option CPU_R4000 # R4000/R4400 support (IP20/IP22/IP24)
-option CPU_R4600 # R4600 support (IP22/IP24)
-option CPU_R5000 # R5000 support (IP24)
-
-config bsd root on rd0a swap on rd0b
-
-mainbus0 at root
-cpu* at mainbus0
-clock0 at mainbus0 # scheduling clock on Indy
-
-int0 at mainbus0 # Interrupt Controller and scheduling clock
-imc0 at mainbus0 # Memory Controller
-gio0 at imc0
-eisa0 at imc0
-
-hpc0 at gio? addr 0x1fb80000
-hpc1 at gio? addr 0x1fb00000
-hpc2 at gio? addr 0x1f980000
-
-dpclock0 at hpc0 # IP20
-dsclock0 at hpc0 # IP22/24
-sq* at hpc? # On-board Ethernet or E++ adapter
-wdsc* at hpc? # On-board SCSI or GIO32 SCSI adapter
-pckbc* at hpc0 # Indy/Indigo2 keyboard and mouse
-
-zs0 at hpc0
-zs1 at hpc0
-zstty* at zs0 # Serial ports
-zskbd* at zs1 channel 0
-wskbd* at zskbd? mux 1
-
-pckbd* at pckbc?
-wskbd* at pckbd? mux 1
-
-grtwo* at gio? # Express (GR2/GR3) graphics
-wsdisplay* at grtwo?
-impact* at gio? # Impact graphics
-wsdisplay* at impact?
-light* at gio? # Light/Starter/Entry (LG1/LG2) graphics
-wsdisplay* at light?
-newport* at gio? # Indy Newport and Indigo2 XL graphics
-wsdisplay* at newport?
-
-giopci* at gio?
-pci* at giopci?
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-
-pseudo-device loop 1
-pseudo-device bpfilter 1
-pseudo-device rd 1
-pseudo-device bio 1
+++ /dev/null
-# $OpenBSD: RAMDISK-IP26,v 1.6 2020/04/06 02:10:33 visa Exp $
-#
-# THIS KERNEL IS FOR POWER INDIGO2 R8000 (IP26) SYSTEMS ONLY.
-
-machine sgi mips64
-maxusers 4
-
-option SMALL_KERNEL
-option NO_PROPOLICE
-option BOOT_CONFIG
-
-option MINIROOTSIZE=10240
-option RAMDISK_HOOKS
-
-option EISAVERBOSE
-option PCIVERBOSE
-
-option FFS
-option FFS2
-option CD9660
-option NFSCLIENT
-option INET6
-
-makeoption LINK_ADDRESS="0xa800000008010000"
-option KERNBASE="0xa800000008000000"
-option TGT_INDIGO2 # Indigo2
-option ARCBIOS # mandatory
-option CPU_R8000 # R8000 support
-
-config bsd root on rd0a swap on rd0b
-
-mainbus0 at root
-cpu* at mainbus0
-
-tcc0 at mainbus0 # Streaming Cache Controller
-int0 at mainbus0 # Interrupt Controller and scheduling clock
-imc0 at mainbus0 # Memory Controller
-gio0 at imc0
-eisa0 at imc0
-
-hpc0 at gio? addr 0x1fb80000
-
-dsclock0 at hpc0
-sq* at hpc? # On-board Ethernet
-wdsc* at hpc? # On-board SCSI
-pckbc* at hpc0 # keyboard and mouse
-
-zs0 at hpc0
-zstty* at zs0 # Serial ports
-
-pckbd* at pckbc?
-wskbd* at pckbd? mux 1
-
-grtwo* at gio? # Express (GR2/GR3) graphics
-wsdisplay* at grtwo?
-newport* at gio? # XL graphics
-wsdisplay* at newport?
-
-giopci* at gio?
-pci* at giopci?
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-
-pseudo-device loop 1
-pseudo-device bpfilter 1
-pseudo-device rd 1
-pseudo-device bio 1
+++ /dev/null
-# $OpenBSD: RAMDISK-IP27,v 1.41 2020/04/06 02:10:33 visa Exp $
-#
-# THIS KERNEL IS FOR Origin, Onyx, Fuel, Tezro (IP27, IP35) SYSTEMS ONLY.
-
-machine sgi mips64
-maxusers 4
-
-option SMALL_KERNEL
-option NO_PROPOLICE
-option BOOT_CONFIG
-
-option MINIROOTSIZE=10240
-option RAMDISK_HOOKS
-
-option PCIVERBOSE
-option USBVERBOSE
-option ONEWIREVERBOSE
-
-option FFS
-option FFS2
-option CD9660
-option NFSCLIENT
-option INET6
-
-makeoption LINK_ADDRESS="0xa800000000040000"
-option KERNBASE="0xa800000000000000"
-option TGT_ORIGIN # IP27/IP35
-option TGT_COHERENT
-option ARCBIOS
-option CPU_R10000 # R10000/R12000/R14000/R16000 support
-option MIPS_PTE64
-
-config bsd root on rd0a swap on rd0b
-
-mainbus0 at root
-cpu* at mainbus0
-clock0 at mainbus0
-
-xbow* at mainbus0
-xbridge* at xbow?
-xbpci* at xbridge?
-pci* at xbpci?
-impact* at xbow?
-wsdisplay* at impact?
-odyssey* at xbow?
-wsdisplay* at odyssey?
-
-ioc* at pci?
-com0 at ioc? base 0x00020178
-com1 at ioc? base 0x00020170
-dsrtc0 at ioc?
-iec* at ioc?
-iockbc* at ioc?
-
-onewire* at ioc?
-owmac* at onewire?
-owserial* at onewire?
-
-iof* at pci?
-com0 at iof? base 0x380
-com1 at iof? base 0x388
-com2 at iof? base 0x390
-com3 at iof? base 0x398
-com* at iof?
-dsrtc0 at iof?
-iockbc* at iof?
-
-ahc* at pci?
-qlw* at pci?
-qla* at pci?
-qle* at pci?
-mpi* at pci?
-siop* at pci?
-
-ohci* at pci?
-uhci* at pci?
-ehci* at pci?
-usb* at ohci?
-usb* at uhci?
-usb* at ehci?
-
-uhub* at usb?
-uhub* at uhub?
-umodem* at uhub? # USB Modems/Serial
-ucom* at umodem?
-uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
-ucom* at uvscom?
-ubsa* at uhub? # Belkin serial adapter
-ucom* at ubsa?
-umass* at uhub?
-uhidev* at uhub? # Human Interface Devices
-ukbd* at uhidev? # USB keyboard
-wskbd* at ukbd? mux 1
-uhid* at uhidev? # USB generic HID support
-atu* at uhub? # Atmel AT76c50x based 802.11b
-aue* at uhub? # ADMtek AN986 Pegasus Ethernet
-axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
-axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
-cdce* at uhub? # CDC Ethernet
-cue* at uhub? # CATC USB-EL1201A based Ethernet
-kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
-mos* at uhub? # MOSCHIP MCS7730/7830 10/100 Ethernet
-otus* at uhub? # Atheros AR9001U
-rum* at uhub? # Ralink RT2501USB/RT2601USB
-run* at uhub? # Ralink RT2700U/RT2800U/RT3000U
-smsc* at uhub? # SMSC LAN95xx Ethernet
-uath* at uhub? # Atheros AR5005UG/AR5005UX
-udav* at uhub? # Davicom DM9601 based Ethernet
-upgt* at uhub? # Conexant/Intersil PrismGT SoftMAC USB
-upl* at uhub? # Prolific PL2301/PL2302 host-to-host
-ugl* at uhub? # Genesys Logic GL620USB-A host-to-host
-ural* at uhub? # Ralink RT2500USB
-url* at uhub? # Realtek RTL8150L based adapters
-ure* at uhub? # Realtek RTL8152 based adapters
-urtw* at uhub? # Realtek 8187
-wi* at uhub? # WaveLAN IEEE 802.11DS
-zyd* at uhub? # Zydas ZD1211
-ugen* at uhub? # USB Generic driver
-
-ppb* at pci? # PCI-PCI bridges
-pci* at ppb?
-
-pcn* at pci? # AMD PCnet-PCI Ethernet
-epic* at pci? # SMC EPIC/100 ethernet
-de* at pci? # DC21X4X-based ethernet
-dc* at pci? # 21143, "tulip" clone ethernet
-sf* at pci? # Adaptec AIC-6915 ethernet
-em* at pci? # Intel Pro/1000 ethernet
-ep* at pci? # 3Com 3c59x
-fxp* at pci? # EtherExpress 10/100B ethernet
-mtd* at pci? # Myson MTD803 3-in-1 Ethernet
-ne* at pci? # NE2000-compatible Ethernet
-ti* at pci? # Alteon ACEnic gigabit Ethernet
-stge* at pci? # Sundance TC9021 GigE
-vr* at pci? # VIA Rhine Fast Ethernet
-xl* at pci? # 3C9xx ethernet
-re* at pci? # Realtek 8169/8169S/8110S
-rl* at pci? # Realtek 81[23]9 ethernet
-hme* at pci? # Sun Happy Meal
-gem* at pci? # Sun 'gem' ethernet
-cas* at pci? # Sun Cassini 100/Gigabit
-skc* at pci? # SysKonnect GEnesis 984x
-sk* at skc? # each port of above
-mskc* at pci? # Marvell Yukon-2
-msk* at mskc? # each port of above
-bge* at pci? # Broadcom BCM570x (aka Tigon3)
-vge* at pci? # VIA VT612x
-bnx* at pci? # Broadcom BCM5706/5708 GigE
-sis* at pci? # SiS 900/7016 ethernet
-
-exphy* at mii? # 3Com internal PHYs
-inphy* at mii? # Intel 82555 PHYs
-iophy* at mii? # Intel 82553 PHYs
-icsphy* at mii? # ICS 1890 PHYs
-lxtphy* at mii? # Level1 LXT970 PHYs
-nsphy* at mii? # NS and compatible PHYs
-nsphyter* at mii? # NS and compatible PHYs
-qsphy* at mii? # Quality Semi QS6612 PHYs
-sqphy* at mii? # Seeq 8x220 PHYs
-luphy* at mii? # Lucent LU6612 PHY
-rlphy* at mii? # Realtek 8139 internal PHYs
-mtdphy* at mii? # Myson MTD972 PHYs
-dcphy* at mii? # Digital Clone PHYs
-acphy* at mii? # Altima AC101 PHYs
-amphy* at mii? # AMD 79C873 PHYs
-tqphy* at mii? # TDK 78Q212x PHYs
-bmtphy* at mii? # Broadcom 10/100 PHYs
-brgphy* at mii? # Broadcom Gigabit PHYs
-ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
-eephy* at mii? # Marvell 88E1000 series PHY
-xmphy* at mii? # XaQti XMAC-II PHYs
-nsgphy* at mii? # NS gigabit PHYs
-urlphy* at mii? # Realtek RTL8150L internal PHY
-rgephy* at mii? # Realtek 8169S/8110S PHY
-ipgphy* at mii? # IC Plus IP1000A PHYs
-gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
-ukphy* at mii? # "unknown" PHYs
-
-pckbd* at iockbc?
-wskbd* at pckbd? mux 1
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-
-pseudo-device loop 1
-pseudo-device bpfilter 1
-pseudo-device rd 1
-pseudo-device bio 1
+++ /dev/null
-# $OpenBSD: RAMDISK-IP28,v 1.8 2020/04/06 02:10:33 visa Exp $
-#
-# THIS KERNEL IS FOR POWER INDIGO2 R10000 (IP28) SYSTEMS ONLY.
-
-machine sgi mips64
-maxusers 4
-
-option SMALL_KERNEL
-option NO_PROPOLICE
-option BOOT_CONFIG
-
-option MINIROOTSIZE=10240
-option RAMDISK_HOOKS
-
-option PCIVERBOSE
-option EISAVERBOSE
-
-option FFS
-option FFS2
-option CD9660
-option NFSCLIENT
-option INET6
-
-makeoption LINK_ADDRESS="0xa800000020020000"
-option KERNBASE="0xa800000020000000"
-option TGT_INDIGO2 # Indigo2
-option ARCBIOS # mandatory
-option CPU_R10000 # R10000 support
-
-config bsd root on rd0a swap on rd0b
-
-mainbus0 at root
-cpu* at mainbus0
-
-int0 at mainbus0 # Interrupt Controller and scheduling clock
-imc0 at mainbus0 # Memory Controller
-gio0 at imc0
-eisa0 at imc0
-
-hpc0 at gio? addr 0x1fb80000
-
-dsclock0 at hpc0
-sq* at hpc? # On-board Ethernet
-wdsc* at hpc? # On-board SCSI
-pckbc* at hpc0 # keyboard and mouse
-
-zs0 at hpc0
-zstty* at zs0 # Serial ports
-
-pckbd* at pckbc?
-wskbd* at pckbd? mux 1
-
-grtwo* at gio? # Express (GR2/GR3) graphics
-wsdisplay* at grtwo?
-impact* at gio? # Impact graphics
-wsdisplay* at impact?
-newport* at gio? # XL graphics
-wsdisplay* at newport?
-
-giopci* at gio?
-pci* at giopci?
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-
-pseudo-device loop 1
-pseudo-device bpfilter 1
-pseudo-device rd 1
-pseudo-device bio 1
+++ /dev/null
-# $OpenBSD: RAMDISK-IP30,v 1.36 2020/04/06 02:10:33 visa Exp $
-#
-# THIS KERNEL IS FOR Octane and Octane 2 (IP30) SYSTEMS ONLY.
-
-machine sgi mips64
-maxusers 4
-
-option SMALL_KERNEL
-option NO_PROPOLICE
-option BOOT_CONFIG
-
-option MINIROOTSIZE=10240
-option RAMDISK_HOOKS
-
-option PCIVERBOSE
-option USBVERBOSE
-option ONEWIREVERBOSE
-
-option FFS
-option FFS2
-option CD9660
-option NFSCLIENT
-option INET6
-
-makeoption LINK_ADDRESS="0xa800000020020000"
-option KERNBASE="0xa800000020000000"
-
-option TGT_OCTANE # Octane, Octane 2
-option TGT_COHERENT
-option ARCBIOS
-option CPU_R10000 # R10000/R12000/R14000/R16000 support
-
-config bsd root on rd0a swap on rd0b
-
-mainbus0 at root
-cpu* at mainbus0
-clock0 at mainbus0
-xbow0 at mainbus0
-xheart* at xbow?
-onewire* at xheart?
-xbridge* at xbow?
-xbpci* at xbridge?
-pci* at xbpci?
-impact* at xbow?
-wsdisplay* at impact?
-odyssey* at xbow?
-wsdisplay* at odyssey?
-
-ioc* at pci?
-com0 at ioc? base 0x00020178
-com1 at ioc? base 0x00020170
-com* at ioc?
-dsrtc0 at ioc?
-iec* at ioc?
-iockbc* at ioc?
-
-onewire* at ioc?
-owmac* at onewire?
-owserial* at onewire?
-
-ahc* at pci?
-qlw* at pci?
-qla* at pci?
-qle* at pci?
-mpi* at pci?
-siop* at pci?
-
-ohci* at pci?
-uhci* at pci?
-ehci* at pci?
-usb* at ohci?
-usb* at uhci?
-usb* at ehci?
-
-uhub* at usb?
-uhub* at uhub?
-umodem* at uhub? # USB Modems/Serial
-ucom* at umodem?
-uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
-ucom* at uvscom?
-ubsa* at uhub? # Belkin serial adapter
-ucom* at ubsa?
-umass* at uhub?
-uhidev* at uhub? # Human Interface Devices
-ukbd* at uhidev? # USB keyboard
-wskbd* at ukbd? mux 1
-uhid* at uhidev? # USB generic HID support
-atu* at uhub? # Atmel AT76c50x based 802.11b
-aue* at uhub? # ADMtek AN986 Pegasus Ethernet
-axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
-axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
-cdce* at uhub? # CDC Ethernet
-cue* at uhub? # CATC USB-EL1201A based Ethernet
-kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
-mos* at uhub? # MOSCHIP MCS7730/7830 10/100 Ethernet
-otus* at uhub? # Atheros AR9001U
-rum* at uhub? # Ralink RT2501USB/RT2601USB
-run* at uhub? # Ralink RT2700U/RT2800U/RT3000U
-smsc* at uhub? # SMSC LAN95xx Ethernet
-uath* at uhub? # Atheros AR5005UG/AR5005UX
-udav* at uhub? # Davicom DM9601 based Ethernet
-upgt* at uhub? # Conexant/Intersil PrismGT SoftMAC USB
-upl* at uhub? # Prolific PL2301/PL2302 host-to-host
-ugl* at uhub? # Genesys Logic GL620USB-A host-to-host
-ural* at uhub? # Ralink RT2500USB
-url* at uhub? # Realtek RTL8150L based adapters
-ure* at uhub? # Realtek RTL8152 based adapters
-urtw* at uhub? # Realtek 8187
-wi* at uhub? # WaveLAN IEEE 802.11DS
-zyd* at uhub? # Zydas ZD1211
-ugen* at uhub? # USB Generic driver
-
-ppb* at pci? # PCI-PCI bridges
-pci* at ppb?
-
-pcn* at pci? # AMD PCnet-PCI Ethernet
-epic* at pci? # SMC EPIC/100 ethernet
-de* at pci? # DC21X4X-based ethernet
-dc* at pci? # 21143, "tulip" clone ethernet
-sf* at pci? # Adaptec AIC-6915 ethernet
-em* at pci? # Intel Pro/1000 ethernet
-ep* at pci? # 3Com 3c59x
-fxp* at pci? # EtherExpress 10/100B ethernet
-mtd* at pci? # Myson MTD803 3-in-1 Ethernet
-ne* at pci? # NE2000-compatible Ethernet
-ti* at pci? # Alteon ACEnic gigabit Ethernet
-stge* at pci? # Sundance TC9021 GigE
-vr* at pci? # VIA Rhine Fast Ethernet
-xl* at pci? # 3C9xx ethernet
-re* at pci? # Realtek 8169/8169S/8110S
-rl* at pci? # Realtek 81[23]9 ethernet
-hme* at pci? # Sun Happy Meal
-gem* at pci? # Sun 'gem' ethernet
-cas* at pci? # Sun Cassini 100/Gigabit
-skc* at pci? # SysKonnect GEnesis 984x
-sk* at skc? # each port of above
-mskc* at pci? # Marvell Yukon-2
-msk* at mskc? # each port of above
-bge* at pci? # Broadcom BCM570x (aka Tigon3)
-vge* at pci? # VIA VT612x
-bnx* at pci? # Broadcom BCM5706/5708 GigE
-sis* at pci? # SiS 900/7016 ethernet
-
-exphy* at mii? # 3Com internal PHYs
-inphy* at mii? # Intel 82555 PHYs
-iophy* at mii? # Intel 82553 PHYs
-icsphy* at mii? # ICS 1890 PHYs
-lxtphy* at mii? # Level1 LXT970 PHYs
-nsphy* at mii? # NS and compatible PHYs
-nsphyter* at mii? # NS and compatible PHYs
-qsphy* at mii? # Quality Semi QS6612 PHYs
-sqphy* at mii? # Seeq 8x220 PHYs
-luphy* at mii? # Lucent LU6612 PHY
-rlphy* at mii? # Realtek 8139 internal PHYs
-mtdphy* at mii? # Myson MTD972 PHYs
-dcphy* at mii? # Digital Clone PHYs
-acphy* at mii? # Altima AC101 PHYs
-amphy* at mii? # AMD 79C873 PHYs
-tqphy* at mii? # TDK 78Q212x PHYs
-bmtphy* at mii? # Broadcom 10/100 PHYs
-brgphy* at mii? # Broadcom Gigabit PHYs
-ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
-eephy* at mii? # Marvell 88E1000 series PHY
-xmphy* at mii? # XaQti XMAC-II PHYs
-nsgphy* at mii? # NS gigabit PHYs
-urlphy* at mii? # Realtek RTL8150L internal PHY
-rgephy* at mii? # Realtek 8169S/8110S PHY
-ipgphy* at mii? # IC Plus IP1000A PHYs
-gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
-ukphy* at mii? # "unknown" PHYs
-
-pckbd* at iockbc?
-wskbd* at pckbd? mux 1
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-
-pseudo-device loop 1
-pseudo-device bpfilter 1
-pseudo-device rd 1
-pseudo-device bio 1
+++ /dev/null
-# $OpenBSD: RAMDISK-IP32,v 1.31 2019/09/04 14:29:42 cheloha Exp $
-#
-# THIS KERNEL IS FOR O2 (IP32) SYSTEMS ONLY.
-
-machine sgi mips64
-maxusers 4
-
-option SMALL_KERNEL
-option NO_PROPOLICE
-option BOOT_CONFIG
-
-option MINIROOTSIZE=10240
-option RAMDISK_HOOKS
-
-makeoption LINK_ADDRESS="0xffffffff80100000"
-option KERNBASE="0xffffffff80000000"
-
-option PCIVERBOSE
-option USBVERBOSE
-
-option CD9660
-option FFS
-option FFS2
-option NFSCLIENT
-option INET6
-
-option TGT_O2 # O2, O2+
-option ARCBIOS
-option CPU_R5000 # R5000/RM5200 support
-option CPU_RM7000 # RM7000 support
-option CPU_R10000 # R10000/R12000/R14000/R16000 support
-
-config bsd root on rd0a swap on rd0b
-
-mainbus0 at root
-cpu* at mainbus0
-clock0 at mainbus0
-macebus0 at mainbus0 # MACE controller localbus.
-gbe0 at mainbus0 # GBE Framebuffer
-mec0 at macebus0
-mkbc0 at macebus0
-com0 at macebus0 base 0x00390000
-com1 at macebus0 base 0x00398000
-dsrtc0 at macebus0
-macepcibr0 at macebus0 # MACE controller PCI Bus bridge.
-pci* at macepcibr? # PCI is on pci bridge
-
-ahc* at pci?
-qlw* at pci?
-qla* at pci?
-qle* at pci?
-mpi* at pci?
-siop* at pci?
-
-ohci* at pci?
-uhci* at pci?
-ehci* at pci?
-usb* at ohci?
-usb* at uhci?
-usb* at ehci?
-
-uhub* at usb?
-uhub* at uhub?
-umodem* at uhub? # USB Modems/Serial
-ucom* at umodem?
-uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
-ucom* at uvscom?
-ubsa* at uhub? # Belkin serial adapter
-ucom* at ubsa?
-umass* at uhub?
-uhidev* at uhub? # Human Interface Devices
-ukbd* at uhidev? # USB keyboard
-wskbd* at ukbd? mux 1
-uhid* at uhidev? # USB generic HID support
-atu* at uhub? # Atmel AT76c50x based 802.11b
-aue* at uhub? # ADMtek AN986 Pegasus Ethernet
-axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
-axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
-cdce* at uhub? # CDC Ethernet
-cue* at uhub? # CATC USB-EL1201A based Ethernet
-kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
-mos* at uhub? # MOSCHIP MCS7730/7830 10/100 Ethernet
-otus* at uhub? # Atheros AR9001U
-rum* at uhub? # Ralink RT2501USB/RT2601USB
-run* at uhub? # Ralink RT2700U/RT2800U/RT3000U
-smsc* at uhub? # SMSC LAN95xx Ethernet
-uath* at uhub? # Atheros AR5005UG/AR5005UX
-udav* at uhub? # Davicom DM9601 based Ethernet
-upgt* at uhub? # Conexant/Intersil PrismGT SoftMAC USB
-upl* at uhub? # Prolific PL2301/PL2302 host-to-host
-ugl* at uhub? # Genesys Logic GL620USB-A host-to-host
-ural* at uhub? # Ralink RT2500USB
-url* at uhub? # Realtek RTL8150L based adapters
-ure* at uhub? # Realtek RTL8152 based adapters
-urtw* at uhub? # Realtek 8187
-wi* at uhub? # WaveLAN IEEE 802.11DS
-zyd* at uhub? # Zydas ZD1211
-ugen* at uhub? # USB Generic driver
-
-ppb* at pci?
-pci* at ppb?
-
-pcn* at pci? # AMD PCnet-PCI Ethernet
-epic* at pci? # SMC EPIC/100 ethernet
-de* at pci? # DC21X4X-based ethernet
-dc* at pci? # 21143, "tulip" clone ethernet
-sf* at pci? # Adaptec AIC-6915 ethernet
-em* at pci? # Intel Pro/1000 ethernet
-ep* at pci? # 3Com 3c59x
-fxp* at pci? # EtherExpress 10/100B ethernet
-mtd* at pci? # Myson MTD803 3-in-1 Ethernet
-ne* at pci? # NE2000-compatible Ethernet
-ti* at pci? # Alteon ACEnic gigabit Ethernet
-stge* at pci? # Sundance TC9021 GigE
-vr* at pci? # VIA Rhine Fast Ethernet
-xl* at pci? # 3C9xx ethernet
-re* at pci? # Realtek 8169/8169S/8110S
-rl* at pci? # Realtek 81[23]9 ethernet
-hme* at pci? # Sun Happy Meal
-gem* at pci? # Sun 'gem' ethernet
-cas* at pci? # Sun Cassini 100/Gigabit
-skc* at pci? # SysKonnect GEnesis 984x
-sk* at skc? # each port of above
-mskc* at pci? # Marvell Yukon-2
-msk* at mskc? # each port of above
-bge* at pci? # Broadcom BCM570x (aka Tigon3)
-vge* at pci? # VIA VT612x
-bnx* at pci? # Broadcom BCM5706/5708 GigE
-sis* at pci? # SiS 900/7016 ethernet
-
-exphy* at mii? # 3Com internal PHYs
-inphy* at mii? # Intel 82555 PHYs
-iophy* at mii? # Intel 82553 PHYs
-icsphy* at mii? # ICS 1890 PHYs
-lxtphy* at mii? # Level1 LXT970 PHYs
-nsphy* at mii? # NS and compatible PHYs
-nsphyter* at mii? # NS and compatible PHYs
-qsphy* at mii? # Quality Semi QS6612 PHYs
-sqphy* at mii? # Seeq 8x220 PHYs
-luphy* at mii? # Lucent LU6612 PHY
-rlphy* at mii? # Realtek 8139 internal PHYs
-mtdphy* at mii? # Myson MTD972 PHYs
-dcphy* at mii? # Digital Clone PHYs
-acphy* at mii? # Altima AC101 PHYs
-amphy* at mii? # AMD 79C873 PHYs
-tqphy* at mii? # TDK 78Q212x PHYs
-bmtphy* at mii? # Broadcom 10/100 PHYs
-brgphy* at mii? # Broadcom Gigabit PHYs
-ciphy* at mii? # Cicada CS8201 10/100/1000 copper PHY
-eephy* at mii? # Marvell 88E1000 series PHY
-xmphy* at mii? # XaQti XMAC-II PHYs
-nsgphy* at mii? # NS gigabit PHYs
-urlphy* at mii? # Realtek RTL8150L internal PHY
-rgephy* at mii? # Realtek 8169S/8110S PHY
-ipgphy* at mii? # IC Plus IP1000A PHYs
-gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
-ukphy* at mii? # "unknown" PHYs
-
-wsdisplay* at gbe?
-pckbd* at mkbc?
-wskbd* at pckbd? console ?
-
-scsibus* at scsi?
-sd* at scsibus?
-st* at scsibus?
-cd* at scsibus?
-
-pseudo-device loop 1
-pseudo-device bpfilter 1
-pseudo-device rd 1
-pseudo-device bio 1
+++ /dev/null
-# $OpenBSD: files.sgi,v 1.56 2017/06/08 11:47:24 visa Exp $
-#
-# maxpartitions must be first item in files.${ARCH}
-#
-maxpartitions 16
-
-maxusers 2 8 64
-
-# Required files
-
-file dev/cninit.c
-file arch/sgi/sgi/autoconf.c
-file arch/sgi/sgi/bus_dma.c
-file arch/sgi/sgi/conf.c
-file arch/sgi/sgi/disksubr.c disk
-file arch/sgi/sgi/ip22_machdep.c tgt_indigo | tgt_indigo2 |
- tgt_indy
-file arch/sgi/sgi/ip27_machdep.c tgt_origin
-file arch/sgi/sgi/ip30_machdep.c tgt_octane
-file arch/sgi/sgi/ip30_nmi.S tgt_octane & ddb
-file arch/sgi/sgi/ip32_machdep.c tgt_o2
-file arch/sgi/sgi/l1.c tgt_origin
-file arch/sgi/sgi/locore.S
-file arch/sgi/sgi/machdep.c
-file arch/sgi/sgi/mainbus.c
-file arch/sgi/sgi/sginode.c tgt_origin
-file arch/sgi/sgi/wscons_machdep.c wsdisplay
-
-# RAM disk for boot
-major {rd = 8}
-
-#
-# Media Indepedent Interface (mii)
-#
-include "dev/mii/files.mii"
-
-#
-# Machine-independent ATAPI drivers
-#
-
-include "dev/atapiscsi/files.atapiscsi"
-include "dev/ata/files.ata"
-
-include "dev/pckbc/files.pckbc"
-
-#
-# System BUS types
-#
-define mainbus {[nasid = -1]}
-device mainbus
-attach mainbus at root
-
-# Our CPU configurator
-device cpu
-attach cpu at mainbus
-
-# Clock device
-device clock
-attach clock at mainbus
-
-# Impact/ImpactSR common code
-device impact: wsemuldisplaydev, rasops32
-file arch/sgi/dev/impact.c impact |
- impact_gio |
- impact_xbow needs-flag
-
-#
-# IP20/22/24/26/28 specific devices
-#
-define giobus {}
-device imc: giobus, eisabus
-attach imc at mainbus
-file arch/sgi/localbus/imc.c imc
-
-device int
-attach int at mainbus
-file arch/sgi/localbus/int.c int
-
-device tcc
-attach tcc at mainbus
-file arch/sgi/localbus/tcc.c tcc needs-flag
-
-include "arch/sgi/gio/files.gio"
-include "arch/sgi/hpc/files.hpc"
-
-#
-# O2 MACE localbus autoconfiguration devices
-#
-define macebus {[base = -1]}
-device macebus
-attach macebus at mainbus
-file arch/sgi/localbus/macebus.c macebus
-
-#
-# Origin200/Origin2000 node configuration enumerator, and
-# Octane XBOW mux bridge
-#
-include "arch/sgi/xbow/files.xbow"
-
-include "dev/onewire/files.onewire"
-
-#
-# PCI Bus bridges
-#
-
-device macepcibr {} : pcibus
-attach macepcibr at macebus
-file arch/sgi/pci/macepcibridge.c macepcibr
-
-# Use machine independent SCSI driver routines
-include "scsi/files.scsi"
-major {sd = 0}
-major {cd = 3}
-
-#
-# EISA Bus support
-#
-
-include "dev/eisa/files.eisa"
-file arch/sgi/sgi/eisa_machdep.c eisa
-
-#
-# PCI Bus support
-#
-
-include "dev/pci/files.pci"
-file arch/sgi/pci/pci_machdep.c pci
-
-# Sun HME Ethernet controllers
-device hme: ether, ifnet, mii, ifmedia
-file dev/ic/hme.c hme
-attach hme at pci with hme_pci
-file dev/pci/if_hme_pci.c hme_pci
-
-# IOC3
-define ioc {[base = -1]}
-device ioc: onewirebus
-attach ioc at pci
-file arch/sgi/pci/ioc.c ioc
-
-# IOC4
-define iof {[base = -1]}
-device iof
-attach iof at pci
-file arch/sgi/pci/iof.c iof
-
-# IOC3/4 serial ports
-attach com at ioc with com_ioc
-file arch/sgi/dev/com_ioc.c com_ioc
-attach com at iof with com_iof
-file arch/sgi/dev/com_iof.c com_iof
-
-# IOC3 onboard Ethernet
-device iec: ether, ifnet, ifmedia, mii
-attach iec at ioc
-file arch/sgi/dev/if_iec.c iec
-
-# IOC3/4 PS/2 controller
-device iockbc: pckbcslot
-attach iockbc at ioc with iockbc_ioc
-attach iockbc at iof with iockbc_iof
-file arch/sgi/dev/iockbc.c iockbc |
- iockbc_ioc | iockbc_iof
- needs-flag
-
-# DS1687 Time-Of-Day calendar device
-device dsrtc
-attach dsrtc at ioc with dsrtc_ioc
-attach dsrtc at iof with dsrtc_iof
-attach dsrtc at macebus with dsrtc_macebus
-file arch/sgi/dev/dsrtc.c dsrtc
-
-# GBE framebuffer
-device gbe: wsemuldisplaydev, rasops8, rasops16, rasops32
-attach gbe at mainbus
-file arch/sgi/dev/gbe.c gbe needs-flag
-
-# 16[45]50-based "com" ports on localbus
-attach com at macebus with com_macebus
-file arch/sgi/localbus/com_lbus.c com_macebus
-
-# MACE MAC-110 ethernet
-device mec: ether, ifnet, ifmedia, mii
-attach mec at macebus
-file arch/sgi/dev/if_mec.c mec
-
-# Moosehead A/V Board audio
-device mavb: audio
-attach mavb at macebus
-file arch/sgi/dev/mavb.c mavb
-
-# MACE PS/2 Controller
-device mkbc: pckbcslot
-attach mkbc at macebus
-file arch/sgi/dev/mkbc.c mkbc needs-flag
-
-# Power button
-device power
-attach power at macebus with power_macebus
-attach power at mainbus with power_mainbus
-file arch/sgi/dev/power.c power |
- power_macebus | power_mainbus
- needs-flag
-
-# Raster operations
-include "dev/rasops/files.rasops"
-include "dev/wsfont/files.wsfont"
-
-#
-# wscons console
-#
-include "dev/wscons/files.wscons"
-
-#
-# CardBus and PCMCIA bus support
-#
-include "dev/cardbus/files.cardbus"
-include "dev/pcmcia/files.pcmcia"
-
-#
-# Machine-independent HID support
-#
-include "dev/hid/files.hid"
-
-#
-# Machine-independent USB drivers
-#
-include "dev/usb/files.usb"
-
-#
-# Number-In-a-Can containers
-#
-# Ethernet address
-device owmac
-attach owmac at onewire
-file arch/sgi/dev/owmac.c owmac
-
-# Serial numbers
-device owserial
-attach owserial at onewire
-file arch/sgi/dev/owserial.c owserial
-file arch/sgi/dev/owmem_subr.c owmac | owserial
-
-# IP35 SPD memory information
-attach spdmem at mainbus with spdmem_mainbus
-file arch/sgi/dev/spdmem_mainbus.c spdmem_mainbus
+++ /dev/null
-/* $OpenBSD: ld.script,v 1.10 2021/02/18 16:27:08 visa Exp $ */
-
-OUTPUT_FORMAT("elf64-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(__start)
-
-PHDRS
-{
- text PT_LOAD;
- openbsd_randomize PT_OPENBSD_RANDOMIZE;
-}
-
-SECTIONS
-{
- .text :
- {
- *(.text .text.* .gnu.linkonce.t.*)
- } :text
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata .rodata.* .gnu.linkonce.r.*)
- } :text
-
- . = ALIGN(8);
- PROVIDE (__kernel_randomdata = .);
- .openbsd.randomdata :
- {
- __retguard_start = ABSOLUTE(.);
- *(.openbsd.randomdata.retguard .openbsd.randomdata.retguard.*)
- /* XXX . = ALIGN(0x1000); */
- __retguard_end = ABSOLUTE(.);
- *(.openbsd.randomdata .openbsd.randomdata.*)
- } :text :openbsd_randomize
- . = ALIGN(8);
- PROVIDE (__kernel_randomdata_end = .);
-
- .data :
- {
- *(.data .data.* .gnu.linkonce.d.*)
- } :text
- PROVIDE (edata = .);
- .sbss :
- {
- *(.sbss .sbss.* .gnu.linkonce.sb.* .scommon)
- }
- .bss :
- {
- *(.bss .bss.* .gnu.linkonce.b.* COMMON)
- }
- . = ALIGN(8);
- PROVIDE (_end = .);
- PROVIDE (end = .);
-
- /DISCARD/ :
- {
- *(.pdr)
- *(.mdebug.abi64)
- *(.MIPS.options)
- }
-}
+++ /dev/null
-/* $OpenBSD: com_ioc.c,v 1.9 2012/10/03 22:46:09 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/tty.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <dev/ic/comreg.h>
-#include <dev/ic/comvar.h>
-#include <dev/ic/ns16550reg.h>
-
-#include <sgi/pci/iocvar.h>
-
-int com_ioc_probe(struct device *, void *, void *);
-void com_ioc_attach(struct device *, struct device *, void *);
-
-struct cfattach com_ioc_ca = {
- sizeof(struct com_softc), com_ioc_probe, com_ioc_attach
-};
-
-extern struct cfdriver com_cd;
-
-int
-com_ioc_probe(struct device *parent, void *match, void *aux)
-{
- struct cfdata *cf = match;
- struct ioc_attach_args *iaa = aux;
- bus_space_tag_t iot = iaa->iaa_memt;
- bus_space_handle_t ioh;
- int rv = 0, console = 0;
-
- if (strcmp(iaa->iaa_name, com_cd.cd_name) != 0)
- return 0;
-
- if (comconsiot != NULL)
- console = iaa->iaa_memh + iaa->iaa_base ==
- comconsiot->bus_base + comconsaddr;
-
- /* if it's in use as console, it's there. */
- if (!(console && !comconsattached)) {
- if (bus_space_subregion(iot, iaa->iaa_memh,
- iaa->iaa_base, COM_NPORTS, &ioh) == 0)
- rv = comprobe1(iot, ioh);
- } else
- rv = 1;
-
- /* make a config stanza with exact locators match over a generic line */
- if (cf->cf_loc[0] != -1)
- rv += rv;
-
- return rv;
-}
-
-void
-com_ioc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct com_softc *sc = (void *)self;
- struct ioc_attach_args *iaa = aux;
- bus_space_handle_t ioh;
- int console = 0;
-
- if (comconsiot != NULL)
- console = iaa->iaa_memh + iaa->iaa_base ==
- comconsiot->bus_base + comconsaddr;
-
- sc->sc_hwflags = 0;
- sc->sc_swflags = 0;
- sc->sc_frequency = 22000000 / 3;
-
- /* if it's in use as console, it's there. */
- if (!(console && !comconsattached)) {
- sc->sc_iot = iaa->iaa_memt;
- sc->sc_iobase = iaa->iaa_base;
-
- if (bus_space_subregion(iaa->iaa_memt, iaa->iaa_memh,
- iaa->iaa_base, COM_NPORTS, &ioh) != 0) {
- printf(": can't map registers\n");
- return;
- }
- } else {
- /*
- * If we are the console, reuse the existing bus_space
- * information, so that comcnattach() invokes bus_space_map()
- * with correct parameters.
- */
- sc->sc_iot = comconsiot;
- sc->sc_iobase = comconsaddr;
-
- if (comcnattach(sc->sc_iot, sc->sc_iobase, comconsrate,
- sc->sc_frequency, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8))
- panic("can't setup serial console");
- ioh = comconsioh;
- }
-
- sc->sc_ioh = ioh;
-
- com_attach_subr(sc);
-
- ioc_intr_establish(parent, iaa->iaa_dev, IPL_TTY, comintr,
- (void *)sc, sc->sc_dev.dv_xname);
-}
+++ /dev/null
-/* $OpenBSD: com_iof.c,v 1.5 2009/10/16 00:15:46 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/tty.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <dev/ic/comreg.h>
-#include <dev/ic/comvar.h>
-#include <dev/ic/ns16550reg.h>
-
-#include <sgi/pci/iofvar.h>
-
-int com_iof_probe(struct device *, void *, void *);
-void com_iof_attach(struct device *, struct device *, void *);
-
-struct cfattach com_iof_ca = {
- sizeof(struct com_softc), com_iof_probe, com_iof_attach
-};
-
-extern struct cfdriver com_cd;
-
-int
-com_iof_probe(struct device *parent, void *match, void *aux)
-{
- struct cfdata *cf = match;
- struct iof_attach_args *iaa = aux;
- bus_space_tag_t iot = iaa->iaa_memt;
- bus_space_handle_t ioh;
- int rv = 0, console;
-
- if (strcmp(iaa->iaa_name, com_cd.cd_name) != 0)
- return 0;
-
- console = iaa->iaa_memh + iaa->iaa_base ==
- comconsiot->bus_base + comconsaddr;
-
- /* if it's in use as console, it's there. */
- if (!(console && !comconsattached)) {
- if (bus_space_subregion(iot, iaa->iaa_memh,
- iaa->iaa_base, COM_NPORTS, &ioh) == 0)
- rv = comprobe1(iot, ioh);
- } else
- rv = 1;
-
- /* make a config stanza with exact locators match over a generic line */
- if (cf->cf_loc[0] != -1)
- rv += rv;
-
- return rv;
-}
-
-void
-com_iof_attach(struct device *parent, struct device *self, void *aux)
-{
- struct com_softc *sc = (void *)self;
- struct iof_attach_args *iaa = aux;
- bus_space_handle_t ioh;
- int console;
-
- console = iaa->iaa_memh + iaa->iaa_base ==
- comconsiot->bus_base + comconsaddr;
-
- sc->sc_hwflags = 0;
- sc->sc_swflags = 0;
- sc->sc_frequency = iaa->iaa_clock;
-
- /* if it's in use as console, it's there. */
- if (!(console && !comconsattached)) {
- sc->sc_iot = iaa->iaa_memt;
- sc->sc_iobase = iaa->iaa_base;
-
- if (bus_space_subregion(iaa->iaa_memt, iaa->iaa_memh,
- iaa->iaa_base, COM_NPORTS, &ioh) != 0) {
- printf(": can't map registers\n");
- return;
- }
- } else {
- /*
- * If we are the console, reuse the existing bus_space
- * information, so that comcnattach() invokes bus_space_map()
- * with correct parameters.
- */
- sc->sc_iot = comconsiot;
- sc->sc_iobase = comconsaddr;
-
- if (comcnattach(sc->sc_iot, sc->sc_iobase, comconsrate,
- sc->sc_frequency, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8))
- panic("can't setup serial console");
- ioh = comconsioh;
- }
-
- sc->sc_ioh = ioh;
-
- com_attach_subr(sc);
-
- iof_intr_establish(parent, iaa->iaa_dev, IPL_TTY, comintr,
- (void *)sc, sc->sc_dev.dv_xname);
-}
+++ /dev/null
-/* $OpenBSD: dsrtc.c,v 1.14 2020/05/21 01:48:43 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <dev/clock_subr.h>
-#include <dev/ic/ds1687reg.h>
-#include <dev/ic/mk48txxreg.h>
-
-#include <mips64/archtype.h>
-
-#include <sgi/dev/dsrtcvar.h>
-#include <sgi/localbus/macebusvar.h>
-#include <sgi/pci/iocreg.h>
-#include <sgi/pci/iocvar.h>
-#include <sgi/pci/iofvar.h>
-
-struct dsrtc_softc {
- struct device sc_dev;
- struct todr_chip_handle sc_todr;
- bus_space_tag_t sc_clkt;
- bus_space_handle_t sc_clkh, sc_clkh2;
- int sc_yrbase;
-
- int (*read)(struct dsrtc_softc *, int);
- void (*write)(struct dsrtc_softc *, int, int);
-};
-
-int dsrtc_match(struct device *, void *, void *);
-void dsrtc_attach_ioc(struct device *, struct device *, void *);
-void dsrtc_attach_iof(struct device *, struct device *, void *);
-void dsrtc_attach_macebus(struct device *, struct device *, void *);
-
-struct cfdriver dsrtc_cd = {
- NULL, "dsrtc", DV_DULL
-};
-
-struct cfattach dsrtc_macebus_ca = {
- sizeof(struct dsrtc_softc), dsrtc_match, dsrtc_attach_macebus
-};
-
-struct cfattach dsrtc_ioc_ca = {
- sizeof(struct dsrtc_softc), dsrtc_match, dsrtc_attach_ioc
-};
-
-struct cfattach dsrtc_iof_ca = {
- sizeof(struct dsrtc_softc), dsrtc_match, dsrtc_attach_ioc
-};
-
-int ip32_dsrtc_read(struct dsrtc_softc *, int);
-void ip32_dsrtc_write(struct dsrtc_softc *, int, int);
-int ioc_ds1687_dsrtc_read(struct dsrtc_softc *, int);
-void ioc_ds1687_dsrtc_write(struct dsrtc_softc *, int, int);
-
-int ds1687_gettime(struct todr_chip_handle *, struct timeval *);
-int ds1687_settime(struct todr_chip_handle *, struct timeval *);
-int ds1742_gettime(struct todr_chip_handle *, struct timeval *);
-int ds1742_settime(struct todr_chip_handle *, struct timeval *);
-
-static inline int frombcd(int, int);
-static inline int tobcd(int, int);
-static inline int
-frombcd(int x, int binary)
-{
- return binary ? x : (x >> 4) * 10 + (x & 0xf);
-}
-static inline int
-tobcd(int x, int binary)
-{
- return binary ? x : (x / 10 * 16) + (x % 10);
-}
-
-int
-dsrtc_match(struct device *parent, void *match, void *aux)
-{
- /*
- * Depending on what dsrtc attaches to, the actual attach_args
- * may be a different struct, but all of them start with the
- * same name field.
- */
- struct mainbus_attach_args *maa = aux;
-
- return strcmp(maa->maa_name, dsrtc_cd.cd_name) == 0;
-}
-
-void
-dsrtc_attach_ioc(struct device *parent, struct device *self, void *aux)
-{
- struct dsrtc_softc *sc = (void *)self;
- struct ioc_attach_args *iaa = aux;
- bus_space_handle_t ih, ih2;
-
- /*
- * The IOC3 RTC is either a Dallas (now Maxim) DS1397 or compatible
- * (likely a more recent DS1687), or a DS1747 or compatible
- * (itself being a Mostek MK48T35 clone).
- *
- * Surprisingly, the chip found on Fuel has a DS1742W label,
- * which has much less memory than the DS1747. I guess whatever
- * the chip is, it is mapped to the end of the DS1747 address
- * space, so that the clock registers always appear at the same
- * addresses in memory.
- */
-
- sc->sc_clkt = iaa->iaa_memt;
-
- if (iaa->iaa_base != IOC3_BYTEBUS_0) {
- /* DS1687 */
-
- if (bus_space_subregion(iaa->iaa_memt, iaa->iaa_memh,
- IOC3_BYTEBUS_1, 1, &ih) != 0 ||
- bus_space_subregion(iaa->iaa_memt, iaa->iaa_memh,
- IOC3_BYTEBUS_2, 1, &ih2) != 0)
- goto fail;
-
- printf(": DS1687\n");
-
- sc->sc_clkh = ih;
- sc->sc_clkh2 = ih2;
-
- sc->read = ioc_ds1687_dsrtc_read;
- sc->write = ioc_ds1687_dsrtc_write;
-
- sc->sc_todr.todr_gettime = ds1687_gettime;
- sc->sc_todr.todr_settime = ds1687_settime;
- } else {
- /* DS1742W */
-
- if (bus_space_subregion(iaa->iaa_memt, iaa->iaa_memh,
- iaa->iaa_base + MK48T35_CLKOFF,
- MK48T35_CLKSZ - MK48T35_CLKOFF, &ih) != 0)
- goto fail;
-
- printf(": DS1742W\n");
-
- sc->sc_clkh = ih;
-
- /*
- * For some reason, the base year differs between IP27
- * and IP35.
- */
- sc->sc_yrbase = sys_config.system_type == SGI_IP35 ?
- POSIX_BASE_YEAR - 2 : POSIX_BASE_YEAR;
-
- sc->sc_todr.todr_gettime = ds1742_gettime;
- sc->sc_todr.todr_settime = ds1742_settime;
- }
- sc->sc_todr.cookie = self;
- todr_attach(&sc->sc_todr);
-
- return;
-
-fail:
- printf(": can't map registers\n");
-}
-
-void
-dsrtc_attach_iof(struct device *parent, struct device *self, void *aux)
-{
- struct dsrtc_softc *sc = (void *)self;
- struct iof_attach_args *iaa = aux;
- bus_space_handle_t ih;
-
- /*
- * The IOC4 RTC is a DS1747 or compatible (itself being a Mostek
- * MK48T35 clone).
- */
-
- if (bus_space_subregion(iaa->iaa_memt, iaa->iaa_memh,
- iaa->iaa_base + MK48T35_CLKOFF,
- MK48T35_CLKSZ - MK48T35_CLKOFF, &ih) != 0)
- goto fail;
-
- printf(": DS1742W\n");
-
- sc->sc_clkh = ih;
-
- /*
- * For some reason, the base year differs between IP27
- * and IP35.
- */
- sc->sc_yrbase = sys_config.system_type == SGI_IP35 ?
- POSIX_BASE_YEAR - 2 : POSIX_BASE_YEAR;
-
- sc->sc_todr.cookie = self;
- sc->sc_todr.todr_gettime = ds1742_gettime;
- sc->sc_todr.todr_settime = ds1742_settime;
- todr_attach(&sc->sc_todr);
-
- return;
-
-fail:
- printf(": can't map registers\n");
-}
-
-void
-dsrtc_attach_macebus(struct device *parent, struct device *self, void *aux)
-{
- struct dsrtc_softc *sc = (void *)self;
- struct macebus_attach_args *maa = aux;
-
- sc->sc_clkt = maa->maa_iot;
- if (bus_space_map(sc->sc_clkt, maa->maa_baseaddr, 128 * 256, 0,
- &sc->sc_clkh)) {
- printf(": can't map registers\n");
- return;
- }
-
- printf(": DS1687\n");
-
- sc->read = ip32_dsrtc_read;
- sc->write = ip32_dsrtc_write;
-
- sc->sc_todr.cookie = self;
- sc->sc_todr.todr_gettime = ds1687_gettime;
- sc->sc_todr.todr_settime = ds1687_settime;
- todr_attach(&sc->sc_todr);
-}
-
-int
-ip32_dsrtc_read(struct dsrtc_softc *sc, int reg)
-{
- return bus_space_read_1(sc->sc_clkt, sc->sc_clkh, reg);
-}
-
-void
-ip32_dsrtc_write(struct dsrtc_softc *sc, int reg, int val)
-{
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, reg, val);
-}
-
-int
-ioc_ds1687_dsrtc_read(struct dsrtc_softc *sc, int reg)
-{
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, 0, reg);
- return bus_space_read_1(sc->sc_clkt, sc->sc_clkh2, 0);
-}
-
-void
-ioc_ds1687_dsrtc_write(struct dsrtc_softc *sc, int reg, int val)
-{
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, 0, reg);
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh2, 0, val);
-}
-
-/*
- * Dallas DS1687 clock driver.
- */
-
-int
-ds1687_gettime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dsrtc_softc *sc = handle->cookie;
- int ctrl, dm;
-
- /* Select bank 1. */
- ctrl = (*sc->read)(sc, DS1687_CTRL_A);
- (*sc->write)(sc, DS1687_CTRL_A, ctrl | DS1687_BANK_1);
-
- /* Figure out which data mode to use. */
- dm = (*sc->read)(sc, DS1687_CTRL_B) & DS1687_DM_1;
-
- /* Wait for no update in progress. */
- while ((*sc->read)(sc, DS1687_CTRL_A) & DS1687_UIP)
- /* Do nothing. */;
-
- /* Read the RTC. */
- dt.dt_sec = frombcd((*sc->read)(sc, DS1687_SEC), dm);
- dt.dt_min = frombcd((*sc->read)(sc, DS1687_MIN), dm);
- dt.dt_hour = frombcd((*sc->read)(sc, DS1687_HOUR), dm);
- dt.dt_day = frombcd((*sc->read)(sc, DS1687_DAY), dm);
- dt.dt_mon = frombcd((*sc->read)(sc, DS1687_MONTH), dm);
- dt.dt_year = frombcd((*sc->read)(sc, DS1687_YEAR), dm);
- dt.dt_year += frombcd((*sc->read)(sc, DS1687_CENTURY), dm) * 100;
-
- tv->tv_sec = clock_ymdhms_to_secs(&dt);
- tv->tv_usec = 0;
- return 0;
-}
-
-int
-ds1687_settime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dsrtc_softc *sc = handle->cookie;
- int year, century, ctrl, dm;
-
- clock_secs_to_ymdhms(tv->tv_sec, &dt);
-
- century = dt.dt_year / 100;
- year = dt.dt_year % 100;
-
- /* Select bank 1. */
- ctrl = (*sc->read)(sc, DS1687_CTRL_A);
- (*sc->write)(sc, DS1687_CTRL_A, ctrl | DS1687_BANK_1);
-
- /* Figure out which data mode to use, and select 24 hour time. */
- ctrl = (*sc->read)(sc, DS1687_CTRL_B);
- dm = ctrl & DS1687_DM_1;
- (*sc->write)(sc, DS1687_CTRL_B, ctrl | DS1687_24_HR);
-
- /* Prevent updates. */
- ctrl = (*sc->read)(sc, DS1687_CTRL_B);
- (*sc->write)(sc, DS1687_CTRL_B, ctrl | DS1687_SET_CLOCK);
-
- /* Update the RTC. */
- (*sc->write)(sc, DS1687_SEC, tobcd(dt.dt_sec, dm));
- (*sc->write)(sc, DS1687_MIN, tobcd(dt.dt_min, dm));
- (*sc->write)(sc, DS1687_HOUR, tobcd(dt.dt_hour, dm));
- (*sc->write)(sc, DS1687_DOW, tobcd(dt.dt_wday + 1, dm));
- (*sc->write)(sc, DS1687_DAY, tobcd(dt.dt_day, dm));
- (*sc->write)(sc, DS1687_MONTH, tobcd(dt.dt_mon, dm));
- (*sc->write)(sc, DS1687_YEAR, tobcd(year, dm));
- (*sc->write)(sc, DS1687_CENTURY, tobcd(century, dm));
-
- /* Enable updates. */
- (*sc->write)(sc, DS1687_CTRL_B, ctrl);
-
- return 0;
-}
-
-/*
- * Dallas DS1742 clock driver.
- */
-
-int
-ds1742_gettime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dsrtc_softc *sc = handle->cookie;
- int csr;
-
- /* Freeze update. */
- csr = bus_space_read_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR);
- csr |= MK48TXX_CSR_READ;
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR, csr);
-
- /* Read the RTC. */
- dt.dt_sec = frombcd(bus_space_read_1(sc->sc_clkt, sc->sc_clkh,
- MK48TXX_ISEC), 0);
- dt.dt_min = frombcd(bus_space_read_1(sc->sc_clkt, sc->sc_clkh,
- MK48TXX_IMIN), 0);
- dt.dt_hour = frombcd(bus_space_read_1(sc->sc_clkt, sc->sc_clkh,
- MK48TXX_IHOUR), 0);
- dt.dt_day = frombcd(bus_space_read_1(sc->sc_clkt, sc->sc_clkh,
- MK48TXX_IDAY), 0);
- dt.dt_mon = frombcd(bus_space_read_1(sc->sc_clkt, sc->sc_clkh,
- MK48TXX_IMON), 0);
- dt.dt_year = frombcd(bus_space_read_1(sc->sc_clkt, sc->sc_clkh,
- MK48TXX_IYEAR), 0) + sc->sc_yrbase;
-
- /* Enable updates again. */
- csr = bus_space_read_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR);
- csr &= ~MK48TXX_CSR_READ;
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR, csr);
-
- tv->tv_sec = clock_ymdhms_to_secs(&dt);
- tv->tv_usec = 0;
- return 0;
-}
-
-int
-ds1742_settime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dsrtc_softc *sc = handle->cookie;
- int csr;
-
- clock_secs_to_ymdhms(tv->tv_sec, &dt);
-
- /* Enable write. */
- csr = bus_space_read_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR);
- csr |= MK48TXX_CSR_WRITE;
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR, csr);
-
- /* Update the RTC. */
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ISEC,
- tobcd(dt.dt_sec, 0));
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_IMIN,
- tobcd(dt.dt_min, 0));
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_IHOUR,
- tobcd(dt.dt_hour, 0));
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_IWDAY,
- tobcd(dt.dt_wday + 1, 0));
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_IDAY,
- tobcd(dt.dt_day, 0));
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_IMON,
- tobcd(dt.dt_mon, 0));
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_IYEAR,
- tobcd(dt.dt_year - sc->sc_yrbase, 0));
-
- /* Load new values. */
- csr = bus_space_read_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR);
- csr &= ~MK48TXX_CSR_WRITE;
- bus_space_write_1(sc->sc_clkt, sc->sc_clkh, MK48TXX_ICSR, csr);
-
- return 0;
-}
-
-/*
- * Routines allowing external access to the RTC registers, used by
- * power(4).
- */
-
-int
-dsrtc_register_read(int reg)
-{
- struct dsrtc_softc *sc;
-
- if (dsrtc_cd.cd_ndevs == 0 ||
- (sc = (struct dsrtc_softc *)dsrtc_cd.cd_devs[0]) == NULL ||
- sc->read == NULL)
- return -1;
-
- return (*sc->read)(sc, reg);
-}
-
-void
-dsrtc_register_write(int reg, int val)
-{
- struct dsrtc_softc *sc;
-
- if (dsrtc_cd.cd_ndevs == 0 ||
- (sc = (struct dsrtc_softc *)dsrtc_cd.cd_devs[0]) == NULL ||
- sc->write == NULL)
- return;
-
- (*sc->write)(sc, reg, val);
-}
+++ /dev/null
-/* $OpenBSD: dsrtcvar.h,v 1.1 2009/05/15 23:03:32 miod Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Routines allowing external access to the RTC registers, used by
- * power(4).
- */
-
-int dsrtc_register_read(int);
-void dsrtc_register_write(int, int);
+++ /dev/null
-/* $OpenBSD: gbe.c,v 1.23 2020/05/25 09:55:48 jsg Exp $ */
-
-/*
- * Copyright (c) 2007, 2008, 2009 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Graphics Back End (GBE) Framebuffer for SGI O2.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <mips64/arcbios.h>
-
-#include <sgi/dev/gl.h>
-#include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebusvar.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsdisplayvar.h>
-#include <dev/rasops/rasops.h>
-
-#include "gbereg.h"
-
-/* Amount of memory to allocate for framebuffer. */
-#define GBE_FB_SIZE 8 * 1 << 20
-
-/*
- * Colourmap data.
- */
-struct gbe_cmap {
- u_int8_t cm_red[256];
- u_int8_t cm_green[256];
- u_int8_t cm_blue[256];
-};
-
-/*
- * Screen data.
- */
-struct gbe_screen {
- struct device *sc; /* Back pointer. */
-
- struct rasops_info ri; /* Screen raster display info. */
- struct rasops_info ri_tile; /* Raster info for rasops tile. */
- struct gbe_cmap cmap; /* Display colour map. */
-
- int fb_size; /* Size of framebuffer memory. */
- int tm_size; /* Size of tilemap memory. */
-
- caddr_t tm; /* Address of tilemap memory. */
- paddr_t tm_phys; /* Physical address of tilemap. */
- caddr_t fb; /* Address of framebuffer memory. */
- paddr_t fb_phys; /* Physical address of framebuffer. */
- caddr_t ro; /* Address of rasops tile. */
- paddr_t ro_phys; /* Physical address of rasops tile. */
-
- int width; /* Width in pixels. */
- int height; /* Height in pixels. */
- int depth; /* Colour depth in bits. */
- int mode; /* Display mode. */
- int bufmode; /* Rendering engine buffer mode. */
- int linebytes; /* Bytes per line. */
- int ro_curpos; /* Current position in rasops tile. */
-};
-
-/*
- * GBE device data.
- */
-struct gbe_softc {
- struct device sc_dev;
-
- bus_space_tag_t iot;
- bus_space_handle_t ioh; /* GBE registers. */
- bus_space_handle_t re_ioh; /* Rendering engine registers. */
- bus_dma_tag_t dmat;
-
- int rev; /* Hardware revision. */
- int console; /* Is this the console? */
- int screens; /* No of screens allocated. */
-
- struct gbe_screen *curscr; /* Current screen. */
-};
-
-/*
- * Hardware and device related functions.
- */
-void gbe_init_screen(struct gbe_screen *);
-void gbe_enable(struct gbe_softc *);
-void gbe_disable(struct gbe_softc *);
-void gbe_setup(struct gbe_softc *);
-void gbe_setcolour(struct gbe_softc *, u_int, u_int8_t, u_int8_t, u_int8_t);
-void gbe_wait_re_idle(struct gbe_softc *);
-
-/*
- * Colour map handling for indexed modes.
- */
-int gbe_getcmap(struct gbe_cmap *, struct wsdisplay_cmap *);
-int gbe_putcmap(struct gbe_cmap *, struct wsdisplay_cmap *);
-void gbe_loadcmap(struct gbe_screen *, u_int, u_int);
-
-/*
- * Interfaces for wscons.
- */
-int gbe_ioctl(void *, u_long, caddr_t, int, struct proc *);
-paddr_t gbe_mmap(void *, off_t, int);
-int gbe_alloc_screen(void *, const struct wsscreen_descr *, void **,
- int *, int *, uint32_t *);
-void gbe_free_screen(void *, void *);
-int gbe_show_screen(void *, void *, int, void (*)(void *, int, int),
- void *);
-int gbe_load_font(void *, void *, struct wsdisplay_font *);
-int gbe_list_font(void *, struct wsdisplay_font *);
-
-/*
- * Hardware acceleration for rasops.
- */
-void gbe_rop(struct gbe_softc *, int, int, int, int, int);
-void gbe_copyrect(struct gbe_softc *, int, int, int, int, int, int, int);
-void gbe_fillrect(struct gbe_softc *, int, int, int, int, int);
-int gbe_do_cursor(struct rasops_info *);
-int gbe_putchar(void *, int, int, u_int, uint32_t);
-int gbe_copycols(void *, int, int, int, int);
-int gbe_erasecols(void *, int, int, int, uint32_t);
-int gbe_copyrows(void *, int, int, int);
-int gbe_eraserows(void *, int, int, uint32_t);
-
-static struct gbe_screen gbe_consdata;
-static int gbe_console;
-
-struct wsscreen_descr gbe_stdscreen = {
- "std", /* Screen name. */
-};
-
-struct wsdisplay_accessops gbe_accessops = {
- .ioctl = gbe_ioctl,
- .mmap = gbe_mmap,
- .alloc_screen = gbe_alloc_screen,
- .free_screen = gbe_free_screen,
- .show_screen = gbe_show_screen,
- .load_font = gbe_load_font,
- .list_font = gbe_list_font
-};
-
-const struct wsscreen_descr *gbe_scrlist[] = {
- &gbe_stdscreen
-};
-
-struct wsscreen_list gbe_screenlist = {
- sizeof(gbe_scrlist) / sizeof(struct wsscreen_descr *), gbe_scrlist
-};
-
-int gbe_match(struct device *, void *, void *);
-void gbe_attach(struct device *, struct device *, void *);
-int gbe_activate(struct device *, int);
-
-struct cfattach gbe_ca = {
- sizeof (struct gbe_softc), gbe_match, gbe_attach,
- NULL, gbe_activate
-};
-
-struct cfdriver gbe_cd = {
- NULL, "gbe", DV_DULL
-};
-
-int
-gbe_match(struct device *parent, void *cf, void *aux)
-{
- struct mainbus_attach_args *maa = aux;
-
- if (strcmp(maa->maa_name, gbe_cd.cd_name) != 0)
- return 0;
-
- return 1;
-}
-
-void
-gbe_attach(struct device *parent, struct device *self, void *aux)
-{
- struct gbe_softc *gsc = (void*)self;
- struct gbe_screen *screen;
- struct wsemuldisplaydev_attach_args waa;
- bus_dma_segment_t tm_segs[1];
- bus_dma_segment_t fb_segs[1];
- bus_dma_segment_t ro_segs[1];
- bus_dmamap_t tm_dmamap;
- bus_dmamap_t fb_dmamap;
- bus_dmamap_t ro_dmamap;
- int tm_nsegs;
- int fb_nsegs;
- int ro_nsegs;
- uint32_t val;
- uint32_t attr;
-
- printf(": ");
-
- /* GBE isn't strictly on the crimebus, but use this for now... */
- gsc->iot = &crimebus_tag;
- gsc->dmat = &mace_bus_dma_tag;
- gsc->console = gbe_console;
- gsc->screens = 0;
-
- if (gsc->console == 1) {
-
- /*
- * We've already been setup via gbe_cnattach().
- */
-
- gsc->ioh = PHYS_TO_XKPHYS(GBE_BASE, CCA_NC);
- gsc->re_ioh = PHYS_TO_XKPHYS(RE_BASE, CCA_NC);
-
- gsc->rev = bus_space_read_4(gsc->iot, gsc->ioh, GBE_CTRL_STAT)
- & 0xf;
-
- gsc->curscr = &gbe_consdata;
- gbe_consdata.sc = (void*)self;
-
- printf("rev %u, %iMB, %dx%d at %d bits\n", gsc->rev,
- gbe_consdata.fb_size >> 20, gbe_consdata.width,
- gbe_consdata.height, gbe_consdata.depth);
-
- waa.console = gsc->console;
- waa.scrdata = &gbe_screenlist;
- waa.accessops = &gbe_accessops;
- waa.accesscookie = &gbe_consdata;
- waa.defaultscreens = 0;
- config_found(self, &waa, wsemuldisplaydevprint);
-
- return;
- }
-
- /*
- * Setup screen data.
- */
- gsc->curscr = malloc(sizeof(struct gbe_screen), M_DEVBUF, M_NOWAIT);
- if (gsc->curscr == NULL) {
- printf("failed to allocate screen memory!\n");
- return;
- }
- gsc->curscr->sc = (void *)gsc;
- screen = gsc->curscr;
-
- /*
- * Setup bus space mappings.
- */
- if (bus_space_map(gsc->iot, GBE_BASE - CRIMEBUS_BASE, GBE_REG_SIZE,
- BUS_SPACE_MAP_LINEAR, &gsc->ioh)) {
- printf("failed to map framebuffer bus space!\n");
- return;
- }
-
- if (bus_space_map(gsc->iot, RE_BASE - CRIMEBUS_BASE, RE_REG_SIZE,
- BUS_SPACE_MAP_LINEAR, &gsc->re_ioh)) {
- printf("failed to map rendering engine bus space!\n");
- goto fail0;
- }
-
- /* Determine GBE revision. */
- gsc->rev = bus_space_read_4(gsc->iot, gsc->ioh, GBE_CTRL_STAT) & 0xf;
-
- /* Determine resolution configured by firmware. */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_HCMAP);
- screen->width = (val >> GBE_VT_HCMAP_ON_SHIFT) & 0xfff;
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_VCMAP);
- screen->height = (val >> GBE_VT_VCMAP_ON_SHIFT) & 0xfff;
-
- if (screen->width == 0 || screen->height == 0) {
- printf("device has not been setup by firmware!\n");
- goto fail1;
- }
-
- /* Setup screen defaults. */
- screen->fb_size = GBE_FB_SIZE;
- screen->tm_size = GBE_TLB_SIZE * sizeof(uint16_t);
- screen->depth = 8;
- screen->linebytes = screen->width * screen->depth / 8;
-
- /*
- * Setup DMA for tilemap.
- */
- if (bus_dmamap_create(gsc->dmat, screen->tm_size, 1, screen->tm_size,
- 0, BUS_DMA_NOWAIT, &tm_dmamap)) {
- printf("failed to create DMA map for tilemap!\n");
- goto fail1;
- }
-
- if (bus_dmamem_alloc(gsc->dmat, screen->tm_size, 65536, 0, tm_segs, 1,
- &tm_nsegs, BUS_DMA_NOWAIT)) {
- printf("failed to allocate DMA memory for tilemap!\n");
- goto fail2;
- }
-
- if (bus_dmamem_map(gsc->dmat, tm_segs, tm_nsegs, screen->tm_size,
- &screen->tm, BUS_DMA_COHERENT)) {
- printf("failed to map DMA memory for tilemap!\n");
- goto fail3;
- }
-
- if (bus_dmamap_load(gsc->dmat, tm_dmamap, screen->tm, screen->tm_size,
- NULL, BUS_DMA_NOWAIT)){
- printf("failed to load DMA map for tilemap\n");
- goto fail4;
- }
-
- /*
- * Setup DMA for framebuffer.
- */
- if (bus_dmamap_create(gsc->dmat, screen->fb_size, 1, screen->fb_size,
- 0, BUS_DMA_NOWAIT, &fb_dmamap)) {
- printf("failed to create DMA map for framebuffer!\n");
- goto fail5;
- }
-
- if (bus_dmamem_alloc(gsc->dmat, screen->fb_size, 65536, 0, fb_segs,
- 1, &fb_nsegs, BUS_DMA_NOWAIT)) {
- printf("failed to allocate DMA memory for framebuffer!\n");
- goto fail6;
- }
-
- if (bus_dmamem_map(gsc->dmat, fb_segs, fb_nsegs, screen->fb_size,
- &screen->fb, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) {
- printf("failed to map DMA memory for framebuffer!\n");
- goto fail7;
- }
-
- if (bus_dmamap_load(gsc->dmat, fb_dmamap, screen->fb, screen->fb_size,
- NULL, BUS_DMA_NOWAIT)) {
- printf("failed to load DMA map for framebuffer\n");
- goto fail8;
- }
-
- /*
- * Setup DMA for rasops tile.
- */
- if (bus_dmamap_create(gsc->dmat, GBE_TILE_SIZE, 1, GBE_TILE_SIZE,
- 0, BUS_DMA_NOWAIT, &ro_dmamap)) {
- printf("failed to create DMA map for rasops tile!\n");
- goto fail9;
- }
-
- if (bus_dmamem_alloc(gsc->dmat, GBE_TILE_SIZE, 65536, 0, ro_segs,
- 1, &ro_nsegs, BUS_DMA_NOWAIT)) {
- printf("failed to allocate DMA memory for rasops tile!\n");
- goto fail10;
- }
-
- if (bus_dmamem_map(gsc->dmat, ro_segs, ro_nsegs, GBE_TILE_SIZE,
- &screen->ro, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) {
- printf("failed to map DMA memory for rasops tile!\n");
- goto fail11;
- }
-
- if (bus_dmamap_load(gsc->dmat, ro_dmamap, screen->ro, GBE_TILE_SIZE,
- NULL, BUS_DMA_NOWAIT)) {
- printf("failed to load DMA map for rasops tile\n");
- goto fail12;
- }
-
- screen->tm_phys = tm_dmamap->dm_segs[0].ds_addr;
- screen->fb_phys = fb_dmamap->dm_segs[0].ds_addr;
- screen->ro_phys = ro_dmamap->dm_segs[0].ds_addr;
-
- gbe_init_screen(screen);
- gbe_disable(gsc);
- gbe_setup(gsc);
- gbe_enable(gsc);
-
- /* Load colourmap if required. */
- if (screen->depth == 8)
- gbe_loadcmap(screen, 0, 255);
-
- /* Clear framebuffer. */
- gbe_fillrect(gsc, 0, 0, screen->width, screen->height, 0);
-
- printf("rev %u, %iMB, %dx%d at %d bits\n", gsc->rev,
- screen->fb_size >> 20, screen->width, screen->height,
- screen->depth);
-
- /*
- * Attach wsdisplay.
- */
-
- /* Attach as console if necessary. */
- if (strncmp(bios_console, "video", 5) == 0) {
- screen->ri.ri_ops.pack_attr(&screen->ri, 0, 0, 0, &attr);
- wsdisplay_cnattach(&gbe_stdscreen, &screen->ri, 0, 0, attr);
- gsc->console = 1;
- }
-
- waa.console = gsc->console;
- waa.scrdata = &gbe_screenlist;
- waa.accessops = &gbe_accessops;
- waa.accesscookie = screen;
- waa.defaultscreens = 0;
- config_found(self, &waa, wsemuldisplaydevprint);
-
- return;
-
-fail12:
- bus_dmamem_unmap(gsc->dmat, screen->ro, GBE_TILE_SIZE);
-fail11:
- bus_dmamem_free(gsc->dmat, ro_segs, ro_nsegs);
-fail10:
- bus_dmamap_destroy(gsc->dmat, ro_dmamap);
-fail9:
- bus_dmamap_unload(gsc->dmat, fb_dmamap);
-fail8:
- bus_dmamem_unmap(gsc->dmat, screen->fb, screen->fb_size);
-fail7:
- bus_dmamem_free(gsc->dmat, fb_segs, fb_nsegs);
-fail6:
- bus_dmamap_destroy(gsc->dmat, fb_dmamap);
-fail5:
- bus_dmamap_unload(gsc->dmat, tm_dmamap);
-fail4:
- bus_dmamem_unmap(gsc->dmat, screen->tm, screen->tm_size);
-fail3:
- bus_dmamem_free(gsc->dmat, tm_segs, tm_nsegs);
-fail2:
- bus_dmamap_destroy(gsc->dmat, tm_dmamap);
-fail1:
- bus_space_unmap(gsc->iot, gsc->re_ioh, RE_REG_SIZE);
-fail0:
- bus_space_unmap(gsc->iot, gsc->ioh, GBE_REG_SIZE);
-}
-
-int
-gbe_activate(struct device *self, int act)
-{
- struct gbe_softc *gsc = (struct gbe_softc *)self;
- int ret = 0;
-
- switch (act) {
- case DVACT_POWERDOWN:
- gbe_disable(gsc);
- break;
- }
-
- return (ret);
-}
-
-/*
- * GBE hardware specific functions.
- */
-
-void
-gbe_init_screen(struct gbe_screen *screen)
-{
- uint16_t *tm;
- int i;
-
- /*
- * Initialise screen.
- */
- screen->mode = WSDISPLAYIO_MODE_EMUL;
-
- /* Initialise rasops. */
- memset(&screen->ri, 0, sizeof(struct rasops_info));
-
- screen->ri.ri_flg = RI_CENTER;
- screen->ri.ri_depth = screen->depth;
- screen->ri.ri_width = screen->width;
- screen->ri.ri_height = screen->height;
- screen->ri.ri_bits = (void *)screen->fb;
- screen->ri.ri_stride = screen->linebytes;
-
- if (screen->depth == 32) {
- screen->ri.ri_rpos = 24;
- screen->ri.ri_rnum = 8;
- screen->ri.ri_gpos = 16;
- screen->ri.ri_gnum = 8;
- screen->ri.ri_bpos = 8;
- screen->ri.ri_bnum = 8;
- } else if (screen->depth == 16) {
- screen->ri.ri_rpos = 10;
- screen->ri.ri_rnum = 5;
- screen->ri.ri_gpos = 5;
- screen->ri.ri_gnum = 5;
- screen->ri.ri_bpos = 0;
- screen->ri.ri_bnum = 5;
- }
-
- rasops_init(&screen->ri, screen->height / 8, screen->width / 8);
-
- /* Create a rasops instance that can draw into a single tile. */
- memcpy(&screen->ri_tile, &screen->ri, sizeof(struct rasops_info));
- screen->ri_tile.ri_flg = 0;
- screen->ri_tile.ri_width = GBE_TILE_WIDTH >> (screen->depth >> 4);
- screen->ri_tile.ri_height = GBE_TILE_HEIGHT;
- screen->ri_tile.ri_stride = screen->ri_tile.ri_width *
- screen->depth / 8;
- screen->ri_tile.ri_xorigin = 0;
- screen->ri_tile.ri_yorigin = 0;
- screen->ri_tile.ri_bits = screen->ro;
- screen->ri_tile.ri_origbits = screen->ro;
- screen->ro_curpos = 0;
-
- screen->ri.ri_hw = screen->sc;
-
- screen->ri.ri_do_cursor = gbe_do_cursor;
- screen->ri.ri_ops.putchar = gbe_putchar;
- screen->ri.ri_ops.copyrows = gbe_copyrows;
- screen->ri.ri_ops.copycols = gbe_copycols;
- screen->ri.ri_ops.eraserows = gbe_eraserows;
- screen->ri.ri_ops.erasecols = gbe_erasecols;
-
- gbe_stdscreen.ncols = screen->ri.ri_cols;
- gbe_stdscreen.nrows = screen->ri.ri_rows;
- gbe_stdscreen.textops = &screen->ri.ri_ops;
- gbe_stdscreen.fontwidth = screen->ri.ri_font->fontwidth;
- gbe_stdscreen.fontheight = screen->ri.ri_font->fontheight;
- gbe_stdscreen.capabilities = screen->ri.ri_caps;
-
- /*
- * Map framebuffer into tilemap. Each entry in the tilemap is 16 bits
- * wide. Each tile is 64KB or 2^16 bits, hence the last 16 bits of the
- * address will range from 0x0000 to 0xffff. As a result we simply
- * discard the lower 16 bits and store bits 17 through 32 as an entry
- * in the tilemap.
- */
- tm = (void *)screen->tm;
- for (i = 0; i < (screen->fb_size >> GBE_TILE_SHIFT) &&
- i < GBE_TLB_SIZE; i++)
- tm[i] = (screen->fb_phys >> GBE_TILE_SHIFT) + i;
-}
-
-void
-gbe_enable(struct gbe_softc *gsc)
-{
- struct gbe_screen *screen = gsc->curscr;
- uint32_t val;
- int i;
-
- /* Enable dot clock. */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_DOTCLOCK);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_DOTCLOCK,
- val | GBE_DOTCLOCK_RUN);
- for (i = 0; i < 10000; i++) {
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_DOTCLOCK);
- if ((val & GBE_DOTCLOCK_RUN) == GBE_DOTCLOCK_RUN)
- break;
- delay(10);
- }
- if (i == 10000)
- printf("timeout enabling dot clock!\n");
-
- /* Unfreeze pixel counter. */
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_VT_XY, 0);
- for (i = 0; i < 10000; i++) {
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_XY);
- if ((val & GBE_VT_XY_FREEZE) == 0)
- break;
- delay(10);
- }
- if (i == 10000)
- printf("timeout unfreezing pixel counter!\n");
-
- /* Disable sync-on-green. */
- if (strcmp(osloadoptions, "nosog") == 0)
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_VT_FLAGS,
- GBE_VT_SYNC_LOW);
-
- /* Provide GBE with address of tilemap and enable DMA. */
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_CTRL,
- ((screen->tm_phys >> 9) <<
- GBE_FB_CTRL_TILE_PTR_SHIFT) | GBE_FB_CTRL_DMA_ENABLE);
-}
-
-void
-gbe_disable(struct gbe_softc *gsc)
-{
- uint32_t val;
- int i;
-
- /* Nothing to do if the pixel counter is frozen! */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_XY);
- if ((val & GBE_VT_XY_FREEZE) == GBE_VT_XY_FREEZE)
- return;
-
- /* Enable sync-on-green. */
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_VT_FLAGS, 0);
-
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_DOTCLOCK);
- if ((val & GBE_DOTCLOCK_RUN) == 0)
- return;
-
- /* Disable overlay and turn off hardware cursor. */
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_OVERLAY_TILE, 0);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_CURSOR_CTRL, 0);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_DID_CTRL, 0);
-
- /* Disable DMA. */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_OVERLAY_CTRL);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_OVERLAY_CTRL,
- val & ~GBE_OVERLAY_CTRL_DMA_ENABLE);
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_FB_CTRL);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_CTRL,
- val & ~GBE_FB_CTRL_DMA_ENABLE);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_DID_CTRL, 0);
- for (i = 0; i < 100000; i++) {
- if ((bus_space_read_4(gsc->iot, gsc->ioh, GBE_OVERLAY_HW_CTRL)
- & GBE_OVERLAY_CTRL_DMA_ENABLE) == 0 &&
- (bus_space_read_4(gsc->iot, gsc->ioh, GBE_FB_HW_CTRL)
- & GBE_FB_CTRL_DMA_ENABLE) == 0 &&
- bus_space_read_4(gsc->iot, gsc->ioh, GBE_DID_HW_CTRL) == 0)
- break;
- delay(10);
- }
- if (i == 100000)
- printf("timeout disabling DMA!\n");
-
- /* Wait for the end of pixel refresh. */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_VPIX)
- & GBE_VT_VPIX_OFF_MASK;
- for (i = 0; i < 100000; i++) {
- if (((bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_XY)
- & GBE_VT_XY_Y_MASK) >> GBE_VT_XY_Y_SHIFT) < val)
- break;
- delay(1);
- }
- if (i == 100000)
- printf("timeout waiting for pixel refresh!\n");
- for (i = 0; i < 100000; i++) {
- if (((bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_XY)
- & GBE_VT_XY_Y_MASK) >> GBE_VT_XY_Y_SHIFT) > val)
- break;
- delay(1);
- }
- if (i == 100000)
- printf("timeout waiting for pixel refresh!\n");
-
- /* Freeze pixel counter. */
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_VT_XY, GBE_VT_XY_FREEZE);
- for (i = 0; i < 100000; i++) {
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_XY);
- if ((val & GBE_VT_XY_FREEZE) == GBE_VT_XY_FREEZE)
- break;
- delay(10);
- }
- if (i == 100000)
- printf("timeout freezing pixel counter!\n");
-
- /* Disable dot clock. */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_DOTCLOCK);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_DOTCLOCK,
- val & ~GBE_DOTCLOCK_RUN);
- for (i = 0; i < 100000; i++) {
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_DOTCLOCK);
- if ((val & GBE_DOTCLOCK_RUN) == 0)
- break;
- delay(10);
- }
- if (i == 100000)
- printf("timeout disabling dot clock!\n");
-
- /* Reset DMA fifo. */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_FB_SIZE_TILE);
- val &= ~(1 << GBE_FB_SIZE_TILE_FIFO_RESET_SHIFT);
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_SIZE_TILE,
- val | (1 << GBE_FB_SIZE_TILE_FIFO_RESET_SHIFT));
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_SIZE_TILE, val);
-}
-
-void
-gbe_setup(struct gbe_softc *gsc)
-{
- struct gbe_screen *screen = gsc->curscr;
- int i, t, cmode, tile_width, tiles_x, tiles_y;
- u_char *colour;
- uint16_t *tm;
- uint32_t val;
- uint64_t reg;
-
- /*
- * Setup framebuffer.
- */
- switch (screen->depth) {
- case 32:
- cmode = GBE_CMODE_RGB8;
- screen->bufmode = COLOUR_DEPTH_32 << BUFMODE_BUFDEPTH_SHIFT |
- PIXEL_TYPE_RGB << BUFMODE_PIXTYPE_SHIFT |
- COLOUR_DEPTH_32 << BUFMODE_PIXDEPTH_SHIFT;
- break;
- case 16:
- cmode = GBE_CMODE_ARGB5;
- screen->bufmode = COLOUR_DEPTH_16 << BUFMODE_BUFDEPTH_SHIFT |
- PIXEL_TYPE_RGBA << BUFMODE_PIXTYPE_SHIFT |
- COLOUR_DEPTH_16 << BUFMODE_PIXDEPTH_SHIFT;
- break;
- case 8:
- default:
- cmode = GBE_CMODE_I8;
- screen->bufmode = COLOUR_DEPTH_8 << BUFMODE_BUFDEPTH_SHIFT |
- PIXEL_TYPE_CI << BUFMODE_PIXTYPE_SHIFT |
- COLOUR_DEPTH_8 << BUFMODE_PIXDEPTH_SHIFT;
- break;
- }
-
- /* Calculate tile width in bytes and screen size in tiles. */
- tile_width = GBE_TILE_WIDTH >> (screen->depth >> 4);
- tiles_x = (screen->width + tile_width - 1) >>
- (GBE_TILE_WIDTH_SHIFT - (screen->depth >> 4));
- tiles_y = (screen->height + GBE_TILE_HEIGHT - 1) >>
- GBE_TILE_HEIGHT_SHIFT;
-
- if (screen->mode != WSDISPLAYIO_MODE_EMUL) {
-
- /*
- * Setup the framebuffer in "linear" mode. We trick the
- * framebuffer into linear mode by telling it that it is one
- * tile wide and specifying an adjusted framebuffer height.
- */
-
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_SIZE_TILE,
- ((screen->depth >> 4) << GBE_FB_SIZE_TILE_DEPTH_SHIFT) |
- (1 << GBE_FB_SIZE_TILE_WIDTH_SHIFT));
-
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_SIZE_PIXEL,
- (screen->width * screen->height / tile_width) <<
- GBE_FB_SIZE_PIXEL_HEIGHT_SHIFT);
-
- } else {
-
- /*
- * Setup the framebuffer in tiled mode. Provide the tile
- * colour depth, screen width in whole and partial tiles,
- * and the framebuffer height in pixels.
- */
-
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_SIZE_TILE,
- ((screen->depth >> 4) << GBE_FB_SIZE_TILE_DEPTH_SHIFT) |
- ((screen->width / tile_width) <<
- GBE_FB_SIZE_TILE_WIDTH_SHIFT) |
- (((screen->width % tile_width) >> (screen->depth >> 4)) /
- 32));
-
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_FB_SIZE_PIXEL,
- screen->height << GBE_FB_SIZE_PIXEL_HEIGHT_SHIFT);
-
- }
-
- /* Set colour mode registers. */
- val = (cmode << GBE_WID_MODE_SHIFT) | GBE_BMODE_BOTH;
- for (i = 0; i < (32 * 4); i += 4)
- bus_space_write_4(gsc->iot, gsc->ioh, GBE_MODE + i, val);
-
- /*
- * Initialise colourmap if required.
- */
- if (screen->depth == 8) {
- for (i = 0; i < 16; i++) {
- colour = (u_char *)&rasops_cmap[i * 3];
- screen->cmap.cm_red[i] = colour[0];
- screen->cmap.cm_green[i] = colour[1];
- screen->cmap.cm_blue[i] = colour[2];
- }
- for (i = 240; i < 256; i++) {
- colour = (u_char *)&rasops_cmap[i * 3];
- screen->cmap.cm_red[i] = colour[0];
- screen->cmap.cm_green[i] = colour[1];
- screen->cmap.cm_blue[i] = colour[2];
- }
- }
-
- /*
- * Setup an alpha ramp.
- */
- for (i = 0; i < GBE_GMAP_ENTRIES; i++)
- bus_space_write_4(gsc->iot, gsc->ioh,
- GBE_GMAP + i * sizeof(u_int32_t),
- (i << 24) | (i << 16) | (i << 8));
-
- /*
- * Initialise the rendering engine.
- */
- val = screen->mode | BUF_TYPE_TLB_A << BUFMODE_BUFTYPE_SHIFT;
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_BUFMODE_SRC, val);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_BUFMODE_DST, val);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_CLIPMODE, 0);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_COLOUR_MASK, 0xffffffff);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_PIXEL_XFER_X_STEP, 1);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_PIXEL_XFER_Y_STEP, 1);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_WINOFFSET_DST, 0);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_WINOFFSET_SRC, 0);
-
- /*
- * Load framebuffer tiles into TLB A. Each TLB consists of a 16x16
- * tile array representing 2048x2048 pixels. Each entry in the TLB
- * consists of four 16-bit entries which represent bits 17:32 of the
- * 64KB tile address. As a result, we can make use of the tilemap
- * which already stores tile entries in the same format.
- */
- tm = (void *)screen->tm;
- for (i = 0, t = 0; i < GBE_TLB_SIZE; i++) {
- reg <<= 16;
- if (i % 16 < tiles_x)
- reg |= (tm[t++] | 0x8000);
- if (i % 4 == 3)
- bus_space_write_8(gsc->iot, gsc->re_ioh,
- RE_TLB_A + (i >> 2) * 8, reg);
- }
-
- /* Load single tile into TLB B for rasops. */
- bus_space_write_8(gsc->iot, gsc->re_ioh,
- RE_TLB_B, (screen->ro_phys >> 16 | 0x8000) << 48);
-}
-
-void
-gbe_wait_re_idle(struct gbe_softc *gsc)
-{
- int i;
-
- /* Wait until rendering engine is idle. */
- for (i = 0; i < 100000; i++) {
- if (bus_space_read_4(gsc->iot, gsc->re_ioh, RE_PP_STATUS) &
- RE_PP_STATUS_IDLE)
- break;
- delay(1);
- }
- if (i == 100000)
- printf("%s: rendering engine did not become idle!\n",
- gsc->sc_dev.dv_xname);
-}
-
-/*
- * Interfaces for wscons.
- */
-
-int
-gbe_ioctl(void *v, u_long cmd, caddr_t data, int flags, struct proc *p)
-{
- struct gbe_screen *screen = (struct gbe_screen *)v;
- int rc, mode;
-
- switch (cmd) {
- case WSDISPLAYIO_GTYPE:
- *(u_int *)data = WSDISPLAY_TYPE_GBE;
- break;
-
- case WSDISPLAYIO_GINFO:
- {
- struct wsdisplay_fbinfo *fb = (struct wsdisplay_fbinfo *)data;
-
- fb->height = screen->height;
- fb->width = screen->width;
- fb->depth = screen->depth;
- fb->cmsize = screen->depth == 8 ? 256 : 0;
- }
- break;
-
- case WSDISPLAYIO_LINEBYTES:
- *(u_int *)data = screen->linebytes;
- break;
-
- case WSDISPLAYIO_GETCMAP:
- if (screen->depth == 8) {
- struct wsdisplay_cmap *cm =
- (struct wsdisplay_cmap *)data;
-
- rc = gbe_getcmap(&screen->cmap, cm);
- if (rc != 0)
- return (rc);
- }
- break;
-
- case WSDISPLAYIO_PUTCMAP:
- if (screen->depth == 8) {
- struct wsdisplay_cmap *cm =
- (struct wsdisplay_cmap *)data;
-
- rc = gbe_putcmap(&screen->cmap, cm);
- if (rc != 0)
- return (rc);
- gbe_loadcmap(screen, cm->index, cm->index + cm->count);
- }
- break;
-
- case WSDISPLAYIO_GMODE:
- *(u_int *)data = screen->mode;
- break;
-
- case WSDISPLAYIO_SMODE:
- mode = *(u_int *)data;
- if (mode == WSDISPLAYIO_MODE_EMUL ||
- mode == WSDISPLAYIO_MODE_MAPPED ||
- mode == WSDISPLAYIO_MODE_DUMBFB) {
-
- screen->mode = mode;
-
- gbe_disable((struct gbe_softc *)screen->sc);
- gbe_setup((struct gbe_softc *)screen->sc);
- gbe_enable((struct gbe_softc *)screen->sc);
-
- /* Clear framebuffer if entering emulated mode. */
- if (screen->mode == WSDISPLAYIO_MODE_EMUL)
- gbe_fillrect((struct gbe_softc *)screen->sc,
- 0, 0, screen->width, screen->height, 0);
- }
- break;
-
- case WSDISPLAYIO_GVIDEO:
- case WSDISPLAYIO_SVIDEO:
- /* Handled by the upper layer. */
- break;
-
- default:
- return (-1);
- }
-
- return (0);
-}
-
-paddr_t
-gbe_mmap(void *v, off_t offset, int protection)
-{
- struct gbe_screen *screen = (void *)v;
- paddr_t pa;
-
- if (offset >= 0 && offset < screen->fb_size)
- pa = screen->fb_phys + offset;
- else
- pa = -1;
-
- return (pa);
-}
-
-int
-gbe_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep,
- int *curxp, int *curyp, uint32_t *attrp)
-{
- struct gbe_screen *screen = (struct gbe_screen *)v;
- struct gbe_softc *gsc = (struct gbe_softc *)screen->sc;
-
- /* We do not allow multiple consoles at the moment. */
- if (gsc->screens > 0)
- return (ENOMEM);
-
- gsc->screens++;
-
- /* Return rasops_info via cookie. */
- *cookiep = &screen->ri;
-
- /* Move cursor to top left of screen. */
- *curxp = 0;
- *curyp = 0;
-
- /* Correct screen attributes. */
- screen->ri.ri_ops.pack_attr(&screen->ri, 0, 0, 0, attrp);
-
- return (0);
-}
-
-void
-gbe_free_screen(void *v, void *cookie)
-{
- /* We do not allow multiple consoles at the moment. */
-}
-
-int
-gbe_show_screen(void *v, void *cookie, int waitok, void (*cb)(void *, int, int),
- void *cbarg)
-{
- /* We do not allow multiple consoles at the moment. */
- return (0);
-}
-
-int
-gbe_load_font(void *v, void *emulcookie, struct wsdisplay_font *font)
-{
- struct gbe_screen *screen = (struct gbe_screen *)v;
-
- return rasops_load_font(&screen->ri, emulcookie, font);
-}
-
-int
-gbe_list_font(void *v, struct wsdisplay_font *font)
-{
- struct gbe_screen *screen = (struct gbe_screen *)v;
-
- return rasops_list_font(&screen->ri, font);
-}
-
-/*
- * Colour map handling for indexed modes.
- */
-
-void
-gbe_setcolour(struct gbe_softc *gsc, u_int index, u_int8_t r, u_int8_t g,
- u_int8_t b)
-{
- int i;
-
- /* Wait until the colourmap FIFO has free space. */
- for (i = 0; i < 10000; i++) {
- if (bus_space_read_4(gsc->iot, gsc->ioh, GBE_CMAP_FIFO)
- < GBE_CMAP_FIFO_ENTRIES)
- break;
- delay(10);
- }
- if (i == 10000)
- printf("colourmap FIFO has no free space!\n");
-
- bus_space_write_4(gsc->iot, gsc->ioh,
- GBE_CMAP + index * sizeof(u_int32_t),
- ((u_int)r << 24) | ((u_int)g << 16) | ((u_int)b << 8));
-}
-
-int
-gbe_getcmap(struct gbe_cmap *cm, struct wsdisplay_cmap *rcm)
-{
- u_int index = rcm->index, count = rcm->count;
- int rc;
-
- if (index >= 256 || count > 256 - index)
- return (EINVAL);
-
- if ((rc = copyout(&cm->cm_red[index], rcm->red, count)) != 0)
- return (rc);
- if ((rc = copyout(&cm->cm_green[index], rcm->green, count)) != 0)
- return (rc);
- if ((rc = copyout(&cm->cm_blue[index], rcm->blue, count)) != 0)
- return (rc);
-
- return (0);
-}
-
-int
-gbe_putcmap(struct gbe_cmap *cm, struct wsdisplay_cmap *rcm)
-{
- u_int index = rcm->index, count = rcm->count;
- int rc;
-
- if (index >= 256 || count > 256 - index)
- return (EINVAL);
-
- if ((rc = copyin(rcm->red, &cm->cm_red[index], count)) != 0)
- return (rc);
- if ((rc = copyin(rcm->green, &cm->cm_green[index], count)) != 0)
- return (rc);
- if ((rc = copyin(rcm->blue, &cm->cm_blue[index], count)) != 0)
- return (rc);
-
- return (0);
-}
-
-void
-gbe_loadcmap(struct gbe_screen *screen, u_int start, u_int end)
-{
- struct gbe_softc *gsc = (void *)screen->sc;
- struct gbe_cmap *cm = &screen->cmap;
-
- for (; start <= end; start++)
- gbe_setcolour(gsc, start,
- cm->cm_red[start], cm->cm_green[start], cm->cm_blue[start]);
-}
-
-/*
- * Hardware accelerated functions for rasops.
- */
-
-void
-gbe_rop(struct gbe_softc *gsc, int x, int y, int w, int h, int op)
-{
- gbe_wait_re_idle(gsc);
-
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_PRIMITIVE,
- PRIMITIVE_RECTANGLE | PRIMITIVE_LRTB);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_DRAWMODE,
- DRAWMODE_BITMASK | DRAWMODE_BYTEMASK | DRAWMODE_PIXEL_XFER |
- DRAWMODE_LOGIC_OP);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_LOGIC_OP, op);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_PIXEL_XFER_SRC,
- (x << 16) | (y & 0xffff));
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_VERTEX_X_0,
- (x << 16) | (y & 0xffff));
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_VERTEX_X_1 | RE_START,
- ((x + w - 1) << 16) | ((y + h - 1) & 0xffff));
-}
-
-void
-gbe_copyrect(struct gbe_softc *gsc, int src, int sx, int sy, int dx, int dy,
- int w, int h)
-{
- int direction, x0, y0, x1, y1;
-
- if (sx >= dx && sy >= dy) {
- direction = PRIMITIVE_LRTB;
- x0 = dx;
- y0 = dy;
- x1 = dx + w - 1;
- y1 = dy + h - 1;
- } else if (sx >= dx && sy < dy) {
- direction = PRIMITIVE_LRBT;
- sy = sy + h - 1;
- x0 = dx;
- y0 = dy + h - 1;
- x1 = dx + w - 1;
- y1 = dy;
- } else if (sx < dx && sy >= dy) {
- direction = PRIMITIVE_RLTB;
- sx = sx + w - 1;
- x0 = dx + w - 1;
- y0 = dy;
- x1 = dx;
- y1 = dy + h - 1;
- } else if (sx < dx && sy < dy) {
- direction = PRIMITIVE_RLBT;
- sy = sy + h - 1;
- sx = sx + w - 1;
- x0 = dx + w - 1;
- y0 = dy + h - 1;
- x1 = dx;
- y1 = dy;
- }
-
- gbe_wait_re_idle(gsc);
-
- if (src != BUF_TYPE_TLB_A)
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_BUFMODE_SRC,
- gsc->curscr->bufmode | (src << BUFMODE_BUFTYPE_SHIFT));
-
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_PRIMITIVE,
- PRIMITIVE_RECTANGLE | direction);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_DRAWMODE,
- DRAWMODE_BITMASK | DRAWMODE_BYTEMASK | DRAWMODE_PIXEL_XFER);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_PIXEL_XFER_SRC,
- (sx << 16) | (sy & 0xffff));
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_VERTEX_X_0,
- (x0 << 16) | (y0 & 0xffff));
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_VERTEX_X_1 | RE_START,
- (x1 << 16) | (y1 & 0xffff));
-
- if (src != BUF_TYPE_TLB_A) {
- gbe_wait_re_idle(gsc);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_BUFMODE_SRC,
- gsc->curscr->bufmode |
- (BUF_TYPE_TLB_A << BUFMODE_BUFTYPE_SHIFT));
- }
-}
-
-void
-gbe_fillrect(struct gbe_softc *gsc, int x, int y, int w, int h, int bg)
-{
-
- gbe_wait_re_idle(gsc);
-
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_PRIMITIVE,
- PRIMITIVE_RECTANGLE | PRIMITIVE_LRTB);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_DRAWMODE,
- DRAWMODE_BITMASK | DRAWMODE_BYTEMASK);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_SHADE_FG_COLOUR, bg);
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_VERTEX_X_0,
- (x << 16) | (y & 0xffff));
- bus_space_write_4(gsc->iot, gsc->re_ioh, RE_PP_VERTEX_X_1 | RE_START,
- ((x + w - 1) << 16) | ((y + h - 1) & 0xffff));
-}
-
-int
-gbe_do_cursor(struct rasops_info *ri)
-{
- struct gbe_softc *sc = ri->ri_hw;
- int y, x, w, h;
-
- w = ri->ri_font->fontwidth;
- h = ri->ri_font->fontheight;
- x = ri->ri_xorigin + ri->ri_ccol * w;
- y = ri->ri_yorigin + ri->ri_crow * h;
-
- gbe_rop(sc, x, y, w, h, OPENGL_LOGIC_OP_COPY_INVERTED);
-
- return 0;
-}
-
-int
-gbe_putchar(void *cookie, int row, int col, u_int uc, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct gbe_softc *gsc = ri->ri_hw;
- struct gbe_screen *screen = gsc->curscr;
- struct rasops_info *ri_tile = &screen->ri_tile;
- int x, y, w, h;
-
- w = ri->ri_font->fontwidth;
- h = ri->ri_font->fontheight;
- x = ri->ri_xorigin + col * w;
- y = ri->ri_yorigin + row * h;
-
- ri_tile->ri_ops.putchar(ri_tile, 0, screen->ro_curpos, uc, attr);
-
- gbe_copyrect(gsc, BUF_TYPE_TLB_B, screen->ro_curpos * w, 0, x, y, w, h);
-
- screen->ro_curpos++;
- if ((screen->ro_curpos + 1) * w > screen->ri_tile.ri_width)
- screen->ro_curpos = 0;
-
- return 0;
-}
-
-int
-gbe_copycols(void *cookie, int row, int src, int dst, int num)
-{
- struct rasops_info *ri = cookie;
- struct gbe_softc *sc = ri->ri_hw;
-
- num *= ri->ri_font->fontwidth;
- src *= ri->ri_font->fontwidth;
- dst *= ri->ri_font->fontwidth;
- row *= ri->ri_font->fontheight;
-
- gbe_copyrect(sc, BUF_TYPE_TLB_A, ri->ri_xorigin + src,
- ri->ri_yorigin + row, ri->ri_xorigin + dst, ri->ri_yorigin + row,
- num, ri->ri_font->fontheight);
-
- return 0;
-}
-
-int
-gbe_erasecols(void *cookie, int row, int col, int num, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct gbe_softc *sc = ri->ri_hw;
- int bg, fg;
-
- ri->ri_ops.unpack_attr(cookie, attr, &fg, &bg, NULL);
-
- row *= ri->ri_font->fontheight;
- col *= ri->ri_font->fontwidth;
- num *= ri->ri_font->fontwidth;
-
- gbe_fillrect(sc, ri->ri_xorigin + col, ri->ri_yorigin + row,
- num, ri->ri_font->fontheight, ri->ri_devcmap[bg]);
-
- return 0;
-}
-
-int
-gbe_copyrows(void *cookie, int src, int dst, int num)
-{
- struct rasops_info *ri = cookie;
- struct gbe_softc *sc = ri->ri_hw;
-
- num *= ri->ri_font->fontheight;
- src *= ri->ri_font->fontheight;
- dst *= ri->ri_font->fontheight;
-
- gbe_copyrect(sc, BUF_TYPE_TLB_A, ri->ri_xorigin, ri->ri_yorigin + src,
- ri->ri_xorigin, ri->ri_yorigin + dst, ri->ri_emuwidth, num);
-
- return 0;
-}
-
-int
-gbe_eraserows(void *cookie, int row, int num, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct gbe_softc *sc = ri->ri_hw;
- int x, y, w, bg, fg;
-
- ri->ri_ops.unpack_attr(cookie, attr, &fg, &bg, NULL);
-
- if ((num == ri->ri_rows) && ISSET(ri->ri_flg, RI_FULLCLEAR)) {
- num = ri->ri_height;
- x = y = 0;
- w = ri->ri_width;
- } else {
- num *= ri->ri_font->fontheight;
- x = ri->ri_xorigin;
- y = ri->ri_yorigin + row * ri->ri_font->fontheight;
- w = ri->ri_emuwidth;
- }
-
- gbe_fillrect(sc, x, y, w, num, ri->ri_devcmap[bg]);
-
- return 0;
-}
-
-/*
- * Console functions for early display.
- */
-
-int
-gbe_cnprobe(bus_space_tag_t iot, bus_addr_t addr)
-{
- bus_space_handle_t ioh;
- int val, width, height;
-
- /* Setup bus space mapping. */
- ioh = PHYS_TO_XKPHYS(addr, CCA_NC);
-
- /* Determine resolution configured by firmware. */
- val = bus_space_read_4(iot, ioh, GBE_VT_HCMAP);
- width = (val >> GBE_VT_HCMAP_ON_SHIFT) & 0xfff;
- val = bus_space_read_4(iot, ioh, GBE_VT_VCMAP);
- height = (val >> GBE_VT_VCMAP_ON_SHIFT) & 0xfff;
-
- /* Ensure that the firmware has setup the device. */
- if (width != 0 && height != 0)
- return (1);
- else
- return (0);
-}
-
-int
-gbe_cnattach(bus_space_tag_t iot, bus_addr_t addr)
-{
- struct gbe_softc *gsc;
- uint32_t val;
- paddr_t pa;
- vaddr_t va;
- uint32_t attr;
-
- /*
- * Setup GBE for use as early console.
- */
- va = pmap_steal_memory(sizeof(struct gbe_softc), NULL, NULL);
- gsc = (struct gbe_softc *)va;
- gsc->curscr = &gbe_consdata;
- gbe_consdata.sc = (struct device *)gsc;
-
- /* Setup bus space mapping. */
- gsc->iot = iot;
- gsc->ioh = PHYS_TO_XKPHYS(addr, CCA_NC);
- gsc->re_ioh = PHYS_TO_XKPHYS(RE_BASE, CCA_NC);
-
- /* Determine GBE revision. */
- gsc->rev = bus_space_read_4(gsc->iot, gsc->ioh, GBE_CTRL_STAT) & 0xf;
-
- /* Determine resolution configured by firmware. */
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_HCMAP);
- gbe_consdata.width = (val >> GBE_VT_HCMAP_ON_SHIFT) & 0xfff;
- val = bus_space_read_4(gsc->iot, gsc->ioh, GBE_VT_VCMAP);
- gbe_consdata.height = (val >> GBE_VT_VCMAP_ON_SHIFT) & 0xfff;
-
- /* Ensure that the firmware has setup the device. */
- if (gbe_consdata.width == 0 || gbe_consdata.height == 0)
- return (ENXIO);
-
- /* Setup screen defaults. */
- gbe_consdata.fb_size = GBE_FB_SIZE;
- gbe_consdata.tm_size = GBE_TLB_SIZE * sizeof(uint16_t);
- gbe_consdata.depth = 8;
- gbe_consdata.linebytes = gbe_consdata.width * gbe_consdata.depth / 8;
-
- /*
- * Steal memory for tilemap - 64KB aligned and coherent.
- */
- va = pmap_steal_memory(gbe_consdata.tm_size + 65536, NULL, NULL);
- pmap_extract(pmap_kernel(), va, &pa);
- gbe_consdata.tm_phys = ((pa >> 16) + 1) << 16;
- gbe_consdata.tm = (caddr_t)PHYS_TO_XKPHYS(gbe_consdata.tm_phys, CCA_NC);
-
- /*
- * Steal memory for framebuffer - 64KB aligned and coherent.
- */
- va = pmap_steal_memory(gbe_consdata.fb_size + 65536, NULL, NULL);
- pmap_extract(pmap_kernel(), va, &pa);
- gbe_consdata.fb_phys = ((pa >> 16) + 1) << 16;
- gbe_consdata.fb = (caddr_t)PHYS_TO_XKPHYS(gbe_consdata.fb_phys, CCA_NC);
-
- /*
- * Steal memory for rasops tile - 64KB aligned and coherent.
- */
- va = pmap_steal_memory(GBE_TILE_SIZE + 65536, NULL, NULL);
- pmap_extract(pmap_kernel(), va, &pa);
- gbe_consdata.ro_phys = ((pa >> 16) + 1) << 16;
- gbe_consdata.ro = (caddr_t)PHYS_TO_XKPHYS(gbe_consdata.ro_phys, CCA_NC);
-
- /*
- * Setup GBE hardware.
- */
- gbe_init_screen(&gbe_consdata);
- gbe_disable(gsc);
- gbe_setup(gsc);
- gbe_enable(gsc);
-
- /* Load colourmap if required. */
- if (gbe_consdata.depth == 8)
- gbe_loadcmap(&gbe_consdata, 0, 255);
-
- /* Clear framebuffer. */
- gbe_fillrect(gsc, 0, 0, gbe_consdata.width, gbe_consdata.height, 0);
-
- /*
- * Attach wsdisplay.
- */
- gbe_consdata.ri.ri_ops.pack_attr(&gbe_consdata.ri, 0, 0, 0, &attr);
- wsdisplay_cnattach(&gbe_stdscreen, &gbe_consdata.ri, 0, 0, attr);
- gbe_console = 1;
-
- return (0);
-}
+++ /dev/null
-/* $OpenBSD: gbereg.h,v 1.6 2012/05/29 17:37:09 mikeb Exp $ */
-
-/*
- * Copyright (c) 2007, Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * GBE Framebuffer for SGI O2.
- */
-
-#define GBE_BASE 0x16000000
-#define GBE_REG_SIZE 0x100000
-#define GBE_TLB_SIZE 128
-
-#define GBE_TILE_SHIFT 16
-#define GBE_TILE_SIZE (1 << GBE_TILE_SHIFT)
-
-#define GBE_TILE_WIDTH 512 /* Width of tile in bytes. */
-#define GBE_TILE_WIDTH_SHIFT 9
-#define GBE_TILE_HEIGHT 128 /* Height of tile in bytes. */
-#define GBE_TILE_HEIGHT_SHIFT 7
-
-/*
- * GBE Registers.
- */
-
-#define GBE_CTRL_STAT 0x00000000 /* General control/status */
-#define GBE_CURSOR_ON 0x00000001
-#define GBE_DOTCLOCK 0x00000004 /* Dotclock */
-#define GBE_DOTCLOCK_RUN 0x00100000 /* Enable dotclock */
-#define GBE_VT_XY 0x00010000 /* Current dot coordinates */
-#define GBE_VT_XY_X_SHIFT 0
-#define GBE_VT_XY_X_MASK 0x00000fff
-#define GBE_VT_XY_Y_SHIFT 12
-#define GBE_VT_XY_Y_MASK 0x00fff000
-#define GBE_VT_XY_FREEZE 0x80000000 /* Freeze pixel counter */
-#define GBE_VT_MAXXY 0x00010004 /* */
-#define GBE_VT_VSYNC 0x00010008 /* Vertical sync on/off */
-#define GBE_VT_HSYNC 0x0001000c /* Horizontal sync on/off */
-#define GBE_VT_VBLANK 0x00010010 /* Vertical blanking */
-#define GBE_VT_HBLANK 0x00010014 /* Horizontal blanking */
-#define GBE_VT_FLAGS 0x00010018 /* Video timing flags */
-#define GBE_VT_SYNC_LOW 0x00000020 /* Sync on green */
-#define GBE_VT_HPIX 0x00010034 /* Horizontal pixel on/off */
-#define GBE_VT_VPIX 0x00010038 /* Vertical pixel on/off */
-#define GBE_VT_VPIX_OFF_MASK 0x00000fff
-#define GBE_VT_VPIX_OFF_SHIFT 0
-#define GBE_VT_VPIX_ON_MASK 0x00fff000
-#define GBE_VT_VPIX_ON_SHIFT 12
-#define GBE_VT_HCMAP 0x0001003c /* Horizontal cmap write */
-#define GBE_VT_HCMAP_ON_SHIFT 12
-#define GBE_VT_VCMAP 0x00010040 /* Vertical cmap write */
-#define GBE_VT_VCMAP_ON_SHIFT 12
-#define GBE_VT_DIDSTARTXY 0x00010044 /* DID reset at x/y */
-#define GBE_VT_CRSSTARTXY 0x00010048 /* CRS reset at x/y */
-#define GBE_VT_VCSTARTXY 0x0001004c /* VC reset at x/y */
-#define GBE_OVERLAY_TILE 0x00020000 /* Overlay plane - tile width */
-#define GBE_OVERLAY_HW_CTRL 0x00020004 /* Overlay plane - h/w control */
-#define GBE_OVERLAY_CTRL 0x00020008 /* Overlay plane - control */
-#define GBE_OVERLAY_CTRL_DMA_ENABLE 0x00000001
-#define GBE_FB_SIZE_TILE 0x00030000 /* Framebuffer - tile size */
-#define GBE_FB_SIZE_TILE_WIDTH_SHIFT 5
-#define GBE_FB_SIZE_TILE_DEPTH_SHIFT 13
-#define GBE_FB_SIZE_TILE_FIFO_RESET_SHIFT 15
-#define GBE_FB_SIZE_PIXEL 0x00030004 /* Framebuffer - pixel size */
-#define GBE_FB_SIZE_PIXEL_HEIGHT_SHIFT 16
-#define GBE_FB_HW_CTRL 0x00030008 /* Framebuffer - hardware control */
-#define GBE_FB_CTRL 0x0003000c /* Framebuffer - control */
-#define GBE_FB_CTRL_TILE_PTR_SHIFT 9
-#define GBE_FB_CTRL_DMA_ENABLE 0x00000001
-#define GBE_DID_HW_CTRL 0x00040000 /* DID hardware control */
-#define GBE_DID_CTRL 0x00040004 /* DID control */
-#define GBE_MODE 0x00048000 /* Colour mode */
-#define GBE_WID_MODE_SHIFT 2
-#define GBE_CMAP 0x050000 /* Colourmap */
-#define GBE_CMAP_ENTRIES 6144
-#define GBE_CMAP_FIFO 0x058000 /* Colourmap FIFO status */
-#define GBE_CMAP_FIFO_ENTRIES 63
-#define GBE_GMAP 0x060000 /* Gammamap */
-#define GBE_GMAP_ENTRIES 256
-#define GBE_CURSOR_POS 0x00070000 /* Cursor position */
-#define GBE_CURSOR_CTRL 0x00070004 /* Cursor control */
-
-/*
- * GBE Constants.
- */
-
-#define GBE_FB_DEPTH_8 0
-#define GBE_FB_DEPTH_16 1
-#define GBE_FB_DEPTH_32 2
-
-#define GBE_CMODE_I8 0 /* 8 bit indexed */
-#define GBE_CMODE_I12 1 /* 12 bit indexed */
-#define GBE_CMODE_RG3B2 2 /* 3:3:2 direct */
-#define GBE_CMODE_RGB4 3 /* 4:4:4 direct */
-#define GBE_CMODE_ARGB5 4 /* 1:5:5:5 direct */
-#define GBE_CMODE_RGB8 5 /* 8:8:8 direct */
-#define GBE_CMODE_RGBA5 6 /* 5:5:5:5 direct */
-#define GBE_CMODE_RGB10 7 /* 10:10:10 direct */
-
-#define GBE_BMODE_BOTH 3
-
-/*
- * Rendering Engine Registers.
- */
-
-#define RE_BASE 0x15000000
-#define RE_REG_SIZE 0x5000
-#define RE_START 0x00000800 /* Start rendering operation. */
-
-/* TLB Registers. */
-#define RE_TLB_A 0x00001000 /* 256 16-bit tile entries. */
-#define RE_TLB_B 0x00001200
-#define RE_TLB_C 0x00001400
-#define RE_TLB_TEX 0x00001600
-#define RE_TLB_CLIP_ID 0x000016e0
-#define RE_TLB_LINEAR_A 0x00001700
-#define RE_TLB_LINEAR_B 0x00001780
-
-/* Pixel Pipeline Registers. */
-#define RE_PP_BUFMODE_SRC 0x00002000
-#define RE_PP_BUFMODE_DST 0x00002008
-#define RE_PP_CLIPMODE 0x00002010
-#define RE_PP_DRAWMODE 0x00002018
-#define DRAWMODE_STENCIL 0x1 << 0
-#define DRAWMODE_DEPTH_MASK 0x1 << 1
-#define DRAWMODE_DEPTH_TEST 0x1 << 2
-#define DRAWMODE_BYTEMASK 0xf << 3
-#define DRAWMODE_BITMASK 0x1 << 7
-#define DRAWMODE_DITHER 0x1 << 8
-#define DRAWMODE_LOGIC_OP 0x1 << 9
-#define DRAWMODE_ALPHA_BLEND 0x1 << 10
-#define DRAWMODE_PIXEL_XFER 0x1 << 21
-#define RE_PP_WINOFFSET_SRC 0x00002050
-#define RE_PP_WINOFFSET_DST 0x00002058
-#define RE_PP_PRIMITIVE 0x00002060 /* Drawing primitive. */
-#define PRIMITIVE_POINT 0x0 << 24
-#define PRIMITIVE_LINE 0x1 << 24
-#define PRIMITIVE_TRIANGLE 0x2 << 24
-#define PRIMITIVE_RECTANGLE 0x3 << 24
-#define PRIMITIVE_LRBT 0x0 << 16
-#define PRIMITIVE_RLBT 0x1 << 16
-#define PRIMITIVE_LRTB 0x2 << 16
-#define PRIMITIVE_RLTB 0x3 << 16
-#define RE_PP_VERTEX_X_0 0x00002070 /* (x0,y0) vertex. */
-#define RE_PP_VERTEX_X_1 0x00002074 /* (x1,y1) vertex. */
-#define RE_PP_VERTEX_X_2 0x00002078 /* (x2,y2) vertex. */
-#define RE_PP_PIXEL_XFER_SRC 0x000020a0 /* Pixel transfer source. */
-#define RE_PP_PIXEL_XFER_X_STEP 0x000020a8
-#define RE_PP_PIXEL_XFER_Y_STEP 0x000020ac
-#define RE_PP_STIPPLE_MODE 0x000020c0
-#define RE_PP_STIPPLE_PATTERN 0x000020c4
-#define RE_PP_SHADE_FG_COLOUR 0x000020d0
-#define RE_PP_SHADE_BG_COLOUR 0x000020d8
-#define RE_PP_LOGIC_OP 0x000021b0 /* Logic operation. */
-#define RE_PP_COLOUR_MASK 0x000021b8 /* Colour buffer plane mask. */
-#define COLOUR_MASK_NONE 0xffffffff
-#define RE_PP_NULL 0x000021f0
-#define RE_PP_FLUSH 0x000021f8
-
-#define BUFMODE_PIXDEPTH_SHIFT 2 /* Pixel colour depth. */
-#define BUFMODE_PIXTYPE_SHIFT 4 /* Pixel format. */
-#define BUFMODE_BUFDEPTH_SHIFT 8 /* Buffer colour depth. */
-#define BUFMODE_BUFTYPE_SHIFT 10 /* Source or destination. */
-
-/* Status Registers. */
-#define RE_PP_STATUS 0x00004000
-#define RE_PP_STATUS_IDLE 0x10000000
-#define RE_PP_STATUS_READY 0x02000000
-
-/*
- * Rendering Engine Constants.
- */
-
-#define COLOUR_DEPTH_8 0x0
-#define COLOUR_DEPTH_16 0x1
-#define COLOUR_DEPTH_32 0x2
-
-#define PIXEL_TYPE_CI 0x0
-#define PIXEL_TYPE_RGB 0x1
-#define PIXEL_TYPE_RGBA 0x2
-#define PIXEL_TYPE_ABGR 0x3
-
-#define BUF_TYPE_TLB_A 0x0
-#define BUF_TYPE_TLB_B 0x1
-#define BUF_TYPE_TLB_C 0x2
-#define BUF_TYPE_LINEAR_A 0x4
-#define BUF_TYPE_LINEAR_B 0x5
-
-/*
- * Console functions.
- */
-int gbe_cnprobe(bus_space_tag_t, bus_addr_t addr);
-int gbe_cnattach(bus_space_tag_t, bus_addr_t addr);
+++ /dev/null
-/* $OpenBSD: gl.h,v 1.1 2012/04/16 22:17:13 miod Exp $ */
-/*
- * Copyright (c) 2009, 2010 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * OpenGL defines
- */
-
-/* Logic Operations. */
-#define OPENGL_LOGIC_OP_CLEAR 0
-#define OPENGL_LOGIC_OP_AND 1
-#define OPENGL_LOGIC_OP_AND_REVERSE 2
-#define OPENGL_LOGIC_OP_COPY 3
-#define OPENGL_LOGIC_OP_AND_INVERTED 4
-#define OPENGL_LOGIC_OP_NOOP 5
-#define OPENGL_LOGIC_OP_XOR 6
-#define OPENGL_LOGIC_OP_OR 7
-#define OPENGL_LOGIC_OP_NOR 8
-#define OPENGL_LOGIC_OP_EQUIV 9
-#define OPENGL_LOGIC_OP_INVERT 10
-#define OPENGL_LOGIC_OP_OR_REVERSE 11
-#define OPENGL_LOGIC_OP_COPY_INVERTED 12
-#define OPENGL_LOGIC_OP_OR_INVERTED 13
-#define OPENGL_LOGIC_OP_NAND 14
-#define OPENGL_LOGIC_OP_SET 15
-
+++ /dev/null
-/* $OpenBSD: if_iec.c,v 1.27 2020/07/10 13:26:36 patrick Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Heavily based upon if_mec.c with the following license terms:
- *
- * OpenBSD: if_mec.c,v 1.22 2009/10/26 18:00:06 miod Exp
- *
- * Copyright (c) 2004 Izumi Tsutsui.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Copyright (c) 2003 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * IOC3 Ethernet driver
- */
-
-#include "bpfilter.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/timeout.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/socket.h>
-#include <sys/ioctl.h>
-#include <sys/errno.h>
-
-#include <net/if.h>
-#include <net/if_media.h>
-
-#if NBPFILTER > 0
-#include <net/bpf.h>
-#endif
-
-#include <netinet/in.h>
-#include <netinet/if_ether.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-
-#include <sgi/dev/if_iecreg.h>
-#include <sgi/dev/owmacvar.h>
-#include <sgi/pci/iocreg.h>
-#include <sgi/pci/iocvar.h>
-
-#ifdef IEC_DEBUG
-#define IEC_DEBUG_RESET 0x01
-#define IEC_DEBUG_START 0x02
-#define IEC_DEBUG_STOP 0x04
-#define IEC_DEBUG_INTR 0x08
-#define IEC_DEBUG_RXINTR 0x10
-#define IEC_DEBUG_TXINTR 0x20
-#define IEC_DEBUG_MII 0x40
-uint32_t iec_debug = 0xffffffff;
-#define DPRINTF(x, y) if (iec_debug & (x)) printf y
-#else
-#define DPRINTF(x, y) /* nothing */
-#endif
-
-/*
- * Transmit descriptor list size.
- */
-#define IEC_NTXDESC IEC_NTXDESC_MAX
-#define IEC_NEXTTX(x) (((x) + 1) % IEC_NTXDESC_MAX)
-
-/*
- * Software state for TX.
- */
-struct iec_txsoft {
- struct mbuf *txs_mbuf; /* Head of our mbuf chain. */
- bus_dmamap_t txs_dmamap; /* Our DMA map. */
- uint32_t txs_flags;
-};
-
-/*
- * Receive buffer management.
- *
- * The RX buffers chip register points to a contiguous array of
- * 512 8-bit pointers to the RX buffers themselves.
- */
-
-/*
- * Receive descriptor list sizes (these depend on the size of the SSRAM).
- */
-#define IEC_NRXDESC_SMALL 64
-#define IEC_NRXDESC_LARGE 128
-
-/*
- * In addition to the receive descriptor themselves, we'll need an array
- * of 512 RX descriptor pointers (regardless of how many real descriptors
- * we use), aligned on a 4KB boundary.
- */
-
-/*
- * Control structures for DMA ops.
- */
-struct iec_control_data {
- /*
- * TX descriptors and buffers.
- */
- struct iec_txdesc icd_txdesc[IEC_NTXDESC_MAX];
-
- /*
- * RX descriptors and buffers.
- */
- struct iec_rxdesc icd_rxdesc[1];
-};
-
-/*
- * Alignment restrictions (found by trial and error, might be slightly
- * pessimistic).
- * - base address of rx desc pointer array should be aligned on a
- * 16KB boundary.
- * - base address of rx and tx desc array should be aligned on
- * 16KB boundaries (note layout of struct iec_control_data makes sure
- * the rx desc array starts 16KB after the tx desc array).
- * - each txdesc should be 128 byte aligned (this is also enforced by
- * struct iec_control_data layout).
- * - each rxdesc should be aligned on a 4KB boundary (this is enforced by
- * struct iec_control_data and struct icd_rxdesc layouts).
- */
-#define IEC_DMA_BOUNDARY 0x4000
-
-#define IEC_CDOFF(x) offsetof(struct iec_control_data, x)
-#define IEC_CDTXOFF(x) IEC_CDOFF(icd_txdesc[(x)])
-#define IEC_CDRXOFF(x) IEC_CDOFF(icd_rxdesc[(x)])
-
-/*
- * Software state per device.
- */
-struct iec_softc {
- struct device sc_dev; /* Generic device structures. */
- struct arpcom sc_ac; /* Ethernet common part. */
-
- bus_space_tag_t sc_st; /* bus_space tag. */
- bus_space_handle_t sc_sh; /* bus_space handle. */
- bus_dma_tag_t sc_dmat; /* bus_dma tag. */
-
- struct mii_data sc_mii; /* MII/media information. */
- int sc_phyaddr; /* MII address. */
- struct timeout sc_tick; /* Tick timeout. */
-
- uint64_t *sc_rxarr; /* kva for rx pointers array. */
- bus_dmamap_t sc_rxarrmap; /* bus_dma map for rx pointers array. */
-#define sc_rxptrdma sc_rxarrmap->dm_segs[0].ds_addr
-
- bus_dmamap_t sc_cddmamap; /* bus_dma map for control data. */
-#define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
-
- /* Pointer to allocated control data. */
- struct iec_control_data *sc_control_data;
-#define sc_txdesc sc_control_data->icd_txdesc
-#define sc_rxdesc sc_control_data->icd_rxdesc
-
- /* Software state for TX descs. */
- struct iec_txsoft sc_txsoft[IEC_NTXDESC];
-
- int sc_txpending; /* Number of TX requests pending. */
- int sc_txdirty; /* First dirty TX descriptor. */
- int sc_txlast; /* Last used TX descriptor. */
-
- uint32_t sc_rxci; /* Saved RX consumer index. */
- uint32_t sc_rxpi; /* Saved RX producer index. */
- uint32_t sc_nrxdesc; /* Amount of RX descriptors. */
-
- uint32_t sc_mcr; /* Current MCR value. */
-};
-
-#define IEC_CDTXADDR(sc, x) ((sc)->sc_cddma + IEC_CDTXOFF(x))
-#define IEC_CDRXADDR(sc, x) ((sc)->sc_cddma + IEC_CDRXOFF(x))
-
-#define IEC_TXDESCSYNC(sc, x, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- IEC_CDTXOFF(x), IEC_TXDESCSIZE, (ops))
-#define IEC_TXCMDSYNC(sc, x, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- IEC_CDTXOFF(x), 2 * sizeof(uint32_t), (ops))
-
-#define IEC_RXSTATSYNC(sc, x, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- IEC_CDRXOFF(x), 2 * sizeof(uint32_t), (ops))
-#define IEC_RXBUFSYNC(sc, x, len, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- IEC_CDRXOFF(x) + IEC_RXD_BUFOFFSET, (len), (ops))
-
-/* XXX these values should be moved to <net/if_ether.h> ? */
-#define ETHER_PAD_LEN (ETHER_MIN_LEN - ETHER_CRC_LEN)
-
-struct cfdriver iec_cd = {
- NULL, "iec", DV_IFNET
-};
-
-#define DEVNAME(sc) ((sc)->sc_dev.dv_xname)
-
-int iec_match(struct device *, void *, void *);
-void iec_attach(struct device *, struct device *, void *);
-
-struct cfattach iec_ca = {
- sizeof(struct iec_softc), iec_match, iec_attach
-};
-
-int iec_mii_readreg(struct device *, int, int);
-void iec_mii_writereg(struct device *, int, int, int);
-int iec_mii_wait(struct iec_softc *);
-void iec_statchg(struct device *);
-void iec_mediastatus(struct ifnet *, struct ifmediareq *);
-int iec_mediachange(struct ifnet *);
-
-int iec_alloc_physical(struct iec_softc *, bus_dmamap_t *,
- bus_dma_segment_t *, vaddr_t *, bus_addr_t, bus_size_t,
- const char *);
-struct mbuf *
- iec_get(struct iec_softc *, uint8_t *, size_t);
-void iec_iff(struct iec_softc *);
-int iec_init(struct ifnet * ifp);
-int iec_intr(void *arg);
-int iec_ioctl(struct ifnet *, u_long, caddr_t);
-void iec_reset(struct iec_softc *);
-void iec_rxintr(struct iec_softc *, uint32_t);
-int iec_ssram_probe(struct iec_softc *);
-void iec_start(struct ifnet *);
-void iec_stop(struct ifnet *);
-void iec_tick(void *);
-void iec_txintr(struct iec_softc *, uint32_t);
-void iec_watchdog(struct ifnet *);
-
-int
-iec_match(struct device *parent, void *match, void *aux)
-{
- /*
- * We expect ioc NOT to attach us on if there is no Ethernet
- * component.
- */
- return 1;
-}
-
-void
-iec_attach(struct device *parent, struct device *self, void *aux)
-{
- struct iec_softc *sc = (void *)self;
- struct ioc_attach_args *iaa = aux;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct mii_softc *child;
- bus_dma_segment_t seg1;
- bus_dma_segment_t seg2;
- bus_size_t control_size;
- int i, rc;
-
- sc->sc_st = iaa->iaa_memt;
- sc->sc_sh = iaa->iaa_memh;
- sc->sc_dmat = iaa->iaa_dmat;
-
- /*
- * Try and figure out how much SSRAM is available, and decide
- * how many RX buffers to use.
- */
- i = iec_ssram_probe(sc);
- printf(": %dKB SSRAM", i);
-
- /*
- * Allocate a page for RX descriptor pointers, suitable for use
- * by the device.
- */
- rc = iec_alloc_physical(sc, &sc->sc_rxarrmap, &seg1,
- (vaddr_t *)&sc->sc_rxarr, IEC_DMA_BOUNDARY,
- IEC_NRXDESC_MAX * sizeof(uint64_t), "rxdesc pointer array");
- if (rc != 0)
- return;
-
- /*
- * Allocate the RX and TX descriptors.
- */
- control_size = IEC_NTXDESC_MAX * sizeof(struct iec_txdesc) +
- sc->sc_nrxdesc * sizeof(struct iec_rxdesc);
- rc = iec_alloc_physical(sc, &sc->sc_cddmamap, &seg2,
- (vaddr_t *)&sc->sc_control_data, IEC_DMA_BOUNDARY,
- control_size, "rx and tx descriptors");
- if (rc != 0)
- goto fail_1;
-
- /*
- * Initialize RX pointer array.
- */
-
- for (i = 0; i < IEC_NRXDESC_MAX; i++)
- sc->sc_rxarr[i] = IEC_CDRXADDR(sc, i & (sc->sc_nrxdesc - 1));
-
- /* Create TX buffer DMA maps. */
- for (i = 0; i < IEC_NTXDESC; i++) {
- if ((rc = bus_dmamap_create(sc->sc_dmat,
- MCLBYTES, 1, MCLBYTES, 0, 0,
- &sc->sc_txsoft[i].txs_dmamap)) != 0) {
- printf(": unable to create tx DMA map %d, error = %d\n",
- i, rc);
- goto fail_4;
- }
- }
-
- timeout_set(&sc->sc_tick, iec_tick, sc);
-
- bcopy(iaa->iaa_enaddr, sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
- printf(", address %s\n", ether_sprintf(sc->sc_ac.ac_enaddr));
-
- /* Reset device. */
- iec_reset(sc);
-
- /* Done, now attach everything. */
-
- sc->sc_mii.mii_ifp = ifp;
- sc->sc_mii.mii_readreg = iec_mii_readreg;
- sc->sc_mii.mii_writereg = iec_mii_writereg;
- sc->sc_mii.mii_statchg = iec_statchg;
-
- /* Set up PHY properties. */
- ifmedia_init(&sc->sc_mii.mii_media, 0, iec_mediachange,
- iec_mediastatus);
- mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
- MII_OFFSET_ANY, 0);
-
- child = LIST_FIRST(&sc->sc_mii.mii_phys);
- if (child == NULL) {
- /* No PHY attached. */
- ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL,
- 0, NULL);
- ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL);
- } else {
- ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO);
- sc->sc_phyaddr = child->mii_phy;
- }
-
- bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
- ifp->if_softc = sc;
- ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
- ifp->if_ioctl = iec_ioctl;
- ifp->if_start = iec_start;
- ifp->if_watchdog = iec_watchdog;
-
- if_attach(ifp);
- ifq_set_maxlen(&ifp->if_snd, IEC_NTXDESC - 1);
- ether_ifattach(ifp);
-
- /* Establish interrupt handler. */
- ioc_intr_establish(parent, iaa->iaa_dev, IPL_NET,
- iec_intr, sc, sc->sc_dev.dv_xname);
-
- return;
-
- /*
- * Free any resources we've allocated during the failed attach
- * attempt. Do this in reverse order and fall through.
- */
-fail_4:
- for (i = 0; i < IEC_NTXDESC; i++) {
- if (sc->sc_txsoft[i].txs_dmamap != NULL)
- bus_dmamap_destroy(sc->sc_dmat,
- sc->sc_txsoft[i].txs_dmamap);
- }
-
- bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
- bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
- bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
- control_size);
- bus_dmamem_free(sc->sc_dmat, &seg2, 1);
-fail_1:
- bus_dmamap_unload(sc->sc_dmat, sc->sc_rxarrmap);
- bus_dmamap_destroy(sc->sc_dmat, sc->sc_rxarrmap);
- bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_rxarr,
- IEC_NRXDESC_MAX * sizeof(uint64_t));
- bus_dmamem_free(sc->sc_dmat, &seg1, 1);
-}
-
-/*
- * Allocate contiguous physical memory.
- */
-int
-iec_alloc_physical(struct iec_softc *sc, bus_dmamap_t *dmamap,
- bus_dma_segment_t *dmaseg, vaddr_t *va, bus_addr_t alignment,
- bus_size_t len, const char *what)
-{
- int nseg;
- int rc;
-
- rc = bus_dmamem_alloc(sc->sc_dmat, len, alignment, 0, dmaseg, 1, &nseg,
- BUS_DMA_NOWAIT);
- if (rc != 0) {
- printf("%s: unable to allocate %s memory: error %d\n",
- DEVNAME(sc), what, rc);
- goto fail1;
- }
-
- rc = bus_dmamem_map(sc->sc_dmat, dmaseg, nseg, len,
- (caddr_t *)va, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
- if (rc != 0) {
- printf("%s: unable to map %s memory: error %d\n",
- DEVNAME(sc), what, rc);
- goto fail2;
- }
-
- rc = bus_dmamap_create(sc->sc_dmat, len, 1, len, 0, BUS_DMA_NOWAIT,
- dmamap);
- if (rc != 0) {
- printf("%s: unable to create %s dma map: error %d\n",
- DEVNAME(sc), what, rc);
- goto fail3;
- }
-
- rc = bus_dmamap_load(sc->sc_dmat, *dmamap, (void *)*va, len, NULL,
- BUS_DMA_NOWAIT);
- if (rc != 0) {
- printf("%s: unable to load %s dma map: error %d\n",
- DEVNAME(sc), what, rc);
- goto fail4;
- }
-
- memset((caddr_t)*va, 0, len);
- return 0;
-
-fail4:
- bus_dmamap_destroy(sc->sc_dmat, *dmamap);
-fail3:
- bus_dmamem_unmap(sc->sc_dmat, (caddr_t)*va, len);
-fail2:
- bus_dmamem_free(sc->sc_dmat, dmaseg, 1);
-fail1:
- return rc;
-}
-
-int
-iec_mii_readreg(struct device *self, int phy, int reg)
-{
- struct iec_softc *sc = (void *)self;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
-
- if (iec_mii_wait(sc) != 0)
- return 0;
-
- bus_space_write_4(st, sh, IOC3_ENET_MICR, IOC3_ENET_MICR_READ |
- (phy << IOC3_ENET_MICR_PHY_SHIFT) |
- (reg & IOC3_ENET_MICR_REG_MASK));
- delay(25);
-
- if (iec_mii_wait(sc) == 0)
- return bus_space_read_4(st, sh, IOC3_ENET_MIDR_R) &
- IOC3_ENET_MIDR_MASK;
-
- DPRINTF(IEC_DEBUG_MII, ("MII timed out reading %x\n", reg));
- return 0;
-}
-
-void
-iec_mii_writereg(struct device *self, int phy, int reg, int val)
-{
- struct iec_softc *sc = (void *)self;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
-
- if (iec_mii_wait(sc) != 0) {
- DPRINTF(IEC_DEBUG_MII,
- ("MII timed out writing %x: %x\n", reg, val));
- return;
- }
-
- bus_space_write_4(st, sh, IOC3_ENET_MIDR_W, val & IOC3_ENET_MIDR_MASK);
- delay(60);
- bus_space_write_4(st, sh, IOC3_ENET_MICR,
- (phy << IOC3_ENET_MICR_PHY_SHIFT) |
- (reg & IOC3_ENET_MICR_REG_MASK));
- delay(60);
-
- iec_mii_wait(sc);
-}
-
-int
-iec_mii_wait(struct iec_softc *sc)
-{
- uint32_t busy;
- int i;
-
- for (i = 0; i < 100; i++) {
- busy = bus_space_read_4(sc->sc_st, sc->sc_sh, IOC3_ENET_MICR);
- if ((busy & IOC3_ENET_MICR_BUSY) == 0)
- return 0;
- delay(30);
- }
-
- printf("%s: MII timed out\n", sc->sc_dev.dv_xname);
- return 1;
-}
-
-void
-iec_statchg(struct device *self)
-{
- struct iec_softc *sc = (void *)self;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint32_t tcsr;
-
- if ((sc->sc_mii.mii_media_active & IFM_FDX) != 0) {
- tcsr = IOC3_ENET_TCSR_FULL_DUPLEX;
- sc->sc_mcr |= IOC3_ENET_MCR_DUPLEX;
- } else {
- tcsr = IOC3_ENET_TCSR_HALF_DUPLEX;
- sc->sc_mcr &= ~IOC3_ENET_MCR_DUPLEX;
- }
-
- bus_space_write_4(st, sh, IOC3_ENET_MCR, sc->sc_mcr);
- bus_space_write_4(st, sh, IOC3_ENET_TCSR, tcsr);
-}
-
-void
-iec_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
- struct iec_softc *sc = ifp->if_softc;
-
- if ((ifp->if_flags & IFF_UP) == 0)
- return;
-
- mii_pollstat(&sc->sc_mii);
- ifmr->ifm_status = sc->sc_mii.mii_media_status;
- ifmr->ifm_active = sc->sc_mii.mii_media_active;
-}
-
-int
-iec_mediachange(struct ifnet *ifp)
-{
- struct iec_softc *sc = ifp->if_softc;
-
- if ((ifp->if_flags & IFF_UP) == 0)
- return 0;
-
- return mii_mediachg(&sc->sc_mii);
-}
-
-int
-iec_init(struct ifnet *ifp)
-{
- struct iec_softc *sc = ifp->if_softc;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- struct iec_rxdesc *rxd;
- int i;
-
- /* Cancel any pending I/O. */
- iec_stop(ifp);
-
- /* Reset device. */
- iec_reset(sc);
-
- /* Setup filter for multicast or promisc mode. */
- iec_iff(sc);
-
- /*
- * Initialize TX ring.
- */
-
- bus_space_write_4(st, sh, IOC3_ENET_TBR_H, IEC_CDTXADDR(sc, 0) >> 32);
- bus_space_write_4(st, sh, IOC3_ENET_TBR_L,
- (uint32_t)IEC_CDTXADDR(sc, 0));
- bus_space_write_4(st, sh, IOC3_ENET_TCIR, 0);
- bus_space_write_4(st, sh, IOC3_ENET_TPIR, 0);
- (void)bus_space_read_4(st, sh, IOC3_ENET_TCIR);
-
- sc->sc_txpending = 0;
- sc->sc_txdirty = 0;
- sc->sc_txlast = IEC_NTXDESC - 1;
-
- /*
- * Initialize RX ring.
- */
-
- /* Point the RX base register to our RX pointers array. */
- bus_space_write_4(st, sh, IOC3_ENET_RBR_H, sc->sc_rxptrdma >> 32);
- bus_space_write_4(st, sh, IOC3_ENET_RBR_L, (uint32_t)sc->sc_rxptrdma);
-
- sc->sc_rxci = 0;
- sc->sc_rxpi = sc->sc_nrxdesc + 1;
- bus_space_write_4(st, sh, IOC3_ENET_RCIR,
- sc->sc_rxci * sizeof(uint64_t));
- bus_space_write_4(st, sh, IOC3_ENET_RPIR,
- (sc->sc_rxpi * sizeof(uint64_t)) | IOC3_ENET_PIR_SET);
-
- /* Interrupt as soon as available RX desc reach this limit */
- bus_space_write_4(st, sh, IOC3_ENET_RCSR,
- sc->sc_rxpi - sc->sc_rxci - 1);
- /* Set up RX timer to interrupt immediately upon reception. */
- bus_space_write_4(st, sh, IOC3_ENET_RTR, 0);
-
- /* Initialize RX buffers. */
- for (i = 0; i < sc->sc_nrxdesc; i++) {
- rxd = &sc->sc_rxdesc[i];
- rxd->rxd_stat = 0;
- IEC_RXSTATSYNC(sc, i, BUS_DMASYNC_PREREAD);
- IEC_RXBUFSYNC(sc, i, ETHER_MAX_LEN, BUS_DMASYNC_PREREAD);
- }
-
- /* Enable DMA, and RX and TX interrupts */
- sc->sc_mcr &= IOC3_ENET_MCR_LARGE_SSRAM | IOC3_ENET_MCR_PARITY_ENABLE |
- IOC3_ENET_MCR_PADEN;
- sc->sc_mcr |= IOC3_ENET_MCR_TX_DMA | IOC3_ENET_MCR_TX |
- IOC3_ENET_MCR_RX_DMA | IOC3_ENET_MCR_RX |
- ((IEC_RXD_BUFOFFSET >> 1) << IOC3_ENET_MCR_RXOFF_SHIFT);
- bus_space_write_4(st, sh, IOC3_ENET_MCR, sc->sc_mcr);
- bus_space_write_4(st, sh, IOC3_ENET_IER,
- IOC3_ENET_ISR_RX_TIMER | IOC3_ENET_ISR_RX_THRESHOLD |
- (IOC3_ENET_ISR_TX_ALL & ~IOC3_ENET_ISR_TX_EMPTY));
- (void)bus_space_read_4(st, sh, IOC3_ENET_IER);
-
- timeout_add_sec(&sc->sc_tick, 1);
-
- ifp->if_flags |= IFF_RUNNING;
- ifq_clr_oactive(&ifp->if_snd);
-
- iec_start(ifp);
-
- mii_mediachg(&sc->sc_mii);
-
- return 0;
-}
-
-void
-iec_reset(struct iec_softc *sc)
-{
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint64_t address;
- int i;
-
- DPRINTF(IEC_DEBUG_RESET, ("iec_reset\n"));
-
- /* Reset chip. */
- bus_space_write_4(st, sh, IOC3_ENET_MCR, IOC3_ENET_MCR_RESET);
- delay(1000);
- bus_space_write_4(st, sh, IOC3_ENET_MCR, 0);
- delay(1000);
-
- bus_space_write_4(st, sh, IOC3_ENET_RBAR, 0);
-
- /* Set Ethernet address. */
- address = 0;
- for (i = 0; i < ETHER_ADDR_LEN; i++) {
- address <<= 8;
- address += sc->sc_ac.ac_enaddr[ETHER_ADDR_LEN - 1 - i];
- }
- bus_space_write_4(st, sh, IOC3_ENET_MAR_H, address >> 32);
- bus_space_write_4(st, sh, IOC3_ENET_MAR_L, (uint32_t)address);
-
- /* Default to 100/half and let auto-negotiation work its magic. */
- bus_space_write_4(st, sh, IOC3_ENET_TCSR, IOC3_ENET_TCSR_HALF_DUPLEX);
-
- /* Reset collisions counter */
- (void)bus_space_read_4(st, sh, IOC3_ENET_TCDC);
-
- bus_space_write_4(st, sh, IOC3_ENET_RSR, 0x4d696f64);
-
- bus_space_write_4(st, sh, IOC3_ENET_HAR_H, 0);
- bus_space_write_4(st, sh, IOC3_ENET_HAR_L, 0);
-}
-
-void
-iec_start(struct ifnet *ifp)
-{
- struct iec_softc *sc = ifp->if_softc;
- struct mbuf *m0;
- struct iec_txdesc *txd;
- struct iec_txsoft *txs;
- bus_dmamap_t dmamap;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint64_t txdaddr;
- int error, firstdirty, nexttx, opending;
- int len;
-
- if (!(ifp->if_flags & IFF_RUNNING) || ifq_is_oactive(&ifp->if_snd))
- return;
-
- /*
- * Remember the previous txpending and the first transmit descriptor.
- */
- opending = sc->sc_txpending;
- firstdirty = IEC_NEXTTX(sc->sc_txlast);
-
- DPRINTF(IEC_DEBUG_START, ("iec_start: opending = %d, firstdirty = %d\n",
- opending, firstdirty));
-
- while (sc->sc_txpending < IEC_NTXDESC - 1) {
- /* Grab a packet off the queue. */
- m0 = ifq_dequeue(&ifp->if_snd);
- if (m0 == NULL)
- break;
-
- /*
- * Get the next available transmit descriptor.
- */
- nexttx = IEC_NEXTTX(sc->sc_txlast);
- txd = &sc->sc_txdesc[nexttx];
- txs = &sc->sc_txsoft[nexttx];
-
- len = m0->m_pkthdr.len;
-
- DPRINTF(IEC_DEBUG_START,
- ("iec_start: len = %d, nexttx = %d\n", len, nexttx));
-
- if (len <= IEC_TXD_BUFSIZE) {
- /*
- * If the packet is small enough,
- * just copy it to the buffer in txdesc and
- * pad with zeroes.
- */
- DPRINTF(IEC_DEBUG_START, ("iec_start: short packet\n"));
-
- m_copydata(m0, 0, m0->m_pkthdr.len, txd->txd_buf);
- if (len < ETHER_PAD_LEN) {
- /*
- * XXX would IOC3_ENET_MCR_PADEN in MCR do this
- * XXX for us?
- */
- memset(txd->txd_buf + len, 0,
- ETHER_PAD_LEN - len);
- len = ETHER_PAD_LEN;
- }
-
- txs->txs_flags = IEC_TXCMD_BUF_V;
- } else {
- /*
- * Although the packet may fit in the txdesc
- * itself, we do not make use of this option,
- * and use the two data pointers to handle it.
- * There are two pointers because each chunk must
- * not cross a 16KB boundary.
- */
- dmamap = txs->txs_dmamap;
- if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
- BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) {
- struct mbuf *m;
-
- DPRINTF(IEC_DEBUG_START,
- ("iec_start: re-allocating mbuf\n"));
- MGETHDR(m, M_DONTWAIT, MT_DATA);
- if (m == NULL) {
- printf("%s: unable to allocate "
- "TX mbuf\n", sc->sc_dev.dv_xname);
- break;
- }
- if (len > (MHLEN - ETHER_ALIGN)) {
- MCLGET(m, M_DONTWAIT);
- if ((m->m_flags & M_EXT) == 0) {
- printf("%s: unable to allocate "
- "TX cluster\n",
- sc->sc_dev.dv_xname);
- m_freem(m);
- break;
- }
- }
- /*
- * Each packet has the Ethernet header, so
- * in many cases the header isn't 4-byte aligned
- * and data after the header is 4-byte aligned.
- * Thus adding 2-byte offset before copying to
- * new mbuf avoids unaligned copy and this may
- * improve performance.
- */
- m->m_data += ETHER_ALIGN;
- m_copydata(m0, 0, len, mtod(m, caddr_t));
- m->m_pkthdr.len = m->m_len = len;
- m_freem(m0);
- m0 = m;
- error = bus_dmamap_load_mbuf(sc->sc_dmat,
- dmamap, m, BUS_DMA_WRITE | BUS_DMA_NOWAIT);
- if (error) {
- printf("%s: unable to load TX buffer, "
- "error = %d\n",
- sc->sc_dev.dv_xname, error);
- m_freem(m);
- break;
- }
- }
-
- txdaddr = dmamap->dm_segs[0].ds_addr;
- txs->txs_flags = IEC_TXCMD_PTR0_V;
- DPRINTF(IEC_DEBUG_START,
- ("iec_start: ds_addr = %p\n",
- dmamap->dm_segs[0].ds_addr));
-
- DPRINTF(IEC_DEBUG_START,
- ("iec_start: txdaddr = %p, len = %d\n",
- txdaddr, len));
-
- /*
- * Sync the DMA map for TX mbuf.
- *
- * XXX unaligned part doesn't have to be sync'ed,
- * but it's harmless...
- */
- bus_dmamap_sync(sc->sc_dmat, dmamap, 0,
- dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
- }
-
-#if NBPFILTER > 0
- /*
- * Pass packet to bpf if there is a listener.
- */
- if (ifp->if_bpf)
- bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
-#endif
-
- /*
- * Setup the transmit descriptor.
- * Since there is apparently no way to get status
- * information in the TX descriptor after we issue
- * it, we have to always ask for interrupts upon
- * completion, so that if we get a TX error interrupt,
- * we know which descriptor it applies to.
- */
-
- txd->txd_cmd = IEC_TXCMD_TXINT | txs->txs_flags |
- (len & IEC_TXCMD_DATALEN);
-
- if (txs->txs_flags & IEC_TXCMD_PTR0_V) {
- uint32_t r1, r2;
-
- /*
- * The chip DMA engine can not cross 16KB boundaries.
- * If our mbuf doesn't fit, use the second pointer.
- */
-
- r1 = IEC_DMA_BOUNDARY -
- (txdaddr & (IEC_DMA_BOUNDARY - 1));
- if (r1 >= len) {
- /* only one chunk is necessary */
- r1 = len;
- r2 = 0;
- } else
- r2 = len - r1;
-
- txd->txd_ptr[0] = txdaddr;
- if (r2 != 0) {
- txs->txs_flags |= IEC_TXCMD_PTR1_V;
- txd->txd_ptr[1] = txdaddr + r1;
- } else
- txd->txd_ptr[1] = 0;
- txd->txd_len = (r1 << IECTX_BUF1_LEN_SHIFT) |
- (r2 << IECTX_BUF2_LEN_SHIFT);
-
- /*
- * Store a pointer to the packet so we can
- * free it later.
- */
- txs->txs_mbuf = m0;
- } else {
- txd->txd_len = len << IECTX_BUF0_LEN_SHIFT;
- txd->txd_ptr[0] = 0;
- txd->txd_ptr[1] = 0;
- /*
- * In this case all data are copied to buffer in txdesc,
- * we can free TX mbuf here.
- */
- m_freem(m0);
- }
-
- DPRINTF(IEC_DEBUG_START,
- ("iec_start: txd_cmd = 0x%08x, txd_ptr = %p\n",
- txd->txd_cmd, txd->txd_ptr[0]));
- DPRINTF(IEC_DEBUG_START,
- ("iec_start: len = %d (0x%04x)\n", len, len));
-
- /* Sync TX descriptor. */
- IEC_TXDESCSYNC(sc, nexttx,
- BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
- /* Advance the TX pointer. */
- sc->sc_txpending++;
- sc->sc_txlast = nexttx;
- }
-
- if (sc->sc_txpending >= IEC_NTXDESC - 1) {
- /* No more slots; notify upper layer. */
- ifq_set_oactive(&ifp->if_snd);
- }
-
- if (sc->sc_txpending != opending) {
- /* Start TX. */
- bus_space_write_4(st, sh, IOC3_ENET_TPIR,
- IEC_NEXTTX(sc->sc_txlast) * IEC_TXDESCSIZE);
-
- /*
- * If the transmitter was idle,
- * reset the txdirty pointer and re-enable TX interrupt.
- */
- if (opending == 0) {
- sc->sc_txdirty = firstdirty;
- bus_space_write_4(st, sh, IOC3_ENET_IER,
- bus_space_read_4(st, sh, IOC3_ENET_IER) |
- IOC3_ENET_ISR_TX_EMPTY);
- (void)bus_space_read_4(st, sh, IOC3_ENET_IER);
- }
-
- /* Set a watchdog timer in case the chip flakes out. */
- ifp->if_timer = 5;
- }
-}
-
-void
-iec_stop(struct ifnet *ifp)
-{
- struct iec_softc *sc = ifp->if_softc;
- struct iec_txsoft *txs;
- int i;
-
- DPRINTF(IEC_DEBUG_STOP, ("iec_stop\n"));
-
- ifp->if_timer = 0;
- ifp->if_flags &= ~IFF_RUNNING;
- ifq_clr_oactive(&ifp->if_snd);
-
- timeout_del(&sc->sc_tick);
- mii_down(&sc->sc_mii);
-
- /* Disable DMA and interrupts. */
- sc->sc_mcr &= ~(IOC3_ENET_MCR_TX_DMA | IOC3_ENET_MCR_RX_DMA);
- bus_space_write_4(sc->sc_st, sc->sc_sh, IOC3_ENET_MCR, sc->sc_mcr);
- bus_space_write_4(sc->sc_st, sc->sc_sh, IOC3_ENET_IER, 0);
- (void)bus_space_read_4(sc->sc_st, sc->sc_sh, IOC3_ENET_IER);
-
- /* Release any TX buffers. */
- for (i = 0; i < IEC_NTXDESC; i++) {
- txs = &sc->sc_txsoft[i];
- if ((txs->txs_flags & IEC_TXCMD_PTR0_V) != 0) {
- bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
- m_freem(txs->txs_mbuf);
- txs->txs_mbuf = NULL;
- }
- }
-}
-
-int
-iec_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
-{
- struct iec_softc *sc = ifp->if_softc;
- struct ifreq *ifr = (struct ifreq *)data;
- int s, error = 0;
-
- s = splnet();
-
- switch (cmd) {
- case SIOCSIFADDR:
- ifp->if_flags |= IFF_UP;
- if (!(ifp->if_flags & IFF_RUNNING))
- iec_init(ifp);
- break;
-
- case SIOCSIFFLAGS:
- if (ifp->if_flags & IFF_UP) {
- if (ifp->if_flags & IFF_RUNNING)
- error = ENETRESET;
- else
- iec_init(ifp);
- } else {
- if (ifp->if_flags & IFF_RUNNING)
- iec_stop(ifp);
- }
- break;
-
- case SIOCSIFMEDIA:
- case SIOCGIFMEDIA:
- error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
- break;
-
- default:
- error = ether_ioctl(ifp, &sc->sc_ac, cmd, data);
- }
-
- if (error == ENETRESET) {
- if (ifp->if_flags & IFF_RUNNING)
- iec_iff(sc);
- error = 0;
- }
-
- splx(s);
- return error;
-}
-
-void
-iec_watchdog(struct ifnet *ifp)
-{
- struct iec_softc *sc = ifp->if_softc;
-
- printf("%s: device timeout\n", sc->sc_dev.dv_xname);
- ifp->if_oerrors++;
-
- DPRINTF(IEC_DEBUG_INTR, ("iec_watchdog: ISR %08x IER %08x\n",
- bus_space_read_4(sc->sc_st, sc->sc_sh, IOC3_ENET_ISR),
- bus_space_read_4(sc->sc_st, sc->sc_sh, IOC3_ENET_IER)));
-
- iec_init(ifp);
-}
-
-void
-iec_tick(void *arg)
-{
- struct iec_softc *sc = arg;
- int s;
-
- s = splnet();
- mii_tick(&sc->sc_mii);
- splx(s);
-
- timeout_add_sec(&sc->sc_tick, 1);
-}
-
-void
-iec_iff(struct iec_softc *sc)
-{
- struct arpcom *ac = &sc->sc_ac;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct ether_multi *enm;
- struct ether_multistep step;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint64_t mchash = 0;
- uint32_t hash;
-
- sc->sc_mcr &= ~IOC3_ENET_MCR_PROMISC;
- ifp->if_flags &= ~IFF_ALLMULTI;
-
- if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) {
- ifp->if_flags |= IFF_ALLMULTI;
- if (ifp->if_flags & IFF_PROMISC)
- sc->sc_mcr |= IOC3_ENET_MCR_PROMISC;
- mchash = 0xffffffffffffffffULL;
- } else {
- ETHER_FIRST_MULTI(step, ac, enm);
- while (enm != NULL) {
- hash = ether_crc32_be(enm->enm_addrlo,
- ETHER_ADDR_LEN) >> 26;
-
- mchash |= 1 << hash;
-
- ETHER_NEXT_MULTI(step, enm);
- }
- }
-
- bus_space_write_4(st, sh, IOC3_ENET_HAR_H, mchash >> 32);
- bus_space_write_4(st, sh, IOC3_ENET_HAR_L, (uint32_t)mchash);
- bus_space_write_4(st, sh, IOC3_ENET_MCR, sc->sc_mcr);
-}
-
-struct mbuf *
-iec_get(struct iec_softc *sc, uint8_t *data, size_t datalen)
-{
- struct mbuf *m, **mp, *head;
- size_t len, pad;
-
- MGETHDR(m, M_DONTWAIT, MT_DATA);
- if (m == NULL) {
- printf("%s: unable to allocate RX mbuf\n",
- sc->sc_dev.dv_xname);
- return NULL;
- }
-
- m->m_pkthdr.len = datalen;
-
- pad = ALIGN(sizeof(struct ether_header)) - sizeof(struct ether_header);
- m->m_data += pad;
- len = MHLEN - pad;
- head = NULL;
- mp = &head;
-
- while (datalen != 0) {
- if (head != NULL) {
- MGET(m, M_DONTWAIT, MT_DATA);
- if (m == NULL) {
- printf("%s: unable to allocate RX mbuf\n",
- sc->sc_dev.dv_xname);
- m_freem(head);
- return NULL;
- }
- len = MHLEN;
- }
- if (datalen >= MINCLSIZE) {
- MCLGET(m, M_DONTWAIT);
- if ((m->m_flags & M_EXT) == 0) {
- printf("%s: unable to allocate RX cluster\n",
- sc->sc_dev.dv_xname);
- m_freem(head);
- m_freem(m);
- return NULL;
- }
- len = MCLBYTES;
- if (head == NULL) {
- m->m_data += pad;
- len -= pad;
- }
- }
- m->m_len = len = min(datalen, len);
- memcpy(mtod(m, caddr_t), data, len);
- data += len;
- datalen -= len;
- *mp = m;
- mp = &m->m_next;
- }
-
- return head;
-}
-
-int
-iec_intr(void *arg)
-{
- struct iec_softc *sc = arg;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- uint32_t statreg, statack;
- int handled, sent;
-
- DPRINTF(IEC_DEBUG_INTR, ("iec_intr: called\n"));
-
- handled = sent = 0;
-
- for (;;) {
- statreg = bus_space_read_4(st, sh, IOC3_ENET_ISR);
-
- DPRINTF(IEC_DEBUG_INTR,
- ("iec_intr: INT_STAT = 0x%x\n", statreg));
-
- statack = statreg & bus_space_read_4(st, sh, IOC3_ENET_IER);
- if (statack == 0)
- break;
- bus_space_write_4(st, sh, IOC3_ENET_ISR, statack);
-
- handled = 1;
-
- if (statack &
- (IOC3_ENET_ISR_RX_TIMER | IOC3_ENET_ISR_RX_THRESHOLD)) {
- iec_rxintr(sc, statreg);
- }
-
- if (statack & IOC3_ENET_ISR_TX_ALL) {
- iec_txintr(sc, statreg & IOC3_ENET_ISR_TX_ALL);
- sent = 1;
- }
- }
-
- if (sent) {
- /* Try to get more packets going. */
- iec_start(ifp);
- }
-
- return handled;
-}
-
-void
-iec_rxintr(struct iec_softc *sc, uint32_t stat)
-{
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct mbuf_list ml = MBUF_LIST_INITIALIZER();
- struct mbuf *m;
- struct iec_rxdesc *rxd;
- uint64_t rxstat;
- size_t len;
- u_int packets;
- uint32_t i, ci;
-
- /*
- * Figure out how many RX descriptors are available for processing.
- */
- ci = bus_space_read_4(st, sh, IOC3_ENET_RCIR) / sizeof(uint64_t);
- packets = (ci + IEC_NRXDESC_MAX - sc->sc_rxci) % IEC_NRXDESC_MAX;
- sc->sc_rxpi = (sc->sc_rxpi + packets) % IEC_NRXDESC_MAX;
-
- DPRINTF(IEC_DEBUG_RXINTR, ("iec_rxintr: rx %d-%d\n", sc->sc_rxci, ci));
- while (packets-- != 0) {
- i = (sc->sc_rxci++) & (sc->sc_nrxdesc - 1);
-
- IEC_RXSTATSYNC(sc, i, BUS_DMASYNC_POSTREAD);
- rxd = &sc->sc_rxdesc[i];
- rxstat = rxd->rxd_stat;
-
- DPRINTF(IEC_DEBUG_RXINTR,
- ("iec_rxintr: rxstat = 0x%08x, rxerr = 0x%08x\n",
- rxstat, rxd->rxd_err));
-
- if ((rxstat & IEC_RXSTAT_VALID) == 0)
- goto dropit;
-
- len = (rxstat & IEC_RXSTAT_LEN_MASK) >> IEC_RXSTAT_LEN_SHIFT;
-
- if (len < ETHER_MIN_LEN ||
- len > ETHER_MAX_LEN) {
- /* Invalid length packet; drop it. */
- DPRINTF(IEC_DEBUG_RXINTR,
- ("iec_rxintr: wrong packet\n"));
-dropit:
- ifp->if_ierrors++;
- rxd->rxd_stat = 0;
- IEC_RXSTATSYNC(sc, i, BUS_DMASYNC_PREREAD);
- continue;
- }
-
- if (rxd->rxd_err & (IEC_RXERR_BADPACKET | IEC_RXERR_LONGEVENT |
- IEC_RXERR_INVPREAMB | IEC_RXERR_CODE | IEC_RXERR_FRAME |
- IEC_RXERR_CRC)) {
- printf("%s: iec_rxintr: stat = 0x%08llx err = %08x\n",
- sc->sc_dev.dv_xname, rxstat, rxd->rxd_err);
- goto dropit;
- }
-
- /*
- * Now allocate an mbuf (and possibly a cluster) to hold
- * the received packet.
- */
- len -= ETHER_CRC_LEN;
- IEC_RXBUFSYNC(sc, i, len, BUS_DMASYNC_POSTREAD);
- m = iec_get(sc, rxd->rxd_buf, len);
- IEC_RXBUFSYNC(sc, i, ETHER_MAX_LEN, BUS_DMASYNC_PREREAD);
- if (m == NULL)
- goto dropit;
-
- rxd->rxd_stat = 0;
- IEC_RXSTATSYNC(sc, i, BUS_DMASYNC_PREREAD);
-
- ml_enqueue(&ml, m);
- }
-
- /* Update RX index pointers. */
- sc->sc_rxci = ci;
- bus_space_write_4(st, sh, IOC3_ENET_RPIR,
- (sc->sc_rxpi * sizeof(uint64_t)) | IOC3_ENET_PIR_SET);
- DPRINTF(IEC_DEBUG_RXINTR, ("iec_rxintr: new rxci %d rxpi %d\n",
- sc->sc_rxci, sc->sc_rxpi));
-
- if_input(ifp, &ml);
-}
-
-void
-iec_txintr(struct iec_softc *sc, uint32_t stat)
-{
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct iec_txsoft *txs;
- bus_dmamap_t dmamap;
- uint32_t tcir;
- int i, once, last;
-
- ifq_clr_oactive(&ifp->if_snd);
-
- tcir = bus_space_read_4(st, sh, IOC3_ENET_TCIR) & ~IOC3_ENET_TCIR_IDLE;
- last = (tcir / IEC_TXDESCSIZE) % IEC_NTXDESC_MAX;
-
- DPRINTF(IEC_DEBUG_TXINTR, ("iec_txintr: dirty %d last %d\n",
- sc->sc_txdirty, last));
- once = 0;
- for (i = sc->sc_txdirty; i != last && sc->sc_txpending != 0;
- i = IEC_NEXTTX(i), sc->sc_txpending--) {
- txs = &sc->sc_txsoft[i];
- if ((txs->txs_flags & IEC_TXCMD_PTR0_V) != 0) {
- dmamap = txs->txs_dmamap;
- bus_dmamap_sync(sc->sc_dmat, dmamap, 0,
- dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
- bus_dmamap_unload(sc->sc_dmat, dmamap);
- m_freem(txs->txs_mbuf);
- txs->txs_mbuf = NULL;
- }
-
- if ((stat & IOC3_ENET_ISR_TX_EXPLICIT) == 0) {
- if (stat == IOC3_ENET_ISR_TX_EMPTY)
- continue;
- if (once == 0) {
- printf("%s: TX error: txstat = %08x\n",
- DEVNAME(sc), stat);
- once = 1;
- }
- ifp->if_oerrors++;
- } else {
- ifp->if_collisions += IOC3_ENET_TCDC_COLLISION_MASK &
- bus_space_read_4(st, sh, IOC3_ENET_TCDC);
- }
- }
-
- /* Update the dirty TX buffer pointer. */
- sc->sc_txdirty = i;
- DPRINTF(IEC_DEBUG_INTR,
- ("iec_txintr: sc_txdirty = %2d, sc_txpending = %2d\n",
- sc->sc_txdirty, sc->sc_txpending));
-
- /* Cancel the watchdog timer if there are no pending TX packets. */
- if (sc->sc_txpending == 0)
- ifp->if_timer = 0;
-
- if (stat & IOC3_ENET_ISR_TX_EMPTY) {
- bus_space_write_4(st, sh, IOC3_ENET_IER,
- bus_space_read_4(st, sh, IOC3_ENET_IER) &
- ~IOC3_ENET_ISR_TX_EMPTY);
- (void)bus_space_read_4(st, sh, IOC3_ENET_IER);
- }
-}
-
-int
-iec_ssram_probe(struct iec_softc *sc)
-{
- /*
- * Depending on the hardware, there is either 64KB or 128KB of
- * 16-bit SSRAM, which is used as internal RX buffers by the chip.
- */
-
- /* default to large size */
- sc->sc_mcr = IOC3_ENET_MCR_PARITY_ENABLE | IOC3_ENET_MCR_LARGE_SSRAM;
- bus_space_write_4(sc->sc_st, sc->sc_sh, IOC3_ENET_MCR, sc->sc_mcr);
-
- bus_space_write_4(sc->sc_st, sc->sc_sh,
- IOC3_SSRAM_BASE, 0x55aa);
- bus_space_write_4(sc->sc_st, sc->sc_sh,
- IOC3_SSRAM_BASE + IOC3_SSRAM_SMALL_SIZE, 0xffff ^ 0x55aa);
-
- if ((bus_space_read_4(sc->sc_st, sc->sc_sh, IOC3_SSRAM_BASE) &
- IOC3_SSRAM_DATA_MASK) != 0x55aa ||
- (bus_space_read_4(sc->sc_st, sc->sc_sh,
- IOC3_SSRAM_BASE + IOC3_SSRAM_SMALL_SIZE) != (0xffff ^ 0x55aa))) {
- sc->sc_mcr &= ~IOC3_ENET_MCR_LARGE_SSRAM;
- sc->sc_nrxdesc = IEC_NRXDESC_SMALL;
- return IOC3_SSRAM_SMALL_SIZE / 2 / 1024;
- } else {
- sc->sc_nrxdesc = IEC_NRXDESC_LARGE;
- return IOC3_SSRAM_LARGE_SIZE / 2 / 1024;
- }
-}
+++ /dev/null
-/* $OpenBSD: if_iecreg.h,v 1.4 2021/03/11 11:17:00 jsg Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Ethernet controller part of the IOC3 ASIC.
- */
-
-/*
- * Receive buffer descriptor.
- */
-
-#define IEC_NRXDESC_MAX 512
-
-#define IEC_RXDESCSIZE (4096)
-#define IEC_RXD_BUFOFFSET (64 + 2) /* to align Ethernet header */
-#define IEC_RXD_NRXPAD (IEC_RXD_BUFOFFSET - 2 * sizeof(uint32_t))
-#define IEC_RXD_BUFSIZE (IEC_RXDESCSIZE - IEC_RXD_BUFOFFSET)
-
-/*
- * IEC_RXDESCSIZE is the smallest multiple of 128 bytes (hardware requirement)
- * able to store ETHER_MAX_DIX_LEN bytes and the rxdesc administrative data.
- *
- * IEC_RXD_BUFOFFSET is chosen to use a different cache line on the CPU.
- * A value of 128 (IOC3 cache line) would be even better, but would not fit
- * in the MCR register.
- */
-
-struct iec_rxdesc {
- volatile uint32_t rxd_stat;
-#define IEC_RXSTAT_VALID 0x80000000 /* descriptor valid */
-#define IEC_RXSTAT_LEN_MASK 0x07ff0000
-#define IEC_RXSTAT_LEN_SHIFT 16
-#define IEC_RXSTAT_CHECKSUM_MASK 0x0000ffff
- uint32_t rxd_err;
-#define IEC_RXERR_CRC 0x00000001 /* CRC error */
-#define IEC_RXERR_FRAME 0x00000002 /* Framing error */
-#define IEC_RXERR_CODE 0x00000004 /* Code violation */
-#define IEC_RXERR_INVPREAMB 0x00000008 /* Invalid preamble */
-#define IEC_RXERR_MULTICAST 0x04000000 /* Multicast packet */
-#define IEC_RXERR_BROADCAST 0x08000000 /* Broadcast packet */
-#define IEC_RXERR_LONGEVENT 0x10000000 /* Long packet */
-#define IEC_RXERR_BADPACKET 0x20000000 /* Bad packet */
-#define IEC_RXERR_GOODPACKET 0x40000000
-#define IEC_RXERR_CARRIER 0x80000000 /* Carrier event */
- uint8_t rxd_pad[IEC_RXD_NRXPAD];
- uint8_t rxd_buf[IEC_RXD_BUFSIZE];
-};
-
-/*
- * Transmit buffer descriptor.
- */
-
-#define IEC_NTXDESC_MAX 128
-
-#define IEC_TXDESCSIZE 128
-#define IEC_NTXPTR 2
-#define IEC_TXD_BUFOFFSET \
- (2 * sizeof(uint32_t) + IEC_NTXPTR * sizeof(uint64_t))
-#define IEC_TXD_BUFSIZE (IEC_TXDESCSIZE - IEC_TXD_BUFOFFSET)
-
-struct iec_txdesc {
- uint32_t txd_cmd;
-#define IEC_TXCMD_DATALEN 0x000007ff
-#define IEC_TXCMD_TXINT 0x00001000 /* interrupt after TX */
-#define IEC_TXCMD_BUF_V 0x00010000 /* txd_buf valid */
-#define IEC_TXCMD_PTR0_V 0x00020000 /* tx_ptr[0] valid */
-#define IEC_TXCMD_PTR1_V 0x00040000 /* tx_ptr[1] valid */
-#define IEC_TXCMD_HWCHECKSUM 0x00080000 /* perform hw cksum */
-#define IEC_TXCMD_CHECKSUM_POS_MASK 0x07f00000 /* hw cksum byte pos */
-#define IEC_TXCMD_CHECKSUM_POS_SHIFT 20
- uint32_t txd_len;
-#define IECTX_BUF0_LEN_MASK 0x0000007f
-#define IECTX_BUF0_LEN_SHIFT 0
-#define IECTX_BUF1_LEN_MASK 0x0007ff00
-#define IECTX_BUF1_LEN_SHIFT 8
-#define IECTX_BUF2_LEN_MASK 0x7ff00000
-#define IECTX_BUF2_LEN_SHIFT 20
- uint64_t txd_ptr[IEC_NTXPTR];
- uint8_t txd_buf[IEC_TXD_BUFSIZE];
-};
+++ /dev/null
-/* $OpenBSD: if_mec.c,v 1.41 2020/07/10 13:26:36 patrick Exp $ */
-/* $NetBSD: if_mec_mace.c,v 1.5 2004/08/01 06:36:36 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2004 Izumi Tsutsui.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Copyright (c) 2003 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * MACE MAC-110 Ethernet driver.
- */
-
-#include "bpfilter.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/timeout.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/socket.h>
-#include <sys/ioctl.h>
-#include <sys/errno.h>
-
-#include <net/if.h>
-#include <net/if_media.h>
-
-#if NBPFILTER > 0
-#include <net/bpf.h>
-#endif
-
-#include <netinet/in.h>
-#include <netinet/if_ether.h>
-
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <machine/autoconf.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-
-#include <mips64/arcbios.h>
-#include <sgi/dev/if_mecreg.h>
-
-#include <sgi/localbus/macebusvar.h>
-
-#ifdef MEC_DEBUG
-#define MEC_DEBUG_RESET 0x01
-#define MEC_DEBUG_START 0x02
-#define MEC_DEBUG_STOP 0x04
-#define MEC_DEBUG_INTR 0x08
-#define MEC_DEBUG_RXINTR 0x10
-#define MEC_DEBUG_TXINTR 0x20
-uint32_t mec_debug = 0xff;
-#define DPRINTF(x, y) if (mec_debug & (x)) printf y
-#else
-#define DPRINTF(x, y) /* nothing */
-#endif
-
-/*
- * Transmit descriptor list size.
- */
-#define MEC_NTXDESC 64
-#define MEC_NTXDESC_MASK (MEC_NTXDESC - 1)
-#define MEC_NEXTTX(x) (((x) + 1) & MEC_NTXDESC_MASK)
-
-/*
- * Software state for TX.
- */
-struct mec_txsoft {
- struct mbuf *txs_mbuf; /* Head of our mbuf chain. */
- bus_dmamap_t txs_dmamap; /* Our DMA map. */
- uint32_t txs_flags;
-#define MEC_TXS_BUFLEN_MASK 0x0000007f /* Data len in txd_buf. */
-#define MEC_TXS_TXDBUF 0x00000080 /* txd_buf is used. */
-#define MEC_TXS_TXDPTR1 0x00000100 /* txd_ptr[0] is used. */
-};
-
-/*
- * Transmit buffer descriptor.
- */
-#define MEC_TXDESCSIZE 128
-#define MEC_NTXPTR 3
-#define MEC_TXD_BUFOFFSET \
- (sizeof(uint64_t) + MEC_NTXPTR * sizeof(uint64_t))
-#define MEC_TXD_BUFSIZE (MEC_TXDESCSIZE - MEC_TXD_BUFOFFSET)
-#define MEC_TXD_BUFSTART(len) (MEC_TXD_BUFSIZE - (len))
-#define MEC_TXD_ALIGN 8
-#define MEC_TXD_ROUNDUP(addr) \
- (((addr) + (MEC_TXD_ALIGN - 1)) & ~((uint64_t)MEC_TXD_ALIGN - 1))
-
-struct mec_txdesc {
- volatile uint64_t txd_cmd;
-#define MEC_TXCMD_DATALEN 0x000000000000ffff /* Data length. */
-#define MEC_TXCMD_BUFSTART 0x00000000007f0000 /* Start byte offset. */
-#define TXCMD_BUFSTART(x) ((x) << 16)
-#define MEC_TXCMD_TERMDMA 0x0000000000800000 /* Stop DMA on abort. */
-#define MEC_TXCMD_TXINT 0x0000000001000000 /* INT after TX done. */
-#define MEC_TXCMD_PTR1 0x0000000002000000 /* Valid 1st txd_ptr. */
-#define MEC_TXCMD_PTR2 0x0000000004000000 /* Valid 2nd txd_ptr. */
-#define MEC_TXCMD_PTR3 0x0000000008000000 /* Valid 3rd txd_ptr. */
-#define MEC_TXCMD_UNUSED 0xfffffffff0000000ULL /* Should be zero. */
-
-#define txd_stat txd_cmd
-#define MEC_TXSTAT_LEN 0x000000000000ffff /* TX length. */
-#define MEC_TXSTAT_COLCNT 0x00000000000f0000 /* Collision count. */
-#define MEC_TXSTAT_COLCNT_SHIFT 16
-#define MEC_TXSTAT_LATE_COL 0x0000000000100000 /* Late collision. */
-#define MEC_TXSTAT_CRCERROR 0x0000000000200000 /* */
-#define MEC_TXSTAT_DEFERRED 0x0000000000400000 /* */
-#define MEC_TXSTAT_SUCCESS 0x0000000000800000 /* TX complete. */
-#define MEC_TXSTAT_TOOBIG 0x0000000001000000 /* */
-#define MEC_TXSTAT_UNDERRUN 0x0000000002000000 /* */
-#define MEC_TXSTAT_COLLISIONS 0x0000000004000000 /* */
-#define MEC_TXSTAT_EXDEFERRAL 0x0000000008000000 /* */
-#define MEC_TXSTAT_COLLIDED 0x0000000010000000 /* */
-#define MEC_TXSTAT_UNUSED 0x7fffffffe0000000ULL /* Should be zero. */
-#define MEC_TXSTAT_SENT 0x8000000000000000ULL /* Packet sent. */
-
- uint64_t txd_ptr[MEC_NTXPTR];
-#define MEC_TXPTR_UNUSED2 0x0000000000000007 /* Should be zero. */
-#define MEC_TXPTR_DMAADDR 0x00000000fffffff8 /* TX DMA address. */
-#define MEC_TXPTR_LEN 0x0000ffff00000000ULL /* Buffer length. */
-#define TXPTR_LEN(x) ((uint64_t)(x) << 32)
-#define MEC_TXPTR_UNUSED1 0xffff000000000000ULL /* Should be zero. */
-
- uint8_t txd_buf[MEC_TXD_BUFSIZE];
-};
-
-/*
- * Receive buffer size.
- */
-#define MEC_NRXDESC 16
-#define MEC_NRXDESC_MASK (MEC_NRXDESC - 1)
-#define MEC_NEXTRX(x) (((x) + 1) & MEC_NRXDESC_MASK)
-
-/*
- * Receive buffer description.
- */
-#define MEC_RXDESCSIZE 4096 /* Umm, should be 4kbyte aligned. */
-#define MEC_RXD_NRXPAD 3
-#define MEC_RXD_DMAOFFSET (1 + MEC_RXD_NRXPAD)
-#define MEC_RXD_BUFOFFSET (MEC_RXD_DMAOFFSET * sizeof(uint64_t))
-#define MEC_RXD_BUFSIZE (MEC_RXDESCSIZE - MEC_RXD_BUFOFFSET)
-
-struct mec_rxdesc {
- volatile uint64_t rxd_stat;
-#define MEC_RXSTAT_LEN 0x000000000000ffff /* Data length. */
-#define MEC_RXSTAT_VIOLATION 0x0000000000010000 /* Code violation (?). */
-#define MEC_RXSTAT_UNUSED2 0x0000000000020000 /* Unknown (?). */
-#define MEC_RXSTAT_CRCERROR 0x0000000000040000 /* CRC error. */
-#define MEC_RXSTAT_MULTICAST 0x0000000000080000 /* Multicast packet. */
-#define MEC_RXSTAT_BROADCAST 0x0000000000100000 /* Broadcast packet. */
-#define MEC_RXSTAT_INVALID 0x0000000000200000 /* Invalid preamble. */
-#define MEC_RXSTAT_LONGEVENT 0x0000000000400000 /* Long packet. */
-#define MEC_RXSTAT_BADPACKET 0x0000000000800000 /* Bad packet. */
-#define MEC_RXSTAT_CAREVENT 0x0000000001000000 /* Carrier event. */
-#define MEC_RXSTAT_MATCHMCAST 0x0000000002000000 /* Match multicast. */
-#define MEC_RXSTAT_MATCHMAC 0x0000000004000000 /* Match MAC. */
-#define MEC_RXSTAT_SEQNUM 0x00000000f8000000 /* Sequence number. */
-#define MEC_RXSTAT_CKSUM 0x0000ffff00000000ULL /* IP checksum. */
-#define MEC_RXSTAT_UNUSED1 0x7fff000000000000ULL /* Should be zero. */
-#define MEC_RXSTAT_RECEIVED 0x8000000000000000ULL /* Set to 1 on RX. */
- uint64_t rxd_pad1[MEC_RXD_NRXPAD];
- uint8_t rxd_buf[MEC_RXD_BUFSIZE];
-};
-
-/*
- * Control structures for DMA ops.
- */
-struct mec_control_data {
- /*
- * TX descriptors and buffers.
- */
- struct mec_txdesc mcd_txdesc[MEC_NTXDESC];
-
- /*
- * RX descriptors and buffers.
- */
- struct mec_rxdesc mcd_rxdesc[MEC_NRXDESC];
-};
-
-/*
- * It _seems_ there are some restrictions on descriptor address:
- *
- * - Base address of txdescs should be 8kbyte aligned
- * - Each txdesc should be 128byte aligned
- * - Each rxdesc should be 4kbyte aligned
- *
- * So we should specify 64k align to allocalte txdescs.
- * In this case, sizeof(struct mec_txdesc) * MEC_NTXDESC is 8192
- * so rxdescs are also allocated at 4kbyte aligned.
- */
-#define MEC_CONTROL_DATA_ALIGN (8 * 1024)
-
-#define MEC_CDOFF(x) offsetof(struct mec_control_data, x)
-#define MEC_CDTXOFF(x) MEC_CDOFF(mcd_txdesc[(x)])
-#define MEC_CDRXOFF(x) MEC_CDOFF(mcd_rxdesc[(x)])
-
-/*
- * Software state per device.
- */
-struct mec_softc {
- struct device sc_dev; /* Generic device structures. */
- struct arpcom sc_ac; /* Ethernet common part. */
-
- bus_space_tag_t sc_st; /* bus_space tag. */
- bus_space_handle_t sc_sh; /* bus_space handle. */
- bus_dma_tag_t sc_dmat; /* bus_dma tag. */
-
- struct mii_data sc_mii; /* MII/media information. */
- struct timeout sc_tick_ch; /* Tick timeout. */
-
- bus_dmamap_t sc_cddmamap; /* bus_dma map for control data. */
-#define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
-
- /* Pointer to allocated control data. */
- struct mec_control_data *sc_control_data;
-#define sc_txdesc sc_control_data->mcd_txdesc
-#define sc_rxdesc sc_control_data->mcd_rxdesc
-
- /* Software state for TX descs. */
- struct mec_txsoft sc_txsoft[MEC_NTXDESC];
-
- int sc_txpending; /* Number of TX requests pending. */
- int sc_txdirty; /* First dirty TX descriptor. */
- int sc_txlast; /* Last used TX descriptor. */
-
- int sc_rxptr; /* Next ready RX buffer. */
-};
-
-#define MEC_CDTXADDR(sc, x) ((sc)->sc_cddma + MEC_CDTXOFF(x))
-#define MEC_CDRXADDR(sc, x) ((sc)->sc_cddma + MEC_CDRXOFF(x))
-
-#define MEC_TXDESCSYNC(sc, x, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- MEC_CDTXOFF(x), MEC_TXDESCSIZE, (ops))
-#define MEC_TXCMDSYNC(sc, x, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- MEC_CDTXOFF(x), sizeof(uint64_t), (ops))
-
-#define MEC_RXSTATSYNC(sc, x, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- MEC_CDRXOFF(x), sizeof(uint64_t), (ops))
-#define MEC_RXBUFSYNC(sc, x, len, ops) \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
- MEC_CDRXOFF(x) + MEC_RXD_BUFOFFSET, \
- ETHER_ALIGN + (len), (ops))
-
-/* XXX these values should be moved to <net/if_ether.h> ? */
-#define ETHER_PAD_LEN (ETHER_MIN_LEN - ETHER_CRC_LEN)
-
-struct cfdriver mec_cd = {
- NULL, "mec", DV_IFNET
-};
-
-int mec_match(struct device *, void *, void *);
-void mec_attach(struct device *, struct device *, void *);
-
-struct cfattach mec_ca = {
- sizeof(struct mec_softc), mec_match, mec_attach
-};
-
-int mec_mii_readreg(struct device *, int, int);
-void mec_mii_writereg(struct device *, int, int, int);
-int mec_mii_wait(struct mec_softc *);
-void mec_statchg(struct device *);
-void mec_mediastatus(struct ifnet *, struct ifmediareq *);
-int mec_mediachange(struct ifnet *);
-
-int mec_init(struct ifnet * ifp);
-void mec_start(struct ifnet *);
-void mec_watchdog(struct ifnet *);
-void mec_tick(void *);
-int mec_ioctl(struct ifnet *, u_long, caddr_t);
-void mec_reset(struct mec_softc *, int);
-void mec_iff(struct mec_softc *);
-int mec_intr(void *arg);
-void mec_stop(struct ifnet *);
-void mec_rxintr(struct mec_softc *, uint32_t);
-void mec_txintr(struct mec_softc *, uint32_t);
-
-int
-mec_match(struct device *parent, void *match, void *aux)
-{
- return (1);
-}
-
-void
-mec_attach(struct device *parent, struct device *self, void *aux)
-{
- struct mec_softc *sc = (void *)self;
- struct macebus_attach_args *maa = aux;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- uint32_t command;
- struct mii_softc *child;
- bus_dma_segment_t seg;
- int i, err, rseg;
-
- sc->sc_st = maa->maa_iot;
- if (bus_space_map(sc->sc_st, maa->maa_baseaddr, MEC_NREGS, 0,
- &sc->sc_sh) != 0) {
- printf(": can't map i/o space\n");
- return;
- }
-
- /* Set up DMA structures. */
- sc->sc_dmat = maa->maa_dmat;
-
- /*
- * Allocate the control data structures, and create and load the
- * DMA map for it.
- */
- if ((err = bus_dmamem_alloc(sc->sc_dmat,
- sizeof(struct mec_control_data), MEC_CONTROL_DATA_ALIGN, 0,
- &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
- printf(": unable to allocate control data, error = %d\n", err);
- goto fail_0;
- }
-
- /*
- * XXX needs re-think...
- * control data structures contain whole RX data buffer, so
- * BUS_DMA_COHERENT (which disables cache) may cause some performance
- * issue on copying data from the RX buffer to mbuf on normal memory,
- * though we have to make sure all bus_dmamap_sync(9) ops are called
- * properly in that case.
- */
- if ((err = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
- sizeof(struct mec_control_data),
- (caddr_t *)&sc->sc_control_data, /*BUS_DMA_COHERENT*/ 0)) != 0) {
- printf(": unable to map control data, error = %d\n", err);
- goto fail_1;
- }
- memset(sc->sc_control_data, 0, sizeof(struct mec_control_data));
-
- if ((err = bus_dmamap_create(sc->sc_dmat,
- sizeof(struct mec_control_data), 1,
- sizeof(struct mec_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
- printf(": unable to create control data DMA map, error = %d\n",
- err);
- goto fail_2;
- }
- if ((err = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
- sc->sc_control_data, sizeof(struct mec_control_data), NULL,
- BUS_DMA_NOWAIT)) != 0) {
- printf(": unable to load control data DMA map, error = %d\n",
- err);
- goto fail_3;
- }
-
- /* Create TX buffer DMA maps. */
- for (i = 0; i < MEC_NTXDESC; i++) {
- if ((err = bus_dmamap_create(sc->sc_dmat,
- MCLBYTES, 1, MCLBYTES, 0, 0,
- &sc->sc_txsoft[i].txs_dmamap)) != 0) {
- printf(": unable to create tx DMA map %d, error = %d\n",
- i, err);
- goto fail_4;
- }
- }
-
- timeout_set(&sc->sc_tick_ch, mec_tick, sc);
-
- /* Use the Ethernet address from the ARCBIOS. */
- enaddr_aton(bios_enaddr, sc->sc_ac.ac_enaddr);
-
- /* Reset device. */
- mec_reset(sc, 1);
-
- command = bus_space_read_8(sc->sc_st, sc->sc_sh, MEC_MAC_CONTROL);
-
- printf(": MAC-110 rev %d, address %s\n",
- (command & MEC_MAC_REVISION) >> MEC_MAC_REVISION_SHIFT,
- ether_sprintf(sc->sc_ac.ac_enaddr));
-
- /* Done, now attach everything. */
-
- sc->sc_mii.mii_ifp = ifp;
- sc->sc_mii.mii_readreg = mec_mii_readreg;
- sc->sc_mii.mii_writereg = mec_mii_writereg;
- sc->sc_mii.mii_statchg = mec_statchg;
-
- /* Set up PHY properties. */
- ifmedia_init(&sc->sc_mii.mii_media, 0, mec_mediachange,
- mec_mediastatus);
- mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
- MII_OFFSET_ANY, 0);
-
- child = LIST_FIRST(&sc->sc_mii.mii_phys);
- if (child == NULL) {
- /* No PHY attached. */
- ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL,
- 0, NULL);
- ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL);
- } else {
- ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO);
- }
-
- bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
- ifp->if_softc = sc;
- ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
- ifp->if_ioctl = mec_ioctl;
- ifp->if_start = mec_start;
- ifp->if_watchdog = mec_watchdog;
-
- if_attach(ifp);
- ifq_set_maxlen(&ifp->if_snd, MEC_NTXDESC - 1);
- ether_ifattach(ifp);
-
- /* Establish interrupt handler. */
- macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
- IPL_NET, mec_intr, sc, sc->sc_dev.dv_xname);
-
- return;
-
- /*
- * Free any resources we've allocated during the failed attach
- * attempt. Do this in reverse order and fall though.
- */
- fail_4:
- for (i = 0; i < MEC_NTXDESC; i++) {
- if (sc->sc_txsoft[i].txs_dmamap != NULL)
- bus_dmamap_destroy(sc->sc_dmat,
- sc->sc_txsoft[i].txs_dmamap);
- }
- bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
- fail_3:
- bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
- fail_2:
- bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
- sizeof(struct mec_control_data));
- fail_1:
- bus_dmamem_free(sc->sc_dmat, &seg, rseg);
- fail_0:
- return;
-}
-
-int
-mec_mii_readreg(struct device *self, int phy, int reg)
-{
- struct mec_softc *sc = (void *)self;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint64_t val;
- int i;
-
- if (mec_mii_wait(sc) != 0)
- return 0;
-
- bus_space_write_8(st, sh, MEC_PHY_ADDRESS,
- (phy << MEC_PHY_ADDR_DEVSHIFT) | (reg & MEC_PHY_ADDR_REGISTER));
- bus_space_write_8(st, sh, MEC_PHY_READ_INITIATE, 1);
-
- for (i = 0; i < 20; i++) {
- delay(25);
- val = bus_space_read_8(st, sh, MEC_PHY_DATA);
-
- if ((val & MEC_PHY_DATA_BUSY) == 0)
- return val & MEC_PHY_DATA_VALUE;
- }
- return 0;
-}
-
-void
-mec_mii_writereg(struct device *self, int phy, int reg, int val)
-{
- struct mec_softc *sc = (void *)self;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
-
- if (mec_mii_wait(sc) != 0) {
- printf("MII timed out writing %x: %x\n", reg, val);
- return;
- }
-
- bus_space_write_8(st, sh, MEC_PHY_ADDRESS,
- (phy << MEC_PHY_ADDR_DEVSHIFT) | (reg & MEC_PHY_ADDR_REGISTER));
- bus_space_write_8(st, sh, MEC_PHY_DATA, val & MEC_PHY_DATA_VALUE);
-
- mec_mii_wait(sc);
-}
-
-int
-mec_mii_wait(struct mec_softc *sc)
-{
- uint64_t busy;
- int i;
-
- for (i = 0; i < 100; i++) {
- busy = bus_space_read_8(sc->sc_st, sc->sc_sh, MEC_PHY_DATA);
- if ((busy & MEC_PHY_DATA_BUSY) == 0)
- return 0;
- delay(30);
- }
-
- printf("%s: MII timed out\n", sc->sc_dev.dv_xname);
- return 1;
-}
-
-void
-mec_statchg(struct device *self)
-{
- struct mec_softc *sc = (void *)self;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint32_t control;
-
- control = bus_space_read_8(st, sh, MEC_MAC_CONTROL);
- control &= ~(MEC_MAC_IPGT | MEC_MAC_IPGR1 | MEC_MAC_IPGR2 |
- MEC_MAC_FULL_DUPLEX | MEC_MAC_SPEED_SELECT);
-
- /* Must also set IPG here for duplex stuff... */
- if ((sc->sc_mii.mii_media_active & IFM_FDX) != 0) {
- control |= MEC_MAC_FULL_DUPLEX;
- } else {
- /* Set IPG. */
- control |= MEC_MAC_IPG_DEFAULT;
- }
-
- bus_space_write_8(st, sh, MEC_MAC_CONTROL, control);
-}
-
-void
-mec_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
- struct mec_softc *sc = ifp->if_softc;
-
- if ((ifp->if_flags & IFF_UP) == 0)
- return;
-
- mii_pollstat(&sc->sc_mii);
- ifmr->ifm_status = sc->sc_mii.mii_media_status;
- ifmr->ifm_active = sc->sc_mii.mii_media_active;
-}
-
-int
-mec_mediachange(struct ifnet *ifp)
-{
- struct mec_softc *sc = ifp->if_softc;
-
- if ((ifp->if_flags & IFF_UP) == 0)
- return 0;
-
- return mii_mediachg(&sc->sc_mii);
-}
-
-int
-mec_init(struct ifnet *ifp)
-{
- struct mec_softc *sc = ifp->if_softc;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- struct mec_rxdesc *rxd;
- int i;
-
- /* Cancel any pending I/O. */
- mec_stop(ifp);
-
- /* Reset device. */
- mec_reset(sc, 0);
-
- /* Setup filter for multicast or promisc mode. */
- mec_iff(sc);
-
- /* Set the TX ring pointer to the base address. */
- bus_space_write_8(st, sh, MEC_TX_RING_BASE, MEC_CDTXADDR(sc, 0));
-
- sc->sc_txpending = 0;
- sc->sc_txdirty = 0;
- sc->sc_txlast = MEC_NTXDESC - 1;
-
- /* Put RX buffers into FIFO. */
- for (i = 0; i < MEC_NRXDESC; i++) {
- rxd = &sc->sc_rxdesc[i];
- rxd->rxd_stat = 0;
- MEC_RXSTATSYNC(sc, i, BUS_DMASYNC_PREREAD);
- MEC_RXBUFSYNC(sc, i, ETHER_MAX_LEN, BUS_DMASYNC_PREREAD);
- bus_space_write_8(st, sh, MEC_MCL_RX_FIFO, MEC_CDRXADDR(sc, i));
- }
- sc->sc_rxptr = 0;
-
-#if 0 /* XXX no info */
- bus_space_write_8(st, sh, MEC_TIMER, 0);
-#endif
-
- /*
- * MEC_DMA_TX_INT_ENABLE will be set later otherwise it causes
- * spurious interrupts when TX buffers are empty.
- */
- bus_space_write_8(st, sh, MEC_DMA_CONTROL,
- (MEC_RXD_DMAOFFSET << MEC_DMA_RX_DMA_OFFSET_SHIFT) |
- (MEC_NRXDESC << MEC_DMA_RX_INT_THRESH_SHIFT) |
- MEC_DMA_TX_DMA_ENABLE | /* MEC_DMA_TX_INT_ENABLE | */
- MEC_DMA_RX_DMA_ENABLE | MEC_DMA_RX_INT_ENABLE);
-
- timeout_add_sec(&sc->sc_tick_ch, 1);
-
- ifp->if_flags |= IFF_RUNNING;
- ifq_clr_oactive(&ifp->if_snd);
- mec_start(ifp);
-
- mii_mediachg(&sc->sc_mii);
-
- return 0;
-}
-
-void
-mec_reset(struct mec_softc *sc, int firsttime)
-{
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint64_t address;
- int i;
-
- /* Reset chip. */
- bus_space_write_8(st, sh, MEC_MAC_CONTROL, MEC_MAC_CORE_RESET);
- delay(1000);
- bus_space_write_8(st, sh, MEC_MAC_CONTROL, 0);
- delay(1000);
-
- /* Set Ethernet address. */
- address = 0;
- for (i = 0; i < ETHER_ADDR_LEN; i++) {
- address = address << 8;
- address += sc->sc_ac.ac_enaddr[i];
- }
- bus_space_write_8(st, sh, MEC_STATION, address);
-
- /* Default to 100/half and let auto-negotiation work its magic. */
- bus_space_write_8(st, sh, MEC_MAC_CONTROL,
- MEC_MAC_SPEED_SELECT | MEC_MAC_IPG_DEFAULT);
-
- bus_space_write_8(st, sh, MEC_DMA_CONTROL, 0);
-
- DPRINTF(MEC_DEBUG_RESET, ("mec: control now %llx\n",
- bus_space_read_8(st, sh, MEC_MAC_CONTROL)));
-
- if (firsttime) {
- /*
- * After a cold boot, during the initial MII probe, the
- * PHY would sometimes answer to addresses 11 or 10, only
- * to settle to address 8 shortly after.
- *
- * Because of this, the PHY driver would attach to the wrong
- * address and further link configuration would fail (with PHY
- * register reads returning either 0 or FFFF), leading to
- * horrible performance and no way to select a proper media.
- */
- int i, reg, phyno;
- for (phyno = 0; phyno < MII_NPHY; phyno++) {
- reg = mec_mii_readreg(&sc->sc_dev, phyno, MII_BMSR);
- /* same logic as in mii_attach() */
- if (reg == 0 || reg == 0xffff ||
- (reg & (BMSR_MEDIAMASK | BMSR_EXTSTAT)) == 0)
- continue;
- /* inline mii_phy_reset() */
- mec_mii_writereg(&sc->sc_dev, phyno, MII_BMCR,
- BMCR_RESET | BMCR_ISO);
- delay(500);
- for (i = 0; i < 100; i++) {
- reg = mec_mii_readreg(&sc->sc_dev, phyno,
- MII_BMCR);
- if ((reg & BMCR_RESET) == 0) {
- mec_mii_writereg(&sc->sc_dev, phyno,
- MII_BMCR, reg | BMCR_ISO);
- break;
- }
- delay(1000);
- }
- }
- }
-}
-
-void
-mec_start(struct ifnet *ifp)
-{
- struct mec_softc *sc = ifp->if_softc;
- struct mbuf *m0;
- struct mec_txdesc *txd;
- struct mec_txsoft *txs;
- bus_dmamap_t dmamap;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint64_t txdaddr;
- int error, firsttx, nexttx, opending;
- int len, bufoff, buflen, unaligned, txdlen;
-
- if (!(ifp->if_flags & IFF_RUNNING) || ifq_is_oactive(&ifp->if_snd))
- return;
-
- /*
- * Remember the previous txpending and the first transmit descriptor.
- */
- opending = sc->sc_txpending;
- firsttx = MEC_NEXTTX(sc->sc_txlast);
-
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: opending = %d, firsttx = %d\n", opending, firsttx));
-
- for (;;) {
- /* Grab a packet off the queue. */
- m0 = ifq_deq_begin(&ifp->if_snd);
- if (m0 == NULL)
- break;
-
- if (sc->sc_txpending == MEC_NTXDESC) {
- ifq_deq_rollback(&ifp->if_snd, m0);
- break;
- }
-
- /*
- * Get the next available transmit descriptor.
- */
- nexttx = MEC_NEXTTX(sc->sc_txlast);
- txd = &sc->sc_txdesc[nexttx];
- txs = &sc->sc_txsoft[nexttx];
-
- buflen = 0;
- bufoff = 0;
- txdaddr = 0; /* XXX gcc */
- txdlen = 0; /* XXX gcc */
-
- len = m0->m_pkthdr.len;
-
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: len = %d, nexttx = %d\n", len, nexttx));
-
- ifq_deq_commit(&ifp->if_snd, m0);
- if (len < ETHER_PAD_LEN) {
- /*
- * I don't know if MEC chip does auto padding,
- * so if the packet is small enough,
- * just copy it to the buffer in txdesc.
- * Maybe this is the simple way.
- */
- DPRINTF(MEC_DEBUG_START, ("mec_start: short packet\n"));
-
- bufoff = MEC_TXD_BUFSTART(ETHER_PAD_LEN);
- m_copydata(m0, 0, m0->m_pkthdr.len,
- txd->txd_buf + bufoff);
- memset(txd->txd_buf + bufoff + len, 0,
- ETHER_PAD_LEN - len);
- len = buflen = ETHER_PAD_LEN;
-
- txs->txs_flags = MEC_TXS_TXDBUF | buflen;
- } else {
- /*
- * If the packet won't fit the buffer in txdesc,
- * we have to use concatenate pointer to handle it.
- * While MEC can handle up to three segments to
- * concatenate, MEC requires that both the second and
- * third segments have to be 8 byte aligned.
- * Since it's unlikely for mbuf clusters, we use
- * only the first concatenate pointer. If the packet
- * doesn't fit in one DMA segment, allocate new mbuf
- * and copy the packet to it.
- *
- * Besides, if the start address of the first segments
- * is not 8 byte aligned, such part have to be copied
- * to the txdesc buffer. (XXX see below comments)
- */
- DPRINTF(MEC_DEBUG_START, ("mec_start: long packet\n"));
-
- dmamap = txs->txs_dmamap;
- if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
- BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) {
- struct mbuf *m;
-
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: re-allocating mbuf\n"));
- MGETHDR(m, M_DONTWAIT, MT_DATA);
- if (m == NULL) {
- printf("%s: unable to allocate "
- "TX mbuf\n", sc->sc_dev.dv_xname);
- break;
- }
- if (len > (MHLEN - ETHER_ALIGN)) {
- MCLGET(m, M_DONTWAIT);
- if ((m->m_flags & M_EXT) == 0) {
- printf("%s: unable to allocate "
- "TX cluster\n",
- sc->sc_dev.dv_xname);
- m_freem(m);
- break;
- }
- }
- /*
- * Each packet has the Ethernet header, so
- * in many cases the header isn't 4-byte aligned
- * and data after the header is 4-byte aligned.
- * Thus adding 2-byte offset before copying to
- * new mbuf avoids unaligned copy and this may
- * improve performance.
- * As noted above, unaligned part has to be
- * copied to txdesc buffer so this may cause
- * extra copy ops, but for now MEC always
- * requires some data in txdesc buffer,
- * so we always have to copy some data anyway.
- */
- m->m_data += ETHER_ALIGN;
- m_copydata(m0, 0, len, mtod(m, caddr_t));
- m->m_pkthdr.len = m->m_len = len;
- m_freem(m0);
- m0 = m;
- error = bus_dmamap_load_mbuf(sc->sc_dmat,
- dmamap, m, BUS_DMA_WRITE | BUS_DMA_NOWAIT);
- if (error) {
- printf("%s: unable to load TX buffer, "
- "error = %d\n",
- sc->sc_dev.dv_xname, error);
- m_freem(m);
- break;
- }
- }
-
- /* Handle unaligned part. */
- txdaddr = MEC_TXD_ROUNDUP(dmamap->dm_segs[0].ds_addr);
- txs->txs_flags = MEC_TXS_TXDPTR1;
- unaligned =
- dmamap->dm_segs[0].ds_addr & (MEC_TXD_ALIGN - 1);
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: ds_addr = 0x%x, unaligned = %d\n",
- (u_int)dmamap->dm_segs[0].ds_addr, unaligned));
- if (unaligned != 0) {
- buflen = MEC_TXD_ALIGN - unaligned;
- bufoff = MEC_TXD_BUFSTART(buflen);
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: unaligned, "
- "buflen = %d, bufoff = %d\n",
- buflen, bufoff));
- memcpy(txd->txd_buf + bufoff,
- mtod(m0, caddr_t), buflen);
- txs->txs_flags |= MEC_TXS_TXDBUF | buflen;
- }
-#if 1
- else {
- /*
- * XXX needs hardware info XXX
- * It seems MEC always requires some data
- * in txd_buf[] even if buffer is
- * 8-byte aligned otherwise DMA abort error
- * occurs later...
- */
- buflen = MEC_TXD_ALIGN;
- bufoff = MEC_TXD_BUFSTART(buflen);
- memcpy(txd->txd_buf + bufoff,
- mtod(m0, caddr_t), buflen);
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: aligned, "
- "buflen = %d, bufoff = %d\n",
- buflen, bufoff));
- txs->txs_flags |= MEC_TXS_TXDBUF | buflen;
- txdaddr += MEC_TXD_ALIGN;
- }
-#endif
- txdlen = len - buflen;
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: txdaddr = 0x%llx, txdlen = %d\n",
- txdaddr, txdlen));
-
- /*
- * Sync the DMA map for TX mbuf.
- *
- * XXX unaligned part doesn't have to be sync'ed,
- * but it's harmless...
- */
- bus_dmamap_sync(sc->sc_dmat, dmamap, 0,
- dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
- }
-
-#if NBPFILTER > 0
- /*
- * Pass packet to bpf if there is a listener.
- */
- if (ifp->if_bpf)
- bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
-#endif
-
- /*
- * Setup the transmit descriptor.
- */
-
- /* TXINT bit will be set later on the last packet. */
- txd->txd_cmd = (len - 1);
- /* But also set TXINT bit on a half of TXDESC. */
- if (sc->sc_txpending == (MEC_NTXDESC / 2))
- txd->txd_cmd |= MEC_TXCMD_TXINT;
-
- if (txs->txs_flags & MEC_TXS_TXDBUF)
- txd->txd_cmd |= TXCMD_BUFSTART(MEC_TXDESCSIZE - buflen);
- if (txs->txs_flags & MEC_TXS_TXDPTR1) {
- txd->txd_cmd |= MEC_TXCMD_PTR1;
- txd->txd_ptr[0] = TXPTR_LEN(txdlen - 1) | txdaddr;
- /*
- * Store a pointer to the packet so we can
- * free it later.
- */
- txs->txs_mbuf = m0;
- } else {
- txd->txd_ptr[0] = 0;
- /*
- * In this case all data are copied to buffer in txdesc,
- * we can free TX mbuf here.
- */
- m_freem(m0);
- }
-
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: txd_cmd = 0x%llx, txd_ptr = 0x%llx\n",
- txd->txd_cmd, txd->txd_ptr[0]));
- DPRINTF(MEC_DEBUG_START,
- ("mec_start: len = %d (0x%04x), buflen = %d (0x%02x)\n",
- len, len, buflen, buflen));
-
- /* Sync TX descriptor. */
- MEC_TXDESCSYNC(sc, nexttx,
- BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
- /* Advance the TX pointer. */
- sc->sc_txpending++;
- sc->sc_txlast = nexttx;
- }
-
- if (sc->sc_txpending == MEC_NTXDESC) {
- /* No more slots; notify upper layer. */
- ifq_set_oactive(&ifp->if_snd);
- }
-
- if (sc->sc_txpending != opending) {
- /*
- * Cause a TX interrupt to happen on the last packet
- * we enqueued.
- */
- sc->sc_txdesc[sc->sc_txlast].txd_cmd |= MEC_TXCMD_TXINT;
- MEC_TXCMDSYNC(sc, sc->sc_txlast,
- BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
- /* Start TX. */
- bus_space_write_8(st, sh, MEC_TX_RING_PTR,
- MEC_NEXTTX(sc->sc_txlast));
-
- /*
- * If the transmitter was idle,
- * reset the txdirty pointer and re-enable TX interrupt.
- */
- if (opending == 0) {
- sc->sc_txdirty = firsttx;
- bus_space_write_8(st, sh, MEC_TX_ALIAS,
- MEC_TX_ALIAS_INT_ENABLE);
- }
-
- /* Set a watchdog timer in case the chip flakes out. */
- ifp->if_timer = 5;
- }
-}
-
-void
-mec_stop(struct ifnet *ifp)
-{
- struct mec_softc *sc = ifp->if_softc;
- struct mec_txsoft *txs;
- int i;
-
- DPRINTF(MEC_DEBUG_STOP, ("mec_stop\n"));
-
- ifp->if_timer = 0;
- ifp->if_flags &= ~IFF_RUNNING;
- ifq_clr_oactive(&ifp->if_snd);
-
- timeout_del(&sc->sc_tick_ch);
- mii_down(&sc->sc_mii);
-
- /* Disable DMA. */
- bus_space_write_8(sc->sc_st, sc->sc_sh, MEC_DMA_CONTROL, 0);
-
- /* Release any TX buffers. */
- for (i = 0; i < MEC_NTXDESC; i++) {
- txs = &sc->sc_txsoft[i];
- if ((txs->txs_flags & MEC_TXS_TXDPTR1) != 0) {
- bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
- m_freem(txs->txs_mbuf);
- txs->txs_mbuf = NULL;
- }
- }
-}
-
-int
-mec_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
-{
- struct mec_softc *sc = ifp->if_softc;
- struct ifreq *ifr = (struct ifreq *)data;
- int s, error = 0;
-
- s = splnet();
-
- switch (cmd) {
- case SIOCSIFADDR:
- ifp->if_flags |= IFF_UP;
- if (!(ifp->if_flags & IFF_RUNNING))
- mec_init(ifp);
- break;
-
- case SIOCSIFFLAGS:
- if (ifp->if_flags & IFF_UP) {
- if (ifp->if_flags & IFF_RUNNING)
- error = ENETRESET;
- else
- mec_init(ifp);
- } else {
- if (ifp->if_flags & IFF_RUNNING)
- mec_stop(ifp);
- }
- break;
-
- case SIOCSIFMEDIA:
- case SIOCGIFMEDIA:
- error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
- break;
-
- default:
- error = ether_ioctl(ifp, &sc->sc_ac, cmd, data);
- }
-
- if (error == ENETRESET) {
- if (ifp->if_flags & IFF_RUNNING)
- mec_iff(sc);
- error = 0;
- }
-
- splx(s);
- return error;
-}
-
-void
-mec_watchdog(struct ifnet *ifp)
-{
- struct mec_softc *sc = ifp->if_softc;
-
- printf("%s: device timeout\n", sc->sc_dev.dv_xname);
- ifp->if_oerrors++;
-
- mec_init(ifp);
-}
-
-void
-mec_tick(void *arg)
-{
- struct mec_softc *sc = arg;
- int s;
-
- s = splnet();
- mii_tick(&sc->sc_mii);
- splx(s);
-
- timeout_add_sec(&sc->sc_tick_ch, 1);
-}
-
-void
-mec_iff(struct mec_softc *sc)
-{
- struct arpcom *ac = &sc->sc_ac;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct ether_multi *enm;
- struct ether_multistep step;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- uint64_t mchash = 0;
- uint32_t control, hash;
-
- control = bus_space_read_8(st, sh, MEC_MAC_CONTROL);
- control &= ~MEC_MAC_FILTER_MASK;
- ifp->if_flags &= ~IFF_ALLMULTI;
-
- if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) {
- ifp->if_flags |= IFF_ALLMULTI;
- if (ifp->if_flags & IFF_PROMISC)
- control |= MEC_MAC_FILTER_PROMISC;
- else
- control |= MEC_MAC_FILTER_ALLMULTI;
- mchash = 0xffffffffffffffffULL;
- } else {
- ETHER_FIRST_MULTI(step, ac, enm);
- while (enm != NULL) {
- hash = ether_crc32_be(enm->enm_addrlo,
- ETHER_ADDR_LEN) >> 26;
-
- mchash |= 1 << hash;
-
- ETHER_NEXT_MULTI(step, enm);
- }
-
- if (ac->ac_multicnt > 0)
- control |= MEC_MAC_FILTER_MATCHMULTI;
- }
-
- bus_space_write_8(st, sh, MEC_MULTICAST, mchash);
- bus_space_write_8(st, sh, MEC_MAC_CONTROL, control);
-}
-
-int
-mec_intr(void *arg)
-{
- struct mec_softc *sc = arg;
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- uint32_t statreg, statack, dmac;
- int handled, sent;
-
- DPRINTF(MEC_DEBUG_INTR, ("mec_intr: called\n"));
-
- handled = sent = 0;
-
- for (;;) {
- statreg = bus_space_read_8(st, sh, MEC_INT_STATUS);
-
- DPRINTF(MEC_DEBUG_INTR,
- ("mec_intr: INT_STAT = 0x%x\n", statreg));
-
- statack = statreg & MEC_INT_STATUS_MASK;
- if (statack == 0)
- break;
- bus_space_write_8(st, sh, MEC_INT_STATUS, statack);
-
- handled = 1;
-
- if (statack &
- (MEC_INT_RX_THRESHOLD |
- MEC_INT_RX_FIFO_UNDERFLOW)) {
- mec_rxintr(sc, statreg);
- }
-
- dmac = bus_space_read_8(st, sh, MEC_DMA_CONTROL);
- DPRINTF(MEC_DEBUG_INTR,
- ("mec_intr: DMA_CONT = 0x%x\n", dmac));
-
- if (statack &
- (MEC_INT_TX_EMPTY |
- MEC_INT_TX_PACKET_SENT |
- MEC_INT_TX_ABORT)) {
- mec_txintr(sc, statreg);
- sent = 1;
- }
-
- if (statack &
- (MEC_INT_TX_LINK_FAIL |
- MEC_INT_TX_MEM_ERROR |
- MEC_INT_TX_ABORT |
- MEC_INT_RX_DMA_UNDERFLOW)) {
- printf("%s: mec_intr: interrupt status = 0x%x\n",
- sc->sc_dev.dv_xname, statreg);
- }
- }
-
- if (sent) {
- /* Try to get more packets going. */
- mec_start(ifp);
- }
-
- return handled;
-}
-
-void
-mec_rxintr(struct mec_softc *sc, uint32_t stat)
-{
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct mbuf_list ml = MBUF_LIST_INITIALIZER();
- struct mbuf *m;
- struct mec_rxdesc *rxd;
- uint64_t rxstat;
- u_int len;
- int i, last;
-
- DPRINTF(MEC_DEBUG_RXINTR, ("mec_rxintr: called\n"));
-
- bus_space_write_8(st, sh, MEC_RX_ALIAS, 0);
-
- last = (stat & MEC_INT_RX_MCL_FIFO_ALIAS) >> 8;
- /* XXX does alias count mod 32 even if 16 descs are set up? */
- last &= MEC_NRXDESC_MASK;
-
- if (stat & MEC_INT_RX_FIFO_UNDERFLOW)
- last = (last - 1) & MEC_NRXDESC_MASK;
-
- DPRINTF(MEC_DEBUG_RXINTR, ("mec_rxintr: rxptr %d last %d\n",
- sc->sc_rxptr, last));
- for (i = sc->sc_rxptr; i != last; i = MEC_NEXTRX(i)) {
-
- MEC_RXSTATSYNC(sc, i, BUS_DMASYNC_POSTREAD);
- rxd = &sc->sc_rxdesc[i];
- rxstat = rxd->rxd_stat;
-
- DPRINTF(MEC_DEBUG_RXINTR,
- ("mec_rxintr: rxstat = 0x%llx, rxptr = %d\n",
- rxstat, i));
- DPRINTF(MEC_DEBUG_RXINTR, ("mec_rxintr: rxfifo = 0x%x\n",
- (u_int)bus_space_read_8(st, sh, MEC_RX_FIFO)));
-
- if ((rxstat & MEC_RXSTAT_RECEIVED) == 0) {
- /* Status not received but FIFO counted? Drop it! */
- goto dropit;
- }
-
- len = rxstat & MEC_RXSTAT_LEN;
-
- if (len < ETHER_MIN_LEN ||
- len > ETHER_MAX_LEN) {
- /* Invalid length packet; drop it. */
- DPRINTF(MEC_DEBUG_RXINTR,
- ("mec_rxintr: wrong packet\n"));
- dropit:
- ifp->if_ierrors++;
- rxd->rxd_stat = 0;
- MEC_RXSTATSYNC(sc, i, BUS_DMASYNC_PREREAD);
- bus_space_write_8(st, sh, MEC_MCL_RX_FIFO,
- MEC_CDRXADDR(sc, i));
- continue;
- }
-
- if (rxstat &
- (MEC_RXSTAT_BADPACKET |
- MEC_RXSTAT_LONGEVENT |
- MEC_RXSTAT_INVALID |
- MEC_RXSTAT_CRCERROR |
- MEC_RXSTAT_VIOLATION)) {
- printf("%s: mec_rxintr: status = 0x%llx\n",
- sc->sc_dev.dv_xname, rxstat);
- goto dropit;
- }
-
- /*
- * Now allocate an mbuf (and possibly a cluster) to hold
- * the received packet.
- */
- MGETHDR(m, M_DONTWAIT, MT_DATA);
- if (m == NULL) {
- printf("%s: unable to allocate RX mbuf\n",
- sc->sc_dev.dv_xname);
- goto dropit;
- }
- if (len > (MHLEN - ETHER_ALIGN)) {
- MCLGET(m, M_DONTWAIT);
- if ((m->m_flags & M_EXT) == 0) {
- printf("%s: unable to allocate RX cluster\n",
- sc->sc_dev.dv_xname);
- m_freem(m);
- m = NULL;
- goto dropit;
- }
- }
-
- /*
- * Note MEC chip seems to insert 2 byte padding at the start of
- * RX buffer, but we copy whole buffer to avoid unaligned copy.
- */
- MEC_RXBUFSYNC(sc, i, len + ETHER_ALIGN, BUS_DMASYNC_POSTREAD);
- memcpy(mtod(m, caddr_t), rxd->rxd_buf,
- ETHER_ALIGN + len - ETHER_CRC_LEN);
- MEC_RXBUFSYNC(sc, i, ETHER_MAX_LEN, BUS_DMASYNC_PREREAD);
- m->m_data += ETHER_ALIGN;
-
- /* Put RX buffer into FIFO again. */
- rxd->rxd_stat = 0;
- MEC_RXSTATSYNC(sc, i, BUS_DMASYNC_PREREAD);
- bus_space_write_8(st, sh, MEC_MCL_RX_FIFO, MEC_CDRXADDR(sc, i));
-
- m->m_pkthdr.len = m->m_len = len - ETHER_CRC_LEN;
-
- ml_enqueue(&ml, m);
- }
-
- /* Update RX pointer. */
- sc->sc_rxptr = i;
-
- bus_space_write_8(st, sh, MEC_RX_ALIAS,
- (MEC_NRXDESC << MEC_DMA_RX_INT_THRESH_SHIFT) |
- MEC_DMA_RX_INT_ENABLE);
-
- if_input(ifp, &ml);
-}
-
-void
-mec_txintr(struct mec_softc *sc, uint32_t stat)
-{
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct mec_txdesc *txd;
- struct mec_txsoft *txs;
- bus_dmamap_t dmamap;
- uint64_t txstat;
- int i, last;
- u_int col;
-
- ifq_clr_oactive(&ifp->if_snd);
-
- DPRINTF(MEC_DEBUG_TXINTR, ("mec_txintr: called\n"));
-
- bus_space_write_8(sc->sc_st, sc->sc_sh, MEC_TX_ALIAS, 0);
- last = (stat & MEC_INT_TX_RING_BUFFER_ALIAS) >> 16;
-
- DPRINTF(MEC_DEBUG_TXINTR, ("mec_txintr: dirty %d last %d\n",
- sc->sc_txdirty, last));
- for (i = sc->sc_txdirty; i != last && sc->sc_txpending != 0;
- i = MEC_NEXTTX(i), sc->sc_txpending--) {
- txd = &sc->sc_txdesc[i];
-
- MEC_TXDESCSYNC(sc, i,
- BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-
- txstat = txd->txd_stat;
- DPRINTF(MEC_DEBUG_TXINTR,
- ("mec_txintr: dirty = %d, txstat = 0x%llx\n",
- i, txstat));
- if ((txstat & MEC_TXSTAT_SENT) == 0) {
- MEC_TXCMDSYNC(sc, i, BUS_DMASYNC_PREREAD);
- break;
- }
-
- txs = &sc->sc_txsoft[i];
- if ((txs->txs_flags & MEC_TXS_TXDPTR1) != 0) {
- dmamap = txs->txs_dmamap;
- bus_dmamap_sync(sc->sc_dmat, dmamap, 0,
- dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
- bus_dmamap_unload(sc->sc_dmat, dmamap);
- m_freem(txs->txs_mbuf);
- txs->txs_mbuf = NULL;
- }
-
- if ((txstat & MEC_TXSTAT_SUCCESS) == 0) {
- printf("%s: TX error: txstat = 0x%llx\n",
- sc->sc_dev.dv_xname, txstat);
- ifp->if_oerrors++;
- } else {
- col = (txstat & MEC_TXSTAT_COLCNT) >>
- MEC_TXSTAT_COLCNT_SHIFT;
- ifp->if_collisions += col;
- }
- }
-
- /* Update the dirty TX buffer pointer. */
- sc->sc_txdirty = i;
- DPRINTF(MEC_DEBUG_INTR,
- ("mec_txintr: sc_txdirty = %2d, sc_txpending = %2d\n",
- sc->sc_txdirty, sc->sc_txpending));
-
- /* Cancel the watchdog timer if there are no pending TX packets. */
- if (sc->sc_txpending == 0)
- ifp->if_timer = 0;
- else if (!(stat & MEC_INT_TX_EMPTY))
- bus_space_write_8(sc->sc_st, sc->sc_sh, MEC_TX_ALIAS,
- MEC_TX_ALIAS_INT_ENABLE);
-}
+++ /dev/null
-/* $OpenBSD: if_mecreg.h,v 1.3 2018/12/10 05:42:34 visa Exp $ */
-/* $NetBSD: if_mecreg.h,v 1.2 2004/07/11 03:13:04 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2001 Christopher Sekiya
- * Copyright (c) 2000 Soren S. Jorvang
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * MACE MAC110 Ethernet register definitions
- */
-
-#define MEC_MAC_CONTROL 0x00
-#define MEC_MAC_CORE_RESET 0x0000000000000001 /* reset signal */
-#define MEC_MAC_FULL_DUPLEX 0x0000000000000002 /* 1 to enable */
-#define MEC_MAC_INT_LOOPBACK 0x0000000000000004 /* 0 = normal op */
-#define MEC_MAC_SPEED_SELECT 0x0000000000000008 /* 0/1 10/100 */
-#define MEC_MAC_MII_SELECT 0x0000000000000010 /* MII/SIA */
-#define MEC_MAC_FILTER_MASK 0x0000000000000060
-#define MEC_MAC_FILTER_STATION 0x0000000000000000
-#define MEC_MAC_FILTER_MATCHMULTI 0x0000000000000020
-#define MEC_MAC_FILTER_ALLMULTI 0x0000000000000040
-#define MEC_MAC_FILTER_PROMISC 0x0000000000000060
-#define MEC_MAC_LINK_FAILURE 0x0000000000000080
-#define MEC_MAC_IPGT 0x0000000000007f00 /* interpacket gap */
-#define MEC_MAC_IPGT_SHIFT 8
-#define MEC_MAC_IPGR1 0x00000000003f8000
-#define MEC_MAC_IPGR1_SHIFT 15
-#define MEC_MAC_IPGR2 0x000000001fc00000
-#define MEC_MAC_IPGR2_SHIFT 22
-#define MEC_MAC_REVISION 0x00000000e0000000
-#define MEC_MAC_REVISION_SHIFT 29
-
-#define MEC_MAC_IPG_DEFAULT \
- (21 << MEC_MAC_IPGT_SHIFT) | \
- (17 << MEC_MAC_IPGR1_SHIFT) | \
- (11 << MEC_MAC_IPGR2_SHIFT)
-
-#define MEC_INT_STATUS 0x08
-#define MEC_INT_STATUS_MASK 0x00000000000000ff
-#define MEC_INT_TX_EMPTY 0x0000000000000001
-#define MEC_INT_TX_PACKET_SENT 0x0000000000000002
-#define MEC_INT_TX_LINK_FAIL 0x0000000000000004
-#define MEC_INT_TX_MEM_ERROR 0x0000000000000008
-#define MEC_INT_TX_ABORT 0x0000000000000010
-#define MEC_INT_RX_THRESHOLD 0x0000000000000020
-#define MEC_INT_RX_FIFO_UNDERFLOW 0x0000000000000040
-#define MEC_INT_RX_DMA_UNDERFLOW 0x0000000000000080
-#define MEC_INT_RX_MCL_FIFO_ALIAS 0x0000000000001f00
-#define MEC_INT_TX_RING_BUFFER_ALIAS 0x0000000001ff0000
-#define MEC_INT_RX_SEQUENCE_NUMBER 0x000000003e000000
-#define MEC_INT_MCAST_HASH_OUTPUT 0x0000000040000000
-
-#define MEC_DMA_CONTROL 0x10
-#define MEC_DMA_TX_INT_ENABLE 0x0000000000000001
-#define MEC_DMA_TX_DMA_ENABLE 0x0000000000000002
-#define MEC_DMA_TX_RING_SIZE_MASK 0x000000000000000c
-#define MEC_DMA_RX_INT_THRESHOLD 0x00000000000001f0
-#define MEC_DMA_RX_INT_THRESH_SHIFT 4
-#define MEC_DMA_RX_INT_ENABLE 0x0000000000000200
-#define MEC_DMA_RX_RUNT 0x0000000000000400
-#define MEC_DMA_RX_PACKET_GATHER 0x0000000000000800
-#define MEC_DMA_RX_DMA_OFFSET 0x0000000000007000
-#define MEC_DMA_RX_DMA_OFFSET_SHIFT 12
-#define MEC_DMA_RX_DMA_ENABLE 0x0000000000008000
-
-#define MEC_TIMER 0x18
-#define MEC_TX_ALIAS 0x20
-#define MEC_TX_ALIAS_INT_ENABLE 0x0000000000000001
-
-#define MEC_RX_ALIAS 0x28
-#define MEC_RX_ALIAS_INT_ENABLE 0x0000000000000200
-#define MEC_RX_ALIAS_INT_THRESHOLD 0x00000000000001f0
-
-#define MEC_TX_RING_PTR 0x30
-#define MEC_TX_RING_WRITE_PTR 0x00000000000001ff
-#define MEC_TX_RING_READ_PTR 0x0000000001ff0000
-#define MEC_TX_RING_PTR_ALIAS 0x38
-
-#define MEC_RX_FIFO 0x40
-#define MEC_RX_FIFO_ELEMENT_COUNT 0x000000000000001f
-#define MEC_RX_FIFO_READ_PTR 0x0000000000000f00
-#define MEC_RX_FIFO_GEN_NUMBER 0x0000000000001000
-#define MEC_RX_FIFO_WRITE_PTR 0x00000000000f0000
-#define MEC_RX_FIFO_GEN_NUMBER_2 0x0000000000100000
-
-#define MEC_RX_FIFO_ALIAS1 0x48
-#define MEC_RX_FIFO_ALIAS2 0x50
-#define MEC_TX_VECTOR 0x58
-#define MEC_IRQ_VECTOR 0x58
-
-#define MEC_PHY_DATA 0x60
-#define MEC_PHY_DATA_BUSY 0x00010000
-#define MEC_PHY_DATA_VALUE 0x0000ffff
-
-#define MEC_PHY_ADDRESS 0x68
-#define MEC_PHY_ADDR_REGISTER 0x0000001f
-#define MEC_PHY_ADDR_DEVICE 0x000003e0
-#define MEC_PHY_ADDR_DEVSHIFT 5
-
-#define MEC_PHY_READ_INITIATE 0x70
-#define MEC_PHY_BACKOFF 0x78
-
-#define MEC_STATION 0xa0
-#define MEC_STATION_ALT 0xa8
-#define MEC_STATION_MASK 0x0000ffffffffffffULL
-
-#define MEC_MULTICAST 0xb0
-#define MEC_TX_RING_BASE 0xb8
-#define MEC_TX_PKT1_CMD_1 0xc0
-#define MEC_TX_PKT1_BUFFER_1 0xc8
-#define MEC_TX_PKT1_BUFFER_2 0xd0
-#define MEC_TX_PKT1_BUFFER_3 0xd8
-#define MEC_TX_PKT2_CMD_1 0xe0
-#define MEC_TX_PKT2_BUFFER_1 0xe8
-#define MEC_TX_PKT2_BUFFER_2 0xf0
-#define MEC_TX_PKT2_BUFFER_3 0xf8
-
-#define MEC_MCL_RX_FIFO 0x100
-
-#define MEC_NREGS 0x200
+++ /dev/null
-/* $OpenBSD: impact.c,v 1.12 2020/06/06 10:52:30 visa Exp $ */
-
-/*
- * Copyright (c) 2010, 2012 Miodrag Vallat.
- * Copyright (c) 2009, 2010 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Driver for the SGI Impact and ImpactSR graphics board.
- */
-
-/*
- * The details regarding the design and operation of this hardware, along with
- * the necessary magic numbers, are only available thanks to the reverse
- * engineering work undertaken by Stanislaw Skowronek <skylark@linux-mips.org>.
- *
- * Differences between ImpactSR and Impact researched by Peter Fuerst
- * <post@pfrst.de>.
- */
-
-/*
- * This driver currently lacks support for the HQ3 and HQ4 DMA engines, which
- * could be used to speed up rasops `copy' operations a lot by doing
- * framebuffer to memory, then memory to framebuffer operations.
- *
- * Of course, in an ideal world, these operations would be done with
- * framebuffer to framebuffer operations, but according to Skowronek, these
- * operations are not reliable and IRIX' Xsgi X server does not even try to
- * use them.
- *
- * Thus this driver currently implements rasops `copy' operations by repainting
- * affected areas with PIO routines. This is unfortunately slower than DMA,
- * but this will work until I have more time to spend on this. -- miod
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <sgi/dev/gl.h>
-#include <sgi/dev/impactreg.h>
-#include <sgi/dev/impactvar.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsdisplayvar.h>
-#include <dev/rasops/rasops.h>
-
-struct cfdriver impact_cd = {
- NULL, "impact", DV_DULL,
-};
-
-#define IMPACT_WIDTH 1280
-#define IMPACT_HEIGHT 1024
-#define IMPACT_DEPTH 32
-
-struct impact_screen {
- struct rasops_info ri;
- uint32_t defattr;
- struct wsdisplay_charcell *bs;
-
- struct impact_softc *sc;
- int has_hq4;
-
- bus_addr_t fifo_status;
- bus_addr_t cfifo;
-
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
-
- struct wsscreen_descr wsd;
- struct wsscreen_list wsl;
- struct wsscreen_descr *scrlist[1];
-};
-
-static inline void
- impact_cmd_fifo_write(struct impact_screen *, uint64_t, uint32_t, int);
-int impact_cmd_fifo_wait(struct impact_screen *);
-
-void impact_setup(struct impact_screen *, int);
-int impact_init_screen(struct impact_screen *);
-
-/*
- * Hardware acceleration (sort of) for rasops.
- */
-void impact_rop(struct impact_screen *, int, int, int, int, int, u_int);
-void impact_fillrect(struct impact_screen *, int, int, int, int, u_int);
-int impact_do_cursor(struct rasops_info *);
-int impact_putchar(void *, int, int, u_int, uint32_t);
-int impact_copycols(void *, int, int, int, int);
-int impact_erasecols(void *, int, int, int, uint32_t);
-int impact_copyrows(void *, int, int, int);
-int impact_eraserows(void *, int, int, uint32_t);
-
-/*
- * Interfaces for wscons.
- */
-int impact_ioctl(void *, u_long, caddr_t, int, struct proc *);
-paddr_t impact_mmap(void *, off_t, int);
-int impact_alloc_screen(void *, const struct wsscreen_descr *, void **,
- int *, int *, uint32_t *);
-void impact_free_screen(void *, void *);
-int impact_show_screen(void *, void *, int, void (*)(void *, int, int),
- void *);
-int impact_load_font(void *, void *, struct wsdisplay_font *);
-int impact_list_font(void *, struct wsdisplay_font *);
-
-static struct impact_screen impact_cons;
-
-struct wsdisplay_accessops impact_accessops = {
- .ioctl = impact_ioctl,
- .mmap = impact_mmap,
- .alloc_screen = impact_alloc_screen,
- .free_screen = impact_free_screen,
- .show_screen = impact_show_screen,
- .load_font = impact_load_font,
- .list_font = impact_list_font
-};
-
-int
-impact_attach_common(struct impact_softc *sc, bus_space_tag_t iot,
- bus_space_handle_t ioh, int console, int has_hq4)
-{
- struct wsemuldisplaydev_attach_args waa;
- struct impact_screen *scr;
-
- if (console) {
- /*
- * Setup has already been done via impact_cnattach().
- */
- scr = &impact_cons;
- scr->sc = sc;
- sc->curscr = scr;
- sc->console = 1;
- } else {
- /*
- * Setup screen data.
- */
- scr = malloc(sizeof(struct impact_screen), M_DEVBUF,
- M_NOWAIT | M_ZERO);
- if (scr == NULL) {
- printf("failed to allocate screen memory!\n");
- return ENOMEM;
- }
-
- scr->iot = iot;
- scr->ioh = ioh;
- scr->sc = sc;
- sc->curscr = scr;
-
- /* Setup hardware and clear screen. */
- impact_setup(scr, has_hq4);
- if (impact_init_screen(scr) != 0) {
- printf("failed to allocate memory\n");
- free(scr, M_DEVBUF, sizeof *scr);
- return ENOMEM;
- }
- }
-
- scr->scrlist[0] = &scr->wsd;
- scr->wsl.nscreens = 1;
- scr->wsl.screens = (const struct wsscreen_descr **)scr->scrlist;
-
- waa.console = sc->console;
- waa.scrdata = &scr->wsl;
- waa.accessops = &impact_accessops;
- waa.accesscookie = scr;
- waa.defaultscreens = 0;
-
- config_found(&sc->sc_dev, &waa, wsemuldisplaydevprint);
-
- return 0;
-}
-
-int
-impact_init_screen(struct impact_screen *scr)
-{
- struct rasops_info *ri = &scr->ri;
- int i;
- uint32_t c, r, g, b;
-
- bzero(ri, sizeof(struct rasops_info));
-
- ri->ri_flg = RI_CENTER | RI_FULLCLEAR;
- ri->ri_depth = IMPACT_DEPTH;
- ri->ri_width = IMPACT_WIDTH;
- ri->ri_height = IMPACT_HEIGHT;
- ri->ri_stride = IMPACT_WIDTH * IMPACT_DEPTH / 8;
-
- rasops_init(ri, 160, 160);
-
- /*
- * Allocate backing store to remember character cells, to
- * be able to fulfill scrolling requests.
- */
- if (scr->bs == NULL) {
- scr->bs = mallocarray(ri->ri_rows,
- ri->ri_cols * sizeof(struct wsdisplay_charcell), M_DEVBUF,
- M_NOWAIT | M_ZERO);
- if (scr->bs == NULL)
- return ENOMEM;
- }
-
- ri->ri_hw = scr;
-
- ri->ri_ops.putchar = impact_putchar;
- ri->ri_do_cursor = impact_do_cursor;
- ri->ri_ops.copyrows = impact_copyrows;
- ri->ri_ops.copycols = impact_copycols;
- ri->ri_ops.eraserows = impact_eraserows;
- ri->ri_ops.erasecols = impact_erasecols;
-
- /*
- * Slightly rework the colormap. impact_putchar() will use a 4:8:4
- * colormap for the background color instead of the 8:8:8 colormap
- * used everywhere else, so we need to make sure the low 4 bits of
- * all red and blue entries are zero, at least for the entries
- * used in emulation mode.
- */
- for (i = 0; i < 16; i++) {
- c = ri->ri_devcmap[i];
- /* this relies upon the default ri->ri_[bgr]{num,pos} values */
- r = c & 0x000000ff;
- g = c & 0x0000ff00;
- b = c & 0x00ff0000;
-
- if (r < (0xf0 << 0) && (r & (0x08 << 0)) != 0)
- r += 0x10 << 0;
- r &= 0xf0 << 0;
- if (b < (0xf0 << 16) && (b & (0x08 << 16)) != 0)
- b += 0x10 << 16;
- b &= 0xf0 << 16;
-
- ri->ri_devcmap[i] = b | g | r;
- }
-
- /* clear display */
- impact_fillrect(scr, 0, 0, ri->ri_width, ri->ri_height,
- ri->ri_devcmap[WSCOL_BLACK]);
-
- strlcpy(scr->wsd.name, "std", sizeof(scr->wsd.name));
- scr->wsd.ncols = ri->ri_cols;
- scr->wsd.nrows = ri->ri_rows;
- scr->wsd.textops = &ri->ri_ops;
- scr->wsd.fontwidth = ri->ri_font->fontwidth;
- scr->wsd.fontheight = ri->ri_font->fontheight;
- scr->wsd.capabilities = ri->ri_caps;
-
- return 0;
-}
-
-/*
- * Hardware initialization.
- */
-
-void
-impact_setup(struct impact_screen *scr, int has_hq4)
-{
- bus_addr_t xmap_base;
- bus_addr_t vc3_base;
-
- scr->has_hq4 = has_hq4;
-
- if (has_hq4) {
- xmap_base = IMPACTSR_XMAP_BASE;
- vc3_base = IMPACTSR_VC3_BASE;
- scr->fifo_status = IMPACTSR_FIFOSTATUS;
- scr->cfifo = IMPACTSR_CFIFO;
- } else {
- xmap_base = IMPACT_XMAP_BASE;
- vc3_base = IMPACT_VC3_BASE;
- scr->fifo_status = IMPACT_FIFOSTATUS;
- scr->cfifo = IMPACT_CFIFO;
- }
-
- if (has_hq4) {
- /* HQ4 initialization */
- bus_space_write_4(scr->iot, scr->ioh, IMPACTSR_CFIFO_HW,
- 0x00000047);
- bus_space_write_4(scr->iot, scr->ioh, IMPACTSR_CFIFO_LW,
- 0x00000014);
- bus_space_write_4(scr->iot, scr->ioh, IMPACTSR_CFIFO_DELAY,
- 0x00000064);
- bus_space_write_4(scr->iot, scr->ioh, IMPACTSR_DFIFO_HW,
- 0x00000040);
- bus_space_write_4(scr->iot, scr->ioh, IMPACTSR_DFIFO_LW,
- 0x00000010);
- bus_space_write_4(scr->iot, scr->ioh, IMPACTSR_DFIFO_DELAY,
- 0x00000000);
- } else {
- /* HQ3 initialization */
- bus_space_write_4(scr->iot, scr->ioh, IMPACT_CFIFO_HW,
- 0x00000020);
- bus_space_write_4(scr->iot, scr->ioh, IMPACT_CFIFO_LW,
- 0x00000014);
- bus_space_write_4(scr->iot, scr->ioh, IMPACT_CFIFO_DELAY,
- 0x00000064);
- bus_space_write_4(scr->iot, scr->ioh, IMPACT_DFIFO_HW,
- 0x00000028);
- bus_space_write_4(scr->iot, scr->ioh, IMPACT_DFIFO_LW,
- 0x00000014);
- bus_space_write_4(scr->iot, scr->ioh, IMPACT_DFIFO_DELAY,
- 0x00000fff);
- }
-
- /* VC3 initialization: disable hardware cursor */
- bus_space_write_4(scr->iot, scr->ioh,
- vc3_base + IMPACTSR_VC3_INDEXDATA, 0x1d000100);
-
- /* RSS initialization */
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_COLORMASKLSBSA, 0xffffff, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_COLORMASKLSBSB, 0xffffff, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_COLORMASKMSBS, 0, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_XFRMASKLO, 0xffffff, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_XFRMASKHI, 0xffffff, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_DRBPOINTERS, 0xc8240, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_CONFIG, 0xcac, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_XYWIN,
- IMPACTSR_YXCOORDS(0, 0x3ff), 0);
-
- /* XMAP initialization */
- bus_space_write_1(scr->iot, scr->ioh,
- xmap_base + IMPACTSR_XMAP_PP1SELECT, 0x01);
- bus_space_write_1(scr->iot, scr->ioh,
- xmap_base + IMPACTSR_XMAP_INDEX, 0x00);
- bus_space_write_4(scr->iot, scr->ioh,
- xmap_base + IMPACTSR_XMAP_MAIN_MODE, 0x000007a4);
-}
-
-/*
- * Write to the command FIFO.
- */
-static inline void
-impact_cmd_fifo_write(struct impact_screen *scr, uint64_t reg, uint32_t val,
- int exec)
-{
- uint64_t cmd;
-
- cmd = IMPACTSR_CFIFO_WRITE | (reg << IMPACTSR_CFIFO_REG_SHIFT);
- if (exec)
- cmd |= IMPACTSR_CFIFO_EXEC;
- bus_space_write_8(scr->iot, scr->ioh, scr->cfifo, cmd | val);
-}
-
-/*
- * Wait until the command FIFO is empty.
- */
-int
-impact_cmd_fifo_wait(struct impact_screen *scr)
-{
- u_int32_t val, timeout = 1000000;
-#ifdef DIAGNOSTIC
- struct impact_softc *sc = scr->sc;
-#endif
-
- val = bus_space_read_4(scr->iot, scr->ioh, scr->fifo_status);
- while ((val & IMPACTSR_FIFO_MASK) != 0) {
- delay(1);
- if (--timeout == 0) {
-#ifdef DIAGNOSTIC
- if (sc != NULL && sc->console == 0)
- printf("%s: timeout waiting for command fifo\n",
- sc != NULL ? sc->sc_dev.dv_xname :
- impact_cd.cd_name);
-#endif
- return ETIMEDOUT;
- }
- val = bus_space_read_4(scr->iot, scr->ioh, scr->fifo_status);
- }
-
- return 0;
-}
-
-/*
- * Interfaces for wscons.
- */
-
-int
-impact_ioctl(void *v, u_long cmd, caddr_t data, int flags, struct proc *p)
-{
- struct impact_screen *scr = (struct impact_screen *)v;
- struct rasops_info *ri;
- struct wsdisplay_fbinfo *fb;
-
- switch (cmd) {
- case WSDISPLAYIO_GTYPE:
- *(u_int *)data = WSDISPLAY_TYPE_IMPACT;
- break;
- case WSDISPLAYIO_GINFO:
- fb = (struct wsdisplay_fbinfo *)data;
- ri = &scr->ri;
- fb->height = ri->ri_height;
- fb->width = ri->ri_width;
- fb->depth = ri->ri_depth;
- fb->cmsize = 0;
- break;
-#if 0
- case WSDISPLAYIO_LINEBYTES:
- ri = &scr->ri;
- *(u_int *)data = ri->ri_stride;
- break;
-#endif
- default:
- return -1;
- }
-
- return 0;
-}
-
-paddr_t
-impact_mmap(void *v, off_t offset, int prot)
-{
- if (offset < 0 || (offset & PAGE_MASK) != 0)
- return -1;
-
- return -1;
-}
-
-int
-impact_alloc_screen(void *v, const struct wsscreen_descr *type,
- void **cookiep, int *curxp, int *curyp, uint32_t *attrp)
-{
- struct impact_screen *scr = (struct impact_screen *)v;
- struct rasops_info *ri = &scr->ri;
- struct impact_softc *sc = (struct impact_softc *)scr->sc;
-
- /* We do not allow multiple consoles at the moment. */
- if (sc->nscreens > 0)
- return ENOMEM;
-
- sc->nscreens++;
-
- *cookiep = ri;
- *curxp = 0;
- *curyp = 0;
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &scr->defattr);
- *attrp = scr->defattr;
-
- return 0;
-}
-
-void
-impact_free_screen(void *v, void *cookie)
-{
- /* We do not allow multiple consoles at the moment. */
-}
-
-int
-impact_show_screen(void *v, void *cookie, int waitok,
- void (*cb)(void *, int, int), void *cbarg)
-{
- /* We do not allow multiple consoles at the moment. */
- return 0;
-}
-
-int
-impact_load_font(void *v, void *emulcookie, struct wsdisplay_font *font)
-{
- struct impact_screen *scr = (struct impact_screen *)v;
- struct rasops_info *ri = &scr->ri;
-
- return rasops_load_font(ri, emulcookie, font);
-}
-
-int
-impact_list_font(void *v, struct wsdisplay_font *font)
-{
- struct impact_screen *scr = (struct impact_screen *)v;
- struct rasops_info *ri = &scr->ri;
-
- return rasops_list_font(ri, font);
-}
-
-/*
- * Hardware accelerated functions.
- */
-
-void
-impact_rop(struct impact_screen *scr, int x, int y, int w, int h, int op,
- u_int c)
-{
- impact_cmd_fifo_wait(scr);
- if (op == OPENGL_LOGIC_OP_COPY)
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_PP1FILLMODE,
- IMPACTSR_PP1FILLMODE(0x6300, op), 0);
- else
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_PP1FILLMODE,
- IMPACTSR_PP1FILLMODE(0x6304, op), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_FILLMODE, 0, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_PACKEDCOLOR,
- c /* & 0x00ffffff */, 0); /* no mask, ri_devcmap is 24 bit */
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BLOCKXYSTARTI,
- IMPACTSR_XYCOORDS(x, y), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BLOCKXYENDI,
- IMPACTSR_XYCOORDS(x + w - 1, y + h - 1), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_IR_ALIAS, 0x18, 1);
-}
-
-void
-impact_fillrect(struct impact_screen *scr, int x, int y, int w, int h, u_int c)
-{
- impact_rop(scr, x, y, w, h, OPENGL_LOGIC_OP_COPY, c);
-}
-
-int
-impact_do_cursor(struct rasops_info *ri)
-{
- struct impact_screen *scr = ri->ri_hw;
- int y, x, w, h, fg, bg;
-
- w = ri->ri_font->fontwidth;
- h = ri->ri_font->fontheight;
- x = ri->ri_xorigin + ri->ri_ccol * w;
- y = ri->ri_yorigin + ri->ri_crow * h;
-
- ri->ri_ops.unpack_attr(ri, scr->defattr, &fg, &bg, NULL);
-
- impact_rop(scr, x, y, w, h, OPENGL_LOGIC_OP_XOR, ri->ri_devcmap[fg]);
- impact_cmd_fifo_wait(scr);
-
- return 0;
-}
-
-int
-impact_putchar(void *cookie, int row, int col, u_int uc, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct impact_screen *scr = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int x, y, w, h, bg, fg, ul;
- u_int8_t *fontbitmap;
- u_int32_t bg484;
- u_int chunk;
- struct wsdisplay_charcell *cell;
-
- /* Update backing store. */
- cell = scr->bs + row * ri->ri_cols + col;
- cell->uc = uc;
- cell->attr = attr;
-
- w = font->fontwidth;
- h = font->fontheight;
- x = ri->ri_xorigin + col * w;
- y = ri->ri_yorigin + row * h;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, &ul);
-
- /* Handle spaces with a single fillrect. */
- if ((uc == ' ' || uc == 0) && ul == 0) {
- impact_fillrect(scr, x, y, w, h, ri->ri_devcmap[bg]);
- return 0;
- }
-
- fontbitmap = (u_int8_t *)(font->data + (uc - font->firstchar) *
- ri->ri_fontscale);
-
- /*
- * 1bpp pixel expansion; fast but uses a 4:8:4 background color
- * instead of the expected 8:8:8.
- */
- bg484 = ri->ri_devcmap[bg]; /* 00BBGGRR */
- bg484 = ((bg484 & 0x00f000f0) >> 4) | /* 00B000R */
- (bg484 & 0x0000ff00); /* 0000GG00 */
-
- impact_cmd_fifo_wait(scr);
-
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_PP1FILLMODE,
- IMPACTSR_PP1FILLMODE(0x6300, OPENGL_LOGIC_OP_COPY), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_FILLMODE,
- 0x00400018, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_PACKEDCOLOR,
- ri->ri_devcmap[fg], 0);
-
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BKGRD_RG,
- (bg484 & 0x0000ffff) << 8, 0); /* 00 GG0R 00 */
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BKGRD_BA,
- (bg484 & 0x00ff0000) >> 8, 0); /* 00 000B 00 */
-
- if (w <= 8) {
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BLOCKXYSTARTI,
- IMPACTSR_XYCOORDS(x, y), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BLOCKXYENDI,
- IMPACTSR_XYCOORDS(x + w - 1, y + h - 1), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_IR_ALIAS, 0x18, 1);
-
- for (; h != 0; h--) {
- chunk = *fontbitmap;
- fontbitmap += font->stride;
-
- /* Handle underline. */
- if (ul && h == 1)
- chunk = 0xff;
-
- impact_cmd_fifo_wait(scr);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_CHAR_H,
- chunk << 24, 1);
- }
- } else {
- for (; h != 0; h--) {
- chunk = *(u_int16_t *)fontbitmap;
- fontbitmap += font->stride;
-
- /* Handle underline. */
- if (ul && h == 1)
- chunk = 0xffff;
-
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BLOCKXYSTARTI,
- IMPACTSR_XYCOORDS(x, y), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_BLOCKXYENDI,
- IMPACTSR_XYCOORDS(x + w - 1, y + 1 - 1), 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_IR_ALIAS,
- 0x18, 1);
-
- impact_cmd_fifo_wait(scr);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_CHAR_H,
- chunk << 16, 0);
- impact_cmd_fifo_write(scr, IMPACTSR_CMD_CHAR_L,
- chunk << 24, 1);
-
- y++;
- }
- }
-
- return 0;
-}
-
-int
-impact_copycols(void *cookie, int row, int src, int dst, int num)
-{
- struct rasops_info *ri = cookie;
- struct impact_screen *scr = ri->ri_hw;
- struct wsdisplay_charcell *cell;
-
- /* Copy columns in backing store. */
- cell = scr->bs + row * ri->ri_cols;
- memmove(cell + dst, cell + src,
- num * sizeof(struct wsdisplay_charcell));
-
- /* Repaint affected area */
- cell += dst;
- for (; num != 0; num--, dst++, cell++)
- impact_putchar(cookie, row, dst, cell->uc, cell->attr);
-
- return 0;
-}
-
-int
-impact_erasecols(void *cookie, int row, int col, int num, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct impact_screen *scr = ri->ri_hw;
- int bg, fg, i;
- struct wsdisplay_charcell *cell;
-
- /* Erase columns in backing store. */
- cell = scr->bs + row * ri->ri_cols + col;
- for (i = num; i != 0; i--, cell++) {
- cell->uc = 0;
- cell->attr = attr;
- }
-
- ri->ri_ops.unpack_attr(cookie, attr, &fg, &bg, NULL);
-
- row *= ri->ri_font->fontheight;
- col *= ri->ri_font->fontwidth;
- num *= ri->ri_font->fontwidth;
-
- impact_fillrect(scr, ri->ri_xorigin + col, ri->ri_yorigin + row,
- num, ri->ri_font->fontheight, ri->ri_devcmap[bg]);
-
- return 0;
-}
-
-int
-impact_copyrows(void *cookie, int src, int dst, int num)
-{
- struct rasops_info *ri = cookie;
- struct impact_screen *scr = ri->ri_hw;
- struct wsdisplay_charcell *cell;
- int col;
-
- /* Copy rows in backing store. */
- cell = scr->bs + dst * ri->ri_cols;
- memmove(cell, scr->bs + src * ri->ri_cols,
- num * ri->ri_cols * sizeof(struct wsdisplay_charcell));
-
- /* Repaint affected area */
- for (; num != 0; num--, dst++) {
- for (col = 0; col < ri->ri_cols; col++, cell++)
- impact_putchar(cookie, dst, col, cell->uc, cell->attr);
- }
-
- return 0;
-}
-
-int
-impact_eraserows(void *cookie, int row, int num, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct impact_screen *scr = ri->ri_hw;
- int x, y, w, bg, fg;
- struct wsdisplay_charcell *cell;
-
- /* Erase rows in backing store. */
- cell = scr->bs + row * ri->ri_cols;
- for (x = ri->ri_cols; x != 0; x--, cell++) {
- cell->uc = 0;
- cell->attr = attr;
- }
- for (y = 1; y < num; y++)
- memmove(scr->bs + (row + y) * ri->ri_cols,
- scr->bs + row * ri->ri_cols,
- ri->ri_cols * sizeof(struct wsdisplay_charcell));
-
- ri->ri_ops.unpack_attr(cookie, attr, &fg, &bg, NULL);
-
- if ((num == ri->ri_rows) && ISSET(ri->ri_flg, RI_FULLCLEAR)) {
- num = ri->ri_height;
- x = y = 0;
- w = ri->ri_width;
- } else {
- num *= ri->ri_font->fontheight;
- x = ri->ri_xorigin;
- y = ri->ri_yorigin + row * ri->ri_font->fontheight;
- w = ri->ri_emuwidth;
- }
-
- impact_fillrect(scr, x, y, w, num, ri->ri_devcmap[bg]);
- impact_cmd_fifo_wait(scr);
-
- return 0;
-}
-
-/*
- * Console support.
- */
-
-/* console backing store, worst case font selection */
-static struct wsdisplay_charcell
- impact_cons_bs[(IMPACT_WIDTH / 8) * (IMPACT_HEIGHT / 16)];
-
-int
-impact_cnattach_common(bus_space_tag_t iot, bus_space_handle_t ioh, int has_hq4)
-{
- struct impact_screen *scr = &impact_cons;
- struct rasops_info *ri = &scr->ri;
- int rc;
-
- scr->iot = iot;
- scr->ioh = ioh;
- impact_setup(scr, has_hq4);
- scr->bs = impact_cons_bs;
- rc = impact_init_screen(scr);
- if (rc != 0)
- return rc;
-
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &scr->defattr);
- wsdisplay_cnattach(&scr->wsd, ri, 0, 0, scr->defattr);
-
- return 0;
-}
+++ /dev/null
-/* $OpenBSD: impactreg.h,v 1.1 2012/04/18 17:28:24 miod Exp $ */
-/*
- * Copyright (c) 2010 Miodrag Vallat.
- * Copyright (c) 2009, 2010 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Impact and ImpactSR registers
- */
-
-#define IMPACTSR_STATUS 0x020000
-#define IMPACTSR_FIFOSTATUS 0x020008
-#define IMPACTSR_FIFO_MASK 0x000000ff
-#define IMPACTSR_GIOSTATUS 0x020100
-#define IMPACTSR_DMABUSY 0x020200
-#define IMPACTSR_CFIFO 0x020400
-
-#define IMPACT_STATUS 0x070000
-#define IMPACT_FIFOSTATUS 0x070004
-#define IMPACT_GIOSTATUS 0x070100
-#define IMPACT_DMABUSY 0x070104
-#define IMPACT_CFIFO 0x070080
-
-#define IMPACTSR_CFIFO_HW 0x040000
-#define IMPACTSR_CFIFO_LW 0x040008
-#define IMPACTSR_CFIFO_DELAY 0x040010
-#define IMPACTSR_DFIFO_HW 0x040020
-#define IMPACTSR_DFIFO_LW 0x040028
-#define IMPACTSR_DFIFO_DELAY 0x040030
-#define IMPACT_CFIFO_HW 0x050020
-#define IMPACT_CFIFO_LW 0x050024
-#define IMPACT_CFIFO_DELAY 0x050028
-#define IMPACT_DFIFO_HW 0x05002c
-#define IMPACT_DFIFO_LW 0x050030
-#define IMPACT_DFIFO_DELAY 0x050034
-
-#define IMPACTSR_XMAP_BASE 0x071c00
-#define IMPACT_XMAP_BASE 0x061c00
-
-#define IMPACTSR_XMAP_PP1SELECT 0x000008
-#define IMPACTSR_XMAP_INDEX 0x000088
-#define IMPACTSR_XMAP_CONFIG 0x000100
-#define IMPACTSR_XMAP_CONFIGB 0x000108
-#define IMPACTSR_XMAP_BUF_SELECT 0x000180
-#define IMPACTSR_XMAP_MAIN_MODE 0x000200
-#define IMPACTSR_XMAP_OVERLAY_MODE 0x000280
-#define IMPACTSR_XMAP_DIB 0x000300
-#define IMPACTSR_XMAP_DIB_DW 0x000340
-#define IMPACTSR_XMAP_RE_RAC 0x000380
-
-#define IMPACTSR_VC3_BASE 0x072000
-#define IMPACT_VC3_BASE 0x062000
-
-#define IMPACTSR_VC3_INDEX 0x000008
-#define IMPACTSR_VC3_INDEXDATA 0x000038
-#define IMPACTSR_VC3_DATA 0x0000b0
-#define IMPACTSR_VC3_RAM 0x000190
-
-/*
- * Command FIFO instruction encoding
- */
-
-#define IMPACTSR_CFIFO_WRITE 0x0018000400000000UL
-#define IMPACTSR_CFIFO_EXEC 0x0004000000000000UL
-#define IMPACTSR_CFIFO_REG_SHIFT 40
-
-/*
- * Command FIFO registers
- */
-
-#define IMPACTSR_CMD_GLINE_XSTARTF 0x0c
-#define IMPACTSR_CMD_IR_ALIAS 0x45
-#define IMPACTSR_CMD_BLOCKXYSTARTI 0x46 /* XY coords */
-#define IMPACTSR_CMD_BLOCKXYENDI 0x47 /* XY coords */
-#define IMPACTSR_CMD_PACKEDCOLOR 0x5b
-#define IMPACTSR_CMD_ALPHA 0x5f
-#define IMPACTSR_CMD_CHAR_H 0x70
-#define IMPACTSR_CMD_CHAR_L 0x71
-#define IMPACTSR_CMD_XFRCONTROL 0x102
-#define IMPACTSR_CMD_FILLMODE 0x110
-#define IMPACTSR_CMD_CONFIG 0x112
-#define IMPACTSR_CMD_XYWIN 0x115 /* YX coords */
-#define IMPACTSR_CMD_BKGRD_RG 0x140
-#define IMPACTSR_CMD_BKGRD_BA 0x141
-#define IMPACTSR_CMD_XFRSIZE 0x153 /* YX coords */
-#define IMPACTSR_CMD_XFRMASKLO 0x156
-#define IMPACTSR_CMD_XFRMASKHI 0x157
-#define IMPACTSR_CMD_XFRCOUNTERS 0x158 /* YX coords */
-#define IMPACTSR_CMD_XFRMODE 0x159
-#define IMPACTSR_CMD_RE_TOGGLECNTX 0x15f
-#define IMPACTSR_CMD_PP1FILLMODE 0x161
-#define IMPACTSR_CMD_COLORMASKMSBS 0x162
-#define IMPACTSR_CMD_COLORMASKLSBSA 0x163
-#define IMPACTSR_CMD_COLORMASKLSBSB 0x164
-#define IMPACTSR_CMD_DRBPOINTERS 0x16d
-
-#define IMPACTSR_XYCOORDS(x,y) (((x) << 16) | (y))
-#define IMPACTSR_YXCOORDS(x,y) (((y) << 16) | (x))
-
-#define IMPACTSR_PP1FILLMODE(mode,op) ((mode) | ((op) << 26))
+++ /dev/null
-/* $OpenBSD: impactvar.h,v 1.1 2012/04/18 17:28:24 miod Exp $ */
-
-/*
- * Copyright (c) 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-struct impact_screen;
-
-struct impact_softc {
- struct device sc_dev;
- struct impact_screen *curscr;
- int console;
- int nscreens;
-};
-
-int impact_attach_common(struct impact_softc *, bus_space_tag_t,
- bus_space_handle_t, int, int);
-int impact_cnattach_common(bus_space_tag_t, bus_space_handle_t, int);
-
-struct gio_attach_args;
-int impact_gio_cnprobe(struct gio_attach_args *);
-int impact_gio_cnattach(struct gio_attach_args *);
-int impact_xbow_cnprobe(void);
-int impact_xbow_cnattach(void);
+++ /dev/null
-/* $OpenBSD: iockbc.c,v 1.12 2019/10/17 13:42:15 cheloha Exp $ */
-/*
- * Copyright (c) 2013, Miodrag Vallat
- * Copyright (c) 2006, 2007, 2009 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Derived from sys/dev/ic/pckbc.c under the following terms:
- * $NetBSD: pckbc.c,v 1.5 2000/06/09 04:58:35 soda Exp $ */
-
-/*
- * Copyright (c) 1998
- * Matthias Drochner. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Driver for IOC3 and IOC4 PS/2 Controllers (iockbc)
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-#include <sys/timeout.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/signalvar.h>
-#include <sys/errno.h>
-#include <sys/queue.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <mips64/archtype.h>
-
-#include <sgi/pci/iocreg.h>
-#include <sgi/pci/iocvar.h>
-#include <sgi/pci/iofreg.h>
-#include <sgi/pci/iofvar.h>
-
-#include <dev/ic/i8042reg.h>
-#include <dev/ic/pckbcvar.h>
-#include <dev/pckbc/pckbdreg.h>
-#define KBC_DEVCMD_ACK KBR_ACK
-#define KBC_DEVCMD_RESEND KBR_RESEND
-#include <dev/pckbc/pckbdvar.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcidevs.h>
-
-#include <sgi/dev/iockbcreg.h>
-#include <sgi/dev/iockbcvar.h>
-
-#include "iockbc.h"
-
-const char *iockbc_slot_names[] = { "kbd", "mouse" };
-
-/* #define IOCKBC_DEBUG */
-#ifdef IOCKBC_DEBUG
-#define DPRINTF(x...) do { printf(x); } while(0)
-#else
-#define DPRINTF(x...)
-#endif
-
-struct iockbc_reginfo {
- bus_addr_t rx;
- bus_addr_t tx;
- bus_addr_t cs;
- uint32_t busy;
-};
-
-struct iockbc_softc {
- struct pckbc_softc sc_pckbc;
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- const struct iockbc_reginfo *reginfo;
- int console;
-};
-
-int iockbc_match(struct device *, void *, void *);
-void iockbc_ioc_attach(struct device *, struct device *, void *);
-void iockbc_iof_attach(struct device *, struct device *, void *);
-
-#if NIOCKBC_IOC > 0
-struct cfattach iockbc_ioc_ca = {
- sizeof(struct iockbc_softc), iockbc_match, iockbc_ioc_attach
-};
-#endif
-#if NIOCKBC_IOF > 0
-struct cfattach iockbc_iof_ca = {
- sizeof(struct iockbc_softc), iockbc_match, iockbc_iof_attach
-};
-#endif
-
-struct cfdriver iockbc_cd = {
- NULL, "iockbc", DV_DULL
-};
-
-/* Descriptor for one device command. */
-struct pckbc_devcmd {
- TAILQ_ENTRY(pckbc_devcmd) next;
- int flags;
-#define KBC_CMDFLAG_SYNC 1 /* Give descriptor back to caller. */
-#define KBC_CMDFLAG_SLOW 2
- u_char cmd[4];
- int cmdlen, cmdidx, retries;
- u_char response[4];
- int status, responselen, responseidx;
-};
-
-/* Data per slave device. */
-struct pckbc_slotdata {
- int polling; /* Don't read data port in interrupt handler. */
- TAILQ_HEAD(, pckbc_devcmd) cmdqueue; /* Active commands. */
- TAILQ_HEAD(, pckbc_devcmd) freequeue; /* Free commands. */
-#define NCMD 5
- struct pckbc_devcmd cmds[NCMD];
- int rx_queue[3];
- int rx_index;
- const struct iockbc_reginfo *reginfo;
-};
-
-#define CMD_IN_QUEUE(q) (TAILQ_FIRST(&(q)->cmdqueue) != NULL)
-
-enum iockbc_slottype { EMPTY, KBD, MOUSE };
-
-static struct pckbc_internal iockbc_consdata;
-static struct pckbc_slotdata iockbc_cons_slotdata;
-
-int iockbc_is_ioc_console(struct ioc_attach_args *);
-int iockbc_is_iof_console(struct iof_attach_args *);
-void iockbc_attach_common(struct iockbc_softc *, bus_addr_t, int,
- const struct iockbc_reginfo *, const struct iockbc_reginfo *);
-void iockbc_start(struct pckbc_internal *, pckbc_slot_t);
-int iockbc_attach_slot(struct iockbc_softc *, pckbc_slot_t);
-void iockbc_init_slotdata(struct pckbc_slotdata *,
- const struct iockbc_reginfo *);
-int iockbc_submatch(struct device *, void *, void *);
-int iockbcprint(void *, const char *);
-int iockbcintr(void *);
-int iockbcintr_internal(struct pckbc_internal *, struct pckbc_softc *);
-void iockbc_cleanqueue(struct pckbc_slotdata *);
-void iockbc_cleanup(void *);
-void iockbc_poll(void *);
-int iockbc_cmdresponse(struct pckbc_internal *, pckbc_slot_t, u_char);
-int iockbc_poll_read(struct pckbc_internal *, pckbc_slot_t);
-int iockbc_poll_write(struct pckbc_internal *, pckbc_slot_t, int);
-void iockbc_process_input(struct pckbc_softc *, struct pckbc_internal *,
- int, uint);
-enum iockbc_slottype
- iockbc_probe_slot(struct pckbc_internal *, pckbc_slot_t);
-
-int
-iockbc_match(struct device *parent, void *cf, void *aux)
-{
- /*
- * We expect ioc and iof NOT to attach us if there are no PS/2 ports.
- */
- return 1;
-}
-
-#if NIOCKBC_IOC > 0
-/*
- * Register assignments
- */
-
-const struct iockbc_reginfo iockbc_ioc[PCKBC_NSLOTS] = {
- [PCKBC_KBD_SLOT] = {
- .rx = IOC3_KBC_KBD_RX,
- .tx = IOC3_KBC_KBD_TX,
- .cs = IOC3_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_KBD_WRITE_PENDING
- },
- [PCKBC_AUX_SLOT] = {
- .rx = IOC3_KBC_AUX_RX,
- .tx = IOC3_KBC_AUX_TX,
- .cs = IOC3_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_AUX_WRITE_PENDING
- }
-};
-
-const struct iockbc_reginfo iockbc_ioc_inverted[PCKBC_NSLOTS] = {
- [PCKBC_KBD_SLOT] = {
- .rx = IOC3_KBC_AUX_RX,
- .tx = IOC3_KBC_AUX_TX,
- .cs = IOC3_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_AUX_WRITE_PENDING
- },
- [PCKBC_AUX_SLOT] = {
- .rx = IOC3_KBC_KBD_RX,
- .tx = IOC3_KBC_KBD_TX,
- .cs = IOC3_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_KBD_WRITE_PENDING
- }
-};
-
-void
-iockbc_ioc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct iockbc_softc *isc = (void*)self;
- struct ioc_attach_args *iaa = aux;
-
- /* Setup bus space mapping. */
- isc->iot = iaa->iaa_memt;
- isc->ioh = iaa->iaa_memh;
-
- /* Establish interrupt handler. */
- if (ioc_intr_establish(parent, iaa->iaa_dev, IPL_TTY, iockbcintr,
- (void *)isc, self->dv_xname))
- printf("\n");
- else
- printf(": unable to establish interrupt\n");
-
- iockbc_attach_common(isc, iaa->iaa_base, iockbc_is_ioc_console(iaa),
- iockbc_ioc, iockbc_ioc_inverted);
-}
-#endif
-
-#if NIOCKBC_IOF > 0
-/*
- * Register assignments
- */
-
-const struct iockbc_reginfo iockbc_iof[PCKBC_NSLOTS] = {
- [PCKBC_KBD_SLOT] = {
- .rx = IOC4_KBC_KBD_RX,
- .tx = IOC4_KBC_KBD_TX,
- .cs = IOC4_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_KBD_WRITE_PENDING
- },
- [PCKBC_AUX_SLOT] = {
- .rx = IOC4_KBC_AUX_RX,
- .tx = IOC4_KBC_AUX_TX,
- .cs = IOC4_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_AUX_WRITE_PENDING
- }
-};
-
-const struct iockbc_reginfo iockbc_iof_inverted[PCKBC_NSLOTS] = {
- [PCKBC_KBD_SLOT] = {
- .rx = IOC4_KBC_AUX_RX,
- .tx = IOC4_KBC_AUX_TX,
- .cs = IOC4_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_AUX_WRITE_PENDING
- },
- [PCKBC_AUX_SLOT] = {
- .rx = IOC4_KBC_KBD_RX,
- .tx = IOC4_KBC_KBD_TX,
- .cs = IOC4_KBC_CTRL_STATUS,
- .busy = IOC3_KBC_STATUS_KBD_WRITE_PENDING
- }
-};
-
-void
-iockbc_iof_attach(struct device *parent, struct device *self, void *aux)
-{
- struct iockbc_softc *isc = (void*)self;
- struct iof_attach_args *iaa = aux;
-
- /* Setup bus space mapping. */
- isc->iot = iaa->iaa_memt;
- isc->ioh = iaa->iaa_memh;
-
- /* Establish interrupt handler. */
- if (iof_intr_establish(parent, iaa->iaa_dev, IPL_TTY, iockbcintr,
- (void *)isc, self->dv_xname))
- printf("\n");
- else
- printf(": unable to establish interrupt\n");
-
- iockbc_attach_common(isc, iaa->iaa_base, iockbc_is_iof_console(iaa),
- iockbc_iof, iockbc_iof_inverted);
-}
-#endif
-
-void
-iockbc_init_slotdata(struct pckbc_slotdata *q,
- const struct iockbc_reginfo *reginfo)
-{
- int i;
- TAILQ_INIT(&q->cmdqueue);
- TAILQ_INIT(&q->freequeue);
-
- for (i = 0; i < NCMD; i++)
- TAILQ_INSERT_TAIL(&q->freequeue, &(q->cmds[i]), next);
-
- q->polling = 0;
- q->rx_index = -1;
-
- q->reginfo = reginfo;
-}
-
-int
-iockbcprint(void *aux, const char *pnp)
-{
- struct pckbc_attach_args *pa = aux;
-
- if (!pnp)
- printf(" (%s slot)", iockbc_slot_names[pa->pa_slot]);
-
- return (QUIET);
-}
-
-int
-iockbc_submatch(struct device *parent, void *match, void *aux)
-{
- struct cfdata *cf = match;
- struct pckbc_attach_args *pa = aux;
-
- if (cf->cf_loc[PCKBCCF_SLOT] != PCKBCCF_SLOT_DEFAULT &&
- cf->cf_loc[PCKBCCF_SLOT] != pa->pa_slot)
- return (0);
-
- return ((*cf->cf_attach->ca_match)(parent, cf, pa));
-}
-
-/*
- * Figure out what kind of device is connected to the given slot, if any.
- */
-enum iockbc_slottype
-iockbc_probe_slot(struct pckbc_internal *t, pckbc_slot_t slot)
-{
- int rc, i, tries;
-
- /* reset device */
- pckbc_flush(t, slot);
- for (tries = 0; tries < 5; tries++) {
- rc = iockbc_poll_write(t, slot, KBC_RESET);
- if (rc < 0) {
- DPRINTF(("%s: slot %d write failed\n", __func__, slot));
- return EMPTY;
- }
- for (i = 10; i != 0; i--) {
- rc = iockbc_poll_read(t, slot);
- if (rc >= 0)
- break;
- }
- if (rc < 0) {
- DPRINTF(("%s: slot %d no answer to reset\n",
- __func__, slot));
- return EMPTY;
- }
- if (rc == KBC_DEVCMD_ACK)
- break;
- if (rc == KBC_DEVCMD_RESEND)
- continue;
- DPRINTF(("%s: slot %d bogus reset ack %02x\n",
- __func__, slot, rc));
- return EMPTY;
- }
-
- /* get answer byte */
- for (i = 10; i != 0; i--) {
- rc = iockbc_poll_read(t, slot);
- if (rc >= 0)
- break;
- }
- if (rc < 0) {
- DPRINTF(("%s: slot %d no answer to reset after ack\n",
- __func__, slot));
- return EMPTY;
- }
- if (rc != KBR_RSTDONE) {
- DPRINTF(("%s: slot %d bogus reset answer %02x\n",
- __func__, slot, rc));
- return EMPTY;
- }
- /* mice send an extra byte */
- (void)iockbc_poll_read(t, slot);
-
- /* ask for device id */
- for (tries = 0; tries < 5; tries++) {
- rc = iockbc_poll_write(t, slot, KBC_READID);
- if (rc == -1) {
- DPRINTF(("%s: slot %d write failed\n", __func__, slot));
- return EMPTY;
- }
- for (i = 10; i != 0; i--) {
- rc = iockbc_poll_read(t, slot);
- if (rc >= 0)
- break;
- }
- if (rc < 0) {
- DPRINTF(("%s: slot %d no answer to command\n",
- __func__, slot));
- return EMPTY;
- }
- if (rc == KBC_DEVCMD_ACK)
- break;
- if (rc == KBC_DEVCMD_RESEND)
- continue;
- DPRINTF(("%s: slot %d bogus command ack %02x\n",
- __func__, slot, rc));
- return EMPTY;
- }
-
- /* get first answer byte */
- for (i = 10; i != 0; i--) {
- rc = iockbc_poll_read(t, slot);
- if (rc >= 0)
- break;
- }
- if (rc < 0) {
- DPRINTF(("%s: slot %d no answer to command after ack\n",
- __func__, slot));
- return EMPTY;
- }
-
- switch (rc) {
- case KCID_KBD1: /* keyboard */
- /* get second answer byte */
- rc = iockbc_poll_read(t, slot);
- if (rc < 0) {
- DPRINTF(("%s: slot %d truncated keyboard answer\n",
- __func__, slot));
- return EMPTY;
- }
- if (rc != KCID_KBD2) {
- DPRINTF(("%s: slot %d unexpected keyboard answer"
- " 0x%02x 0x%02x\n", __func__, slot, KCID_KBD1, rc));
- /* return EMPTY; */
- }
- return KBD;
- case KCID_MOUSE: /* mouse */
- return MOUSE;
- default:
- DPRINTF(("%s: slot %d unknown device answer 0x%02x\n",
- __func__, slot, rc));
- return EMPTY;
- }
-}
-
-int
-iockbc_attach_slot(struct iockbc_softc *isc, pckbc_slot_t slot)
-{
- struct pckbc_softc *sc = &isc->sc_pckbc;
- struct pckbc_internal *t = sc->id;
- struct pckbc_attach_args pa;
- int found;
-
- iockbc_init_slotdata(t->t_slotdata[slot], &isc->reginfo[slot]);
-
- pa.pa_tag = t;
- pa.pa_slot = slot;
-
- found = (config_found_sm((struct device *)sc, &pa,
- iockbcprint, iockbc_submatch) != NULL);
-
- return (found);
-}
-
-void
-iockbc_attach_common(struct iockbc_softc *isc, bus_addr_t addr, int console,
- const struct iockbc_reginfo *reginfo,
- const struct iockbc_reginfo *reginfo_inverted)
-{
- struct pckbc_softc *sc = &isc->sc_pckbc;
- struct pckbc_internal *t;
- bus_addr_t cs;
- uint32_t csr;
- pckbc_slot_t slot;
-
- if (console) {
- iockbc_consdata.t_sc = sc;
- sc->id = t = &iockbc_consdata;
- isc->console = 1;
- if (®info[PCKBC_KBD_SLOT] == iockbc_cons_slotdata.reginfo)
- isc->reginfo = reginfo;
- else
- isc->reginfo = reginfo_inverted;
- } else {
- /*
- * Setup up controller: do not force pull clock and data lines
- * low, clamp clocks after one byte received.
- */
- cs = reginfo[PCKBC_KBD_SLOT].cs;
- csr = bus_space_read_4(isc->iot, isc->ioh, cs);
- csr &= ~(IOC3_KBC_CTRL_KBD_PULL_DATA_LOW |
- IOC3_KBC_CTRL_KBD_PULL_CLOCK_LOW |
- IOC3_KBC_CTRL_AUX_PULL_DATA_LOW |
- IOC3_KBC_CTRL_AUX_PULL_CLOCK_LOW |
- IOC3_KBC_CTRL_KBD_CLAMP_3 | IOC3_KBC_CTRL_AUX_CLAMP_3);
- csr |= IOC3_KBC_CTRL_KBD_CLAMP_1 | IOC3_KBC_CTRL_AUX_CLAMP_1;
- bus_space_write_4(isc->iot, isc->ioh, cs, csr);
-
- /* Setup pckbc_internal structure. */
- t = malloc(sizeof(struct pckbc_internal), M_DEVBUF,
- M_WAITOK | M_ZERO);
- t->t_iot = isc->iot;
- t->t_ioh_d = isc->ioh;
- t->t_ioh_c = isc->ioh;
- t->t_addr = addr;
- t->t_sc = sc;
- sc->id = t;
-
- timeout_set(&t->t_cleanup, iockbc_cleanup, t);
- timeout_set(&t->t_poll, iockbc_poll, t);
-
- isc->reginfo = reginfo;
- }
-
- for (slot = 0; slot < PCKBC_NSLOTS; slot++) {
- if (t->t_slotdata[slot] == NULL) {
- t->t_slotdata[slot] =
- malloc(sizeof(struct pckbc_slotdata),
- M_DEVBUF, M_WAITOK);
- }
- }
-
- if (!console) {
- enum iockbc_slottype slottype;
- int mouse_on_main = 0;
-
- /*
- * Probe for a keyboard. If none is found at the regular
- * keyboard port, but one is found at the mouse port, then
- * it is likely that this particular system has both ports
- * inverted (or incorrect labels on the chassis), unless
- * this is a human error. In any case, try to get the
- * keyboard to attach to the `keyboard' port and the
- * pointing device to the `mouse' port.
- */
-
- for (slot = 0; slot < PCKBC_NSLOTS; slot++) {
- iockbc_init_slotdata(t->t_slotdata[slot],
- &isc->reginfo[slot]);
- slottype = iockbc_probe_slot(t, slot);
- if (slottype == KBD)
- break;
- if (slottype == MOUSE)
- mouse_on_main = slot == PCKBC_KBD_SLOT;
- }
- if (slot == PCKBC_NSLOTS) {
- /*
- * We could not identify a keyboard. Let's assume
- * none is connected; if a mouse has been found on
- * the keyboard port and none on the aux port, the
- * ports are likely to be inverted.
- */
- if (mouse_on_main)
- slot = PCKBC_AUX_SLOT;
- else
- slot = PCKBC_KBD_SLOT;
- }
- if (slot == PCKBC_AUX_SLOT) {
- /*
- * Either human error or inverted wiring; use
- * the inverted port settings.
- * iockbc_attach_slot() below will call
- * iockbc_init_slotdata() again.
- */
- isc->reginfo = reginfo_inverted;
- }
- }
-
- /*
- * Attach "slots".
- */
- iockbc_attach_slot(isc, PCKBC_KBD_SLOT);
- iockbc_attach_slot(isc, PCKBC_AUX_SLOT);
-}
-
-void
-iockbc_poll(void *self)
-{
- struct pckbc_internal *t = self;
- int s;
-
- s = spltty();
- (void)iockbcintr_internal(t, t->t_sc);
- timeout_add_sec(&t->t_poll, 1);
- splx(s);
-}
-
-int
-iockbcintr(void *vsc)
-{
- struct iockbc_softc *isc = (struct iockbc_softc *)vsc;
- struct pckbc_softc *sc = &isc->sc_pckbc;
- struct pckbc_internal *t = sc->id;
-
- return iockbcintr_internal(t, sc);
-}
-
-int
-iockbcintr_internal(struct pckbc_internal *t, struct pckbc_softc *sc)
-{
- pckbc_slot_t slot;
- struct pckbc_slotdata *q;
- int served = 0;
- uint32_t data;
- uint32_t val;
-
- /* Reschedule timeout further into the idle times. */
- if (timeout_pending(&t->t_poll))
- timeout_add_sec(&t->t_poll, 1);
-
- /*
- * Need to check both "slots" since interrupt could be from
- * either controller.
- */
- for (slot = 0; slot < PCKBC_NSLOTS; slot++) {
- q = t->t_slotdata[slot];
-
- for (;;) {
- if (!q) {
- DPRINTF("iockbcintr: no slot%d data!\n", slot);
- break;
- }
-
- if (q->polling) {
- served = 1;
- break; /* pckbc_poll_data() will get it */
- }
-
- val = bus_space_read_4(t->t_iot, t->t_ioh_d,
- q->reginfo->rx);
- if ((val & IOC3_KBC_DATA_VALID) == 0)
- break;
-
- served = 1;
-
- /* Process received data. */
- if (val & IOC3_KBC_DATA_0_VALID) {
- data = (val & IOC3_KBC_DATA_0_MASK) >>
- IOC3_KBC_DATA_0_SHIFT;
- iockbc_process_input(sc, t, slot, data);
- }
-
- if (val & IOC3_KBC_DATA_1_VALID) {
- data = (val & IOC3_KBC_DATA_1_MASK) >>
- IOC3_KBC_DATA_1_SHIFT;
- iockbc_process_input(sc, t, slot, data);
- }
-
- if (val & IOC3_KBC_DATA_2_VALID) {
- data = (val & IOC3_KBC_DATA_2_MASK) >>
- IOC3_KBC_DATA_2_SHIFT;
- iockbc_process_input(sc, t, slot, data);
- }
- }
- }
-
- return (served);
-}
-
-void
-iockbc_process_input(struct pckbc_softc *sc, struct pckbc_internal *t,
- int slot, uint data)
-{
- struct pckbc_slotdata *q;
-
- q = t->t_slotdata[slot];
- if (CMD_IN_QUEUE(q) && iockbc_cmdresponse(t, slot, data))
- return;
-
- if (sc->inputhandler[slot])
- (*sc->inputhandler[slot])(sc->inputarg[slot], data);
- else
- DPRINTF("iockbcintr: slot %d lost %d\n", slot, data);
-}
-
-int
-iockbc_poll_write(struct pckbc_internal *t, pckbc_slot_t slot, int val)
-{
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- bus_space_tag_t iot = t->t_iot;
- bus_space_handle_t ioh = t->t_ioh_d;
- u_int64_t stat;
- int timeout = 10000;
-
- /* Attempt to write a value to the controller. */
- while (timeout--) {
- stat = bus_space_read_4(iot, ioh, q->reginfo->cs);
- if ((stat & q->reginfo->busy) == 0) {
- bus_space_write_4(iot, ioh, q->reginfo->tx, val & 0xff);
- return 0;
- }
- delay(50);
- }
-
- DPRINTF("iockbc_poll_write: timeout, sts %08x\n", stat);
- return -1;
-}
-
-int
-iockbc_poll_read(struct pckbc_internal *t, pckbc_slot_t slot)
-{
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- int timeout = 10000;
- u_int32_t val;
-
- /* See if we already have bytes queued. */
- if (q->rx_index >= 0)
- return q->rx_queue[q->rx_index--];
-
- /* Poll input from controller. */
- while (timeout--) {
- val = bus_space_read_4(t->t_iot, t->t_ioh_d, q->reginfo->rx);
- if (val & IOC3_KBC_DATA_VALID)
- break;
- delay(50);
- }
- if ((val & IOC3_KBC_DATA_VALID) == 0) {
- DPRINTF("iockbc_poll_read: timeout, wx %08x\n", val);
- return -1;
- }
-
- /* Process received data. */
- if (val & IOC3_KBC_DATA_2_VALID)
- q->rx_queue[++q->rx_index] =
- (val & IOC3_KBC_DATA_2_MASK) >> IOC3_KBC_DATA_2_SHIFT;
-
- if (val & IOC3_KBC_DATA_1_VALID)
- q->rx_queue[++q->rx_index] =
- (val & IOC3_KBC_DATA_1_MASK) >> IOC3_KBC_DATA_1_SHIFT;
-
- if (val & IOC3_KBC_DATA_0_VALID)
- q->rx_queue[++q->rx_index] =
- (val & IOC3_KBC_DATA_0_MASK) >> IOC3_KBC_DATA_0_SHIFT;
-
- if (q->rx_index >= 0)
- return q->rx_queue[q->rx_index--];
- else
- return -1;
-}
-
-/*
- * Pass command to device, poll for ACK and data.
- * to be called at spltty()
- */
-static void
-iockbc_poll_cmd(struct pckbc_internal *t, pckbc_slot_t slot,
- struct pckbc_devcmd *cmd)
-{
- int i, c = 0;
-
- while (cmd->cmdidx < cmd->cmdlen) {
- if (iockbc_poll_write(t, slot, cmd->cmd[cmd->cmdidx]) == -1) {
- DPRINTF("iockbc_poll_cmd: send error\n");
- cmd->status = EIO;
- return;
- }
- for (i = 10; i; i--) { /* 1s ??? */
- c = iockbc_poll_read(t, slot);
- if (c != -1)
- break;
- }
- if (c == KBC_DEVCMD_ACK) {
- cmd->cmdidx++;
- continue;
- }
- if (c == KBC_DEVCMD_RESEND) {
- DPRINTF("iockbc_cmd: RESEND\n");
- if (cmd->retries++ < 5)
- continue;
- else {
- DPRINTF("iockbc: cmd failed\n");
- cmd->status = EIO;
- return;
- }
- }
- if (c == -1) {
- DPRINTF("iockbc_cmd: timeout\n");
- cmd->status = EIO;
- return;
- }
- DPRINTF("iockbc_cmd: lost 0x%x\n", c);
- }
-
- while (cmd->responseidx < cmd->responselen) {
- if (cmd->flags & KBC_CMDFLAG_SLOW)
- i = 100; /* 10s ??? */
- else
- i = 10; /* 1s ??? */
- while (i--) {
- c = iockbc_poll_read(t, slot);
- if (c != -1)
- break;
- }
- if (c == -1) {
- DPRINTF("iockbc_poll_cmd: no data\n");
- cmd->status = ETIMEDOUT;
- return;
- } else
- cmd->response[cmd->responseidx++] = c;
- }
-}
-
-/*
- * Clean up a command queue, throw away everything.
- */
-void
-iockbc_cleanqueue(struct pckbc_slotdata *q)
-{
- struct pckbc_devcmd *cmd;
-#ifdef IOCKBC_DEBUG
- int i;
-#endif
-
- while ((cmd = TAILQ_FIRST(&q->cmdqueue))) {
- TAILQ_REMOVE(&q->cmdqueue, cmd, next);
-#ifdef IOCKBC_DEBUG
- printf("iockbc_cleanqueue: removing");
- for (i = 0; i < cmd->cmdlen; i++)
- printf(" %02x", cmd->cmd[i]);
- printf("\n");
-#endif
- TAILQ_INSERT_TAIL(&q->freequeue, cmd, next);
- }
-}
-
-/*
- * Timeout error handler: clean queues and data port.
- * XXX could be less invasive.
- */
-void
-iockbc_cleanup(void *self)
-{
- struct pckbc_internal *t = self;
- int s;
-
- printf("iockbc: command timeout\n");
-
- s = spltty();
-
- if (t->t_slotdata[PCKBC_KBD_SLOT])
- iockbc_cleanqueue(t->t_slotdata[PCKBC_KBD_SLOT]);
- if (t->t_slotdata[PCKBC_AUX_SLOT])
- iockbc_cleanqueue(t->t_slotdata[PCKBC_AUX_SLOT]);
-
- while (iockbc_poll_read(t, PCKBC_KBD_SLOT)
- != -1) ;
- while (iockbc_poll_read(t, PCKBC_AUX_SLOT)
- != -1) ;
-
- /* Reset KBC? */
-
- splx(s);
-}
-
-/*
- * Pass command to device during normal operation.
- * to be called at spltty()
- */
-void
-iockbc_start(struct pckbc_internal *t, pckbc_slot_t slot)
-{
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- struct pckbc_devcmd *cmd = TAILQ_FIRST(&q->cmdqueue);
-
- if (q->polling) {
- do {
- iockbc_poll_cmd(t, slot, cmd);
- if (cmd->status)
- printf("iockbc_start: command error\n");
-
- TAILQ_REMOVE(&q->cmdqueue, cmd, next);
- if (cmd->flags & KBC_CMDFLAG_SYNC)
- wakeup(cmd);
- else {
- timeout_del(&t->t_cleanup);
- TAILQ_INSERT_TAIL(&q->freequeue, cmd, next);
- }
- cmd = TAILQ_FIRST(&q->cmdqueue);
- } while (cmd);
- return;
- }
-
- if (iockbc_poll_write(t, slot, cmd->cmd[cmd->cmdidx])) {
- printf("iockbc_start: send error\n");
- /* XXX what now? */
- return;
- }
-}
-
-/*
- * Handle command responses coming in asynchronously,
- * return nonzero if valid response.
- * to be called at spltty()
- */
-int
-iockbc_cmdresponse(struct pckbc_internal *t, pckbc_slot_t slot, u_char data)
-{
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- struct pckbc_devcmd *cmd = TAILQ_FIRST(&q->cmdqueue);
-#ifdef DIAGNOSTIC
- if (!cmd)
- panic("iockbc_cmdresponse: no active command");
-#endif
- if (cmd->cmdidx < cmd->cmdlen) {
- if (data != KBC_DEVCMD_ACK && data != KBC_DEVCMD_RESEND)
- return (0);
-
- if (data == KBC_DEVCMD_RESEND) {
- if (cmd->retries++ < 5) {
- /* try again last command */
- goto restart;
- } else {
- DPRINTF("iockbc: cmd failed\n");
- cmd->status = EIO;
- /* dequeue */
- }
- } else {
- if (++cmd->cmdidx < cmd->cmdlen)
- goto restart;
- if (cmd->responselen)
- return (1);
- /* else dequeue */
- }
- } else if (cmd->responseidx < cmd->responselen) {
- cmd->response[cmd->responseidx++] = data;
- if (cmd->responseidx < cmd->responselen)
- return (1);
- /* else dequeue */
- } else
- return (0);
-
- /* dequeue: */
- TAILQ_REMOVE(&q->cmdqueue, cmd, next);
- if (cmd->flags & KBC_CMDFLAG_SYNC)
- wakeup(cmd);
- else {
- timeout_del(&t->t_cleanup);
- TAILQ_INSERT_TAIL(&q->freequeue, cmd, next);
- }
- if (!CMD_IN_QUEUE(q))
- return (1);
-restart:
- iockbc_start(t, slot);
- return (1);
-}
-
-/*
- * Interfaces to act like pckbc(4).
- */
-
-int
-pckbc_xt_translation(pckbc_tag_t self)
-{
- /* Translation isn't supported... */
- return (-1);
-}
-
-/* For use in autoconfiguration. */
-int
-pckbc_poll_cmd(pckbc_tag_t self, pckbc_slot_t slot, u_char *cmd, int len,
- int responselen, u_char *respbuf, int slow)
-{
- struct pckbc_devcmd nc;
- int s;
-
- if ((len > 4) || (responselen > 4))
- return (EINVAL);
-
- bzero(&nc, sizeof(nc));
- bcopy(cmd, nc.cmd, len);
- nc.cmdlen = len;
- nc.responselen = responselen;
- nc.flags = (slow ? KBC_CMDFLAG_SLOW : 0);
-
- s = spltty();
- iockbc_poll_cmd(self, slot, &nc);
- splx(s);
-
- if (nc.status == 0 && respbuf)
- bcopy(nc.response, respbuf, responselen);
-
- return (nc.status);
-}
-
-void
-pckbc_flush(pckbc_tag_t self, pckbc_slot_t slot)
-{
- /* Read any data and discard. */
- struct pckbc_internal *t = self;
- (void) iockbc_poll_read(t, slot);
-}
-
-/*
- * Put command into the device's command queue, return zero or errno.
- */
-int
-pckbc_enqueue_cmd(pckbc_tag_t self, pckbc_slot_t slot, u_char *cmd, int len,
- int responselen, int sync, u_char *respbuf)
-{
- struct pckbc_internal *t = self;
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- struct pckbc_devcmd *nc;
- int s, isactive, res = 0;
-
- if ((len > 4) || (responselen > 4))
- return (EINVAL);
- s = spltty();
- nc = TAILQ_FIRST(&q->freequeue);
- if (nc)
- TAILQ_REMOVE(&q->freequeue, nc, next);
- splx(s);
- if (!nc)
- return (ENOMEM);
-
- bzero(nc, sizeof(*nc));
- bcopy(cmd, nc->cmd, len);
- nc->cmdlen = len;
- nc->responselen = responselen;
- nc->flags = (sync ? KBC_CMDFLAG_SYNC : 0);
-
- s = spltty();
-
- if (q->polling && sync) {
- /*
- * XXX We should poll until the queue is empty.
- * But we don't come here normally, so make
- * it simple and throw away everything.
- */
- iockbc_cleanqueue(q);
- }
-
- isactive = CMD_IN_QUEUE(q);
- TAILQ_INSERT_TAIL(&q->cmdqueue, nc, next);
- if (!isactive)
- iockbc_start(t, slot);
-
- if (q->polling)
- res = (sync ? nc->status : 0);
- else if (sync) {
- if ((res = tsleep_nsec(nc, 0, "kbccmd", SEC_TO_NSEC(1)))) {
- TAILQ_REMOVE(&q->cmdqueue, nc, next);
- iockbc_cleanup(t);
- } else
- res = nc->status;
- } else
- timeout_add_sec(&t->t_cleanup, 1);
-
- if (sync) {
- if (respbuf)
- bcopy(nc->response, respbuf, responselen);
- TAILQ_INSERT_TAIL(&q->freequeue, nc, next);
- }
-
- splx(s);
-
- return (res);
-}
-
-int
-pckbc_poll_data(pckbc_tag_t self, pckbc_slot_t slot)
-{
- struct pckbc_internal *t = self;
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- int c;
-
- c = iockbc_poll_read(t, slot);
- if (c != -1 && q && CMD_IN_QUEUE(q)) {
- /* We jumped into a running command - try to deliver the
- response. */
- if (iockbc_cmdresponse(t, slot, c))
- return (-1);
- }
- return (c);
-}
-
-void
-pckbc_set_inputhandler(pckbc_tag_t self, pckbc_slot_t slot, pckbc_inputfcn func,
- void *arg, char *name)
-{
- struct pckbc_internal *t = (struct pckbc_internal *)self;
- struct pckbc_softc *sc = t->t_sc;
- struct iockbc_softc *isc = (struct iockbc_softc *)sc;
-
- if (slot >= PCKBC_NSLOTS)
- panic("iockbc_set_inputhandler: bad slot %d", slot);
-
- sc->inputhandler[slot] = func;
- sc->inputarg[slot] = arg;
- sc->subname[slot] = name;
-
- if ((isc == NULL || isc->console) && slot == PCKBC_KBD_SLOT)
- timeout_add_sec(&t->t_poll, 1);
-}
-
-void
-pckbc_slot_enable(pckbc_tag_t self, pckbc_slot_t slot, int on)
-{
- struct pckbc_internal *t = (struct pckbc_internal *)self;
-
- if (slot == PCKBC_KBD_SLOT) {
- if (on)
- timeout_add_sec(&t->t_poll, 1);
- else
- timeout_del(&t->t_poll);
- }
-}
-
-void
-pckbc_set_poll(pckbc_tag_t self, pckbc_slot_t slot, int on)
-{
- struct pckbc_internal *t = (struct pckbc_internal *)self;
-
- t->t_slotdata[slot]->polling = on;
-
- if (!on) {
- int s;
-
- /*
- * If disabling polling on a device that's been configured,
- * make sure there are no bytes left in the FIFO, holding up
- * the interrupt line. Otherwise we won't get any further
- * interrupts.
- */
- if (t->t_sc) {
- s = spltty();
- iockbcintr(t->t_sc);
- splx(s);
- }
- }
-}
-
-/*
- * Console support.
- */
-
-static int iockbc_console;
-
-int
-iockbc_cnattach()
-{
- bus_space_tag_t iot = &sys_config.console_io;
- bus_space_handle_t ioh = (bus_space_handle_t)iot->bus_base;
- struct pckbc_internal *t = &iockbc_consdata;
- const struct iockbc_reginfo *reginfo = NULL, *reginfo_inverted;
- enum iockbc_slottype slottype;
- pckbc_slot_t slot;
- uint32_t csr;
- int is_ioc;
- int rc;
-
- is_ioc = console_input.specific ==
- PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3);
- if (is_ioc) {
-#if NIOCKBC_IOC > 0
- reginfo = iockbc_ioc;
- reginfo_inverted = iockbc_ioc_inverted;
-#endif
- } else {
-#if NIOCKBC_IOF > 0
- reginfo = iockbc_iof;
- reginfo_inverted = iockbc_iof_inverted;
-#endif
- }
- if (reginfo == NULL)
- return ENXIO;
-
- /*
- * Setup up controller: do not force pull clock and data lines
- * low, clamp clocks after one byte received.
- */
- csr = bus_space_read_4(iot, ioh, reginfo->cs);
- csr &= ~(IOC3_KBC_CTRL_KBD_PULL_DATA_LOW |
- IOC3_KBC_CTRL_KBD_PULL_CLOCK_LOW |
- IOC3_KBC_CTRL_AUX_PULL_DATA_LOW |
- IOC3_KBC_CTRL_AUX_PULL_CLOCK_LOW |
- IOC3_KBC_CTRL_KBD_CLAMP_3 | IOC3_KBC_CTRL_AUX_CLAMP_3);
- csr |= IOC3_KBC_CTRL_KBD_CLAMP_1 | IOC3_KBC_CTRL_AUX_CLAMP_1;
- bus_space_write_4(iot, ioh, reginfo->cs, csr);
-
- /* Setup pckbc_internal structure. */
- t->t_iot = iot;
- t->t_ioh_d = (bus_space_handle_t)iot->bus_base;
- t->t_addr = 0; /* unused */
-
- timeout_set(&t->t_cleanup, iockbc_cleanup, t);
- timeout_set(&t->t_poll, iockbc_poll, t);
-
- /*
- * Probe for a keyboard. There must be one connected, for the PROM
- * would not have advertized glass console if none had been
- * detected.
- */
-
- for (slot = 0; slot < PCKBC_NSLOTS; slot++) {
- iockbc_init_slotdata(&iockbc_cons_slotdata, ®info[slot]);
- t->t_slotdata[slot] = &iockbc_cons_slotdata;
- slottype = iockbc_probe_slot(t, slot);
- t->t_slotdata[slot] = NULL;
- if (slottype == KBD)
- break;
- }
- if (slot == PCKBC_NSLOTS) {
- /*
- * We could not identify a keyboard, but the PROM did;
- * let's assume it's a fluke and assume it exists and
- * is connected to the first connector.
- */
- slot = PCKBC_KBD_SLOT;
- /*
- * For some reason keyboard and mouse ports are inverted on
- * Fuel. They also are inverted on some IO9 boards, but
- * we can't tell both IO9 flavour apart, yet.
- */
- if (is_ioc && sys_config.system_type == SGI_IP35)
- slot = PCKBC_AUX_SLOT;
- }
-
- if (slot == PCKBC_AUX_SLOT) {
- /*
- * Either human error when plugging the keyboard, or the
- * physical connectors on the chassis are inverted.
- * Compensate by switching in software (pckbd relies upon
- * being at PCKBC_KBD_SLOT).
- */
- reginfo = reginfo_inverted;
- }
-
- iockbc_init_slotdata(&iockbc_cons_slotdata, ®info[PCKBC_KBD_SLOT]);
- t->t_slotdata[PCKBC_KBD_SLOT] = &iockbc_cons_slotdata;
-
- rc = pckbd_cnattach(t);
- if (rc == 0)
- iockbc_console = 1;
-
- return rc;
-}
-
-#if NIOCKBC_IOC > 0
-int
-iockbc_is_ioc_console(struct ioc_attach_args *iaa)
-{
- if (iockbc_console == 0)
- return 0;
-
- return location_match(&iaa->iaa_location, &console_input);
-}
-#endif
-
-#if NIOCKBC_IOF > 0
-int
-iockbc_is_iof_console(struct iof_attach_args *iaa)
-{
- if (iockbc_console == 0)
- return 0;
-
- return location_match(&iaa->iaa_location, &console_input);
-}
-#endif
+++ /dev/null
-/* $OpenBSD: iockbcreg.h,v 1.1 2009/11/18 19:03:27 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Joel Sing.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Register definitions for the PS/2 controller part of SGI IOC3 and IOC4 ASICS.
- */
-
-/* bits in KBC_CTRL_STATUS */
-#define IOC3_KBC_STATUS_KBD_WRITE_PENDING 0x00000001
-#define IOC3_KBC_STATUS_AUX_WRITE_PENDING 0x00000002
-#define IOC3_KBC_STATUS_KBD_DATA 0x00000010
-#define IOC3_KBC_STATUS_KBD_CLOCK 0x00000020
-#define IOC3_KBC_CTRL_KBD_PULL_DATA_LOW 0x00000040
-#define IOC3_KBC_CTRL_KBD_PULL_CLOCK_LOW 0x00000080
-#define IOC3_KBC_STATUS_AUX_DATA 0x00000100
-#define IOC3_KBC_STATUS_AUX_CLOCK 0x00000200
-#define IOC3_KBC_CTRL_AUX_PULL_DATA_LOW 0x00000400
-#define IOC3_KBC_CTRL_AUX_PULL_CLOCK_LOW 0x00000800
-#define IOC3_KBC_CTRL_KBD_CLAMP_1 0x00100000
-#define IOC3_KBC_CTRL_AUX_CLAMP_1 0x00200000
-#define IOC3_KBC_CTRL_KBD_CLAMP_3 0x00400000
-#define IOC3_KBC_CTRL_AUX_CLAMP_3 0x00800000
-
-/* bits in KBC_*_RX */
-#define IOC3_KBC_DATA_0_VALID 0x80000000
-#define IOC3_KBC_DATA_1_VALID 0x40000000
-#define IOC3_KBC_DATA_2_VALID 0x20000000
-#define IOC3_KBC_DATA_VALID (IOC3_KBC_DATA_0_VALID | \
- IOC3_KBC_DATA_1_VALID | \
- IOC3_KBC_DATA_2_VALID)
-#define IOC3_KBC_DATA_0_MASK 0x00ff0000
-#define IOC3_KBC_DATA_0_SHIFT 16
-#define IOC3_KBC_DATA_1_MASK 0x0000ff00
-#define IOC3_KBC_DATA_1_SHIFT 8
-#define IOC3_KBC_DATA_2_MASK 0x000000ff
-#define IOC3_KBC_DATA_2_SHIFT 0
+++ /dev/null
-/* $OpenBSD: iockbcvar.h,v 1.4 2010/12/04 11:23:43 jsing Exp $ */
-
-/*
- * Copyright (c) 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-int iockbc_cnattach(void);
+++ /dev/null
-/* $OpenBSD: mavb.c,v 1.22 2021/03/11 11:17:00 jsg Exp $ */
-
-/*
- * Copyright (c) 2005 Mark Kettenis
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/kernel.h>
-#include <sys/timeout.h>
-
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <sys/audioio.h>
-#include <dev/audio_if.h>
-
-#include <sgi/localbus/macebus.h>
-#include <sgi/localbus/macebusvar.h>
-#include <sgi/dev/mavbreg.h>
-
-#include <dev/ic/ad1843reg.h>
-
-#undef MAVB_DEBUG
-
-#ifdef MAVB_DEBUG
-#define DPRINTF(l,x) do { if (mavb_debug & (l)) printf x; } while (0)
-#define MAVB_DEBUG_INTR 0x0100
-int mavb_debug = ~MAVB_DEBUG_INTR;
-#else
-#define DPRINTF(l,x) /* nothing */
-#endif
-
-/* Repeat delays for volume buttons. */
-#define MAVB_VOLUME_BUTTON_REPEAT_DEL1 400 /* 400ms to start repeating */
-#define MAVB_VOLUME_BUTTON_REPEAT_DELN 100 /* 100ms between repeats */
-
-/* XXX We need access to some of the MACE ISA registers. */
-#define MAVB_ISA_NREGS 0x20
-
-#define MAVB_ISA_RING_SIZE 0x4000 /* Mace ISA DMA ring size. */
-#define MAVB_CHAN_RING_SIZE 0x1000 /* DMA buffer size per channel. */
-#define MAVB_CHAN_INTR_SIZE 0x0800 /* Interrupt on 50% buffer transfer. */
-#define MAVB_CHAN_CHUNK_SIZE 0x0400 /* Move data in 25% buffer chunks. */
-
-
-/*
- * AD1843 Mixer.
- */
-
-enum {
- AD1843_RECORD_CLASS,
- AD1843_ADC_SOURCE, /* ADC Source Select */
- AD1843_ADC_GAIN, /* ADC Input Gain */
- AD1843_ADC_MIC_GAIN, /* ADC Mic Input Gain */
-
- AD1843_INPUT_CLASS,
- AD1843_DAC1_GAIN, /* DAC1 Analog/Digital Gain/Attenuation */
- AD1843_DAC1_MUTE, /* DAC1 Analog Mute */
- AD1843_DAC2_GAIN, /* DAC2 Mix Gain */
- AD1843_AUX1_GAIN, /* Auxiliary 1 Mix Gain */
- AD1843_AUX2_GAIN, /* Auxiliary 2 Mix Gain */
- AD1843_AUX3_GAIN, /* Auxiliary 3 Mix Gain */
- AD1843_MIC_GAIN, /* Microphone Mix Gain */
- AD1843_MONO_GAIN, /* Mono Mix Gain */
- AD1843_DAC2_MUTE, /* DAC2 Mix Mute */
- AD1843_AUX1_MUTE, /* Auxiliary 1 Mix Mute */
- AD1843_AUX2_MUTE, /* Auxiliary 2 Mix Mute */
- AD1843_AUX3_MUTE, /* Auxiliary 3 Mix Mute */
- AD1843_MIC_MUTE, /* Microphone Mix Mute */
- AD1843_MONO_MUTE, /* Mono Mix Mute */
- AD1843_SUM_MUTE, /* Sum Mute */
-
- AD1843_OUTPUT_CLASS,
- AD1843_MNO_MUTE, /* Mono Output Mute */
- AD1843_HPO_MUTE /* Headphone Output Mute */
-};
-
-/* ADC Source Select. The order matches the hardware bits. */
-const char *ad1843_source[] = {
- AudioNline,
- AudioNmicrophone,
- AudioNaux "1",
- AudioNaux "2",
- AudioNaux "3",
- AudioNmono,
- AudioNdac "1",
- AudioNdac "2"
-};
-
-/* Mix Control. The order matches the hardware register numbering. */
-const char *ad1843_input[] = {
- AudioNdac "2", /* AD1843_DAC2__TO_MIXER */
- AudioNaux "1",
- AudioNaux "2",
- AudioNaux "3",
- AudioNmicrophone,
- AudioNmono /* AD1843_MISC_SETTINGS */
-};
-
-struct mavb_chan {
- caddr_t hw_start;
- caddr_t sw_start;
- caddr_t sw_end;
- caddr_t sw_cur;
- void (*intr)(void *);
- void *intrarg;
- u_long rate;
- u_int format;
- int blksize;
-};
-
-struct mavb_softc {
- struct device sc_dev;
- bus_space_tag_t sc_st;
- bus_space_handle_t sc_sh;
- bus_dma_tag_t sc_dmat;
- bus_dmamap_t sc_dmamap;
-
- /* XXX We need access to some of the MACE ISA registers. */
- bus_space_handle_t sc_isash;
-
- caddr_t sc_ring;
-
- struct mavb_chan play;
- struct mavb_chan rec;
-
- struct timeout sc_volume_button_to;
-};
-
-typedef u_long ad1843_addr_t;
-
-u_int16_t ad1843_reg_read(struct mavb_softc *, ad1843_addr_t);
-u_int16_t ad1843_reg_write(struct mavb_softc *, ad1843_addr_t, u_int16_t);
-void ad1843_dump_regs(struct mavb_softc *);
-
-int mavb_match(struct device *, void *, void *);
-void mavb_attach(struct device *, struct device *, void *);
-
-struct cfattach mavb_ca = {
- sizeof(struct mavb_softc), mavb_match, mavb_attach
-};
-
-struct cfdriver mavb_cd = {
- NULL, "mavb", DV_DULL
-};
-
-int mavb_open(void *, int);
-void mavb_close(void *);
-int mavb_set_params(void *, int, int, struct audio_params *,
- struct audio_params *);
-int mavb_round_blocksize(void *hdl, int bs);
-int mavb_halt_output(void *);
-int mavb_halt_input(void *);
-int mavb_set_port(void *, struct mixer_ctrl *);
-int mavb_get_port(void *, struct mixer_ctrl *);
-int mavb_query_devinfo(void *, struct mixer_devinfo *);
-int mavb_get_props(void *);
-int mavb_trigger_output(void *, void *, void *, int, void (*)(void *),
- void *, struct audio_params *);
-int mavb_trigger_input(void *, void *, void *, int, void (*)(void *),
- void *, struct audio_params *);
-
-struct audio_hw_if mavb_sa_hw_if = {
- mavb_open,
- mavb_close,
- mavb_set_params,
- mavb_round_blocksize,
- 0,
- 0,
- 0,
- 0,
- 0,
- mavb_halt_output,
- mavb_halt_input,
- 0,
- 0,
- mavb_set_port,
- mavb_get_port,
- mavb_query_devinfo,
- 0,
- 0,
- 0,
- mavb_get_props,
- mavb_trigger_output,
- mavb_trigger_input
-};
-
-int
-mavb_open(void *hdl, int flags)
-{
- return (0);
-}
-
-void
-mavb_close(void *hdl)
-{
-}
-
-static int
-mavb_set_play_rate(struct mavb_softc *sc, u_long sample_rate)
-{
- if (sample_rate < 4000 || sample_rate > 48000)
- return (EINVAL);
-
- if (sc->play.rate != sample_rate) {
- ad1843_reg_write(sc, AD1843_CLOCK2_SAMPLE_RATE, sample_rate);
- sc->play.rate = sample_rate;
- }
- return (0);
-}
-
-static int
-mavb_set_rec_rate(struct mavb_softc *sc, u_long sample_rate)
-{
- if (sample_rate < 4000 || sample_rate > 48000)
- return (EINVAL);
-
- if (sc->rec.rate != sample_rate) {
- ad1843_reg_write(sc, AD1843_CLOCK1_SAMPLE_RATE, sample_rate);
- sc->rec.rate = sample_rate;
- }
- return (0);
-}
-
-static int
-mavb_get_format(u_int encoding, u_int *format)
-{
- switch(encoding) {
- case AUDIO_ENCODING_ULINEAR_BE:
- *format = AD1843_PCM8;
- break;
- case AUDIO_ENCODING_SLINEAR_BE:
- *format = AD1843_PCM16;
- break;
- case AUDIO_ENCODING_ULAW:
- *format = AD1843_ULAW;
- break;
- case AUDIO_ENCODING_ALAW:
- *format = AD1843_ALAW;
- break;
- default:
- return (EINVAL);
- }
- return (0);
-}
-
-static int
-mavb_set_play_format(struct mavb_softc *sc, u_int encoding)
-{
- u_int16_t value;
- u_int format;
- int err;
-
- err = mavb_get_format(encoding, &format);
- if (err)
- return (err);
-
- if (sc->play.format != format) {
- value = ad1843_reg_read(sc, AD1843_SERIAL_INTERFACE);
- value &= ~AD1843_DA1F_MASK;
- value |= (format << AD1843_DA1F_SHIFT);
- ad1843_reg_write(sc, AD1843_SERIAL_INTERFACE, value);
- sc->play.format = format;
- }
- return (0);
-}
-
-static int
-mavb_set_rec_format(struct mavb_softc *sc, u_int encoding)
-{
- u_int16_t value;
- u_int format;
- int err;
-
- err = mavb_get_format(encoding, &format);
- if (err)
- return (err);
-
- if (sc->rec.format != format) {
- value = ad1843_reg_read(sc, AD1843_SERIAL_INTERFACE);
- value &= ~(AD1843_ADRF_MASK | AD1843_ADLF_MASK);
- value |= (format << AD1843_ADRF_SHIFT) |
- (format << AD1843_ADLF_SHIFT);
- ad1843_reg_write(sc, AD1843_SERIAL_INTERFACE, value);
- sc->rec.format = format;
- }
- return (0);
-}
-
-int
-mavb_set_params(void *hdl, int setmode, int usemode,
- struct audio_params *play, struct audio_params *rec)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
- int error;
-
- DPRINTF(1, ("%s: mavb_set_params: sample=%ld precision=%d "
- "channels=%d\n", sc->sc_dev.dv_xname, play->sample_rate,
- play->precision, play->channels));
-
- if (setmode & AUMODE_PLAY) {
- play->encoding = AUDIO_ENCODING_SLINEAR_BE;
- play->channels = 2;
- play->precision = 24;
- play->bps = AUDIO_BPS(play->precision);
- play->msb = 0;
- error = mavb_set_play_rate(sc, play->sample_rate);
- if (error)
- return (error);
-
- error = mavb_set_play_format(sc, play->encoding);
- if (error)
- return (error);
-
- }
-
- if (setmode & AUMODE_RECORD) {
- rec->encoding = AUDIO_ENCODING_SLINEAR_BE;
- rec->channels = 2;
- rec->precision = 24;
- rec->bps = AUDIO_BPS(rec->precision);
- rec->msb = 0;
-
- error = mavb_set_rec_rate(sc, rec->sample_rate);
- if (error)
- return (error);
-
- error = mavb_set_rec_format(sc, rec->encoding);
- if (error)
- return (error);
- }
-
- return (0);
-}
-
-int
-mavb_round_blocksize(void *hdl, int bs)
-{
- if (bs == 0)
- bs = MAVB_CHAN_INTR_SIZE;
- else
- bs = (bs + MAVB_CHAN_INTR_SIZE - 1) &
- ~(MAVB_CHAN_INTR_SIZE - 1);
- return (bs);
-}
-
-int
-mavb_halt_output(void *hdl)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
-
- DPRINTF(1, ("%s: mavb_halt_output called\n", sc->sc_dev.dv_xname));
- mtx_enter(&audio_lock);
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL2_CONTROL, 0);
- mtx_leave(&audio_lock);
- return (0);
-}
-
-int
-mavb_halt_input(void *hdl)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
-
- DPRINTF(1, ("%s: mavb_halt_input called\n", sc->sc_dev.dv_xname));
- mtx_enter(&audio_lock);
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL1_CONTROL, 0);
- mtx_leave(&audio_lock);
- return (0);
-}
-
-int
-mavb_set_port(void *hdl, struct mixer_ctrl *mc)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
- u_char left, right;
- ad1843_addr_t reg;
- u_int16_t value;
-
- DPRINTF(1, ("%s: mavb_set_port: dev=%d\n", sc->sc_dev.dv_xname,
- mc->dev));
-
- switch (mc->dev) {
- case AD1843_ADC_SOURCE:
- value = ad1843_reg_read(sc, AD1843_ADC_SOURCE_GAIN);
- value &= ~(AD1843_LSS_MASK | AD1843_RSS_MASK);
- value |= ((mc->un.ord << AD1843_LSS_SHIFT) & AD1843_LSS_MASK);
- value |= ((mc->un.ord << AD1843_RSS_SHIFT) & AD1843_RSS_MASK);
- ad1843_reg_write(sc, AD1843_ADC_SOURCE_GAIN, value);
- break;
- case AD1843_ADC_GAIN:
- left = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
- right = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
- value = ad1843_reg_read(sc, AD1843_ADC_SOURCE_GAIN);
- value &= ~(AD1843_LIG_MASK | AD1843_RIG_MASK);
- value |= ((left >> 4) << AD1843_LIG_SHIFT);
- value |= ((right >> 4) << AD1843_RIG_SHIFT);
- ad1843_reg_write(sc, AD1843_ADC_SOURCE_GAIN, value);
- break;
- case AD1843_ADC_MIC_GAIN:
- value = ad1843_reg_read(sc, AD1843_ADC_SOURCE_GAIN);
- if (mc->un.ord == 0)
- value &= ~(AD1843_LMGE | AD1843_RMGE);
- else
- value |= (AD1843_LMGE | AD1843_RMGE);
- ad1843_reg_write(sc, AD1843_ADC_SOURCE_GAIN, value);
- break;
-
- case AD1843_DAC1_GAIN:
- left = AUDIO_MAX_GAIN -
- mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
- right = AUDIO_MAX_GAIN -
- mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
- value = ad1843_reg_read(sc, AD1843_DAC1_ANALOG_GAIN);
- value &= ~(AD1843_LDA1G_MASK | AD1843_RDA1G_MASK);
- value |= ((left >> 2) << AD1843_LDA1G_SHIFT);
- value |= ((right >> 2) << AD1843_RDA1G_SHIFT);
- ad1843_reg_write(sc, AD1843_DAC1_ANALOG_GAIN, value);
- break;
- case AD1843_DAC1_MUTE:
- value = ad1843_reg_read(sc, AD1843_DAC1_ANALOG_GAIN);
- if (mc->un.ord == 0)
- value &= ~(AD1843_LDA1GM | AD1843_RDA1GM);
- else
- value |= (AD1843_LDA1GM | AD1843_RDA1GM);
- ad1843_reg_write(sc, AD1843_DAC1_ANALOG_GAIN, value);
- break;
-
- case AD1843_DAC2_GAIN:
- case AD1843_AUX1_GAIN:
- case AD1843_AUX2_GAIN:
- case AD1843_AUX3_GAIN:
- case AD1843_MIC_GAIN:
- left = AUDIO_MAX_GAIN -
- mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
- right = AUDIO_MAX_GAIN -
- mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
- reg = AD1843_DAC2_TO_MIXER + mc->dev - AD1843_DAC2_GAIN;
- value = ad1843_reg_read(sc, reg);
- value &= ~(AD1843_LD2M_MASK | AD1843_RD2M_MASK);
- value |= ((left >> 3) << AD1843_LD2M_SHIFT);
- value |= ((right >> 3) << AD1843_RD2M_SHIFT);
- ad1843_reg_write(sc, reg, value);
- break;
- case AD1843_MONO_GAIN:
- left = AUDIO_MAX_GAIN -
- mc->un.value.level[AUDIO_MIXER_LEVEL_MONO];
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- value &= ~AD1843_MNM_MASK;
- value |= ((left >> 3) << AD1843_MNM_SHIFT);
- ad1843_reg_write(sc, AD1843_MISC_SETTINGS, value);
- break;
- case AD1843_DAC2_MUTE:
- case AD1843_AUX1_MUTE:
- case AD1843_AUX2_MUTE:
- case AD1843_AUX3_MUTE:
- case AD1843_MIC_MUTE:
- case AD1843_MONO_MUTE: /* matches left channel */
- reg = AD1843_DAC2_TO_MIXER + mc->dev - AD1843_DAC2_MUTE;
- value = ad1843_reg_read(sc, reg);
- if (mc->un.ord == 0)
- value &= ~(AD1843_LD2MM | AD1843_RD2MM);
- else
- value |= (AD1843_LD2MM | AD1843_RD2MM);
- ad1843_reg_write(sc, reg, value);
- break;
-
- case AD1843_SUM_MUTE:
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- if (mc->un.ord == 0)
- value &= ~AD1843_SUMM;
- else
- value |= AD1843_SUMM;
- ad1843_reg_write(sc, AD1843_MISC_SETTINGS, value);
- break;
-
- case AD1843_MNO_MUTE:
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- if (mc->un.ord == 0)
- value &= ~AD1843_MNOM;
- else
- value |= AD1843_MNOM;
- ad1843_reg_write(sc, AD1843_MISC_SETTINGS, value);
- break;
-
- case AD1843_HPO_MUTE:
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- if (mc->un.ord == 0)
- value &= ~AD1843_HPOM;
- else
- value |= AD1843_HPOM;
- ad1843_reg_write(sc, AD1843_MISC_SETTINGS, value);
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- break;
-
- default:
- return (EINVAL);
- }
-
- return (0);
-}
-
-int
-mavb_get_port(void *hdl, struct mixer_ctrl *mc)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
- u_char left, right;
- ad1843_addr_t reg;
- u_int16_t value;
-
- DPRINTF(1, ("%s: mavb_get_port: dev=%d\n", sc->sc_dev.dv_xname,
- mc->dev));
-
- switch (mc->dev) {
- case AD1843_ADC_SOURCE:
- value = ad1843_reg_read(sc, AD1843_ADC_SOURCE_GAIN);
- mc->un.ord = (value & AD1843_LSS_MASK) >> AD1843_LSS_SHIFT;
- break;
- case AD1843_ADC_GAIN:
- value = ad1843_reg_read(sc, AD1843_ADC_SOURCE_GAIN);
- left = (value & AD1843_LIG_MASK) >> AD1843_LIG_SHIFT;
- right = (value & AD1843_RIG_MASK) >> AD1843_RIG_SHIFT;
- mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
- (left << 4) | left;
- mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
- (right << 4) | right;
- break;
- case AD1843_ADC_MIC_GAIN:
- value = ad1843_reg_read(sc, AD1843_ADC_SOURCE_GAIN);
- mc->un.ord = (value & AD1843_LMGE) ? 1 : 0;
- break;
-
- case AD1843_DAC1_GAIN:
- value = ad1843_reg_read(sc, AD1843_DAC1_ANALOG_GAIN);
- left = (value & AD1843_LDA1G_MASK) >> AD1843_LDA1G_SHIFT;
- right = (value & AD1843_RDA1G_MASK) >> AD1843_RDA1G_SHIFT;
- mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
- AUDIO_MAX_GAIN - (left << 2);
- mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
- AUDIO_MAX_GAIN - (right << 2);
- break;
- case AD1843_DAC1_MUTE:
- value = ad1843_reg_read(sc, AD1843_DAC1_ANALOG_GAIN);
- mc->un.ord = (value & AD1843_LDA1GM) ? 1 : 0;
- break;
-
- case AD1843_DAC2_GAIN:
- case AD1843_AUX1_GAIN:
- case AD1843_AUX2_GAIN:
- case AD1843_AUX3_GAIN:
- case AD1843_MIC_GAIN:
- reg = AD1843_DAC2_TO_MIXER + mc->dev - AD1843_DAC2_GAIN;
- value = ad1843_reg_read(sc, reg);
- left = (value & AD1843_LD2M_MASK) >> AD1843_LD2M_SHIFT;
- right = (value & AD1843_RD2M_MASK) >> AD1843_RD2M_SHIFT;
- mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
- AUDIO_MAX_GAIN - (left << 3);
- mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
- AUDIO_MAX_GAIN - (right << 3);
- break;
- case AD1843_MONO_GAIN:
- if (mc->un.value.num_channels != 1)
- return (EINVAL);
-
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- left = (value & AD1843_MNM_MASK) >> AD1843_MNM_SHIFT;
- mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
- AUDIO_MAX_GAIN - (left << 3);
- break;
- case AD1843_DAC2_MUTE:
- case AD1843_AUX1_MUTE:
- case AD1843_AUX2_MUTE:
- case AD1843_AUX3_MUTE:
- case AD1843_MIC_MUTE:
- case AD1843_MONO_MUTE: /* matches left channel */
- reg = AD1843_DAC2_TO_MIXER + mc->dev - AD1843_DAC2_MUTE;
- value = ad1843_reg_read(sc, reg);
- mc->un.ord = (value & AD1843_LD2MM) ? 1 : 0;
- break;
-
- case AD1843_SUM_MUTE:
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- mc->un.ord = (value & AD1843_SUMM) ? 1 : 0;
- break;
-
- case AD1843_MNO_MUTE:
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- mc->un.ord = (value & AD1843_MNOM) ? 1 : 0;
- break;
-
- case AD1843_HPO_MUTE:
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- mc->un.ord = (value & AD1843_HPOM) ? 1 : 0;
- break;
-
- default:
- return (EINVAL);
- }
-
- return (0);
-}
-
-int
-mavb_query_devinfo(void *hdl, struct mixer_devinfo *di)
-{
- int i;
-
- di->prev = di->next = AUDIO_MIXER_LAST;
-
- switch (di->index) {
- case AD1843_RECORD_CLASS:
- di->type = AUDIO_MIXER_CLASS;
- di->mixer_class = AD1843_RECORD_CLASS;
- strlcpy(di->label.name, AudioCrecord, sizeof di->label.name);
- break;
-
- case AD1843_ADC_SOURCE:
- di->type = AUDIO_MIXER_ENUM;
- di->mixer_class = AD1843_RECORD_CLASS;
- di->next = AD1843_ADC_GAIN;
- strlcpy(di->label.name, AudioNsource, sizeof di->label.name);
- di->un.e.num_mem =
- sizeof ad1843_source / sizeof ad1843_source[1];
- for (i = 0; i < di->un.e.num_mem; i++) {
- strlcpy(di->un.e.member[i].label.name,
- ad1843_source[i],
- sizeof di->un.e.member[0].label.name);
- di->un.e.member[i].ord = i;
- }
- break;
- case AD1843_ADC_GAIN:
- di->type = AUDIO_MIXER_VALUE;
- di->mixer_class = AD1843_RECORD_CLASS;
- di->prev = AD1843_ADC_SOURCE;
- strlcpy(di->label.name, AudioNvolume, sizeof di->label.name);
- di->un.v.num_channels = 2;
- strlcpy(di->un.v.units.name, AudioNvolume,
- sizeof di->un.v.units.name);
- break;
- case AD1843_ADC_MIC_GAIN:
- di->type = AUDIO_MIXER_ENUM;
- di->mixer_class = AD1843_RECORD_CLASS;
- strlcpy(di->label.name, AudioNmicrophone "." AudioNpreamp,
- sizeof di->label.name);
- di->un.e.num_mem = 2;
- strlcpy(di->un.e.member[0].label.name, AudioNoff,
- sizeof di->un.e.member[0].label.name);
- di->un.e.member[0].ord = 0;
- strlcpy(di->un.e.member[1].label.name, AudioNon,
- sizeof di->un.e.member[1].label.name);
- di->un.e.member[1].ord = 1;
- break;
-
- case AD1843_INPUT_CLASS:
- di->type = AUDIO_MIXER_CLASS;
- di->mixer_class = AD1843_INPUT_CLASS;
- strlcpy(di->label.name, AudioCinputs, sizeof di->label.name);
- break;
-
- case AD1843_DAC1_GAIN:
- di->type = AUDIO_MIXER_VALUE;
- di->mixer_class = AD1843_INPUT_CLASS;
- di->next = AD1843_DAC1_MUTE;
- strlcpy(di->label.name, AudioNdac "1", sizeof di->label.name);
- di->un.v.num_channels = 2;
- strlcpy(di->un.v.units.name, AudioNvolume,
- sizeof di->un.v.units.name);
- break;
- case AD1843_DAC1_MUTE:
- di->type = AUDIO_MIXER_ENUM;
- di->mixer_class = AD1843_INPUT_CLASS;
- di->prev = AD1843_DAC1_GAIN;
- strlcpy(di->label.name, AudioNmute, sizeof di->label.name);
- di->un.e.num_mem = 2;
- strlcpy(di->un.e.member[0].label.name, AudioNoff,
- sizeof di->un.e.member[0].label.name);
- di->un.e.member[0].ord = 0;
- strlcpy(di->un.e.member[1].label.name, AudioNon,
- sizeof di->un.e.member[1].label.name);
- di->un.e.member[1].ord = 1;
- break;
-
- case AD1843_DAC2_GAIN:
- case AD1843_AUX1_GAIN:
- case AD1843_AUX2_GAIN:
- case AD1843_AUX3_GAIN:
- case AD1843_MIC_GAIN:
- case AD1843_MONO_GAIN:
- di->type = AUDIO_MIXER_VALUE;
- di->mixer_class = AD1843_INPUT_CLASS;
- di->next = di->index + AD1843_DAC2_MUTE - AD1843_DAC2_GAIN;
- strlcpy(di->label.name,
- ad1843_input[di->index - AD1843_DAC2_GAIN],
- sizeof di->label.name);
- if (di->index == AD1843_MONO_GAIN)
- di->un.v.num_channels = 1;
- else
- di->un.v.num_channels = 2;
- strlcpy(di->un.v.units.name, AudioNvolume,
- sizeof di->un.v.units.name);
- break;
- case AD1843_DAC2_MUTE:
- case AD1843_AUX1_MUTE:
- case AD1843_AUX2_MUTE:
- case AD1843_AUX3_MUTE:
- case AD1843_MIC_MUTE:
- case AD1843_MONO_MUTE:
- di->type = AUDIO_MIXER_ENUM;
- di->mixer_class = AD1843_INPUT_CLASS;
- di->prev = di->index + AD1843_DAC2_GAIN - AD1843_DAC2_MUTE;
- strlcpy(di->label.name, AudioNmute, sizeof di->label.name);
- di->un.e.num_mem = 2;
- strlcpy(di->un.e.member[0].label.name, AudioNoff,
- sizeof di->un.e.member[0].label.name);
- di->un.e.member[0].ord = 0;
- strlcpy(di->un.e.member[1].label.name, AudioNon,
- sizeof di->un.e.member[1].label.name);
- di->un.e.member[1].ord = 1;
- break;
-
- case AD1843_SUM_MUTE:
- di->type = AUDIO_MIXER_ENUM;
- di->mixer_class = AD1843_INPUT_CLASS;
- strlcpy(di->label.name, "sum." AudioNmute,
- sizeof di->label.name);
- di->un.e.num_mem = 2;
- strlcpy(di->un.e.member[0].label.name, AudioNoff,
- sizeof di->un.e.member[0].label.name);
- di->un.e.member[0].ord = 0;
- strlcpy(di->un.e.member[1].label.name, AudioNon,
- sizeof di->un.e.member[1].label.name);
- di->un.e.member[1].ord = 1;
- break;
-
- case AD1843_OUTPUT_CLASS:
- di->type = AUDIO_MIXER_CLASS;
- di->mixer_class = AD1843_OUTPUT_CLASS;
- strlcpy(di->label.name, AudioCoutputs, sizeof di->label.name);
- break;
-
- case AD1843_MNO_MUTE:
- di->type = AUDIO_MIXER_ENUM;
- di->mixer_class = AD1843_OUTPUT_CLASS;
- strlcpy(di->label.name, AudioNmono "." AudioNmute,
- sizeof di->label.name);
- di->un.e.num_mem = 2;
- strlcpy(di->un.e.member[0].label.name, AudioNoff,
- sizeof di->un.e.member[0].label.name);
- di->un.e.member[0].ord = 0;
- strlcpy(di->un.e.member[1].label.name, AudioNon,
- sizeof di->un.e.member[1].label.name);
- di->un.e.member[1].ord = 1;
- break;
-
- case AD1843_HPO_MUTE:
- di->type = AUDIO_MIXER_ENUM;
- di->mixer_class = AD1843_OUTPUT_CLASS;
- strlcpy(di->label.name, AudioNheadphone "." AudioNmute,
- sizeof di->label.name);
- di->un.e.num_mem = 2;
- strlcpy(di->un.e.member[0].label.name, AudioNoff,
- sizeof di->un.e.member[0].label.name);
- di->un.e.member[0].ord = 0;
- strlcpy(di->un.e.member[1].label.name, AudioNon,
- sizeof di->un.e.member[1].label.name);
- di->un.e.member[1].ord = 1;
- break;
-
- default:
- return (EINVAL);
- }
-
- return (0);
-}
-
-int
-mavb_get_props(void *hdl)
-{
- return (AUDIO_PROP_FULLDUPLEX | AUDIO_PROP_INDEPENDENT);
-}
-
-static void
-mavb_dma_output(struct mavb_softc *sc)
-{
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- u_int64_t write_ptr;
- caddr_t src, dst, end;
- int count;
-
- write_ptr = bus_space_read_8(st, sh, MAVB_CHANNEL2_WRITE_PTR);
-
- end = sc->play.hw_start + MAVB_CHAN_RING_SIZE;
- dst = sc->play.hw_start + write_ptr;
- src = sc->play.sw_cur;
-
- if (write_ptr % MAVB_CHAN_CHUNK_SIZE) {
- printf("%s: write_ptr=%lld\n", sc->sc_dev.dv_xname, write_ptr);
- return;
- }
- if ((src - sc->play.sw_start) % MAVB_CHAN_CHUNK_SIZE) {
- printf("%s: src=%ld\n", sc->sc_dev.dv_xname,
- src - sc->play.sw_start);
- return;
- }
-
- count = MAVB_CHAN_INTR_SIZE / MAVB_CHAN_CHUNK_SIZE;
- while (--count >= 0) {
- memcpy(dst, src, MAVB_CHAN_CHUNK_SIZE);
- dst += MAVB_CHAN_CHUNK_SIZE;
- src += MAVB_CHAN_CHUNK_SIZE;
- if (dst >= end)
- dst = sc->play.hw_start;
- if (src >= sc->play.sw_end)
- src = sc->play.sw_start;
- if (!((src - sc->play.sw_start) % sc->play.blksize)) {
- if (sc->play.intr)
- sc->play.intr(sc->play.intrarg);
- }
- }
- write_ptr = dst - sc->play.hw_start;
- bus_space_write_8(st, sh, MAVB_CHANNEL2_WRITE_PTR, write_ptr);
- sc->play.sw_cur = src;
-}
-
-static void
-mavb_dma_input(struct mavb_softc *sc)
-{
- bus_space_tag_t st = sc->sc_st;
- bus_space_handle_t sh = sc->sc_sh;
- u_int64_t read_ptr;
- caddr_t src, dst, end;
- int count;
-
- read_ptr = bus_space_read_8(st, sh, MAVB_CHANNEL1_READ_PTR);
-
- end = sc->rec.hw_start + MAVB_CHAN_RING_SIZE;
- src = sc->rec.hw_start + read_ptr;
- dst = sc->rec.sw_cur;
-
- if (read_ptr % MAVB_CHAN_CHUNK_SIZE) {
- printf("%s: read_ptr=%lld\n", sc->sc_dev.dv_xname, read_ptr);
- return;
- }
- if ((dst - sc->rec.sw_start) % MAVB_CHAN_CHUNK_SIZE) {
- printf("%s: dst=%ld\n", sc->sc_dev.dv_xname,
- dst - sc->rec.sw_start);
- return;
- }
-
- count = MAVB_CHAN_INTR_SIZE / MAVB_CHAN_CHUNK_SIZE;
- while (--count >= 0) {
- memcpy(dst, src, MAVB_CHAN_CHUNK_SIZE);
- dst += MAVB_CHAN_CHUNK_SIZE;
- src += MAVB_CHAN_CHUNK_SIZE;
- if (src >= end)
- src = sc->rec.hw_start;
- if (dst >= sc->rec.sw_end)
- dst = sc->rec.sw_start;
- if (!((dst - sc->rec.sw_start) % sc->rec.blksize)) {
- if (sc->rec.intr)
- sc->rec.intr(sc->rec.intrarg);
- }
- }
- read_ptr = src - sc->rec.hw_start;
- bus_space_write_8(st, sh, MAVB_CHANNEL1_READ_PTR, read_ptr);
- sc->rec.sw_cur = dst;
-}
-
-int
-mavb_trigger_output(void *hdl, void *start, void *end, int blksize,
- void (*intr)(void *), void *intrarg, struct audio_params *param)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
-
- DPRINTF(1, ("%s: mavb_trigger_output: start=%p end=%p "
- "blksize=%d intr=%p(%p)\n", sc->sc_dev.dv_xname,
- start, end, blksize, intr, intrarg));
-
- mtx_enter(&audio_lock);
- sc->play.blksize = blksize;
- sc->play.intr = intr;
- sc->play.intrarg = intrarg;
-
- sc->play.sw_start = sc->play.sw_cur = start;
- sc->play.sw_end = end;
-
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL2_CONTROL,
- MAVB_CHANNEL_RESET);
- delay(1000);
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL2_CONTROL, 0);
-
- /* Fill first 25% of buffer with silence. */
- bzero(sc->play.hw_start, MAVB_CHAN_CHUNK_SIZE);
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL2_WRITE_PTR,
- MAVB_CHAN_CHUNK_SIZE);
-
- /* Fill next 50% of buffer with audio data. */
- mavb_dma_output(sc);
-
- /* The buffer is now 75% full. Start DMA and get interrupts
- * when the buffer is 25% full. The interrupt handler fills
- * in 50% of the buffer size, putting it back to 75% full.
- */
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL2_CONTROL,
- MAVB_CHANNEL_DMA_ENABLE | MAVB_CHANNEL_INT_25);
- mtx_leave(&audio_lock);
- return (0);
-}
-
-int
-mavb_trigger_input(void *hdl, void *start, void *end, int blksize,
- void (*intr)(void *), void *intrarg, struct audio_params *param)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
-
- DPRINTF(1, ("%s: mavb_trigger_output: start=%p end=%p "
- "blksize=%d intr=%p(%p)\n", sc->sc_dev.dv_xname,
- start, end, blksize, intr, intrarg));
-
- mtx_enter(&audio_lock);
- sc->rec.blksize = blksize;
- sc->rec.intr = intr;
- sc->rec.intrarg = intrarg;
-
- sc->rec.sw_start = sc->rec.sw_cur = start;
- sc->rec.sw_end = end;
-
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL1_CONTROL,
- MAVB_CHANNEL_RESET);
- delay(1000);
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL1_CONTROL, 0);
-
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CHANNEL1_CONTROL,
- MAVB_CHANNEL_DMA_ENABLE | MAVB_CHANNEL_INT_50);
- mtx_leave(&audio_lock);
- return (0);
-}
-
-static void
-mavb_button_repeat(void *hdl)
-{
- struct mavb_softc *sc = (struct mavb_softc *)hdl;
- u_int64_t intmask, control;
- u_int16_t value, left, right;
-
- DPRINTF(1, ("%s: mavb_repeat called\n", sc->sc_dev.dv_xname));
-
-#define MAVB_CONTROL_VOLUME_BUTTONS \
- (MAVB_CONTROL_VOLUME_BUTTON_UP | MAVB_CONTROL_VOLUME_BUTTON_DOWN)
-
- control = bus_space_read_8(sc->sc_st, sc->sc_sh, MAVB_CONTROL);
- if (control & MAVB_CONTROL_VOLUME_BUTTONS) {
- value = ad1843_reg_read(sc, AD1843_DAC1_ANALOG_GAIN);
- left = (value & AD1843_LDA1G_MASK) >> AD1843_LDA1G_SHIFT;
- right = (value & AD1843_RDA1G_MASK) >> AD1843_RDA1G_SHIFT;
- if (control & MAVB_CONTROL_VOLUME_BUTTON_UP) {
- control &= ~MAVB_CONTROL_VOLUME_BUTTON_UP;
- if (left > 0)
- left--; /* attenuation! */
- if (right > 0)
- right--;
- }
- if (control & MAVB_CONTROL_VOLUME_BUTTON_DOWN) {
- control &= ~MAVB_CONTROL_VOLUME_BUTTON_DOWN;
- if (left < 63)
- left++;
- if (right < 63)
- right++;
- }
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CONTROL, control);
-
- value &= ~(AD1843_LDA1G_MASK | AD1843_RDA1G_MASK);
- value |= (left << AD1843_LDA1G_SHIFT);
- value |= (right << AD1843_RDA1G_SHIFT);
- ad1843_reg_write(sc, AD1843_DAC1_ANALOG_GAIN, value);
-
- timeout_add_msec(&sc->sc_volume_button_to,
- MAVB_VOLUME_BUTTON_REPEAT_DELN);
- } else {
- /* Enable volume button interrupts again. */
- intmask = bus_space_read_8(sc->sc_st, sc->sc_isash,
- MACE_ISA_INT_MASK);
- bus_space_write_8(sc->sc_st, sc->sc_isash, MACE_ISA_INT_MASK,
- intmask | MACE_ISA_INT_AUDIO_SC);
- }
-}
-
-static int
-mavb_intr(void *arg)
-{
- struct mavb_softc *sc = arg;
- u_int64_t intstat, intmask;
-
- mtx_enter(&audio_lock);
- intstat = bus_space_read_8(sc->sc_st, sc->sc_isash, MACE_ISA_INT_STAT);
- DPRINTF(MAVB_DEBUG_INTR, ("%s: mavb_intr: intstat = 0x%lx\n",
- sc->sc_dev.dv_xname, intstat));
-
- if (intstat & MACE_ISA_INT_AUDIO_SC) {
- /* Disable volume button interrupts. */
- intmask = bus_space_read_8(sc->sc_st, sc->sc_isash,
- MACE_ISA_INT_MASK);
- bus_space_write_8(sc->sc_st, sc->sc_isash, MACE_ISA_INT_MASK,
- intmask & ~MACE_ISA_INT_AUDIO_SC);
-
- timeout_add_msec(&sc->sc_volume_button_to,
- MAVB_VOLUME_BUTTON_REPEAT_DEL1);
- }
-
- if (intstat & MACE_ISA_INT_AUDIO_DMA1)
- mavb_dma_input(sc);
-
- if (intstat & MACE_ISA_INT_AUDIO_DMA2)
- mavb_dma_output(sc);
- mtx_leave(&audio_lock);
- return 1;
-}
-
-int
-mavb_match(struct device *parent, void *match, void *aux)
-{
- struct macebus_attach_args *maa = aux;
- bus_space_handle_t ioh;
- u_int64_t control;
-
- if (bus_space_map(maa->maa_iot, maa->maa_baseaddr, MAVB_NREGS, 0,
- &ioh) != 0)
- return (0);
- control = bus_space_read_8(maa->maa_iot, ioh, MAVB_CONTROL);
- bus_space_unmap(maa->maa_iot, ioh, MAVB_NREGS);
-
- return ((control & MAVB_CONTROL_CODEC_PRESENT) != 0);
-}
-
-void
-mavb_attach(struct device *parent, struct device *self, void *aux)
-{
- struct mavb_softc *sc = (void *)self;
- struct macebus_attach_args *maa = aux;
- bus_dma_segment_t seg;
- u_int16_t value;
- int rseg;
-
- sc->sc_st = maa->maa_iot;
- if (bus_space_map(sc->sc_st, maa->maa_baseaddr, MAVB_NREGS, 0,
- &sc->sc_sh) != 0) {
- printf(": can't map i/o space\n");
- return;
- }
-
- /* XXX We need access to some of the MACE ISA registers. */
- extern bus_space_handle_t mace_h;
- bus_space_subregion(sc->sc_st, mace_h, 0, MAVB_ISA_NREGS,
- &sc->sc_isash);
-
- /* Set up DMA structures. */
- sc->sc_dmat = maa->maa_dmat;
- if (bus_dmamap_create(sc->sc_dmat, MAVB_ISA_RING_SIZE, 1,
- MAVB_ISA_RING_SIZE, 0, 0, &sc->sc_dmamap)) {
- printf(": can't create MACE ISA DMA map\n");
- return;
- }
-
- if (bus_dmamem_alloc(sc->sc_dmat, MAVB_ISA_RING_SIZE,
- MACE_ISA_RING_ALIGN, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) {
- printf(": can't allocate ring buffer\n");
- return;
- }
-
- if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, MAVB_ISA_RING_SIZE,
- &sc->sc_ring, BUS_DMA_COHERENT)) {
- printf(": can't map ring buffer\n");
- return;
- }
-
- if (bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ring,
- MAVB_ISA_RING_SIZE, NULL, BUS_DMA_NOWAIT)) {
- printf(": can't load MACE ISA DMA map\n");
- return;
- }
-
- sc->rec.hw_start = sc->sc_ring;
- sc->play.hw_start = sc->sc_ring + MAVB_CHAN_RING_SIZE;
-
- bus_space_write_8(sc->sc_st, sc->sc_isash, MACE_ISA_RING_BASE,
- sc->sc_dmamap->dm_segs[0].ds_addr);
-
- /* Establish interrupt. */
- macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
- IPL_AUDIO, mavb_intr, sc, sc->sc_dev.dv_xname);
-
- /* 2. Assert the RESET signal. */
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CONTROL,
- MAVB_CONTROL_RESET);
- delay(1); /* at least 100 ns */
-
- /* 3. Deassert the RESET signal and enter a wait period to
- allow the AD1843 internal clocks and the external
- crystal oscillator to stabilize. */
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CONTROL, 0);
- delay(800); /* typically 400 us to 800 us */
- if (ad1843_reg_read(sc, AD1843_CODEC_STATUS) & AD1843_INIT) {
- printf(": codec not ready\n");
- return;
- }
-
- /* 4. Put the conversion sources into standby. */
- value = ad1843_reg_read(sc, AD1843_FUNDAMENTAL_SETTINGS);
- ad1843_reg_write(sc, AD1843_FUNDAMENTAL_SETTINGS,
- value & ~AD1843_PDNI);
- delay (500000); /* approximately 474 ms */
- if (ad1843_reg_read(sc, AD1843_CODEC_STATUS) & AD1843_PDNO) {
- printf(": can't power up conversion resources\n");
- return;
- }
-
- /* 5. Power up the clock generators and enable clock output pins. */
- value = ad1843_reg_read(sc, AD1843_FUNDAMENTAL_SETTINGS);
- ad1843_reg_write(sc, AD1843_FUNDAMENTAL_SETTINGS,
- value | AD1843_C1EN | AD1843_C2EN);
-
- /* 6. Configure conversion resources while they are in standby. */
- value = ad1843_reg_read(sc, AD1843_SERIAL_INTERFACE);
- ad1843_reg_write(sc, AD1843_SERIAL_INTERFACE, value | AD1843_ADTLK);
- value = ad1843_reg_read(sc, AD1843_CHANNEL_SAMPLE_RATE);
- ad1843_reg_write(sc, AD1843_CHANNEL_SAMPLE_RATE,
- value | (2 << AD1843_DA1C_SHIFT) |
- (1 << AD1843_ADRC_SHIFT) | (1 << AD1843_ADLC_SHIFT));
-
- /* 7. Enable conversion resources. */
- value = ad1843_reg_read(sc, AD1843_CHANNEL_POWER_DOWN);
- ad1843_reg_write(sc, AD1843_CHANNEL_POWER_DOWN,
- value | (AD1843_DA1EN | AD1843_ANAEN | AD1843_AAMEN |
- AD1843_ADREN | AD1843_ADLEN));
-
- /* 8. Configure conversion resources while they are enabled. */
- value = ad1843_reg_read(sc, AD1843_DAC1_ANALOG_GAIN);
- ad1843_reg_write(sc, AD1843_DAC1_ANALOG_GAIN,
- value & ~(AD1843_LDA1GM | AD1843_RDA1GM));
- value = ad1843_reg_read(sc, AD1843_DAC1_DIGITAL_GAIN);
- ad1843_reg_write(sc, AD1843_DAC1_DIGITAL_GAIN,
- value & ~(AD1843_LDA1AM | AD1843_RDA1AM));
- value = ad1843_reg_read(sc, AD1843_MISC_SETTINGS);
- ad1843_reg_write(sc, AD1843_MISC_SETTINGS,
- value & ~(AD1843_HPOM | AD1843_MNOM));
-
- value = ad1843_reg_read(sc, AD1843_CODEC_STATUS);
- printf(": AD1843 rev %d\n", (u_int)value & AD1843_REVISION_MASK);
-
- sc->play.rate = sc->rec.rate = 48000;
- sc->play.format = sc->rec.format = AD1843_PCM8;
-
- timeout_set(&sc->sc_volume_button_to, mavb_button_repeat, sc);
-
- audio_attach_mi(&mavb_sa_hw_if, sc, &sc->sc_dev);
-
- return;
-}
-
-u_int16_t
-ad1843_reg_read(struct mavb_softc *sc, ad1843_addr_t addr)
-{
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CODEC_CONTROL,
- (addr & MAVB_CODEC_ADDRESS_MASK) << MAVB_CODEC_ADDRESS_SHIFT |
- MAVB_CODEC_READ);
- delay(200);
- return bus_space_read_8(sc->sc_st, sc->sc_sh, MAVB_CODEC_STATUS);
-}
-
-u_int16_t
-ad1843_reg_write(struct mavb_softc *sc, ad1843_addr_t addr, u_int16_t value)
-{
- bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CODEC_CONTROL,
- (addr & MAVB_CODEC_ADDRESS_MASK) << MAVB_CODEC_ADDRESS_SHIFT |
- (value & MAVB_CODEC_WORD_MASK) << MAVB_CODEC_WORD_SHIFT);
- delay(200);
- return bus_space_read_8(sc->sc_st, sc->sc_sh, MAVB_CODEC_STATUS);
-}
-
-void
-ad1843_dump_regs(struct mavb_softc *sc)
-{
- u_int16_t addr;
-
- for (addr = 0; addr < AD1843_NREGS; addr++)
- printf("%d: 0x%04x\n", addr, ad1843_reg_read(sc, addr));
-}
+++ /dev/null
-/* $OpenBSD: mavbreg.h,v 1.1 2005/01/02 19:25:41 kettenis Exp $ */
-
-/*
- * Copyright (c) 2005 Mark Kettenis
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * MACE Moosehead A/V Board register definitions.
- */
-
-#define MAVB_CONTROL 0x00
-#define MAVB_CONTROL_RESET 0x0000000000000001
-#define MAVB_CONTROL_CODEC_PRESENT 0x0000000000000002
-#define MAVB_CONTROL_VOLUME_BUTTON_UP 0x0000000001000000
-#define MAVB_CONTROL_VOLUME_BUTTON_DOWN 0x0000000000800000
-
-#define MAVB_CODEC_CONTROL 0x08
-#define MAVB_CODEC_READ 0x0000000000010000
-#define MAVB_CODEC_WORD_SHIFT 0
-#define MAVB_CODEC_WORD_MASK 0x000000000000ffff
-#define MAVB_CODEC_ADDRESS_SHIFT 17
-#define MAVB_CODEC_ADDRESS_MASK 0x000000000000001f
-
-#define MAVB_CODEC_STATUS 0x18
-#define MAVB_CHANNEL1_CONTROL 0x20
-#define MAVB_CHANNEL2_CONTROL 0x40
-#define MAVB_CHANNEL3_CONTROL 0x60
-#define MAVB_CHANNEL_RESET 0x0000000000000400
-#define MAVB_CHANNEL_DMA_ENABLE 0x0000000000000200
-#define MAVB_CHANNEL_INT_DISABLED 0x0000000000000000
-#define MAVB_CHANNEL_INT_25 0x0000000000000020
-#define MAVB_CHANNEL_INT_50 0x0000000000000040
-#define MAVB_CHANNEL_INT_75 0x0000000000000060
-#define MAVB_CHANNEL_INT_EMPTY 0x0000000000000080
-#define MAVB_CHANNEL_INT_NOT_EMPTY 0x00000000000000a0
-#define MAVB_CHANNEL_INT_FULL 0x00000000000000c0
-#define MAVB_CHANNEL_INT_NOT_FULL 0x00000000000000e0
-
-#define MAVB_CHANNEL1_READ_PTR 0x28
-#define MAVB_CHANNEL1_WRITE_PTR 0x30
-#define MAVB_CHANNEL1_DEPTH 0x38
-#define MAVB_CHANNEL2_READ_PTR 0x48
-#define MAVB_CHANNEL2_WRITE_PTR 0x50
-#define MAVB_CHANNEL2_DEPTH 0x58
-
-#define MAVB_NREGS 0x80
+++ /dev/null
-/* $OpenBSD: mkbc.c,v 1.15 2019/10/17 13:42:15 cheloha Exp $ */
-
-/*
- * Copyright (c) 2006, 2007, Joel Sing
- * All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Derived from sys/dev/ic/pckbc.c under the following terms:
- * $NetBSD: pckbc.c,v 1.5 2000/06/09 04:58:35 soda Exp $ */
-
-/*
- * Copyright (c) 1998
- * Matthias Drochner. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Driver for Moosehead PS/2 Controllers (mkbc)
- *
- * There are actually two separate controllers attached to the macebus.
- * However in the interest of reusing code, we want to act like a pckbc(4)
- * so that we can directly attach pckbd(4) and pms(4). As a result, we make
- * each controller look like a "slot" and combine them into a single device.
- *
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-#include <sys/timeout.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/signalvar.h>
-#include <sys/errno.h>
-#include <sys/queue.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <mips64/archtype.h>
-
-#include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebusvar.h>
-
-#include <dev/ic/pckbcvar.h>
-#include <dev/pckbc/pckbdvar.h>
-
-#include "mkbcreg.h"
-
-const char *mkbc_slot_names[] = { "kbd", "mouse" };
-
-#define KBC_DEVCMD_ACK 0xfa
-#define KBC_DEVCMD_RESEND 0xfe
-
-#define KBD_DELAY DELAY(8)
-
-struct mkbc_softc {
- struct pckbc_softc sc_pckbc;
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
-};
-
-int mkbc_match(struct device *, void *, void *);
-void mkbc_attach(struct device *, struct device *, void *);
-
-struct cfattach mkbc_ca = {
- sizeof(struct mkbc_softc), mkbc_match, mkbc_attach
-};
-
-struct cfdriver mkbc_cd = {
- NULL, "mkbc", DV_DULL
-};
-
-/* Descriptor for one device command. */
-struct pckbc_devcmd {
- TAILQ_ENTRY(pckbc_devcmd) next;
- int flags;
-#define KBC_CMDFLAG_SYNC 1 /* Give descriptor back to caller. */
-#define KBC_CMDFLAG_SLOW 2
- u_char cmd[4];
- int cmdlen, cmdidx, retries;
- u_char response[4];
- int status, responselen, responseidx;
-};
-
-/* Data per slave device. */
-struct pckbc_slotdata {
- int polling; /* Don't read data port in interrupt handler. */
- TAILQ_HEAD(, pckbc_devcmd) cmdqueue; /* Active commands. */
- TAILQ_HEAD(, pckbc_devcmd) freequeue; /* Free commands. */
-#define NCMD 5
- struct pckbc_devcmd cmds[NCMD];
- bus_space_handle_t ioh;
-};
-
-#define CMD_IN_QUEUE(q) (TAILQ_FIRST(&(q)->cmdqueue) != NULL)
-
-static int mkbc_console;
-static struct pckbc_slotdata mkbc_cons_slotdata;
-struct pckbc_internal mkbc_consdata;
-
-void mkbc_start(struct pckbc_internal *, pckbc_slot_t);
-int mkbc_attach_slot(struct mkbc_softc *, pckbc_slot_t);
-void mkbc_init_slotdata(struct pckbc_slotdata *);
-int mkbc_submatch(struct device *, void *, void *);
-int mkbcprint(void *, const char *);
-int mkbcintr(void *);
-int mkbcintr_internal(struct pckbc_internal *, struct pckbc_softc *);
-void mkbc_cleanqueue(struct pckbc_slotdata *);
-void mkbc_cleanup(void *);
-void mkbc_poll(void *);
-int mkbc_cmdresponse(struct pckbc_internal *, pckbc_slot_t, u_char);
-int mkbc_poll_read(bus_space_tag_t, bus_space_handle_t);
-int mkbc_poll_write(bus_space_tag_t, bus_space_handle_t, int);
-
-int
-mkbc_match(struct device *parent, void *cf, void *aux)
-{
- return 1;
-}
-
-void
-mkbc_init_slotdata(struct pckbc_slotdata *q)
-{
- int i;
- TAILQ_INIT(&q->cmdqueue);
- TAILQ_INIT(&q->freequeue);
-
- for (i = 0; i < NCMD; i++) {
- TAILQ_INSERT_TAIL(&q->freequeue, &(q->cmds[i]), next);
- }
- q->polling = 0;
-}
-
-int
-mkbcprint(void *aux, const char *pnp)
-{
- struct pckbc_attach_args *pa = aux;
-
- if (!pnp)
- printf(" (%s slot)", mkbc_slot_names[pa->pa_slot]);
-
- return (QUIET);
-}
-
-int
-mkbc_submatch(struct device *parent, void *match, void *aux)
-{
- struct cfdata *cf = match;
- struct pckbc_attach_args *pa = aux;
-
- if (cf->cf_loc[PCKBCCF_SLOT] != PCKBCCF_SLOT_DEFAULT &&
- cf->cf_loc[PCKBCCF_SLOT] != pa->pa_slot)
- return (0);
- return ((*cf->cf_attach->ca_match)(parent, cf, aux));
-}
-
-int
-mkbc_attach_slot(struct mkbc_softc *msc, pckbc_slot_t slot)
-{
- struct pckbc_softc *sc = &msc->sc_pckbc;
- struct pckbc_internal *t = sc->id;
- struct pckbc_attach_args pa;
- bus_space_handle_t ioh;
- int found;
-
- if (!t->t_slotdata[slot]) {
-
- t->t_slotdata[slot] = malloc(sizeof(struct pckbc_slotdata),
- M_DEVBUF, M_NOWAIT);
-
- if (t->t_slotdata[slot] == NULL) {
- printf("Failed to allocate slot data!\n");
- return 0;
- }
- mkbc_init_slotdata(t->t_slotdata[slot]);
-
- /* Map subregion of bus space for this "slot". */
- if (bus_space_subregion(msc->iot, msc->ioh,
- MKBC_PORTSIZE * slot, MKBC_PORTSIZE, &ioh)) {
- printf("Unable to map slot subregion!\n");
- return 0;
- }
- t->t_slotdata[slot]->ioh = ioh;
-
- /* Initialise controller. */
- bus_space_write_8(msc->iot, ioh, MKBC_CONTROL,
- MKBC_CONTROL_TX_CLOCK_DISABLE | MKBC_CONTROL_RESET);
- delay(100); /* 100us */
-
- /* Enable controller. */
- bus_space_write_8(t->t_iot, t->t_slotdata[slot]->ioh,
- MKBC_CONTROL,
- MKBC_CONTROL_RX_CLOCK_ENABLE | MKBC_CONTROL_TX_ENABLE);
-
- }
-
- pa.pa_tag = t;
- pa.pa_slot = slot;
- found = (config_found_sm((struct device *)msc, &pa,
- mkbcprint, mkbc_submatch) != NULL);
-
- return (found);
-}
-
-void
-mkbc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct mkbc_softc *msc = (void*)self;
- struct macebus_attach_args *maa = aux;
- struct pckbc_softc *sc = &msc->sc_pckbc;
- struct pckbc_internal *t;
-
- if (mkbc_console == 0) {
-
- /* Setup bus space mapping. */
- msc->iot = maa->maa_iot;
- if (bus_space_map(msc->iot, maa->maa_baseaddr,
- MKBC_PORTSIZE * 2, 0, &msc->ioh)) {
- printf(": unable to map bus space!\n");
- return;
- }
-
- /* Setup pckbc_internal structure. */
- t = malloc(sizeof(struct pckbc_internal), M_DEVBUF,
- M_WAITOK | M_ZERO);
- t->t_iot = msc->iot;
- t->t_ioh_d = 0;
- t->t_ioh_c = 0;
- t->t_addr = maa->maa_baseaddr;
- t->t_sc = (struct pckbc_softc *)msc;
- sc->id = t;
-
- timeout_set(&t->t_cleanup, mkbc_cleanup, t);
- timeout_set(&t->t_poll, mkbc_poll, t);
-
- } else {
-
- /* Things have already been setup in mkbc_cnattach. */
- msc->iot = mkbc_consdata.t_iot;
- msc->ioh = mkbc_consdata.t_ioh_d;
- mkbc_consdata.t_sc = (struct pckbc_softc *)msc;
- sc->id = &mkbc_consdata;
-
- }
-
- /* Establish interrupt handler. */
- if (macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
- IPL_TTY, mkbcintr, msc, sc->sc_dv.dv_xname))
- printf("\n");
- else
- printf(": unable to establish interrupt\n");
-
- /*
- * Attach "slots" - technically these are separate controllers
- * in the same bus space, however we want to act like pckbc(4) so
- * that we can attach pckbd(4) and pms(4).
- */
- mkbc_attach_slot(msc, PCKBC_KBD_SLOT);
- mkbc_attach_slot(msc, PCKBC_AUX_SLOT);
-}
-
-int
-mkbcintr(void *vsc)
-{
- struct mkbc_softc *msc = (struct mkbc_softc *)vsc;
- struct pckbc_softc *sc = &msc->sc_pckbc;
- struct pckbc_internal *t = sc->id;
-
- return mkbcintr_internal(t, sc);
-}
-
-int
-mkbcintr_internal(struct pckbc_internal *t, struct pckbc_softc *sc)
-{
- pckbc_slot_t slot;
- struct pckbc_slotdata *q;
- int served = 0;
- u_int64_t stat;
- u_int64_t data;
-
- /* Reschedule timeout further into the idle times. */
- if (timeout_pending(&t->t_poll))
- timeout_add_sec(&t->t_poll, 1);
-
- /*
- * Need to check both "slots" since interrupt could be from
- * either controller.
- */
- slot = PCKBC_KBD_SLOT;
- q = t->t_slotdata[slot];
- for(;;) {
-
- if (!q) {
- printf("mkbcintr: no kbd slot data!\n");
- break;
- }
-
- stat = bus_space_read_8(t->t_iot, q->ioh, MKBC_STATUS);
- if (!(stat & MKBC_STATUS_RX_FULL))
- break;
-
- served = 1;
-
- if (q->polling)
- break; /* pckbc_poll_data() will get it */
-
- KBD_DELAY;
- data = bus_space_read_8(t->t_iot, q->ioh, MKBC_RX_PORT) & 0xff;
- if (CMD_IN_QUEUE(q) && mkbc_cmdresponse(t, slot, data))
- continue;
-
- if (sc->inputhandler[slot])
- (*sc->inputhandler[slot])(sc->inputarg[slot], data);
-#ifdef MKBCDEBUG
- else
- printf("mkbcintr: slot %d lost %d\n", slot, data);
-#endif
- }
-
- /* Mouse controller/slot. */
- slot = PCKBC_AUX_SLOT;
- q = t->t_slotdata[slot];
- for(;;) {
-
- if (!q) {
- printf("mkbcintr: no mouse slot data!\n");
- break;
- }
-
- stat = bus_space_read_8(t->t_iot, q->ioh, MKBC_STATUS);
- if (!(stat & MKBC_STATUS_RX_FULL))
- break;
-
- served = 1;
-
- if (q->polling)
- break; /* pckbc_poll_data() will get it. */
-
- KBD_DELAY;
- data = bus_space_read_8(t->t_iot, q->ioh, MKBC_RX_PORT) & 0xff;
- if (CMD_IN_QUEUE(q) && mkbc_cmdresponse(t, slot, data))
- continue;
-
- if (sc->inputhandler[slot])
- (*sc->inputhandler[slot])(sc->inputarg[slot], data);
-#ifdef MKBCDEBUG
- else
- printf("mkbcintr: slot %d lost %d\n", slot, data);
-#endif
- }
-
- return (served);
-}
-
-int
-mkbc_poll_write(bus_space_tag_t iot, bus_space_handle_t ioh, int val)
-{
- int timeout = 10000;
- u_int64_t stat;
-
- /* Attempt to write a value to the controller. */
- while (timeout--) {
- stat = bus_space_read_8(iot, ioh, MKBC_STATUS);
- if (stat & MKBC_STATUS_TX_EMPTY) {
- bus_space_write_8(iot, ioh, MKBC_TX_PORT, val & 0xff);
- return 0;
- }
- delay(50);
- }
- return -1;
-}
-
-int
-mkbc_poll_read(bus_space_tag_t iot, bus_space_handle_t ioh)
-{
- int timeout = 10000;
- u_int64_t stat, val;
-
- /* Poll input from controller. */
- while (timeout--) {
- stat = bus_space_read_8(iot, ioh, MKBC_STATUS);
- if (stat & MKBC_STATUS_RX_FULL) {
- val = bus_space_read_8(iot, ioh, MKBC_RX_PORT);
- return val & 0xff;
- }
- delay(50);
- }
- return -1;
-}
-
-/*
- * Pass command to device, poll for ACK and data.
- * to be called at spltty()
- */
-static void
-mkbc_poll_cmd(struct pckbc_internal *t, pckbc_slot_t slot,
- struct pckbc_devcmd *cmd)
-{
- bus_space_tag_t iot = t->t_iot;
- bus_space_handle_t ioh = t->t_slotdata[slot]->ioh;
-
- int i, c = 0;
-
- while (cmd->cmdidx < cmd->cmdlen) {
- if (mkbc_poll_write(iot, ioh, cmd->cmd[cmd->cmdidx]) == -1) {
- printf("mkbc_poll_cmd: send error\n");
- cmd->status = EIO;
- return;
- }
- for (i = 10; i; i--) { /* 1s ??? */
- c = mkbc_poll_read(iot, ioh);
- if (c != -1)
- break;
- }
-
- if (c == KBC_DEVCMD_ACK) {
- cmd->cmdidx++;
- continue;
- }
- if (c == KBC_DEVCMD_RESEND) {
-#ifdef MKBCDEBUG
- printf("mkbc_cmd: RESEND\n");
-#endif
- if (cmd->retries++ < 5)
- continue;
- else {
-#ifdef MKBCDEBUG
- printf("mkbc: cmd failed\n");
-#endif
- cmd->status = EIO;
- return;
- }
- }
- if (c == -1) {
-#ifdef MKBCDEBUG
- printf("mkbc_cmd: timeout\n");
-#endif
- cmd->status = EIO;
- return;
- }
-#ifdef MKBCDEBUG
- printf("mkbc_cmd: lost 0x%x\n", c);
-#endif
- }
-
- while (cmd->responseidx < cmd->responselen) {
- if (cmd->flags & KBC_CMDFLAG_SLOW)
- i = 100; /* 10s ??? */
- else
- i = 10; /* 1s ??? */
- while (i--) {
- c = mkbc_poll_read(iot, ioh);
- if (c != -1)
- break;
- }
- if (c == -1) {
-#ifdef MKBCDEBUG
- printf("mkbc_poll_cmd: no data\n");
-#endif
- cmd->status = ETIMEDOUT;
- return;
- } else
- cmd->response[cmd->responseidx++] = c;
- }
-}
-
-/*
- * Clean up a command queue, throw away everything.
- */
-void
-mkbc_cleanqueue(struct pckbc_slotdata *q)
-{
- struct pckbc_devcmd *cmd;
-#ifdef MKBCDEBUG
- int i;
-#endif
-
- while ((cmd = TAILQ_FIRST(&q->cmdqueue))) {
- TAILQ_REMOVE(&q->cmdqueue, cmd, next);
-#ifdef MKBCDEBUG
- printf("mkbc_cleanqueue: removing");
- for (i = 0; i < cmd->cmdlen; i++)
- printf(" %02x", cmd->cmd[i]);
- printf("\n");
-#endif
- TAILQ_INSERT_TAIL(&q->freequeue, cmd, next);
- }
-}
-
-/*
- * Timeout error handler: clean queues and data port.
- * XXX could be less invasive.
- */
-void
-mkbc_cleanup(void *self)
-{
- struct pckbc_internal *t = self;
- int s;
-
- printf("mkbc: command timeout\n");
-
- s = spltty();
-
- if (t->t_slotdata[PCKBC_KBD_SLOT])
- mkbc_cleanqueue(t->t_slotdata[PCKBC_KBD_SLOT]);
- if (t->t_slotdata[PCKBC_AUX_SLOT])
- mkbc_cleanqueue(t->t_slotdata[PCKBC_AUX_SLOT]);
-
- while (mkbc_poll_read(t->t_iot, t->t_slotdata[PCKBC_KBD_SLOT]->ioh)
- != -1) ;
- while (mkbc_poll_read(t->t_iot, t->t_slotdata[PCKBC_AUX_SLOT]->ioh)
- != -1) ;
-
- /* Reset KBC? */
-
- splx(s);
-}
-
-/*
- * Pass command to device during normal operation.
- * to be called at spltty()
- */
-void
-mkbc_start(struct pckbc_internal *t, pckbc_slot_t slot)
-{
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- struct pckbc_devcmd *cmd = TAILQ_FIRST(&q->cmdqueue);
-
- if (q->polling) {
- do {
- mkbc_poll_cmd(t, slot, cmd);
- if (cmd->status)
- printf("mkbc_start: command error\n");
-
- TAILQ_REMOVE(&q->cmdqueue, cmd, next);
- if (cmd->flags & KBC_CMDFLAG_SYNC)
- wakeup(cmd);
- else {
- timeout_del(&t->t_cleanup);
- TAILQ_INSERT_TAIL(&q->freequeue, cmd, next);
- }
- cmd = TAILQ_FIRST(&q->cmdqueue);
- } while (cmd);
- return;
- }
-
- if (mkbc_poll_write(t->t_iot, t->t_slotdata[slot]->ioh,
- cmd->cmd[cmd->cmdidx])) {
- printf("mkbc_start: send error\n");
- /* XXX what now? */
- return;
- }
-}
-
-/*
- * Handle command responses coming in asynchronously,
- * return nonzero if valid response.
- * to be called at spltty()
- */
-int
-mkbc_cmdresponse(struct pckbc_internal *t, pckbc_slot_t slot, u_char data)
-{
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- struct pckbc_devcmd *cmd = TAILQ_FIRST(&q->cmdqueue);
-#ifdef DIAGNOSTIC
- if (!cmd)
- panic("mkbc_cmdresponse: no active command");
-#endif
- if (cmd->cmdidx < cmd->cmdlen) {
- if (data != KBC_DEVCMD_ACK && data != KBC_DEVCMD_RESEND)
- return (0);
-
- if (data == KBC_DEVCMD_RESEND) {
- if (cmd->retries++ < 5) {
- /* try again last command */
- goto restart;
- } else {
-#ifdef MKBCDEBUG
- printf("mkbc: cmd failed\n");
-#endif
- cmd->status = EIO;
- /* dequeue */
- }
- } else {
- if (++cmd->cmdidx < cmd->cmdlen)
- goto restart;
- if (cmd->responselen)
- return (1);
- /* else dequeue */
- }
- } else if (cmd->responseidx < cmd->responselen) {
- cmd->response[cmd->responseidx++] = data;
- if (cmd->responseidx < cmd->responselen)
- return (1);
- /* else dequeue */
- } else
- return (0);
-
- /* dequeue: */
- TAILQ_REMOVE(&q->cmdqueue, cmd, next);
- if (cmd->flags & KBC_CMDFLAG_SYNC)
- wakeup(cmd);
- else {
- timeout_del(&t->t_cleanup);
- TAILQ_INSERT_TAIL(&q->freequeue, cmd, next);
- }
- if (!CMD_IN_QUEUE(q))
- return (1);
-restart:
- mkbc_start(t, slot);
- return (1);
-}
-
-/*
- * Interfaces to act like pckbc(4).
- */
-
-int
-pckbc_xt_translation(pckbc_tag_t self)
-{
- /* Translation isn't supported... */
- return (-1);
-}
-
-/* For use in autoconfiguration. */
-int
-pckbc_poll_cmd(pckbc_tag_t self, pckbc_slot_t slot, u_char *cmd, int len,
- int responselen, u_char *respbuf, int slow)
-{
- struct pckbc_devcmd nc;
- int s;
-
- if ((len > 4) || (responselen > 4))
- return (EINVAL);
-
- bzero(&nc, sizeof(nc));
- bcopy(cmd, nc.cmd, len);
- nc.cmdlen = len;
- nc.responselen = responselen;
- nc.flags = (slow ? KBC_CMDFLAG_SLOW : 0);
-
- s = spltty();
- mkbc_poll_cmd(self, slot, &nc);
- splx(s);
-
- if (nc.status == 0 && respbuf)
- bcopy(nc.response, respbuf, responselen);
-
- return (nc.status);
-}
-
-void
-pckbc_flush(pckbc_tag_t self, pckbc_slot_t slot)
-{
- /* Read any data and discard. */
- struct pckbc_internal *t = self;
- (void) mkbc_poll_read(t->t_iot, t->t_slotdata[slot]->ioh);
-}
-
-/*
- * Put command into the device's command queue, return zero or errno.
- */
-int
-pckbc_enqueue_cmd(pckbc_tag_t self, pckbc_slot_t slot, u_char *cmd, int len,
- int responselen, int sync, u_char *respbuf)
-{
- struct pckbc_internal *t = self;
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- struct pckbc_devcmd *nc;
- int s, isactive, res = 0;
-
- if ((len > 4) || (responselen > 4))
- return (EINVAL);
- s = spltty();
- nc = TAILQ_FIRST(&q->freequeue);
- if (nc) {
- TAILQ_REMOVE(&q->freequeue, nc, next);
- }
- splx(s);
- if (!nc)
- return (ENOMEM);
-
- bzero(nc, sizeof(*nc));
- bcopy(cmd, nc->cmd, len);
- nc->cmdlen = len;
- nc->responselen = responselen;
- nc->flags = (sync ? KBC_CMDFLAG_SYNC : 0);
-
- s = spltty();
-
- if (q->polling && sync) {
- /*
- * XXX We should poll until the queue is empty.
- * But we don't come here normally, so make
- * it simple and throw away everything.
- */
- mkbc_cleanqueue(q);
- }
-
- isactive = CMD_IN_QUEUE(q);
- TAILQ_INSERT_TAIL(&q->cmdqueue, nc, next);
- if (!isactive)
- mkbc_start(t, slot);
-
- if (q->polling)
- res = (sync ? nc->status : 0);
- else if (sync) {
- if ((res = tsleep_nsec(nc, 0, "kbccmd", SEC_TO_NSEC(1)))) {
- TAILQ_REMOVE(&q->cmdqueue, nc, next);
- mkbc_cleanup(t);
- } else
- res = nc->status;
- } else
- timeout_add_sec(&t->t_cleanup, 1);
-
- if (sync) {
- if (respbuf)
- bcopy(nc->response, respbuf, responselen);
- TAILQ_INSERT_TAIL(&q->freequeue, nc, next);
- }
-
- splx(s);
-
- return (res);
-}
-
-int
-pckbc_poll_data(pckbc_tag_t self, pckbc_slot_t slot)
-{
- struct pckbc_internal *t = self;
- struct pckbc_slotdata *q = t->t_slotdata[slot];
- int c;
-
- c = mkbc_poll_read(t->t_iot, q->ioh);
- if (c != -1 && q && CMD_IN_QUEUE(q)) {
- /* We jumped into a running command - try to deliver the
- response. */
- if (mkbc_cmdresponse(t, slot, c))
- return (-1);
- }
- return (c);
-}
-
-void
-pckbc_set_inputhandler(pckbc_tag_t self, pckbc_slot_t slot, pckbc_inputfcn func,
- void *arg, char *name)
-{
- struct pckbc_internal *t = (struct pckbc_internal *)self;
- struct pckbc_softc *sc = t->t_sc;
-
- if (slot >= PCKBC_NSLOTS)
- panic("mkbc_set_inputhandler: bad slot %d", slot);
-
- sc->inputhandler[slot] = func;
- sc->inputarg[slot] = arg;
- sc->subname[slot] = name;
-
- if (mkbc_console && slot == PCKBC_KBD_SLOT)
- timeout_add_sec(&t->t_poll, 1);
-}
-
-void
-pckbc_slot_enable(pckbc_tag_t self, pckbc_slot_t slot, int on)
-{
- struct pckbc_internal *t = (struct pckbc_internal *)self;
-
- /*
- * Should we also enable/disable the controller??
- * If we did then none of the poll_ functions would work...
- */
-
- if (on) {
-
- /* Enable controller interrupts. */
- bus_space_write_8(t->t_iot, t->t_slotdata[slot]->ioh,
- MKBC_CONTROL,
- MKBC_CONTROL_RX_CLOCK_ENABLE | MKBC_CONTROL_TX_ENABLE
- | MKBC_CONTROL_RX_INT_ENABLE);
-
- } else {
-
- /* Disable controller interrupts. */
- bus_space_write_8(t->t_iot, t->t_slotdata[slot]->ioh,
- MKBC_CONTROL,
- MKBC_CONTROL_RX_CLOCK_ENABLE | MKBC_CONTROL_TX_ENABLE);
-
- }
-
- if (slot == PCKBC_KBD_SLOT) {
- if (on)
- timeout_add_sec(&t->t_poll, 1);
- else
- timeout_del(&t->t_poll);
- }
-}
-
-void
-pckbc_set_poll(pckbc_tag_t self, pckbc_slot_t slot, int on)
-{
- struct pckbc_internal *t = (struct pckbc_internal *)self;
-
- t->t_slotdata[slot]->polling = on;
-
- if (!on) {
- int s;
-
- /*
- * If disabling polling on a device that's been configured,
- * make sure there are no bytes left in the FIFO, holding up
- * the interrupt line. Otherwise we won't get any further
- * interrupts.
- */
- if (t->t_sc) {
- s = spltty();
- mkbcintr(t->t_sc);
- splx(s);
- }
- }
-}
-
-int
-mkbc_cnattach(bus_space_tag_t iot, bus_addr_t addr)
-{
- bus_space_handle_t ioh, slot_ioh;
- int res = 0;
-
- /* Ensure that we're on an O2. */
- if (sys_config.system_type != SGI_O2)
- return (ENXIO);
-
- if (bus_space_map(iot, addr, MKBC_PORTSIZE * 2, 0, &ioh))
- return (ENXIO);
-
- mkbc_consdata.t_addr = addr;
- mkbc_consdata.t_iot = iot;
- mkbc_consdata.t_ioh_d = ioh;
-
- /* Map subregion of bus space for this "slot". */
- if (bus_space_subregion(iot, ioh, 0, MKBC_PORTSIZE, &slot_ioh)) {
- bus_space_unmap(iot, ioh, MKBC_PORTSIZE * 2);
- return (ENXIO);
- }
-
- mkbc_cons_slotdata.ioh = slot_ioh;
- mkbc_init_slotdata(&mkbc_cons_slotdata);
- mkbc_consdata.t_slotdata[PCKBC_KBD_SLOT] = &mkbc_cons_slotdata;
-
- /* Initialise controller. */
- bus_space_write_8(iot, slot_ioh, MKBC_CONTROL,
- MKBC_CONTROL_TX_CLOCK_DISABLE | MKBC_CONTROL_RESET);
- delay(100); /* 100us */
-
- /* Enable controller. */
- bus_space_write_8(iot, slot_ioh, MKBC_CONTROL,
- MKBC_CONTROL_RX_CLOCK_ENABLE | MKBC_CONTROL_TX_ENABLE
- | MKBC_CONTROL_RX_INT_ENABLE);
-
- timeout_set(&mkbc_consdata.t_cleanup, mkbc_cleanup, &mkbc_consdata);
- timeout_set(&mkbc_consdata.t_poll, mkbc_poll, &mkbc_consdata);
-
- /* Flush input buffer. */
- (void) mkbc_poll_read(iot, slot_ioh);
-
- res = pckbd_cnattach(&mkbc_consdata);
-
- if (res) {
- bus_space_unmap(iot, ioh, MKBC_PORTSIZE * 2);
- } else {
- mkbc_console = 1;
- }
-
- return (res);
-}
-
-void
-mkbc_poll(void *self)
-{
- struct pckbc_internal *t = self;
- int s;
-
- s = spltty();
- (void)mkbcintr_internal(t, t->t_sc);
- timeout_add_sec(&t->t_poll, 1);
- splx(s);
-}
+++ /dev/null
-/* $OpenBSD: mkbcreg.h,v 1.3 2010/12/03 18:29:56 shadchin Exp $ */
-
-/*
- * Copyright (c) 2006, 2007, Joel Sing
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <dev/ic/pckbcvar.h>
-
-/*
- * MACE PS/2 controller register definitions.
- */
-
-#define MKBC_PORTSIZE 0x20
-
-#define MKBC_TX_PORT 0x00
-#define MKBC_RX_PORT 0x08
-#define MKBC_CONTROL 0x10
-#define MKBC_STATUS 0x18
-
-/*
- * Controller status flags
- */
-#define MKBC_STATUS_CLOCK_SIGNAL 0x01
-#define MKBC_STATUS_CLOCK_INHIBIT 0x02
-#define MKBC_STATUS_TX_INPROGRESS 0x04
-#define MKBC_STATUS_TX_EMPTY 0x08
-#define MKBC_STATUS_RX_FULL 0x10
-#define MKBC_STATUS_RX_INPROGRESS 0x20
-#define MKBC_STATUS_ERROR_PARITY 0x40
-#define MKBC_STATUS_ERROR_FRAMING 0x80
-
-/*
- * Control bits
- */
-#define MKBC_CONTROL_TX_CLOCK_DISABLE 0x01
-#define MKBC_CONTROL_TX_ENABLE 0x02
-#define MKBC_CONTROL_TX_INT_ENABLE 0x04
-#define MKBC_CONTROL_RX_INT_ENABLE 0x08
-#define MKBC_CONTROL_RX_CLOCK_ENABLE 0x10
-#define MKBC_CONTROL_RESET 0x20
-
-int mkbc_cnattach(bus_space_tag_t, bus_addr_t);
+++ /dev/null
-/* $OpenBSD: owmac.c,v 1.3 2019/01/15 18:33:30 visa Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * DS1981/1982/2502 1-Wire Add-only memory driver, for SGI machines.
- *
- * SGI uses DS1981 (or compatibles) to store the Ethernet address
- * on IOC boards.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-
-#include <dev/onewire/onewiredevs.h>
-#include <dev/onewire/onewirereg.h>
-#include <dev/onewire/onewirevar.h>
-
-#include <sgi/dev/owmem_subr.h>
-#include <sgi/dev/owmacvar.h>
-
-int owmac_match(struct device *, void *, void *);
-void owmac_attach(struct device *, struct device *, void *);
-
-struct cfattach owmac_ca = {
- sizeof(struct owmac_softc), owmac_match, owmac_attach,
-};
-
-struct cfdriver owmac_cd = {
- NULL, "owmac", DV_DULL
-};
-
-#define EEPROM_NPAGES 4
-
-int owmac_read_page(struct owmac_softc *, int, uint8_t *);
-int owmac_read_redirect(struct owmac_softc *);
-
-void owmac_read_mac(struct owmac_softc *);
-
-int
-owmac_match(struct device *parent, void *match, void *aux)
-{
- struct onewire_attach_args *oa = aux;
-
- if (ONEWIRE_ROM_FAMILY_TYPE(oa->oa_rom) == ONEWIRE_FAMILY_DS1982)
- return 1;
-
- /*
- * Also match on UniqueWare devices with specific 0x91 family code.
- */
- if ((ONEWIRE_ROM_SN(oa->oa_rom) >> (48 - 12)) == 0x5e7 &&
- ONEWIRE_ROM_FAMILY_CUSTOM(oa->oa_rom) &&
- ONEWIRE_ROM_FAMILY(oa->oa_rom) == 0x91)
- return 1;
-
- return 0;
-}
-
-void
-owmac_attach(struct device *parent, struct device *self, void *aux)
-{
- struct owmac_softc *sc = (struct owmac_softc *)self;
- struct onewire_attach_args *oa = aux;
-
- sc->sc_onewire = oa->oa_onewire;
- sc->sc_rom = oa->oa_rom;
-
- /*
- * Read the redirection table.
- */
- if (owmac_read_redirect(sc) != 0) {
- printf(": unable to read redirection data\n");
- return;
- }
-
- printf("\n");
-
- /*
- * Read the data.
- */
- owmac_read_mac(sc);
-}
-
-int
-owmac_read_redirect(struct owmac_softc *sc)
-{
- int rc = 0;
- int status_offset;
-
- status_offset = 0x0001; /* 1..4 */
-
- onewire_lock(sc->sc_onewire, 0);
- if ((rc = onewire_reset(sc->sc_onewire)) != 0)
- goto unlock;
-
- onewire_matchrom(sc->sc_onewire, sc->sc_rom);
-
- /*
- * Start reading the EEPROM status block, at the page redirection
- * offset.
- */
- onewire_write_byte(sc->sc_onewire, ONEWIRE_CMD_READ_STATUS);
- onewire_write_byte(sc->sc_onewire, status_offset & 0xff);
- onewire_write_byte(sc->sc_onewire, status_offset >> 8);
- /* XXX should verify this crc value */
- (void)onewire_read_byte(sc->sc_onewire);
-
- onewire_read_block(sc->sc_onewire, &sc->sc_redir, EEPROM_NPAGES);
-
- onewire_reset(sc->sc_onewire);
-unlock:
- onewire_unlock(sc->sc_onewire);
-
- return rc;
-}
-
-int
-owmac_read_page(struct owmac_softc *sc, int page, uint8_t *buf)
-{
- int rc = 0;
- int pg;
-
- /*
- * Follow the redirection information.
- */
- if ((pg = owmem_redirect(sc->sc_redir, EEPROM_NPAGES, page)) < 0)
- return EINVAL;
-
- pg = page * EEPROM_PAGE_SIZE;
-
- onewire_lock(sc->sc_onewire, 0);
- if ((rc = onewire_reset(sc->sc_onewire)) != 0)
- goto unlock;
-
- onewire_matchrom(sc->sc_onewire, sc->sc_rom);
-
- /*
- * Start reading the EEPROM data.
- */
- onewire_write_byte(sc->sc_onewire, ONEWIRE_CMD_READ_MEMORY);
- onewire_write_byte(sc->sc_onewire, pg & 0xff);
- onewire_write_byte(sc->sc_onewire, 0);
- /* XXX should verify this crc value */
- (void)onewire_read_byte(sc->sc_onewire);
-
- onewire_read_block(sc->sc_onewire, buf, EEPROM_PAGE_SIZE);
-
- onewire_reset(sc->sc_onewire);
-unlock:
- onewire_unlock(sc->sc_onewire);
-
- return rc;
-}
-
-void
-owmac_read_mac(struct owmac_softc *sc)
-{
- uint8_t buf[EEPROM_PAGE_SIZE];
-
- if (owmac_read_page(sc, 0, buf) != 0)
- return;
-
- if (buf[0] != 0x0a)
- return;
-
- sc->sc_enaddr[0] = buf[10];
- sc->sc_enaddr[1] = buf[9];
- sc->sc_enaddr[2] = buf[8];
- sc->sc_enaddr[3] = buf[7];
- sc->sc_enaddr[4] = buf[6];
- sc->sc_enaddr[5] = buf[5];
-
- printf("%s: Ethernet Address %02x:%02x:%02x:%02x:%02x:%02x\n",
- sc->sc_dev.dv_xname,
- sc->sc_enaddr[0], sc->sc_enaddr[1], sc->sc_enaddr[2],
- sc->sc_enaddr[3], sc->sc_enaddr[4], sc->sc_enaddr[5]);
-}
+++ /dev/null
-/* $OpenBSD: owmacvar.h,v 1.1 2008/04/07 22:55:57 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * DS1981/1982/2502 1-Wire Add-only memory driver, for SGI machines.
- *
- * SGI uses DS1981 (or compatibles) to store the Ethernet address
- * on IOC boards.
- */
-
-struct owmac_softc {
- struct device sc_dev;
-
- void *sc_onewire;
- uint64_t sc_rom;
-
- uint8_t sc_redir[4]; /* redirection table */
-
- uint8_t sc_enaddr[6];
-};
+++ /dev/null
-/* $OpenBSD: owmem_subr.c,v 1.1 2008/04/07 22:55:57 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Common routines to owmac and owserial drivers.
- */
-
-#include <sys/param.h>
-
-#include <sgi/dev/owmem_subr.h>
-
-int
-owmem_redirect(uint8_t *redir, u_int npages, u_int page)
-{
- int skips = 0;
-
- /*
- * Follow the redirecting table until we end up in our final
- * position. We have to be careful not to loop if the table
- * is wrong.
- */
- while (redir[page] != 0xff) {
- if (++skips >= npages)
- return -1;
- page = 0xff ^ redir[page];
- if (page >= npages)
- return -1;
- }
-
- return page;
-}
+++ /dev/null
-/* $OpenBSD: owmem_subr.h,v 1.1 2008/04/07 22:55:57 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Common routines to owmac and owserial drivers.
- */
-
-#define EEPROM_PAGE_SIZE (256 / NBBY) /* 256 bits per page */
-
-int owmem_redirect(uint8_t *, u_int, u_int);
+++ /dev/null
-/* $OpenBSD: owserial.c,v 1.2 2009/04/19 18:33:53 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * DS2505 1-Wire Add-only memory driver, for SGI machines.
- *
- * SGI seems to use DS2505 (or compatibles) to store serial numbers.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-
-#include <dev/onewire/onewiredevs.h>
-#include <dev/onewire/onewirereg.h>
-#include <dev/onewire/onewirevar.h>
-
-#include <sgi/dev/owmem_subr.h>
-#include <sgi/dev/owserialvar.h>
-
-int owserial_match(struct device *, void *, void *);
-void owserial_attach(struct device *, struct device *, void *);
-
-struct cfattach owserial_ca = {
- sizeof(struct owserial_softc), owserial_match, owserial_attach,
-};
-
-struct cfdriver owserial_cd = {
- NULL, "owserial", DV_DULL
-};
-
-#define EEPROM_PAGE_SIZE (256 / NBBY) /* 256 bits per page */
-
-static const struct onewire_matchfam owserial_fams[] = {
- { ONEWIRE_FAMILY_DS2505 },
- { ONEWIRE_FAMILY_DS2506 }
-};
-
-int owserial_read_page(struct owserial_softc *, int, uint8_t *);
-int owserial_read_redirect(struct owserial_softc *);
-
-void owserial_read_serial(struct owserial_softc *);
-
-int
-owserial_match(struct device *parent, void *match, void *aux)
-{
- return (onewire_matchbyfam(aux, owserial_fams,
- sizeof(owserial_fams) /sizeof(owserial_fams[0])));
-}
-
-void
-owserial_attach(struct device *parent, struct device *self, void *aux)
-{
- struct owserial_softc *sc = (struct owserial_softc *)self;
- struct onewire_attach_args *oa = aux;
-
- sc->sc_onewire = oa->oa_onewire;
- sc->sc_rom = oa->oa_rom;
-
- /*
- * Decide how many pages of 256 bits we have.
- */
-
- if (ONEWIRE_ROM_FAMILY_TYPE(sc->sc_rom) == ONEWIRE_FAMILY_DS2506)
- sc->sc_npages = 256;
- else
- sc->sc_npages = 64;
-
- /*
- * Read the redirection table.
- */
- if (owserial_read_redirect(sc) != 0) {
- printf(": unable to read redirection data\n");
- return;
- }
-
- printf("\n");
-
- /*
- * Read the data.
- */
- owserial_read_serial(sc);
-}
-
-int
-owserial_read_redirect(struct owserial_softc *sc)
-{
- int rc = 0;
- int status_offset, pos;
-
- status_offset = 0x0100; /* 100..13f or 100..1ff */
- pos = 0;
-
- onewire_lock(sc->sc_onewire, 0);
- if ((rc = onewire_reset(sc->sc_onewire)) != 0)
- goto unlock;
-
- onewire_matchrom(sc->sc_onewire, sc->sc_rom);
-
- /*
- * Start reading the EEPROM status block, at the page redirection
- * offset.
- */
- onewire_write_byte(sc->sc_onewire, ONEWIRE_CMD_READ_STATUS);
- onewire_write_byte(sc->sc_onewire, status_offset & 0xff);
- onewire_write_byte(sc->sc_onewire, status_offset >> 8);
-
- for (pos = 0; pos < sc->sc_npages; pos += 8) {
- onewire_read_block(sc->sc_onewire, sc->sc_redir + pos, 8);
- /* XXX check crc */
- (void)onewire_read_byte(sc->sc_onewire);
- (void)onewire_read_byte(sc->sc_onewire);
- }
-
- onewire_reset(sc->sc_onewire);
-unlock:
- onewire_unlock(sc->sc_onewire);
-
- return rc;
-}
-
-int
-owserial_read_page(struct owserial_softc *sc, int page, uint8_t *buf)
-{
- int rc = 0;
- int pg;
-
- /*
- * Follow the redirection information.
- */
- if ((pg = owmem_redirect(sc->sc_redir, sc->sc_npages, page)) < 0)
- return EINVAL;
-
- pg = page * EEPROM_PAGE_SIZE;
-
- onewire_lock(sc->sc_onewire, 0);
- if ((rc = onewire_reset(sc->sc_onewire)) != 0)
- goto unlock;
-
- onewire_matchrom(sc->sc_onewire, sc->sc_rom);
-
- /*
- * Start reading the EEPROM data.
- */
- onewire_write_byte(sc->sc_onewire, ONEWIRE_CMD_READ_MEMORY);
- onewire_write_byte(sc->sc_onewire, pg & 0xff);
- onewire_write_byte(sc->sc_onewire, pg >> 8);
-
- onewire_read_block(sc->sc_onewire, buf, EEPROM_PAGE_SIZE);
-
- onewire_reset(sc->sc_onewire);
-unlock:
- onewire_unlock(sc->sc_onewire);
-
- return rc;
-}
-
-void
-owserial_read_serial(struct owserial_softc *sc)
-{
- uint8_t buf[EEPROM_PAGE_SIZE * 2];
- char name[1 + OWSERIAL_NAME_LEN];
- char product[1 + OWSERIAL_PRODUCT_LEN];
- char serial[1 + OWSERIAL_SERIAL_LEN];
- char *s, *e;
- int pg;
- int i;
-
- pg = owmem_redirect(sc->sc_redir, sc->sc_npages, 0);
- if (pg < 0 || owserial_read_page(sc, pg, buf) != 0)
- return;
-
- pg = owmem_redirect(sc->sc_redir, sc->sc_npages, 1);
- if (pg < 0 || owserial_read_page(sc, pg, buf + EEPROM_PAGE_SIZE) != 0)
- return;
-
- /* minimal sanity check */
- if (buf[0] != 0x01)
- return;
- for (i = EEPROM_PAGE_SIZE + 10; i < EEPROM_PAGE_SIZE + 16; i++)
- if (buf[i] != 0xff)
- return;
-
- bcopy(buf + 21, product, 9);
- bcopy(buf + EEPROM_PAGE_SIZE + 3, product + 9, 3);
- product[OWSERIAL_PRODUCT_LEN] = '\0';
- for (i = 0; i < OWSERIAL_PRODUCT_LEN; i++)
- if (product[i] != '-' && (product[i] < '0' || product[i] > '9'))
- return;
-
- bcopy(buf + EEPROM_PAGE_SIZE + 16, name, OWSERIAL_NAME_LEN);
- name[OWSERIAL_NAME_LEN] = '\0';
- for (i = 0; i < OWSERIAL_NAME_LEN; i++)
- if (name[i] < ' ' || name[i] > '~')
- return;
-
- bcopy(buf + 1, serial, OWSERIAL_SERIAL_LEN);
- serial[OWSERIAL_SERIAL_LEN] = '\0';
- for (i = 0; i < OWSERIAL_SERIAL_LEN; i++)
- if (serial[i] < ' ' || serial[i] > '~')
- return;
-
- /*
- * Trim leading and trailing spaces from name and serial #
- */
-
- strlcpy(sc->sc_product, product, sizeof sc->sc_product);
-
- s = name;
- while (*s == ' ')
- s++;
- e = name + OWSERIAL_NAME_LEN - 1;
- while (*e == ' ' && e >= s)
- *e-- = '\0';
- strlcpy(sc->sc_name, s, sizeof sc->sc_name);
-
- s = serial;
- while (*s == ' ')
- s++;
- e = serial + OWSERIAL_SERIAL_LEN - 1;
- while (*e == ' ' && e >= s)
- *e-- = '\0';
- strlcpy(sc->sc_serial, s, sizeof sc->sc_serial);
-
- printf("%s: \"%s\" p/n %s, serial %s\n",
- sc->sc_dev.dv_xname, sc->sc_name, sc->sc_product, sc->sc_serial);
-}
+++ /dev/null
-/* $OpenBSD: owserialvar.h,v 1.2 2009/04/19 18:33:53 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * DS2505 1-Wire Add-only memory driver, for SGI machines.
- *
- * SGI seems to use DS2505 (or compatibles) to store serial numbers.
- */
-
-#define OWSERIAL_NAME_LEN 14
-#define OWSERIAL_PRODUCT_LEN 12
-#define OWSERIAL_SERIAL_LEN 20
-
-struct owserial_softc {
- struct device sc_dev;
-
- void *sc_onewire;
- uint64_t sc_rom;
-
- int sc_npages; /* number of pages */
- uint8_t sc_redir[256]; /* redirection table */
-
- char sc_name[1 + OWSERIAL_NAME_LEN];
- char sc_product[1 + OWSERIAL_PRODUCT_LEN];
- char sc_serial[1 + OWSERIAL_SERIAL_LEN];
-};
+++ /dev/null
-/* $OpenBSD: power.c,v 1.16 2018/12/03 13:46:30 visa Exp $ */
-
-/*
- * Copyright (c) 2007 Jasper Lievisse Adriaanse <jasper@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/proc.h>
-#include <sys/signalvar.h>
-
-#include <machine/autoconf.h>
-#include <mips64/archtype.h>
-
-#include <dev/ic/ds1687reg.h>
-#include <sgi/dev/dsrtcvar.h>
-
-#include "power.h"
-
-/*
- * Power button driver for the SGI O2 and Octane.
- */
-
-int power_intr(void *);
-
-struct cfdriver power_cd = {
- NULL, "power", DV_DULL
-};
-
-#if NPOWER_MACEBUS > 0
-
-#include <sgi/localbus/macebusvar.h>
-
-void power_macebus_attach(struct device *, struct device *, void *);
-int power_macebus_match(struct device *, void *, void *);
-
-struct cfattach power_macebus_ca = {
- sizeof(struct device), power_macebus_match, power_macebus_attach
-};
-
-int
-power_macebus_match(struct device *parent, void *match, void *aux)
-{
- return (1);
-}
-
-void
-power_macebus_attach(struct device *parent, struct device *self, void *aux)
-{
- struct macebus_attach_args *maa = aux;
-
- /* Establish interrupt handler. */
- if (macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
- IPL_TTY, power_intr, self, self->dv_xname))
- printf("\n");
- else
- printf(": unable to establish interrupt!\n");
-}
-
-#endif
-
-#if NPOWER_MAINBUS > 0
-
-#include <sgi/xbow/xbow.h>
-#include <sgi/xbow/xheartreg.h>
-
-void power_mainbus_attach(struct device *, struct device *, void *);
-int power_mainbus_match(struct device *, void *, void *);
-int power_mainbus_intr(void *);
-
-struct cfattach power_mainbus_ca = {
- sizeof(struct device), power_mainbus_match, power_mainbus_attach
-};
-
-int
-power_mainbus_match(struct device *parent, void *match, void *aux)
-{
- struct mainbus_attach_args *maa = aux;
-
- if (strcmp(maa->maa_name, power_cd.cd_name) != 0)
- return 0;
-
- return sys_config.system_type == SGI_OCTANE ? 1 : 0;
-}
-
-void
-power_mainbus_attach(struct device *parent, struct device *self, void *aux)
-{
- /* Establish interrupt handler. */
- if (xbow_intr_establish(power_mainbus_intr, self, HEART_ISR_POWER,
- IPL_TTY, self->dv_xname, NULL) != 0) {
- printf(": unable to establish interrupt!\n");
- return;
- }
-
- printf("\n");
-}
-
-int
-power_mainbus_intr(void *v)
-{
- /*
- * Clear interrupt condition; debouncing the kickstart bit will not
- * suffice.
- */
- xbow_intr_clear(HEART_ISR_POWER);
-
- return power_intr(v);
-}
-
-#endif
-
-int
-power_intr(void *unused)
-{
- extern int allowpowerdown;
- int val;
-
- /*
- * Prevent further interrupts by clearing the kickstart flag
- * in the DS1687's extended control register.
- */
- val = dsrtc_register_read(DS1687_EXT_CTRL);
- if (val == -1)
- return 1; /* no rtc attached */
-
- /* debounce condition */
- dsrtc_register_write(DS1687_EXT_CTRL, val & ~DS1687_KICKSTART);
-
- if (allowpowerdown == 1) {
- allowpowerdown = 0;
- prsignal(initprocess, SIGUSR2);
- }
-
- return 1;
-}
+++ /dev/null
-/* $OpenBSD: spdmem_mainbus.c,v 1.3 2015/09/08 10:21:50 deraadt Exp $ */
-
-/*
- * Copyright (c) 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Display SPD memory information obtained from an IP35 brick L1 controller.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <dev/spdmemvar.h>
-
-#include <mips64/archtype.h>
-
-#include <machine/autoconf.h>
-
-#include <sgi/sgi/l1.h>
-
-struct spdmem_mainbus_softc {
- struct spdmem_softc sc_base;
- uint8_t *sc_spd;
- size_t sc_spdlen;
-};
-
-int spdmem_mainbus_match(struct device *, void *, void *);
-void spdmem_mainbus_attach(struct device *, struct device *, void *);
-uint8_t spdmem_mainbus_read(struct spdmem_softc *, uint8_t);
-
-struct cfattach spdmem_mainbus_ca = {
- sizeof(struct spdmem_mainbus_softc),
- spdmem_mainbus_match, spdmem_mainbus_attach
-};
-
-int
-spdmem_mainbus_match(struct device *parent, void *vcf, void *aux)
-{
- struct spdmem_attach_args *saa = (struct spdmem_attach_args *)aux;
- extern struct cfdriver spdmem_cd;
- int rc;
- uint8_t *spd;
- size_t spdlen;
-
- if (sys_config.system_type != SGI_IP35)
- return 0;
-
- if (strcmp(saa->maa.maa_name, spdmem_cd.cd_name) != 0)
- return 0;
-
- rc = l1_get_brick_spd_record(saa->maa.maa_nasid, saa->dimm,
- &spd, &spdlen);
- if (rc == 0) {
- free(spd, M_DEVBUF, spdlen);
- return 1;
- } else
- return 0;
-}
-
-void
-spdmem_mainbus_attach(struct device *parent, struct device *self, void *aux)
-{
- struct spdmem_mainbus_softc *sc = (struct spdmem_mainbus_softc *)self;
- struct spdmem_attach_args *saa = (struct spdmem_attach_args *)aux;
- int rc;
-
- printf(" dimm %d:", saa->dimm);
-
- rc = l1_get_brick_spd_record(saa->maa.maa_nasid, saa->dimm,
- &sc->sc_spd, &sc->sc_spdlen);
- if (rc != 0) {
- printf(" can't get SPD record from L1, error %d\n", rc);
- return;
- }
-
- sc->sc_base.sc_read = spdmem_mainbus_read;
- spdmem_attach_common(&sc->sc_base);
- /* free record, as it won't be accessed anymore */
- free(sc->sc_spd, M_DEVBUF, sc->sc_spdlen);
- sc->sc_spdlen = 0;
-}
-
-uint8_t
-spdmem_mainbus_read(struct spdmem_softc *v, uint8_t reg)
-{
- struct spdmem_mainbus_softc *sc = (struct spdmem_mainbus_softc *)v;
-
- if (reg < sc->sc_spdlen)
- return sc->sc_spd[reg];
- else
- return 0;
-}
+++ /dev/null
-# $OpenBSD: Makefile,v 1.1 2012/03/28 20:44:23 miod Exp $
-# $NetBSD: Makefile.giodevs,v 1.5 2008/10/19 22:05:21 apb Exp $
-
-AWK= awk
-
-giodevs.h giodevs_data.h: giodevs devlist2h.awk
- /bin/rm -f giodevs.h giodevs_data.h
- ${AWK} -f devlist2h.awk giodevs
+++ /dev/null
-#! /usr/bin/awk -f
-# $OpenBSD: devlist2h.awk,v 1.2 2012/04/18 17:18:10 miod Exp $
-# $NetBSD: devlist2h.awk,v 1.5 2008/05/02 18:11:05 martin Exp $
-#
-# Copyright (c) 1998 The NetBSD Foundation, Inc.
-# All rights reserved.
-#
-# This code is derived from software contributed to The NetBSD Foundation
-# by Christos Zoulas.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
-# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-# Copyright (c) 1995, 1996 Christopher G. Demetriou
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. All advertising materials mentioning features or use of this software
-# must display the following acknowledgement:
-# This product includes software developed by Christopher G. Demetriou.
-# This product includes software developed by Christos Zoulas
-# 4. The name of the author(s) may not be used to endorse or promote products
-# derived from this software without specific prior written permission
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-function collectline(_f, _line) {
- _oparen = 0
- _line = ""
- while (_f <= NF) {
- if ($_f == "#") {
- _line = _line "("
- _oparen = 1
- _f++
- continue
- }
- if (_oparen) {
- _line = _line $_f
- if (_f < NF)
- _line = _line " "
- _f++
- continue
- }
- _line = _line $_f
- if (_f < NF)
- _line = _line " "
- _f++
- }
- if (_oparen)
- _line = _line ")"
- return _line
-}
-BEGIN {
- nproducts = nvendors = blanklines = 0
- dfile="giodevs_data.h"
- hfile="giodevs.h"
- line=""
-}
-NR == 1 {
- VERSION = $0
- gsub("\\$", "", VERSION)
-
- printf("/*\n") > hfile
- printf(" * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n") \
- > hfile
- printf(" *\n") > hfile
- printf(" * generated from:\n") > hfile
- printf(" *\t%s\n", VERSION) > hfile
- printf(" */\n\n") > hfile
-
- printf("/*\n") > dfile
- printf(" * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n") \
- > dfile
- printf(" *\n") > dfile
- printf(" * generated from:\n") > dfile
- printf(" *\t%s\n", VERSION) > dfile
- printf(" */\n\n") > dfile
-
- next
-}
-NF > 0 && $1 == "product" {
- nproducts++
-
- products[nproducts, 1] = $2;
- products[nproducts, 2] = $3
- products[nproducts, 3] = collectline(4, line)
-
- next
-}
-{
- if ($0 == "")
- blanklines++
- if (blanklines < 2)
- print $0 > dfile
-}
-END {
- # print out the match tables
-
- printf("\n") > dfile
-
- printf("struct gio_knowndev {\n") > dfile
- printf("\tint productid;\n") > dfile
- printf("\tconst char *product;\n") > dfile
- printf("};\n") > dfile
- printf("\nstruct gio_knowndev gio_knowndevs[] = {\n") > dfile
-
- printf("\n") > hfile
- for (i = 1; i <= nproducts; i++) {
- printf("#define GIO_PRODUCT_%s\t%s\t/* %s */\n",
- products[i, 1], products[i,2], products[i, 3]) > hfile
-
- printf("\t{ GIO_PRODUCT_%s, \"%s\" },\n",
- products[i, 1], products[i, 3]) > dfile
- }
- printf("\t{ 0, NULL }\n") > dfile
- printf("};\n") > dfile
- close(dfile)
- close(hfile)
-}
+++ /dev/null
-# $OpenBSD: files.gio,v 1.4 2012/05/10 21:30:09 miod Exp $
-# $NetBSD: files.gio,v 1.11 2009/02/12 06:33:57 rumble Exp $
-
-device gio {[slot = -1], [addr = -1]}
-attach gio at giobus
-
-file arch/sgi/gio/gio.c gio needs-flag
-
-device hpc {[offset = -1]}: smc93cx6
-attach hpc at gio
-file arch/sgi/hpc/hpc.c hpc
-
-# XL graphics
-device newport: wsemuldisplaydev, rasops8
-attach newport at gio
-file arch/sgi/gio/newport.c newport needs-flag
-
-# GR2 graphics
-device grtwo: wsemuldisplaydev, rasops8
-attach grtwo at gio
-file arch/sgi/gio/grtwo.c grtwo needs-flag
-
-# LG1/LG2 graphics
-device light: wsemuldisplaydev, rasops8
-attach light at gio
-file arch/sgi/gio/light.c light needs-flag
-
-# Impact graphics
-attach impact at gio with impact_gio
-file arch/sgi/gio/impact_gio.c impact_gio
-
-# PCI cards glued to the GIO bus
-device giopci: pcibus
-attach giopci at gio
-file arch/sgi/gio/pci_gio.c giopci
+++ /dev/null
-/* $OpenBSD: gio.c,v 1.19 2021/03/11 11:17:00 jsg Exp $ */
-/* $NetBSD: gio.c,v 1.32 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2000 Soren S. Jorvang
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-
-#include <mips64/archtype.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giovar.h>
-#include <sgi/gio/giodevs.h>
-#include <sgi/gio/giodevs_data.h>
-
-#include <sgi/gio/grtworeg.h>
-#include <sgi/gio/lightreg.h>
-#include <sgi/gio/newportreg.h>
-
-#include <sgi/localbus/imcvar.h>
-#include <sgi/localbus/intreg.h>
-#include <sgi/localbus/intvar.h>
-#include <sgi/sgi/ip22.h>
-
-#include "grtwo.h"
-#include "impact.h"
-#include "light.h"
-#include "newport.h"
-
-#if NGRTWO > 0
-#include <sgi/gio/grtwovar.h>
-#endif
-#if NIMPACT_GIO > 0
-#include <sgi/dev/impactvar.h>
-#endif
-#if NLIGHT > 0
-#include <sgi/gio/lightvar.h>
-#endif
-#if NNEWPORT > 0
-#include <sgi/gio/newportvar.h>
-#endif
-
-int gio_match(struct device *, void *, void *);
-void gio_attach(struct device *, struct device *, void *);
-int gio_print(void *, const char *);
-int gio_print_fb(void *, const char *);
-int gio_search(struct device *, void *, void *);
-int gio_submatch(struct device *, void *, void *);
-uint32_t gio_id(vaddr_t, paddr_t, int);
-int gio_is_framebuffer_id(uint32_t);
-
-struct gio_softc {
- struct device sc_dev;
-
- bus_space_tag_t sc_iot;
- bus_dma_tag_t sc_dmat;
-};
-
-const struct cfattach gio_ca = {
- sizeof(struct gio_softc), gio_match, gio_attach
-};
-
-struct cfdriver gio_cd = {
- NULL, "gio", DV_DULL
-};
-
-/* Address of the console frame buffer registers, if applicable */
-paddr_t giofb_consaddr;
-/* Id of the console frame buffer */
-uint32_t giofb_consid;
-/* Names of the frame buffers, as obtained by ARCBios */
-const char *giofb_names[GIO_MAX_FB];
-
-struct gio_probe {
- uint32_t slot;
- uint64_t base;
- uint32_t mach_type;
- uint32_t mach_subtype;
-};
-
-/*
- * Expansion Slot Base Addresses
- *
- * IP20 and IP24 have two GIO connectors: GIO_SLOT_EXP0 and
- * GIO_SLOT_EXP1.
- *
- * On IP24 these slots exist on the graphics board or the IOPLUS
- * "mezzanine" on Indy and Challenge S, respectively. The IOPLUS or
- * graphics board connects to the mainboard via a single GIO64 connector.
- *
- * IP22 has either three or four physical connectors, but only two
- * electrically distinct slots: GIO_SLOT_GFX and GIO_SLOT_EXP0.
- *
- * It should also be noted that DMA is (mostly) not supported in Challenge S's
- * GIO_SLOT_EXP1. See gio(4) for the story.
- */
-static const struct gio_probe slot_bases[] = {
- /* GFX is only a slot on Indigo 2 */
- { GIO_SLOT_GFX, GIO_ADDR_GFX, SGI_IP22, IP22_INDIGO2 },
-
- /* EXP0 is available on all systems */
- { GIO_SLOT_EXP0, GIO_ADDR_EXP0, SGI_IP20, -1 },
- { GIO_SLOT_EXP0, GIO_ADDR_EXP0, SGI_IP22, -1 },
-
- /* EXP1 does not exist on Indigo 2 */
- { GIO_SLOT_EXP1, GIO_ADDR_EXP1, SGI_IP20, -1 },
- { GIO_SLOT_EXP1, GIO_ADDR_EXP1, SGI_IP22, IP22_INDY },
- { GIO_SLOT_EXP1, GIO_ADDR_EXP1, SGI_IP22, IP22_CHALLS },
-
- { 0, 0, 0, 0 }
-};
-
-/*
- * Graphic Board Base Addresses
- *
- * Graphics boards are not treated like expansion slot cards. Their base
- * addresses do not necessarily correspond to GIO slot addresses and they
- * do not contain product identification words.
- *
- * This list needs to be sorted in address order, to match the descriptions
- * obtained from ARCBios.
- */
-static const struct gio_probe gfx_bases[] = {
- { -1, GIO_ADDR_GFX, SGI_IP20, -1 },
- { -1, GIO_ADDR_GFX, SGI_IP22, -1 },
-
- /* IP20 LG1/LG2 */
- { -1, GIO_ADDR_GFX + 0x003f0000, SGI_IP20, -1 },
- { -1, GIO_ADDR_GFX + 0x003f8000, SGI_IP20, -1 }, /* second head */
-
- { -1, GIO_ADDR_EXP0, SGI_IP22, -1 },
- { -1, GIO_ADDR_EXP1, SGI_IP22, -1 },
-
- { 0, 0, 0, 0 }
-};
-
-int
-gio_match(struct device *parent, void *match, void *aux)
-{
- struct imc_attach_args *iaa = aux;
-
- if (strcmp(iaa->iaa_name, gio_cd.cd_name) != 0)
- return 0;
-
- return 1;
-}
-
-void
-gio_attach(struct device *parent, struct device *self, void *aux)
-{
- struct gio_softc *sc = (struct gio_softc *)self;
- struct imc_attach_args *iaa = (struct imc_attach_args *)aux;
- struct gio_attach_args ga;
- uint32_t gfx[GIO_MAX_FB], id;
- uint i, j, ngfx;
- int sys_type;
-
- printf("\n");
-
- sc->sc_iot = iaa->iaa_st;
- sc->sc_dmat = iaa->iaa_dmat;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- sys_type = SGI_IP20;
- break;
- default:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- sys_type = SGI_IP22;
- break;
- }
-
- ngfx = 0;
- memset(gfx, 0, sizeof(gfx));
-
- /*
- * Try and attach graphics devices first.
- * Unfortunately, they - not being GIO devices after all (except for
- * Impact) - do not contain a Product Identification Word, nor have
- * a slot number.
- *
- * Record addresses to which graphics devices attach so that
- * we do not confuse them with expansion slots, should the
- * addresses coincide.
- *
- * If only the ARCBios component tree would be so kind as to give
- * us the address of the frame buffer components...
- */
- if (sys_type != SGI_IP22 ||
- sys_config.system_subtype != IP22_CHALLS) {
- for (i = 0; gfx_bases[i].base != 0; i++) {
- /* skip slots that don't apply to us */
- if (gfx_bases[i].mach_type != sys_type)
- continue;
-
- if (gfx_bases[i].mach_subtype != -1 &&
- gfx_bases[i].mach_subtype !=
- sys_config.system_subtype)
- continue;
-
- ga.ga_addr = gfx_bases[i].base;
- ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC);
-
- /* no need to probe a glass console again */
- if (ga.ga_addr == giofb_consaddr && giofb_consid != 0)
- id = giofb_consid;
- else {
- id = gio_id(ga.ga_ioh, ga.ga_addr, 1);
- if (!gio_is_framebuffer_id(id))
- continue;
- }
-
- ga.ga_iot = sc->sc_iot;
- ga.ga_dmat = sc->sc_dmat;
- ga.ga_slot = -1;
- ga.ga_product = id;
- /*
- * Note that this relies upon ARCBios listing frame
- * buffers in ascending address order, which seems
- * to be the case so far on multihead Indigo2 systems.
- */
- if (ngfx < GIO_MAX_FB)
- ga.ga_descr = giofb_names[ngfx];
- else
- ga.ga_descr = NULL; /* shouldn't happen */
-
- if (config_found_sm(self, &ga, gio_print_fb,
- gio_submatch))
- gfx[ngfx] = gfx_bases[i].base;
-
- ngfx++;
- }
- }
-
- /*
- * Now attach any GIO expansion cards.
- *
- * Be sure to skip any addresses to which a graphics device has
- * already been attached.
- */
- for (i = 0; slot_bases[i].base != 0; i++) {
- int skip = 0;
-
- /* skip slots that don't apply to us */
- if (slot_bases[i].mach_type != sys_type)
- continue;
-
- if (slot_bases[i].mach_subtype != -1 &&
- slot_bases[i].mach_subtype != sys_config.system_subtype)
- continue;
-
- for (j = 0; j < ngfx; j++) {
- if (slot_bases[i].base == gfx[j]) {
- skip = 1;
- break;
- }
- }
- if (skip)
- continue;
-
- ga.ga_addr = slot_bases[i].base;
- ga.ga_iot = sc->sc_iot;
- ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC);
-
- id = gio_id(ga.ga_ioh, ga.ga_addr, 0);
- if (id == 0)
- continue;
-
- ga.ga_dmat = sc->sc_dmat;
- ga.ga_slot = slot_bases[i].slot;
- ga.ga_product = id;
- ga.ga_descr = NULL;
-
- config_found_sm(self, &ga, gio_print, gio_submatch);
- }
-
- config_search(gio_search, self, aux);
-}
-
-/*
- * Try and figure out whether there is a device at the given slot address.
- */
-uint32_t
-gio_id(vaddr_t va, paddr_t pa, int maybe_gfx)
-{
- uint32_t id32, mystery;
- uint16_t id16 = 0;
- uint8_t id8 = 0;
-
- /*
- * First, attempt to read the address with various sizes.
- *
- * - GIO32 devices will only support reads from 32-bit aligned
- * addresses, in all sizes (at least for the ID register).
- * - frame buffers will support aligned reads from any size at
- * any address, but will actually return the access width if
- * the slot is pipelined.
- */
-
- if (guarded_read_4(va, &id32) != 0)
- return 0;
-
- /*
- * If the address doesn't match a base slot address, then we are
- * only probing for a light(4) frame buffer.
- */
-
- if (pa != GIO_ADDR_GFX && pa != GIO_ADDR_EXP0 && pa != GIO_ADDR_EXP1) {
- if (maybe_gfx == 0)
- return 0;
- else {
- if (pa == LIGHT_ADDR_0 || pa == LIGHT_ADDR_1) {
- if (guarded_read_4(va + REX_PAGE1_SET +
- REX_P1REG_XYOFFSET, &id32) != 0)
- return 0;
- if (id32 == 0x08000800)
- return GIO_PRODUCT_FAKEID_LIGHT;
- }
- return 0;
- }
- }
-
- /*
- * GIO32 devices with a 32-bit ID register will not necessarily
- * answer to addresses not aligned on 32 bit boundaries.
- */
-
- if (guarded_read_2(va | 2, &id16) != 0 ||
- guarded_read_1(va | 3, &id8) != 0) {
- if (GIO_PRODUCT_32BIT_ID(id32))
- return id32;
- else /* not a frame buffer anyway */
- return GIO_PRODUCT_PRODUCTID(id32);
- }
-
- /*
- * Of course, GIO32 devices with a 8-bit ID register can use the
- * other bytes in the first 32-bit word for other purposes.
- */
-
- if ((id32 & 0xffff) == id16 && (id32 & 0xff) == id8) {
- if (GIO_PRODUCT_32BIT_ID(id32))
- return id32;
- else if (!GIO_PRODUCT_32BIT_ID(id8) && id8 != 0x00)
- return /*GIO_PRODUCT_PRODUCTID*/(id8);
- }
-
- /*
- * If there is a frame buffer device, then either we have hit a
- * device register (grtwo), or we did not fault because the slot
- * is pipelined (newport).
- * In the latter case, we attempt to probe a known register offset.
- */
-
- if (maybe_gfx) {
- /*
- * On (at least) Indy systems with newport graphics, the
- * presence of a SCSI Expansion board (030-8133) in either
- * slot will cause extra bits to be set in the topmost byte
- * of the 32-bit access to the pipelined slot (i.e. the
- * value of id32 is 0x18000004, not 0x00000004).
- *
- * This would prevent newport from being recognized
- * properly.
- *
- * This behaviour seems to be specific to the SCSI board,
- * since the E++ board does not trigger it. This would
- * rule out an HPC1.x-specific cause.
- *
- * We work around this by ignoring the topmost byte of id32
- * from this point on, but it's ugly and isaish...
- *
- * Note that this is not necessary on Indigo 2 since this
- * troublesome board can not be installed on such a system.
- * Indigo are probably safe from this issues, for they can't
- * use newport graphics; but the issue at hand might be
- * HPC 1.x related, so better play safe.
- */
- if (sys_config.system_type == SGI_IP20 ||
- (sys_config.system_type == SGI_IP22 &&
- sys_config.system_subtype != IP22_INDIGO2))
- id32 &= ~0xff000000;
-
- if (id32 != 4 || id16 != 2 || id8 != 1) {
- if (guarded_read_4(va + HQ2_MYSTERY, &mystery) == 0 &&
- mystery == HQ2_MYSTERY_VALUE)
- return GIO_PRODUCT_FAKEID_GRTWO;
- else
- return 0;
- }
-
- /* could be newport(4) */
- if (pa == GIO_ADDR_GFX || pa == GIO_ADDR_EXP0) {
- va += NEWPORT_REX3_OFFSET;
- if (guarded_read_4(va, &id32) == 0 &&
- guarded_read_2(va | 2, &id16) == 0 &&
- guarded_read_1(va | 3, &id8) == 0) {
- if (id32 != 4 || id16 != 2 || id8 != 1)
- return GIO_PRODUCT_FAKEID_NEWPORT;
- }
- }
-
- return 0;
- }
-
- return 0;
-}
-
-int
-gio_print(void *aux, const char *pnp)
-{
- struct gio_attach_args *ga = aux;
- const char *descr;
- int product, revision;
- uint i;
-
- product = GIO_PRODUCT_PRODUCTID(ga->ga_product);
- if (GIO_PRODUCT_32BIT_ID(ga->ga_product))
- revision = GIO_PRODUCT_REVISION(ga->ga_product);
- else
- revision = 0;
-
- descr = "unknown GIO card";
- for (i = 0; gio_knowndevs[i].productid != 0; i++) {
- if (gio_knowndevs[i].productid == product) {
- descr = gio_knowndevs[i].product;
- break;
- }
- }
-
- if (pnp != NULL) {
- printf("%s", descr);
- if (ga->ga_product != -1)
- printf(" (product 0x%02x revision 0x%02x)",
- product, revision);
- printf(" at %s", pnp);
- }
-
- if (ga->ga_slot != -1)
- printf(" slot %d", ga->ga_slot);
- printf(" addr 0x%llx", ga->ga_addr);
-
- return UNCONF;
-}
-
-int
-gio_print_fb(void *aux, const char *pnp)
-{
- struct gio_attach_args *ga = aux;
- const char *fbname;
-
- if (pnp != NULL) {
- switch (ga->ga_product) {
- case GIO_PRODUCT_FAKEID_GRTWO:
- fbname = "grtwo";
- break;
- case GIO_PRODUCT_FAKEID_LIGHT:
- fbname = "light";
- break;
- case GIO_PRODUCT_FAKEID_NEWPORT:
- fbname = "newport";
- break;
- default:
- if (GIO_PRODUCT_32BIT_ID(ga->ga_product) &&
- GIO_PRODUCT_PRODUCTID(ga->ga_product) ==
- GIO_PRODUCT_IMPACT)
- fbname = "impact";
- else /* should never happen */
- fbname = "framebuffer";
- break;
- }
- printf("%s at %s", fbname, pnp);
- }
-
- printf(" addr 0x%llx", ga->ga_addr);
-
- return UNCONF;
-}
-
-int
-gio_search(struct device *parent, void *vcf, void *aux)
-{
- struct gio_softc *sc = (struct gio_softc *)parent;
- struct cfdata *cf = (struct cfdata *)vcf;
- struct gio_attach_args ga;
-
- /* Handled by direct configuration, so skip here */
- if (cf->cf_loc[1 /*GIOCF_ADDR*/] == -1)
- return 0;
-
- ga.ga_addr = (uint64_t)cf->cf_loc[1 /*GIOCF_ADDR*/];
- ga.ga_iot = sc->sc_iot;
- ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC);
- ga.ga_dmat = sc->sc_dmat;
- ga.ga_slot = cf->cf_loc[0 /*GIOCF_SLOT*/];
- ga.ga_product = -1;
- ga.ga_descr = NULL;
-
- if ((*cf->cf_attach->ca_match)(parent, cf, &ga) == 0)
- return 0;
-
- config_attach(parent, cf, &ga, gio_print);
-
- return 1;
-}
-
-int
-gio_submatch(struct device *parent, void *vcf, void *aux)
-{
- struct cfdata *cf = (struct cfdata *)vcf;
- struct gio_attach_args *ga = (struct gio_attach_args *)aux;
-
- if (cf->cf_loc[0 /*GIOCF_SLOT*/] != -1 &&
- cf->cf_loc[0 /*GIOCF_SLOT*/] != ga->ga_slot)
- return 0;
-
- if (cf->cf_loc[1 /*GIOCF_ADDR*/] != -1 &&
- (uint64_t)cf->cf_loc[1 /*GIOCF_ADDR*/] != ga->ga_addr)
- return 0;
-
- return (*cf->cf_attach->ca_match)(parent, cf, aux);
-}
-
-int
-giofb_cnprobe()
-{
- struct gio_attach_args ga;
- uint32_t id;
- int i;
- int sys_type;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- sys_type = SGI_IP20;
- break;
- default:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- sys_type = SGI_IP22;
- break;
- }
-
- for (i = 0; gfx_bases[i].base != 0; i++) {
- if (giofb_consaddr != 0 &&
- gfx_bases[i].base != giofb_consaddr)
- continue;
-
- /* skip bases that don't apply to us */
- if (gfx_bases[i].mach_type != sys_type)
- continue;
-
- if (gfx_bases[i].mach_subtype != -1 &&
- gfx_bases[i].mach_subtype != sys_config.system_subtype)
- continue;
-
- ga.ga_addr = gfx_bases[i].base;
- ga.ga_iot = &imcbus_tag;
- ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC);
- ga.ga_dmat = &imc_bus_dma_tag;
- ga.ga_slot = -1;
- ga.ga_descr = NULL;
-
- id = gio_id(ga.ga_ioh, ga.ga_addr, 1);
- if (!gio_is_framebuffer_id(id))
- continue;
-
- ga.ga_product = giofb_consid = id;
- switch (id) {
- default:
-#if NIMPACT_GIO > 0
- if (GIO_PRODUCT_32BIT_ID(id) &&
- GIO_PRODUCT_PRODUCTID(id) == GIO_PRODUCT_IMPACT) {
- if (impact_gio_cnprobe(&ga) != 0)
- return 0;
- }
-#endif
- break;
- case GIO_PRODUCT_FAKEID_GRTWO:
-#if NGRTWO > 0
- if (grtwo_cnprobe(&ga) != 0)
- return 0;
-#endif
- break;
- case GIO_PRODUCT_FAKEID_LIGHT:
-#if NLIGHT > 0
- if (light_cnprobe(&ga) != 0)
- return 0;
-#endif
- break;
- case GIO_PRODUCT_FAKEID_NEWPORT:
-#if NNEWPORT > 0
- if (newport_cnprobe(&ga) != 0)
- return 0;
-#endif
- break;
- }
- }
-
- return ENXIO;
-}
-
-int
-giofb_cnattach()
-{
- struct gio_attach_args ga;
-
- ga.ga_addr = giofb_consaddr;
- ga.ga_iot = &imcbus_tag;
- ga.ga_ioh = PHYS_TO_XKPHYS(ga.ga_addr, CCA_NC);
- ga.ga_dmat = &imc_bus_dma_tag;
- ga.ga_slot = -1;
- ga.ga_product = giofb_consid;
- ga.ga_descr = NULL;
-
- switch (giofb_consid) {
- default:
-#if NIMPACT_GIO > 0
- if (GIO_PRODUCT_32BIT_ID(giofb_consid) &&
- GIO_PRODUCT_PRODUCTID(giofb_consid) == GIO_PRODUCT_IMPACT) {
- if (impact_gio_cnattach(&ga) == 0)
- return 0;
- }
-#endif
- break;
- case GIO_PRODUCT_FAKEID_GRTWO:
-#if NGRTWO > 0
- if (grtwo_cnattach(&ga) == 0)
- return 0;
-#endif
- break;
- case GIO_PRODUCT_FAKEID_LIGHT:
-#if NLIGHT > 0
- if (light_cnattach(&ga) == 0)
- return 0;
-#endif
- break;
- case GIO_PRODUCT_FAKEID_NEWPORT:
-#if NNEWPORT > 0
- if (newport_cnattach(&ga) == 0)
- return 0;
-#endif
- break;
- }
-
- giofb_consaddr = 0;
- return ENXIO;
-}
-
-int
-gio_is_framebuffer_id(uint32_t id)
-{
- switch (id) {
- case GIO_PRODUCT_FAKEID_GRTWO:
- case GIO_PRODUCT_FAKEID_LIGHT:
- case GIO_PRODUCT_FAKEID_NEWPORT:
- return 1;
- default:
- if (GIO_PRODUCT_32BIT_ID(id) &&
- GIO_PRODUCT_PRODUCTID(id) == GIO_PRODUCT_IMPACT)
- return 1;
- else
- return 0;
- }
-}
-
-/*
- * Devices living in the expansion slots must enable or disable some
- * GIO arbiter settings. This is accomplished via imc(4) registers.
- */
-int
-gio_arb_config(int slot, uint32_t flags)
-{
- if (flags == 0)
- return (EINVAL);
-
- if (flags & ~(GIO_ARB_RT | GIO_ARB_LB | GIO_ARB_MST | GIO_ARB_SLV |
- GIO_ARB_PIPE | GIO_ARB_NOPIPE | GIO_ARB_32BIT | GIO_ARB_64BIT |
- GIO_ARB_HPC2_32BIT | GIO_ARB_HPC2_64BIT))
- return (EINVAL);
-
- if (((flags & GIO_ARB_RT) && (flags & GIO_ARB_LB)) ||
- ((flags & GIO_ARB_MST) && (flags & GIO_ARB_SLV)) ||
- ((flags & GIO_ARB_PIPE) && (flags & GIO_ARB_NOPIPE)) ||
- ((flags & GIO_ARB_32BIT) && (flags & GIO_ARB_64BIT)) ||
- ((flags & GIO_ARB_HPC2_32BIT) && (flags & GIO_ARB_HPC2_64BIT)))
- return (EINVAL);
-
- return (imc_gio64_arb_config(slot, flags));
-}
-
-/*
- * Return the logical interrupt number for an expansion board (not a frame
- * buffer!) in the specified slot.
- *
- * Indy and Challenge S have a single GIO interrupt per GIO slot, but
- * distinct slot interrupts. Indigo and Indigo2 have three GIO interrupts per
- * slot, but at a given GIO interrupt level, all slots share the same
- * interrupt on the interrupt controller.
- *
- * Expansion boards appear to always use the intermediate level.
- */
-int
-gio_intr_map(int slot)
-{
- switch (sys_config.system_type) {
- case SGI_IP20:
- if (slot == GIO_SLOT_GFX)
- return -1;
- return INT2_L0_INTR(INT2_L0_GIO_LVL1);
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- if (sys_config.system_subtype == IP22_INDIGO2) {
- if (slot == GIO_SLOT_EXP1)
- return -1;
- return INT2_L0_INTR(INT2_L0_GIO_LVL1);
- } else {
- if (slot == GIO_SLOT_GFX)
- return -1;
- return INT2_MAP1_INTR(slot == GIO_SLOT_EXP0 ?
- INT2_MAP_GIO_SLOT0 : INT2_MAP_GIO_SLOT1);
- }
- default:
- return -1;
- }
-}
-
-void *
-gio_intr_establish(int intr, int level, int (*func)(void *), void *arg,
- const char *what)
-{
- return int2_intr_establish(intr, level, func, arg, what);
-}
-
-const char *
-gio_product_string(int prid)
-{
- int i;
-
- for (i = 0; gio_knowndevs[i].product != NULL; i++)
- if (gio_knowndevs[i].productid == prid)
- return (gio_knowndevs[i].product);
-
- return (NULL);
-}
+++ /dev/null
-$OpenBSD: giodevs,v 1.5 2014/08/19 19:01:15 miod Exp $
-/* $NetBSD: giodevs,v 1.8 2007/02/19 04:46:33 rumble Exp $ */
-
-/* devices with 8-bit identification registers */
-product XPI 0x01 XPI low cost FDDI
-product GTR 0x02 GTR TokenRing
-product ISDN 0x04 Synchronous ISDN
-product CANON 0x06 Canon Interface
-product JPEG_D 0x08 JPEG (Double Wide)
-product JPEG_S 0x09 JPEG (Single Wide)
-product XPI_M0 0x0a XPI mez. FDDI device 0
-product XPI_M1 0x0b XPI mez. FDDI device 1
-product EP 0x0e E-Plex 8-port Ethernet
-product IVAS 0x30 Lyon Lamb IVAS
-product FORE_ATM 0x5c FORE Systems GIA-200 ATM
-product GIOCLC 0x7f Cyclone Colorbus
-
-/* devices with 32-bit identification registers */
-product ATM 0x05 ATM board
-product SCSI 0x07 16 bit SCSI Card
-product SMPTE 0x0c SMPTE 259M Video
-product BABBLE 0x0d Babblefish Compression
-product IMPACT 0x10 Impact
-product PHOBOS_G160 0x35 Phobos G160 10/100 Ethernet
-product PHOBOS_G130 0x36 Phobos G130 10/100 Ethernet
-product PHOBOS_G100 0x37 Phobos G100 100baseTX Fast Ethernet
-product SETENG_GFE 0x38 Set Engineering GFE 10/100 Ethernet
+++ /dev/null
-/*
- * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
- *
- * generated from:
- * OpenBSD: giodevs,v 1.4 2012/07/18 20:10:12 miod Exp
- */
-
-
-#define GIO_PRODUCT_XPI 0x01 /* XPI low cost FDDI */
-#define GIO_PRODUCT_GTR 0x02 /* GTR TokenRing */
-#define GIO_PRODUCT_ISDN 0x04 /* Synchronous ISDN */
-#define GIO_PRODUCT_CANON 0x06 /* Canon Interface */
-#define GIO_PRODUCT_JPEG_D 0x08 /* JPEG (Double Wide) */
-#define GIO_PRODUCT_JPEG_S 0x09 /* JPEG (Single Wide) */
-#define GIO_PRODUCT_XPI_M0 0x0a /* XPI mez. FDDI device 0 */
-#define GIO_PRODUCT_XPI_M1 0x0b /* XPI mez. FDDI device 1 */
-#define GIO_PRODUCT_EP 0x0e /* E-Plex 8-port Ethernet */
-#define GIO_PRODUCT_IVAS 0x30 /* Lyon Lamb IVAS */
-#define GIO_PRODUCT_SETENG_GFE 0x38 /* Set Engineering GFE 10/100 Ethernet */
-#define GIO_PRODUCT_FORE_ATM 0x5c /* FORE Systems GIA-200 ATM */
-#define GIO_PRODUCT_GIOCLC 0x7f /* Cyclone Colorbus */
-#define GIO_PRODUCT_ATM 0x05 /* ATM board */
-#define GIO_PRODUCT_SCSI 0x07 /* 16 bit SCSI Card */
-#define GIO_PRODUCT_SMPTE 0x0c /* SMPTE 259M Video */
-#define GIO_PRODUCT_BABBLE 0x0d /* Babblefish Compression */
-#define GIO_PRODUCT_IMPACT 0x10 /* Impact */
-#define GIO_PRODUCT_PHOBOS_G160 0x35 /* Phobos G160 10/100 Ethernet */
-#define GIO_PRODUCT_PHOBOS_G130 0x36 /* Phobos G130 10/100 Ethernet */
-#define GIO_PRODUCT_PHOBOS_G100 0x37 /* Phobos G100 100baseTX Fast Ethernet */
+++ /dev/null
-/*
- * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
- *
- * generated from:
- * OpenBSD: giodevs,v 1.4 2012/07/18 20:10:12 miod Exp
- */
-
-/* $NetBSD: giodevs,v 1.8 2007/02/19 04:46:33 rumble Exp $ */
-
-/* devices with 8-bit identification registers */
-
-struct gio_knowndev {
- int productid;
- const char *product;
-};
-
-struct gio_knowndev gio_knowndevs[] = {
- { GIO_PRODUCT_XPI, "XPI low cost FDDI" },
- { GIO_PRODUCT_GTR, "GTR TokenRing" },
- { GIO_PRODUCT_ISDN, "Synchronous ISDN" },
- { GIO_PRODUCT_CANON, "Canon Interface" },
- { GIO_PRODUCT_JPEG_D, "JPEG (Double Wide)" },
- { GIO_PRODUCT_JPEG_S, "JPEG (Single Wide)" },
- { GIO_PRODUCT_XPI_M0, "XPI mez. FDDI device 0" },
- { GIO_PRODUCT_XPI_M1, "XPI mez. FDDI device 1" },
- { GIO_PRODUCT_EP, "E-Plex 8-port Ethernet" },
- { GIO_PRODUCT_IVAS, "Lyon Lamb IVAS" },
- { GIO_PRODUCT_SETENG_GFE, "Set Engineering GFE 10/100 Ethernet" },
- { GIO_PRODUCT_FORE_ATM, "FORE Systems GIA-200 ATM" },
- { GIO_PRODUCT_GIOCLC, "Cyclone Colorbus" },
- { GIO_PRODUCT_ATM, "ATM board" },
- { GIO_PRODUCT_SCSI, "16 bit SCSI Card" },
- { GIO_PRODUCT_SMPTE, "SMPTE 259M Video" },
- { GIO_PRODUCT_BABBLE, "Babblefish Compression" },
- { GIO_PRODUCT_IMPACT, "Impact" },
- { GIO_PRODUCT_PHOBOS_G160, "Phobos G160 10/100 Ethernet" },
- { GIO_PRODUCT_PHOBOS_G130, "Phobos G130 10/100 Ethernet" },
- { GIO_PRODUCT_PHOBOS_G100, "Phobos G100 100baseTX Fast Ethernet" },
- { 0, NULL }
-};
+++ /dev/null
-/* $OpenBSD: gioreg.h,v 1.4 2014/07/02 17:44:35 miod Exp $ */
-/* $NetBSD: gioreg.h,v 1.4 2006/08/31 00:01:10 rumble Exp $ */
-
-/*
- * Copyright (c) 2003 Ilpo Ruotsalainen
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-/*
- * The GIO Product Identification Word is the first word (1 or 4 bytes)
- * in each GIO device's address space. It is the same format for GIO32,
- * GIO32-bis, and GIO64 devices. The macros below extract the following
- * fields:
- *
- * Bits:
- * 0-6 Product ID Code
- * 7 Product Identification Word size (0: 8 bits, 1: 32 bits)
- * 8-15 Product Revision
- * 16 GIO Interface Size (0: 32, 1: 64; NB: GIO64 devices may be 32)
- * 17 Rom Present (1: present)
- * 18-31 Manufacturer-specific Code
- *
- * The upper three bytes containing the Product Revision, GIO Interface
- * Size, Rom Presence indicator, and Manufacturer-specific Code are only
- * valid if bit 7 is set in the Product ID Word. If it is not set, all
- * values default to 0.
- *
- * If the Rom Present bit is set, the three words after the Product ID are
- * reserved for three ROM registers:
- * Board Serial Number Register (base_address + 0x4)
- * ROM Index Register (base_address + 0x8)
- * ROM Read Register (base_address + 0xc)
- *
- * The ROM Index Register is initialised by the CPU to 0 and incremented by
- * 4 on each read from the ROM Read Register. The Board Serial Number
- * Register contains a manufacturer-specific serial number.
- */
-
-#define GIO_PRODUCT_32BIT_ID(x) ((x) & 0x80)
-#define GIO_PRODUCT_PRODUCTID(x) ((x) & 0x7f)
-#define GIO_PRODUCT_REVISION(x) (((x) >> 8) & 0xff)
-#define GIO_PRODUCT_IS_64BIT(x) (!!((x) & 0x10000))
-#define GIO_PRODUCT_HAS_ROM(x) (!!((x) & 0x20000))
-#define GIO_PRODUCT_MANUCODE(x) ((x) >> 18)
-
-#define GIO_ADDR_GFX 0x1f000000 /* 4MB */
-#define GIO_ADDR_EXP0 0x1f400000 /* 2MB */
-#define GIO_ADDR_EXP1 0x1f600000 /* 4MB */
-#define GIO_ADDR_END 0x1fa00000
-
-#define IS_GIO_ADDRESS(pa) ((pa) >= GIO_ADDR_GFX && (pa) < GIO_ADDR_END)
+++ /dev/null
-/* $OpenBSD: giovar.h,v 1.4 2012/05/17 19:46:52 miod Exp $ */
-/* $NetBSD: giovar.h,v 1.10 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2000 Soren S. Jorvang
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * GIO 32/32-bis/64 bus
- */
-
-struct gio_attach_args {
- bus_space_tag_t ga_iot;
- bus_space_handle_t ga_ioh;
- bus_dma_tag_t ga_dmat;
-
- int ga_slot; /* -1 if graphics */
- u_int64_t ga_addr;
-
- u_int32_t ga_product; /* not valid if graphics */
- const char *ga_descr; /* only valid if graphics */
-};
-
-
-#define GIO_SLOT_GFX 0
-#define GIO_SLOT_EXP0 1
-#define GIO_SLOT_EXP1 2
-
-#define GIO_ARB_RT 0x001 /* real-time device */
-#define GIO_ARB_LB 0x002 /* long-burst device */
-
-#define GIO_ARB_MST 0x004 /* bus master enable */
-#define GIO_ARB_SLV 0x008 /* slave */
-
-#define GIO_ARB_PIPE 0x010 /* pipelining enable */
-#define GIO_ARB_NOPIPE 0x020 /* pipelining disable */
-
-#define GIO_ARB_32BIT 0x040 /* 32-bit transfers */
-#define GIO_ARB_64BIT 0x080 /* 64-bit transfers */
-
-#define GIO_ARB_HPC2_32BIT 0x100 /* 32-bit secondary HPC (ignores slot)*/
-#define GIO_ARB_HPC2_64BIT 0x200 /* 64-bit secondary HPC (ignores slot)*/
-
-/*
- * Maximum number of graphics boards installed. The known limit is 2,
- * but we're allowing room for some surprises.
- */
-#define GIO_MAX_FB 3
-
-int gio_arb_config(int, uint32_t);
-int gio_intr_map(int);
-void *gio_intr_establish(int, int, int (*)(void *), void *,
- const char *);
-const char *gio_product_string(int);
-
-int giofb_cnattach(void);
-int giofb_cnprobe(void);
-
-extern paddr_t giofb_consaddr;
-extern const char *giofb_names[GIO_MAX_FB];
-
-/*
- * Fake GIO device IDs to identify frame buffers without GIO IDs.
- * These are built as 32-bit GIO IDs without the `32-bit ID' bit set.
- */
-
-#define GIO_PRODUCT_FAKEID_LIGHT 0xff010000
-#define GIO_PRODUCT_FAKEID_NEWPORT 0xff020000
-#define GIO_PRODUCT_FAKEID_GRTWO 0xff030000
+++ /dev/null
-/* $OpenBSD: grtwo.c,v 1.15 2020/05/25 09:55:48 jsg Exp $ */
-/* $NetBSD: grtwo.c,v 1.11 2009/11/22 19:09:15 mbalmer Exp $ */
-
-/*
- * Copyright (c) 2012, 2014 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2004 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-/* wscons driver for SGI GR2 family of framebuffers
- *
- * Heavily based on the newport wscons driver.
- */
-
-/*
- * GR2 coordinates start from (0,0) in the lower left corner, to (1279,1023)
- * in the upper right. The low-level drawing routines will take care of
- * converting the traditional ``y goes down'' coordinates to those expected
- * by the hardware.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <machine/autoconf.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsdisplayvar.h>
-#include <dev/rasops/rasops.h>
-
-#include <sgi/dev/gl.h>
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giovar.h>
-#include <sgi/gio/grtworeg.h>
-#include <dev/ic/bt458reg.h>
-#include <sgi/gio/grtwovar.h>
-#include <sgi/localbus/intreg.h>
-#include <sgi/localbus/intvar.h>
-
-#include <dev/cons.h>
-
-#define GRTWO_WIDTH 1280
-#define GRTWO_HEIGHT 1024
-
-struct grtwo_softc {
- struct device sc_dev;
-
- struct grtwo_devconfig *sc_dc;
-
- int sc_nscreens;
- struct wsscreen_list sc_wsl;
- const struct wsscreen_descr *sc_scrlist[1];
-};
-
-struct grtwo_devconfig {
- struct rasops_info dc_ri;
- uint32_t dc_defattr;
- struct wsdisplay_charcell *dc_bs;
-
- uint32_t dc_addr;
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
-
- uint32_t xmapmode;
-
- uint8_t boardrev;
- uint8_t backendrev;
- int hq2rev;
- int ge7rev;
- int vc1rev;
- int zbuffer;
- int depth;
- int monitor;
-
- struct grtwo_softc *dc_sc;
- struct wsscreen_descr dc_wsd;
-};
-
-int grtwo_match(struct device *, void *, void *);
-void grtwo_attach(struct device *, struct device *, void *);
-
-struct cfdriver grtwo_cd = {
- NULL, "grtwo", DV_DULL
-};
-
-const struct cfattach grtwo_ca = {
- sizeof(struct grtwo_softc), grtwo_match, grtwo_attach
-};
-
-/* accessops */
-int grtwo_ioctl(void *, u_long, caddr_t, int, struct proc *);
-paddr_t grtwo_mmap(void *, off_t, int);
-int grtwo_alloc_screen(void *, const struct wsscreen_descr *, void **,
- int *, int *, uint32_t *);
-void grtwo_free_screen(void *, void *);
-int grtwo_show_screen(void *, void *, int, void (*)(void *, int, int),
- void *);
-int grtwo_load_font(void *, void *, struct wsdisplay_font *);
-int grtwo_list_font(void *, struct wsdisplay_font *);
-void grtwo_burner(void *, u_int, u_int);
-
-static struct wsdisplay_accessops grtwo_accessops = {
- .ioctl = grtwo_ioctl,
- .mmap = grtwo_mmap,
- .alloc_screen = grtwo_alloc_screen,
- .free_screen = grtwo_free_screen,
- .show_screen = grtwo_show_screen,
- .load_font = grtwo_load_font,
- .list_font = grtwo_list_font,
- .burn_screen = grtwo_burner
-};
-
-int grtwo_cursor(void *, int, int, int);
-int grtwo_putchar(void *, int, int, u_int, uint32_t);
-int grtwo_copycols(void *, int, int, int, int);
-int grtwo_erasecols(void *, int, int, int, uint32_t);
-int grtwo_copyrows(void *, int, int, int);
-int grtwo_eraserows(void *, int, int, uint32_t);
-
-void grtwo_wait_gfifo(struct grtwo_devconfig *);
-static __inline__
-void grtwo_set_color(bus_space_tag_t, bus_space_handle_t, int);
-void grtwo_fillrect(struct grtwo_devconfig *, int, int, int, int, int);
-void grtwo_copyrect(struct grtwo_devconfig *, int, int, int, int, int, int);
-int grtwo_setup_hw(struct grtwo_devconfig *);
-static __inline__
-int grtwo_attach_common(struct grtwo_devconfig *, struct gio_attach_args *);
-int grtwo_init_screen(struct grtwo_devconfig *, int);
-int grtwo_putchar_internal(struct rasops_info *, int, int, u_int, int, int,
- int);
-
-static struct grtwo_devconfig grtwo_console_dc;
-/* console backing store, worst cast font selection */
-static struct wsdisplay_charcell
- grtwo_console_bs[(GRTWO_WIDTH / 8) * (GRTWO_HEIGHT / 16)];
-
-void
-grtwo_wait_gfifo(struct grtwo_devconfig *dc)
-{
- int i;
-
- /*
- * This loop is for paranoia. Of course there is currently no
- * known way to whack the FIFO (or reset the board) in case it
- * gets stuck... but this code is careful to avoid this situation
- * and it should never happen (famous last words)
- */
- for (i = 100000; i != 0; i--) {
- if (!int2_is_intr_pending(INT2_L0_FIFO))
- break;
- delay(1);
- }
-#ifdef DIAGNOSTIC
- if (i == 0) {
- if (dc != &grtwo_console_dc && dc->dc_sc != NULL)
- printf("%s: FIFO is stuck\n",
- dc->dc_sc->sc_dev.dv_xname);
- }
-#endif
-}
-
-static __inline__ void
-grtwo_set_color(bus_space_tag_t iot, bus_space_handle_t ioh, int color)
-{
- bus_space_write_4(iot, ioh, GR2_FIFO_COLOR, color);
-}
-
-/*
- * Rectangle fill with the given background.
- */
-void
-grtwo_fillrect(struct grtwo_devconfig *dc, int x1, int y1, int x2,
- int y2, int bg)
-{
- grtwo_wait_gfifo(dc);
- grtwo_set_color(dc->iot, dc->ioh, bg);
-
- grtwo_wait_gfifo(dc);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_RECTI2D, x1);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA,
- GRTWO_HEIGHT - 1 - y1);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, x2);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA,
- GRTWO_HEIGHT - 1 - y2);
-}
-
-/*
- * Rectangle copy.
- * Does not handle overlapping copies; this is handled at the wsdisplay
- * emulops level by splitting overlapping copies in smaller, non-overlapping,
- * operations.
- */
-void
-grtwo_copyrect(struct grtwo_devconfig *dc, int x1, int y1, int x2,
- int y2, int width, int height)
-{
- int length = (width + 3) >> 2;
- int lines = 4864 / length;
- int step;
-
- y1 += height; y2 += height;
- while (height != 0) {
- step = imin(height, lines);
- y1 -= step; y2 -= step;
-
- grtwo_wait_gfifo(dc);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_RECTCOPY, length);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, lines);
- /* source */
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, x1);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, y1);
- /* span */
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, width);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, step);
- /* dest */
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, x2);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, y2);
-
- height -= step;
- }
-}
-
-int
-grtwo_setup_hw(struct grtwo_devconfig *dc)
-{
- int i = 0;
- uint8_t rd0, rd1, rd2, rd3;
- uint32_t vc1;
-
- rd0 = bus_space_read_1(dc->iot, dc->ioh, GR2_REVISION_RD0);
- rd1 = bus_space_read_1(dc->iot, dc->ioh, GR2_REVISION_RD1);
- rd2 = bus_space_read_1(dc->iot, dc->ioh, GR2_REVISION_RD2);
- rd3 = bus_space_read_1(dc->iot, dc->ioh, GR2_REVISION_RD3);
-
- /* Get various revisions */
- dc->boardrev = ~rd0 & GR2_REVISION_RD0_VERSION_MASK;
-
- /*
- * Boards prior to rev 4 have a pretty whacky config scheme.
- * What is doubly weird is that i have a rev 2 board, but the rev 4
- * probe routines work just fine.
- * We'll trust SGI, though, and separate things a bit. It's only
- * critical for the display depth calculation.
- */
-
- if (dc->boardrev < 4) {
- dc->backendrev = ~(rd2 & GR2_REVISION_RD2_BACKEND_REV) >>
- GR2_REVISION_RD2_BACKEND_SHIFT;
- if (dc->backendrev == 0)
- return ENXIO;
- dc->zbuffer = ~rd1 & GR2_REVISION_RD1_ZBUFFER;
- if ((rd3 & GR2_REVISION_RD3_VMA) != GR2_REVISION_RD3_VMA)
- i++;
- if ((rd3 & GR2_REVISION_RD3_VMB) != GR2_REVISION_RD3_VMB)
- i++;
- if ((rd3 & GR2_REVISION_RD3_VMC) != GR2_REVISION_RD3_VMC)
- i++;
- dc->depth = 8 * i;
- dc->monitor = ((rd2 & 0x03) << 1) | (rd1 & 0x01);
- } else {
- dc->backendrev = ~rd1 & GR2_REVISION4_RD1_BACKEND;
- if (dc->backendrev == 0)
- return ENXIO;
- dc->zbuffer = rd1 & GR2_REVISION4_RD1_ZBUFFER;
- dc->depth = (rd1 & GR2_REVISION4_RD1_24BPP) ? 24 : 8;
- dc->monitor = (rd0 & GR2_REVISION4_RD0_MONITOR_MASK) >>
- GR2_REVISION4_RD0_MONITOR_SHIFT;
- }
-
- dc->hq2rev = (bus_space_read_4(dc->iot, dc->ioh, HQ2_VERSION) &
- HQ2_VERSION_MASK) >> HQ2_VERSION_SHIFT;
- dc->ge7rev = (bus_space_read_4(dc->iot, dc->ioh, GE7_REVISION) &
- GE7_REVISION_MASK) >> GE7_REVISION_SHIFT;
- /* dc->vc1rev = vc1_read_ireg(dc, 5) & 0x07; */
-
- vc1 = bus_space_read_4(dc->iot, dc->ioh, VC1_SYSCTL);
- if (vc1 == -1)
- return ENXIO; /* XXX would need a reset */
-
- /* Turn on display, DID, disable cursor display */
- bus_space_write_4(dc->iot, dc->ioh, VC1_SYSCTL,
- VC1_SYSCTL_VC1 | VC1_SYSCTL_DID);
-
- dc->xmapmode = bus_space_read_4(dc->iot, dc->ioh,
- XMAP5_BASEALL + XMAP5_MODE);
-
- /*
- * Setup Bt457 RAMDACs
- */
- /* enable all planes */
- bus_space_write_1(dc->iot, dc->ioh, BT457_R + BT457_ADDR, BT_RMR);
- bus_space_write_1(dc->iot, dc->ioh, BT457_R + BT457_CTRL, 0xff);
- bus_space_write_1(dc->iot, dc->ioh, BT457_G + BT457_ADDR, BT_RMR);
- bus_space_write_1(dc->iot, dc->ioh, BT457_G + BT457_CTRL, 0xff);
- bus_space_write_1(dc->iot, dc->ioh, BT457_B + BT457_ADDR, BT_RMR);
- bus_space_write_1(dc->iot, dc->ioh, BT457_B + BT457_CTRL, 0xff);
- /* setup a regular gamma ramp */
- bus_space_write_1(dc->iot, dc->ioh, BT457_R + BT457_ADDR, 0);
- bus_space_write_1(dc->iot, dc->ioh, BT457_G + BT457_ADDR, 0);
- bus_space_write_1(dc->iot, dc->ioh, BT457_B + BT457_ADDR, 0);
- for (i = 0; i < 256; i++) {
- bus_space_write_1(dc->iot, dc->ioh, BT457_R + BT457_CMAPDATA,
- i);
- bus_space_write_1(dc->iot, dc->ioh, BT457_G + BT457_CMAPDATA,
- i);
- bus_space_write_1(dc->iot, dc->ioh, BT457_B + BT457_CMAPDATA,
- i);
- }
-
- /*
- * Setup Bt479 RAMDAC
- */
- grtwo_wait_gfifo(dc);
- bus_space_write_1(dc->iot, dc->ioh, XMAP5_BASEALL + XMAP5_ADDRHI,
- GR2_CMAP8 >> 8);
- bus_space_write_1(dc->iot, dc->ioh, XMAP5_BASEALL + XMAP5_ADDRLO,
- GR2_CMAP8 & 0xff);
- bus_space_write_multi_1(dc->iot, dc->ioh, XMAP5_BASEALL + XMAP5_CLUT,
- rasops_cmap, sizeof(rasops_cmap));
-
- return 0;
-}
-
-/* Attach routines */
-int
-grtwo_match(struct device *parent, void *vcf, void *aux)
-{
- struct gio_attach_args *ga = aux;
-
- if (ga->ga_product != GIO_PRODUCT_FAKEID_GRTWO)
- return 0;
-
- return 1;
-}
-
-void
-grtwo_attach(struct device *parent, struct device *self, void *aux)
-{
- struct grtwo_softc *sc = (struct grtwo_softc *)self;
- struct gio_attach_args *ga = aux;
- struct grtwo_devconfig *dc;
- struct wsemuldisplaydev_attach_args waa;
- const char *descr;
- extern struct consdev wsdisplay_cons;
-
- descr = ga->ga_descr;
- if (descr == NULL || *descr == '\0')
- descr = "GR2";
- printf(": %s", descr);
-
- if (cn_tab == &wsdisplay_cons &&
- ga->ga_addr == grtwo_console_dc.dc_addr) {
- waa.console = 1;
- dc = &grtwo_console_dc;
- sc->sc_nscreens = 1;
- } else {
- /*
- * XXX The driver will not work correctly if we are not the
- * XXX console device. An initialization is missing - it
- * XXX seems that everything works, but the colormap is
- * XXX stuck as black, which makes the device unusable.
- */
- printf("\n%s: device has not been setup by firmware!\n",
- self->dv_xname);
- return;
-#if 0
- waa.console = 0;
- dc = malloc(sizeof(struct grtwo_devconfig),
- M_DEVBUF, M_WAITOK | M_CANFAIL | M_ZERO);
- if (dc == NULL)
- goto out;
- if (grtwo_attach_common(dc, ga) != 0) {
- printf("\n%s: not responding\n", self->dv_xname);
- free(dc, M_DEVBUF, sizeof *dc);
- return;
- }
- if (grtwo_init_screen(dc, M_WAITOK | M_CANFAIL) != 0) {
- free(dc, M_DEVBUF, sizeof *dc);
- goto out;
- }
-#endif
- }
- sc->sc_dc = dc;
- dc->dc_sc = sc;
-
- printf(", revision %d, monitor sense %d\n", dc->boardrev, dc->monitor);
- printf("%s: %dx%d, %dbpp\n",
- self->dv_xname, GRTWO_WIDTH, GRTWO_HEIGHT, dc->depth);
-
- sc->sc_scrlist[0] = &dc->dc_wsd;
- sc->sc_wsl.nscreens = 1;
- sc->sc_wsl.screens = sc->sc_scrlist;
-
- waa.scrdata = &sc->sc_wsl;
- waa.accessops = &grtwo_accessops;
- waa.accesscookie = dc;
- waa.defaultscreens = 0;
-
- config_found(self, &waa, wsemuldisplaydevprint);
- return;
-
-#if 0
-out:
- printf("\n%s: failed to allocate memory\n", self->dv_xname);
- return;
-#endif
-}
-
-int
-grtwo_cnprobe(struct gio_attach_args *ga)
-{
- return grtwo_match(NULL, NULL, ga);
-}
-
-int
-grtwo_cnattach(struct gio_attach_args *ga)
-{
- struct rasops_info *ri = &grtwo_console_dc.dc_ri;
- struct wsdisplay_charcell *cell;
- uint32_t defattr;
- int rc;
- int i;
-
- rc = grtwo_attach_common(&grtwo_console_dc, ga);
- if (rc != 0)
- return rc;
- grtwo_console_dc.dc_bs = grtwo_console_bs;
- rc = grtwo_init_screen(&grtwo_console_dc, M_NOWAIT);
- if (rc != 0)
- return rc;
-
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &defattr);
- cell = grtwo_console_bs;
- for (i = ri->ri_cols * ri->ri_rows; i != 0; i--, cell++)
- cell->attr = defattr;
-
- wsdisplay_cnattach(&grtwo_console_dc.dc_wsd, ri, 0, 0, defattr);
-
- return 0;
-}
-
-static __inline__ int
-grtwo_attach_common(struct grtwo_devconfig *dc, struct gio_attach_args * ga)
-{
- dc->dc_addr = ga->ga_addr;
- dc->iot = ga->ga_iot;
- dc->ioh = ga->ga_ioh;
-
- return grtwo_setup_hw(dc);
-}
-
-int
-grtwo_init_screen(struct grtwo_devconfig *dc, int malloc_flags)
-{
- struct rasops_info *ri = &dc->dc_ri;
-
- memset(ri, 0, sizeof(struct rasops_info));
- ri->ri_hw = dc;
- ri->ri_flg = RI_CENTER | RI_FULLCLEAR;
- /* for the proper operation of rasops computations, pretend 8bpp */
- ri->ri_depth = 8;
- ri->ri_stride = GRTWO_WIDTH;
- ri->ri_width = GRTWO_WIDTH;
- ri->ri_height = GRTWO_HEIGHT;
- rasops_init(ri, 160, 160);
-
- /*
- * Allocate backing store to remember character cells, to
- * be able to paint an inverted cursor.
- */
- if (dc->dc_bs == NULL) {
- dc->dc_bs = mallocarray(ri->ri_rows, ri->ri_cols *
- sizeof(struct wsdisplay_charcell), M_DEVBUF,
- malloc_flags | M_ZERO);
- if (dc->dc_bs == NULL)
- return ENOMEM;
- }
-
- ri->ri_ops.cursor = grtwo_cursor;
- ri->ri_ops.copyrows = grtwo_copyrows;
- ri->ri_ops.eraserows = grtwo_eraserows;
- ri->ri_ops.copycols = grtwo_copycols;
- ri->ri_ops.erasecols = grtwo_erasecols;
- ri->ri_ops.putchar = grtwo_putchar;
-
- strlcpy(dc->dc_wsd.name, "std", sizeof(dc->dc_wsd.name));
- dc->dc_wsd.ncols = ri->ri_cols;
- dc->dc_wsd.nrows = ri->ri_rows;
- dc->dc_wsd.textops = &ri->ri_ops;
- dc->dc_wsd.fontwidth = ri->ri_font->fontwidth;
- dc->dc_wsd.fontheight = ri->ri_font->fontheight;
- dc->dc_wsd.capabilities = ri->ri_caps;
-
- grtwo_fillrect(dc, 0, 0, GRTWO_WIDTH - 1, GRTWO_HEIGHT - 1,
- ri->ri_devcmap[WSCOL_BLACK]);
-
- return 0;
-}
-
-/* wsdisplay textops */
-
-int
-grtwo_cursor(void *c, int on, int row, int col)
-{
- struct rasops_info *ri = c;
- struct grtwo_devconfig *dc = ri->ri_hw;
- struct wsdisplay_charcell *cell;
- int bg, fg, ul;
-
- cell = dc->dc_bs + row * ri->ri_cols + col;
- ri->ri_ops.unpack_attr(ri, cell->attr, &fg, &bg, &ul);
-
- if (on) {
- /* redraw the existing character with inverted colors */
- return grtwo_putchar_internal(ri, row, col, cell->uc,
- ~ri->ri_devcmap[fg], ~ri->ri_devcmap[bg], ul);
- } else {
- /* redraw the existing character with correct colors */
- return grtwo_putchar_internal(ri, row, col, cell->uc,
- ri->ri_devcmap[fg], ri->ri_devcmap[bg], ul);
- }
-}
-
-int
-grtwo_putchar(void *c, int row, int col, u_int ch, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct grtwo_devconfig *dc = ri->ri_hw;
- struct wsdisplay_charcell *cell;
- int bg, fg, ul;
-
- /* Update backing store. */
- cell = dc->dc_bs + row * ri->ri_cols + col;
- cell->uc = ch;
- cell->attr = attr;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, &ul);
- return grtwo_putchar_internal(ri, row, col, ch, ri->ri_devcmap[fg],
- ri->ri_devcmap[bg], ul);
-}
-
-int
-grtwo_putchar_internal(struct rasops_info *ri, int row, int col, u_int ch,
- int fg, int bg, int ul)
-{
- struct grtwo_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- uint8_t *bitmap;
- uint32_t pattern;
- int x, y;
- int h = font->fontheight;
- int w = font->fontwidth;
- int i;
-
- /*
- * The `draw char' operation below writes on top of the existing
- * background. We need to paint the background first.
- */
- x = ri->ri_xorigin + col * w;
- y = ri->ri_yorigin + row * h;
- grtwo_fillrect(dc, x, y, x + w - 1, y + h - 1, bg);
-
- if ((ch == ' ' || ch == 0) && ul == 0)
- return 0;
-
- /* Set the drawing color */
- grtwo_wait_gfifo(dc);
- grtwo_set_color(dc->iot, dc->ioh, fg);
-
- /*
- * This character drawing operation apparently expects a 18 pixel
- * character cell height. We will perform as many cell fillings as
- * necessary to draw a complete glyph.
- */
- bitmap = (uint8_t *)font->data +
- (ch - font->firstchar + 1) * ri->ri_fontscale;
- y = ri->ri_height - h - y;
- while (h != 0) {
- /* Set drawing coordinates */
- grtwo_wait_gfifo(dc);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_CMOV2I, x);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, y);
-
- grtwo_wait_gfifo(dc);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DRAWCHAR, w);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA,
- h > GR2_DRAWCHAR_HEIGHT ? GR2_DRAWCHAR_HEIGHT : h);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, 2);
- /* (x,y) offset */
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, 0);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, 0);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, 0);
- bus_space_write_4(dc->iot, dc->ioh, GR2_FIFO_DATA, 0);
-
- grtwo_wait_gfifo(dc);
- if (w <= 8) {
- for (i = 0; i < GR2_DRAWCHAR_HEIGHT; i++) {
- if (h != 0) {
- bitmap -= font->stride;
- if (ul && h == font->fontheight - 1)
- pattern = 0xff << 8;
- else
- pattern = *bitmap << 8;
- h--;
- } else
- pattern = 0;
-
- bus_space_write_4(dc->iot, dc->ioh,
- GR2_FIFO_DATA, pattern);
- }
- } else {
- for (i = 0; i < GR2_DRAWCHAR_HEIGHT; i++) {
- if (h != 0) {
- bitmap -= font->stride;
- if (ul && h == font->fontheight - 1)
- pattern = 0xffff;
- else
- pattern = *(uint16_t *)bitmap;
- h--;
- } else
- pattern = 0;
-
- bus_space_write_4(dc->iot, dc->ioh,
- GR2_FIFO_DATA, pattern);
- }
- }
-
- y += GR2_DRAWCHAR_HEIGHT;
- }
-
- return 0;
-}
-
-int
-grtwo_copycols(void *c, int row, int src, int dst, int ncol)
-{
- struct rasops_info *ri = c;
- struct grtwo_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- struct wsdisplay_charcell *cell;
- int y = ri->ri_yorigin + row * font->fontheight;
- int delta, chunk;
-
- /* Copy columns in backing store. */
- cell = dc->dc_bs + row * ri->ri_cols;
- memmove(cell + dst, cell + src, ncol * sizeof(*cell));
-
- if (src > dst) {
- /* may overlap, copy in non-overlapping blocks */
- delta = src - dst;
- while (ncol > 0) {
- chunk = ncol <= delta ? ncol : delta;
- grtwo_copyrect(dc,
- ri->ri_xorigin + src * font->fontwidth, y,
- ri->ri_xorigin + dst * font->fontwidth, y,
- chunk * font->fontwidth, font->fontheight);
- src += chunk;
- dst += chunk;
- ncol -= chunk;
- }
- } else {
- grtwo_copyrect(dc,
- ri->ri_xorigin + src * font->fontwidth, y,
- ri->ri_xorigin + dst * font->fontwidth, y,
- ncol * font->fontwidth, font->fontheight);
- }
-
- return 0;
-}
-
-int
-grtwo_erasecols(void *c, int row, int startcol, int ncol, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct grtwo_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- struct wsdisplay_charcell *cell;
- int y = ri->ri_yorigin + row * font->fontheight;
- int i, bg, fg;
-
- /* Erase columns in backing store. */
- cell = dc->dc_bs + row * ri->ri_cols + startcol;
- for (i = ncol; i != 0; i--, cell++) {
- cell->uc = 0;
- cell->attr = attr;
- }
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, NULL);
-
- grtwo_fillrect(dc, ri->ri_xorigin + startcol * font->fontwidth, y,
- ri->ri_xorigin + (startcol + ncol) * font->fontwidth - 1,
- y + font->fontheight - 1, ri->ri_devcmap[bg]);
-
- return 0;
-}
-
-int
-grtwo_copyrows(void *c, int src, int dst, int nrow)
-{
- struct rasops_info *ri = c;
- struct grtwo_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- struct wsdisplay_charcell *cell;
- int delta, chunk;
-
- /* Copy rows in backing store. */
- cell = dc->dc_bs + dst * ri->ri_cols;
- memmove(cell, dc->dc_bs + src * ri->ri_cols,
- nrow * ri->ri_cols * sizeof(*cell));
-
- if (src > dst) {
- /* may overlap, copy in non-overlapping blocks */
- delta = src - dst;
- while (nrow > 0) {
- chunk = nrow <= delta ? nrow : delta;
- grtwo_copyrect(dc, ri->ri_xorigin,
- ri->ri_yorigin + src * font->fontheight,
- ri->ri_xorigin,
- ri->ri_yorigin + dst * font->fontheight,
- ri->ri_emuwidth, chunk * font->fontheight);
- src += chunk;
- dst += chunk;
- nrow -= chunk;
- }
- } else {
- grtwo_copyrect(dc, ri->ri_xorigin,
- ri->ri_yorigin + src * font->fontheight, ri->ri_xorigin,
- ri->ri_yorigin + dst * font->fontheight, ri->ri_emuwidth,
- nrow * font->fontheight);
- }
-
- return 0;
-}
-
-int
-grtwo_eraserows(void *c, int startrow, int nrow, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct grtwo_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- struct wsdisplay_charcell *cell;
- int i, bg, fg;
-
- /* Erase rows in backing store. */
- cell = dc->dc_bs + startrow * ri->ri_cols;
- for (i = ri->ri_cols; i != 0; i--, cell++) {
- cell->uc = 0;
- cell->attr = attr;
- }
- for (i = 1; i < nrow; i++)
- memmove(dc->dc_bs + (startrow + i) * ri->ri_cols,
- dc->dc_bs + startrow * ri->ri_cols,
- ri->ri_cols * sizeof(*cell));
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, NULL);
-
- if (nrow == ri->ri_rows && (ri->ri_flg & RI_FULLCLEAR)) {
- grtwo_fillrect(dc, 0, 0, GRTWO_WIDTH - 1, GRTWO_HEIGHT - 1,
- ri->ri_devcmap[bg]);
- return 0;
- }
-
- grtwo_fillrect(dc, ri->ri_xorigin,
- ri->ri_yorigin + startrow * font->fontheight,
- ri->ri_xorigin + ri->ri_emuwidth - 1,
- ri->ri_yorigin + (startrow + nrow) * font->fontheight - 1,
- ri->ri_devcmap[bg]);
-
- return 0;
-}
-
-/* wsdisplay accessops */
-
-int
-grtwo_alloc_screen(void *v, const struct wsscreen_descr * type, void **cookiep,
- int *curxp, int *curyp, uint32_t *attrp)
-{
- struct grtwo_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
- struct grtwo_softc *sc = dc->dc_sc;
- struct wsdisplay_charcell *cell;
- int i;
-
- if (sc->sc_nscreens > 0)
- return ENOMEM;
-
- sc->sc_nscreens++;
-
- *cookiep = ri;
- *curxp = *curyp = 0;
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &dc->dc_defattr);
- *attrp = dc->dc_defattr;
-
- cell = dc->dc_bs;
- for (i = ri->ri_cols * ri->ri_rows; i != 0; i--, cell++)
- cell->attr = dc->dc_defattr;
-
- return 0;
-}
-
-void
-grtwo_free_screen(void *v, void *cookie)
-{
-}
-
-int
-grtwo_show_screen(void *v, void *cookie, int waitok,
- void (*cb) (void *, int, int), void *cbarg)
-{
- return 0;
-}
-
-int
-grtwo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
-{
- struct grtwo_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
- struct wsdisplay_fbinfo *fb;
-
- switch (cmd) {
- case WSDISPLAYIO_GTYPE:
- *(u_int *) data = WSDISPLAY_TYPE_GRTWO;
- break;
- case WSDISPLAYIO_GINFO:
- fb = (struct wsdisplay_fbinfo *)data;
- fb->width = ri->ri_width;
- fb->height = ri->ri_height;
- fb->depth = dc->depth; /* real depth */
- if (dc->depth > 8)
- fb->cmsize = 0;
- else
- fb->cmsize = 1 << dc->depth;
- break;
- default:
- return -1;
- }
-
- return 0;
-}
-
-paddr_t
-grtwo_mmap(void *v, off_t offset, int prot)
-{
- /* no directly accessible frame buffer memory */
- return -1;
-}
-
-int
-grtwo_load_font(void *v, void *emulcookie, struct wsdisplay_font *font)
-{
- struct grtwo_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
-
- return rasops_load_font(ri, emulcookie, font);
-}
-
-int
-grtwo_list_font(void *v, struct wsdisplay_font *font)
-{
- struct grtwo_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
-
- return rasops_list_font(ri, font);
-}
-
-void
-grtwo_burner(void *v, u_int on, u_int flags)
-{
- struct grtwo_devconfig *dc = v;
-
- on = on ? 0xff : 0x00;
-
- bus_space_write_1(dc->iot, dc->ioh, BT457_R + BT457_ADDR, BT_RMR);
- bus_space_write_1(dc->iot, dc->ioh, BT457_R + BT457_CTRL, on);
- bus_space_write_1(dc->iot, dc->ioh, BT457_G + BT457_ADDR, BT_RMR);
- bus_space_write_1(dc->iot, dc->ioh, BT457_G + BT457_CTRL, on);
- bus_space_write_1(dc->iot, dc->ioh, BT457_B + BT457_ADDR, BT_RMR);
- bus_space_write_1(dc->iot, dc->ioh, BT457_B + BT457_CTRL, on);
-}
+++ /dev/null
-/* $OpenBSD: grtworeg.h,v 1.3 2014/03/27 20:15:00 miod Exp $ */
-/* $NetBSD: grtworeg.h,v 1.2 2005/12/11 12:18:53 christos Exp $ */
-
-/*
- * Copyright (c) 2004 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-/*
- * Memory map:
- *
- * 0x1f000000 - 0x1f01ffff Shared data RAM
- * 0x1f020000 - 0x1f03ffff (unused)
- * 0x1f040000 - 0x1f05ffff FIFO
- * 0x1f060000 - 0x1f068000 HQ2 ucode
- * 0x1f068000 - 0x1f069fff GE7 (eight of them)
- * 0x1f06a000 - 0x1f06b004 HQ2
- * 0x1f06c000 Board revision register
- * 0x1f06c020 clock
- * 0x1f06c040 VC1
- * 0x1f06c060 BT479 Triple-DAC (read)
- * 0x1f06c080 BT479 Triple-DAC (write)
- * 0x1f06c0a0 BT457 DAC (red)
- * 0x1f06c0c0 BT457 DAC (green)
- * 0x1f06c0e0 BT457 DAC (blue)
- * 0x1f06c100 XMAP5 (five of them)
- * 0x1f06c1a0 XMAP5 ("xmap all")
- * 0x1f06c1c0 Kaleidoscope (AB1)
- * 0x1f06c1e0 Kaleidoscope (CC1)
- * 0x1f06c200 RE3 (27-bit registers)
- * 0x1f06c280 RE3 (24-bit registers)
- * 0x1f06c600 RE3 (32-bit registers)
- */
-
-#define GR2_FIFO 0x40000
-#define GR2_FIFO_INIT (GR2_FIFO + 0x644)
-#define GR2_FIFO_COLOR (GR2_FIFO + 0x648)
-#define GR2_FIFO_FINISH (GR2_FIFO + 0x64c)
-#define GR2_FIFO_PNT2I (GR2_FIFO + 0x650)
-#define GR2_FIFO_RECTI2D (GR2_FIFO + 0x654)
-#define GR2_FIFO_CMOV2I (GR2_FIFO + 0x658)
-#define GR2_FIFO_LINE2I (GR2_FIFO + 0x65c)
-#define GR2_FIFO_DRAWCHAR (GR2_FIFO + 0x660)
-#define GR2_FIFO_RECTCOPY (GR2_FIFO + 0x664)
-#define GR2_FIFO_DATA (GR2_FIFO + 0x77c)
-
-/* HQ2 */
-
-#define HQ2_BASE 0x6a000
-#define HQ2_ATTRJUMP (HQ2_BASE + 0x00)
-#define HQ2_VERSION (HQ2_BASE + 0x40)
-#define HQ2_VERSION_MASK 0xff000000
-#define HQ2_VERSION_SHIFT 23
-
-#define HQ2_NUMGE (HQ2_BASE + 0x44)
-#define HQ2_FIN1 (HQ2_BASE + 0x48)
-#define HQ2_FIN2 (HQ2_BASE + 0x4c)
-#define HQ2_DMASYNC (HQ2_BASE + 0x50)
-#define HQ2_FIFO_FULL_TIMEOUT (HQ2_BASE + 0x54)
-#define HQ2_FIFO_EMPTY_TIMEOUT (HQ2_BASE + 0x58)
-#define HQ2_FIFO_FULL (HQ2_BASE + 0x5c)
-#define HQ2_FIFO_EMPTY (HQ2_BASE + 0x60)
-#define HQ2_GE7_LOAD_UCODE (HQ2_BASE + 0x64)
-#define HQ2_GEDMA (HQ2_BASE + 0x68)
-#define HQ2_HQ_GEPC (HQ2_BASE + 0x6c)
-#define HQ2_GEPC (HQ2_BASE + 0x70)
-#define HQ2_INTR (HQ2_BASE + 0x74)
-#define HQ2_UNSTALL (HQ2_BASE + 0x78)
-#define HQ2_MYSTERY (HQ2_BASE + 0x7c)
-#define HQ2_MYSTERY_VALUE 0xdeadbeef
-#define HQ2_REFRESH (HQ2_BASE + 0x80)
-#define HQ2_FIN3 (HQ2_BASE + 0x1000)
-
-/* GE7 */
-
-#define GE7_REVISION 0x680fc
-#define GE7_REVISION_MASK 0xe0
-#define GE7_REVISION_SHIFT 5
-
-/* VC1 */
-
-#define VC1_BASE 0x6c040
-#define VC1_COMMAND (VC1_BASE + 0x00)
-#define VC1_XMAPMODE (VC1_BASE + 0x04)
-#define VC1_SRAM (VC1_BASE + 0x08)
-#define VC1_TESTREG (VC1_BASE + 0x0c)
-#define VC1_ADDRLO (VC1_BASE + 0x10)
-#define VC1_ADDRHI (VC1_BASE + 0x14)
-#define VC1_SYSCTL (VC1_BASE + 0x18)
-
-/* VC1 System Control Register */
-#define VC1_SYSCTL_INTERRUPT 0x01 /* active low */
-#define VC1_SYSCTL_VTG 0x02 /* active low */
-#define VC1_SYSCTL_VC1 0x04
-#define VC1_SYSCTL_DID 0x08
-#define VC1_SYSCTL_CURSOR 0x10
-#define VC1_SYSCTL_CURSOR_DISPLAY 0x20
-#define VC1_SYSCTL_GENSYNC 0x40
-#define VC1_SYSCTL_VIDEO 0x80
-
-/* VC1 SRAM memory map */
-#define VC1_SRAM_VIDTIM_LST_BASE 0x0000
-#define VC1_SRAM_VIDTIM_CURSLST_BASE 0x0400
-#define VC1_SRAM_VIDTIM_FRMT_BASE 0x0800
-#define VC1_SRAM_VIDTIM_CURSFRMT_BASE 0x0900
-#define VC1_SRAM_INTERLACED 0x09f0
-#define VC1_SRAM_SCREENWIDTH 0x09f2
-#define VC1_SRAM_NEXTDID_ADDR 0x09f4
-#define VC1_SRAM_CURSOR0_BASE 0x0a00 /* 32x32 */
-#define VC1_SRAM_DID_FRMT_BASE 0x0b00
-#define VC1_SRAM_DID_MAX_FMTSIZE 0x0900
-#define VC1_SRAM_DID_LST_END 0x8000
-
-/* VC1 registers */
-#define VC1_VIDEO_EP 0x00
-#define VC1_VIDEO_LC 0x02
-#define VC1_VIDEO_SC 0x04
-#define VC1_VIDEO_TSA 0x06
-#define VC1_VIDEO_TSB 0x07
-#define VC1_VIDEO_TSC 0x08
-#define VC1_VIDEO_LP 0x09
-#define VC1_VIDEO_LS_EP 0x0b
-#define VC1_VIDEO_LR 0x0d
-#define VC1_VIDEO_FC 0x10
-#define VC1_VIDEO_ENABLE 0x14
-
-/* Cursor Generator */
-#define VC1_CURSOR_EP 0x20
-#define VC1_CURSOR_XL 0x22
-#define VC1_CURSOR_YL 0x24
-#define VC1_CURSOR_MODE 0x26
-#define VC1_CURSOR_BX 0x27
-#define VC1_CURSOR_LY 0x28
-#define VC1_CURSOR_YC 0x2a
-#define VC1_CURSOR_CC 0x2e
-#define VC1_CURSOR_RC 0x30
-
-/* Board revision register */
-
-#define GR2_REVISION 0x6c000
-#define GR2_REVISION_RD0 0x6c000
-#define GR2_REVISION_RD0_VERSION_MASK 0x0f
-#define GR2_REVISION4_RD0_MONITOR_MASK 0xf0
-#define GR2_REVISION4_RD0_MONITOR_SHIFT 4
-
-#define GR2_REVISION_RD1 0x6c004
-#define GR2_REVISION_RD1_BACKEND_REV 0x03
-#define GR2_REVISION_RD1_ZBUFFER 0x0c
-
-#define GR2_REVISION4_RD1_BACKEND 0x03
-#define GR2_REVISION4_RD1_24BPP 0x10
-#define GR2_REVISION4_RD1_ZBUFFER 0x20
-
-#define GR2_REVISION_RD2 0x6c008
-#define GR2_REVISION_RD2_BACKEND_REV 0x0c
-#define GR2_REVISION_RD2_BACKEND_SHIFT 2
-
-/* one slot = 8bpp, two slots = 16bpp, three slots = 24bpp, br < 4 only */
-#define GR2_REVISION_RD3 0x6c00c
-#define GR2_REVISION_RD3_VMA 0x03 /* both bits set == empty
- * slot */
-#define GR2_REVISION_RD3_VMB 0x0c
-#define GR2_REVISION_RD3_VMC 0x30
-
-/* Bt479 */
-
-#define BT479_R 0x6c060
-#define BT479_W 0x6c080
-
-#define BT479_WRADDR 0x00
-#define BT479_CMAPDATA 0x04
-#define BT479_MASK 0x08 /* pixel read mask */
-#define BT479_RDADDR 0x0c
-#define BT479_OVWRADDR 0x10
-#define BT479_OVDATA 0x14
-#define BT479_CTL 0x18
-#define BT479_OVRDADDR 0x1c
-
-#define GR2_CMAP12 0x0000
-#define GR2_CMAP8 0x1000
-#define GR2_CMAP4 0x1400
-
-/* Bt457 */
-
-#define BT457_R 0x6c0a0
-#define BT457_G 0x6c0c0
-#define BT457_B 0x6c0e0
-
-#define BT457_ADDR 0x00
-#define BT457_CMAPDATA 0x04
-#define BT457_CTRL 0x08
-#define BT457_OVDATA 0x0c
-
-/* XMAP5 */
-
-#define XMAP5_BASE0 0x6c100
-#define XMAP5_BASE1 0x6c120
-#define XMAP5_BASE2 0x6c140
-#define XMAP5_BASE3 0x6c160
-#define XMAP5_BASE4 0x6c180
-#define XMAP5_BASEALL 0x6c1a0
-
-#define XMAP5_MISC 0x00
-#define XMAP5_MODE 0x04
-#define XMAP5_CLUT 0x08
-#define XMAP5_CRC 0x0c
-#define XMAP5_ADDRLO 0x10
-#define XMAP5_ADDRHI 0x14
-#define XMAP5_BYTECOUNT 0x18
-#define XMAP5_FIFOSTATUS 0x1c
-
-/*
- * FIFO operation constraints.
- */
-
-#define GR2_DRAWCHAR_HEIGHT 18
+++ /dev/null
-/* $OpenBSD: grtwovar.h,v 1.1 2012/04/18 11:01:55 miod Exp $ */
-/* $NetBSD: grtwovar.h,v 1.3 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2004 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-int grtwo_cnattach(struct gio_attach_args *);
-int grtwo_cnprobe(struct gio_attach_args *);
+++ /dev/null
-/* $OpenBSD: impact_gio.c,v 1.7 2017/09/08 05:36:52 deraadt Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Driver for the SGI Impact graphics board (GIO attachment).
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-
-#include <machine/autoconf.h>
-
-#include <mips64/arcbios.h>
-
-#include <sgi/dev/impactreg.h>
-#include <sgi/dev/impactvar.h>
-#include <sgi/gio/giodevs.h>
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giovar.h>
-#include <sgi/sgi/ip22.h>
-
-#include <dev/cons.h>
-
-#define IMPACT_REG_OFFSET 0x00000000
-#define IMPACT_REG_SIZE 0x00080000
-
-int impact_gio_match(struct device *, void *, void *);
-void impact_gio_attach(struct device *, struct device *, void *);
-
-const struct cfattach impact_gio_ca = {
- sizeof(struct impact_softc), impact_gio_match, impact_gio_attach
-};
-
-int
-impact_gio_match(struct device *parent, void *match, void *aux)
-{
- struct gio_attach_args *ga = aux;
-
- if (GIO_PRODUCT_32BIT_ID(ga->ga_product) &&
- GIO_PRODUCT_PRODUCTID(ga->ga_product) == GIO_PRODUCT_IMPACT)
- return 1;
-
- return 0;
-}
-
-void
-impact_gio_attach(struct device *parent, struct device *self, void *aux)
-{
- struct gio_attach_args *ga = aux;
- struct impact_softc *sc = (struct impact_softc *)self;
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- int console;
- extern struct consdev wsdisplay_cons;
-
- if (ga->ga_descr != NULL && *ga->ga_descr != '\0')
- printf(": %s", ga->ga_descr);
-
- if (strncmp(bios_graphics, "alive", 5) != 0) {
- printf("\n%s: device has not been setup by firmware!\n",
- self->dv_xname);
- return;
- }
-
- printf("\n");
-
- console = cn_tab == &wsdisplay_cons && giofb_consaddr == ga->ga_addr;
-
- if (console != 0) {
- iot = NULL;
- ioh = 0;
- } else {
- iot = ga->ga_iot;
-
- /* Setup bus space mappings. */
- if (bus_space_map(iot, ga->ga_addr + IMPACT_REG_OFFSET,
- IMPACT_REG_SIZE, 0, &ioh)) {
- printf("failed to map registers\n");
- return;
- }
- }
-
- if (impact_attach_common(sc, iot, ioh, console, 0) != 0) {
- if (console == 0)
- bus_space_unmap(iot, ioh, IMPACT_REG_SIZE);
- }
-}
-
-/*
- * Console support.
- */
-
-int
-impact_gio_cnprobe(struct gio_attach_args *ga)
-{
- return impact_gio_match(NULL, NULL, ga);
-}
-
-int
-impact_gio_cnattach(struct gio_attach_args *ga)
-{
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- int rc;
-
- iot = ga->ga_iot;
- rc = bus_space_map(iot, ga->ga_addr + IMPACT_REG_OFFSET,
- IMPACT_REG_SIZE, 0, &ioh);
- if (rc != 0)
- return rc;
-
- rc = impact_cnattach_common(iot, ioh, 0);
- if (rc != 0) {
- bus_space_unmap(iot, ioh, IMPACT_REG_SIZE);
- return rc;
- }
-
- return 0;
-}
+++ /dev/null
-/* $OpenBSD: light.c,v 1.10 2020/05/25 09:55:48 jsg Exp $ */
-/* $NetBSD: light.c,v 1.5 2007/03/04 06:00:39 christos Exp $ */
-
-/*
- * Copyright (c) 2012, 2014 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2006 Stephen M. Rumble
- * Copyright (c) 2003 Ilpo Ruotsalainen
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-/*
- * SGI "Light" graphics, a.k.a. "Entry", "Starter", "LG1", and "LG2".
- *
- * 1024x768 8bpp at 60Hz.
- *
- * This driver supports the boards found in Indigo R3k and R4k machines.
- * There is a Crimson variant, but the register offsets differ significantly.
- *
- * Light's REX chip is the precursor of the REX3 found in "newport", hence
- * much similarity exists.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <machine/autoconf.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsdisplayvar.h>
-#include <dev/rasops/rasops.h>
-
-#include <sgi/dev/gl.h>
-#include <sgi/gio/giovar.h>
-#include <sgi/gio/lightvar.h>
-#include <sgi/gio/lightreg.h>
-
-#include <dev/cons.h>
-
-struct light_softc {
- struct device sc_dev;
-
- struct light_devconfig *sc_dc;
-
- int sc_nscreens;
- struct wsscreen_list sc_wsl;
- const struct wsscreen_descr *sc_scrlist[1];
-};
-
-struct light_devconfig {
- struct rasops_info dc_ri;
- uint32_t dc_defattr;
-
- uint32_t dc_addr;
- bus_space_tag_t dc_st;
- bus_space_handle_t dc_sh;
-
- int dc_boardrev;
-
- struct light_softc *dc_sc;
- struct wsscreen_descr dc_wsd;
-
- uint8_t dc_cmap[256 * 3];
-};
-
-/* always 1024x768x8 */
-#define LIGHT_XRES 1024
-#define LIGHT_YRES 768
-#define LIGHT_DEPTH 8
-
-int light_match(struct device *, void *, void *);
-void light_attach(struct device *, struct device *, void *);
-
-struct cfdriver light_cd = {
- NULL, "light", DV_DULL
-};
-
-const struct cfattach light_ca = {
- sizeof(struct light_softc), light_match, light_attach
-};
-
-/* wsdisplay_accessops */
-int light_ioctl(void *, u_long, caddr_t, int, struct proc *);
-paddr_t light_mmap(void *, off_t, int);
-int light_alloc_screen(void *, const struct wsscreen_descr *, void **,
- int *, int *, uint32_t *);
-void light_free_screen(void *, void *);
-int light_show_screen(void *, void *, int, void (*)(void *, int, int),
- void *);
-int light_load_font(void *, void *, struct wsdisplay_font *);
-int light_list_font(void *, struct wsdisplay_font *);
-void light_burner(void *, u_int, u_int);
-
-struct wsdisplay_accessops light_accessops = {
- .ioctl = light_ioctl,
- .mmap = light_mmap,
- .alloc_screen = light_alloc_screen,
- .free_screen = light_free_screen,
- .show_screen = light_show_screen,
- .load_font = light_load_font,
- .list_font = light_list_font,
- .burn_screen = light_burner
-};
-
-int light_do_cursor(struct rasops_info *);
-int light_putchar(void *, int, int, u_int, uint32_t);
-int light_copycols(void *, int, int, int, int);
-int light_erasecols(void *, int, int, int, uint32_t);
-int light_copyrows(void *, int, int, int);
-int light_eraserows(void *, int, int, uint32_t);
-
-static __inline__
-uint32_t rex_read(struct light_devconfig *, uint32_t, uint32_t);
-static __inline__
-void rex_write(struct light_devconfig *, uint32_t, uint32_t, uint32_t);
-uint8_t rex_vc1_sysctl_read(struct light_devconfig *);
-void rex_vc1_sysctl_write(struct light_devconfig *, uint8_t);
-static __inline__
-void rex_wait(struct light_devconfig *);
-static __inline__
-int rex_revision(struct light_devconfig *);
-void rex_copy_rect(struct light_devconfig *, int, int, int, int, int, int,
- int);
-void rex_fill_rect(struct light_devconfig *, int, int, int, int, int);
-
-int light_getcmap(struct light_devconfig *, struct wsdisplay_cmap *);
-void light_loadcmap(struct light_devconfig *, int, int);
-int light_putcmap(struct light_devconfig *, struct wsdisplay_cmap *);
-
-void light_attach_common(struct light_devconfig *, struct gio_attach_args *);
-void light_init_screen(struct light_devconfig *);
-
-static struct light_devconfig light_console_dc;
-
-#define LIGHT_IS_LG1(_rev) ((_rev) < 2) /* else LG2 */
-
-/*
- * REX routines and helper functions.
- */
-
-static __inline__
-uint32_t
-rex_read(struct light_devconfig *dc, uint32_t rset, uint32_t r)
-{
- return bus_space_read_4(dc->dc_st, dc->dc_sh, rset + r);
-}
-
-static __inline__
-void
-rex_write(struct light_devconfig *dc, uint32_t rset, uint32_t r, uint32_t v)
-{
- bus_space_write_4(dc->dc_st, dc->dc_sh, rset + r, v);
-}
-
-uint8_t
-rex_vc1_sysctl_read(struct light_devconfig *dc)
-{
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_CFGSEL, REX_CFGSEL_VC1_SYSCTL);
-
- rex_read(dc, REX_PAGE1_GO, REX_P1REG_VC1_ADDRDATA);
- return rex_read(dc, REX_PAGE1_SET, REX_P1REG_VC1_ADDRDATA);
-}
-
-void
-rex_vc1_sysctl_write(struct light_devconfig *dc, uint8_t val)
-{
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_CFGSEL, REX_CFGSEL_VC1_SYSCTL);
-
- rex_write(dc, REX_PAGE1_SET, REX_P1REG_VC1_ADDRDATA, val);
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_VC1_ADDRDATA, val);
-}
-
-static __inline__
-void
-rex_wait(struct light_devconfig *dc)
-{
- while (rex_read(dc, REX_PAGE1_SET,REX_P1REG_CFGMODE) & REX_CFGMODE_BUSY)
- continue;
-}
-
-static __inline__
-int
-rex_revision(struct light_devconfig *dc)
-{
- rex_write(dc, REX_PAGE1_SET, REX_P1REG_CFGSEL, REX_CFGSEL_VC1_LADDR);
- rex_read(dc, REX_PAGE1_GO, REX_P1REG_WCLOCKREV);
- return rex_read(dc, REX_PAGE1_SET, REX_P1REG_WCLOCKREV) & 0x7;
-}
-
-void
-rex_copy_rect(struct light_devconfig *dc, int from_x, int from_y, int to_x,
- int to_y, int width, int height, int rop)
-{
- int dx, dy, ystarti, yendi;
-
- dx = from_x - to_x;
- dy = from_y - to_y;
-
- if (to_y > from_y) {
- ystarti = to_y + height - 1;
- yendi = to_y;
- } else {
- ystarti = to_y;
- yendi = to_y + height - 1;
- }
-
- rex_wait(dc);
-
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_XSTARTI, to_x);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_XENDI, to_x + width - 1);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_YSTARTI, ystarti);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_YENDI, yendi);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_COMMAND, REX_OP_DRAW |
- REX_OP_FLG_LOGICSRC | REX_OP_FLG_QUADMODE |
- REX_OP_FLG_BLOCK | REX_OP_FLG_STOPONX | REX_OP_FLG_STOPONY |
- (rop << REX_LOGICOP_SHIFT));
- rex_write(dc, REX_PAGE0_GO, REX_P0REG_XYMOVE,
- ((dx << 16) & 0xffff0000) | (dy & 0x0000ffff));
-}
-
-void
-rex_fill_rect(struct light_devconfig *dc, int from_x, int from_y, int to_x,
- int to_y, int bg)
-{
- struct rasops_info *ri = &dc->dc_ri;
-
- rex_wait(dc);
-
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_YSTARTI, from_y);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_YENDI, to_y - 1);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_XSTARTI, from_x);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_XENDI, to_x - 1);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_COLORREDI,
- ri->ri_devcmap[bg] & 0xff);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_COMMAND, REX_OP_DRAW |
- REX_OP_FLG_QUADMODE | REX_OP_FLG_BLOCK |
- REX_OP_FLG_STOPONX | REX_OP_FLG_STOPONY |
- (OPENGL_LOGIC_OP_COPY << REX_LOGICOP_SHIFT));
- rex_read(dc, REX_PAGE0_GO, REX_P0REG_COMMAND);
-}
-
-/*
- * Colormap routines
- */
-
-int
-light_getcmap(struct light_devconfig *dc, struct wsdisplay_cmap *cm)
-{
- u_int index = cm->index, count = cm->count, i;
- u_int colcount = 1 << dc->dc_ri.ri_depth;
- int rc;
- u_int8_t color[256], *c, *r;
-
- if (index >= colcount || count > colcount - index)
- return EINVAL;
-
- c = dc->dc_cmap + 0 + index * 3;
- for (i = count, r = color; i != 0; i--) {
- *r++ = *c;
- c += 3;
- }
- if ((rc = copyout(color, cm->red, count)) != 0)
- return rc;
-
- c = dc->dc_cmap + 1 + index * 3;
- for (i = count, r = color; i != 0; i--) {
- *r++ = *c;
- c += 3;
- }
- if ((rc = copyout(color, cm->green, count)) != 0)
- return rc;
-
- c = dc->dc_cmap + 2 + index * 3;
- for (i = count, r = color; i != 0; i--) {
- *r++ = *c;
- c += 3;
- }
- if ((rc = copyout(color, cm->blue, count)) != 0)
- return rc;
-
- return 0;
-}
-
-int
-light_putcmap(struct light_devconfig *dc, struct wsdisplay_cmap *cm)
-{
- u_int index = cm->index, count = cm->count;
- u_int colcount = 1 << dc->dc_ri.ri_depth;
- int i, rc;
- u_int8_t r[256], g[256], b[256], *nr, *ng, *nb, *c;
-
- if (index >= colcount || count > colcount - index)
- return EINVAL;
-
- if ((rc = copyin(cm->red, r, count)) != 0)
- return rc;
- if ((rc = copyin(cm->green, g, count)) != 0)
- return rc;
- if ((rc = copyin(cm->blue, b, count)) != 0)
- return rc;
-
- nr = r, ng = g, nb = b;
- c = dc->dc_cmap + index * 3;
- for (i = count; i != 0; i--) {
- *c++ = *nr++;
- *c++ = *ng++;
- *c++ = *nb++;
- }
-
- return 0;
-}
-
-void
-light_loadcmap(struct light_devconfig *dc, int from, int count)
-{
- u_int8_t *cmap = dc->dc_cmap;
-
- /* XXX should wait for retrace first */
-
- cmap += 3 * from;
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_CFGSEL, REX_CFGSEL_DAC_WADDR);
- rex_write(dc, REX_PAGE1_SET, REX_P1REG_DAC_ADDRDATA, from);
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_DAC_ADDRDATA, from);
-
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_CFGSEL, REX_CFGSEL_DAC_CMAP);
- while (count-- > 0) {
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_DAC_ADDRDATA, *cmap);
- rex_write(dc, REX_PAGE1_SET, REX_P1REG_DAC_ADDRDATA, *cmap++);
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_DAC_ADDRDATA, *cmap);
- rex_write(dc, REX_PAGE1_SET, REX_P1REG_DAC_ADDRDATA, *cmap++);
- rex_write(dc, REX_PAGE1_GO, REX_P1REG_DAC_ADDRDATA, *cmap);
- rex_write(dc, REX_PAGE1_SET, REX_P1REG_DAC_ADDRDATA, *cmap++);
- }
-}
-
-/*
- * Autoconf and console glue
- */
-
-int
-light_match(struct device *parent, void *vcf, void *aux)
-{
- struct gio_attach_args *ga = aux;
-
- if (ga->ga_product != GIO_PRODUCT_FAKEID_LIGHT)
- return 0;
-
- return 1;
-}
-
-void
-light_attach(struct device *parent, struct device *self, void *aux)
-{
- struct light_softc *sc = (struct light_softc *)self;
- struct gio_attach_args *ga = aux;
- struct light_devconfig *dc;
- struct wsemuldisplaydev_attach_args waa;
- extern struct consdev wsdisplay_cons;
-
- if (cn_tab == &wsdisplay_cons &&
- ga->ga_addr == light_console_dc.dc_addr) {
- waa.console = 1;
- dc = &light_console_dc;
- sc->sc_nscreens = 1;
- } else {
- waa.console = 0;
- dc = malloc(sizeof(struct light_devconfig), M_DEVBUF,
- M_WAITOK | M_ZERO);
- light_attach_common(dc, ga);
- light_init_screen(dc);
- }
- sc->sc_dc = dc;
- dc->dc_sc = sc;
-
- if (ga->ga_descr != NULL && *ga->ga_descr != '\0')
- printf(": %s", ga->ga_descr);
- else
- printf(": LG%dMC\n",
- LIGHT_IS_LG1(sc->sc_dc->dc_boardrev) ? 1 : 2);
- printf(", revision %d\n", dc->dc_boardrev);
- printf("%s: %dx%d, %dbpp\n", self->dv_xname,
- dc->dc_ri.ri_width, dc->dc_ri.ri_height, dc->dc_ri.ri_depth);
-
- sc->sc_scrlist[0] = &dc->dc_wsd;
- sc->sc_wsl.nscreens = 1;
- sc->sc_wsl.screens = sc->sc_scrlist;
-
- waa.scrdata = &sc->sc_wsl;
- waa.accessops = &light_accessops;
- waa.accesscookie = dc;
- waa.defaultscreens = 0;
-
- config_found(self, &waa, wsemuldisplaydevprint);
-}
-
-int
-light_cnprobe(struct gio_attach_args *ga)
-{
- return light_match(NULL, NULL, ga);
-}
-
-int
-light_cnattach(struct gio_attach_args *ga)
-{
- struct rasops_info *ri = &light_console_dc.dc_ri;
- uint32_t defattr;
-
- light_attach_common(&light_console_dc, ga);
- light_init_screen(&light_console_dc);
-
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &defattr);
- wsdisplay_cnattach(&light_console_dc.dc_wsd, ri, 0, 0, defattr);
-
- return 0;
-}
-
-void
-light_attach_common(struct light_devconfig *dc, struct gio_attach_args *ga)
-{
- dc->dc_addr = ga->ga_addr;
- dc->dc_st = ga->ga_iot;
- dc->dc_sh = ga->ga_ioh;
-
- dc->dc_boardrev = rex_revision(dc);
-
- rex_vc1_sysctl_write(dc, rex_vc1_sysctl_read(dc) &
- ~(VC1_SYSCTL_CURSOR | VC1_SYSCTL_CURSOR_ON));
-}
-
-void
-light_init_screen(struct light_devconfig *dc)
-{
- struct rasops_info *ri = &dc->dc_ri;
-
- memset(ri, 0, sizeof(struct rasops_info));
- ri->ri_hw = dc;
- ri->ri_flg = RI_CENTER | RI_FULLCLEAR;
- /* for the proper operation of rasops computations, pretend 8bpp */
- ri->ri_depth = 8;
- ri->ri_stride = LIGHT_XRES;
- ri->ri_width = LIGHT_XRES;
- ri->ri_height = LIGHT_YRES;
-
- rasops_init(ri, 160, 160);
-
- ri->ri_do_cursor = light_do_cursor;
- ri->ri_ops.copyrows = light_copyrows;
- ri->ri_ops.eraserows = light_eraserows;
- ri->ri_ops.copycols = light_copycols;
- ri->ri_ops.erasecols = light_erasecols;
- ri->ri_ops.putchar = light_putchar;
-
- strlcpy(dc->dc_wsd.name, "std", sizeof(dc->dc_wsd.name));
- dc->dc_wsd.ncols = ri->ri_cols;
- dc->dc_wsd.nrows = ri->ri_rows;
- dc->dc_wsd.textops = &ri->ri_ops;
- dc->dc_wsd.fontwidth = ri->ri_font->fontwidth;
- dc->dc_wsd.fontheight = ri->ri_font->fontheight;
- dc->dc_wsd.capabilities = ri->ri_caps;
-
- memcpy(dc->dc_cmap, rasops_cmap, sizeof(dc->dc_cmap));
- light_loadcmap(dc, 0, 1 << ri->ri_depth);
-
- rex_fill_rect(dc, 0, 0, ri->ri_width, ri->ri_height, WSCOL_BLACK);
-}
-
-/*
- * wsdisplay_emulops
- */
-
-int
-light_do_cursor(struct rasops_info *ri)
-{
- struct light_devconfig *dc = ri->ri_hw;
- int x, y, w, h;
-
- w = ri->ri_font->fontwidth;
- h = ri->ri_font->fontheight;
- x = ri->ri_ccol * w + ri->ri_xorigin;
- y = ri->ri_crow * h + ri->ri_yorigin;
-
- rex_copy_rect(dc, x, y, x, y, w, h, OPENGL_LOGIC_OP_COPY_INVERTED);
-
- return 0;
-}
-
-int
-light_putchar(void *c, int row, int col, u_int ch, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct light_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- uint8_t *bitmap;
- uint32_t pattern;
- int x = col * font->fontwidth + ri->ri_xorigin;
- int y = row * font->fontheight + ri->ri_yorigin;
- int i;
- int bg, fg, ul;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, &ul);
-
- if ((ch == ' ' || ch == 0) && ul == 0) {
- rex_fill_rect(dc, x, y, x + font->fontwidth,
- y + font->fontheight, bg);
- return 0;
- }
-
- rex_wait(dc);
-
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_YSTARTI, y);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_YENDI, y + font->fontheight - 1);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_XSTARTI, x);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_XENDI, x + font->fontwidth - 1);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_COLORREDI,
- ri->ri_devcmap[fg] & 0xff);
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_COLORBACK,
- ri->ri_devcmap[bg] & 0xff);
- rex_write(dc, REX_PAGE0_GO, REX_P0REG_COMMAND, REX_OP_NOP);
-
- rex_wait(dc);
-
- rex_write(dc, REX_PAGE0_SET, REX_P0REG_COMMAND, REX_OP_DRAW |
- REX_OP_FLG_ENZPATTERN | REX_OP_FLG_QUADMODE |
- REX_OP_FLG_XYCONTINUE | REX_OP_FLG_STOPONX | REX_OP_FLG_BLOCK |
- REX_OP_FLG_LENGTH32 | REX_OP_FLG_ZOPAQUE |
- (OPENGL_LOGIC_OP_COPY << REX_LOGICOP_SHIFT));
-
- bitmap = (uint8_t *)font->data +
- (ch - font->firstchar) * ri->ri_fontscale;
- if (font->fontwidth <= 8) {
- for (i = font->fontheight; i != 0; i--) {
- if (ul && i == 1)
- pattern = 0xff;
- else
- pattern = *bitmap;
- rex_write(dc, REX_PAGE0_GO, REX_P0REG_ZPATTERN,
- pattern << 24);
- bitmap += font->stride;
- }
- } else {
- for (i = font->fontheight; i != 0; i--) {
- if (ul && i == 1)
- pattern = 0xffff;
- else
- pattern = *(uint16_t *)bitmap;
- rex_write(dc, REX_PAGE0_GO, REX_P0REG_ZPATTERN,
- pattern << 16);
- bitmap += font->stride;
- }
- }
-
- return 0;
-}
-
-/* copy set of columns within the same line */
-int
-light_copycols(void *c, int row, int srccol, int dstcol, int ncols)
-{
- struct rasops_info *ri = c;
- struct light_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int from_x, to_x, y, width, height;
-
- from_x = ri->ri_xorigin + srccol * font->fontwidth;
- to_x = ri->ri_xorigin + dstcol * font->fontwidth;
- y = ri->ri_yorigin + row * font->fontheight;
- width = ncols * font->fontwidth;
- height = font->fontheight;
-
- rex_copy_rect(dc, from_x, y, to_x, y, width, height,
- OPENGL_LOGIC_OP_COPY);
-
- return 0;
-}
-
-/* erase a set of columns in the same line */
-int
-light_erasecols(void *c, int row, int startcol, int ncols, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct light_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int from_x, from_y, to_x, to_y;
- int bg, fg;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, NULL);
-
- from_x = ri->ri_xorigin + startcol * font->fontwidth;
- from_y = ri->ri_yorigin + row * font->fontheight;
- to_x = from_x + ncols * font->fontwidth;
- to_y = from_y + font->fontheight;
-
- rex_fill_rect(dc, from_x, from_y, to_x, to_y, bg);
-
- return 0;
-}
-
-/* copy a set of complete rows */
-int
-light_copyrows(void *c, int srcrow, int dstrow, int nrows)
-{
- struct rasops_info *ri = c;
- struct light_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int x, from_y, to_y, width, height;
-
- x = ri->ri_xorigin;
- from_y = ri->ri_yorigin + srcrow * font->fontheight;
- to_y = ri->ri_yorigin + dstrow * font->fontheight;
- width = ri->ri_emuwidth;
- height = nrows * font->fontheight;
-
- rex_copy_rect(dc, x, from_y, x, to_y, width, height,
- OPENGL_LOGIC_OP_COPY);
-
- return 0;
-}
-
-/* erase a set of complete rows */
-int
-light_eraserows(void *c, int row, int nrows, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct light_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int bg, fg;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, NULL);
-
- if (nrows == ri->ri_rows && (ri->ri_flg & RI_FULLCLEAR)) {
- rex_fill_rect(dc, 0, 0, ri->ri_width, ri->ri_height, bg);
- return 0;
- }
-
- rex_fill_rect(dc, ri->ri_xorigin,
- ri->ri_yorigin + row * font->fontheight,
- ri->ri_xorigin + ri->ri_emuwidth,
- ri->ri_yorigin + (row + nrows) * font->fontheight, bg);
-
- return 0;
-}
-
-/*
- * wsdisplay_accessops
- */
-
-int
-light_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
-{
- struct light_devconfig *dc = v;
- struct wsdisplay_fbinfo *fb;
- struct wsdisplay_cmap *cm;
- int rc;
-
- switch (cmd) {
- case WSDISPLAYIO_GTYPE:
- *(u_int *)data = WSDISPLAY_TYPE_LIGHT;
- break;
- case WSDISPLAYIO_GINFO:
- fb = (struct wsdisplay_fbinfo *)data;
- fb->width = dc->dc_ri.ri_width;
- fb->height = dc->dc_ri.ri_height;
- fb->depth = dc->dc_ri.ri_depth;
- fb->cmsize = 1 << fb->depth;
- break;
- case WSDISPLAYIO_GETCMAP:
- cm = (struct wsdisplay_cmap *)data;
- rc = light_getcmap(dc, cm);
- if (rc != 0)
- return rc;
- break;
- case WSDISPLAYIO_PUTCMAP:
- cm = (struct wsdisplay_cmap *)data;
- rc = light_putcmap(dc, cm);
- if (rc != 0)
- return rc;
- light_loadcmap(dc, cm->index, cm->count);
- break;
- default:
- return -1;
- }
-
- return 0;
-}
-
-paddr_t
-light_mmap(void *v, off_t off, int prot)
-{
- return -1;
-}
-
-int
-light_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep,
- int *curxp, int *curyp, uint32_t *attrp)
-{
- struct light_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
- struct light_softc *sc = dc->dc_sc;
-
- if (sc->sc_nscreens > 0)
- return ENOMEM;
-
- sc->sc_nscreens++;
-
- *cookiep = ri;
- *curxp = *curyp = 0;
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &dc->dc_defattr);
- *attrp = dc->dc_defattr;
-
- return 0;
-}
-
-void
-light_free_screen(void *v, void *cookie)
-{
-}
-
-int
-light_show_screen(void *v, void *cookie, int waitok,
- void (*cb)(void *, int, int), void *cbarg)
-{
- return 0;
-}
-
-int
-light_load_font(void *v, void *emulcookie, struct wsdisplay_font *font)
-{
- struct light_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
-
- return rasops_load_font(ri, emulcookie, font);
-}
-
-int
-light_list_font(void *v, struct wsdisplay_font *font)
-{
- struct light_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
-
- return rasops_list_font(ri, font);
-}
-
-void
-light_burner(void *v, u_int on, u_int flags)
-{
- struct light_devconfig *dc = v;
-
- if (on)
- rex_vc1_sysctl_write(dc, rex_vc1_sysctl_read(dc) |
- VC1_SYSCTL_VIDEO_ON);
- else
- rex_vc1_sysctl_write(dc, rex_vc1_sysctl_read(dc) &
- ~VC1_SYSCTL_VIDEO_ON);
-}
+++ /dev/null
-/* $OpenBSD: lightreg.h,v 1.2 2014/03/18 23:23:09 miod Exp $ */
-/* $NetBSD: lightreg.h,v 1.3 2006/12/29 00:31:48 rumble Exp $ */
-
-/*
- * Copyright (c) 2006 Stephen M. Rumble
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#define LIGHT_ADDR_0 0x1f3f0000
-#define LIGHT_ADDR_1 0x1f3f8000 /* dual head */
-#define LIGHT_SIZE 0x00008000
-
-#define REX_PAGE0_SET 0x00000000 /* REX registers */
-#define REX_PAGE0_GO 0x00000800
-#define REX_PAGE1_SET 0x00004790 /* configuration registers */
-#define REX_PAGE1_GO 0x00004F90
-
-/* REX register offsets (from REX_PAGE0_{SET,GO}) */
-#define REX_P0REG_COMMAND 0x00000000
-#define REX_P0REG_XSTARTI 0x0000000C
-#define REX_P0REG_YSTARTI 0x0000001C
-#define REX_P0REG_XYMOVE 0x00000034
-#define REX_P0REG_COLORREDI 0x00000038
-#define REX_P0REG_COLORGREENI 0x00000040
-#define REX_P0REG_COLORBLUEI 0x00000048
-#define REX_P0REG_COLORBACK 0x0000005C
-#define REX_P0REG_ZPATTERN 0x00000060
-#define REX_P0REG_XENDI 0x00000084
-#define REX_P0REG_YENDI 0x00000088
-
-/* configuration register offsets (from REX_PAGE1_{SET,GO}) */
-#define REX_P1REG_WCLOCKREV 0x00000054 /* nsclock / revision */
-#define REX_P1REG_DAC_ADDRDATA 0x00000058 /* DAC r/w addr and data 8bit */
-#define REX_P1REG_CFGSEL 0x0000005c /* function selector */
-#define REX_P1REG_VC1_ADDRDATA 0x00000060 /* vc1 r/w addr and data 8bit */
-#define REX_P1REG_CFGMODE 0x00000068 /* REX system config */
-#define REX_P1REG_XYOFFSET 0x0000006c /* x, y start of screen */
-
-/* REX opcodes */
-#define REX_OP_NOP 0x00000000
-#define REX_OP_DRAW 0x00000001
-
-/* REX command flags */
-#define REX_OP_FLG_BLOCK 0x00000008
-#define REX_OP_FLG_LENGTH32 0x00000010
-#define REX_OP_FLG_QUADMODE 0x00000020
-#define REX_OP_FLG_XYCONTINUE 0x00000080
-#define REX_OP_FLG_STOPONX 0x00000100
-#define REX_OP_FLG_STOPONY 0x00000200
-#define REX_OP_FLG_ENZPATTERN 0x00000400
-#define REX_OP_FLG_LOGICSRC 0x00080000
-#define REX_OP_FLG_ZOPAQUE 0x00800000
-#define REX_OP_FLG_ZCONTINUE 0x01000000
-
-/* REX logicops */
-#define REX_LOGICOP_SHIFT 28
-
-/* configmode bits */
-#define REX_CFGMODE_BUSY 0x00000001
-
-/* configsel bits */
-#define REX_CFGSEL_VC1_LADDR 0x00000004 /* low address bits */
-#define REX_CFGSEL_VC1_HADDR 0x00000005 /* high address bits */
-#define REX_CFGSEL_VC1_SYSCTL 0x00000006
-#define REX_CFGSEL_DAC_WADDR 0x00000000 /* write address */
-#define REX_CFGSEL_DAC_CMAP 0x00000001 /* colormap data */
-#define REX_CFGSEL_DAC_PMASK 0x00000002 /* pixel read mask */
-#define REX_CFGSEL_DAC_RADDR 0x00000003 /* read address */
-#define REX_CFGSEL_DAC_OVWADDR 0x00000004 /* overlay write address */
-#define REX_CFGSEL_DAC_OV 0x00000005 /* overlay registers */
-#define REX_CFGSEL_DAC_CTL 0x00000006 /* control registers */
-#define REX_CFGSEL_DAC_OVRADDR 0x00000007 /* overlay read address */
-
-/* vc1 sysctl bits (byte) */
-#define VC1_SYSCTL_VIDEO_ON 0x04
-#define VC1_SYSCTL_CURSOR 0x10
-#define VC1_SYSCTL_CURSOR_ON 0x20
+++ /dev/null
-/* $OpenBSD: lightvar.h,v 1.1 2012/04/17 15:36:55 miod Exp $ */
-/* $NetBSD: lightvar.h,v 1.2 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2006 Stephen M. Rumble
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-int light_cnattach(struct gio_attach_args *);
-int light_cnprobe(struct gio_attach_args *);
+++ /dev/null
-/* $OpenBSD: newport.c,v 1.13 2020/05/25 09:55:48 jsg Exp $ */
-/* $NetBSD: newport.c,v 1.15 2009/05/12 23:51:25 macallan Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2003 Ilpo Ruotsalainen
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <machine/autoconf.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsdisplayvar.h>
-#include <dev/rasops/rasops.h>
-
-#include <sgi/dev/gl.h>
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giovar.h>
-#include <sgi/gio/newportreg.h>
-#include <sgi/gio/newportvar.h>
-
-#include <dev/cons.h>
-
-struct newport_softc {
- struct device sc_dev;
-
- struct newport_devconfig *sc_dc;
-
- int sc_nscreens;
- struct wsscreen_list sc_wsl;
- const struct wsscreen_descr *sc_scrlist[1];
-};
-
-struct newport_devconfig {
- struct rasops_info dc_ri;
- uint32_t dc_defattr;
-
- uint32_t dc_addr;
- bus_space_tag_t dc_st;
- bus_space_handle_t dc_sh;
-
- int dc_xres;
- int dc_yres;
- int dc_depth;
-
-#ifdef notyet
- int dc_mode;
-#endif
-
- int dc_boardrev;
- int dc_vc2rev;
- int dc_xmaprev;
-
- struct newport_softc *dc_sc;
- struct wsscreen_descr dc_wsd;
-};
-
-int newport_match(struct device *, void *, void *);
-void newport_attach(struct device *, struct device *, void *);
-
-struct cfdriver newport_cd = {
- NULL, "newport", DV_DULL
-};
-
-const struct cfattach newport_ca = {
- sizeof(struct newport_softc), newport_match, newport_attach
-};
-
-/* accessops */
-int newport_ioctl(void *, u_long, caddr_t, int, struct proc *);
-paddr_t newport_mmap(void *, off_t, int);
-int newport_alloc_screen(void *, const struct wsscreen_descr *, void **,
- int *, int *, uint32_t *);
-void newport_free_screen(void *, void *);
-int newport_show_screen(void *, void *, int, void (*)(void *, int, int),
- void *);
-int newport_load_font(void *, void *, struct wsdisplay_font *);
-int newport_list_font(void *, struct wsdisplay_font *);
-
-struct wsdisplay_accessops newport_accessops = {
- .ioctl = newport_ioctl,
- .mmap = newport_mmap,
- .alloc_screen = newport_alloc_screen,
- .free_screen = newport_free_screen,
- .show_screen = newport_show_screen,
- .load_font = newport_load_font,
- .list_font = newport_list_font
-};
-
-int newport_do_cursor(struct rasops_info *);
-int newport_putchar(void *, int, int, u_int, uint32_t);
-int newport_copycols(void *, int, int, int, int);
-int newport_erasecols(void *, int, int, int, uint32_t);
-int newport_copyrows(void *, int, int, int);
-int newport_eraserows(void *, int, int, uint32_t);
-
-static __inline__
-void rex3_write(struct newport_devconfig *, bus_size_t, uint32_t);
-static __inline__
-void rex3_write_go(struct newport_devconfig *, bus_size_t, uint32_t);
-static __inline__
-uint32_t rex3_read(struct newport_devconfig *, bus_size_t);
-int rex3_wait_gfifo(struct newport_devconfig *, const char *);
-
-void vc2_write_ireg(struct newport_devconfig *, uint8_t, uint16_t);
-uint16_t vc2_read_ireg(struct newport_devconfig *, uint8_t);
-uint16_t vc2_read_ram(struct newport_devconfig *, uint16_t);
-void vc2_write_ram(struct newport_devconfig *, uint16_t, uint16_t);
-uint32_t xmap9_read(struct newport_devconfig *, int);
-void xmap9_write(struct newport_devconfig *, int, uint8_t);
-void xmap9_write_mode(struct newport_devconfig *, uint8_t, uint32_t);
-
-void newport_attach_common(struct newport_devconfig *,
- struct gio_attach_args *);
-int newport_bitblt(struct newport_devconfig *, int, int, int, int, int, int,
- int);
-void newport_cmap_setrgb(struct newport_devconfig *, int, uint8_t, uint8_t,
- uint8_t);
-int newport_fill_rectangle(struct newport_devconfig *, int, int, int, int,
- int);
-void newport_get_resolution(struct newport_devconfig *);
-int newport_init_screen(struct newport_devconfig *);
-void newport_setup_hw(struct newport_devconfig *);
-
-static struct newport_devconfig newport_console_dc;
-
-/**** Low-level hardware register groveling functions ****/
-static __inline__ void
-rex3_write(struct newport_devconfig *dc, bus_size_t rexreg, uint32_t val)
-{
- bus_space_write_4(dc->dc_st, dc->dc_sh, NEWPORT_REX3_OFFSET + rexreg,
- val);
-}
-
-static __inline__ void
-rex3_write_go(struct newport_devconfig *dc, bus_size_t rexreg, uint32_t val)
-{
- rex3_write(dc, rexreg + REX3_REG_GO, val);
-}
-
-static __inline__ uint32_t
-rex3_read(struct newport_devconfig *dc, bus_size_t rexreg)
-{
- return bus_space_read_4(dc->dc_st, dc->dc_sh, NEWPORT_REX3_OFFSET +
- rexreg);
-}
-
-int
-rex3_wait_gfifo(struct newport_devconfig *dc, const char *from)
-{
- unsigned int iter;
- uint32_t rxstatus;
-
- for (iter = 100000; iter != 0; iter--) {
- rxstatus = rex3_read(dc, REX3_REG_STATUS);
- if ((rxstatus &
- (REX3_STATUS_GFXBUSY | REX3_STATUS_FIFOLEVEL_MASK)) == 0)
- return 0;
- }
-
-#ifdef DEBUG
- printf("%s: failed to idle, %05x\n", from, rxstatus);
-#endif
- return EAGAIN;
-}
-
-void
-vc2_write_ireg(struct newport_devconfig *dc, uint8_t ireg, uint16_t val)
-{
- rex3_write(dc, REX3_REG_DCBMODE,
- REX3_DCBMODE_DW_3 | REX3_DCBMODE_ENCRSINC |
- (NEWPORT_DCBADDR_VC2 << REX3_DCBMODE_DCBADDR_SHIFT) |
- (VC2_DCBCRS_INDEX << REX3_DCBMODE_DCBCRS_SHIFT) |
- REX3_DCBMODE_ENASYNCACK | (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- rex3_write(dc, REX3_REG_DCBDATA0, (ireg << 24) | (val << 8));
-}
-
-uint16_t
-vc2_read_ireg(struct newport_devconfig *dc, uint8_t ireg)
-{
- rex3_write(dc, REX3_REG_DCBMODE,
- REX3_DCBMODE_DW_1 | REX3_DCBMODE_ENCRSINC |
- (NEWPORT_DCBADDR_VC2 << REX3_DCBMODE_DCBADDR_SHIFT) |
- (VC2_DCBCRS_INDEX << REX3_DCBMODE_DCBCRS_SHIFT) |
- REX3_DCBMODE_ENASYNCACK | (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- rex3_write(dc, REX3_REG_DCBDATA0, ireg << 24);
-
- rex3_write(dc, REX3_REG_DCBMODE,
- REX3_DCBMODE_DW_2 | REX3_DCBMODE_ENCRSINC |
- (NEWPORT_DCBADDR_VC2 << REX3_DCBMODE_DCBADDR_SHIFT) |
- (VC2_DCBCRS_IREG << REX3_DCBMODE_DCBCRS_SHIFT) |
- REX3_DCBMODE_ENASYNCACK | (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- return (uint16_t)(rex3_read(dc, REX3_REG_DCBDATA0) >> 16);
-}
-
-uint16_t
-vc2_read_ram(struct newport_devconfig *dc, uint16_t addr)
-{
- vc2_write_ireg(dc, VC2_IREG_RAM_ADDRESS, addr);
-
- rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_2 |
- (NEWPORT_DCBADDR_VC2 << REX3_DCBMODE_DCBADDR_SHIFT) |
- (VC2_DCBCRS_RAM << REX3_DCBMODE_DCBCRS_SHIFT) |
- REX3_DCBMODE_ENASYNCACK | (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- return (uint16_t)(rex3_read(dc, REX3_REG_DCBDATA0) >> 16);
-}
-
-#if 0
-void
-vc2_write_ram(struct newport_devconfig *dc, uint16_t addr, uint16_t val)
-{
- vc2_write_ireg(dc, VC2_IREG_RAM_ADDRESS, addr);
-
- rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_2 |
- (NEWPORT_DCBADDR_VC2 << REX3_DCBMODE_DCBADDR_SHIFT) |
- (VC2_DCBCRS_RAM << REX3_DCBMODE_DCBCRS_SHIFT) |
- REX3_DCBMODE_ENASYNCACK | (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- rex3_write(dc, REX3_REG_DCBDATA0, val << 16);
-}
-#endif
-
-uint32_t
-xmap9_read(struct newport_devconfig *dc, int crs)
-{
- rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_1 |
- (NEWPORT_DCBADDR_XMAP_0 << REX3_DCBMODE_DCBADDR_SHIFT) |
- (crs << REX3_DCBMODE_DCBCRS_SHIFT) |
- (3 << REX3_DCBMODE_CSWIDTH_SHIFT) |
- (2 << REX3_DCBMODE_CSHOLD_SHIFT) |
- (1 << REX3_DCBMODE_CSSETUP_SHIFT));
- return rex3_read(dc, REX3_REG_DCBDATA0);
-}
-
-void
-xmap9_write(struct newport_devconfig *dc, int crs, uint8_t val)
-{
- rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_1 |
- (NEWPORT_DCBADDR_XMAP_BOTH << REX3_DCBMODE_DCBADDR_SHIFT) |
- (crs << REX3_DCBMODE_DCBCRS_SHIFT) |
- (3 << REX3_DCBMODE_CSWIDTH_SHIFT) |
- (2 << REX3_DCBMODE_CSHOLD_SHIFT) |
- (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- rex3_write(dc, REX3_REG_DCBDATA0, val << 24);
-}
-
-void
-xmap9_write_mode(struct newport_devconfig *dc, uint8_t index, uint32_t mode)
-{
- rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_4 |
- (NEWPORT_DCBADDR_XMAP_BOTH << REX3_DCBMODE_DCBADDR_SHIFT) |
- (XMAP9_DCBCRS_MODE_SETUP << REX3_DCBMODE_DCBCRS_SHIFT) |
- (3 << REX3_DCBMODE_CSWIDTH_SHIFT) |
- (2 << REX3_DCBMODE_CSHOLD_SHIFT) |
- (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- rex3_write(dc, REX3_REG_DCBDATA0, (index << 24) | mode);
-}
-
-/**** Helper functions ****/
-int
-newport_fill_rectangle(struct newport_devconfig *dc, int x1, int y1, int x2,
- int y2, int bg)
-{
- struct rasops_info *ri = &dc->dc_ri;
-
- if (rex3_wait_gfifo(dc, __func__) != 0)
- return EAGAIN;
-
- rex3_write(dc, REX3_REG_DRAWMODE0, REX3_DRAWMODE0_OPCODE_DRAW |
- REX3_DRAWMODE0_ADRMODE_BLOCK | REX3_DRAWMODE0_DOSETUP |
- REX3_DRAWMODE0_STOPONX | REX3_DRAWMODE0_STOPONY);
- rex3_write(dc, REX3_REG_DRAWMODE1, REX3_DRAWMODE1_PLANES_CI |
- REX3_DRAWMODE1_DD_DD8 | REX3_DRAWMODE1_RWPACKED |
- REX3_DRAWMODE1_HD_HD8 | REX3_DRAWMODE1_COMPARE_LT |
- REX3_DRAWMODE1_COMPARE_EQ | REX3_DRAWMODE1_COMPARE_GT |
- (OPENGL_LOGIC_OP_COPY << REX3_DRAWMODE1_LOGICOP_SHIFT));
- rex3_write(dc, REX3_REG_WRMASK, 0xffffffff);
- rex3_write(dc, REX3_REG_COLORI, ri->ri_devcmap[bg] & 0xff);
- rex3_write(dc, REX3_REG_XYSTARTI, (x1 << REX3_XYSTARTI_XSHIFT) | y1);
-
- rex3_write_go(dc, REX3_REG_XYENDI, (x2 << REX3_XYENDI_XSHIFT) | y2);
-
- return 0;
-}
-
-int
-newport_bitblt(struct newport_devconfig *dc, int xs, int ys, int xd,
- int yd, int wi, int he, int rop)
-{
- int xe, ye;
- uint32_t tmp;
-
- if (rex3_wait_gfifo(dc, __func__) != 0)
- return EAGAIN;
-
- if (yd > ys) {
- /* need to copy bottom up */
- ye = ys;
- yd += he - 1;
- ys += he - 1;
- } else
- ye = ys + he - 1;
-
- if (xd > xs) {
- /* need to copy right to left */
- xe = xs;
- xd += wi - 1;
- xs += wi - 1;
- } else
- xe = xs + wi - 1;
-
- rex3_write(dc, REX3_REG_DRAWMODE0, REX3_DRAWMODE0_OPCODE_SCR2SCR |
- REX3_DRAWMODE0_ADRMODE_BLOCK | REX3_DRAWMODE0_DOSETUP |
- REX3_DRAWMODE0_STOPONX | REX3_DRAWMODE0_STOPONY);
- rex3_write(dc, REX3_REG_DRAWMODE1, REX3_DRAWMODE1_PLANES_CI |
- REX3_DRAWMODE1_DD_DD8 | REX3_DRAWMODE1_RWPACKED |
- REX3_DRAWMODE1_HD_HD8 | REX3_DRAWMODE1_COMPARE_LT |
- REX3_DRAWMODE1_COMPARE_EQ | REX3_DRAWMODE1_COMPARE_GT |
- (rop << REX3_DRAWMODE1_LOGICOP_SHIFT));
- rex3_write(dc, REX3_REG_XYSTARTI, (xs << REX3_XYSTARTI_XSHIFT) | ys);
- rex3_write(dc, REX3_REG_XYENDI, (xe << REX3_XYENDI_XSHIFT) | ye);
-
- tmp = (yd - ys) & 0xffff;
- tmp |= (xd - xs) << REX3_XYMOVE_XSHIFT;
-
- rex3_write_go(dc, REX3_REG_XYMOVE, tmp);
-
- return 0;
-}
-
-void
-newport_cmap_setrgb(struct newport_devconfig *dc, int index, uint8_t r,
- uint8_t g, uint8_t b)
-{
- rex3_write(dc, REX3_REG_DCBMODE,
- REX3_DCBMODE_DW_2 | REX3_DCBMODE_ENCRSINC |
- (NEWPORT_DCBADDR_CMAP_BOTH << REX3_DCBMODE_DCBADDR_SHIFT) |
- (CMAP_DCBCRS_ADDRESS_LOW << REX3_DCBMODE_DCBCRS_SHIFT) |
- (1 << REX3_DCBMODE_CSWIDTH_SHIFT) |
- (1 << REX3_DCBMODE_CSHOLD_SHIFT) |
- (1 << REX3_DCBMODE_CSSETUP_SHIFT) | REX3_DCBMODE_SWAPENDIAN);
-
- rex3_write(dc, REX3_REG_DCBDATA0, index << 16);
-
- rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_3 |
- (NEWPORT_DCBADDR_CMAP_BOTH << REX3_DCBMODE_DCBADDR_SHIFT) |
- (CMAP_DCBCRS_PALETTE << REX3_DCBMODE_DCBCRS_SHIFT) |
- (1 << REX3_DCBMODE_CSWIDTH_SHIFT) |
- (1 << REX3_DCBMODE_CSHOLD_SHIFT) |
- (1 << REX3_DCBMODE_CSSETUP_SHIFT));
-
- rex3_write(dc, REX3_REG_DCBDATA0, (r << 24) | (g << 16) | (b << 8));
-}
-
-void
-newport_get_resolution(struct newport_devconfig *dc)
-{
- uint16_t vep, lines;
- uint16_t linep, cols;
- uint16_t data;
-
- vep = vc2_read_ireg(dc, VC2_IREG_VIDEO_ENTRY);
-
- dc->dc_xres = 0;
- dc->dc_yres = 0;
-
- for (;;) {
- /* Iterate over runs in video timing table */
-
- cols = 0;
-
- linep = vc2_read_ram(dc, vep++);
- lines = vc2_read_ram(dc, vep++);
-
- if (lines == 0)
- break;
-
-#define VC2_SRUN_EOL 0x8000 /* end of line */
-#define VC2_SRUN_SBSC 0x0080 /* zero if SB/SC follows */
-#define VC2_SRUN_MASK 0x7f00
-#define VC2_SRUN_SHIFT 8
-#define VC2_SA_MASK 0x007f
-#define VC2_SA_SHIFT 0
-#define VC2_SA_VISIBLE (1 << (14 % 7))
- do {
- /* Iterate over state runs in line sequence table */
- data = vc2_read_ram(dc, linep++);
-
- if ((((data & VC2_SA_MASK) >> VC2_SA_SHIFT) &
- VC2_SA_VISIBLE) == 0)
- cols += (data & VC2_SRUN_MASK) >> VC2_SRUN_SHIFT;
- if ((data & VC2_SRUN_SBSC) == 0)
- data = vc2_read_ram(dc, linep++);
- } while ((data & VC2_SRUN_EOL) == 0);
-
- if (cols != 0) {
- cols <<= 1; /* was in 2 pixels unit */
- if (cols > dc->dc_xres)
- dc->dc_xres = cols;
- dc->dc_yres += lines;
- }
- }
-}
-
-void
-newport_setup_hw(struct newport_devconfig *dc)
-{
- uint16_t tmp;
- int i;
- uint32_t scratch;
-
- /* Get various revisions */
- rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_1 |
- (NEWPORT_DCBADDR_CMAP_0 << REX3_DCBMODE_DCBADDR_SHIFT) |
- (CMAP_DCBCRS_REVISION << REX3_DCBMODE_DCBCRS_SHIFT) |
- (1 << REX3_DCBMODE_CSWIDTH_SHIFT) |
- (1 << REX3_DCBMODE_CSHOLD_SHIFT) |
- (1 << REX3_DCBMODE_CSSETUP_SHIFT));
- scratch = rex3_read(dc, REX3_REG_DCBDATA0) >> 24;
-
- dc->dc_boardrev = (scratch >> 4) & 0x07;
- /* cmaprev = scratch & 0x07; */
- dc->dc_xmaprev = xmap9_read(dc, XMAP9_DCBCRS_REVISION) & 0x07;
- dc->dc_depth = ((dc->dc_boardrev > 1) && (scratch & 0x80)) ? 8 : 24;
-
- scratch = vc2_read_ireg(dc, VC2_IREG_CONFIG);
- dc->dc_vc2rev = (scratch & VC2_IREG_CONFIG_REVISION) >> 5;
-
- /* Setup VC2 to a known state */
- tmp = vc2_read_ireg(dc, VC2_IREG_CONTROL) & VC2_CONTROL_INTERLACE;
- vc2_write_ireg(dc, VC2_IREG_CONTROL, tmp |
- VC2_CONTROL_DISPLAY_ENABLE | VC2_CONTROL_VTIMING_ENABLE |
- VC2_CONTROL_DID_ENABLE | VC2_CONTROL_CURSORFUNC_ENABLE);
-
- /* Setup XMAP9s */
- xmap9_write(dc, XMAP9_DCBCRS_CONFIG,
- XMAP9_CONFIG_8BIT_SYSTEM | XMAP9_CONFIG_RGBMAP_CI);
-
- xmap9_write(dc, XMAP9_DCBCRS_CURSOR_CMAP, 0);
-
- xmap9_write_mode(dc, 0,
- XMAP9_MODE_GAMMA_BYPASS | XMAP9_MODE_PIXSIZE_8BPP);
- xmap9_write(dc, XMAP9_DCBCRS_MODE_SELECT, 0);
-
- /* Setup REX3 */
- rex3_write(dc, REX3_REG_XYWIN, (4096 << 16) | 4096);
- rex3_write(dc, REX3_REG_TOPSCAN, 0x3ff); /* XXX Why? XXX */
-
- /* Setup CMAP */
- for (i = 0; i < 256; i++)
- newport_cmap_setrgb(dc, i, rasops_cmap[i * 3],
- rasops_cmap[i * 3 + 1], rasops_cmap[i * 3 + 2]);
-}
-
-/**** Attach routines ****/
-int
-newport_match(struct device *parent, void *vcf, void *aux)
-{
- struct gio_attach_args *ga = aux;
-
- if (ga->ga_product != GIO_PRODUCT_FAKEID_NEWPORT)
- return 0;
-
- return 1;
-}
-
-void
-newport_attach(struct device *parent, struct device *self, void *aux)
-{
- struct newport_softc *sc = (struct newport_softc *)self;
- struct gio_attach_args *ga = aux;
- struct newport_devconfig *dc;
- struct wsemuldisplaydev_attach_args waa;
- const char *descr;
- extern struct consdev wsdisplay_cons;
- int fail = 0;
-
- if (cn_tab == &wsdisplay_cons &&
- ga->ga_addr == newport_console_dc.dc_addr) {
- waa.console = 1;
- dc = &newport_console_dc;
- sc->sc_nscreens = 1;
- } else {
- waa.console = 0;
- dc = malloc(sizeof(struct newport_devconfig),
- M_DEVBUF, M_WAITOK | M_ZERO);
- newport_attach_common(dc, ga);
- if (newport_init_screen(dc) != 0)
- fail = 1;
- }
- sc->sc_dc = dc;
- dc->dc_sc = sc;
-
- descr = ga->ga_descr;
- if (descr == NULL || *descr == '\0')
- descr = "NG1";
- printf(": %s (board rev %d, xmap rev %d, vc2 rev %d)\n",
- descr, dc->dc_boardrev, dc->dc_xmaprev, dc->dc_vc2rev);
- printf("%s: %dx%d, %dbpp\n",
- self->dv_xname, dc->dc_xres, dc->dc_yres, dc->dc_depth);
-#ifdef DEBUG
- printf("%s: REX3 config = %06x\n",
- self->dv_xname, rex3_read(dc, REX3_REG_CONFIG));
-#endif
-
- if (fail) {
- printf("%s: failed to initialize screen\n", self->dv_xname);
- free(dc, M_DEVBUF, sizeof *dc);
- return;
- }
-
- sc->sc_scrlist[0] = &dc->dc_wsd;
- sc->sc_wsl.nscreens = 1;
- sc->sc_wsl.screens = sc->sc_scrlist;
-
- waa.scrdata = &sc->sc_wsl;
- waa.accessops = &newport_accessops;
- waa.accesscookie = dc;
- waa.defaultscreens = 0;
-
- config_found(self, &waa, wsemuldisplaydevprint);
-}
-
-int
-newport_cnprobe(struct gio_attach_args *ga)
-{
- return newport_match(NULL, NULL, ga);
-}
-
-int
-newport_cnattach(struct gio_attach_args *ga)
-{
- struct rasops_info *ri = &newport_console_dc.dc_ri;
- uint32_t defattr;
- int rc;
-
- newport_attach_common(&newport_console_dc, ga);
- rc = newport_init_screen(&newport_console_dc);
- if (rc != 0)
- return rc;
-
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &defattr);
- wsdisplay_cnattach(&newport_console_dc.dc_wsd, ri, 0, 0, defattr);
-
- return 0;
-}
-
-void
-newport_attach_common(struct newport_devconfig *dc, struct gio_attach_args *ga)
-{
- dc->dc_addr = ga->ga_addr;
- dc->dc_st = ga->ga_iot;
- dc->dc_sh = ga->ga_ioh;
-
- newport_setup_hw(dc);
- newport_get_resolution(dc);
-}
-
-int
-newport_init_screen(struct newport_devconfig *dc)
-{
- struct rasops_info *ri = &dc->dc_ri;
- int rc;
-
- memset(ri, 0, sizeof(struct rasops_info));
- ri->ri_hw = dc;
- ri->ri_flg = RI_CENTER | RI_FULLCLEAR;
- /* for the proper operation of rasops computations, pretend 8bpp */
- ri->ri_depth = 8;
- ri->ri_stride = dc->dc_xres;
- ri->ri_width = dc->dc_xres;
- ri->ri_height = dc->dc_yres;
-
- rasops_init(ri, 160, 160);
-
- ri->ri_do_cursor = newport_do_cursor;
- ri->ri_ops.copyrows = newport_copyrows;
- ri->ri_ops.eraserows = newport_eraserows;
- ri->ri_ops.copycols = newport_copycols;
- ri->ri_ops.erasecols = newport_erasecols;
- ri->ri_ops.putchar = newport_putchar;
-
- strlcpy(dc->dc_wsd.name, "std", sizeof(dc->dc_wsd.name));
- dc->dc_wsd.ncols = ri->ri_cols;
- dc->dc_wsd.nrows = ri->ri_rows;
- dc->dc_wsd.textops = &ri->ri_ops;
- dc->dc_wsd.fontwidth = ri->ri_font->fontwidth;
- dc->dc_wsd.fontheight = ri->ri_font->fontheight;
- dc->dc_wsd.capabilities = ri->ri_caps;
-
- rc = newport_fill_rectangle(dc, 0, 0, ri->ri_width - 1,
- ri->ri_height - 1, WSCOL_BLACK);
-
-#ifdef notyet
- dc->dc_mode = WSDISPLAYIO_MODE_EMUL;
-#endif
-
- return rc;
-}
-
-/**** wsdisplay textops ****/
-
-int
-newport_do_cursor(struct rasops_info *ri)
-{
- struct newport_devconfig *dc = ri->ri_hw;
- int x, y, w, h;
-
- w = ri->ri_font->fontwidth;
- h = ri->ri_font->fontheight;
- x = ri->ri_ccol * w + ri->ri_xorigin;
- y = ri->ri_crow * h + ri->ri_yorigin;
-
- return newport_bitblt(dc, x, y, x, y, w, h,
- OPENGL_LOGIC_OP_COPY_INVERTED);
-}
-
-int
-newport_putchar(void *c, int row, int col, u_int ch, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct newport_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- uint8_t *bitmap;
- uint32_t pattern;
- int x = col * font->fontwidth + ri->ri_xorigin;
- int y = row * font->fontheight + ri->ri_yorigin;
- int i;
- int bg, fg, ul;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, &ul);
-
- if ((ch == ' ' || ch == 0) && ul == 0) {
- return newport_fill_rectangle(dc, x, y, x + font->fontwidth - 1,
- y + font->fontheight - 1, bg);
- }
-
- if (rex3_wait_gfifo(dc, __func__) != 0)
- return EAGAIN;
-
- rex3_write(dc, REX3_REG_DRAWMODE0, REX3_DRAWMODE0_OPCODE_DRAW |
- REX3_DRAWMODE0_ADRMODE_BLOCK | REX3_DRAWMODE0_STOPONX |
- REX3_DRAWMODE0_ENZPATTERN | REX3_DRAWMODE0_ZPOPAQUE);
-
- rex3_write(dc, REX3_REG_DRAWMODE1, REX3_DRAWMODE1_PLANES_CI |
- REX3_DRAWMODE1_DD_DD8 | REX3_DRAWMODE1_RWPACKED |
- REX3_DRAWMODE1_HD_HD8 | REX3_DRAWMODE1_COMPARE_LT |
- REX3_DRAWMODE1_COMPARE_EQ | REX3_DRAWMODE1_COMPARE_GT |
- (OPENGL_LOGIC_OP_COPY << REX3_DRAWMODE1_LOGICOP_SHIFT));
-
- rex3_write(dc, REX3_REG_XYSTARTI, (x << REX3_XYSTARTI_XSHIFT) | y);
- rex3_write(dc, REX3_REG_XYENDI,
- (x + font->fontwidth - 1) << REX3_XYENDI_XSHIFT);
-
- rex3_write(dc, REX3_REG_COLORI, ri->ri_devcmap[fg] & 0xff);
- rex3_write(dc, REX3_REG_COLORBACK, ri->ri_devcmap[bg] & 0xff);
-
- rex3_write(dc, REX3_REG_WRMASK, 0xffffffff);
-
- bitmap = (uint8_t *)font->data +
- (ch - font->firstchar) * ri->ri_fontscale;
- if (font->fontwidth <= 8) {
- for (i = font->fontheight; i != 0; i--) {
- if (ul && i == 1)
- pattern = 0xff000000;
- else
- pattern = *bitmap << 24;
- rex3_write_go(dc, REX3_REG_ZPATTERN, pattern);
- bitmap += font->stride;
- }
- } else {
- for (i = font->fontheight; i != 0; i--) {
- if (ul && i == 1)
- pattern = 0xffff0000;
- else
- pattern = *(uint16_t *)bitmap << 16;
- rex3_write_go(dc, REX3_REG_ZPATTERN, pattern);
- bitmap += font->stride;
- }
- }
-
- return 0;
-}
-
-int
-newport_copycols(void *c, int row, int srccol, int dstcol, int ncols)
-{
- struct rasops_info *ri = c;
- struct newport_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int32_t xs, xd, y, width, height;
-
- xs = ri->ri_xorigin + font->fontwidth * srccol;
- xd = ri->ri_xorigin + font->fontwidth * dstcol;
- y = ri->ri_yorigin + font->fontheight * row;
- width = font->fontwidth * ncols;
- height = font->fontheight;
- return newport_bitblt(dc, xs, y, xd, y, width, height,
- OPENGL_LOGIC_OP_COPY);
-}
-
-int
-newport_erasecols(void *c, int row, int startcol, int ncols, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct newport_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int sx, sy, dx, dy;
- int bg, fg;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, NULL);
-
- sx = ri->ri_xorigin + startcol * font->fontwidth;
- sy = ri->ri_yorigin + row * font->fontheight;
- dx = sx + ncols * font->fontwidth - 1;
- dy = sy + font->fontheight - 1;
-
- return newport_fill_rectangle(dc, sx, sy, dx, dy, bg);
-}
-
-int
-newport_copyrows(void *c, int srcrow, int dstrow, int nrows)
-{
- struct rasops_info *ri = c;
- struct newport_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int32_t x, ys, yd, width, height;
-
- x = ri->ri_xorigin;
- ys = ri->ri_yorigin + font->fontheight * srcrow;
- yd = ri->ri_yorigin + font->fontheight * dstrow;
- width = ri->ri_emuwidth;
- height = font->fontheight * nrows;
-
- return newport_bitblt(dc, x, ys, x, yd, width, height,
- OPENGL_LOGIC_OP_COPY);
-}
-
-int
-newport_eraserows(void *c, int startrow, int nrows, uint32_t attr)
-{
- struct rasops_info *ri = c;
- struct newport_devconfig *dc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int bg, fg;
-
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, NULL);
-
- if (nrows == ri->ri_rows && (ri->ri_flg & RI_FULLCLEAR)) {
- return newport_fill_rectangle(dc, 0, 0, ri->ri_width - 1,
- ri->ri_height - 1, bg);
- }
-
- return newport_fill_rectangle(dc, ri->ri_xorigin,
- ri->ri_yorigin + startrow * font->fontheight,
- ri->ri_xorigin + ri->ri_emuwidth - 1,
- ri->ri_yorigin + (startrow + nrows) * font->fontheight - 1, bg);
-}
-
-/**** wsdisplay accessops ****/
-
-int
-newport_alloc_screen(void *v, const struct wsscreen_descr *type,
- void **cookiep, int *curxp, int *curyp, uint32_t *attrp)
-{
- struct newport_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
- struct newport_softc *sc = dc->dc_sc;
-
- if (sc->sc_nscreens > 0)
- return ENOMEM;
-
- sc->sc_nscreens++;
-
- *cookiep = ri;
- *curxp = *curyp = 0;
- ri->ri_ops.pack_attr(ri, 0, 0, 0, &dc->dc_defattr);
- *attrp = dc->dc_defattr;
-
- return 0;
-}
-
-void
-newport_free_screen(void *v, void *cookie)
-{
-}
-
-int
-newport_show_screen(void *v, void *cookie, int waitok,
- void (*cb)(void *, int, int), void *cbarg)
-{
- return 0;
-}
-
-int
-newport_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
-{
- struct newport_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
- struct wsdisplay_fbinfo *fb;
-#ifdef notyet
- int nmode;
-#endif
-
- switch (cmd) {
- case WSDISPLAYIO_GTYPE:
- *(u_int *)data = WSDISPLAY_TYPE_NEWPORT;
- break;
- case WSDISPLAYIO_GINFO:
- fb = (struct wsdisplay_fbinfo *)data;
- fb->width = ri->ri_width;
- fb->height = ri->ri_height;
- fb->depth = dc->dc_depth; /* real depth */
- if (dc->dc_depth > 8)
- fb->cmsize = 0;
- else
- fb->cmsize = 1 << ri->ri_depth;
- break;
-#ifdef notyet
- case WSDISPLAYIO_SMODE:
- nmode = *(int *)data;
- if (nmode != dc->dc_mode) {
- if (nmode == WSDISPLAYIO_MODE_EMUL) {
- if (rex3_wait_gfifo(dc, __func__) != 0)
- return EAGAIN;
- dc->dc_mode = nmode;
- newport_setup_hw(dc);
- } else
- dc->dc_mode = nmode;
- }
- break;
-#endif
- default:
- return -1;
- }
-
- return 0;
-}
-
-paddr_t
-newport_mmap(void *v, off_t offset, int prot)
-{
- return -1;
-}
-
-int
-newport_load_font(void *v, void *emulcookie, struct wsdisplay_font *font)
-{
- struct newport_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
-
- return rasops_load_font(ri, emulcookie, font);
-}
-
-int
-newport_list_font(void *v, struct wsdisplay_font *font)
-{
- struct newport_devconfig *dc = v;
- struct rasops_info *ri = &dc->dc_ri;
-
- return rasops_list_font(ri, font);
-}
+++ /dev/null
-/* $OpenBSD: newportreg.h,v 1.2 2013/04/20 20:26:26 miod Exp $ */
-/* $NetBSD: newportreg.h,v 1.5 2011/02/20 07:59:50 matt Exp $ */
-
-/*
- * Copyright (c) 2003 Ilpo Ruotsalainen
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-/* REX3 */
-
-#define NEWPORT_REX3_OFFSET 0xf0000
-
-#define REX3_REG_DRAWMODE1 0x0000
-#define REX3_DRAWMODE1_PLANES_MASK 0x00000007
-#define REX3_DRAWMODE1_PLANES_NONE 0x00000000
-#define REX3_DRAWMODE1_PLANES_RGB 0x00000001
-#define REX3_DRAWMODE1_PLANES_CI 0x00000001
-#define REX3_DRAWMODE1_PLANES_RGBA 0x00000002
-#define REX3_DRAWMODE1_PLANES_OLAY 0x00000004
-#define REX3_DRAWMODE1_PLANES_PUP 0x00000005
-#define REX3_DRAWMODE1_PLANES_CID 0x00000006
-#define REX3_DRAWMODE1_DD_MASK 0x00000018
-#define REX3_DRAWMODE1_DD_DD4 0x00000000
-#define REX3_DRAWMODE1_DD_DD8 0x00000008
-#define REX3_DRAWMODE1_DD_DD12 0x00000010
-#define REX3_DRAWMODE1_DD_DD24 0x00000018
-#define REX3_DRAWMODE1_DBLSRC 0x00000020
-#define REX3_DRAWMODE1_YFLIP 0x00000040
-#define REX3_DRAWMODE1_RWPACKED 0x00000080
-#define REX3_DRAWMODE1_HD_MASK 0x00000300
-#define REX3_DRAWMODE1_HD_HD4 0x00000000
-#define REX3_DRAWMODE1_HD_HD8 0x00000100
-#define REX3_DRAWMODE1_HD_HD12 0x00000200
-#define REX3_DRAWMODE1_HD_HD24 0x00000300
-#define REX3_DRAWMODE1_RWDOUBLE 0x00000400
-#define REX3_DRAWMODE1_SWAPENDIAN 0x00000800
-#define REX3_DRAWMODE1_COMPARE_MASK 0x00007000
-#define REX3_DRAWMODE1_COMPARE_LT 0x00001000
-#define REX3_DRAWMODE1_COMPARE_EQ 0x00002000
-#define REX3_DRAWMODE1_COMPARE_GT 0x00004000
-#define REX3_DRAWMODE1_RGBMODE 0x00008000
-#define REX3_DRAWMODE1_DITHER 0x00010000
-#define REX3_DRAWMODE1_FASTCLEAR 0x00020000
-#define REX3_DRAWMODE1_BLEND 0x00040000
-#define REX3_DRAWMODE1_SFACTOR_MASK 0x00380000
-#define REX3_DRAWMODE1_SFACTOR_ZERO 0x00000000
-#define REX3_DRAWMODE1_SFACTOR_ONE 0x00080000
-#define REX3_DRAWMODE1_SFACTOR_DC 0x00100000
-#define REX3_DRAWMODE1_SFACTOR_MDC 0x00180000
-#define REX3_DRAWMODE1_SFACTOR_SA 0x00200000
-#define REX3_DRAWMODE1_SFACTOR_MSA 0x00280000
-#define REX3_DRAWMODE1_DFACTOR_MASK 0x01c00000
-#define REX3_DRAWMODE1_DFACTOR_ZERO 0x00000000
-#define REX3_DRAWMODE1_DFACTOR_ONE 0x00400000
-#define REX3_DRAWMODE1_DFACTOR_SC 0x00800000
-#define REX3_DRAWMODE1_DFACTOR_MSC 0x00c00000
-#define REX3_DRAWMODE1_DFACTOR_SA 0x01000000
-#define REX3_DRAWMODE1_DFACTOR_MSA 0x01400000
-#define REX3_DRAWMODE1_BACKBLEND 0x02000000
-#define REX3_DRAWMODE1_PREFETCH 0x04000000
-#define REX3_DRAWMODE1_BLENDALPHA 0x08000000
-#define REX3_DRAWMODE1_LOGICOP_SHIFT 28
-
-#define REX3_REG_DRAWMODE0 0x0004
-#define REX3_DRAWMODE0_OPCODE_MASK 0x00000003
-#define REX3_DRAWMODE0_OPCODE_NOOP 0x00000000
-#define REX3_DRAWMODE0_OPCODE_READ 0x00000001
-#define REX3_DRAWMODE0_OPCODE_DRAW 0x00000002
-#define REX3_DRAWMODE0_OPCODE_SCR2SCR 0x00000003
-#define REX3_DRAWMODE0_ADRMODE_MASK 0x0000001c
-#define REX3_DRAWMODE0_ADRMODE_SPAN 0x00000000
-#define REX3_DRAWMODE0_ADRMODE_BLOCK 0x00000004
-#define REX3_DRAWMODE0_ADRMODE_I_LINE 0x00000008
-#define REX3_DRAWMODE0_ADRMODE_F_LINE 0x0000000c
-#define REX3_DRAWMODE0_ADRMODE_A_LINE 0x00000010
-#define REX3_DRAWMODE0_DOSETUP 0x00000020
-#define REX3_DRAWMODE0_COLORHOST 0x00000040
-#define REX3_DRAWMODE0_ALPHAHOST 0x00000080
-#define REX3_DRAWMODE0_STOPONX 0x00000100
-#define REX3_DRAWMODE0_STOPONY 0x00000200
-#define REX3_DRAWMODE0_SKIPFIRST 0x00000400
-#define REX3_DRAWMODE0_SKIPLAST 0x00000800
-#define REX3_DRAWMODE0_ENZPATTERN 0x00001000
-#define REX3_DRAWMODE0_ENLSPATTERN 0x00002000
-#define REX3_DRAWMODE0_LSADVLAST 0x00004000
-#define REX3_DRAWMODE0_LENGTH32 0x00008000
-#define REX3_DRAWMODE0_ZPOPAQUE 0x00010000
-#define REX3_DRAWMODE0_LSOPAQUE 0x00020000
-#define REX3_DRAWMODE0_SHADE 0x00040000
-#define REX3_DRAWMODE0_LRONLY 0x00080000
-#define REX3_DRAWMODE0_XYOFFSET 0x00100000
-#define REX3_DRAWMODE0_CICLAMP 0x00200000
-#define REX3_DRAWMODE0_ENDPTFILTER 0x00400000
-#define REX3_DRAWMODE0_YSTRIDE 0x00800000
-#define REX3_REG_LSMODE 0x0008
-
-#define REX3_REG_LSPATTERN 0x000c
-
-#define REX3_REG_LSPATSAVE 0x0010
-
-#define REX3_REG_ZPATTERN 0x0014
-
-#define REX3_REG_COLORBACK 0x0018
-
-#define REX3_REG_XSTART 0x0100
-
-#define REX3_REG_XYMOVE 0x0114
-#define REX3_XYMOVE_XSHIFT 16
-
-#define REX3_REG_XSTARTI 0x0148
-
-#define REX3_REG_XYSTARTI 0x0150
-#define REX3_XYSTARTI_XSHIFT 16
-
-#define REX3_REG_XYENDI 0x0154
-#define REX3_XYENDI_XSHIFT 16
-
-#define REX3_REG_WRMASK 0x0220
-
-#define REX3_REG_COLORI 0x0224
-
-#define REX3_REG_DCBMODE 0x0238
-#define REX3_DCBMODE_DW_MASK 0x00000003
-#define REX3_DCBMODE_DW_4 0x00000000
-#define REX3_DCBMODE_DW_1 0x00000001
-#define REX3_DCBMODE_DW_2 0x00000002
-#define REX3_DCBMODE_DW_3 0x00000003
-#define REX3_DCBMODE_ENDATAPACK 0x00000004
-#define REX3_DCBMODE_ENCRSINC 0x00000008
-#define REX3_DCBMODE_DCBCRS_MASK 0x00000070
-#define REX3_DCBMODE_DCBCRS_SHIFT 4
-#define REX3_DCBMODE_DCBADDR_MASK 0x00000780
-#define REX3_DCBMODE_DCBADDR_SHIFT 7
-#define REX3_DCBMODE_ENSYNCACK 0x00000800
-#define REX3_DCBMODE_ENASYNCACK 0x00001000
-#define REX3_DCBMODE_CSWIDTH_MASK 0x0003e000
-#define REX3_DCBMODE_CSWIDTH_SHIFT 13
-#define REX3_DCBMODE_CSHOLD_MASK 0x007c0000
-#define REX3_DCBMODE_CSHOLD_SHIFT 18
-#define REX3_DCBMODE_CSSETUP_MASK 0x0f800000
-#define REX3_DCBMODE_CSSETUP_SHIFT 23
-#define REX3_DCBMODE_SWAPENDIAN 0x10000000
-
-#define REX3_REG_DCBDATA0 0x0240
-#define REX3_REG_DCBDATA1 0x0244
-
-/* Not really a register, but in the same space */
-#define REX3_REG_GO 0x0800
-
-#define REX3_REG_TOPSCAN 0x1320
-#define REX3_REG_XYWIN 0x1324
-
-#define REX3_REG_CONFIG 0x1330
-
-#define REX3_REG_STATUS 0x1338
-#define REX3_STATUS_GFXBUSY 0x00000008
-#define REX3_STATUS_FIFOLEVEL_MASK 0x00001F80
-#define REX3_STATUS_FIFOLEVEL_SHIFT 7
-
-/* VC2 */
-
-#define VC2_DCBCRS_INDEX 0
-#define VC2_DCBCRS_IREG 1
-#define VC2_DCBCRS_RAM 3
-
-#define VC2_IREG_VIDEO_ENTRY 0x00
-
-#define VC2_IREG_CURSOR_ENTRY 0x01
-
-#define VC2_IREG_CURSOR_X 0x02
-
-#define VC2_IREG_CURSOR_Y 0x03
-
-#define VC2_IREG_SCANLINE_LENGTH 0x06
-
-#define VC2_IREG_RAM_ADDRESS 0x07
-
-#define VC2_IREG_CONTROL 0x10
-#define VC2_CONTROL_VINTR_ENABLE 0x0001
-#define VC2_CONTROL_DISPLAY_ENABLE 0x0002
-#define VC2_CONTROL_VTIMING_ENABLE 0x0004
-#define VC2_CONTROL_DID_ENABLE 0x0008
-#define VC2_CONTROL_CURSORFUNC_ENABLE 0x0010
-#define VC2_CONTROL_GENSYNC_ENABLE 0x0020
-#define VC2_CONTROL_INTERLACE 0x0040
-#define VC2_CONTROL_CURSOR_ENABLE 0x0080
-#define VC2_CONTROL_CROSSHAIR_CURSOR 0x0100
-#define VC2_CONTROL_LARGE_CURSOR 0x0200
-#define VC2_CONTROL_GENLOCK_1 0x0400
-
-#define VC2_IREG_CONFIG 0x1f
-#define VC2_IREG_CONFIG_SOFTRESET 0x01 /* active low */
-#define VC2_IREG_CONFIG_SLOWCLOCK 0x02
-#define VC2_IREG_CONFIG_CURSORERROR 0x04
-#define VC2_IREG_CONFIG_DIDERROR 0x08
-#define VC2_IREG_CONFIG_VTGERROR 0x10
-#define VC2_IREG_CONFIG_REVISION 0x70
-
-/* CMAP */
-
-#define CMAP_DCBCRS_ADDRESS_LOW 0
-#define CMAP_DCBCRS_ADDRESS_HIGH 1
-#define CMAP_DCBCRS_PALETTE 2
-#define CMAP_DCBCRS_REVISION 6
-
-/* XMAP9 */
-
-#define XMAP9_DCBCRS_CONFIG 0
-#define XMAP9_CONFIG_PUP_ENABLE 0x01
-#define XMAP9_CONFIG_ODD_PIXEL 0x02
-#define XMAP9_CONFIG_8BIT_SYSTEM 0x04
-#define XMAP9_CONFIG_SLOW_PCLK 0x08
-#define XMAP9_CONFIG_RGBMAP_CI 0x00
-#define XMAP9_CONFIG_RGBMAP_0 0x10
-#define XMAP9_CONFIG_RGBMAP_1 0x20
-#define XMAP9_CONFIG_RGBMAP_2 0x30
-#define XMAP9_CONFIG_EXPRESS_MODE 0x40
-#define XMAP9_CONFIG_VIDEO_ENABLE 0x80
-#define XMAP9_DCBCRS_REVISION 1
-#define XMAP9_DCBCRS_FIFOAVAIL 2
-#define XMAP9_DCBCRS_CURSOR_CMAP 3
-#define XMAP9_DCBCRS_PUP_CMAP 4
-#define XMAP9_DCBCRS_MODE_SETUP 5
-#define XMAP9_MODE_GAMMA_BYPASS 0x000004
-#define XMAP9_MODE_PIXSIZE_8BPP 0x000400
-#define XMAP9_DCBCRS_MODE_SELECT 7
-
-/* DCB addresses */
-
-#define NEWPORT_DCBADDR_VC2 0
-#define NEWPORT_DCBADDR_CMAP_BOTH 1
-#define NEWPORT_DCBADDR_CMAP_0 2
-#define NEWPORT_DCBADDR_CMAP_1 3
-#define NEWPORT_DCBADDR_XMAP_BOTH 4
-#define NEWPORT_DCBADDR_XMAP_0 5
-#define NEWPORT_DCBADDR_XMAP_1 6
-#define NEWPORT_DCBADDR_RAMDAC 7
-#define NEWPORT_DCBADDR_VIDEO_CC1 8
-#define NEWPORT_DCBADDR_VIDEO_AB1 9
+++ /dev/null
-/* $OpenBSD: newportvar.h,v 1.1 2012/04/16 22:31:36 miod Exp $ */
-/* $NetBSD: newportvar.h,v 1.3 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2003 Ilpo Ruotsalainen
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
- */
-
-int newport_cnattach(struct gio_attach_args *);
-int newport_cnprobe(struct gio_attach_args *);
+++ /dev/null
-/* $OpenBSD: pci_gio.c,v 1.3 2014/10/02 18:55:49 miod Exp $ */
-/* $NetBSD: pci_gio.c,v 1.9 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2006 Stephen M. Rumble
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Glue for PCI devices that are connected to the GIO bus by various little
- * GIO<->PCI ASICs.
- *
- * We presently recognize the following boards:
- * o Phobos G100/G130/G160 (dc, lxtphy)
- * o Set Engineering GFE (tl, nsphy)
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-#include <sys/extent.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <mips64/archtype.h>
-#include <sgi/sgi/ip22.h>
-
-#include <sgi/gio/giovar.h>
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giodevs.h>
-
-#include <sgi/localbus/imcvar.h>
-
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcidevs.h>
-
-#include "cardbus.h"
-
-#if NCARDBUS > 0
-#include <dev/cardbus/rbus.h>
-#endif
-
-int giopci_debug = 0;
-#define DPRINTF(_x) if (giopci_debug) printf _x
-
-struct giopci_softc {
- struct device sc_dev;
- int sc_slot;
-
- bus_space_tag_t sc_cfgt;
- bus_space_handle_t sc_cfgh;
- uint32_t sc_cfg_len;
-
- struct mips_pci_chipset sc_pc;
-
- bus_dma_tag_t sc_dmat;
- bus_size_t sc_dma_boundary;
- struct machine_bus_dma_tag sc_dmat_store;
-};
-
-int giopci_match(struct device *, void *, void *);
-void giopci_attach(struct device *, struct device *, void *);
-
-const struct cfattach giopci_ca = {
- sizeof(struct giopci_softc), giopci_match, giopci_attach
-};
-
-struct cfdriver giopci_cd = {
- NULL, "giopci", DV_DULL
-};
-
-void giopci_attach_hook(struct device *, struct device *,
- struct pcibus_attach_args *);
-int giopci_bus_maxdevs(void *, int);
-pcitag_t giopci_make_tag(void *, int, int, int);
-void giopci_decompose_tag(void *, pcitag_t, int *, int *, int *);
-int giopci_conf_size(void *, pcitag_t);
-pcireg_t giopci_conf_read(void *, pcitag_t, int);
-void giopci_conf_write(void *, pcitag_t, int, pcireg_t);
-int giopci_probe_device_hook(void *, struct pci_attach_args *);
-int giopci_get_widget(void *);
-int giopci_get_dl(void *, pcitag_t, struct sgi_device_location *);
-int giopci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
-const char *giopci_intr_string(void *, pci_intr_handle_t);
-void *giopci_intr_establish(void *, pci_intr_handle_t, int, int (*)(void *),
- void *, const char *);
-void giopci_intr_disestablish(void *, void *);
-int giopci_intr_line(void *, pci_intr_handle_t);
-int giopci_ppb_setup(void *, pcitag_t, bus_addr_t *, bus_addr_t *,
- bus_addr_t *, bus_addr_t *);
-void *giopci_rbus_parent_io(struct pci_attach_args *);
-void *giopci_rbus_parent_mem(struct pci_attach_args *);
-
-static const struct mips_pci_chipset giopci_pci_chipset = {
- .pc_attach_hook = giopci_attach_hook,
- .pc_bus_maxdevs = giopci_bus_maxdevs,
- .pc_make_tag = giopci_make_tag,
- .pc_decompose_tag = giopci_decompose_tag,
- .pc_conf_size = giopci_conf_size,
- .pc_conf_read = giopci_conf_read,
- .pc_conf_write = giopci_conf_write,
- .pc_probe_device_hook = giopci_probe_device_hook,
- .pc_get_widget = giopci_get_widget,
- .pc_get_dl = giopci_get_dl,
- .pc_intr_map = giopci_intr_map,
- .pc_intr_string = giopci_intr_string,
- .pc_intr_establish = giopci_intr_establish,
- .pc_intr_disestablish = giopci_intr_disestablish,
- .pc_intr_line = giopci_intr_line,
- .pc_ppb_setup = giopci_ppb_setup,
-#if NCARDBUS > 0
- .pc_rbus_parent_io = giopci_rbus_parent_io,
- .pc_rbus_parent_mem = giopci_rbus_parent_mem
-#endif
-};
-
-int giopci_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
- bus_size_t, int, bus_dmamap_t *);
-int giopci_print(void *, const char *);
-
-#define PHOBOS_PCI_OFFSET 0x00100000
-#define PHOBOS_PCI_LENGTH 0x00000080 /* verified on G130 */
-#define PHOBOS_TULIP_START 0x00101000
-#define PHOBOS_TULIP_END 0x001fffff
-
-#define SETENG_MAGIC_OFFSET 0x00020000
-#define SETENG_MAGIC_VALUE 0x00001000
-#define SETENG_PCI_OFFSET 0x00080000
-#define SETENG_PCI_LENGTH 0x00000080 /* ~arbitrary */
-#define SETENG_TLAN_START 0x00100000
-#define SETENG_TLAN_END 0x001fffff
-
-int
-giopci_match(struct device *parent, void *vcf, void *aux)
-{
- struct gio_attach_args *ga = aux;
-
- switch (GIO_PRODUCT_PRODUCTID(ga->ga_product)) {
- case GIO_PRODUCT_PHOBOS_G160:
- case GIO_PRODUCT_PHOBOS_G130:
- case GIO_PRODUCT_PHOBOS_G100:
- case GIO_PRODUCT_SETENG_GFE:
- return 1;
- }
-
- return 0;
-}
-
-void
-giopci_attach(struct device *parent, struct device *self, void *aux)
-{
- struct giopci_softc *sc = (struct giopci_softc *)self;
- pci_chipset_tag_t pc = &sc->sc_pc;
- struct gio_attach_args *ga = aux;
- uint32_t cfg_off, cfg_len, arb, reg;
- struct pcibus_attach_args pba;
- uint32_t m_start, m_end;
- struct extent *ex;
- pcireg_t csr;
-
- printf(": %s\n",
- gio_product_string(GIO_PRODUCT_PRODUCTID(ga->ga_product)));
-
- sc->sc_cfgt = ga->ga_iot;
- sc->sc_dmat = ga->ga_dmat;
- sc->sc_slot = ga->ga_slot;
-
- if (sys_config.system_type != SGI_IP20 &&
- sys_config.system_subtype == IP22_INDIGO2)
- arb = GIO_ARB_RT | GIO_ARB_MST | GIO_ARB_PIPE;
- else
- arb = GIO_ARB_RT | GIO_ARB_MST;
-
- if (gio_arb_config(ga->ga_slot, arb)) {
- printf("%s: failed to configure GIO bus arbiter\n",
- self->dv_xname);
- return;
- }
-
- imc_disable_sysad_parity();
-
- switch (GIO_PRODUCT_PRODUCTID(ga->ga_product)) {
- case GIO_PRODUCT_PHOBOS_G160:
- case GIO_PRODUCT_PHOBOS_G130:
- case GIO_PRODUCT_PHOBOS_G100:
- cfg_off = PHOBOS_PCI_OFFSET;
- cfg_len = PHOBOS_PCI_LENGTH;
- m_start = PHOBOS_TULIP_START;
- m_end = PHOBOS_TULIP_END;
- sc->sc_dma_boundary = 0;
- break;
-
- case GIO_PRODUCT_SETENG_GFE:
- cfg_off = SETENG_PCI_OFFSET;
- cfg_len = SETENG_PCI_LENGTH;
- m_start = SETENG_TLAN_START;
- m_end = SETENG_TLAN_END;
- sc->sc_dma_boundary = 0x1000;
-
- bus_space_write_4(ga->ga_iot, ga->ga_ioh,
- SETENG_MAGIC_OFFSET, SETENG_MAGIC_VALUE);
-
- break;
- }
-
- if (bus_space_subregion(ga->ga_iot, ga->ga_ioh, cfg_off, cfg_len,
- &sc->sc_cfgh)) {
- printf("%s: unable to map PCI configuration space\n",
- self->dv_xname);
- return;
- }
-
- sc->sc_cfg_len = cfg_len;
-
- bcopy(&giopci_pci_chipset, pc, sizeof(giopci_pci_chipset));
- pc->pc_conf_v = pc->pc_intr_v = sc;
-
- /*
- * Setup a bus_dma tag if necessary.
- */
-
- if (sc->sc_dma_boundary != 0) {
- bcopy(ga->ga_dmat, &sc->sc_dmat_store,
- sizeof(struct machine_bus_dma_tag));
- sc->sc_dmat_store._dmamap_create = giopci_dmamap_create;
- sc->sc_dmat_store._cookie = sc;
- }
-
- /*
- * Setup resource extent for memory BARs.
- */
-
- ex = extent_create(self->dv_xname, 0, (u_long)-1L, M_DEVBUF,
- NULL, 0, EX_NOWAIT | EX_FILLED);
- if (ex == NULL || extent_free(ex, ga->ga_addr + m_start,
- m_end + 1 - m_start, EX_NOWAIT) != 0) {
- printf("%s: unable to setup PCI resource management\n",
- self->dv_xname);
- return;
- }
-
- /*
- * Reset all BARs. Note that we are assuming there is only
- * one device, which is neither a bridge nor a multifunction
- * device.
- * This is necessary because they contain garbage upon poweron,
- * and although the bridge chip does not support I/O mappings,
- * the chips behind it (at least on Phobos boards) have I/O BARs.
- */
-
- for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4)
- bus_space_write_4(sc->sc_cfgt, sc->sc_cfgh, reg, 0);
-
- csr =
- bus_space_read_4(sc->sc_cfgt, sc->sc_cfgh, PCI_COMMAND_STATUS_REG);
- bus_space_write_4(sc->sc_cfgt, sc->sc_cfgh, PCI_COMMAND_STATUS_REG,
- (csr & ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) |
- PCI_COMMAND_MASTER_ENABLE);
-
- bzero(&pba, sizeof(pba));
- pba.pba_busname = "pci";
- pba.pba_iot = pba.pba_memt = ga->ga_iot;
- if (sc->sc_dma_boundary == 0)
- pba.pba_dmat = ga->ga_dmat;
- else
- pba.pba_dmat = &sc->sc_dmat_store;
- pba.pba_pc = pc;
- pba.pba_ioex = NULL;
- pba.pba_memex = ex;
- pba.pba_domain = pci_ndomains++;
- pba.pba_bus = 0;
-
- config_found(self, &pba, giopci_print);
-}
-
-int
-giopci_print(void *aux, const char *pnp)
-{
- struct pcibus_attach_args *pba = aux;
-
- if (pnp != NULL)
- printf("%s at %s", pba->pba_busname, pnp);
- printf(" bus %d", pba->pba_bus);
-
- return UNCONF;
-}
-
-/*
- * pci_chipset_t routines
- */
-
-void
-giopci_attach_hook(struct device *parent, struct device *self,
- struct pcibus_attach_args *pba)
-{
-}
-
-pcitag_t
-giopci_make_tag(void *v, int bus, int dev, int fnc)
-{
- return (bus << 16) | (dev << 11) | (fnc << 8);
-}
-
-void
-giopci_decompose_tag(void *v, pcitag_t tag, int *busp, int *devp, int *fncp)
-{
- if (busp != NULL)
- *busp = (tag >> 16) & 0xff;
- if (devp != NULL)
- *devp = (tag >> 11) & 0x1f;
- if (fncp != NULL)
- *fncp = (tag >> 8) & 0x7;
-}
-
-int
-giopci_bus_maxdevs(void *v, int busno)
-{
- return busno == 0 ? 1 : 0;
-}
-
-int
-giopci_conf_size(void *v, pcitag_t tag)
-{
- struct giopci_softc *sc = (struct giopci_softc *)v;
-
- return sc->sc_cfg_len;
-}
-
-pcireg_t
-giopci_conf_read(void *v, pcitag_t tag, int reg)
-{
- struct giopci_softc *sc = v;
- int bus, dev, func;
- pcireg_t data;
-
- giopci_decompose_tag(v, tag, &bus, &dev, &func);
- if (bus != 0 || dev != 0 || func != 0)
- return reg == PCI_ID_REG ? 0xffffffff : 0;
-
- if (reg >= sc->sc_cfg_len)
- return 0;
-
- DPRINTF(("giopci_conf_read: reg 0x%x = 0x", reg));
- data = bus_space_read_4(sc->sc_cfgt, sc->sc_cfgh, reg);
- DPRINTF(("%08x\n", data));
-
- return data;
-}
-
-void
-giopci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data)
-{
- struct giopci_softc *sc = v;
- int bus, dev, func;
-
- giopci_decompose_tag(v, tag, &bus, &dev, &func);
- if (bus != 0 || dev != 0 || func != 0)
- return;
-
- if (reg >= sc->sc_cfg_len)
- return;
-
- DPRINTF(("giopci_conf_write: reg 0x%x = 0x%08x\n", reg, data));
- bus_space_write_4(sc->sc_cfgt, sc->sc_cfgh, reg, data);
-}
-
-int
-giopci_probe_device_hook(void *unused, struct pci_attach_args *notused)
-{
- return 0;
-}
-
-/* will not actually be used */
-int
-giopci_get_widget(void *unused)
-{
- return 0;
-}
-
-/* will not actually be used */
-int
-giopci_get_dl(void *v, pcitag_t tag, struct sgi_device_location *sdl)
-{
- int bus, device, fn;
-
- memset(sdl, 0, sizeof *sdl);
- giopci_decompose_tag(v, tag, &bus, &device, &fn);
- if (bus != 0)
- return 0;
- sdl->device = device;
- sdl->fn = fn;
- return 1;
-}
-
-int
-giopci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
-{
- struct giopci_softc *sc = (struct giopci_softc *)pa->pa_pc->pc_intr_v;
- int intr;
-
- if (pa->pa_rawintrpin == 0)
- intr = -1;
- else
- intr = gio_intr_map(sc->sc_slot);
-
- *ihp = intr;
- return intr < 0 ? 1 : 0;
-}
-
-const char *
-giopci_intr_string(void *v, pci_intr_handle_t ih)
-{
- static char str[10];
-
- snprintf(str, sizeof(str), "irq %d", (int)ih);
- return str;
-}
-
-void *
-giopci_intr_establish(void *v, pci_intr_handle_t ih, int level,
- int (*func)(void *), void *arg, const char *name)
-{
- return gio_intr_establish((int)ih, level, func, arg, name);
-}
-
-void
-giopci_intr_disestablish(void *v, void *ih)
-{
- panic("%s", __func__);
-}
-
-int
-giopci_intr_line(void *v, pci_intr_handle_t ih)
-{
- return (int)ih;
-}
-
-int
-giopci_ppb_setup(void *cookie, pcitag_t tag, bus_addr_t *iostart,
- bus_addr_t *ioend, bus_addr_t *memstart, bus_addr_t *memend)
-{
- panic("%s", __func__);
-}
-
-#if NCARDBUS > 0
-void *
-giopci_rbus_parent_io(struct pci_attach_args *pa)
-{
- panic("%s");
-}
-
-void *
-giopci_rbus_parent_mem(struct pci_attach_args *pa)
-{
- panic("%s");
-}
-#endif /* NCARDBUS > 0 */
-
-/*
- * DMA routines
- */
-
-int
-giopci_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
- bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
-{
- struct giopci_softc *sc = (struct giopci_softc *)t->_cookie;
-
- if (boundary == 0 || boundary > sc->sc_dma_boundary)
- boundary = sc->sc_dma_boundary;
-
- return bus_dmamap_create(sc->sc_dmat, size, nsegments, maxsegsz,
- boundary, flags, dmamp);
-}
+++ /dev/null
-# $OpenBSD: Makefile,v 1.1 2014/05/22 19:39:37 miod Exp $
-
-AWK= awk
-
-PROG= makemap.awk
-MAP= ../../../dev/pckbc/wskbdmap_mfii.c
-
-all: wskbdmap_sgi.c
-
-wskbdmap_sgi.c: ${MAP} ${PROG}
- /bin/rm -f $@
- ${AWK} -f ${PROG} ${MAP} > $@
+++ /dev/null
-/* $OpenBSD: dpclock.c,v 1.4 2020/05/21 01:49:49 visa Exp $ */
-/* $NetBSD: dpclock.c,v 1.3 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2001 Erik Reid
- * Copyright (c) 2001 Rafal K. Boni
- * Copyright (c) 2001 Christopher Sekiya
- * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * Portions of this code are derived from software contributed to The
- * NetBSD Foundation by Jason R. Thorpe of the Numerical Aerospace
- * Simulation Facility, NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1982, 1990, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah $Hdr: clock.c 1.18 91/01/21$
- *
- * @(#)clock.c 8.2 (Berkeley) 1/12/94
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-
-#include <machine/bus.h>
-
-#include <dev/clock_subr.h>
-#include <dev/ic/dp8573areg.h>
-#include <sgi/hpc/hpcvar.h>
-
-#define IRIX_BASE_YEAR 1940
-
-struct dpclock_softc {
- struct device sc_dev;
- struct todr_chip_handle sc_todr;
-
- bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh;
-};
-
-int dpclock_match(struct device *, void *, void *);
-void dpclock_attach(struct device *, struct device *, void *);
-
-struct cfdriver dpclock_cd = {
- NULL, "dpclock", DV_DULL
-};
-
-const struct cfattach dpclock_ca = {
- sizeof(struct dpclock_softc), dpclock_match, dpclock_attach
-};
-
-#define dpclock_read(sc,r) \
- bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, ((r) << 2) + 3)
-#define dpclock_write(sc,r,v) \
- bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, ((r) << 2) + 3, (v))
-
-static inline int frombcd(int);
-static inline int tobcd(int);
-static inline int leapyear(int year);
-
-static inline int
-frombcd(int x)
-{
- return (x >> 4) * 10 + (x & 0xf);
-}
-static inline int
-tobcd(int x)
-{
- return (x / 10 * 16) + (x % 10);
-}
-/*
- * This inline avoids some unnecessary modulo operations
- * as compared with the usual macro:
- * ( ((year % 4) == 0 &&
- * (year % 100) != 0) ||
- * ((year % 400) == 0) )
- * It is otherwise equivalent.
- * (borrowed from kern/clock_subr.c)
- */
-static inline int
-leapyear(int year)
-{
- int rv = 0;
-
- if ((year & 3) == 0) {
- rv = 1;
- if ((year % 100) == 0) {
- rv = 0;
- if ((year % 400) == 0)
- rv = 1;
- }
- }
- return (rv);
-}
-
-int dpclock_gettime(struct todr_chip_handle *, struct timeval *);
-int dpclock_settime(struct todr_chip_handle *, struct timeval *);
-
-int
-dpclock_match(struct device *parent, void *vcf, void *aux)
-{
- struct hpc_attach_args *haa = aux;
-
- if (strcmp(haa->ha_name, dpclock_cd.cd_name) != 0)
- return 0;
-
- return 1;
-}
-
-void
-dpclock_attach(struct device *parent, struct device *self, void *aux)
-{
- struct dpclock_softc *sc = (void *)self;
- struct hpc_attach_args *haa = aux;
- uint8_t st, mode, pflag;
-
- sc->sc_iot = haa->ha_st;
- if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff,
- 4 * DP8573A_NREG, &sc->sc_ioh) != 0) {
- printf(": can't map registers\n");
- return;
- }
-
- st = dpclock_read(sc, DP8573A_STATUS);
- dpclock_write(sc, DP8573A_STATUS, st | DP8573A_STATUS_REGSEL);
- mode = dpclock_read(sc, DP8573A_RT_MODE);
- if ((mode & DP8573A_RT_MODE_CLKSS) == 0) {
- printf(": clock stopped");
- dpclock_write(sc, DP8573A_RT_MODE,
- mode | DP8573A_RT_MODE_CLKSS);
- dpclock_write(sc, DP8573A_INT0_CTL, 0);
- dpclock_write(sc, DP8573A_INT1_CTL, DP8573A_INT1_CTL_PWRINT);
- }
- dpclock_write(sc, DP8573A_STATUS, st & ~DP8573A_STATUS_REGSEL);
- pflag = dpclock_read(sc, DP8573A_PFLAG);
- if (pflag & DP8573A_PFLAG_OFSS) {
- dpclock_write(sc, DP8573A_PFLAG, pflag);
- pflag = dpclock_read(sc, DP8573A_PFLAG);
- if (pflag & DP8573A_PFLAG_OFSS) {
- /*
- * If the `oscillator failure' condition sticks,
- * the battery needs replacement and the clock
- * is not ticking. Do not claim sys_tod.
- */
- printf("%s oscillator failure\n",
- (mode & DP8573A_RT_MODE_CLKSS) == 0 ? "," : ":");
- return;
- }
- }
- if (pflag & DP8573A_PFLAG_TESTMODE) {
- dpclock_write(sc, DP8573A_RAM_1F, 0);
- dpclock_write(sc, DP8573A_PFLAG,
- pflag & ~DP8573A_PFLAG_TESTMODE);
- }
-
- printf("\n");
-
- sc->sc_todr.cookie = self;
- sc->sc_todr.todr_gettime = dpclock_gettime;
- sc->sc_todr.todr_settime = dpclock_settime;
- todr_attach(&sc->sc_todr);
-}
-
-/*
- * Get the time of day, based on the clock's value and/or the base value.
- */
-int
-dpclock_gettime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dpclock_softc *sc = handle->cookie;
- uint i;
- uint8_t regs[DP8573A_NREG];
-
- i = dpclock_read(sc, DP8573A_TIMESAVE_CTL);
- dpclock_write(sc, DP8573A_TIMESAVE_CTL, i | DP8573A_TIMESAVE_CTL_EN);
- dpclock_write(sc, DP8573A_TIMESAVE_CTL, i);
-
- for (i = 0; i < nitems(regs); i++)
- regs[i] = dpclock_read(sc, i);
-
- dt.dt_sec = frombcd(regs[DP8573A_SAVE_SEC]);
- dt.dt_min = frombcd(regs[DP8573A_SAVE_MIN]);
-
- if (regs[DP8573A_RT_MODE] & DP8573A_RT_MODE_1224) {
- dt.dt_hour = frombcd(regs[DP8573A_SAVE_HOUR] &
- DP8573A_HOUR_12HR_MASK) +
- ((regs[DP8573A_SAVE_HOUR] & DP8573A_RT_MODE_1224) ? 0 : 12);
-
- /*
- * In AM/PM mode, hour range is 01-12, so adding in 12 hours
- * for PM gives us 01-24, whereas we want 00-23, so map hour
- * 24 to hour 0.
- */
- if (dt.dt_hour == 24)
- dt.dt_hour = 0;
- } else {
- dt.dt_hour = frombcd(regs[DP8573A_SAVE_HOUR] &
- DP8573A_HOUR_24HR_MASK);
- }
-
- dt.dt_day = frombcd(regs[DP8573A_SAVE_DOM]);
- dt.dt_mon = frombcd(regs[DP8573A_SAVE_MONTH]);
- dt.dt_year = frombcd(regs[DP8573A_YEAR]) + IRIX_BASE_YEAR;
-
- tv->tv_sec = clock_ymdhms_to_secs(&dt);
- tv->tv_usec = 0;
- return 0;
-}
-
-/*
- * Reset the TODR based on the time value.
- */
-int
-dpclock_settime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dpclock_softc *sc = handle->cookie;
- uint i;
- uint st, r, delta;
- uint8_t regs[DP8573A_NREG];
-
- clock_secs_to_ymdhms(tv->tv_sec, &dt);
-
- r = dpclock_read(sc, DP8573A_TIMESAVE_CTL);
- dpclock_write(sc, DP8573A_TIMESAVE_CTL, r | DP8573A_TIMESAVE_CTL_EN);
- dpclock_write(sc, DP8573A_TIMESAVE_CTL, r);
-
- for (i = 0; i < nitems(regs); i++)
- regs[i] = dpclock_read(sc, i);
-
- regs[DP8573A_SUBSECOND] = 0;
- regs[DP8573A_SECOND] = tobcd(dt.dt_sec);
- regs[DP8573A_MINUTE] = tobcd(dt.dt_min);
- regs[DP8573A_HOUR] = tobcd(dt.dt_hour) & DP8573A_HOUR_24HR_MASK;
- regs[DP8573A_DOW] = tobcd(dt.dt_wday + 1);
- regs[DP8573A_DOM] = tobcd(dt.dt_day);
- regs[DP8573A_MONTH] = tobcd(dt.dt_mon);
- regs[DP8573A_YEAR] = tobcd(dt.dt_year - IRIX_BASE_YEAR);
-
- st = dpclock_read(sc, DP8573A_STATUS);
- dpclock_write(sc, DP8573A_STATUS, st | DP8573A_STATUS_REGSEL);
- r = dpclock_read(sc, DP8573A_RT_MODE);
- dpclock_write(sc, DP8573A_RT_MODE, r & ~DP8573A_RT_MODE_CLKSS);
-
- for (i = 0; i < 10; i++)
- dpclock_write(sc, DP8573A_COUNTERS + i,
- regs[DP8573A_COUNTERS + i]);
-
- /*
- * We now need to set the leap year counter to the correct value.
- * Unfortunately it is only two bits wide, while eight years can
- * happen between two leap years. Skirting this is left as an
- * exercise to the reader with an Indigo in working condition
- * by year 2100.
- */
- delta = 0;
- while (delta < 3 && !leapyear(dt.dt_year - delta))
- delta++;
-
- r &= ~(DP8573A_RT_MODE_LYLSB | DP8573A_RT_MODE_LYMSB);
- dpclock_write(sc, DP8573A_RT_MODE, r | delta | DP8573A_RT_MODE_CLKSS);
-
- dpclock_write(sc, DP8573A_STATUS, st & ~DP8573A_STATUS_REGSEL);
-
- return 0;
-}
+++ /dev/null
-/* $OpenBSD: dsclock.c,v 1.5 2020/05/21 01:50:42 visa Exp $ */
-/* $NetBSD: dsclock.c,v 1.5 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2001 Rafal K. Boni
- * Copyright (c) 2001 Christopher Sekiya
- * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * Portions of this code are derived from software contributed to The
- * NetBSD Foundation by Jason R. Thorpe of the Numerical Aerospace
- * Simulation Facility, NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-
-#include <machine/bus.h>
-
-#include <dev/clock_subr.h>
-#include <dev/ic/ds1286reg.h>
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/sgi/ip22.h>
-
-struct dsclock_softc {
- struct device sc_dev;
- struct todr_chip_handle sc_todr;
-
- bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh;
-
- uint sc_base;
-};
-
-int dsclock_match(struct device *, void *, void *);
-void dsclock_attach(struct device *, struct device *, void *);
-
-struct cfdriver dsclock_cd = {
- NULL, "dsclock", DV_DULL
-};
-
-const struct cfattach dsclock_ca = {
- sizeof(struct dsclock_softc), dsclock_match, dsclock_attach
-};
-
-#define ds1286_read(sc,r) \
- bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, ((r) << 2) + 3)
-#define ds1286_write(sc,r,v) \
- bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, ((r) << 2) + 3, (v))
-
-static inline int frombcd(int);
-static inline int tobcd(int);
-
-static inline int
-frombcd(int x)
-{
- return (x >> 4) * 10 + (x & 0xf);
-}
-static inline int
-tobcd(int x)
-{
- return (x / 10 * 16) + (x % 10);
-}
-
-int dsclock_gettime(struct todr_chip_handle *, struct timeval *);
-int dsclock_settime(struct todr_chip_handle *, struct timeval *);
-
-int
-dsclock_match(struct device *parent, void *vcf, void *aux)
-{
- struct hpc_attach_args *haa = aux;
-
- if (strcmp(haa->ha_name, dsclock_cd.cd_name) != 0)
- return 0;
-
- return 1;
-}
-
-void
-dsclock_attach(struct device *parent, struct device *self, void *aux)
-{
- struct dsclock_softc *sc = (void *)self;
- struct hpc_attach_args *haa = aux;
- ds1286_todregs regs;
-
- sc->sc_iot = haa->ha_st;
- if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff,
- 4 * 8192, &sc->sc_ioh) != 0) {
- printf(": can't map registers\n");
- return;
- }
-
- printf("\n");
-
- /*
- * Try and figure out what year the chip time is relative to.
- * Different Indy PROM versions appear to use different base:
- * PROM Monitor SGI Version 5.1 Rev B3 IP24 Sep 17, 1993 (BE)
- * uses 1970, while
- * PROM Monitor SGI Version 5.3 Rev B10 R4X00/R5000 IP24 Feb 12, 1996 (BE)
- * uses 1940.
- */
-
- DS1286_GETTOD(sc, ®s);
- sc->sc_base = bios_year - frombcd(regs[DS1286_YEAR]);
- /* year might have changed between the ARCBios call and now... */
- if ((sc->sc_base % 10) == 9)
- sc->sc_base++;
-
- /*
- * If the data in the chip does not make sense, assume the usual
- * IRIX timebase (1940 because it's a leap year).
- */
- if (sc->sc_base != 1940 && sc->sc_base != POSIX_BASE_YEAR)
- sc->sc_base = 1940;
-
- sc->sc_todr.cookie = self;
- sc->sc_todr.todr_gettime = dsclock_gettime;
- sc->sc_todr.todr_settime = dsclock_settime;
- todr_attach(&sc->sc_todr);
-}
-
-/*
- * Get the time of day, based on the clock's value and/or the base value.
- */
-int
-dsclock_gettime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dsclock_softc *sc = handle->cookie;
- ds1286_todregs regs;
- int s;
-
- s = splhigh();
- DS1286_GETTOD(sc, ®s)
- splx(s);
-
- dt.dt_sec = frombcd(regs[DS1286_SEC]);
- dt.dt_min = frombcd(regs[DS1286_MIN]);
-
- if (regs[DS1286_HOUR] & DS1286_HOUR_12MODE) {
- dt.dt_hour = frombcd(regs[DS1286_HOUR] & DS1286_HOUR_12HR_MASK)
- + ((regs[DS1286_HOUR] & DS1286_HOUR_12HR_PM) ? 12 : 0);
-
- /*
- * In AM/PM mode, hour range is 01-12, so adding in 12 hours
- * for PM gives us 01-24, whereas we want 00-23, so map hour
- * 24 to hour 0.
- */
- if (dt.dt_hour == 24)
- dt.dt_hour = 0;
- } else {
- dt.dt_hour = frombcd(regs[DS1286_HOUR] &
- DS1286_HOUR_24HR_MASK);
- }
-
- dt.dt_day = frombcd(regs[DS1286_DOM]);
- dt.dt_mon = frombcd(regs[DS1286_MONTH] & DS1286_MONTH_MASK);
- dt.dt_year = frombcd(regs[DS1286_YEAR]) + sc->sc_base;
-
- tv->tv_sec = clock_ymdhms_to_secs(&dt);
- tv->tv_usec = 0;
- return 0;
-}
-
-/*
- * Reset the TODR based on the time value.
- */
-int
-dsclock_settime(struct todr_chip_handle *handle, struct timeval *tv)
-{
- struct clock_ymdhms dt;
- struct dsclock_softc *sc = handle->cookie;
- ds1286_todregs regs;
- int s;
-
- clock_secs_to_ymdhms(tv->tv_sec, &dt);
-
- s = splhigh();
- DS1286_GETTOD(sc, ®s);
- splx(s);
-
- regs[DS1286_SUBSEC] = 0;
- regs[DS1286_SEC] = tobcd(dt.dt_sec);
- regs[DS1286_MIN] = tobcd(dt.dt_min);
- regs[DS1286_HOUR] = tobcd(dt.dt_hour) & DS1286_HOUR_24HR_MASK;
- regs[DS1286_DOW] = tobcd(dt.dt_wday + 1);
- regs[DS1286_DOM] = tobcd(dt.dt_day);
-
- /* Leave wave-generator bits as set originally */
- regs[DS1286_MONTH] &= ~DS1286_MONTH_MASK;
- regs[DS1286_MONTH] |= tobcd(dt.dt_mon) & DS1286_MONTH_MASK;
-
- regs[DS1286_YEAR] = tobcd(dt.dt_year - sc->sc_base);
-
- s = splhigh();
- DS1286_PUTTOD(sc, ®s);
- splx(s);
-
- return 0;
-}
+++ /dev/null
-# $OpenBSD: files.hpc,v 1.7 2018/02/14 23:51:49 jsg Exp $
-# $NetBSD: files.hpc,v 1.14 2009/05/14 01:10:19 macallan Exp $
-
-# IP20 RTC
-device dpclock
-attach dpclock at hpc
-file arch/sgi/hpc/dpclock.c dpclock
-
-# IP22/24 RTC
-device dsclock
-attach dsclock at hpc
-file arch/sgi/hpc/dsclock.c dsclock
-
-device sq: ether, ifnet, ifmedia
-attach sq at hpc
-file arch/sgi/hpc/if_sq.c sq
-
-define hpcdma
-file arch/sgi/hpc/hpcdma.c hpcdma
-
-device wdsc: wd33c93ctrl, scsi, hpcdma
-attach wdsc at hpc
-file arch/sgi/hpc/wdsc.c wdsc
-
-device zs {[channel = -1]}
-attach zs at hpc with zs_hpc
-file arch/sgi/hpc/zs.c zs needs-flag
-file dev/ic/z8530sc.c zs
-
-device zstty: tty
-attach zstty at zs
-file dev/ic/z8530tty.c zstty needs-flag
-
-device zskbd: wskbddev
-attach zskbd at zs
-file arch/sgi/hpc/z8530kbd.c zskbd needs-flag
-file arch/sgi/hpc/wskbdmap_sgi.c zskbd
-
-device zsms: wsmousedev
-attach zsms at zs
-file arch/sgi/hpc/z8530ms.c zsms
-
-attach pckbc at hpc with pckbc_hpc
-file arch/sgi/hpc/pckbc_hpc.c pckbc_hpc
-
-device panel
-attach panel at hpc
-file arch/sgi/hpc/panel.c panel
+++ /dev/null
-/* $OpenBSD: hpc.c,v 1.18 2015/09/18 20:50:02 miod Exp $ */
-/* $NetBSD: hpc.c,v 1.66 2011/07/01 18:53:46 dyoung Exp $ */
-/* $NetBSD: ioc.c,v 1.9 2011/07/01 18:53:47 dyoung Exp $ */
-
-/*
- * Copyright (c) 2003 Christopher Sekiya
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (c) 2000 Soren S. Jorvang
- * Copyright (c) 2001 Rafal K. Boni
- * Copyright (c) 2001 Jason R. Thorpe
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Combined driver for the HPC (High performance Peripheral Controller)
- * and IOC2 (I/O Controller) chips.
- *
- * It would theoretically be better to attach an IOC driver to HPC on
- * IOC systems (IP22/24/26/28), and attach the few onboard devices
- * which attach directly to HPC on IP20, to IOC. But since IOC depends
- * too much on HPC, the complexity this would introduce is not worth
- * the hassle.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/timeout.h>
-
-#include <mips64/archtype.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <mips64/cache.h>
-#include <machine/cpu.h>
-
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giovar.h>
-
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/localbus/imcvar.h>
-#include <sgi/localbus/intreg.h>
-#include <sgi/localbus/intvar.h>
-#include <sgi/hpc/iocreg.h>
-#include <sgi/sgi/ip22.h>
-
-#include <dev/ic/smc93cx6var.h>
-
-struct hpc_device {
- const char *hd_name;
- bus_addr_t hd_base;
- bus_addr_t hd_devoff;
- bus_addr_t hd_dmaoff;
- int hd_irq;
- int hd_sysmask;
-};
-
-#define HPCDEV_IP20 (1U << 1) /* Indigo R4k */
-#define HPCDEV_IP22 (1U << 2) /* Indigo2 */
-#define HPCDEV_IP24 (1U << 3) /* Indy, Challenge S */
-#define HPCDEV_IP24_INDY (1U << 4) /* Indy only */
-
-/*
- * On-board HPC1 devices (IP20 only)
- */
-static const struct hpc_device hpc1_onboard[] = {
- /* probe order is important for IP20 zs */
- { "zs", /* serial 0/1 duart 1 */
- HPC_BASE_ADDRESS_0,
- 0x0d10, 0,
- INT2_L0_INTR(INT2_L0_IP20_SERIAL),
- HPCDEV_IP20 },
- { "zs", /* kbd/ms duart 0 */
- HPC_BASE_ADDRESS_0,
- 0x0d00, 0,
- INT2_L0_INTR(INT2_L0_IP20_SERIAL),
- HPCDEV_IP20 },
- { "sq", /* onboard Ethernet */
- HPC_BASE_ADDRESS_0,
- HPC1_ENET_DEVREGS, HPC1_ENET_REGS,
- INT2_L0_INTR(INT2_L0_ENET),
- HPCDEV_IP20 },
- { "wdsc", /* onboard SCSI */
- HPC_BASE_ADDRESS_0,
- HPC1_SCSI0_DEVREGS, HPC1_SCSI0_REGS,
- INT2_L0_INTR(INT2_L0_SCSI1),
- HPCDEV_IP20 },
- { NULL }
-};
-
-/*
- * On-board HPC3 devices (IP22, IP24)
- */
-static const struct hpc_device hpc3_onboard[] = {
- { "zs", /* serial 0/1 duart 0 */
- HPC_BASE_ADDRESS_0,
- IOC_BASE + IOC_SERIAL_REGS, 0,
- INT2_MAP1_INTR(INT2_MAP_SERIAL),
- HPCDEV_IP22 | HPCDEV_IP24 },
- { "pckbc", /* PS/2 keyboard/mouse controller */
- HPC_BASE_ADDRESS_0,
- IOC_BASE + IOC_KB_REGS, 0,
- INT2_MAP1_INTR(INT2_MAP_PCKBC),
- HPCDEV_IP22 | HPCDEV_IP24_INDY },
- { "sq", /* onboard Ethernet */
- HPC_BASE_ADDRESS_0,
- HPC3_ENET_DEVREGS, HPC3_ENET_REGS,
- INT2_L0_INTR(INT2_L0_ENET),
- HPCDEV_IP22 | HPCDEV_IP24 },
- { "wdsc", /* onboard SCSI */
- HPC_BASE_ADDRESS_0,
- HPC3_SCSI0_DEVREGS, HPC3_SCSI0_REGS,
- INT2_L0_INTR(INT2_L0_IP22_SCSI0),
- HPCDEV_IP22 | HPCDEV_IP24 },
- { "wdsc", /* Indigo2/Challenge M secondary onboard SCSI */
- HPC_BASE_ADDRESS_0,
- HPC3_SCSI1_DEVREGS, HPC3_SCSI1_REGS,
- INT2_L0_INTR(INT2_L0_SCSI1),
- HPCDEV_IP22 },
- { "haltwo", /* onboard audio */
- HPC_BASE_ADDRESS_0,
- HPC3_PBUS_CH0_DEVREGS, HPC3_PBUS_DMAREGS,
- INT2_L1_INTR(INT2_L1_IP22_HPC_DMA),
- HPCDEV_IP22 | HPCDEV_IP24_INDY },
- { "pione", /* onboard parallel port */
- HPC_BASE_ADDRESS_0,
- IOC_BASE + IOC_PLP_REGS, 0,
- INT2_L0_INTR(INT2_L0_IP22_PARALLEL),
- HPCDEV_IP22 | HPCDEV_IP24 },
- { "panel", /* Indy front panel */
- HPC_BASE_ADDRESS_0,
- IOC_BASE + IOC_PANEL, 0,
- INT2_L1_INTR(INT2_L1_IP22_PANEL),
- HPCDEV_IP22 | HPCDEV_IP24 },
- { NULL }
-};
-
-/*
- * Expansion HPC1 devices
- */
-static const struct hpc_device hpc1_devices[] = {
- { "sq", /* E++ GIO adapter */
- 0,
- HPC1_ENET_DEVREGS, HPC1_ENET_REGS,
- -1,
- HPCDEV_IP20 | HPCDEV_IP24 },
- { "wdsc", /* GIO32 SCSI adapter */
- 0,
- HPC1_SCSI0_DEVREGS, HPC1_SCSI0_REGS,
- -1,
- HPCDEV_IP20 | HPCDEV_IP24 },
- { NULL }
-};
-
-/*
- * Expansion HPC3 devices
- */
-static const struct hpc_device hpc3_devices[] = {
- { "sq", /* Challenge S IO+ secondary ethernet */
- HPC_BASE_ADDRESS_1,
- HPC3_ENET_DEVREGS, HPC3_ENET_REGS,
- INT2_L0_INTR(INT2_L0_GIO_SLOT0),
- HPCDEV_IP24 },
-
- { NULL }
-};
-
-struct hpc_softc {
- struct device sc_dev;
-
- bus_addr_t sc_base;
-
- bus_space_tag_t sc_ct;
- bus_space_handle_t sc_ch;
- bus_dma_tag_t sc_dmat;
-
- struct timeout sc_blink_tmo;
-};
-
-static struct hpc_values hpc1_values = {
- .revision = 1,
- .scsi0_regs = HPC1_SCSI0_REGS,
- .scsi0_regs_size = HPC1_SCSI0_REGS_SIZE,
- .scsi0_cbp = HPC1_SCSI0_CBP,
- .scsi0_ndbp = HPC1_SCSI0_NDBP,
- .scsi0_bc = HPC1_SCSI0_BC,
- .scsi0_ctl = HPC1_SCSI0_CTL,
- .scsi0_gio = HPC1_SCSI0_GIO,
- .scsi0_dev = HPC1_SCSI0_DEV,
- .scsi0_dmacfg = HPC1_SCSI0_DMACFG,
- .scsi0_piocfg = HPC1_SCSI0_PIOCFG,
- .scsi1_regs = 0,
- .scsi1_regs_size = 0,
- .scsi1_cbp = 0,
- .scsi1_ndbp = 0,
- .scsi1_bc = 0,
- .scsi1_ctl = 0,
- .scsi1_gio = 0,
- .scsi1_dev = 0,
- .scsi1_dmacfg = 0,
- .scsi1_piocfg = 0,
- .enet_regs = HPC1_ENET_REGS,
- .enet_regs_size = HPC1_ENET_REGS_SIZE,
- .enet_intdelay = HPC1_ENET_INTDELAY,
- .enet_intdelayval = HPC1_ENET_INTDELAY_OFF,
- .enetr_cbp = HPC1_ENETR_CBP,
- .enetr_ndbp = HPC1_ENETR_NDBP,
- .enetr_bc = HPC1_ENETR_BC,
- .enetr_ctl = HPC1_ENETR_CTL,
- .enetr_ctl_active = HPC1_ENETR_CTL_ACTIVE,
- .enetr_reset = HPC1_ENETR_RESET,
- .enetr_dmacfg = 0,
- .enetr_piocfg = 0,
- .enetx_cbp = HPC1_ENETX_CBP,
- .enetx_ndbp = HPC1_ENETX_NDBP,
- .enetx_bc = HPC1_ENETX_BC,
- .enetx_ctl = HPC1_ENETX_CTL,
- .enetx_ctl_active = HPC1_ENETX_CTL_ACTIVE,
- .enetx_dev = 0,
- .enetr_fifo = HPC1_ENETR_FIFO,
- .enetr_fifo_size = HPC1_ENETR_FIFO_SIZE,
- .enetx_fifo = HPC1_ENETX_FIFO,
- .enetx_fifo_size = HPC1_ENETX_FIFO_SIZE,
- .enet_devregs = HPC1_ENET_DEVREGS,
- .enet_devregs_size = HPC1_ENET_DEVREGS_SIZE,
- .pbus_fifo = 0,
- .pbus_fifo_size = 0,
- .pbus_bbram = 0,
-#define MAX_SCSI_XFER (roundup(MAXPHYS, PAGE_SIZE))
- .scsi_dma_segs = (MAX_SCSI_XFER / 4096),
- .scsi_dma_segs_size = 4096,
- .scsi_dma_datain_cmd = (HPC1_SCSI_DMACTL_ACTIVE | HPC1_SCSI_DMACTL_DIR),
- .scsi_dma_dataout_cmd = HPC1_SCSI_DMACTL_ACTIVE,
- .scsi_dmactl_flush = HPC1_SCSI_DMACTL_FLUSH,
- .scsi_dmactl_active = HPC1_SCSI_DMACTL_ACTIVE,
- .scsi_dmactl_reset = HPC1_SCSI_DMACTL_RESET
-};
-
-static struct hpc_values hpc3_values = {
- .revision = 3,
- .scsi0_regs = HPC3_SCSI0_REGS,
- .scsi0_regs_size = HPC3_SCSI0_REGS_SIZE,
- .scsi0_cbp = HPC3_SCSI0_CBP,
- .scsi0_ndbp = HPC3_SCSI0_NDBP,
- .scsi0_bc = HPC3_SCSI0_BC,
- .scsi0_ctl = HPC3_SCSI0_CTL,
- .scsi0_gio = HPC3_SCSI0_GIO,
- .scsi0_dev = HPC3_SCSI0_DEV,
- .scsi0_dmacfg = HPC3_SCSI0_DMACFG,
- .scsi0_piocfg = HPC3_SCSI0_PIOCFG,
- .scsi1_regs = HPC3_SCSI1_REGS,
- .scsi1_regs_size = HPC3_SCSI1_REGS_SIZE,
- .scsi1_cbp = HPC3_SCSI1_CBP,
- .scsi1_ndbp = HPC3_SCSI1_NDBP,
- .scsi1_bc = HPC3_SCSI1_BC,
- .scsi1_ctl = HPC3_SCSI1_CTL,
- .scsi1_gio = HPC3_SCSI1_GIO,
- .scsi1_dev = HPC3_SCSI1_DEV,
- .scsi1_dmacfg = HPC3_SCSI1_DMACFG,
- .scsi1_piocfg = HPC3_SCSI1_PIOCFG,
- .enet_regs = HPC3_ENET_REGS,
- .enet_regs_size = HPC3_ENET_REGS_SIZE,
- .enet_intdelay = 0,
- .enet_intdelayval = 0,
- .enetr_cbp = HPC3_ENETR_CBP,
- .enetr_ndbp = HPC3_ENETR_NDBP,
- .enetr_bc = HPC3_ENETR_BC,
- .enetr_ctl = HPC3_ENETR_CTL,
- .enetr_ctl_active = HPC3_ENETR_CTL_ACTIVE,
- .enetr_reset = HPC3_ENETR_RESET,
- .enetr_dmacfg = HPC3_ENETR_DMACFG,
- .enetr_piocfg = HPC3_ENETR_PIOCFG,
- .enetx_cbp = HPC3_ENETX_CBP,
- .enetx_ndbp = HPC3_ENETX_NDBP,
- .enetx_bc = HPC3_ENETX_BC,
- .enetx_ctl = HPC3_ENETX_CTL,
- .enetx_ctl_active = HPC3_ENETX_CTL_ACTIVE,
- .enetx_dev = HPC3_ENETX_DEV,
- .enetr_fifo = HPC3_ENETR_FIFO,
- .enetr_fifo_size = HPC3_ENETR_FIFO_SIZE,
- .enetx_fifo = HPC3_ENETX_FIFO,
- .enetx_fifo_size = HPC3_ENETX_FIFO_SIZE,
- .enet_devregs = HPC3_ENET_DEVREGS,
- .enet_devregs_size = HPC3_ENET_DEVREGS_SIZE,
- .pbus_fifo = HPC3_PBUS_FIFO,
- .pbus_fifo_size = HPC3_PBUS_FIFO_SIZE,
- .pbus_bbram = HPC3_PBUS_BBRAM,
- .scsi_dma_segs = (MAX_SCSI_XFER / 8192),
- .scsi_dma_segs_size = 8192,
- .scsi_dma_datain_cmd = HPC3_SCSI_DMACTL_ACTIVE,
- .scsi_dma_dataout_cmd =(HPC3_SCSI_DMACTL_ACTIVE | HPC3_SCSI_DMACTL_DIR),
- .scsi_dmactl_flush = HPC3_SCSI_DMACTL_FLUSH,
- .scsi_dmactl_active = HPC3_SCSI_DMACTL_ACTIVE,
- .scsi_dmactl_reset = HPC3_SCSI_DMACTL_RESET
-};
-
-int hpc_match(struct device *, void *, void *);
-void hpc_attach(struct device *, struct device *, void *);
-int hpc_print(void *, const char *);
-
-int hpc_revision(struct hpc_softc *, struct gio_attach_args *);
-int hpc_submatch(struct device *, void *, void *);
-int hpc_power_intr(void *);
-void hpc_blink(void *);
-void hpc_blink_ioc(void *);
-int hpc_read_eeprom(int, bus_space_tag_t, bus_space_handle_t, uint8_t *,
- size_t);
-
-struct hpc_dma_desc *hpc_sync_dma_desc_par(struct hpc_dma_desc *,
- struct hpc_dma_desc *);
-struct hpc_dma_desc *hpc_sync_dma_desc_ecc(struct hpc_dma_desc *,
- struct hpc_dma_desc *);
-void hpc_update_dma_desc_par(struct hpc_dma_desc *, struct hpc_dma_desc *);
-void hpc_update_dma_desc_ecc(struct hpc_dma_desc *, struct hpc_dma_desc *);
-
-/* globals since they depend upon the system type, not the hpc version */
-struct hpc_dma_desc *(*hpc_sync_dma_desc_fn)(struct hpc_dma_desc *,
- struct hpc_dma_desc *);
-void (*hpc_update_dma_desc_fn)(struct hpc_dma_desc *, struct hpc_dma_desc *);
-
-const struct cfattach hpc_ca = {
- sizeof(struct hpc_softc), hpc_match, hpc_attach
-};
-
-struct cfdriver hpc_cd = {
- NULL, "hpc", DV_DULL
-};
-
-void hpc3_space_barrier(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, int);
-
-bus_space_t hpc3bus_tag = {
- PHYS_TO_XKPHYS(0, CCA_NC),
- NULL,
- imc_read_1, imc_write_1,
- imc_read_2, imc_write_2,
- imc_read_4, imc_write_4,
- imc_read_8, imc_write_8,
- imc_read_raw_2, imc_write_raw_2,
- imc_read_raw_4, imc_write_raw_4,
- imc_read_raw_8, imc_write_raw_8,
- imc_space_map, imc_space_unmap, imc_space_region,
- imc_space_vaddr, hpc3_space_barrier
-};
-
-int
-hpc_match(struct device *parent, void *vcf, void *aux)
-{
- struct gio_attach_args* ga = aux;
- uint32_t dummy;
-
- /* Make sure it's actually there and readable */
- if (guarded_read_4(PHYS_TO_XKPHYS(ga->ga_addr, CCA_NC), &dummy) == 0)
- return 1;
-
- return 0;
-}
-
-void
-hpc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct hpc_softc *sc = (struct hpc_softc *)self;
- struct gio_attach_args* ga = aux;
- struct hpc_attach_args ha;
- const struct hpc_device *hd;
- struct hpc_values *hv;
- uint32_t probe32;
- uint8_t probe8;
- uint32_t hpctype;
- int isonboard;
- int isioplus;
- int giofast;
- int needprobe;
- int sysmask = 0;
-
- sc->sc_base = ga->ga_addr;
- sc->sc_ct = ga->ga_iot;
- sc->sc_ch = PHYS_TO_XKPHYS(sc->sc_base, CCA_NC);
- sc->sc_dmat = ga->ga_dmat;
-
- /* setup HPC DMA helpers if not done already */
- if (hpc_sync_dma_desc_fn == NULL) {
- if (ip22_ecc) {
- hpc_sync_dma_desc_fn = hpc_sync_dma_desc_ecc;
- hpc_update_dma_desc_fn = hpc_update_dma_desc_ecc;
- } else {
- hpc_sync_dma_desc_fn = hpc_sync_dma_desc_par;
- hpc_update_dma_desc_fn = hpc_update_dma_desc_par;
- }
- }
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- sysmask = HPCDEV_IP20;
- break;
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- switch (sys_config.system_subtype) {
- default:
- case IP22_INDIGO2:
- sysmask = HPCDEV_IP22;
- break;
- case IP22_CHALLS:
- sysmask = HPCDEV_IP24;
- break;
- case IP22_INDY:
- sysmask = HPCDEV_IP24 | HPCDEV_IP24_INDY;
- break;
- }
- break;
- };
-
- if ((hpctype = hpc_revision(sc, ga)) == 0) {
- printf(": could not identify HPC revision\n");
- return;
- }
-
- if (hpctype != 3)
- hpc_old = 1;
-
- /* force big-endian mode */
- if (hpctype == 15)
- bus_space_write_4(sc->sc_ct, sc->sc_ch, HPC1_BIGENDIAN, 0);
-
- /*
- * Select the proper bus_space_tag for child devices. HPC3 need a
- * specific barrier function.
- */
- if (hpctype == 3)
- sc->sc_ct = &hpc3bus_tag;
-
- /*
- * All machines have only one HPC on the mainboard itself. ''Extra''
- * HPCs require bus arbiter and other magic to run happily.
- */
- isonboard = (sc->sc_base == HPC_BASE_ADDRESS_0);
- isioplus = (sc->sc_base == HPC_BASE_ADDRESS_1 && hpctype == 3 &&
- (sysmask & HPCDEV_IP24) != 0);
-
- printf(": SGI HPC%d%s (%s)\n", (hpctype == 3) ? 3 : 1,
- (hpctype == 15) ? ".5" : "", (isonboard) ? "onboard" :
- (isioplus) ? "IO+ mezzanine" : "GIO slot");
-
- /*
- * Configure the IOC.
- */
- if (isonboard && sys_config.system_type != SGI_IP20) {
- /* Reset IOC */
- bus_space_write_4(sc->sc_ct, sc->sc_ch, IOC_BASE + IOC_RESET,
- IOC_RESET_PARALLEL | IOC_RESET_PCKBC | IOC_RESET_EISA |
- IOC_RESET_ISDN | IOC_RESET_LED_GREEN );
-
- /*
- * Set the two serial ports to PC mode.
- */
- bus_space_write_4(sc->sc_ct, sc->sc_ch, IOC_BASE + IOC_WRITE,
- bus_space_read_4(sc->sc_ct, sc->sc_ch,
- IOC_BASE + IOC_WRITE) |
- IOC_WRITE_PC_UART2 | IOC_WRITE_PC_UART1);
-
- /* XXX: the firmware should have taken care of this already */
-#if 0
- if (sys_config.system_subtype != IP22_INDIGO2) {
- bus_space_write_4(sc->sc_ct, sc->sc_ch,
- IOC_BASE + IOC_GCSEL, 0xff);
- bus_space_write_4(sc->sc_ct, sc->sc_ch,
- IOC_BASE + IOC_GCREG, 0xff);
- }
-#endif
- }
-
- /*
- * Configure the bus arbiter appropriately.
- *
- * In the case of Challenge S, we must tell the IO+ board which
- * DMA channel to use (we steal it from one of the slots). SGI allows
- * an HPC1.5 in slot 1, in which case IO+ must use EXP0, or any
- * other DMA-capable board in slot 0, which leaves us to use EXP1. Of
- * course, this means that only one GIO board may use DMA.
- *
- * Note that this never happens on Indigo2.
- */
- if (isioplus) {
- int arb_slot;
-
- if (guarded_read_4(PHYS_TO_XKPHYS(HPC_BASE_ADDRESS_2, CCA_NC),
- &probe32) != 0)
- arb_slot = GIO_SLOT_EXP1;
- else
- arb_slot = GIO_SLOT_EXP0;
-
- if (gio_arb_config(arb_slot, GIO_ARB_LB | GIO_ARB_MST |
- GIO_ARB_64BIT | GIO_ARB_HPC2_64BIT)) {
- printf("%s: failed to configure GIO bus arbiter\n",
- sc->sc_dev.dv_xname);
- return;
- }
-
- printf("%s: using EXP%d's DMA channel\n",
- sc->sc_dev.dv_xname,
- (arb_slot == GIO_SLOT_EXP0) ? 0 : 1);
-
- bus_space_write_4(sc->sc_ct, sc->sc_ch,
- HPC3_PBUS_CFGPIO_REGS, 0x0003ffff);
-
- if (arb_slot == GIO_SLOT_EXP0)
- bus_space_write_4(sc->sc_ct, sc->sc_ch,
- HPC3_PBUS_CH0_DEVREGS, 0x20202020);
- else
- bus_space_write_4(sc->sc_ct, sc->sc_ch,
- HPC3_PBUS_CH0_DEVREGS, 0x30303030);
- } else if (!isonboard) {
- int arb_slot;
-
- arb_slot = (sc->sc_base == HPC_BASE_ADDRESS_1) ?
- GIO_SLOT_EXP0 : GIO_SLOT_EXP1;
-
- if (gio_arb_config(arb_slot, GIO_ARB_RT | GIO_ARB_MST)) {
- printf("%s: failed to configure GIO bus arbiter\n",
- sc->sc_dev.dv_xname);
- return;
- }
- }
-
- hpc_read_eeprom(hpctype, sc->sc_ct, sc->sc_ch,
- ha.hpc_eeprom, sizeof(ha.hpc_eeprom));
-
- if (hpctype == 3) {
- hv = &hpc3_values;
- if (isonboard) {
- hd = hpc3_onboard;
- if (sys_config.system_subtype == IP22_INDIGO2) {
- /* wild guess */
- giofast = 1;
- } else {
- /*
- * According to IRIX hpc3.h, the fast GIO bit
- * is active high, but the register value has
- * been found to be 0xf8 on slow GIO systems
- * and 0xf1 on fast ones, which tends to prove
- * the opposite...
- */
- if (bus_space_read_4(sc->sc_ct, sc->sc_ch,
- IOC_BASE + IOC_GCREG) & IOC_GCREG_GIO_33MHZ)
- giofast = 0;
- else
- giofast = 1;
- }
- } else {
- hd = hpc3_devices;
- /*
- * XXX should IO+ Mezzanine use the same settings as
- * XXX the onboard HPC3?
- */
- giofast = 0;
- }
- needprobe = 0;
- } else {
- hv = &hpc1_values;
- hv->revision = hpctype;
- giofast = 0;
- if (isonboard) {
- hd = hpc1_onboard;
- needprobe = 0;
- } else {
- hd = hpc1_devices;
- /*
- * Until a reliable way of telling E++ and GIO32 SCSI
- * boards apart is found, we will need to do basic
- * chip existence checks before attempting to attach.
- */
- needprobe = 1;
- }
- }
- for (; hd->hd_name != NULL; hd++) {
- if ((hd->hd_sysmask & sysmask) == 0 ||
- (hd->hd_base != 0 && hd->hd_base != sc->sc_base))
- continue;
-
- ha.ha_name = hd->hd_name;
- ha.ha_base = sc->sc_base;
- ha.ha_devoff = hd->hd_devoff;
- ha.ha_dmaoff = hd->hd_dmaoff;
- /*
- * Compute the interrupt line for HPC1 expansion boards.
- * This allows the hpc1_devices[] array to remain compact.
- */
- if (hd->hd_irq < 0) {
- if (sys_config.system_type == SGI_IP20)
- ha.ha_irq = INT2_L0_INTR(INT2_L0_GIO_LVL1);
- else {
- if (sc->sc_base == HPC_BASE_ADDRESS_1)
- ha.ha_irq =
- INT2_MAP0_INTR(INT2_MAP_GIO_SLOT0);
- else
- ha.ha_irq =
- INT2_MAP0_INTR(INT2_MAP_GIO_SLOT1);
- }
- } else
- ha.ha_irq = hd->hd_irq;
-
- ha.ha_st = sc->sc_ct;
- ha.ha_sh = sc->sc_ch;
- ha.ha_dmat = sc->sc_dmat;
- ha.hpc_regs = hv;
- ha.ha_giofast = giofast;
-
- /*
- * On hpc@gio boards such as the E++, we want to avoid
- * `wdsc not configured' messages (or sq on SCSI boards).
- * The following checks are borrowed from the sq(4) and
- * wdsc(4) respective probes.
- */
- if (needprobe) {
- paddr_t pa;
- volatile uint32_t *reg;
-
- if (strcmp(hd->hd_name, "sq") == 0) {
- /*
- * E++ registers aren't accessible until
- * the reset register is written to.
- */
- pa = sc->sc_ch + hd->hd_dmaoff +
- hv->enetr_reset;
- reg = (volatile uint32_t *)
- PHYS_TO_XKPHYS(pa, CCA_NC);
- if (guarded_read_4((vaddr_t)reg, &probe32) != 0)
- continue;
- *reg = 0x01;
- delay(20);
- *reg = 0x00;
-
- pa = sc->sc_ch + hd->hd_devoff +
- (7 << 2); /* SEEQ_TXSTAT */
- reg = (volatile uint32_t *)
- PHYS_TO_XKPHYS(pa, CCA_NC);
- if (guarded_read_4((vaddr_t)reg, &probe32) != 0)
- continue;
- if ((probe32 & 0xff) != 0x80) /*TXSTAT_OLDNEW*/
- continue;
- } else
- /* if (strcmp(hd->hd_name, "wdsc") == 0) */ {
- /*
- * wdsc registers may not be accessible
- * until the dma engine is reset.
- */
- pa = sc->sc_ch + hd->hd_dmaoff +
- hv->scsi0_ctl;
- reg = (volatile uint32_t *)
- PHYS_TO_XKPHYS(pa, CCA_NC);
- if (guarded_read_4((vaddr_t)reg, &probe32) != 0)
- continue;
- *reg = hv->scsi_dmactl_reset;
- delay(1000);
- *reg = 0;
- delay(1000);
-
- pa = sc->sc_ch + hd->hd_devoff + 3;
- if (guarded_read_1(PHYS_TO_XKPHYS(pa, CCA_NC),
- &probe8) != 0)
- continue;
- if (probe8 == 0xff)
- continue;
- }
- }
-
- config_found_sm(self, &ha, hpc_print, hpc_submatch);
- }
-
- /*
- * Attach the clock chip as well if on hpc0.
- */
- if (isonboard) {
- if (sys_config.system_type == SGI_IP20) {
- ha.ha_name = "dpclock";
- ha.ha_devoff = HPC1_PBUS_BBRAM;
- } else {
- ha.ha_name = "dsclock";
- ha.ha_devoff = HPC3_PBUS_BBRAM;
- }
- ha.ha_base = sc->sc_base;
- ha.ha_dmaoff = 0;
- ha.ha_irq = -1;
- ha.ha_st = sc->sc_ct;
- ha.ha_sh = sc->sc_ch;
- ha.ha_dmat = sc->sc_dmat;
- ha.hpc_regs = NULL;
- ha.ha_giofast = giofast;
-
- config_found_sm(self, &ha, hpc_print, hpc_submatch);
-
- if (sys_config.system_type == SGI_IP20) {
- timeout_set(&sc->sc_blink_tmo, hpc_blink, sc);
- hpc_blink(sc);
- } else {
- timeout_set(&sc->sc_blink_tmo, hpc_blink_ioc, sc);
- hpc_blink_ioc(sc);
- }
- }
-}
-
-/*
- * HPC revision detection isn't as simple as it should be. Devices probe
- * differently depending on their slots, but luckily there is only one
- * instance in which we have to decide the major revision (HPC1 vs HPC3).
- *
- * The HPC is found in the following configurations:
- * o Indigo R4k
- * One on-board HPC1 or HPC1.5.
- * Up to two additional HPC1.5's in GIO slots 0 and 1.
- * o Indy
- * One on-board HPC3.
- * Up to two additional HPC1.5's in GIO slots 0 and 1.
- * o Challenge S
- * One on-board HPC3.
- * Up to one additional HPC3 on the IO+ board (if installed).
- * Up to one additional HPC1.5 in slot 1 of the IO+ board.
- * o Indigo2, Challenge M
- * One on-board HPC3.
- *
- * All we really have to worry about is the IP24 case.
- */
-int
-hpc_revision(struct hpc_softc *sc, struct gio_attach_args *ga)
-{
- uint32_t reg;
-
- /* No hardware ever supported the last hpc base address. */
- if (ga->ga_addr == HPC_BASE_ADDRESS_3)
- return 0;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- if (guarded_read_4(PHYS_TO_XKPHYS(ga->ga_addr + HPC1_BIGENDIAN,
- CCA_NC), ®) != 0) {
- if (((reg >> HPC1_REVSHIFT) & HPC1_REVMASK) ==
- HPC1_REV15)
- return 15;
- else
- return 1;
- }
- return 1;
-
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- if (ga->ga_addr == HPC_BASE_ADDRESS_0)
- return 3;
-
- if (sys_config.system_subtype == IP22_INDIGO2)
- return 0;
-
- /*
- * If IP24, probe slot 0 to determine if HPC1.5 or HPC3. Slot 1
- * must be HPC1.5.
- */
-
- if (ga->ga_addr == HPC_BASE_ADDRESS_2)
- return 15;
-
- /*
- * Probe for it. We use one of the PBUS registers. Note
- * that this probe succeeds with my E++ adapter in slot 1
- * (bad), but it appears to always do the right thing in
- * slot 0 (good!) and we're only worried about that one
- * anyhow.
- */
- if (guarded_read_4(PHYS_TO_XKPHYS(ga->ga_addr +
- HPC3_PBUS_CH7_BP, CCA_NC), ®) != 0)
- return 15;
- else
- return 3;
- }
-
- return 0;
-}
-
-int
-hpc_submatch(struct device *parent, void *vcf, void *aux)
-{
- struct cfdata *cf = (struct cfdata *)vcf;
- struct hpc_attach_args *ha = (struct hpc_attach_args *)aux;
-
- if (cf->cf_loc[0 /*HPCCF_OFFSET*/] != -1 &&
- (bus_addr_t)cf->cf_loc[0 /*HPCCF_OFFSET*/] != ha->ha_devoff)
- return 0;
-
- return (*cf->cf_attach->ca_match)(parent, cf, aux);
-}
-
-int
-hpc_print(void *aux, const char *pnp)
-{
- struct hpc_attach_args *ha = aux;
-
- if (pnp)
- printf("%s at %s", ha->ha_name, pnp);
-
- printf(" offset 0x%08lx", ha->ha_devoff);
- if (ha->ha_irq >= 0)
- printf(" irq %d", ha->ha_irq);
-
- return UNCONF;
-}
-
-void *
-hpc_intr_establish(int irq, int level, int (*handler)(void *), void *arg,
- const char *what)
-{
- return int2_intr_establish(irq, level, handler, arg, what);
-}
-
-int
-hpc_is_intr_pending(int irq)
-{
- return int2_is_intr_pending(irq);
-}
-
-void
-hpc_intr_disable(void *v)
-{
- int2_intr_disable(v);
-}
-
-void
-hpc_intr_enable(void *v)
-{
- int2_intr_enable(v);
-}
-
-/*
- * bus_space_barrier() function for HPC3 (which have a write buffer)
- */
-void
-hpc3_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offs,
- bus_size_t sz, int how)
-{
- mips_sync();
- /* just read a side-effect free register */
- (void)*(volatile uint32_t *)
- PHYS_TO_XKPHYS(HPC_BASE_ADDRESS_0 + HPC3_INTRSTAT_40, CCA_NC);
-}
-
-void
-hpc_blink(void *arg)
-{
- struct hpc_softc *sc = arg;
-
- bus_space_write_1(sc->sc_ct, sc->sc_ch, HPC1_AUX_REGS,
- bus_space_read_1(sc->sc_ct, sc->sc_ch, HPC1_AUX_REGS) ^
- HPC1_AUX_CONSLED);
-
- timeout_add(&sc->sc_blink_tmo,
- (((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1)));
-}
-
-void
-hpc_blink_ioc(void *arg)
-{
- struct hpc_softc *sc = arg;
- uint32_t value;
-
- /* This is a bit odd. To strobe the green LED, we have to toggle the
- red control bit. */
- value = bus_space_read_4(sc->sc_ct, sc->sc_ch, IOC_BASE + IOC_RESET) &
- 0xff;
- value ^= IOC_RESET_LED_RED;
- bus_space_write_4(sc->sc_ct, sc->sc_ch, IOC_BASE + IOC_RESET, value);
-
- timeout_add(&sc->sc_blink_tmo,
- (((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1)));
-}
-
-/*
- * Read the eeprom associated with one of the HPC's.
- *
- * NB: An eeprom is not always present, but the HPC should be able to
- * handle this gracefully. Any consumers should validate the data to
- * ensure it's reasonable.
- */
-int
-hpc_read_eeprom(int hpctype, bus_space_tag_t t, bus_space_handle_t h,
- uint8_t *buf, size_t len)
-{
- struct seeprom_descriptor sd;
- bus_space_handle_t bsh;
- bus_size_t offset;
-
- if (!len || len & 0x1)
- return (1);
-
- offset = (hpctype == 3) ? HPC3_EEPROM_DATA : HPC1_AUX_REGS;
-
- if (bus_space_subregion(t, h, offset, 1, &bsh) != 0)
- return (1);
-
- sd.sd_chip = C56_66;
- sd.sd_tag = t;
- sd.sd_bsh = bsh;
- sd.sd_regsize = 1;
- sd.sd_control_offset = 0;
- sd.sd_status_offset = 0;
- sd.sd_dataout_offset = 0;
- sd.sd_DI = 0x10; /* EEPROM -> CPU */
- sd.sd_DO = 0x08; /* CPU -> EEPROM */
- sd.sd_CK = 0x04;
- sd.sd_CS = 0x02;
- sd.sd_MS = 0;
- sd.sd_RDY = 0;
-
- if (read_seeprom(&sd, (uint16_t *)buf, 0, len / 2) != 1)
- return (1);
-
- bus_space_unmap(t, bsh, 1);
-
- return 0;
-}
-
-/*
- * Routines to update HPC DMA descriptors.
- */
-
-struct hpc_dma_desc *
-hpc_sync_dma_desc(struct hpc_dma_desc *desc, struct hpc_dma_desc *store)
-{
- return (*hpc_sync_dma_desc_fn)(desc, store);
-}
-
-void
-hpc_update_dma_desc(struct hpc_dma_desc *desc, struct hpc_dma_desc *store)
-{
- (*hpc_update_dma_desc_fn)(desc, store);
-}
-
-/*
- * Parity MC flavour: descriptors are in non-cacheable memory, to which
- * accesses are allowed. No cache operation is needed.
- */
-
-struct hpc_dma_desc *
-hpc_sync_dma_desc_par(struct hpc_dma_desc *desc, struct hpc_dma_desc *store)
-{
- /* nothing to do */
- return desc;
-}
-
-void
-hpc_update_dma_desc_par(struct hpc_dma_desc *desc, struct hpc_dma_desc *store)
-{
- /* nothing to do */
- KDASSERT(desc == store);
-}
-
-/*
- * ECC MC flavour: descriptor are in cacheable memory, and need to be
- * evicted from cache before reading, and flushed from cache after updating.
- *
- * In addition, on R1000 systems, an actual copy of the descriptor needs
- * to be performed, to prevent speculative execution from writing to the
- * cached descriptor.
- */
-
-struct hpc_dma_desc *
-hpc_sync_dma_desc_ecc(struct hpc_dma_desc *desc, struct hpc_dma_desc *store)
-{
- Mips_IOSyncDCache(curcpu(),
- (vaddr_t)desc, sizeof(struct hpc_dma_desc), CACHE_SYNC_R);
-
- store->hdd_bufptr = desc->hdd_bufptr;
- store->hdd_ctl = desc->hdd_ctl;
- store->hdd_descptr = desc->hdd_descptr;
-
- return store;
-}
-
-void
-hpc_update_dma_desc_ecc(struct hpc_dma_desc *desc, struct hpc_dma_desc *store)
-{
- desc->hdd_bufptr = store->hdd_bufptr;
- desc->hdd_ctl = store->hdd_ctl;
- desc->hdd_descptr = store->hdd_descptr;
-
- Mips_IOSyncDCache(curcpu(),
- (vaddr_t)desc, sizeof(struct hpc_dma_desc), CACHE_SYNC_X);
-}
+++ /dev/null
-/* $OpenBSD: hpcdma.c,v 1.1 2012/03/28 20:44:23 miod Exp $ */
-/* $NetBSD: hpcdma.c,v 1.21 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2001 Wayne Knowles
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Wayne Knowles
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Support for SCSI DMA provided by the HPC.
- *
- * Note: We use SCSI0 offsets, etc. here. Since the layout of SCSI0
- * and SCSI1 are the same, this is no problem.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/buf.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <machine/bus.h>
-
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/hpc/hpcdma.h>
-
-/*
- * Allocate DMA Chain descriptor list
- */
-void
-hpcdma_init(struct hpc_attach_args *haa, struct hpc_dma_softc *sc, int ndesc)
-{
- bus_dma_segment_t seg;
- int rseg, allocsz;
-
- sc->sc_bst = haa->ha_st;
- sc->sc_dmat = haa->ha_dmat;
- sc->sc_ndesc = ndesc;
- sc->sc_flags = 0;
-
- if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_dmaoff,
- sc->hpc->scsi0_regs_size, &sc->sc_bsh) != 0) {
- printf(": can't map DMA registers\n");
- return;
- }
-
- /* Alloc 1 additional descriptor - needed for DMA bug fix */
- allocsz = sizeof(struct hpc_dma_desc) * (ndesc + 1);
-
- /*
- * Allocate a block of memory for dma chaining pointers
- */
- if (bus_dmamem_alloc(sc->sc_dmat, allocsz, 0, 0, &seg, 1, &rseg,
- BUS_DMA_NOWAIT)) {
- printf(": can't allocate sglist\n");
- return;
- }
- /* Map pages into kernel memory */
- if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, allocsz,
- (caddr_t *)&sc->sc_desc_kva, BUS_DMA_NOWAIT)) {
- printf(": can't map sglist\n");
- bus_dmamem_free(sc->sc_dmat, &seg, rseg);
- return;
- }
-
- if (bus_dmamap_create(sc->sc_dmat, allocsz, 1 /*seg*/, allocsz, 0,
- BUS_DMA_WAITOK, &sc->sc_dmamap) != 0) {
- printf(": failed to create dmamap\n");
- return;
- }
-
- if (bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap,
- sc->sc_desc_kva, allocsz, NULL, BUS_DMA_NOWAIT)) {
- printf(": can't load sglist\n");
- return;
- }
-
- sc->sc_desc_pa = sc->sc_dmamap->dm_segs[0].ds_addr;
-}
-
-
-void
-hpcdma_sglist_create(struct hpc_dma_softc *sc, bus_dmamap_t dmamap)
-{
- struct hpc_dma_desc *hva;
- bus_addr_t hpa;
- bus_dma_segment_t *segp;
- int i;
-
- KASSERT(dmamap->dm_nsegs <= sc->sc_ndesc);
-
- hva = sc->sc_desc_kva;
- hpa = sc->sc_desc_pa;
- segp = dmamap->dm_segs;
-
-#ifdef DMA_DEBUG
- printf("DMA_SGLIST<");
-#endif
- for (i = dmamap->dm_nsegs; i; i--) {
-#ifdef DMA_DEBUG
- printf("%p:%ld, ", (void *)segp->ds_addr, segp->ds_len);
-#endif
- hpa += sizeof(struct hpc_dma_desc); /* next chain desc */
- if (sc->hpc->revision == 3) {
- hva->hpc3_hdd_bufptr = segp->ds_addr;
- hva->hpc3_hdd_ctl = segp->ds_len;
- hva->hdd_descptr = hpa;
- } else /* HPC 1/1.5 */ {
- /*
- * there doesn't seem to be any good way of doing this
- * via an abstraction layer
- */
- hva->hpc1_hdd_bufptr = segp->ds_addr;
- hva->hpc1_hdd_ctl = segp->ds_len;
- hva->hdd_descptr = hpa;
- }
- ++hva;
- ++segp;
- }
-
- /* Work around HPC3 DMA bug */
- if (sc->hpc->revision == 3) {
- hva->hpc3_hdd_bufptr = 0;
- hva->hpc3_hdd_ctl = HPC3_HDD_CTL_EOCHAIN;
- hva->hdd_descptr = 0;
- } else {
- hva--;
- hva->hpc1_hdd_bufptr |= HPC1_HDD_CTL_EOCHAIN;
- hva->hdd_descptr = 0;
- }
-
-#ifdef DMA_DEBUG
- printf(">\n");
-#endif
- bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
- 0, sizeof(struct hpc_dma_desc) * (dmamap->dm_nsegs + 1),
- BUS_DMASYNC_PREWRITE);
-
- /* Load DMA Descriptor list */
- bus_space_write_4(sc->sc_bst, sc->sc_bsh, sc->hpc->scsi0_ndbp,
- sc->sc_desc_pa);
-}
-
-void
-hpcdma_cntl(struct hpc_dma_softc *sc, uint32_t mode)
-{
- bus_space_write_4(sc->sc_bst, sc->sc_bsh, sc->hpc->scsi0_ctl, mode);
-}
-
-void
-hpcdma_reset(struct hpc_dma_softc *sc)
-{
- bus_space_write_4(sc->sc_bst, sc->sc_bsh, sc->hpc->scsi0_ctl,
- sc->hpc->scsi_dmactl_reset);
- delay(100);
- bus_space_write_4(sc->sc_bst, sc->sc_bsh, sc->hpc->scsi0_ctl, 0);
- delay(1000);
-}
-
-void
-hpcdma_flush(struct hpc_dma_softc *sc)
-{
- uint32_t mode;
-
- mode = bus_space_read_4(sc->sc_bst, sc->sc_bsh, sc->hpc->scsi0_ctl);
- bus_space_write_4(sc->sc_bst, sc->sc_bsh,
- sc->hpc->scsi0_ctl, mode | sc->hpc->scsi_dmactl_flush);
-
- /* Wait for Active bit to drop */
- while (bus_space_read_4(sc->sc_bst, sc->sc_bsh, sc->hpc->scsi0_ctl) &
- sc->hpc->scsi_dmactl_active) {
- bus_space_barrier(sc->sc_bst, sc->sc_bsh, sc->hpc->scsi0_ctl, 4,
- BUS_SPACE_BARRIER_READ);
- }
-}
+++ /dev/null
-/* $OpenBSD: hpcdma.h,v 1.2 2021/03/11 11:17:00 jsg Exp $ */
-/* $NetBSD: hpcdma.h,v 1.11 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2001 Wayne Knowles
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Wayne Knowles
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-struct hpc_dma_softc {
- bus_space_tag_t sc_bst;
- bus_space_handle_t sc_bsh;
- bus_dma_tag_t sc_dmat;
-
- uint32_t sc_flags;
-#define HPCDMA_READ 0x20 /* direction of transfer */
-#define HPCDMA_LOADED 0x40 /* bus_dmamap loaded */
-#define HPCDMA_ACTIVE 0x80 /* DMA engine is busy */
- uint32_t sc_dmacmd;
- int sc_ndesc;
- bus_dmamap_t sc_dmamap;
- struct hpc_dma_desc *sc_desc_kva; /* Virtual address */
- bus_addr_t sc_desc_pa; /* DMA address */
- ssize_t sc_dlen; /* number of bytes transferred */
- struct hpc_values *hpc; /* constants for HPC1/3 */
-};
-
-
-void hpcdma_init(struct hpc_attach_args *, struct hpc_dma_softc *, int);
-void hpcdma_sglist_create(struct hpc_dma_softc *, bus_dmamap_t);
-void hpcdma_cntl(struct hpc_dma_softc *, uint32_t);
-void hpcdma_reset(struct hpc_dma_softc *);
-void hpcdma_flush(struct hpc_dma_softc *);
+++ /dev/null
-/* $OpenBSD: hpcreg.h,v 1.2 2015/09/05 21:13:24 miod Exp $ */
-/* $NetBSD: hpcreg.h,v 1.20 2011/01/25 12:21:04 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2001 Rafal K. Boni
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * HPC locations are identical across all HPC-supported
- * platforms.
- */
-#define HPC_BASE_ADDRESS_0 0x1fb80000 /* Primary onboard */
-#define HPC_BASE_ADDRESS_1 0x1fb00000
-#define HPC_BASE_ADDRESS_2 0x1f980000
-#define HPC_BASE_ADDRESS_3 0x1f900000 /* NB: Never supported in h/w */
-
-/*
- * HPC3 descriptor layout.
- */
-struct hpc_dma_desc {
- uint32_t hdd_bufptr; /* Physical address of buffer */
- uint32_t hdd_ctl; /* Control flags and byte count */
- uint32_t hdd_descptr; /* Physical address of next descr. */
-#if defined(CPU_R8000) || defined (CPU_R10000)
- uint32_t hdd_pad[29]; /* Pad out to largest cache line */
-#else
- uint32_t hdd_pad; /* Pad out to quadword alignment */
-#endif
-};
-
-#define HPC1_DMA_BOUNDARY 0x1000
-#define HPC3_DMA_BOUNDARY 0x2000
-
-/*
- * The hdd_bufptr and hdd_ctl fields are swapped between HPC1 and
- * HPC3. These fields are referenced by macro for readability.
- */
-#define hpc1_hdd_ctl hdd_bufptr
-#define hpc1_hdd_bufptr hdd_ctl
-#define hpc3_hdd_ctl hdd_ctl
-#define hpc3_hdd_bufptr hdd_bufptr
-
-/*
- * Control flags
- */
-#define HPC3_HDD_CTL_EOCHAIN 0x80000000 /* End of descriptor chain */
-#define HPC3_HDD_CTL_EOPACKET 0x40000000 /* Ethernet: end of packet */
-#define HPC3_HDD_CTL_INTR 0x20000000 /* Interrupt when finished */
-#define HPC3_HDD_CTL_XMITDONE 0x00008000 /* Ethernet transmit done */
-#define HPC3_HDD_CTL_OWN 0x00004000 /* CPU owns this frame */
-
-#define HPC3_HDD_CTL_BYTECNT(x) ((x) & 0x3fff) /* Byte count: for ethernet
- * rcv channel also doubles as
- * length of packet received
- */
-
-/*
- * HPC memory map, as offsets from HPC base
- *
- * XXXrkb: should each section be used as a base and have the specific
- * registers offset from there??
- *
- * XXX: define register values as well as their offsets.
- *
- */
-#define HPC3_PBUS_DMAREGS 0x00000000 /* DMA registers for PBus */
-#define HPC3_PBUS_DMAREGS_SIZE 0x0000ffff /* channels 0 - 7 */
-
-#define HPC3_PBUS_CH0_BP 0x00000000 /* Chan 0 Buffer Ptr */
-#define HPC3_PBUS_CH0_DP 0x00000004 /* Chan 0 Descriptor Ptr */
-#define HPC3_PBUS_CH0_CTL 0x00001000 /* Chan 0 Control Register */
-
-#define HPC3_PBUS_CH1_BP 0x00002000 /* Chan 1 Buffer Ptr */
-#define HPC3_PBUS_CH1_DP 0x00002004 /* Chan 1 Descriptor Ptr */
-#define HPC3_PBUS_CH1_CTL 0x00003000 /* Chan 1 Control Register */
-
-#define HPC3_PBUS_CH2_BP 0x00004000 /* Chan 2 Buffer Ptr */
-#define HPC3_PBUS_CH2_DP 0x00004004 /* Chan 2 Descriptor Ptr */
-#define HPC3_PBUS_CH2_CTL 0x00005000 /* Chan 2 Control Register */
-
-#define HPC3_PBUS_CH3_BP 0x00006000 /* Chan 3 Buffer Ptr */
-#define HPC3_PBUS_CH3_DP 0x00006004 /* Chan 3 Descriptor Ptr */
-#define HPC3_PBUS_CH3_CTL 0x00007000 /* Chan 3 Control Register */
-
-#define HPC3_PBUS_CH4_BP 0x00008000 /* Chan 4 Buffer Ptr */
-#define HPC3_PBUS_CH4_DP 0x00008004 /* Chan 4 Descriptor Ptr */
-#define HPC3_PBUS_CH4_CTL 0x00009000 /* Chan 4 Control Register */
-
-#define HPC3_PBUS_CH5_BP 0x0000a000 /* Chan 5 Buffer Ptr */
-#define HPC3_PBUS_CH5_DP 0x0000a004 /* Chan 5 Descriptor Ptr */
-#define HPC3_PBUS_CH5_CTL 0x0000b000 /* Chan 5 Control Register */
-
-#define HPC3_PBUS_CH6_BP 0x0000c000 /* Chan 6 Buffer Ptr */
-#define HPC3_PBUS_CH6_DP 0x0000c004 /* Chan 6 Descriptor Ptr */
-#define HPC3_PBUS_CH6_CTL 0x0000d000 /* Chan 6 Control Register */
-
-#define HPC3_PBUS_CH7_BP 0x0000e000 /* Chan 7 Buffer Ptr */
-#define HPC3_PBUS_CH7_DP 0x0000e004 /* Chan 7 Descriptor Ptr */
-#define HPC3_PBUS_CH7_CTL 0x0000f000 /* Chan 7 Control Register */
-
-#define HPC3_SCSI0_REGS 0x00010000 /* SCSI channel 0 registers */
-#define HPC3_SCSI0_REGS_SIZE 0x00001fff
-
-#define HPC3_SCSI0_CBP 0x00000000 /* Current buffer ptr */
-#define HPC3_SCSI0_NDBP 0x00000004 /* Next descriptor ptr */
-
-#define HPC3_SCSI0_BC 0x00001000 /* DMA byte count & flags */
-#define HPC3_SCSI0_CTL 0x00001004 /* DMA control flags */
-#define HPC3_SCSI0_GIO 0x00001008 /* GIO DMA FIFO pointer */
-#define HPC3_SCSI0_DEV 0x0000100c /* Device DMA FIFO pointer */
-#define HPC3_SCSI0_DMACFG 0x00001010 /* DMA configuration */
-#define HPC3_SCSI0_PIOCFG 0x00001014 /* PIO configuration */
-
-#define HPC3_SCSI1_REGS 0x00012000 /* SCSI channel 1 registers */
-#define HPC3_SCSI1_REGS_SIZE 0x00001fff
-
-#define HPC3_SCSI1_CBP 0x00000000 /* Current buffer ptr */
-#define HPC3_SCSI1_NDBP 0x00000004 /* Next descriptor ptr */
-
-#define HPC3_SCSI1_BC 0x00001000 /* DMA byte count & flags */
-#define HPC3_SCSI1_CTL 0x00001004 /* DMA control flags */
-#define HPC3_SCSI1_GIO 0x00001008 /* GIO DMA FIFO pointer */
-#define HPC3_SCSI1_DEV 0x0000100c /* Device DMA FIFO pointer */
-#define HPC3_SCSI1_DMACFG 0x00001010 /* DMA configuration */
-#define HPC3_SCSI1_PIOCFG 0x00001014 /* PIO configuration */
-
-/* HPC3_SCSIx_CTL "SCSI control register" flags: */
-#define HPC3_SCSI_DMACTL_IRQ 0x01 /* IRQ asserted, dma done or parity */
-#define HPC3_SCSI_DMACTL_ENDIAN 0x02 /* DMA endian mode, 0=BE, 1=LE */
-#define HPC3_SCSI_DMACTL_DIR 0x04 /* DMA direction, 0=dev->mem, 1=mem->dev */
-#define HPC3_SCSI_DMACTL_FLUSH 0x08 /* Flush DMA FIFO's */
-#define HPC3_SCSI_DMACTL_ACTIVE 0x10 /* DMA channel is active */
-#define HPC3_SCSI_DMACTL_AMASK 0x20 /* DMA active inhibits PIO */
-#define HPC3_SCSI_DMACTL_RESET 0x40 /* Reset dma channel and ext. controller */
-#define HPC3_SCSI_DMACTL_PERR 0x80 /* Parity error: interface to controller */
-
-/* HPC_PBUS_CHx_CTL read: */
-#define HPC3_PBUS_DMACTL_IRQ 0x01 /* IRQ asserted, DMA done */
-#define HPC3_PBUS_DMACTL_ISACT 0x02 /* DMA channel is active */
-
-/* HPC_PBUS_CHx_CTL write: */
-#define HPC3_PBUS_DMACTL_ENDIAN 0x02 /* DMA endianness, 0=BE 1=LE */
-#define HPC3_PBUS_DMACTL_RECEIVE 0x04 /* DMA direction, 1=dev->mem, 0=mem->dev*/
-#define HPC3_PBUS_DMACTL_FLUSH 0x08 /* Flush DMA FIFO */
-#define HPC3_PBUS_DMACTL_ACT 0x10 /* Activate DMA channel */
-#define HPC3_PBUS_DMACTL_ACT_LD 0x20 /* Load enable for ACT */
-#define HPC3_PBUS_DMACTL_RT 0x40 /* Enable real time GIO service for DMA */
-#define HPC3_PBUS_DMACTL_HIGHWATER_SHIFT 8
-#define HPC3_PBUS_DMACTL_FIFOBEG_SHIFT 16
-#define HPC3_PBUS_DMACTL_FIFOEND_SHIFT 24
-
-#define HPC3_ENET_REGS 0x00014000 /* Ethernet registers */
-#define HPC3_ENET_REGS_SIZE 0x00003fff
-
-#define HPC3_ENETR_CBP 0x00000000 /* Recv: Current buffer ptr */
-#define HPC3_ENETR_NDBP 0x00000004 /* Recv: Next descriptor ptr */
-
-#define HPC3_ENETR_BC 0x00001000 /* Recv: DMA byte cnt/flags */
-#define HPC3_ENETR_CTL 0x00001004 /* Recv: DMA control flags */
-
-#define HPC3_ENETR_CTL_STAT_5_0 0x003f /* Seeq irq status: bits 0-5 */
-#define HPC3_ENETR_CTL_STAT_6 0x0040 /* Irq status: late_rxdc */
-#define HPC3_ENETR_CTL_STAT_7 0x0080 /* Irq status: old/new bit */
-#define HPC3_ENETR_CTL_LENDIAN 0x0100 /* DMA channel endian mode */
-#define HPC3_ENETR_CTL_ACTIVE 0x0200 /* DMA channel active? */
-#define HPC3_ENETR_CTL_ACTIVE_MSK 0x0400 /* DMA channel active? */
-#define HPC3_ENETR_CTL_RBO 0x0800 /* Recv buffer overflow */
-
-#define HPC3_ENETR_GIO 0x00001008 /* Recv: GIO DMA FIFO ptr */
-#define HPC3_ENETR_DEV 0x0000100c /* Recv: Device DMA FIFO ptr */
-#define HPC3_ENETR_RESET 0x00001014 /* Recv: Ethernet chip reset */
-
-#define HPC3_ENETR_RESET_CH 0x0001 /* Reset controller & chan */
-#define HPC3_ENETR_RESET_CLRINT 0x0002 /* Clear channel interrupt */
-#define HPC3_ENETR_RESET_LOOPBK 0x0004 /* External loopback enable */
-#define HPC3_ENETR_RESET_CLRRBO 0x0008 /* Clear RBO condition (??) */
-
-#define HPC3_ENETR_DMACFG 0x00001018 /* Recv: DMA configuration */
-
-#define HPC3_ENETR_DMACFG_D1(_x) (((_x) << 0) & 0x000f) /* D1 gio_clk cycles */
-#define HPC3_ENETR_DMACFG_D2(_x) (((_x) << 4) & 0x00f0) /* D2 gio_clk cycles */
-#define HPC3_ENETR_DMACFG_D3(_x) (((_x) << 8) & 0x0f00) /* D3 gio_clk cycles */
-#define HPC3_ENETR_DMACFG_WRCTL 0x01000 /* Enable IPG write */
-
-/*
- * The following three bits work around bugs in the Seeq 8003; if you
- * don't set them, the Seeq gets wonky pretty often.
- */
-#define HPC3_ENETR_DMACFG_FIX_RXDC 0x02000 /* Clear EOP bits on RXDC */
-#define HPC3_ENETR_DMACFG_FIX_EOP 0x04000 /* Enable rxintr timeout */
-#define HPC3_ENETR_DMACFG_FIX_INTR 0x08000 /* Enable EOP timeout */
-#define HPC3_ENETR_DMACFG_TIMEOUT 0x30000 /* Timeout value for above two*/
-
-#define HPC3_ENETR_PIOCFG 0x0000101c /* Recv: PIO configuration */
-
-#define HPC3_ENETR_PIOCFG_P1(_x) (((_x) << 0) & 0x000f) /* P1 gio_clk cycles */
-#define HPC3_ENETR_PIOCFG_P2(_x) (((_x) << 4) & 0x00f0) /* P2 gio_clk cycles */
-#define HPC3_ENETR_PIOCFG_P3(_x) (((_x) << 8) & 0x0f00) /* P3 gio_clk cycles */
-
-#define HPC3_ENETX_CBP 0x00002000 /* Xmit: Current buffer ptr */
-#define HPC3_ENETX_NDBP 0x00002004 /* Xmit: Next descriptor ptr */
-
-#define HPC3_ENETX_BC 0x00003000 /* Xmit: DMA byte cnt/flags */
-#define HPC3_ENETX_CTL 0x00003004 /* Xmit: DMA control flags */
-
-#define HPC3_ENETX_CTL_STAT_5_0 0x003f /* Seeq irq status: bits 0-5 */
-#define HPC3_ENETX_CTL_STAT_6 0x0040 /* Irq status: late_rxdc */
-#define HPC3_ENETX_CTL_STAT_7 0x0080 /* Irq status: old/new bit */
-#define HPC3_ENETX_CTL_LENDIAN 0x0100 /* DMA channel endian mode */
-#define HPC3_ENETX_CTL_ACTIVE 0x0200 /* DMA channel active? */
-#define HPC3_ENETX_CTL_ACTIVE_MSK 0x0400 /* DMA channel active? */
-#define HPC3_ENETX_CTL_RBO 0x0800 /* Recv buffer overflow */
-
-#define HPC3_ENETX_GIO 0x00003008 /* Xmit: GIO DMA FIFO ptr */
-#define HPC3_ENETX_DEV 0x0000300c /* Xmit: Device DMA FIFO ptr */
-
-#define HPC3_PBUS_FIFO 0x00020000 /* PBus DMA FIFO */
-#define HPC3_PBUS_FIFO_SIZE 0x00007fff /* PBus DMA FIFO size */
-
-#define HPC3_SCSI0_FIFO 0x00028000 /* SCSI0 DMA FIFO */
-#define HPC3_SCSI0_FIFO_SIZE 0x00001fff /* SCSI0 DMA FIFO size */
-
-#define HPC3_SCSI1_FIFO 0x0002a000 /* SCSI1 DMA FIFO */
-#define HPC3_SCSI1_FIFO_SIZE 0x00001fff /* SCSI1 DMA FIFO size */
-
-#define HPC3_ENETR_FIFO 0x0002c000 /* Ether recv DMA FIFO */
-#define HPC3_ENETR_FIFO_SIZE 0x00001fff /* Ether recv DMA FIFO size */
-
-#define HPC3_ENETX_FIFO 0x0002e000 /* Ether xmit DMA FIFO */
-#define HPC3_ENETX_FIFO_SIZE 0x00001fff /* Ether xmit DMA FIFO size */
-
-/*
- * HPCBUG: The interrupt status is split amongst two registers, and they're
- * not even consecutive in the HPC address space. This is documented as a
- * bug by SGI.
- */
-#define HPC3_INTRSTAT_40 0x00030000 /* Interrupt stat, bits 4:0 */
-#define HPC3_INTRSTAT_95 0x0003000c /* Interrupt stat, bits 9:5 */
-
-#define HPC3_GIO_MISC 0x00030004 /* GIO64 misc register */
-
-#define HPC3_EEPROM_DATA 0x0003000b /* Serial EEPROM data reg. */
- /* (byte) */
-
-#define HPC3_GIO_BUSERR 0x00030010 /* GIO64 bus error intr stat */
-
-#define HPC3_SCSI0_DEVREGS 0x00044000 /* SCSI channel 0 chip regs */
-#define HPC3_SCSI1_DEVREGS 0x0004c000 /* SCSI channel 1 chip regs */
-
-#define HPC3_ENET_DEVREGS 0x00054000 /* Ethernet chip registers */
-#define HPC3_ENET_DEVREGS_SIZE 0x000004ff /* Size of chip registers */
-
-#define HPC3_PBUS_DEVREGS 0x00054000 /* PBus PIO chip registers */
-#define HPC3_PBUS_DEVREGS_SIZE 0x000003ff /* PBus PIO chip registers */
-
-#define HPC3_PBUS_CH0_DEVREGS 0x00058000 /* PBus ch. 0 chip registers */
-#define HPC3_PBUS_CH0_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH1_DEVREGS 0x00058400 /* PBus ch. 1 chip registers */
-#define HPC3_PBUS_CH1_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH2_DEVREGS 0x00058800 /* PBus ch. 2 chip registers */
-#define HPC3_PBUS_CH2_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH3_DEVREGS 0x00058c00 /* PBus ch. 3 chip registers */
-#define HPC3_PBUS_CH3_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH4_DEVREGS 0x00059000 /* PBus ch. 4 chip registers */
-#define HPC3_PBUS_CH4_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH5_DEVREGS 0x00059400 /* PBus ch. 5 chip registers */
-#define HPC3_PBUS_CH5_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH6_DEVREGS 0x00059800 /* PBus ch. 6 chip registers */
-#define HPC3_PBUS_CH6_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH7_DEVREGS 0x00059c00 /* PBus ch. 7 chip registers */
-#define HPC3_PBUS_CH7_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH8_DEVREGS 0x0005a000 /* PBus ch. 8 chip registers */
-#define HPC3_PBUS_CH8_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH9_DEVREGS 0x0005a400 /* PBus ch. 9 chip registers */
-#define HPC3_PBUS_CH9_DEVREGS_SIZE 0x03ff
-
-#define HPC3_PBUS_CH8_DEVREGS_2 0x0005a800 /* PBus ch. 8 chip registers */
-#define HPC3_PBUS_CH8_DEVREGS_2_SIZE 0x03ff
-
-#define HPC3_PBUS_CH9_DEVREGS_2 0x0005ac00 /* PBus ch. 9 chip registers */
-#define HPC3_PBUS_CH9_DEVREGS_2_SIZE 0x03ff
-
-#define HPC3_PBUS_CH8_DEVREGS_3 0x0005b000 /* PBus ch. 8 chip registers */
-#define HPC3_PBUS_CH8_DEVREGS_3_SIZE 0x03ff
-
-#define HPC3_PBUS_CH9_DEVREGS_3 0x0005b400 /* PBus ch. 9 chip registers */
-#define HPC3_PBUS_CH9_DEVREGS_3_SIZE 0x03ff
-
-#define HPC3_PBUS_CH8_DEVREGS_4 0x0005b800 /* PBus ch. 8 chip registers */
-#define HPC3_PBUS_CH8_DEVREGS_4_SIZE 0x03ff
-
-#define HPC3_PBUS_CH9_DEVREGS_4 0x0005bc00 /* PBus ch. 9 chip registers */
-#define HPC3_PBUS_CH9_DEVREGS_4_SIZE 0x03ff
-
-#define HPC3_PBUS_CFGDMA_REGS 0x0005c000 /* PBus DMA config registers */
-#define HPC3_PBUS_CFGDMA_REGS_SIZE 0x0fff
-
-#define HPC3_PBUS_CH0_CFGDMA 0x0005c000 /* PBus Ch. 0 DMA config */
-#define HPC3_PBUS_CH0_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CH1_CFGDMA 0x0005c200 /* PBus Ch. 1 DMA config */
-#define HPC3_PBUS_CH1_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CH2_CFGDMA 0x0005c400 /* PBus Ch. 2 DMA config */
-#define HPC3_PBUS_CH2_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CH3_CFGDMA 0x0005c600 /* PBus Ch. 3 DMA config */
-#define HPC3_PBUS_CH3_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CH4_CFGDMA 0x0005c800 /* PBus Ch. 4 DMA config */
-#define HPC3_PBUS_CH4_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CH5_CFGDMA 0x0005ca00 /* PBus Ch. 5 DMA config */
-#define HPC3_PBUS_CH5_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CH6_CFGDMA 0x0005cc00 /* PBus Ch. 6 DMA config */
-#define HPC3_PBUS_CH6_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CH7_CFGDMA 0x0005ce00 /* PBus Ch. 7 DMA config */
-#define HPC3_PBUS_CH7_CFGDMA_SIZE 0x01ff
-
-#define HPC3_PBUS_CFGPIO_REGS 0x0005d000 /* PBus PIO config registers */
-#define HPC3_PBUS_CFGPIO_REGS_SIZE 0x0fff
-
-#define HPC3_PBUS_CH0_CFGPIO 0x0005d000 /* PBus Ch. 0 PIO config */
-#define HPC3_PBUS_CH1_CFGPIO 0x0005d100 /* PBus Ch. 1 PIO config */
-#define HPC3_PBUS_CH2_CFGPIO 0x0005d200 /* PBus Ch. 2 PIO config */
-#define HPC3_PBUS_CH3_CFGPIO 0x0005d300 /* PBus Ch. 3 PIO config */
-#define HPC3_PBUS_CH4_CFGPIO 0x0005d400 /* PBus Ch. 4 PIO config */
-#define HPC3_PBUS_CH5_CFGPIO 0x0005d500 /* PBus Ch. 5 PIO config */
-#define HPC3_PBUS_CH6_CFGPIO 0x0005d600 /* PBus Ch. 6 PIO config */
-#define HPC3_PBUS_CH7_CFGPIO 0x0005d700 /* PBus Ch. 7 PIO config */
-#define HPC3_PBUS_CH8_CFGPIO 0x0005d800 /* PBus Ch. 8 PIO config */
-#define HPC3_PBUS_CH9_CFGPIO 0x0005d900 /* PBus Ch. 9 PIO config */
-#define HPC3_PBUS_CH8_CFGPIO_2 0x0005da00 /* PBus Ch. 8 PIO config */
-#define HPC3_PBUS_CH9_CFGPIO_2 0x0005db00 /* PBus Ch. 9 PIO config */
-#define HPC3_PBUS_CH8_CFGPIO_3 0x0005dc00 /* PBus Ch. 8 PIO config */
-#define HPC3_PBUS_CH9_CFGPIO_3 0x0005dd00 /* PBus Ch. 9 PIO config */
-#define HPC3_PBUS_CH8_CFGPIO_4 0x0005de00 /* PBus Ch. 8 PIO config */
-#define HPC3_PBUS_CH9_CFGPIO_4 0x0005df00 /* PBus Ch. 9 PIO config */
-
-#define HPC3_PBUS_PROM_WE 0x0005e000 /* PBus boot-prom write
- * enable register
- */
-
-#define HPC3_PBUS_PROM_SWAP 0x0005e800 /* PBus boot-prom chip-select
- * swap register
- */
-
-#define HPC3_PBUS_GEN_OUT 0x0005f000 /* PBus general-purpose output
- * register
- */
-
-#define HPC3_PBUS_BBRAM 0x00060000 /* PBus battery-backed RAM
- * external registers
- */
-
-/* HPC1/HPC1.5 differs from HPC3 in several details. */
-
-#define HPC1_HDD_CTL_EOCHAIN 0x80000000 /* End of descriptor chain */
-#define HPC1_HDD_CTL_EOPACKET 0x80000000 /* Ethernet: end of packet */
-#define HPC1_HDD_CTL_INTR 0x00008000 /* Interrupt when finished */
-#define HPC1_HDD_CTL_OWN 0x40000000 /* CPU owns this frame */
-#define HPC1_HDD_CTL_BYTECNT(x) ((x) & 0x1fff) /* Byte count: for ethernet */
-#define HPC1_BIGENDIAN 0x000000c0 /* Endianness:5 revision:2 */
-#define HPC1_REVSHIFT 0x00000006 /* Revision rshft */
-#define HPC1_REVMASK 0x00000003 /* Revision mask */
-#define HPC1_REV15 0x00000001 /* HPC Revision 1.5 */
-#define HPC1_SCSI0_REGS 0x00000088
-#define HPC1_SCSI0_REGS_SIZE 0x00000018
-#define HPC1_SCSI0_CBP 0x00000004 /* Current buffer ptr */
-#define HPC1_SCSI0_NDBP 0x00000008 /* Next descriptor ptr */
-#define HPC1_SCSI0_BC 0x00000000 /* DMA byte count & flags */
-#define HPC1_SCSI0_CTL 0x0000000c /* DMA control flags */
-#define HPC1_SCSI0_DEV 0x00000014 /* Device DMA FIFO pointer */
-#define HPC1_SCSI0_DMACFG 0x00000010 /* DMA configuration */
-#define HPC1_SCSI0_GIO 0x00001008 /* GIO DMA FIFO pointer */
-#define HPC1_SCSI0_PIOCFG 0x00001014 /* PIO configuration */
-#define HPC1_SCSI_DMACTL_RESET 0x01 /* Reset dma channel and ext. controller */
-#define HPC1_SCSI_DMACTL_FLUSH 0x02 /* Flush DMA FIFO's */
-#define HPC1_SCSI_DMACTL_DIR 0x10 /* DMA direction: 1=dev->mem, 0=mem->dev */
-#define HPC1_SCSI_DMACTL_ACTIVE 0x80 /* DMA channel is active */
-#define HPC1_ENET_REGS 0x00000000 /* Ethernet registers */
-#define HPC1_ENET_REGS_SIZE 0x00000100
-#define HPC1_ENET_INTDELAY 0x0000002c /* Interrupt Delay Count */
-#define HPC1_ENET_INTDELAY_OFF 0x01000000 /* Disable Interrupt Delay */
-#define HPC1_ENETR_CBP 0x00000054 /* Recv: Current buffer ptr */
-#define HPC1_ENETR_NDBP 0x00000050 /* Recv: Next descriptor ptr */
-#define HPC1_ENETR_BC 0x00000048 /* Recv: DMA byte cnt/flags */
-#define HPC1_ENETR_CTL 0x00000038 /* Recv: DMA control flags */
-#define HPC1_ENETR_CTL_ACTIVE 0x00004000 /* DMA channel active? */
-#define HPC1_ENETR_RESET 0x0000003c /* Recv: Ethernet chip reset */
-#define HPC1_ENETR_RESET_CH 0x0001 /* Reset controller & chan */
-#define HPC1_ENETR_RESET_CLRINT 0x0002 /* Clear channel interrupt */
-#define HPC1_ENETR_RESET_LOOPBK 0x0004 /* External loopback enable */
-#define HPC1_ENETR_RESET_CLRRBO 0x0008 /* Clear RBO condition (??) */
-#define HPC1_ENETX_CBP 0x00000020 /* Xmit: Current buffer ptr */
-#define HPC1_ENETX_NDBP 0x00000010 /* Xmit: Next descriptor ptr */
-#define HPC1_ENETX_CFXBP 0x00000024 /* Xmit: Current first buf */
-#define HPC1_ENETX_PFXBP 0x00000028 /* Xmit: Prev. first buf */
-#define HPC1_ENETX_BC 0x00000014 /* Xmit: DMA byte cnt/flags */
-#define HPC1_ENETX_CTL 0x00000034 /* Xmit: DMA control flags */
-#define HPC1_ENETX_CTL_ACTIVE 0x00400000
-#define HPC1_ENETR_FIFO 0x0002c000 /* Ether recv DMA FIFO */
-#define HPC1_ENETR_FIFO_SIZE 0x00001fff /* Ether recv DMA FIFO size */
-#define HPC1_ENETX_FIFO 0x0002e000 /* Ether xmit DMA FIFO */
-#define HPC1_ENETX_FIFO_SIZE 0x00001fff /* Ether xmit DMA FIFO size */
-#define HPC1_SCSI0_DEVREGS 0x0000011f /* (actually 122) */
-#define HPC1_ENET_DEVREGS 0x00000100 /* Ethernet chip registers */
-#define HPC1_ENET_DEVREGS_SIZE 0x00000020 /* Size of chip registers */
-#define HPC1_PBUS_BBRAM 0x00000e00 /* PBus battery-backed RAM */
-#define HPC1_LPT_REGS 0x000000a8 /* LPT HPC Registers */
-#define HPC1_LPT_REGS_SIZE 0x00000018
-#define HPC1_LPT_BC 0x00000000 /* Byte Count */
-#define HPC1_LPT_CBP 0x00000004 /* Current Buffer Ptr */
-#define HPC1_LPT_NDBP 0x00000008 /* Next Buffer Ptr */
-#define HPC1_LPT_CTL 0x0000000c /* DMA Control Flags */
-#define HPC1_LPT_DEV 0x00000010 /* DMA Fifo Ptr */
-#define HPC1_LPT_DMACFG 0x00000014 /* DMA Configuration */
-#define HPC1_LPT_DEVREGS 0x00000132 /* Ext. Parallel Registers */
-#define HPC1_LPT_DEVREGS_SIZE 0x00000001 /* Size of External Registers */
-
-/* AUX regs on the primary HPC */
-#define HPC1_AUX_REGS 0x000001bf /* EEPROM/LED Control (byte) */
-#define HPC1_AUX_CONSLED 0x01 /* Console LED */
+++ /dev/null
-/* $OpenBSD: hpcvar.h,v 1.10 2015/09/18 20:50:02 miod Exp $ */
-/* $NetBSD: hpcvar.h,v 1.12 2011/01/25 12:21:04 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2001 Rafal K. Boni
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* HPC 1.5/3 differ a bit, thus we need an abstraction layer */
-
-struct hpc_values {
- int revision;
- uint32_t scsi0_regs;
- uint32_t scsi0_regs_size;
- uint32_t scsi0_cbp;
- uint32_t scsi0_ndbp;
- uint32_t scsi0_bc;
- uint32_t scsi0_ctl;
- uint32_t scsi0_gio;
- uint32_t scsi0_dev;
- uint32_t scsi0_dmacfg;
- uint32_t scsi0_piocfg;
- uint32_t scsi1_regs;
- uint32_t scsi1_regs_size;
- uint32_t scsi1_cbp;
- uint32_t scsi1_ndbp;
- uint32_t scsi1_bc;
- uint32_t scsi1_ctl;
- uint32_t scsi1_gio;
- uint32_t scsi1_dev;
- uint32_t scsi1_dmacfg;
- uint32_t scsi1_piocfg;
- uint32_t enet_regs;
- uint32_t enet_regs_size;
- uint32_t enet_intdelay;
- uint32_t enet_intdelayval;
- uint32_t enetr_cbp;
- uint32_t enetr_ndbp;
- uint32_t enetr_bc;
- uint32_t enetr_ctl;
- uint32_t enetr_ctl_active;
- uint32_t enetr_reset;
- uint32_t enetr_dmacfg;
- uint32_t enetr_piocfg;
- uint32_t enetx_cbp;
- uint32_t enetx_ndbp;
- uint32_t enetx_bc;
- uint32_t enetx_ctl;
- uint32_t enetx_ctl_active;
- uint32_t enetx_dev;
- uint32_t enetr_fifo;
- uint32_t enetr_fifo_size;
- uint32_t enetx_fifo;
- uint32_t enetx_fifo_size;
- uint32_t enet_devregs;
- uint32_t enet_devregs_size;
- uint32_t pbus_fifo;
- uint32_t pbus_fifo_size;
- uint32_t pbus_bbram;
- uint32_t scsi_dma_segs;
- uint32_t scsi_dma_segs_size;
- uint32_t scsi_dma_datain_cmd;
- uint32_t scsi_dma_dataout_cmd;
- uint32_t scsi_dmactl_flush;
- uint32_t scsi_dmactl_active;
- uint32_t scsi_dmactl_reset;
-};
-
-struct hpc_attach_args {
- const char *ha_name; /* name of device */
- bus_addr_t ha_base; /* address of hpc device */
- bus_addr_t ha_devoff; /* offset of device */
- bus_addr_t ha_dmaoff; /* offset of DMA regs */
- int ha_irq; /* interrupt line */
-
- bus_space_tag_t ha_st; /* HPC space tag */
- bus_space_handle_t ha_sh; /* HPC space handle XXX */
- bus_dma_tag_t ha_dmat; /* HPC DMA tag */
-
- struct hpc_values *hpc_regs; /* HPC register definitions */
- int ha_giofast; /* GIO bus speed */
-
- uint8_t hpc_eeprom[256];/* HPC eeprom contents */
-};
-
-void *hpc_intr_establish(int, int, int (*)(void *), void *, const char *);
-int hpc_is_intr_pending(int);
-void hpc_intr_disable(void *);
-void hpc_intr_enable(void *);
-
-/*
- * Routines to copy and update HPC DMA descriptors in uncached memory;
- * needed for proper operation on ECC MC systems.
- */
-struct hpc_dma_desc;
-
-struct hpc_dma_desc *hpc_sync_dma_desc(struct hpc_dma_desc *,
- struct hpc_dma_desc *);
-void hpc_update_dma_desc(struct hpc_dma_desc *, struct hpc_dma_desc *);
-
-extern bus_space_t hpc3bus_tag;
+++ /dev/null
-/* $OpenBSD: if_sq.c,v 1.31 2021/03/11 11:17:00 jsg Exp $ */
-/* $NetBSD: if_sq.c,v 1.42 2011/07/01 18:53:47 dyoung Exp $ */
-
-/*
- * Copyright (c) 2001 Rafal K. Boni
- * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * Portions of this code are derived from software contributed to The
- * NetBSD Foundation by Jason R. Thorpe of the Numerical Aerospace
- * Simulation Facility, NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "bpfilter.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/timeout.h>
-#include <sys/mbuf.h>
-#include <sys/pool.h>
-#include <sys/kernel.h>
-#include <sys/socket.h>
-#include <sys/ioctl.h>
-#include <sys/errno.h>
-#include <sys/syslog.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <net/if.h>
-#include <net/if_media.h>
-
-#if NBPFILTER > 0
-#include <net/bpf.h>
-#endif
-
-#include <netinet/in.h>
-#include <netinet/if_ether.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h> /* guarded_read_4 */
-#include <machine/intr.h>
-#include <mips64/arcbios.h> /* bios_enaddr */
-#include <sgi/sgi/ip22.h>
-
-#include <dev/ic/seeq8003reg.h>
-
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/iocreg.h> /* IOC_READ / IOC_WRITE */
-#include <sgi/hpc/if_sqvar.h>
-
-/*
- * Short TODO list:
- * (1) Do counters for bad-RX packets.
- * (2) Allow multi-segment transmits, instead of copying to a single,
- * contiguous mbuf.
- * (3) Verify sq_stop() turns off enough stuff; I was still getting
- * seeq interrupts after sq_stop().
- * (5) Should the driver filter out its own transmissions in non-EDLC
- * mode?
- * (6) Multicast support -- multicast filter, address management, ...
- * (7) Deal with RB0 (recv buffer overflow) on reception. Will need
- * to figure out if RB0 is read-only as stated in one spot in the
- * HPC spec or read-write (ie, is the 'write a one to clear it')
- * the correct thing?
- *
- * Note that it is no use to implement EDLC auto-padding: the HPC glue will
- * not start a packet transfer until it has been fed 64 bytes, which defeats
- * the auto-padding purpose.
- */
-
-#ifdef SQ_DEBUG
-int sq_debug = 0;
-#define SQ_DPRINTF(x) do { if (sq_debug) printf x; } while (0)
-#else
-#define SQ_DPRINTF(x) do { } while (0)
-#endif
-
-int sq_match(struct device *, void *, void *);
-void sq_attach(struct device *, struct device *, void *);
-int sq_init(struct ifnet *);
-void sq_start(struct ifnet *);
-void sq_stop(struct ifnet *);
-void sq_watchdog(struct ifnet *);
-int sq_ioctl(struct ifnet *, u_long, caddr_t);
-
-void sq_set_filter(struct sq_softc *);
-int sq_intr(void *);
-void sq_rxintr(struct sq_softc *);
-void sq_txintr(struct sq_softc *);
-void sq_txring_hpc1(struct sq_softc *);
-void sq_txring_hpc3(struct sq_softc *);
-void sq_reset(struct sq_softc *);
-int sq_add_rxbuf(struct sq_softc *, int);
-#ifdef SQ_DEBUG
-void sq_trace_dump(struct sq_softc *);
-#endif
-
-int sq_ifmedia_change_ip22(struct ifnet *);
-int sq_ifmedia_change_singlemedia(struct ifnet *);
-void sq_ifmedia_status_ip22(struct ifnet *, struct ifmediareq *);
-void sq_ifmedia_status_singlemedia(struct ifnet *, struct ifmediareq *);
-
-const struct cfattach sq_ca = {
- sizeof(struct sq_softc), sq_match, sq_attach
-};
-
-struct cfdriver sq_cd = {
- NULL, "sq", DV_IFNET
-};
-
-/* XXX these values should be moved to <net/if_ether.h> ? */
-#define ETHER_PAD_LEN (ETHER_MIN_LEN - ETHER_CRC_LEN)
-
-#define sq_seeq_read(sc, off) \
- bus_space_read_1(sc->sc_regt, sc->sc_regh, ((off) << 2) | 3)
-#define sq_seeq_write(sc, off, val) \
- bus_space_write_1(sc->sc_regt, sc->sc_regh, ((off) << 2) | 3, val)
-
-#define sq_hpc_read(sc, off) \
- bus_space_read_4(sc->sc_hpct, sc->sc_hpch, off)
-#define sq_hpc_write(sc, off, val) \
- bus_space_write_4(sc->sc_hpct, sc->sc_hpch, off, val)
-
-/* MAC address offset for non-onboard implementations */
-#define SQ_HPC_EEPROM_ENADDR 250
-
-#define SGI_OUI_0 0x08
-#define SGI_OUI_1 0x00
-#define SGI_OUI_2 0x69
-
-int
-sq_match(struct device *parent, void *vcf, void *aux)
-{
- struct hpc_attach_args *ha = aux;
- struct cfdata *cf = vcf;
- vaddr_t reset, txstat;
- uint32_t dummy;
-
- if (strcmp(ha->ha_name, cf->cf_driver->cd_name) != 0)
- return 0;
-
- reset = PHYS_TO_XKPHYS(ha->ha_sh + ha->ha_dmaoff +
- ha->hpc_regs->enetr_reset, CCA_NC);
- txstat = PHYS_TO_XKPHYS(ha->ha_sh + ha->ha_devoff + (SEEQ_TXSTAT << 2),
- CCA_NC);
-
- if (guarded_read_4(reset, &dummy) != 0)
- return 0;
-
- *(volatile uint32_t *)reset = 0x1;
- delay(20);
- *(volatile uint32_t *)reset = 0x0;
-
- if (guarded_read_4(txstat, &dummy) != 0)
- return 0;
-
- if ((*(volatile uint32_t *)txstat & 0xff) != TXSTAT_OLDNEW)
- return 0;
-
- return 1;
-}
-
-void
-sq_attach(struct device *parent, struct device *self, void *aux)
-{
- struct sq_softc *sc = (struct sq_softc *)self;
- struct hpc_attach_args *haa = aux;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- uint64_t media;
- int i, rc;
-
- sc->sc_hpct = haa->ha_st;
- sc->sc_hpcbh = haa->ha_sh;
- sc->hpc_regs = haa->hpc_regs; /* HPC register definitions */
-
- if ((rc = bus_space_subregion(haa->ha_st, haa->ha_sh,
- haa->ha_dmaoff, sc->hpc_regs->enet_regs_size,
- &sc->sc_hpch)) != 0) {
- printf(": can't map HPC DMA registers, error = %d\n", rc);
- goto fail_0;
- }
-
- sc->sc_regt = haa->ha_st;
- if ((rc = bus_space_subregion(haa->ha_st, haa->ha_sh,
- haa->ha_devoff, sc->hpc_regs->enet_devregs_size,
- &sc->sc_regh)) != 0) {
- printf(": can't map Seeq registers, error = %d\n", rc);
- goto fail_0;
- }
-
- sc->sc_dmat = haa->ha_dmat;
-
- if ((rc = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct sq_control),
- 0, 0, &sc->sc_cdseg, 1, &sc->sc_ncdseg, BUS_DMA_NOWAIT)) != 0) {
- printf(": unable to allocate control data, error = %d\n", rc);
- goto fail_0;
- }
-
- if ((rc = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_ncdseg,
- sizeof(struct sq_control), (caddr_t *)&sc->sc_control,
- BUS_DMA_NOWAIT | (ip22_ecc ? 0 : BUS_DMA_COHERENT))) != 0) {
- printf(": unable to map control data, error = %d\n", rc);
- goto fail_1;
- }
-
- if ((rc = bus_dmamap_create(sc->sc_dmat,
- sizeof(struct sq_control), 1, sizeof(struct sq_control),
- 0, BUS_DMA_NOWAIT, &sc->sc_cdmap)) != 0) {
- printf(": unable to create DMA map for control data, error "
- "= %d\n", rc);
- goto fail_2;
- }
-
- if ((rc = bus_dmamap_load(sc->sc_dmat, sc->sc_cdmap,
- sc->sc_control, sizeof(struct sq_control), NULL,
- BUS_DMA_NOWAIT)) != 0) {
- printf(": unable to load DMA map for control data, error "
- "= %d\n", rc);
- goto fail_3;
- }
-
- memset(sc->sc_control, 0, sizeof(struct sq_control));
-
- /* Create transmit buffer DMA maps */
- for (i = 0; i < SQ_NTXDESC; i++) {
- if ((rc = bus_dmamap_create(sc->sc_dmat,
- MCLBYTES, 1, MCLBYTES, 0,
- BUS_DMA_NOWAIT, &sc->sc_txmap[i])) != 0) {
- printf(": unable to create tx DMA map %d, error = %d\n",
- i, rc);
- goto fail_4;
- }
- }
-
- /* Create receive buffer DMA maps */
- for (i = 0; i < SQ_NRXDESC; i++) {
- if ((rc = bus_dmamap_create(sc->sc_dmat,
- MCLBYTES, 1, MCLBYTES, 0,
- BUS_DMA_NOWAIT, &sc->sc_rxmap[i])) != 0) {
- printf(": unable to create rx DMA map %d, error = %d\n",
- i, rc);
- goto fail_5;
- }
- }
-
- /* Pre-allocate the receive buffers. */
- for (i = 0; i < SQ_NRXDESC; i++) {
- if ((rc = sq_add_rxbuf(sc, i)) != 0) {
- printf(": unable to allocate or map rx buffer %d\n,"
- " error = %d\n", i, rc);
- goto fail_6;
- }
- }
-
- bcopy(&haa->hpc_eeprom[SQ_HPC_EEPROM_ENADDR], sc->sc_ac.ac_enaddr,
- ETHER_ADDR_LEN);
-
- /*
- * If our mac address is bogus, obtain it from ARCBIOS. This will
- * be true of the onboard HPC3 on IP22, since there is no eeprom,
- * but rather the DS1386 RTC's battery-backed ram is used.
- */
- if (sc->sc_ac.ac_enaddr[0] != SGI_OUI_0 ||
- sc->sc_ac.ac_enaddr[1] != SGI_OUI_1 ||
- sc->sc_ac.ac_enaddr[2] != SGI_OUI_2)
- enaddr_aton(bios_enaddr, sc->sc_ac.ac_enaddr);
-
- if ((hpc_intr_establish(haa->ha_irq, IPL_NET, sq_intr, sc,
- self->dv_xname)) == NULL) {
- printf(": unable to establish interrupt!\n");
- goto fail_6;
- }
-
- /*
- * Set up HPC Ethernet PIO and DMA configurations.
- *
- * The PROM appears to do most of this for the onboard HPC3, but
- * not for the Challenge S's IOPLUS chip. We copy how the onboard
- * chip is configured and assume that it's correct for both.
- */
- if (haa->hpc_regs->revision == 3 &&
- sys_config.system_subtype != IP22_INDIGO2) {
- uint32_t dmareg, pioreg;
-
- if (haa->ha_giofast) {
- pioreg =
- HPC3_ENETR_PIOCFG_P1(1) |
- HPC3_ENETR_PIOCFG_P2(5) |
- HPC3_ENETR_PIOCFG_P3(0);
- dmareg =
- HPC3_ENETR_DMACFG_D1(5) |
- HPC3_ENETR_DMACFG_D2(1) |
- HPC3_ENETR_DMACFG_D3(0);
- } else {
- pioreg =
- HPC3_ENETR_PIOCFG_P1(1) |
- HPC3_ENETR_PIOCFG_P2(6) |
- HPC3_ENETR_PIOCFG_P3(1);
- dmareg =
- HPC3_ENETR_DMACFG_D1(6) |
- HPC3_ENETR_DMACFG_D2(2) |
- HPC3_ENETR_DMACFG_D3(0);
- }
- dmareg |= HPC3_ENETR_DMACFG_FIX_RXDC |
- HPC3_ENETR_DMACFG_FIX_INTR | HPC3_ENETR_DMACFG_FIX_EOP |
- HPC3_ENETR_DMACFG_TIMEOUT;
-
- sq_hpc_write(sc, HPC3_ENETR_PIOCFG, pioreg);
- sq_hpc_write(sc, HPC3_ENETR_DMACFG, dmareg);
- }
-
- /* Reset the chip to a known state. */
- sq_reset(sc);
-
- /*
- * Determine if we're an 8003 or 80c03 by setting the first
- * MAC address register to non-zero, and then reading it back.
- * If it's zero, we have an 80c03, because we will have read
- * the TxCollLSB register.
- */
- sq_seeq_write(sc, SEEQ_TXCOLLS0, 0xa5);
- if (sq_seeq_read(sc, SEEQ_TXCOLLS0) == 0)
- sc->sc_type = SQ_TYPE_80C03;
- else
- sc->sc_type = SQ_TYPE_8003;
- sq_seeq_write(sc, SEEQ_TXCOLLS0, 0x00);
-
- printf(": Seeq %s, address %s\n",
- sc->sc_type == SQ_TYPE_80C03 ? "80c03" : "8003",
- ether_sprintf(sc->sc_ac.ac_enaddr));
-
- bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
- ifp->if_softc = sc;
- ifp->if_start = sq_start;
- ifp->if_ioctl = sq_ioctl;
- ifp->if_watchdog = sq_watchdog;
- ifp->if_flags = IFF_BROADCAST | IFF_MULTICAST;
-
- if_attach(ifp);
- ifq_set_maxlen(&ifp->if_snd, SQ_NTXDESC - 1);
- ether_ifattach(ifp);
-
- if (haa->hpc_regs->revision == 3) {
- uint8_t mask, set;
- if (/* sys_config.system_type != SGI_IP20 && */ /* implied */
- sys_config.system_subtype == IP22_CHALLS) {
- /*
- * Challenge S: onboard has AUI connector only,
- * IO+ has TP connector only.
- */
- if (haa->ha_base == HPC_BASE_ADDRESS_0) {
- ifmedia_init(&sc->sc_ifmedia, 0,
- sq_ifmedia_change_singlemedia,
- sq_ifmedia_status_singlemedia);
- /*
- * Force 10Base5.
- */
- media = IFM_ETHER | IFM_10_5;
- mask = IOC_WRITE_ENET_AUTO;
- set = IOC_WRITE_ENET_AUI;
- } else {
- ifmedia_init(&sc->sc_ifmedia, 0,
- sq_ifmedia_change_singlemedia,
- sq_ifmedia_status_singlemedia);
- /*
- * Force 10BaseT, and set the 10BaseT port
- * to use UTP cable.
- */
- media = IFM_ETHER | IFM_10_T;
- mask = set = 0;
- }
- } else {
- /*
- * Indy, Indigo 2: onboard has AUI and TP connectors.
- */
- ifmedia_init(&sc->sc_ifmedia, 0,
- sq_ifmedia_change_ip22, sq_ifmedia_status_ip22);
- ifmedia_add(&sc->sc_ifmedia,
- IFM_ETHER | IFM_10_5, 0, NULL);
- ifmedia_add(&sc->sc_ifmedia,
- IFM_ETHER | IFM_10_T, 0, NULL);
-
- /*
- * Force autoselect, and set the 10BaseT port
- * to use UTP cable.
- */
- media = IFM_ETHER | IFM_AUTO;
- mask = IOC_WRITE_ENET_AUI;
- set = IOC_WRITE_ENET_AUTO | IOC_WRITE_ENET_UTP;
- }
-
- if (haa->ha_base == HPC_BASE_ADDRESS_0) {
- bus_space_write_4(haa->ha_st, haa->ha_sh,
- IOC_BASE + IOC_WRITE,
- (bus_space_read_4(haa->ha_st, haa->ha_sh,
- IOC_BASE + IOC_WRITE) & ~mask) | set);
- bus_space_barrier(haa->ha_st, haa->ha_sh,
- IOC_BASE + IOC_WRITE, 4,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
- }
- } else {
- /*
- * HPC1/1.5: IP20 on-board, or E++: AUI connector only,
- * and career information unreliable.
- */
- ifmedia_init(&sc->sc_ifmedia, 0,
- sq_ifmedia_change_singlemedia,
- sq_ifmedia_status_singlemedia);
- media = IFM_ETHER | IFM_10_5;
- sc->sc_flags |= SQF_NOLINKDOWN;
- }
-
- ifmedia_add(&sc->sc_ifmedia, media, 0, NULL);
- ifmedia_set(&sc->sc_ifmedia, media);
-
- /* supposedly connected, until TX says otherwise */
- sc->sc_flags |= SQF_LINKUP;
-
- /* Done! */
- return;
-
- /*
- * Free any resources we've allocated during the failed attach
- * attempt. Do this in reverse order and fall through.
- */
- fail_6:
- for (i = 0; i < SQ_NRXDESC; i++) {
- if (sc->sc_rxmbuf[i] != NULL) {
- bus_dmamap_unload(sc->sc_dmat, sc->sc_rxmap[i]);
- m_freem(sc->sc_rxmbuf[i]);
- }
- }
- fail_5:
- for (i = 0; i < SQ_NRXDESC; i++) {
- if (sc->sc_rxmap[i] != NULL)
- bus_dmamap_destroy(sc->sc_dmat, sc->sc_rxmap[i]);
- }
- fail_4:
- for (i = 0; i < SQ_NTXDESC; i++) {
- if (sc->sc_txmap[i] != NULL)
- bus_dmamap_destroy(sc->sc_dmat, sc->sc_txmap[i]);
- }
- bus_dmamap_unload(sc->sc_dmat, sc->sc_cdmap);
- fail_3:
- bus_dmamap_destroy(sc->sc_dmat, sc->sc_cdmap);
- fail_2:
- bus_dmamem_unmap(sc->sc_dmat,
- (void *)sc->sc_control, sizeof(struct sq_control));
- fail_1:
- bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_ncdseg);
- fail_0:
- return;
-}
-
-/* Set up data to get the interface up and running. */
-int
-sq_init(struct ifnet *ifp)
-{
- struct sq_softc *sc = ifp->if_softc;
- int i;
-
- /* Cancel any in-progress I/O */
- sq_stop(ifp);
-
- sc->sc_nextrx = 0;
-
- sc->sc_nfreetx = SQ_NTXDESC;
- sc->sc_nexttx = sc->sc_prevtx = 0;
-
- SQ_TRACE(SQ_RESET, sc, 0, 0);
-
- /* Set into 8003 or 80C03 mode, bank 0 to program Ethernet address */
- if (sc->sc_type == SQ_TYPE_80C03)
- sq_seeq_write(sc, SEEQ_TXCMD, TXCMD_ENABLE_C);
- sq_seeq_write(sc, SEEQ_TXCMD, TXCMD_BANK0);
-
- /* Now write the address */
- for (i = 0; i < ETHER_ADDR_LEN; i++)
- sq_seeq_write(sc, i, sc->sc_ac.ac_enaddr[i]);
-
- sc->sc_rxcmd = RXCMD_IE_CRC | RXCMD_IE_DRIB | RXCMD_IE_SHORT |
- RXCMD_IE_END | RXCMD_IE_GOOD;
-
- /*
- * Set the receive filter -- this will add some bits to the
- * prototype RXCMD register. Do this before setting the
- * transmit config register, since we might need to switch
- * banks.
- */
- sq_set_filter(sc);
-
- if (sc->sc_type == SQ_TYPE_80C03) {
- sq_seeq_write(sc, SEEQ_TXCMD, TXCMD_BANK2);
- sq_seeq_write(sc, SEEQ_TXCTRL, 0);
- sq_seeq_write(sc, SEEQ_TXCTRL, TXCTRL_SQE | TXCTRL_NOCARR);
-#if 0 /* HPC expects a minimal packet size of ETHER_MIN_LEN anyway */
- sq_seeq_write(sc, SEEQ_CFG, CFG_TX_AUTOPAD);
-#endif
- sq_seeq_write(sc, SEEQ_TXCMD, TXCMD_BANK0);
- }
-
- /* Set up Seeq transmit command register */
- sc->sc_txcmd =
- TXCMD_IE_UFLOW | TXCMD_IE_COLL | TXCMD_IE_16COLL | TXCMD_IE_GOOD;
- sq_seeq_write(sc, SEEQ_TXCMD, sc->sc_txcmd);
-
- /* Now write the receive command register. */
- sq_seeq_write(sc, SEEQ_RXCMD, sc->sc_rxcmd);
-
- /* Pass the start of the receive ring to the HPC */
- sq_hpc_write(sc, sc->hpc_regs->enetr_ndbp, SQ_CDRXADDR(sc, 0));
-
- /* And turn on the HPC Ethernet receive channel */
- sq_hpc_write(sc, sc->hpc_regs->enetr_ctl,
- sc->hpc_regs->enetr_ctl_active);
-
- /*
- * Turn off delayed receive interrupts on HPC1.
- * (see Hollywood HPC Specification 2.1.4.3)
- */
- if (sc->hpc_regs->revision != 3)
- sq_hpc_write(sc, HPC1_ENET_INTDELAY, HPC1_ENET_INTDELAY_OFF);
-
- ifp->if_flags |= IFF_RUNNING;
- ifq_clr_oactive(&ifp->if_snd);
- sq_start(ifp);
-
- return 0;
-}
-
-void
-sq_set_filter(struct sq_softc *sc)
-{
- struct arpcom *ac = &sc->sc_ac;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
-
- sc->sc_rxcmd &= ~RXCMD_REC_MASK;
- ifp->if_flags &= ~IFF_ALLMULTI;
-
- /*
- * The 8003 has no hash table. If we have any multicast
- * addresses on the list, enable reception of all multicast
- * frames.
- *
- * XXX The 80c03 has a hash table. We should use it.
- */
- if (ifp->if_flags & IFF_PROMISC || ac->ac_multicnt > 0) {
- ifp->if_flags |= IFF_ALLMULTI;
- if (ifp->if_flags & IFF_PROMISC)
- sc->sc_rxcmd |= RXCMD_REC_ALL;
- else
- sc->sc_rxcmd |= RXCMD_REC_MULTI;
- }
-
- /*
- * Unless otherwise specified, always accept broadcast frames.
- */
- if ((sc->sc_rxcmd & RXCMD_REC_MASK) == RXCMD_REC_NONE)
- sc->sc_rxcmd |= RXCMD_REC_BROAD;
-}
-
-int
-sq_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
-{
- struct sq_softc *sc = ifp->if_softc;
- struct ifreq *ifr = (struct ifreq *)data;
- int s, error = 0;
-
- SQ_TRACE(SQ_IOCTL, sc, 0, 0);
-
- s = splnet();
-
- switch (cmd) {
- case SIOCSIFADDR:
- ifp->if_flags |= IFF_UP;
- if (!(ifp->if_flags & IFF_RUNNING))
- sq_init(ifp);
- break;
-
- case SIOCSIFMEDIA:
- case SIOCGIFMEDIA:
- error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, cmd);
- break;
-
- case SIOCSIFFLAGS:
- if (ifp->if_flags & IFF_UP) {
- if (ifp->if_flags & IFF_RUNNING)
- error = ENETRESET;
- else
- sq_init(ifp);
- } else {
- if (ifp->if_flags & IFF_RUNNING)
- sq_stop(ifp);
- }
- break;
-
- default:
- error = ether_ioctl(ifp, &sc->sc_ac, cmd, data);
- break;
- }
-
- if (error == ENETRESET) {
- /*
- * Multicast list has changed; set the hardware filter
- * accordingly.
- */
- if (ifp->if_flags & IFF_RUNNING)
- error = sq_init(ifp);
- else
- error = 0;
- }
-
- splx(s);
- return error;
-}
-
-void
-sq_start(struct ifnet *ifp)
-{
- struct sq_softc *sc = ifp->if_softc;
- struct mbuf *m0, *m;
- struct hpc_dma_desc *txd, *active, store;
- bus_dmamap_t dmamap;
- uint32_t status;
- int err, len, totlen, nexttx, firsttx, lasttx = -1, ofree, seg;
-
- if (!(ifp->if_flags & IFF_RUNNING) || ifq_is_oactive(&ifp->if_snd))
- return;
-
- /*
- * Remember the previous number of free descriptors and
- * the first descriptor we'll use.
- */
- ofree = sc->sc_nfreetx;
- firsttx = sc->sc_nexttx;
-
- /*
- * Loop through the send queue, setting up transmit descriptors
- * until we drain the queue, or use up all available transmit
- * descriptors.
- */
- while (sc->sc_nfreetx != 0) {
- /*
- * Grab a packet off the queue.
- */
- m0 = ifq_deq_begin(&ifp->if_snd);
- if (m0 == NULL)
- break;
- m = NULL;
-
- dmamap = sc->sc_txmap[sc->sc_nexttx];
-
- /*
- * Load the DMA map. If this fails, the packet either
- * didn't fit in the allotted number of segments, or we were
- * short on resources. In this case, we'll copy and try
- * again.
- * Also copy it if we need to pad, so that we are sure there
- * is room for the pad buffer.
- * XXX the right way of doing this is to use a static buffer
- * for padding and adding it to the transmit descriptor (see
- * sys/dev/pci/if_tl.c for example). We can't do this here yet
- * because we can't send packets with more than one fragment.
- */
- len = m0->m_pkthdr.len;
- if (len < ETHER_PAD_LEN ||
- bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
- BUS_DMA_NOWAIT) != 0) {
- MGETHDR(m, M_DONTWAIT, MT_DATA);
- if (m == NULL) {
- ifq_deq_rollback(&ifp->if_snd, m0);
- printf("%s: unable to allocate Tx mbuf\n",
- sc->sc_dev.dv_xname);
- break;
- }
- if (len > MHLEN) {
- MCLGET(m, M_DONTWAIT);
- if ((m->m_flags & M_EXT) == 0) {
- ifq_deq_rollback(&ifp->if_snd, m0);
- printf("%s: unable to allocate Tx "
- "cluster\n",
- sc->sc_dev.dv_xname);
- m_freem(m);
- break;
- }
- }
-
- m_copydata(m0, 0, len, mtod(m, void *));
- if (len < ETHER_PAD_LEN /* &&
- sc->sc_type != SQ_TYPE_80C03 */) {
- memset(mtod(m, char *) + len, 0,
- ETHER_PAD_LEN - len);
- len = ETHER_PAD_LEN;
- }
- m->m_pkthdr.len = m->m_len = len;
-
- if ((err = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
- m, BUS_DMA_NOWAIT)) != 0) {
- ifq_deq_rollback(&ifp->if_snd, m0);
- printf("%s: unable to load Tx buffer, "
- "error = %d\n",
- sc->sc_dev.dv_xname, err);
- break;
- }
- }
-
- /*
- * Ensure we have enough descriptors free to describe
- * the packet.
- */
- if (dmamap->dm_nsegs > sc->sc_nfreetx) {
- ifq_deq_rollback(&ifp->if_snd, m0);
- /*
- * Not enough free descriptors to transmit this
- * packet. We haven't committed to anything yet,
- * so just unload the DMA map, put the packet
- * back on the queue, and punt. Notify the upper
- * layer that there are no more slots left.
- *
- * XXX We could allocate an mbuf and copy, but
- * XXX it is worth it?
- */
- ifq_set_oactive(&ifp->if_snd);
- bus_dmamap_unload(sc->sc_dmat, dmamap);
- m_freem(m);
- break;
- }
-
- ifq_deq_commit(&ifp->if_snd, m0);
-#if NBPFILTER > 0
- /*
- * Pass the packet to any BPF listeners.
- */
- if (ifp->if_bpf)
- bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
-#endif
- if (m != NULL) {
- m_freem(m0);
- m0 = m;
- }
-
- /*
- * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
- */
-
- SQ_TRACE(SQ_ENQUEUE, sc, sc->sc_nexttx, 0);
-
- /* Sync the DMA map. */
- bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
- BUS_DMASYNC_PREWRITE);
-
- /*
- * Initialize the transmit descriptors.
- */
- for (nexttx = sc->sc_nexttx, seg = 0, totlen = 0;
- seg < dmamap->dm_nsegs;
- seg++, nexttx = SQ_NEXTTX(nexttx)) {
- txd = sc->sc_txdesc + nexttx;
- active = hpc_sync_dma_desc(txd, &store);
- if (sc->hpc_regs->revision == 3) {
- active->hpc3_hdd_bufptr =
- dmamap->dm_segs[seg].ds_addr;
- active->hpc3_hdd_ctl =
- dmamap->dm_segs[seg].ds_len;
- } else {
- active->hpc1_hdd_bufptr =
- dmamap->dm_segs[seg].ds_addr;
- active->hpc1_hdd_ctl =
- dmamap->dm_segs[seg].ds_len;
- }
- active->hdd_descptr = SQ_CDTXADDR(sc, SQ_NEXTTX(nexttx));
- hpc_update_dma_desc(txd, active);
- lasttx = nexttx;
- totlen += dmamap->dm_segs[seg].ds_len;
- }
-
- /* Last descriptor gets end-of-packet */
- KASSERT(lasttx != -1);
- txd = sc->sc_txdesc + lasttx;
- active = hpc_sync_dma_desc(txd, &store);
- if (sc->hpc_regs->revision == 3)
- active->hpc3_hdd_ctl |= HPC3_HDD_CTL_EOPACKET;
- else
- active->hpc1_hdd_ctl |= HPC1_HDD_CTL_EOPACKET;
- hpc_update_dma_desc(txd, active);
-
- SQ_DPRINTF(("%s: transmit %d-%d, len %d\n",
- sc->sc_dev.dv_xname, sc->sc_nexttx, lasttx, totlen));
-
- if (ifp->if_flags & IFF_DEBUG) {
- printf(" transmit chain:\n");
- for (seg = sc->sc_nexttx;; seg = SQ_NEXTTX(seg)) {
- active = hpc_sync_dma_desc(&sc->sc_txdesc[seg],
- &store);
- printf(" descriptor %d:\n", seg);
- printf(" hdd_bufptr: 0x%08x\n",
- (sc->hpc_regs->revision == 3) ?
- active->hpc3_hdd_bufptr :
- active->hpc1_hdd_bufptr);
- printf(" hdd_ctl: 0x%08x\n",
- (sc->hpc_regs->revision == 3) ?
- active->hpc3_hdd_ctl:
- active->hpc1_hdd_ctl);
- printf(" hdd_descptr: 0x%08x\n",
- active->hdd_descptr);
-
- if (seg == lasttx)
- break;
- }
- }
-
- /* Store a pointer to the packet so we can free it later */
- sc->sc_txmbuf[sc->sc_nexttx] = m0;
-
- /* Advance the tx pointer. */
- sc->sc_nfreetx -= dmamap->dm_nsegs;
- sc->sc_nexttx = nexttx;
- }
-
- /* All transmit descriptors used up, let upper layers know */
- if (sc->sc_nfreetx == 0)
- ifq_set_oactive(&ifp->if_snd);
-
- if (sc->sc_nfreetx != ofree) {
- SQ_DPRINTF(("%s: %d packets enqueued, first %d, INTR on %d\n",
- sc->sc_dev.dv_xname, lasttx - firsttx + 1,
- firsttx, lasttx));
-
- /*
- * Cause a transmit interrupt to happen on the
- * last packet we enqueued, mark it as the last
- * descriptor.
- *
- * HPC1_HDD_CTL_INTR will generate an interrupt on
- * HPC1. HPC3 requires HPC3_HDD_CTL_EOCHAIN in
- * addition to HPC3_HDD_CTL_INTR to interrupt.
- */
- KASSERT(lasttx != -1);
- txd = sc->sc_txdesc + lasttx;
- active = hpc_sync_dma_desc(txd, &store);
- if (sc->hpc_regs->revision == 3) {
- active->hpc3_hdd_ctl |=
- HPC3_HDD_CTL_INTR | HPC3_HDD_CTL_EOCHAIN;
- } else {
- active->hpc1_hdd_ctl |= HPC1_HDD_CTL_INTR;
- active->hpc1_hdd_bufptr |= HPC1_HDD_CTL_EOCHAIN;
- }
- hpc_update_dma_desc(txd, active);
-
- /*
- * There is a potential race condition here if the HPC
- * DMA channel is active and we try and either update
- * the 'next descriptor' pointer in the HPC PIO space
- * or the 'next descriptor' pointer in a previous desc-
- * riptor.
- *
- * To avoid this, if the channel is active, we rely on
- * the transmit interrupt routine noticing that there
- * are more packets to send and restarting the HPC DMA
- * engine, rather than mucking with the DMA state here.
- */
- status = sq_hpc_read(sc, sc->hpc_regs->enetx_ctl);
-
- if ((status & sc->hpc_regs->enetx_ctl_active) != 0) {
- SQ_TRACE(SQ_ADD_TO_DMA, sc, firsttx, status);
-
- txd = sc->sc_txdesc + SQ_PREVTX(firsttx);
- active = hpc_sync_dma_desc(txd, &store);
- /*
- * NB: hpc3_hdd_ctl == hpc1_hdd_bufptr, and
- * HPC1_HDD_CTL_EOCHAIN == HPC3_HDD_CTL_EOCHAIN
- */
- active->hpc3_hdd_ctl &= ~HPC3_HDD_CTL_EOCHAIN;
- if (sc->hpc_regs->revision != 3)
- active->hpc1_hdd_ctl &= ~HPC1_HDD_CTL_INTR;
-
- hpc_update_dma_desc(txd, active);
- } else if (sc->hpc_regs->revision == 3) {
- SQ_TRACE(SQ_START_DMA, sc, firsttx, status);
-
- sq_hpc_write(sc, HPC3_ENETX_NDBP, SQ_CDTXADDR(sc,
- firsttx));
-
- /* Kick DMA channel into life */
- sq_hpc_write(sc, HPC3_ENETX_CTL, HPC3_ENETX_CTL_ACTIVE);
- } else {
- /*
- * In the HPC1 case where transmit DMA is
- * inactive, we can either kick off if
- * the ring was previously empty, or call
- * our transmit interrupt handler to
- * figure out if the ring stopped short
- * and restart at the right place.
- */
- if (ofree == SQ_NTXDESC) {
- SQ_TRACE(SQ_START_DMA, sc, firsttx, status);
-
- sq_hpc_write(sc, HPC1_ENETX_NDBP,
- SQ_CDTXADDR(sc, firsttx));
- sq_hpc_write(sc, HPC1_ENETX_CFXBP,
- SQ_CDTXADDR(sc, firsttx));
- sq_hpc_write(sc, HPC1_ENETX_CBP,
- SQ_CDTXADDR(sc, firsttx));
-
- /* Kick DMA channel into life */
- sq_hpc_write(sc, HPC1_ENETX_CTL,
- HPC1_ENETX_CTL_ACTIVE);
- } else
- sq_txring_hpc1(sc);
- }
-
- /* Set a watchdog timer in case the chip flakes out. */
- ifp->if_timer = 5;
- }
-}
-
-void
-sq_stop(struct ifnet *ifp)
-{
- struct sq_softc *sc = ifp->if_softc;
- int i;
-
- ifp->if_timer = 0;
- ifp->if_flags &= ~IFF_RUNNING;
- ifq_clr_oactive(&ifp->if_snd);
-
- for (i = 0; i < SQ_NTXDESC; i++) {
- if (sc->sc_txmbuf[i] != NULL) {
- bus_dmamap_unload(sc->sc_dmat, sc->sc_txmap[i]);
- m_freem(sc->sc_txmbuf[i]);
- sc->sc_txmbuf[i] = NULL;
- }
- }
-
- /* Clear Seeq transmit/receive command registers */
- sc->sc_txcmd = 0;
- sq_seeq_write(sc, SEEQ_TXCMD, 0);
- sq_seeq_write(sc, SEEQ_RXCMD, 0);
-
- sq_reset(sc);
-}
-
-/* Device timeout/watchdog routine. */
-void
-sq_watchdog(struct ifnet *ifp)
-{
- struct sq_softc *sc = ifp->if_softc;
- uint32_t status;
-
- status = sq_hpc_read(sc, sc->hpc_regs->enetx_ctl);
- log(LOG_ERR, "%s: device timeout (prev %d, next %d, free %d, "
- "status %08x)\n", sc->sc_dev.dv_xname, sc->sc_prevtx,
- sc->sc_nexttx, sc->sc_nfreetx, status);
-
-#ifdef SQ_DEBUG
- sq_trace_dump(sc);
-#endif
-
- ++ifp->if_oerrors;
-
- sq_init(ifp);
-}
-
-#ifdef SQ_DEBUG
-void
-sq_trace_dump(struct sq_softc *sc)
-{
- int i;
- const char *act;
-
- for (i = 0; i < sc->sq_trace_idx; i++) {
- switch (sc->sq_trace[i].action) {
- case SQ_RESET: act = "SQ_RESET"; break;
- case SQ_ADD_TO_DMA: act = "SQ_ADD_TO_DMA"; break;
- case SQ_START_DMA: act = "SQ_START_DMA"; break;
- case SQ_DONE_DMA: act = "SQ_DONE_DMA"; break;
- case SQ_RESTART_DMA: act = "SQ_RESTART_DMA"; break;
- case SQ_TXINTR_ENTER: act = "SQ_TXINTR_ENTER"; break;
- case SQ_TXINTR_EXIT: act = "SQ_TXINTR_EXIT"; break;
- case SQ_TXINTR_BUSY: act = "SQ_TXINTR_BUSY"; break;
- case SQ_IOCTL: act = "SQ_IOCTL"; break;
- case SQ_ENQUEUE: act = "SQ_ENQUEUE"; break;
- default: act = "UNKNOWN";
- }
-
- printf("%s: [%03d] action %-16s buf %03d free %03d "
- "status %08x line %d\n", sc->sc_dev.dv_xname, i, act,
- sc->sq_trace[i].bufno, sc->sq_trace[i].freebuf,
- sc->sq_trace[i].status, sc->sq_trace[i].line);
- }
-
- memset(&sc->sq_trace, 0, sizeof(sc->sq_trace));
- sc->sq_trace_idx = 0;
-}
-#endif
-
-int
-sq_intr(void *arg)
-{
- struct sq_softc *sc = arg;
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- int oldlink = sc->sc_flags & SQF_LINKUP;
- uint32_t stat;
- uint8_t sqe;
-
- stat = sq_hpc_read(sc, sc->hpc_regs->enetr_reset);
-
- if ((stat & 2) == 0) {
- SQ_DPRINTF(("%s: Unexpected interrupt!\n",
- sc->sc_dev.dv_xname));
- } else
- sq_hpc_write(sc, sc->hpc_regs->enetr_reset, (stat | 2));
-
- /*
- * If the interface isn't running, the interrupt couldn't
- * possibly have come from us.
- */
- if ((ifp->if_flags & IFF_RUNNING) == 0)
- return 0;
-
- /*
- * Check for loss of carrier detected during transmission if we
- * can detect it.
- * Unfortunately, this does not work on IP20 and E++ designs.
- */
- if (sc->sc_type == SQ_TYPE_80C03 &&
- !ISSET(sc->sc_flags, SQF_NOLINKDOWN)) {
- sqe = sq_seeq_read(sc, SEEQ_SQE) & (SQE_FLAG | SQE_NOCARR);
- if (sqe != 0) {
- sq_seeq_write(sc, SEEQ_TXCMD,
- TXCMD_BANK2 | sc->sc_txcmd);
- /* reset counters */
- sq_seeq_write(sc, SEEQ_TXCTRL, 0);
- sq_seeq_write(sc, SEEQ_TXCTRL,
- TXCTRL_SQE | TXCTRL_NOCARR);
- sq_seeq_write(sc, SEEQ_TXCMD,
- TXCMD_BANK0 | sc->sc_txcmd);
- if (sqe == (SQE_FLAG | SQE_NOCARR))
- sc->sc_flags &= ~SQF_LINKUP;
- }
- }
-
- /* Always check for received packets */
- sq_rxintr(sc);
-
- /* Only handle transmit interrupts if we actually sent something */
- if (sc->sc_nfreetx < SQ_NTXDESC)
- sq_txintr(sc);
-
- /* Notify link status change */
- if (oldlink != (sc->sc_flags & SQF_LINKUP)) {
- if (oldlink != 0) {
- ifp->if_link_state = LINK_STATE_DOWN;
- ifp->if_baudrate = 0;
- } else {
- ifp->if_link_state = LINK_STATE_UP;
- ifp->if_baudrate = IF_Mbps(10);
- }
- if_link_state_change(ifp);
- }
-
- /*
- * XXX Always claim the interrupt, even if we did nothing.
- * XXX There seem to be extra interrupts when the receiver becomes
- * XXX idle.
- */
- return 1;
-}
-
-void
-sq_rxintr(struct sq_softc *sc)
-{
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct mbuf_list ml = MBUF_LIST_INITIALIZER();
- struct mbuf* m;
- struct hpc_dma_desc *rxd, *active, store;
- int i, framelen;
- uint8_t pktstat;
- uint32_t status;
- uint32_t ctl_reg;
- int new_end, orig_end;
-
- for (i = sc->sc_nextrx; ; i = SQ_NEXTRX(i)) {
- rxd = sc->sc_rxdesc + i;
- active = hpc_sync_dma_desc(rxd, &store);
- /*
- * If this is a CPU-owned buffer, we're at the end of the list.
- */
- if (sc->hpc_regs->revision == 3)
- ctl_reg = active->hpc3_hdd_ctl & HPC3_HDD_CTL_OWN;
- else
- ctl_reg = active->hpc1_hdd_ctl & HPC1_HDD_CTL_OWN;
-
- if (ctl_reg) {
-#if defined(SQ_DEBUG)
- uint32_t reg;
-
- reg = sq_hpc_read(sc, sc->hpc_regs->enetr_ctl);
- SQ_DPRINTF(("%s: rxintr: done at %d (ctl %08x)\n",
- sc->sc_dev.dv_xname, i, reg));
-#endif
- break;
- }
-
- m = sc->sc_rxmbuf[i];
- framelen = m->m_ext.ext_size - 3;
- if (sc->hpc_regs->revision == 3)
- framelen -=
- HPC3_HDD_CTL_BYTECNT(active->hpc3_hdd_ctl);
- else
- framelen -=
- HPC1_HDD_CTL_BYTECNT(active->hpc1_hdd_ctl);
-
- /* Now sync the actual packet data */
- bus_dmamap_sync(sc->sc_dmat, sc->sc_rxmap[i], 0,
- sc->sc_rxmap[i]->dm_mapsize, BUS_DMASYNC_POSTREAD);
-
- pktstat = *((uint8_t *)m->m_data + framelen + 2);
-
- if ((pktstat & RXSTAT_GOOD) == 0) {
- ifp->if_ierrors++;
-
- if (pktstat & RXSTAT_OFLOW)
- printf("%s: receive FIFO overflow\n",
- sc->sc_dev.dv_xname);
-
- bus_dmamap_sync(sc->sc_dmat, sc->sc_rxmap[i], 0,
- sc->sc_rxmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD);
- SQ_INIT_RXDESC(sc, i);
- SQ_DPRINTF(("%s: sq_rxintr: buf %d no RXSTAT_GOOD\n",
- sc->sc_dev.dv_xname, i));
- continue;
- }
-
- /* Link must be good if we have received data. */
- sc->sc_flags |= SQF_LINKUP;
-
- if (sq_add_rxbuf(sc, i) != 0) {
- ifp->if_ierrors++;
- bus_dmamap_sync(sc->sc_dmat, sc->sc_rxmap[i], 0,
- sc->sc_rxmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD);
- SQ_INIT_RXDESC(sc, i);
- SQ_DPRINTF(("%s: sq_rxintr: buf %d sq_add_rxbuf() "
- "failed\n", sc->sc_dev.dv_xname, i));
- continue;
- }
-
-
- m->m_data += 2;
- m->m_pkthdr.len = m->m_len = framelen;
-
- SQ_DPRINTF(("%s: sq_rxintr: buf %d len %d\n",
- sc->sc_dev.dv_xname, i, framelen));
-
- ml_enqueue(&ml, m);
- }
-
- if_input(ifp, &ml);
-
- /* If anything happened, move ring start/end pointers to new spot */
- if (i != sc->sc_nextrx) {
- new_end = SQ_PREVRX(i);
- rxd = sc->sc_rxdesc + new_end;
- active = hpc_sync_dma_desc(rxd, &store);
- /*
- * NB: hpc3_hdd_ctl == hpc1_hdd_bufptr, and
- * HPC1_HDD_CTL_EOCHAIN == HPC3_HDD_CTL_EOCHAIN
- */
- active->hpc3_hdd_ctl |= HPC3_HDD_CTL_EOCHAIN;
- hpc_update_dma_desc(rxd, active);
-
- orig_end = SQ_PREVRX(sc->sc_nextrx);
- rxd = sc->sc_rxdesc + orig_end;
- active = hpc_sync_dma_desc(rxd, &store);
- active->hpc3_hdd_ctl &= ~HPC3_HDD_CTL_EOCHAIN;
- hpc_update_dma_desc(rxd, active);
-
- sc->sc_nextrx = i;
- }
-
- status = sq_hpc_read(sc, sc->hpc_regs->enetr_ctl);
-
- /* If receive channel is stopped, restart it... */
- if ((status & sc->hpc_regs->enetr_ctl_active) == 0) {
- /* Pass the start of the receive ring to the HPC */
- sq_hpc_write(sc, sc->hpc_regs->enetr_ndbp,
- SQ_CDRXADDR(sc, sc->sc_nextrx));
-
- /* And turn on the HPC Ethernet receive channel */
- sq_hpc_write(sc, sc->hpc_regs->enetr_ctl,
- sc->hpc_regs->enetr_ctl_active);
- }
-}
-
-void
-sq_txintr(struct sq_softc *sc)
-{
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- uint shift = 0;
- uint32_t status, tmp;
-
- if (sc->hpc_regs->revision != 3)
- shift = 16;
-
- status = sq_hpc_read(sc, sc->hpc_regs->enetx_ctl) >> shift;
-
- SQ_TRACE(SQ_TXINTR_ENTER, sc, sc->sc_prevtx, status);
-
- tmp = (sc->hpc_regs->enetx_ctl_active >> shift) | TXSTAT_GOOD;
- if ((status & tmp) == 0) {
- if (status & TXSTAT_COLL)
- ifp->if_collisions++;
-
- if (status & TXSTAT_UFLOW) {
- printf("%s: transmit underflow\n",
- sc->sc_dev.dv_xname);
- ifp->if_oerrors++;
-#ifdef SQ_DEBUG
- sq_trace_dump(sc);
-#endif
- sq_init(ifp);
- return;
- }
-
- if (status & TXSTAT_16COLL) {
- if (ifp->if_flags & IFF_DEBUG)
- printf("%s: max collisions reached\n",
- sc->sc_dev.dv_xname);
- ifp->if_oerrors++;
- ifp->if_collisions += 16;
- }
- }
-
- /* prevtx now points to next xmit packet not yet finished */
- if (sc->hpc_regs->revision == 3)
- sq_txring_hpc3(sc);
- else
- sq_txring_hpc1(sc);
-
- /* If we have buffers free, let upper layers know */
- if (sc->sc_nfreetx > 0)
- ifq_clr_oactive(&ifp->if_snd);
-
- /* If all packets have left the coop, cancel watchdog */
- if (sc->sc_nfreetx == SQ_NTXDESC)
- ifp->if_timer = 0;
-
- SQ_TRACE(SQ_TXINTR_EXIT, sc, sc->sc_prevtx, status);
- sq_start(ifp);
-}
-
-/*
- * Reclaim used transmit descriptors and restart the transmit DMA
- * engine if necessary.
- */
-void
-sq_txring_hpc1(struct sq_softc *sc)
-{
- /*
- * HPC1 doesn't tag transmitted descriptors, however,
- * the NDBP register points to the next descriptor that
- * has not yet been processed. If DMA is not in progress,
- * we can safely reclaim all descriptors up to NDBP, and,
- * if necessary, restart DMA at NDBP. Otherwise, if DMA
- * is active, we can only safely reclaim up to CBP.
- *
- * For now, we'll only reclaim on inactive DMA and assume
- * that a sufficiently large ring keeps us out of trouble.
- */
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- uint32_t reclaimto, status;
- int reclaimall, i = sc->sc_prevtx;
-
- status = sq_hpc_read(sc, HPC1_ENETX_CTL);
- if (status & HPC1_ENETX_CTL_ACTIVE) {
- SQ_TRACE(SQ_TXINTR_BUSY, sc, i, status);
- return;
- } else
- reclaimto = sq_hpc_read(sc, HPC1_ENETX_NDBP);
-
- if (sc->sc_nfreetx == 0 && SQ_CDTXADDR(sc, i) == reclaimto)
- reclaimall = 1;
- else
- reclaimall = 0;
-
- while (sc->sc_nfreetx < SQ_NTXDESC) {
- if (SQ_CDTXADDR(sc, i) == reclaimto && !reclaimall)
- break;
-
- /* Sync the packet data, unload DMA map, free mbuf */
- bus_dmamap_sync(sc->sc_dmat, sc->sc_txmap[i],
- 0, sc->sc_txmap[i]->dm_mapsize, BUS_DMASYNC_POSTWRITE);
- bus_dmamap_unload(sc->sc_dmat, sc->sc_txmap[i]);
- m_freem(sc->sc_txmbuf[i]);
- sc->sc_txmbuf[i] = NULL;
-
- sc->sc_nfreetx++;
-
- SQ_TRACE(SQ_DONE_DMA, sc, i, status);
-
- i = SQ_NEXTTX(i);
- }
-
- if (sc->sc_nfreetx < SQ_NTXDESC) {
- SQ_TRACE(SQ_RESTART_DMA, sc, i, status);
-
- KASSERT(reclaimto == SQ_CDTXADDR(sc, i));
-
- sq_hpc_write(sc, HPC1_ENETX_CFXBP, reclaimto);
- sq_hpc_write(sc, HPC1_ENETX_CBP, reclaimto);
-
- /* Kick DMA channel into life */
- sq_hpc_write(sc, HPC1_ENETX_CTL, HPC1_ENETX_CTL_ACTIVE);
-
- /*
- * Set a watchdog timer in case the chip
- * flakes out.
- */
- ifp->if_timer = 5;
- }
-
- sc->sc_prevtx = i;
-}
-
-/*
- * Reclaim used transmit descriptors and restart the transmit DMA
- * engine if necessary.
- */
-void
-sq_txring_hpc3(struct sq_softc *sc)
-{
- /*
- * HPC3 tags descriptors with a bit once they've been
- * transmitted. We need only free each XMITDONE'd
- * descriptor, and restart the DMA engine if any
- * descriptors are left over.
- */
- struct ifnet *ifp = &sc->sc_ac.ac_if;
- struct hpc_dma_desc *txd, *active, store;
- int i;
- uint32_t status = 0;
-
- i = sc->sc_prevtx;
- while (sc->sc_nfreetx < SQ_NTXDESC) {
- /*
- * Check status first so we don't end up with a case of
- * the buffer not being finished while the DMA channel
- * has gone idle.
- */
- status = sq_hpc_read(sc, HPC3_ENETX_CTL);
-
- txd = sc->sc_txdesc + i;
- active = hpc_sync_dma_desc(txd, &store);
-
- /* Check for used descriptor and restart DMA chain if needed */
- if ((active->hpc3_hdd_ctl & HPC3_HDD_CTL_XMITDONE) == 0) {
- if ((status & HPC3_ENETX_CTL_ACTIVE) == 0) {
- SQ_TRACE(SQ_RESTART_DMA, sc, i, status);
-
- sq_hpc_write(sc, HPC3_ENETX_NDBP,
- SQ_CDTXADDR(sc, i));
-
- /* Kick DMA channel into life */
- sq_hpc_write(sc, HPC3_ENETX_CTL,
- HPC3_ENETX_CTL_ACTIVE);
-
- /*
- * Set a watchdog timer in case the chip
- * flakes out.
- */
- ifp->if_timer = 5;
- } else
- SQ_TRACE(SQ_TXINTR_BUSY, sc, i, status);
- break;
- }
-
- /* Sync the packet data, unload DMA map, free mbuf */
- bus_dmamap_sync(sc->sc_dmat, sc->sc_txmap[i],
- 0, sc->sc_txmap[i]->dm_mapsize, BUS_DMASYNC_POSTWRITE);
- bus_dmamap_unload(sc->sc_dmat, sc->sc_txmap[i]);
- m_freem(sc->sc_txmbuf[i]);
- sc->sc_txmbuf[i] = NULL;
-
- sc->sc_nfreetx++;
-
- SQ_TRACE(SQ_DONE_DMA, sc, i, status);
- i = SQ_NEXTTX(i);
- }
-
- sc->sc_prevtx = i;
-}
-
-void
-sq_reset(struct sq_softc *sc)
-{
- /* Stop HPC dma channels */
- sq_hpc_write(sc, sc->hpc_regs->enetr_ctl, 0);
- sq_hpc_write(sc, sc->hpc_regs->enetx_ctl, 0);
-
- sq_hpc_write(sc, sc->hpc_regs->enetr_reset, 3);
- delay(20);
- sq_hpc_write(sc, sc->hpc_regs->enetr_reset, 0);
-}
-
-/* sq_add_rxbuf: Add a receive buffer to the indicated descriptor. */
-int
-sq_add_rxbuf(struct sq_softc *sc, int idx)
-{
- int err;
- struct mbuf *m;
-
- MGETHDR(m, M_DONTWAIT, MT_DATA);
- if (m == NULL)
- return ENOBUFS;
-
- MCLGET(m, M_DONTWAIT);
- if ((m->m_flags & M_EXT) == 0) {
- m_freem(m);
- return ENOBUFS;
- }
-
- if (sc->sc_rxmbuf[idx] != NULL)
- bus_dmamap_unload(sc->sc_dmat, sc->sc_rxmap[idx]);
-
- sc->sc_rxmbuf[idx] = m;
-
- if ((err = bus_dmamap_load(sc->sc_dmat, sc->sc_rxmap[idx],
- m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT)) != 0) {
- printf("%s: can't load rx DMA map %d, error = %d\n",
- sc->sc_dev.dv_xname, idx, err);
- panic("sq_add_rxbuf"); /* XXX */
- }
-
- bus_dmamap_sync(sc->sc_dmat, sc->sc_rxmap[idx],
- 0, sc->sc_rxmap[idx]->dm_mapsize, BUS_DMASYNC_PREREAD);
-
- SQ_INIT_RXDESC(sc, idx);
-
- return 0;
-}
-
-/*
- * Media handling
- */
-
-int
-sq_ifmedia_change_ip22(struct ifnet *ifp)
-{
- struct sq_softc *sc = ifp->if_softc;
- struct ifmedia *ifm = &sc->sc_ifmedia;
- uint32_t iocw;
-
- iocw =
- bus_space_read_4(sc->sc_hpct, sc->sc_hpcbh, IOC_BASE + IOC_WRITE);
-
- switch (IFM_SUBTYPE(ifm->ifm_media)) {
- case IFM_10_5:
- iocw &= ~IOC_WRITE_ENET_AUTO;
- iocw |= IOC_WRITE_ENET_AUI;
- break;
- case IFM_10_T:
- iocw &= ~(IOC_WRITE_ENET_AUTO | IOC_WRITE_ENET_AUI);
- iocw |= IOC_WRITE_ENET_UTP; /* in case it cleared */
- break;
- default:
- case IFM_AUTO:
- iocw |= IOC_WRITE_ENET_AUTO;
- break;
- }
-
- bus_space_write_4(sc->sc_hpct, sc->sc_hpcbh, IOC_BASE + IOC_WRITE,
- iocw);
- bus_space_barrier(sc->sc_hpct, sc->sc_hpcbh, IOC_BASE + IOC_WRITE, 4,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
- return 0;
-}
-
-int
-sq_ifmedia_change_singlemedia(struct ifnet *ifp)
-{
- return 0;
-}
-
-void
-sq_ifmedia_status_ip22(struct ifnet *ifp, struct ifmediareq *req)
-{
- struct sq_softc *sc = ifp->if_softc;
- uint32_t iocr, iocw;
-
- iocw =
- bus_space_read_4(sc->sc_hpct, sc->sc_hpcbh, IOC_BASE + IOC_WRITE);
-
- req->ifm_status = IFM_AVALID;
- if (sc->sc_flags & SQF_LINKUP)
- req->ifm_status |= IFM_ACTIVE;
- if ((iocw & IOC_WRITE_ENET_AUTO) != 0) {
- iocr = bus_space_read_4(sc->sc_hpct, sc->sc_hpcbh,
- IOC_BASE + IOC_READ);
- if ((iocr & IOC_READ_ENET_LINK) != 0)
- req->ifm_active = IFM_10_5 | IFM_ETHER;
- else
- req->ifm_active = IFM_10_T | IFM_ETHER;
- } else {
- if ((iocw & IOC_WRITE_ENET_AUI) != 0)
- req->ifm_active = IFM_10_5 | IFM_ETHER;
- else
- req->ifm_active = IFM_10_T | IFM_ETHER;
- }
-}
-
-void
-sq_ifmedia_status_singlemedia(struct ifnet *ifp, struct ifmediareq *req)
-{
- struct sq_softc *sc = ifp->if_softc;
- struct ifmedia *ifm = &sc->sc_ifmedia;
-
- req->ifm_status = IFM_AVALID;
- if (sc->sc_flags & SQF_LINKUP)
- req->ifm_status |= IFM_ACTIVE;
- req->ifm_active = ifm->ifm_media;
-}
+++ /dev/null
-/* $OpenBSD: if_sqvar.h,v 1.6 2015/09/18 20:50:02 miod Exp $ */
-/* $NetBSD: sqvar.h,v 1.12 2011/01/25 13:12:39 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2001 Rafal K. Boni
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* Note, these must be powers of two for the magic NEXT/PREV macros to work */
-#define SQ_NRXDESC 64
-#define SQ_NTXDESC 64
-
-#define SQ_NRXDESC_MASK (SQ_NRXDESC - 1)
-#define SQ_NEXTRX(x) ((x + 1) & SQ_NRXDESC_MASK)
-#define SQ_PREVRX(x) ((x - 1) & SQ_NRXDESC_MASK)
-
-#define SQ_NTXDESC_MASK (SQ_NTXDESC - 1)
-#define SQ_NEXTTX(x) ((x + 1) & SQ_NTXDESC_MASK)
-#define SQ_PREVTX(x) ((x - 1) & SQ_NTXDESC_MASK)
-
-/*
- * We pack all DMA control structures into one container so we can alloc just
- * one chunk of DMA-safe memory and pack them into it. Otherwise, we'd have to
- * allocate a page for each descriptor, since the bus_dmamem_alloc() interface
- * does not allow us to allocate smaller chunks.
- */
-struct sq_control {
- /* Receive descriptors */
- struct hpc_dma_desc rx_desc[SQ_NRXDESC];
-
- /* Transmit descriptors */
- struct hpc_dma_desc tx_desc[SQ_NTXDESC];
-};
-
-#define SQ_CDOFF(x) offsetof(struct sq_control, x)
-#define SQ_CDTXOFF(x) SQ_CDOFF(tx_desc[(x)])
-#define SQ_CDRXOFF(x) SQ_CDOFF(rx_desc[(x)])
-
-#define SQ_TYPE_8003 0
-#define SQ_TYPE_80C03 1
-
-/* Trace Actions */
-#define SQ_RESET 1
-#define SQ_ADD_TO_DMA 2
-#define SQ_START_DMA 3
-#define SQ_DONE_DMA 4
-#define SQ_RESTART_DMA 5
-#define SQ_TXINTR_ENTER 6
-#define SQ_TXINTR_EXIT 7
-#define SQ_TXINTR_BUSY 8
-#define SQ_IOCTL 9
-#define SQ_ENQUEUE 10
-
-struct sq_action_trace {
- int action;
- int line;
- int bufno;
- int status;
- int freebuf;
-};
-
-#ifdef SQ_DEBUG
-#define SQ_TRACEBUF_SIZE 100
-
-#define SQ_TRACE(act, sc, buf, stat) do { \
- (sc)->sq_trace[(sc)->sq_trace_idx].action = (act); \
- (sc)->sq_trace[(sc)->sq_trace_idx].line = __LINE__; \
- (sc)->sq_trace[(sc)->sq_trace_idx].bufno = (buf); \
- (sc)->sq_trace[(sc)->sq_trace_idx].status = (stat); \
- (sc)->sq_trace[(sc)->sq_trace_idx].freebuf = (sc)->sc_nfreetx; \
- if (++(sc)->sq_trace_idx == SQ_TRACEBUF_SIZE) \
- (sc)->sq_trace_idx = 0; \
-} while (/* CONSTCOND */0)
-#else
-#define SQ_TRACE(act, sc, buf, stat) do { } while (/* CONSTCOND */0)
-#endif
-
-struct sq_softc {
- struct device sc_dev;
-
- /* HPC registers */
- bus_space_tag_t sc_hpct;
- bus_space_handle_t sc_hpcbh; /* HPC base, for IOC access */
- bus_space_handle_t sc_hpch;
-
- /* HPC external Ethernet registers: aka Seeq 8003 registers */
- bus_space_tag_t sc_regt;
- bus_space_handle_t sc_regh;
-
- bus_dma_tag_t sc_dmat;
-
- struct arpcom sc_ac;
- uint8_t sc_enaddr[ETHER_ADDR_LEN];
- struct ifmedia sc_ifmedia;
-
- int sc_type;
- int sc_flags;
-#define SQF_LINKUP 0x00000001
-#define SQF_NOLINKDOWN 0x00000002
-
- struct sq_control* sc_control;
-#define sc_rxdesc sc_control->rx_desc
-#define sc_txdesc sc_control->tx_desc
-
- /* DMA structures for control data (DMA RX/TX descriptors) */
- int sc_ncdseg;
- bus_dma_segment_t sc_cdseg;
- bus_dmamap_t sc_cdmap;
-#define sc_cddma sc_cdmap->dm_segs[0].ds_addr
-
- int sc_nextrx;
-
- /* DMA structures for RX packet data */
- bus_dma_segment_t sc_rxseg[SQ_NRXDESC];
- bus_dmamap_t sc_rxmap[SQ_NRXDESC];
- struct mbuf* sc_rxmbuf[SQ_NRXDESC];
-
- int sc_nexttx;
- int sc_prevtx;
- int sc_nfreetx;
-
- /* DMA structures for TX packet data */
- bus_dma_segment_t sc_txseg[SQ_NTXDESC];
- bus_dmamap_t sc_txmap[SQ_NTXDESC];
- struct mbuf* sc_txmbuf[SQ_NTXDESC];
-
- uint8_t sc_txcmd; /* current value of TXCMD */
- uint8_t sc_rxcmd; /* prototype rxcmd */
-
- struct hpc_values *hpc_regs; /* HPC register definitions */
-
-#ifdef SQ_DEBUG
- int sq_trace_idx;
- struct sq_action_trace sq_trace[SQ_TRACEBUF_SIZE];
-#endif
-};
-
-#define SQ_CDTXADDR(sc, x) ((sc)->sc_cddma + SQ_CDTXOFF((x)))
-#define SQ_CDRXADDR(sc, x) ((sc)->sc_cddma + SQ_CDRXOFF((x)))
-
-static inline void
-SQ_INIT_RXDESC(struct sq_softc *sc, unsigned int x)
-{
- struct hpc_dma_desc *__rxd, *__active, __store;
- struct mbuf *__m = (sc)->sc_rxmbuf[(x)];
-
- __rxd = &(sc)->sc_rxdesc[(x)];
- __active = hpc_sync_dma_desc(__rxd, &__store);
- __m->m_data = __m->m_ext.ext_buf;
- if (sc->hpc_regs->revision == 3) {
- __active->hpc3_hdd_bufptr =
- (sc)->sc_rxmap[(x)]->dm_segs[0].ds_addr;
- __active->hpc3_hdd_ctl = __m->m_ext.ext_size |
- HPC3_HDD_CTL_OWN | HPC3_HDD_CTL_INTR |
- HPC3_HDD_CTL_EOPACKET |
- ((x) == (SQ_NRXDESC - 1) ? HPC3_HDD_CTL_EOCHAIN : 0);
- } else {
- __active->hpc1_hdd_bufptr =
- (sc)->sc_rxmap[(x)]->dm_segs[0].ds_addr |
- ((x) == (SQ_NRXDESC - 1) ? HPC1_HDD_CTL_EOCHAIN : 0);
- __active->hpc1_hdd_ctl = __m->m_ext.ext_size |
- HPC1_HDD_CTL_OWN | HPC1_HDD_CTL_INTR |
- HPC1_HDD_CTL_EOPACKET;
- }
- __active->hdd_descptr = SQ_CDRXADDR((sc), SQ_NEXTRX((x)));
- hpc_update_dma_desc(__rxd, __active);
-}
+++ /dev/null
-/* $OpenBSD: iocreg.h,v 1.2 2012/04/08 22:08:25 miod Exp $ */
-/* $NetBSD: iocreg.h,v 1.2 2005/12/11 12:18:53 christos Exp $ */
-
-/*
- * Copyright (c) 2003 Christopher Sekiya
- * Copyright (c) 2001 Rafal K. Boni
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * IOC1/2 memory map.
- *
- * The IOC1/2 is connected to the HPC#0, PBus channel 6, so these registers
- * are based from the external register window for PBus channel 6 on HPC#0.
- *
- */
-
-#define IOC_BASE HPC3_PBUS_CH6_DEVREGS
-
-#define IOC_PLP_REGS 0x00 /* Parallel port registers */
-#define IOC_PLP_REGS_SIZE 0x2c
-
-#define IOC_PLP_DATA 0x00 /* Data register */
-#define IOC_PLP_CTL 0x04 /* Control register */
-#define IOC_PLP_STAT 0x08 /* Status register */
-#define IOC_PLP_DMACTL 0x0c /* DMA control register */
-#define IOC_PLP_INTSTAT 0x10 /* Interrupt status register */
-#define IOC_PLP_INTMASK 0x14 /* Interrupt mask register */
-#define IOC_PLP_TIMER1 0x18 /* Timer 1 register */
-#define IOC_PLP_TIMER2 0x1c /* Timer 2 register */
-#define IOC_PLP_TIMER3 0x20 /* Timer 3 register */
-#define IOC_PLP_TIMER4 0x24 /* Timer 4 register */
-
-#define IOC_SERIAL_REGS 0x30 /* Serial port registers */
-#define IOC_SERIAL_REGS_SIZE 0x0c
-
-#define IOC_SERIAL_PORT1_CMD 0x00 /* Port 1 command transfer */
-#define IOC_SERIAL_PORT1_DATA 0x04 /* Port 1 data transfer */
-#define IOC_SERIAL_PORT2_CMD 0x08 /* Port 2 command transfer */
-#define IOC_SERIAL_PORT2_DATA 0x0c /* Port 2 data transfer */
-
-#define IOC_KB_REGS 0x40 /* Keyboard/mouse registers */
-#define IOC_KB_REGS_SIZE 0x08
-
-/* Miscellaneous registers */
-
-#define IOC_MISC_REGS 0x48 /* Misc. IOC regs */
-#define IOC_MISC_REGS_SIZE 0x34
-
-#define IOC_GCSEL 0x48 /* General select register */
-
-#define IOC_GCREG 0x4c /* General control register */
-#define IOC_GCREG_GIO_33MHZ 0x08
-
-#define IOC_PANEL 0x50 /* Front Panel register */
-#define IOC_PANEL_POWER_STATE 0x01
-#define IOC_PANEL_POWER_IRQ 0x02
-#define IOC_PANEL_VDOWN_IRQ 0x10
-#define IOC_PANEL_VDOWN_HOLD 0x20
-#define IOC_PANEL_VUP_IRQ 0x40
-#define IOC_PANEL_VUP_HOLD 0x80
-
-#define IOC_SYSID 0x58 /* System ID register */
-#define IOC_SYSID_SYSTYPE 0x01 /* 0: Sapphire, 1: Full House */
-#define IOC_SYSID_BOARDREV 0x1e
-#define IOC_SYSID_BOARDREV_SHIFT 1
-#define IOC_SYSID_CHIPREV 0xe0
-#define IOC_SYSID_CHIPREV_SHIFT 5
-
-#define IOC_READ 0x60 /* Read register */
-#define IOC_READ_SCSI0_POWER 0x10
-#define IOC_READ_SCSI1_POWER 0x20
-#define IOC_READ_ENET_POWER 0x40
-#define IOC_READ_ENET_LINK 0x80
-
-#define IOC_DMASEL 0x68 /* DMA select register */
-#define IOC_DMASEL_ISDN_B 0x01
-#define IOC_DMASEL_ISDN_A 0x02
-#define IOC_DMASEL_PARALLEL 0x04
-#define IOC_DMASEL_SERIAL_10MHZ 0x00
-#define IOC_DMASEL_SERIAL_6MHZ 0x10
-#define IOC_DMASEL_SERIAL_EXTERNAL 0x20
-
-#define IOC_RESET 0x70 /* Reset (IP24) / Write 1 (IP22)
- register */
-#define IOC_RESET_PARALLEL 0x01
-#define IOC_RESET_PCKBC 0x02
-#define IOC_RESET_EISA 0x04
-#define IOC_RESET_ISDN 0x08
-#define IOC_RESET_LED_GREEN 0x10
-#define IOC_RESET_LED_RED 0x20
-#define IOC_RESET_LED_ORANGE 0x40
-
-#define IOC_WRITE 0x78 /* Write (IP24) / Write 2 (IP22)
- register */
-#define IOC_WRITE_ENET_NTH 0x01
-#define IOC_WRITE_ENET_UTP 0x02
-#define IOC_WRITE_ENET_AUI 0x04
-#define IOC_WRITE_ENET_AUTO 0x08
-#define IOC_WRITE_PC_UART2 0x10
-#define IOC_WRITE_PC_UART1 0x20
-#define IOC_WRITE_MARGIN_LOW 0x40
-#define IOC_WRITE_MARGIN_HIGH 0x80
+++ /dev/null
-#! /usr/bin/awk -f
-# $OpenBSD: makemap.awk,v 1.1 2014/05/22 19:39:37 miod Exp $
-#
-# Copyright (c) 2005, 2014, Miodrag Vallat
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-# DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
-# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-#
-# This script attempts to convert, with minimal hacks and losses, the
-# regular PS/2 keyboard (pckbd) layout tables into SGI serial keyboard (zskbd)
-# layout tables.
-#
-
-BEGIN {
- rcsid = "$OpenBSD: makemap.awk,v 1.1 2014/05/22 19:39:37 miod Exp $"
- ifdepth = 0
- ignore = 0
- haskeys = 0
- summary = 0
-
- # PS/2 -> SGI conversion table
- for (i = 0; i < 256; i++)
- conv[i] = -1
-
- conv[1] = 6
- conv[2] = 7
- conv[3] = 13
- conv[4] = 14
- conv[5] = 21
- conv[6] = 22
- conv[7] = 29
- conv[8] = 30
- conv[9] = 37
- conv[10] = 38
- conv[11] = 45
- conv[12] = 46
- conv[13] = 53
- conv[14] = 60
- conv[15] = 8
- conv[16] = 9
- conv[17] = 15
- conv[18] = 16
- conv[19] = 23
- conv[20] = 24
- conv[21] = 31
- conv[22] = 32
- conv[23] = 39
- conv[24] = 40
- conv[25] = 47
- conv[26] = 48
- conv[27] = 55
- conv[28] = 50
- conv[29] = 2
- conv[30] = 10
- conv[31] = 11
- conv[32] = 17
- conv[33] = 18
- conv[34] = 25
- conv[35] = 26
- conv[36] = 33
- conv[37] = 34
- conv[38] = 41
- conv[39] = 42
- conv[40] = 49
- conv[41] = 54
- conv[42] = 5
- conv[43] = 56
- conv[44] = 19
- conv[45] = 20
- conv[46] = 27
- conv[47] = 28
- conv[48] = 35
- conv[49] = 36
- conv[50] = 43
- conv[51] = 44
- conv[52] = 51
- conv[53] = 52
- conv[54] = 4
- conv[55] = 108
- conv[56] = 83
- conv[57] = 82
- conv[58] = 3
- conv[59] = 86
- conv[60] = 87
- conv[61] = 88
- conv[62] = 89
- conv[63] = 90
- conv[64] = 91
- conv[65] = 92
- conv[66] = 93
- conv[67] = 94
- conv[68] = 95
- conv[69] = 106
- conv[70] = 99
- conv[71] = 66
- conv[72] = 67
- conv[73] = 74
- conv[74] = 75
- conv[75] = 62
- conv[76] = 68
- conv[77] = 69
- conv[78] = 109
- conv[79] = 57
- conv[80] = 63
- conv[81] = 64
- conv[82] = 58
- conv[83] = 65
- conv[86] = 111
- conv[87] = 96
- conv[88] = 97
- conv[127] = 100
- conv[156] = 81
- conv[157] = 85
- conv[170] = 98
- conv[181] = 107
- conv[183] = 98
- conv[184] = 84
- conv[199] = 102
- conv[200] = 80
- conv[201] = 103
- conv[203] = 72
- conv[205] = 79
- conv[207] = 104
- conv[208] = 73
- conv[209] = 105
- conv[210] = 101
- conv[211] = 61
-}
-NR == 1 {
- VERSION = $0
- gsub("\\$", "", VERSION)
- gsub("\\$", "", rcsid)
-
- printf("/*\t\$OpenBSD\$\t*/\n\n")
- printf("/*\n")
- printf(" * THIS FILE IS AUTOMAGICALLY GENERATED. DO NOT EDIT.\n")
- printf(" *\n")
- printf(" * generated by:\n")
- printf(" *\t%s\n", rcsid)
- printf(" * generated from:\n")
- printf(" */\n")
- print VERSION
-
- next
-}
-
-#
-# A very limited #if ... #endif parser. We only want to correctly detect
-# ``#if 0'' constructs, so as not to process their contents. This is necessary
-# since our output is out-of-order from our input.
-#
-# Note that this does NOT handle ``#ifdef notyet'' correctly - please only use
-# ``#if 0'' constructs in the input.
-#
-
-/^#if/ {
- ignores[ifdepth] = ignore
- if ($2 == "0")
- ignore = 1
- #else
- # ignore = 0
- ifdepth++
- if (ignore)
- next
-}
-/^#endif/ {
- oldignore = ignore
- ifdepth--
- ignore = ignores[ifdepth]
- ignores[ifdepth] = 0
- if (oldignore)
- next
-}
-
-$1 == "#include" {
- if (ignore)
- next
- if ($2 == "<dev/pckbc/wskbdmap_mfii.h>")
- next
- printf("#include %s\n", $2)
- next
-}
-$1 == "#define" || $1 == "#undef" {
- if (ignore)
- next
- print $0
- next
-}
-
-/pckbd/ {
- gsub("pckbd", "zskbd", $0)
-}
-/zskbd_keydesctab/ {
- gsub("zskbd", "wssgi", $0)
-}
-
-/zskbd_keydesc_/ {
- mapname = substr($0, index($0, "zskbd_keydesc_") + length("zskbd_keydesc_"))
- sub("\\[\\].*", "", mapname)
- sub("\\).*", "", mapname)
- shortname = mapname
- sub("_nodead", "", shortname) # _nodead ok if main layout ok
- if (shortname != "be" &&
- shortname != "de" &&
- shortname != "dk" &&
- shortname != "es" &&
- shortname != "fi" && # missing from PS/2 source...
- shortname != "fr" &&
- shortname != "gr" && # missing from PS/2 source...
- shortname != "it" &&
- shortname != "nl" &&
- shortname != "no" &&
- shortname != "pt" &&
- shortname != "sf" &&
- shortname != "sg" &&
- shortname != "sv" &&
- shortname != "uk" &&
- shortname != "us") {
- nolayout = 1
- }
-}
-
-/zskbd_keydesc_.*\[\]/ {
- if (nolayout)
- printf("/* %s not applicable */\n", mapname)
-}
-
-/KC/ {
- if (ignore)
- next
-
- if (nolayout)
- next
-
- haskeys = 1
-
- sidx = substr($1, 4, length($1) - 5)
- orig = int(sidx)
- id = conv[orig]
-
- if (id == -1) {
- # printf("/* initially KC(%d),", orig)
- # for (f = 2; f <= NF; f++) {
- # if ($f != "/*" && $f != "*/")
- # printf("\t%s", $f)
- # }
- # printf("\t*/\n")
- } else {
- lines[id] = sprintf(" KC(%d),\t", id)
- #
- # This makes sure that the non-comment part of the output
- # ends up with a trailing comma. This is necessary since
- # the last line of an input block might not have a trailing
- # comma, but might not be the last line of an output block
- # due to sorting.
- #
- comma = 0
- for (f = 2; f <= NF; f++) {
- l = length($f)
- if ($f == "/*")
- comma++
- if (comma == 0 && substr($f, l) != ",") {
- lines[id] = sprintf("%s%s,", lines[id], $f)
- l++
- } else {
- lines[id] = sprintf("%s%s", lines[id], $f)
- }
- if (comma == 0 && f != NF) {
- if (l < 2 * 8)
- lines[id] = lines[id] "\t"
- if (l < 8)
- lines[id] = lines[id] "\t"
- }
- if ($f == "*/")
- comma--
- }
- }
-
- next
-}
-/};/ {
- if (ignore)
- next
-
- if (nolayout) {
- nolayout = 0
- next
- }
-
- if (haskeys) {
- for (i = 0; i < 256; i++)
- if (lines[i]) {
- print lines[i]
- lines[i] = ""
- }
-
- haskeys = 0
- }
-}
-/KBD_MAP/ {
- summary = 1
-}
-# hack to eat two line KBD_MAP() - we want to ignore all of them, and
-# the second line will get rejected because ``nolayout'' will be set.
-/KBD_MAP[^)]*,$/ { next }
-
-{
- if (ignore)
- next
- if (nolayout) {
- if (summary)
- nolayout = 0
- next
- }
- print $0
-}
+++ /dev/null
-/* $OpenBSD: panel.c,v 1.3 2014/07/11 08:18:31 guenther Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/proc.h>
-#include <sys/signalvar.h>
-#include <sys/timeout.h>
-
-#include <machine/autoconf.h>
-#include <mips64/archtype.h>
-#include <machine/bus.h>
-
-#include <sgi/hpc/iocreg.h>
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/hpcvar.h>
-
-#include <sgi/sgi/ip22.h>
-
-#include "audio.h"
-#include "wskbd.h"
-extern int wskbd_set_mixervolume(long, long);
-
-struct panel_softc {
- struct device sc_dev;
- bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh;
- int sc_irq; /* irq number */
- void *sc_ih; /* irq handler cookie */
- struct timeout sc_repeat_tmo; /* polling timeout */
-};
-
-/* Repeat delays for volume buttons. */
-#define PANEL_REPEAT_FIRST 400
-#define PANEL_REPEAT_NEXT 100
-
-int panel_match(struct device *, void *, void *);
-void panel_attach(struct device *, struct device *, void *);
-
-struct cfdriver panel_cd = {
- NULL, "panel", DV_DULL
-};
-
-const struct cfattach panel_ca = {
- sizeof(struct panel_softc), panel_match, panel_attach
-};
-
-int panel_intr(void *);
-void panel_repeat(void *);
-#if NAUDIO > 0 && NWSKBD > 0
-void panel_volume_adjust(struct panel_softc *, uint8_t);
-#endif
-
-int
-panel_match(struct device *parent, void *vcf, void *aux)
-{
- struct cfdata *cf = vcf;
- struct hpc_attach_args *ha = aux;
-
- if (strcmp(ha->ha_name, cf->cf_driver->cd_name) != 0)
- return 0;
-
- if (sys_config.system_type == SGI_IP20)
- return 0;
-
- return 1;
-}
-
-void
-panel_attach(struct device *parent, struct device *self, void *aux)
-{
- struct panel_softc *sc = (struct panel_softc *)self;
- struct hpc_attach_args *haa = aux;
-
- sc->sc_iot = haa->ha_st;
- if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff + 3, 1,
- &sc->sc_ioh)) {
- printf(": can't map registers\n");
- return;
- }
-
- sc->sc_irq = haa->ha_irq;
- sc->sc_ih = hpc_intr_establish(sc->sc_irq, IPL_BIO, panel_intr, sc,
- sc->sc_dev.dv_xname);
- if (sc->sc_ih == NULL) {
- printf(": can't establish interrupt\n");
- return;
- }
-
- if (sys_config.system_subtype == IP22_INDY)
- printf(": power and volume buttons\n");
- else
- printf(": power button\n");
-
- timeout_set(&sc->sc_repeat_tmo, panel_repeat, sc);
-}
-
-int
-panel_intr(void *v)
-{
- struct panel_softc *sc = (struct panel_softc *)v;
- uint8_t reg, ack;
- extern int allowpowerdown;
-
- reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 0);
-
- ack = IOC_PANEL_POWER_STATE;
- if (sys_config.system_subtype == IP22_INDIGO2 ||
- (reg & IOC_PANEL_POWER_IRQ) == 0)
- ack |= IOC_PANEL_POWER_IRQ;
- if (sys_config.system_subtype == IP22_INDY) {
- if ((reg & IOC_PANEL_VDOWN_IRQ) == 0)
- ack |= IOC_PANEL_VDOWN_IRQ;
- if ((reg & IOC_PANEL_VUP_IRQ) == 0)
- ack |= IOC_PANEL_VUP_IRQ;
- }
- bus_space_write_1(sc->sc_iot, sc->sc_ioh, 0, ack);
- bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, 1,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
-
- /*
- * Panel interrupts are latched for about 300 msec after being
- * acked, and not until all buttons are depressed.
- * We need to temporary disable the interrupt and switch to polling,
- * until the interrupt can be enabled again.
- */
- hpc_intr_disable(sc->sc_ih);
-
- /*
- * If the power button is down, try and issue a shutdown immediately
- * (if allowed).
- */
- if (sys_config.system_subtype == IP22_INDIGO2 ||
- (reg & IOC_PANEL_POWER_IRQ) == 0) {
- if (allowpowerdown == 1) {
- allowpowerdown = 0;
- prsignal(initprocess, SIGUSR2);
- }
- }
-
-#if NAUDIO > 0 && NWSKBD > 0
- /*
- * If any of the volume buttons is down, update volume.
- */
- if (sys_config.system_subtype == IP22_INDY)
- panel_volume_adjust(sc, reg);
-#endif
-
- timeout_add_msec(&sc->sc_repeat_tmo, PANEL_REPEAT_FIRST);
-
- return 1;
-}
-
-void
-panel_repeat(void *v)
-{
- struct panel_softc *sc = (struct panel_softc *)v;
- uint8_t reg;
-
- reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 0);
-
-#if NAUDIO > 0 && NWSKBD > 0
- /*
- * Volume button autorepeat.
- */
- if (sys_config.system_subtype == IP22_INDY)
- panel_volume_adjust(sc, reg);
-#endif
-
- if (hpc_is_intr_pending(sc->sc_irq)) {
- /*
- * Keep acking everything to get the interrupt finally
- * unlatched.
- */
- bus_space_write_1(sc->sc_iot, sc->sc_ioh, 0,
- IOC_PANEL_POWER_STATE | IOC_PANEL_POWER_IRQ |
- IOC_PANEL_VDOWN_IRQ | IOC_PANEL_VDOWN_HOLD |
- IOC_PANEL_VUP_IRQ | IOC_PANEL_VUP_HOLD);
- bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, 1,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
-
- timeout_add_msec(&sc->sc_repeat_tmo, PANEL_REPEAT_NEXT);
- } else {
- hpc_intr_enable(sc->sc_ih);
- }
-}
-
-#if NAUDIO > 0 && NWSKBD > 0
-void
-panel_volume_adjust(struct panel_softc *sc, uint8_t reg)
-{
- long adjust;
-
- switch (reg & (IOC_PANEL_VDOWN_IRQ | IOC_PANEL_VUP_IRQ)) {
- case 0: /* both buttons pressed: mute */
- adjust = 0;
- break;
- case IOC_PANEL_VDOWN_IRQ: /* up button pressed */
- adjust = 1;
- break;
- case IOC_PANEL_VDUP_IRQ: /* down button pressed */
- adjust = -1;
- break;
- case IOC_PANEL_VDOWN_IRQ | IOC_PANEL_VDUP_IRQ:
- return;
- }
-
- wskbd_set_mixervolume(adjust, 1);
-}
-#endif
+++ /dev/null
-/* $OpenBSD: pckbc_hpc.c,v 1.4 2015/05/24 10:57:47 miod Exp $ */
-/* $NetBSD: pckbc_hpc.c,v 1.9 2008/03/15 13:23:24 cube Exp $ */
-
-/*
- * Copyright (c) 2003 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the
- * NetBSD Project. See http://www.NetBSD.org/ for
- * information about NetBSD.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/sgi/ip22.h>
-
-#include <dev/ic/i8042reg.h>
-#include <dev/ic/pckbcvar.h>
-
-int pckbc_hpc_match(struct device *, void *, void *);
-void pckbc_hpc_attach(struct device *, struct device *, void *);
-
-const struct cfattach pckbc_hpc_ca = {
- sizeof(struct pckbc_softc), pckbc_hpc_match, pckbc_hpc_attach
-};
-
-int
-pckbc_hpc_match(struct device *parent, void *vcf, void *aux)
-{
- struct cfdata *cf = vcf;
- struct hpc_attach_args *ha = aux;
-
- /* keyboard controller is not wired on Challenge S */
- if (sys_config.system_subtype == IP22_CHALLS)
- return 0;
-
- if (strcmp(ha->ha_name, cf->cf_driver->cd_name) == 0)
- return 1;
-
- return 0;
-}
-
-void
-pckbc_hpc_attach(struct device *parent, struct device * self, void *aux)
-{
- struct pckbc_softc *sc = (struct pckbc_softc *)self;
- struct hpc_attach_args *haa = aux;
- struct pckbc_internal *t = NULL;
- bus_space_handle_t ioh_d, ioh_c;
- int console;
-
- if (hpc_intr_establish(haa->ha_irq, IPL_TTY, pckbcintr, sc,
- sc->sc_dv.dv_xname) == NULL) {
- printf(": unable to establish interrupt\n");
- return;
- }
-
- console = pckbc_is_console(haa->ha_st,
- XKPHYS_TO_PHYS(haa->ha_sh + haa->ha_devoff + 3));
-
- if (console) {
- /* pckbc_cnattach() has already been called */
- t = &pckbc_consdata;
- pckbc_console_attached = 1;
- } else {
- if (bus_space_subregion(haa->ha_st, haa->ha_sh,
- haa->ha_devoff + 3 + KBDATAP, 1, &ioh_d) ||
- bus_space_subregion(haa->ha_st, haa->ha_sh,
- haa->ha_devoff + 3 + KBCMDP, 1, &ioh_c)) {
- printf(": couldn't map registers\n");
- return;
- }
-
- t = malloc(sizeof(*t), M_DEVBUF, M_NOWAIT | M_ZERO);
- t->t_iot = haa->ha_st;
- t->t_ioh_c = ioh_c;
- t->t_ioh_d = ioh_d;
- }
-
- t->t_cmdbyte = KC8_CPU;
- t->t_sc = sc;
- sc->id = t;
-
- printf("\n");
- pckbc_attach(sc, 0);
-}
+++ /dev/null
-/* $OpenBSD: wdsc.c,v 1.7 2020/02/05 16:29:29 krw Exp $ */
-/* $NetBSD: wdsc.c,v 1.32 2011/07/01 18:53:47 dyoung Exp $ */
-
-/*
- * Copyright (c) 2001 Wayne Knowles
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Wayne Knowles
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/buf.h>
-#include <sys/timeout.h>
-
-#include <scsi/scsi_all.h>
-#include <scsi/scsiconf.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/hpc/hpcdma.h>
-
-#include <dev/ic/wd33c93reg.h>
-#include <dev/ic/wd33c93var.h>
-
-struct wdsc_softc {
- struct wd33c93_softc sc_wd33c93; /* Must be first */
- bus_dma_tag_t sc_dmat;
- bus_dmamap_t sc_dmamap;
- int sc_flags;
-#define WDSC_DMA_ACTIVE 0x1
-#define WDSC_DMA_MAPLOADED 0x2
- struct hpc_dma_softc sc_hpcdma;
-};
-
-int wdsc_match(struct device *, void *, void *);
-void wdsc_attach(struct device *, struct device *, void *);
-
-const struct cfattach wdsc_ca = {
- sizeof(struct wdsc_softc), wdsc_match, wdsc_attach
-};
-
-struct cfdriver wdsc_cd = {
- NULL, "wdsc", DV_DULL
-};
-
-int wdsc_dmasetup(struct wd33c93_softc *, void **, ssize_t *, int,
- ssize_t *);
-int wdsc_dmago(struct wd33c93_softc *);
-void wdsc_dmastop(struct wd33c93_softc *);
-void wdsc_reset(struct wd33c93_softc *);
-
-struct scsi_adapter wdsc_switch = {
- wd33c93_scsi_cmd, NULL, NULL, NULL, NULL
-};
-
-/*
- * Match for SCSI devices on the onboard and GIO32 adapter WD33C93 chips
- */
-int
-wdsc_match(struct device *parent, void *vcf, void *aux)
-{
- struct hpc_attach_args *haa = aux;
- struct cfdata *cf = vcf;
- vaddr_t reset, asr;
- uint32_t dummy;
- uint8_t reg;
-
- if (strcmp(haa->ha_name, cf->cf_driver->cd_name) != 0)
- return 0;
-
- reset = PHYS_TO_XKPHYS(haa->ha_sh + haa->ha_dmaoff +
- haa->hpc_regs->scsi0_ctl, CCA_NC);
- if (guarded_read_4(reset, &dummy) != 0)
- return 0;
- *(volatile uint32_t *)reset = haa->hpc_regs->scsi_dmactl_reset;
- delay(1000);
- *(volatile uint32_t *)reset = 0x0;
- delay(1000);
-
- asr = PHYS_TO_XKPHYS(haa->ha_sh + haa->ha_devoff + 3, CCA_NC);
- if (guarded_read_1(asr, ®) != 0)
- return 0;
- if ((reg & 0xff) != SBIC_ASR_INT)
- return 0;
-
- return 1;
-}
-
-/*
- * Attach the wdsc driver
- */
-void
-wdsc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct wdsc_softc *wsc = (struct wdsc_softc *)self;
- struct wd33c93_softc *sc = &wsc->sc_wd33c93;
- struct hpc_attach_args *haa = aux;
- int err;
-
- sc->sc_regt = haa->ha_st;
- wsc->sc_dmat = haa->ha_dmat;
-
- wsc->sc_hpcdma.hpc = haa->hpc_regs;
-
- if ((err = bus_space_subregion(haa->ha_st, haa->ha_sh,
- haa->ha_devoff + 3, 1, &sc->sc_asr_regh)) != 0) {
- printf(": unable to map asr reg, err=%d\n", err);
- return;
- }
-
- if ((err = bus_space_subregion(haa->ha_st, haa->ha_sh,
- haa->ha_devoff + 3 + 4, 1, &sc->sc_data_regh)) != 0) {
- printf(": unable to map data reg, err=%d\n", err);
- return;
- }
-
- if (bus_dmamap_create(wsc->sc_dmat, MAXPHYS,
- wsc->sc_hpcdma.hpc->scsi_dma_segs,
- wsc->sc_hpcdma.hpc->scsi_dma_segs_size,
- wsc->sc_hpcdma.hpc->scsi_dma_segs_size,
- BUS_DMA_WAITOK, &wsc->sc_dmamap) != 0) {
- printf(": failed to create dmamap\n");
- return;
- }
-
- sc->sc_dmasetup = wdsc_dmasetup;
- sc->sc_dmago = wdsc_dmago;
- sc->sc_dmastop = wdsc_dmastop;
- sc->sc_reset = wdsc_reset;
-
- sc->sc_id = 0; /* Host ID = 0 */
- sc->sc_clkfreq = 200; /* 20MHz */
- sc->sc_dmamode = SBIC_CTL_BURST_DMA;
-
- if (hpc_intr_establish(haa->ha_irq, IPL_BIO,
- wd33c93_intr, wsc, self->dv_xname) == NULL) {
- printf(": unable to establish interrupt!\n");
- return;
- }
-
- hpcdma_init(haa, &wsc->sc_hpcdma, wsc->sc_hpcdma.hpc->scsi_dma_segs);
- wd33c93_attach(sc, &wdsc_switch);
-}
-
-/*
- * Prime the hardware for a DMA transfer
- *
- * Requires splbio() interrupts to be disabled by the caller
- */
-int
-wdsc_dmasetup(struct wd33c93_softc *sc, void **addr, ssize_t *len, int datain,
- ssize_t *dmasize)
-{
- struct wdsc_softc *wsc = (struct wdsc_softc *)sc;
- struct hpc_dma_softc *dsc = &wsc->sc_hpcdma;
- ssize_t count;
- int err;
- void *vaddr;
-
- KASSERT((wsc->sc_flags & WDSC_DMA_ACTIVE) == 0);
-
- vaddr = *addr;
- dsc->sc_dlen = count = *len;
- if (count) {
- KASSERT((wsc->sc_flags & WDSC_DMA_MAPLOADED) == 0);
-
- /* Build list of physical addresses for this transfer */
- if ((err = bus_dmamap_load(wsc->sc_dmat, wsc->sc_dmamap,
- vaddr, count, NULL /* kernel address */,
- BUS_DMA_NOWAIT)) != 0)
- panic("%s: bus_dmamap_load err=%d",
- sc->sc_dev.dv_xname, err);
-
- hpcdma_sglist_create(dsc, wsc->sc_dmamap);
- wsc->sc_flags |= WDSC_DMA_MAPLOADED;
-
- if (datain) {
- dsc->sc_dmacmd =
- wsc->sc_hpcdma.hpc->scsi_dma_datain_cmd;
- dsc->sc_flags |= HPCDMA_READ;
- } else {
- dsc->sc_dmacmd =
- wsc->sc_hpcdma.hpc->scsi_dma_dataout_cmd;
- dsc->sc_flags &= ~HPCDMA_READ;
- }
- }
- return count;
-}
-
-/*
- * Prime the hardware for the next DMA transfer
- */
-int
-wdsc_dmago(struct wd33c93_softc *sc)
-{
- struct wdsc_softc *wsc = (struct wdsc_softc *)sc;
- struct hpc_dma_softc *dsc = &wsc->sc_hpcdma;
-
- if (dsc->sc_dlen == 0)
- return 0;
-
- KASSERT((wsc->sc_flags & WDSC_DMA_ACTIVE) == 0);
- KASSERT((wsc->sc_flags & WDSC_DMA_MAPLOADED));
-
- wsc->sc_flags |= WDSC_DMA_ACTIVE;
-
- bus_dmamap_sync(wsc->sc_dmat, wsc->sc_dmamap,
- 0, wsc->sc_dmamap->dm_mapsize,
- (dsc->sc_flags & HPCDMA_READ) ?
- BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
-
- hpcdma_cntl(dsc, dsc->sc_dmacmd); /* Thunderbirds are go! */
-
- return wsc->sc_dmamap->dm_mapsize;
-}
-
-/*
- * Stop DMA and unload active DMA maps
- */
-void
-wdsc_dmastop(struct wd33c93_softc *sc)
-{
- struct wdsc_softc *wsc = (struct wdsc_softc *)sc;
- struct hpc_dma_softc *dsc = &wsc->sc_hpcdma;
-
- if (wsc->sc_flags & WDSC_DMA_ACTIVE) {
- if (dsc->sc_flags & HPCDMA_READ)
- hpcdma_flush(dsc);
- hpcdma_cntl(dsc, 0); /* Stop DMA */
- bus_dmamap_sync(wsc->sc_dmat, wsc->sc_dmamap,
- 0, wsc->sc_dmamap->dm_mapsize,
- (dsc->sc_flags & HPCDMA_READ) ?
- BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
- }
- if (wsc->sc_flags & WDSC_DMA_MAPLOADED)
- bus_dmamap_unload(wsc->sc_dmat, wsc->sc_dmamap);
- wsc->sc_flags &= ~(WDSC_DMA_ACTIVE | WDSC_DMA_MAPLOADED);
-}
-
-/*
- * Reset the controller.
- */
-void
-wdsc_reset(struct wd33c93_softc *sc)
-{
- struct wdsc_softc *wsc = (struct wdsc_softc *)sc;
- struct hpc_dma_softc *dsc = &wsc->sc_hpcdma;
-
- hpcdma_reset(dsc);
-}
+++ /dev/null
-/* $OpenBSD: wskbdmap_sgi.c,v 1.4 2019/05/13 12:31:56 abieber Exp $ */
-
-/*
- * THIS FILE IS AUTOMAGICALLY GENERATED. DO NOT EDIT.
- *
- * generated by:
- * OpenBSD: makemap.awk,v 1.1 2014/05/22 19:39:37 miod Exp
- * generated from:
- */
-/* OpenBSD: wskbdmap_mfii.c,v 1.46 2019/05/11 14:19:16 abieber Exp */
-/* $NetBSD: wskbdmap_mfii.c,v 1.15 2000/05/19 16:40:04 drochner Exp $ */
-
-/*
- * PLEASE DO NOT FORGET TO REGEN
- * sys/dev/usb/ukbdmap.c
- * sys/arch/sgi/hpc/wskbdmap_sgi.c
- * AFTER ANY CHANGES TO THIS FILE!
- */
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Juergen Hannken-Illjes.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/types.h>
-#include <dev/wscons/wsksymdef.h>
-#include <dev/wscons/wsksymvar.h>
-
-#define KC(n) KS_KEYCODE(n)
-
-static const keysym_t zskbd_keydesc_us[] = {
-/* pos command normal shifted */
- KC(2), KS_Cmd1, KS_Control_L,
- KC(3), KS_Caps_Lock,
- KC(4), KS_Shift_R,
- KC(5), KS_Shift_L,
- KC(6), KS_Cmd_Debugger,KS_Escape,
- KC(7), KS_1, KS_exclam,
- KC(8), KS_Tab,
- KC(9), KS_q,
- KC(10), KS_a,
- KC(11), KS_s,
- KC(13), KS_2, KS_at,
- KC(14), KS_3, KS_numbersign,
- KC(15), KS_w,
- KC(16), KS_e,
- KC(17), KS_d,
- KC(18), KS_f,
- KC(19), KS_z,
- KC(20), KS_x,
- KC(21), KS_4, KS_dollar,
- KC(22), KS_5, KS_percent,
- KC(23), KS_r,
- KC(24), KS_t,
- KC(25), KS_g,
- KC(26), KS_h,
- KC(27), KS_c,
- KC(28), KS_v,
- KC(29), KS_6, KS_asciicircum,
- KC(30), KS_7, KS_ampersand,
- KC(31), KS_y,
- KC(32), KS_u,
- KC(33), KS_j,
- KC(34), KS_k,
- KC(35), KS_b,
- KC(36), KS_n,
- KC(37), KS_8, KS_asterisk,
- KC(38), KS_9, KS_parenleft,
- KC(39), KS_i,
- KC(40), KS_o,
- KC(41), KS_l,
- KC(42), KS_semicolon, KS_colon,
- KC(43), KS_m,
- KC(44), KS_comma, KS_less,
- KC(45), KS_0, KS_parenright,
- KC(46), KS_minus, KS_underscore,
- KC(47), KS_p,
- KC(48), KS_bracketleft, KS_braceleft,
- KC(49), KS_apostrophe, KS_quotedbl,
- KC(50), KS_Return,
- KC(51), KS_period, KS_greater,
- KC(52), KS_slash, KS_question,
- KC(53), KS_equal, KS_plus,
- KC(54), KS_grave, KS_asciitilde,
- KC(55), KS_bracketright,KS_braceright,
- KC(56), KS_backslash, KS_bar,
- KC(57), KS_KP_End, KS_KP_1,
- KC(58), KS_KP_Insert, KS_KP_0,
- KC(60), KS_Cmd_ResetEmul,KS_Delete,
- KC(61), KS_Cmd_KbdReset,KS_KP_Delete,
- KC(62), KS_KP_Left, KS_KP_4,
- KC(63), KS_KP_Down, KS_KP_2,
- KC(64), KS_KP_Next, KS_KP_3,
- KC(65), KS_KP_Delete, KS_KP_Decimal,
- KC(66), KS_KP_Home, KS_KP_7,
- KC(67), KS_KP_Up, KS_KP_8,
- KC(68), KS_KP_Begin, KS_KP_5,
- KC(69), KS_KP_Right, KS_KP_6,
- KC(72), KS_Left,
- KC(73), KS_Down,
- KC(74), KS_KP_Prior, KS_KP_9,
- KC(75), KS_KP_Subtract,
- KC(79), KS_Right,
- KC(80), KS_Up,
- KC(81), KS_KP_Enter,
- KC(82), KS_space,
- KC(83), KS_Cmd2, KS_Alt_L,
- KC(84), KS_Cmd2, KS_Alt_R, KS_Multi_key,
- KC(85), KS_Cmd1, KS_Control_R,
- KC(86), KS_Cmd_Screen0, KS_f1,
- KC(87), KS_Cmd_Screen1, KS_f2,
- KC(88), KS_Cmd_Screen2, KS_f3,
- KC(89), KS_Cmd_Screen3, KS_f4,
- KC(90), KS_Cmd_Screen4, KS_f5,
- KC(91), KS_Cmd_Screen5, KS_f6,
- KC(92), KS_Cmd_Screen6, KS_f7,
- KC(93), KS_Cmd_Screen7, KS_f8,
- KC(94), KS_Cmd_Screen8, KS_f9,
- KC(95), KS_Cmd_Screen9, KS_f10,
- KC(96), KS_Cmd_Screen10,KS_f11,
- KC(97), KS_Cmd_Screen11,KS_f12,
- KC(98), KS_Print_Screen,
- KC(99), KS_Hold_Screen,
- KC(100), KS_Pause, /*Break*/
- KC(101), KS_Insert,
- KC(102), KS_Home,
- KC(103), KS_Cmd_ScrollBack,KS_Prior,
- KC(104), KS_End,
- KC(105), KS_Cmd_ScrollFwd,KS_Next,
- KC(106), KS_Num_Lock,
- KC(107), KS_KP_Divide,
- KC(108), KS_KP_Multiply,
- KC(109), KS_KP_Add,
-};
-
-#if !defined(WSKBD_NO_INTL_LAYOUTS)
-
-static const keysym_t zskbd_keydesc_de[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(9), KS_q, KS_Q, KS_at,
- KC(13), KS_2, KS_quotedbl, KS_twosuperior,
- KC(14), KS_3, KS_section, KS_threesuperior,
- KC(19), KS_y,
- KC(29), KS_6, KS_ampersand,
- KC(30), KS_7, KS_slash, KS_braceleft,
- KC(31), KS_z,
- KC(37), KS_8, KS_parenleft, KS_bracketleft,
- KC(38), KS_9, KS_parenright, KS_bracketright,
- KC(42), KS_odiaeresis,
- KC(43), KS_m, KS_M, KS_mu,
- KC(44), KS_comma, KS_semicolon,
- KC(45), KS_0, KS_equal, KS_braceright,
- KC(46), KS_ssharp, KS_question, KS_backslash,
- KC(48), KS_udiaeresis,
- KC(49), KS_adiaeresis,
- KC(51), KS_period, KS_colon,
- KC(52), KS_minus, KS_underscore,
- KC(53), KS_dead_acute, KS_dead_grave,
- KC(54), KS_dead_circumflex,KS_dead_abovering,
- KC(55), KS_plus, KS_asterisk, KS_dead_tilde,
- KC(56), KS_numbersign, KS_apostrophe,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater, KS_bar, KS_brokenbar,
-};
-
-static const keysym_t zskbd_keydesc_de_nodead[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(53), KS_apostrophe, KS_grave,
- KC(54), KS_asciicircum, KS_degree,
- KC(55), KS_plus, KS_asterisk, KS_asciitilde,
-};
-
-static const keysym_t zskbd_keydesc_dk[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(13), KS_2, KS_quotedbl, KS_at,
- KC(14), KS_3, KS_numbersign, KS_sterling,
- KC(21), KS_4, KS_currency, KS_dollar,
- KC(29), KS_6, KS_ampersand,
- KC(30), KS_7, KS_slash, KS_braceleft,
- KC(37), KS_8, KS_parenleft, KS_bracketleft,
- KC(38), KS_9, KS_parenright, KS_bracketright,
- KC(42), KS_ae,
- KC(44), KS_comma, KS_semicolon,
- KC(45), KS_0, KS_equal, KS_braceright,
- KC(46), KS_plus, KS_question,
- KC(48), KS_aring,
- KC(49), KS_oslash,
- KC(51), KS_period, KS_colon,
- KC(52), KS_minus, KS_underscore,
- KC(53), KS_dead_acute, KS_dead_grave, KS_bar,
- KC(54), KS_onehalf, KS_paragraph,
- KC(55), KS_dead_diaeresis,KS_dead_circumflex,KS_dead_tilde,
- KC(56), KS_apostrophe, KS_asterisk,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater, KS_backslash,
-};
-
-static const keysym_t zskbd_keydesc_dk_nodead[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(53), KS_apostrophe, KS_grave, KS_bar,
- KC(55), KS_diaeresis, KS_asciicircum, KS_asciitilde,
-};
-
-static const keysym_t zskbd_keydesc_sv[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(42), KS_odiaeresis,
- KC(46), KS_plus, KS_question, KS_backslash,
- KC(49), KS_adiaeresis,
- KC(54), KS_section, KS_onehalf,
- KC(55), KS_dead_diaeresis,KS_dead_circumflex,KS_dead_tilde,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater, KS_bar,
-};
-
-static const keysym_t zskbd_keydesc_sv_nodead[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(53), KS_apostrophe, KS_grave, KS_bar,
- KC(55), KS_diaeresis, KS_asciicircum, KS_asciitilde,
-};
-
-static const keysym_t zskbd_keydesc_no[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(42), KS_oslash,
- KC(49), KS_ae,
- KC(53), KS_backslash, KS_dead_grave, KS_dead_acute,
- KC(54), KS_bar, KS_paragraph,
- KC(55), KS_dead_diaeresis,KS_dead_circumflex,KS_dead_tilde,
- KC(111), KS_less, KS_greater,
-};
-
-static const keysym_t zskbd_keydesc_no_nodead[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(53), KS_backslash, KS_grave, KS_acute,
- KC(55), KS_diaeresis, KS_asciicircum, KS_asciitilde,
-};
-
-static const keysym_t zskbd_keydesc_fr[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(7), KS_ampersand, KS_1,
- KC(9), KS_a,
- KC(10), KS_q,
- KC(13), KS_eacute, KS_2, KS_asciitilde,
- KC(14), KS_quotedbl, KS_3, KS_numbersign,
- KC(15), KS_z,
- KC(19), KS_w,
- KC(21), KS_apostrophe, KS_4, KS_braceleft,
- KC(22), KS_parenleft, KS_5, KS_bracketleft,
- KC(29), KS_minus, KS_6, KS_bar,
- KC(30), KS_egrave, KS_7, KS_grave,
- KC(37), KS_underscore, KS_8, KS_backslash,
- KC(38), KS_ccedilla, KS_9, KS_asciicircum,
- KC(42), KS_m,
- KC(43), KS_comma, KS_question,
- KC(44), KS_semicolon, KS_period,
- KC(45), KS_agrave, KS_0, KS_at,
- KC(46), KS_parenright, KS_degree, KS_bracketright,
- KC(48), KS_dead_circumflex,KS_dead_diaeresis,
- KC(49), KS_ugrave, KS_percent,
- KC(51), KS_colon, KS_slash,
- KC(52), KS_exclam, KS_section,
- KC(53), KS_equal, KS_plus, KS_braceright,
- KC(54), KS_twosuperior,
- KC(55), KS_dollar, KS_sterling, KS_currency,
- KC(56), KS_asterisk, KS_mu,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater,
-};
-
-/*
- * fr-dvorak-be'po layout, simplified map, per http://www.clavier-dvorak.org/
- * (the complete map is still a moving target)
- */
-/* fr_dvorak_bepo not applicable */
-
-static const keysym_t zskbd_keydesc_it[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(13), KS_2, KS_quotedbl, KS_twosuperior,
- KC(14), KS_3, KS_sterling, KS_threesuperior,
- KC(22), KS_5, KS_percent,
- KC(29), KS_6, KS_ampersand,
- KC(30), KS_7, KS_slash,
- KC(37), KS_8, KS_parenleft,
- KC(38), KS_9, KS_parenright,
- KC(42), KS_ograve, KS_Ccedilla, KS_at,
- KC(44), KS_comma, KS_semicolon,
- KC(45), KS_0, KS_equal,
- KC(46), KS_apostrophe, KS_question,
- KC(48), KS_egrave, KS_eacute, KS_braceleft, KS_bracketleft,
- KC(49), KS_agrave, KS_degree, KS_numbersign,
- KC(51), KS_period, KS_colon,
- KC(52), KS_minus, KS_underscore,
- KC(53), KS_igrave, KS_asciicircum,
- KC(54), KS_backslash, KS_bar,
- KC(55), KS_plus, KS_asterisk, KS_braceright, KS_bracketright,
- KC(56), KS_ugrave, KS_section,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater,
-};
-
-static const keysym_t zskbd_keydesc_uk[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(7), KS_1, KS_exclam, KS_plusminus, KS_exclamdown,
- KC(13), KS_2, KS_quotedbl, KS_twosuperior, KS_cent,
- KC(14), KS_3, KS_sterling, KS_threesuperior,
- KC(21), KS_4, KS_dollar, KS_acute, KS_currency,
- KC(22), KS_5, KS_percent, KS_mu, KS_yen,
- KC(29), KS_6, KS_asciicircum, KS_paragraph,
- KC(30), KS_7, KS_ampersand, KS_periodcentered,KS_brokenbar,
- KC(37), KS_8, KS_asterisk, KS_cedilla, KS_ordfeminine,
- KC(38), KS_9, KS_parenleft, KS_onesuperior, KS_diaeresis,
- KC(45), KS_0, KS_parenright, KS_masculine, KS_copyright,
- KC(46), KS_minus, KS_underscore, KS_hyphen, KS_ssharp,
- KC(49), KS_apostrophe, KS_at, KS_section, KS_Agrave,
- KC(53), KS_equal, KS_plus, KS_onehalf, KS_guillemotleft,
- KC(54), KS_grave, KS_grave, KS_agrave, KS_agrave,
- KC(56), KS_numbersign, KS_asciitilde, KS_sterling, KS_thorn,
- KC(111), KS_backslash, KS_bar, KS_Udiaeresis,
-};
-
-/* jp not applicable */
-
-static const keysym_t zskbd_keydesc_es[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(7), KS_1, KS_exclam, KS_bar,
- KC(13), KS_2, KS_quotedbl, KS_at,
- KC(14), KS_3, KS_periodcentered,KS_numbersign,
- KC(21), KS_4, KS_dollar, KS_asciitilde,
- KC(29), KS_6, KS_ampersand,
- KC(30), KS_7, KS_slash,
- KC(37), KS_8, KS_parenleft,
- KC(38), KS_9, KS_parenright,
- KC(42), KS_ntilde,
- KC(44), KS_comma, KS_semicolon,
- KC(45), KS_0, KS_equal,
- KC(46), KS_apostrophe, KS_question,
- KC(48), KS_dead_grave, KS_dead_circumflex,KS_bracketleft,
- KC(49), KS_dead_acute, KS_dead_diaeresis,KS_braceleft,
- KC(51), KS_period, KS_colon,
- KC(52), KS_minus, KS_underscore,
- KC(53), KS_exclamdown, KS_questiondown,
- KC(54), KS_degree, KS_ordfeminine, KS_backslash,
- KC(55), KS_plus, KS_asterisk, KS_bracketright,
- KC(56), KS_ccedilla, KS_Ccedilla, KS_braceright,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater,
-};
-
-/* lt not applicable */
-
-static const keysym_t zskbd_keydesc_be[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(7), KS_ampersand, KS_1, KS_bar,
- KC(9), KS_a,
- KC(10), KS_q,
- KC(13), KS_eacute, KS_2, KS_at,
- KC(14), KS_quotedbl, KS_3, KS_numbersign,
- KC(15), KS_z,
- KC(19), KS_w,
- KC(21), KS_apostrophe, KS_4,
- KC(22), KS_parenleft, KS_5,
- KC(29), KS_section, KS_6, KS_asciicircum,
- KC(30), KS_egrave, KS_7,
- KC(37), KS_exclam, KS_8,
- KC(38), KS_ccedilla, KS_9, KS_braceleft,
- KC(42), KS_m,
- KC(43), KS_comma, KS_question,
- KC(44), KS_semicolon, KS_period,
- KC(45), KS_agrave, KS_0, KS_braceright,
- KC(46), KS_parenright, KS_degree,
- KC(48), KS_dead_circumflex,KS_dead_diaeresis,KS_bracketleft,
- KC(49), KS_ugrave, KS_percent, KS_acute,
- KC(51), KS_colon, KS_slash,
- KC(52), KS_equal, KS_plus, KS_asciitilde,
- KC(53), KS_minus, KS_underscore,
- KC(54), KS_twosuperior, KS_threesuperior,
- KC(55), KS_dollar, KS_asterisk, KS_bracketright,
- KC(56), KS_mu, KS_sterling, KS_grave,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater, KS_backslash,
-};
-
-/* us_declk not applicable */
-
-/* us_dvorak not applicable */
-
-/* us_colemak not applicable */
-
-/* swapctrlcaps not applicable */
-
-/* iopener not applicable */
-
-/* ru not applicable */
-
-/* ua not applicable */
-
-static const keysym_t zskbd_keydesc_sg[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(7), KS_1, KS_plus, KS_bar,
- KC(13), KS_2, KS_quotedbl, KS_at,
- KC(14), KS_3, KS_asterisk, KS_numbersign,
- KC(16), KS_e, KS_E, KS_currency,
- KC(19), KS_y,
- KC(21), KS_4, KS_ccedilla,
- KC(29), KS_6, KS_ampersand, KS_notsign,
- KC(30), KS_7, KS_slash, KS_brokenbar,
- KC(31), KS_z,
- KC(37), KS_8, KS_parenleft, KS_cent,
- KC(38), KS_9, KS_parenright,
- KC(42), KS_odiaeresis, KS_eacute,
- KC(44), KS_comma, KS_semicolon,
- KC(45), KS_0, KS_equal,
- KC(46), KS_apostrophe, KS_question, KS_dead_acute,
- KC(48), KS_udiaeresis, KS_egrave, KS_bracketleft,
- KC(49), KS_adiaeresis, KS_agrave, KS_braceleft,
- KC(51), KS_period, KS_colon,
- KC(52), KS_minus, KS_underscore,
- KC(53), KS_dead_circumflex,KS_dead_grave,KS_dead_tilde,
- KC(54), KS_section, KS_degree, KS_dead_abovering,
- KC(55), KS_dead_diaeresis,KS_exclam, KS_bracketright,
- KC(56), KS_dollar, KS_sterling, KS_braceright,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater, KS_backslash,
-};
-
-static const keysym_t zskbd_keydesc_sg_nodead[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(46), KS_apostrophe, KS_question, KS_acute,
- KC(53), KS_asciicircum, KS_grave, KS_asciitilde,
- KC(55), KS_diaeresis, KS_exclam, KS_bracketright,
-};
-
-static const keysym_t zskbd_keydesc_sf[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(42), KS_eacute, KS_odiaeresis,
- KC(48), KS_egrave, KS_udiaeresis, KS_bracketleft,
- KC(49), KS_agrave, KS_adiaeresis, KS_braceleft,
-};
-
-static const keysym_t zskbd_keydesc_pt[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(13), KS_2, KS_quotedbl, KS_at,
- KC(14), KS_3, KS_numbersign, KS_sterling,
- KC(29), KS_6, KS_ampersand,
- KC(30), KS_7, KS_slash, KS_braceleft,
- KC(37), KS_8, KS_parenleft, KS_bracketleft,
- KC(38), KS_9, KS_parenright, KS_bracketright,
- KC(42), KS_ccedilla, KS_Ccedilla,
- KC(44), KS_comma, KS_semicolon,
- KC(45), KS_0, KS_equal, KS_braceright,
- KC(46), KS_apostrophe, KS_question,
- KC(48), KS_plus, KS_asterisk,
- KC(49), KS_masculine, KS_ordfeminine,
- KC(51), KS_period, KS_colon,
- KC(52), KS_minus, KS_underscore,
- KC(53), KS_less, KS_greater,
- KC(54), KS_backslash, KS_bar,
- KC(55), KS_dead_acute, KS_dead_grave,
- KC(56), KS_dead_tilde, KS_dead_circumflex,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_less, KS_greater,
-};
-
-/* la not applicable */
-
-/* br not applicable */
-
-/* tr not applicable */
-
-/* tr_nodead not applicable */
-
-/* pl not applicable */
-
-/* hu not applicable */
-
-/* si not applicable */
-
-/* cf not applicable */
-
-/* cf_nodead not applicable */
-
-/* lv not applicable */
-
-static const keysym_t zskbd_keydesc_nl[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(7), KS_1, KS_exclam, KS_onesuperior,
- KC(11), KS_s, KS_S, KS_ssharp,
- KC(13), KS_2, KS_quotedbl, KS_twosuperior,
- KC(14), KS_3, KS_numbersign, KS_threesuperior,
- KC(19), KS_z, KS_Z, KS_guillemotleft,
- KC(20), KS_x, KS_X, KS_guillemotright,
- KC(21), KS_4, KS_dollar, KS_onequarter,
- KC(22), KS_5, KS_percent, KS_onehalf,
- KC(23), KS_r, KS_R, KS_paragraph,
- KC(27), KS_c, KS_C, KS_cent,
- KC(29), KS_6, KS_ampersand, KS_threequarters,
- KC(30), KS_7, KS_underscore, KS_sterling,
- KC(37), KS_8, KS_parenleft, KS_braceleft,
- KC(38), KS_9, KS_parenright, KS_braceright,
- KC(42), KS_plus, KS_plusminus,
- KC(43), KS_m, KS_M, KS_mu,
- KC(44), KS_comma, KS_semicolon,
- KC(45), KS_0, KS_apostrophe,
- KC(46), KS_slash, KS_question, KS_backslash,
- KC(48), KS_dead_diaeresis,KS_dead_circumflex,
- KC(49), KS_dead_acute, KS_dead_grave,
- KC(51), KS_period, KS_colon, KS_periodcentered,
- KC(52), KS_minus, KS_equal,
- KC(53), KS_degree, KS_dead_tilde, KS_dead_cedilla,
- KC(54), KS_at, KS_section, KS_notsign,
- KC(55), KS_asterisk, KS_bar,
- KC(56), KS_less, KS_greater,
- KC(84), KS_Mode_switch, KS_Multi_key,
- KC(111), KS_bracketright,KS_bracketleft, KS_brokenbar,
-};
-
-static const keysym_t zskbd_keydesc_nl_nodead[] = {
-/* pos normal shifted altgr shift-altgr */
- KC(48), KS_quotedbl, KS_asciicircum,
- KC(49), KS_apostrophe, KS_grave,
- KC(53), KS_degree, KS_asciitilde, KS_cedilla,
-};
-
-/* is not applicable */
-
-/* is_nodead not applicable */
-
-/* ee not applicable */
-
-/* ee_nodead not applicable */
-
-#endif /* WSKBD_NO_INTL_LAYOUTS */
-
-#define KBD_MAP(name, base, map) \
- { name, base, sizeof(map)/sizeof(keysym_t), map }
-
-const struct wscons_keydesc wssgi_keydesctab[] = {
- KBD_MAP(KB_US, 0, zskbd_keydesc_us),
-#if !defined(WSKBD_NO_INTL_LAYOUTS)
- KBD_MAP(KB_DE, KB_US, zskbd_keydesc_de),
- KBD_MAP(KB_DE | KB_NODEAD, KB_DE, zskbd_keydesc_de_nodead),
- KBD_MAP(KB_FR, KB_US, zskbd_keydesc_fr),
- KBD_MAP(KB_DK, KB_US, zskbd_keydesc_dk),
- KBD_MAP(KB_DK | KB_NODEAD, KB_DK, zskbd_keydesc_dk_nodead),
- KBD_MAP(KB_IT, KB_US, zskbd_keydesc_it),
- KBD_MAP(KB_UK, KB_US, zskbd_keydesc_uk),
- KBD_MAP(KB_SV, KB_DK, zskbd_keydesc_sv),
- KBD_MAP(KB_SV | KB_NODEAD, KB_SV, zskbd_keydesc_sv_nodead),
- KBD_MAP(KB_NO, KB_DK, zskbd_keydesc_no),
- KBD_MAP(KB_NO | KB_NODEAD, KB_NO, zskbd_keydesc_no_nodead),
- KBD_MAP(KB_ES, KB_US, zskbd_keydesc_es),
- KBD_MAP(KB_BE, KB_US, zskbd_keydesc_be),
- KBD_MAP(KB_SG, KB_US, zskbd_keydesc_sg),
- KBD_MAP(KB_SG | KB_NODEAD, KB_SG, zskbd_keydesc_sg_nodead),
- KBD_MAP(KB_SF, KB_SG, zskbd_keydesc_sf),
- KBD_MAP(KB_SF | KB_NODEAD, KB_SF, zskbd_keydesc_sg_nodead),
- KBD_MAP(KB_PT, KB_US, zskbd_keydesc_pt),
- KBD_MAP(KB_NL, KB_US, zskbd_keydesc_nl),
- KBD_MAP(KB_NL | KB_NODEAD, KB_NL, zskbd_keydesc_nl_nodead),
-#endif /* WSKBD_NO_INTL_LAYOUTS */
- {0, 0, 0, 0}
-};
-
-#undef KBD_MAP
-#undef KC
+++ /dev/null
-/* $OpenBSD: z8530kbd.c,v 1.7 2014/12/07 13:10:45 miod Exp $ */
-/* $NetBSD: zs_kbd.c,v 1.8 2008/03/29 19:15:35 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2004 Steve Rumble
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * IP20 serial keyboard driver attached to zs channel 0 at 600bps.
- * This layer is the parent of wskbd.
- */
-
-#include <sys/param.h>
-#include <sys/malloc.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/device.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wskbdvar.h>
-#include <dev/wscons/wsksymdef.h>
-#include <dev/wscons/wsksymvar.h>
-
-#include <machine/autoconf.h>
-#include <mips64/archtype.h>
-
-#include <dev/ic/z8530reg.h>
-#include <machine/z8530var.h>
-
-#define ZSKBD_BAUD 600
-#define ZSKBD_TXQ_LEN 16 /* power of 2 */
-#define ZSKBD_RXQ_LEN 64 /* power of 2 */
-
-#define ZSKBD_DIP_SYNC 0x6e /* 110 */
-#define ZSKBD_INTL_KEY 0x6f /* 111 */
-#define ZSKBD_KEY_UP 0x80
-#define ZSKBD_KEY_ALL_UP 0xf0
-
-#ifdef ZSKBD_DEBUG
-int zskbd_debug = 0;
-
-#define DPRINTF(_x) if (zskbd_debug) printf _x
-#else
-#define DPRINTF(_x)
-#endif
-
-struct zskbd_softc {
- struct device sc_dev;
-
- struct zskbd_devconfig *sc_dc;
-
-#ifdef WSDISPLAY_COMPAT_RAWKBD
- int sc_rawkbd;
-#endif
-};
-
-struct zskbd_devconfig {
- /* transmit tail-chasing fifo */
- uint8_t txq[ZSKBD_TXQ_LEN];
- u_int txq_head;
- u_int txq_tail;
-
- /* receive tail-chasing fifo */
- uint8_t rxq[ZSKBD_RXQ_LEN];
- u_int rxq_head;
- u_int rxq_tail;
-
- /* number of non-keystroke bytes expected */
- int expected;
-
- /* keyboard configuration */
-#define ZSKBD_CTRL_A 0x0
-#define ZSKBD_CTRL_A_SBEEP 0x2 /* 200 ms */
-#define ZSKBD_CTRL_A_LBEEP 0x4 /* 1000 ms */
-#define ZSKBD_CTRL_A_NOCLICK 0x8 /* turn off keyboard click */
-#define ZSKBD_CTRL_A_RCB 0x10 /* request config byte */
-#define ZSKBD_CTRL_A_NUMLK 0x20 /* num lock led */
-#define ZSKBD_CTRL_A_CAPSLK 0x40 /* caps lock led */
-#define ZSKBD_CTRL_A_AUTOREP 0x80 /* auto-repeat after 650 ms, 28x/sec */
-
-#define ZSKBD_CTRL_B 0x1
-#define ZSKBD_CTRL_B_CMPL_DS1_2 0x2 /* complement of ds1+ds2 (num+capslk) */
-#define ZSKBD_CTRL_B_SCRLK 0x4 /* scroll lock light */
-#define ZSKBD_CTRL_B_L1 0x8 /* user-configurable lights */
-#define ZSKBD_CTRL_B_L2 0x10
-#define ZSKBD_CTRL_B_L3 0x20
-#define ZSKBD_CTRL_B_L4 0x40
- uint8_t kbd_conf[2];
-
- /* dip switch settings */
- uint8_t dip;
-
- /* wscons glue */
- struct device *wskbddev;
- int enabled;
-};
-
-struct zskbd_devconfig zskbd_consdc;
-
-int zskbd_match(struct device *, void *, void *);
-void zskbd_attach(struct device *, struct device *, void *);
-
-struct cfdriver zskbd_cd = {
- NULL, "zskbd", DV_DULL
-};
-
-const struct cfattach zskbd_ca = {
- sizeof(struct zskbd_softc), zskbd_match, zskbd_attach
-};
-
-void zskbd_rxint(struct zs_chanstate *);
-void zskbd_stint(struct zs_chanstate *, int);
-void zskbd_txint(struct zs_chanstate *);
-void zskbd_softint(struct zs_chanstate *);
-int zskbd_send(struct zs_chanstate *, uint8_t *, u_int);
-int zskbd_poll(struct zs_chanstate *, uint8_t *);
-void zskbd_ctrl(struct zs_chanstate *, uint8_t, uint8_t, uint8_t, uint8_t);
-int zskbd_process(struct zskbd_devconfig *, uint8_t);
-
-void zskbd_wskbd_input(struct zs_chanstate *, uint8_t);
-int zskbd_wskbd_enable(void *, int);
-void zskbd_wskbd_set_leds(void *, int);
-int zskbd_wskbd_get_leds(void *);
-void zskbd_wskbd_set_keyclick(void *, int);
-int zskbd_wskbd_get_keyclick(void *);
-int zskbd_wskbd_ioctl(void *, u_long, caddr_t, int, struct proc *);
-
-void zskbd_cnattach(int, int);
-void zskbd_wskbd_getc(void *, u_int *, int *);
-void zskbd_wskbd_pollc(void *, int);
-void zskbd_wskbd_bell(void *, u_int, u_int, u_int);
-
-extern struct zschan *zs_get_chan_addr(int, int);
-extern int zs_getc(void *);
-extern void zs_putc(void *, int);
-
-static struct zsops zskbd_zsops = {
- zskbd_rxint,
- zskbd_stint,
- zskbd_txint,
- zskbd_softint
-};
-
-extern const struct wscons_keydesc wssgi_keydesctab[];
-struct wskbd_mapdata sgikbd_wskbd_keymapdata = {
- wssgi_keydesctab,
- KB_US | KB_DEFAULT
-};
-
-const int zskbd_layouts[] = {
- KB_US,
- KB_DE,
- KB_FR,
- KB_IT,
- KB_DK,
- KB_ES,
- KB_NO,
- KB_SV,
- KB_SF,
- KB_UK,
- KB_BE,
- KB_SG,
- KB_NL,
- -1, /* finnish */
- KB_PT,
- -1 /* greek */
-};
-
-const struct wskbd_accessops zskbd_wskbd_accessops = {
- zskbd_wskbd_enable,
- zskbd_wskbd_set_leds,
- zskbd_wskbd_ioctl
-};
-
-const struct wskbd_consops zskbd_wskbd_consops = {
- zskbd_wskbd_getc,
- zskbd_wskbd_pollc,
- zskbd_wskbd_bell
-};
-
-int zskbd_is_console = 0;
-
-int
-zskbd_match(struct device *parent, void *vcf, void *aux)
-{
- if (sys_config.system_type == SGI_IP20) {
- struct zsc_attach_args *args = aux;
-
- if (args->channel == 0)
- return 1;
- }
-
- return 0;
-}
-
-void
-zskbd_attach(struct device *parent, struct device *self, void *aux)
-{
- struct zskbd_softc *sc = (struct zskbd_softc *)self;
- struct zsc_softc *zsc = (struct zsc_softc *)parent;
- struct zsc_attach_args *args = aux;
- struct zs_chanstate *cs;
- struct zskbd_devconfig *dc;
- struct wskbddev_attach_args wskaa;
- int s, channel, rc;
- uint8_t key;
-
- printf(": ");
-
- /* Establish ourself with the MD z8530 driver */
- channel = args->channel;
- cs = zsc->zsc_cs[channel];
- cs->cs_ops = &zskbd_zsops;
- cs->cs_private = sc;
-
- if (zskbd_is_console)
- dc = &zskbd_consdc;
- else
- dc = malloc(sizeof(struct zskbd_devconfig), M_DEVBUF,
- M_WAITOK | M_ZERO);
- sc->sc_dc = dc;
-
- s = splzs();
- zs_write_reg(cs, 9, (channel == 0) ? ZSWR9_A_RESET : ZSWR9_B_RESET);
- cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_TIE;
- cs->cs_preg[4] = (cs->cs_preg[4] & ZSWR4_CLK_MASK) |
- (ZSWR4_ONESB | ZSWR4_PARENB); /* 1 stop, odd parity */
- cs->cs_preg[15] &= ~ZSWR15_ENABLE_ENHANCED;
- zs_set_speed(cs, ZSKBD_BAUD);
- zs_loadchannelregs(cs);
-
- /*
- * Empty the keyboard input buffer (if the keyboard is the console
- * input device and the user invoked UKC, the `enter key up' event
- * will still be pending in the buffer).
- */
- while ((zs_read_csr(cs) & ZSRR0_RX_READY) != 0)
- (void)zs_read_data(cs);
-
- if (!zskbd_is_console) {
- /*
- * Ask the keyboard for its DIP switch settings. This will
- * also let us know whether the keyboard is connected.
- */
- dc->expected = 2;
- zskbd_ctrl(cs, ZSKBD_CTRL_A_RCB, 0, 0, 0);
- while (dc->expected != 0) {
- rc = zskbd_poll(cs, &key);
- if (rc != 0) {
- if (rc == ENXIO && dc->expected == 2) {
- printf("no keyboard");
- /*
- * Attach wskbd nevertheless, in case
- * the keyboard is plugged late.
- */
- dc->expected = 0;
- goto dip;
- } else {
- printf("i/o error\n");
- return;
- }
- }
-
- zskbd_process(dc, key);
- }
- }
-
- printf("dipsw %02x", dc->dip);
- if (dc->dip < nitems(zskbd_layouts) && zskbd_layouts[dc->dip] != -1)
- sgikbd_wskbd_keymapdata.layout = zskbd_layouts[dc->dip];
-dip:
-
- /*
- * Disable key click by default. Note that if the keyboard is not
- * currently connected, the bit will nevertheless stick and will
- * disable the click as soon as a keyboard led needs to be lit.
- */
- zskbd_ctrl(cs, ZSKBD_CTRL_A_NOCLICK, 0, 0, 0);
-
- splx(s);
-
- printf("\n");
-
- if (zskbd_is_console)
- dc->enabled = 1;
-
- /* attach wskbd */
- wskaa.console = zskbd_is_console;
- wskaa.keymap = &sgikbd_wskbd_keymapdata;
- wskaa.accessops = &zskbd_wskbd_accessops;
- wskaa.accesscookie = cs;
- dc->wskbddev = config_found(self, &wskaa, wskbddevprint);
-}
-
-void
-zskbd_rxint(struct zs_chanstate *cs)
-{
- struct zskbd_softc *sc = cs->cs_private;
- struct zskbd_devconfig *dc = sc->sc_dc;
- uint8_t c, r;
-
- /* clear errors */
- r = zs_read_reg(cs, 1);
- if (r & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE))
- zs_write_csr(cs, ZSWR0_RESET_ERRORS);
-
- /* read byte and append to our queue */
- c = zs_read_data(cs);
-
- dc->rxq[dc->rxq_tail] = c;
- dc->rxq_tail = (dc->rxq_tail + 1) & ~ZSKBD_RXQ_LEN;
-
- cs->cs_softreq = 1;
-}
-
-void
-zskbd_stint(struct zs_chanstate *cs, int force)
-{
- zs_write_csr(cs, ZSWR0_RESET_STATUS);
- cs->cs_softreq = 1;
-}
-
-void
-zskbd_txint(struct zs_chanstate *cs)
-{
- zs_write_reg(cs, 0, ZSWR0_RESET_TXINT);
- cs->cs_softreq = 1;
-}
-
-void
-zskbd_softint(struct zs_chanstate *cs)
-{
- struct zskbd_softc *sc = cs->cs_private;
- struct zskbd_devconfig *dc = sc->sc_dc;
- int rr0;
- uint8_t key;
-
- /* handle pending transmissions */
- if (dc->txq_head != dc->txq_tail) {
- int s;
-
- s = splzs();
- while (dc->txq_head != dc->txq_tail) {
- rr0 = zs_read_csr(cs);
- if ((rr0 & ZSRR0_TX_READY) == 0)
- break;
- zs_write_data(cs, dc->txq[dc->txq_head]);
- dc->txq_head = (dc->txq_head + 1) & ~ZSKBD_TXQ_LEN;
- }
- splx(s);
- }
-
- /* handle incoming keystrokes/config */
- while (dc->rxq_head != dc->rxq_tail) {
- key = dc->rxq[dc->rxq_head];
- dc->rxq_head = (dc->rxq_head + 1) & ~ZSKBD_RXQ_LEN;
- if (zskbd_process(dc, key) != 0) {
- /*
- * The `international' key (only found in non-us
- * layouts) is supposed to be keycode 111, but is
- * apparently 110 (same as the status byte prefix)
- * on some (all?) models.
- */
- if (key == ZSKBD_DIP_SYNC)
- key = ZSKBD_INTL_KEY;
-
- /* toss wskbd a bone */
- if (dc->enabled)
- zskbd_wskbd_input(cs, key);
- }
- }
-}
-
-int
-zskbd_process(struct zskbd_devconfig *dc, uint8_t key)
-{
- switch (dc->expected) {
- case 2:
- if (key != ZSKBD_DIP_SYNC) {
- /* only during attach, thus no device name prefix */
- printf("unexpected configuration byte header"
- " (%02x), ", key);
- /* transition state anyway */
- }
- dc->expected--;
- return 0;
- case 1:
- dc->dip = key;
- dc->expected--;
- return 0;
- default:
- case 0:
- return 1;
- }
-}
-
-/* expects to be in splzs() */
-int
-zskbd_send(struct zs_chanstate *cs, uint8_t *c, u_int len)
-{
- struct zskbd_softc *sc = cs->cs_private;
- struct zskbd_devconfig *dc = sc->sc_dc;
- u_int i;
- int rr0;
-
- while (len != 0) {
- rr0 = zs_read_csr(cs);
- if ((rr0 & ZSRR0_TX_READY) == 0) {
- /*
- * poll until whole transmission complete during
- * autoconf
- */
- if (cold) {
- for (i = 1000; i != 0; i--) {
- if ((rr0 & ZSRR0_TX_READY) != 0)
- break;
- delay(100);
- }
- if (i == 0)
- return EIO;
- } else
- break;
- }
- zs_write_data(cs, *c++);
- len--;
- }
-
- /*
- * Enqueue any remaining bytes.
- */
- while (len != 0) {
- dc->txq[dc->txq_tail] = *c++;
- dc->txq_tail = (dc->txq_tail + 1) & ~ZSKBD_TXQ_LEN;
- len--;
- cs->cs_softreq = 1;
- }
-
- return 0;
-}
-
-/* expects to be in splzs() */
-int
-zskbd_poll(struct zs_chanstate *cs, uint8_t *key)
-{
- u_int i;
- int rr0, rr1, c;
-
- for (i = 1000; i != 0; i--) {
- rr0 = zs_read_csr(cs);
- if ((rr0 & ZSRR0_RX_READY) != 0)
- break;
- delay(100);
- }
- if (i == 0)
- return ENXIO;
-
- rr1 = zs_read_reg(cs, 1);
- c = zs_read_data(cs);
-
- if (rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE))
- return EIO;
-
- *key = (uint8_t)c;
- return 0;
-}
-
-/* expects to be in splzs() */
-void
-zskbd_ctrl(struct zs_chanstate *cs, uint8_t a_on, uint8_t a_off, uint8_t b_on,
- uint8_t b_off)
-{
- struct zskbd_softc *sc = cs->cs_private;
- struct zskbd_devconfig *dc = sc->sc_dc;
-
- dc->kbd_conf[ZSKBD_CTRL_A] |= a_on;
- dc->kbd_conf[ZSKBD_CTRL_A] &= ~(a_off | ZSKBD_CTRL_B);
- dc->kbd_conf[ZSKBD_CTRL_B] &= ~b_off;
- dc->kbd_conf[ZSKBD_CTRL_B] |= (b_on | ZSKBD_CTRL_B);
-
- zskbd_send(cs, dc->kbd_conf, 2);
-
- /* make sure we don't resend these each time */
- dc->kbd_conf[ZSKBD_CTRL_A] &= ~(ZSKBD_CTRL_A_RCB | ZSKBD_CTRL_A_SBEEP |
- ZSKBD_CTRL_A_LBEEP);
-}
-
-/******************************************************************************
- * wskbd glue
- ******************************************************************************/
-
-void
-zskbd_wskbd_input(struct zs_chanstate *cs, uint8_t key)
-{
- struct zskbd_softc *sc = cs->cs_private;
- u_int type;
-#ifdef WSDISPLAY_COMPAT_RAWKBD
- int s;
-#endif
-
- if (sc->sc_dc->wskbddev == NULL)
- return; /* why bother */
-
- if (key & ZSKBD_KEY_UP) {
- if ((key & ZSKBD_KEY_ALL_UP) == ZSKBD_KEY_ALL_UP)
- type = WSCONS_EVENT_ALL_KEYS_UP;
- else
- type = WSCONS_EVENT_KEY_UP;
- } else
- type = WSCONS_EVENT_KEY_DOWN;
-
- wskbd_input(sc->sc_dc->wskbddev, type, (key & ~ZSKBD_KEY_UP));
-
- DPRINTF(("zskbd_wskbd_input: inputted key 0x%x\n", key));
-
-#ifdef WSDISPLAY_COMPAT_RAWKBD
- if (sc->sc_rawkbd &&
- type != WSCONS_EVENT_ALL_KEYS_UP) {
- s = spltty();
- wskbd_rawinput(sc->sc_dc->wskbddev, &key, 1);
- splx(s);
- }
-#endif
-}
-
-int
-zskbd_wskbd_enable(void *cookie, int on)
-{
- struct zs_chanstate *cs = cookie;
- struct zskbd_softc *sc = cs->cs_private;
-
- if (on) {
- if (sc->sc_dc->enabled)
- return (EBUSY);
- else
- sc->sc_dc->enabled = 1;
- } else
- sc->sc_dc->enabled = 0;
-
- DPRINTF(("zskbd_wskbd_enable: %s\n", on ? "enabled" : "disabled"));
-
- return (0);
-}
-
-void
-zskbd_wskbd_set_leds(void *cookie, int leds)
-{
- struct zs_chanstate *cs = cookie;
- int s;
- uint8_t a_on, a_off, b_on, b_off;
-
- a_on = a_off = b_on = b_off = 0;
-
- if (leds & WSKBD_LED_CAPS)
- a_on |= ZSKBD_CTRL_A_CAPSLK;
- else
- a_off |= ZSKBD_CTRL_A_CAPSLK;
-
- if (leds & WSKBD_LED_NUM)
- a_on |= ZSKBD_CTRL_A_NUMLK;
- else
- a_off |= ZSKBD_CTRL_A_NUMLK;
-
- if (leds & WSKBD_LED_SCROLL)
- b_on |= ZSKBD_CTRL_B_SCRLK;
- else
- b_off |= ZSKBD_CTRL_B_SCRLK;
-
- s = splzs();
- zskbd_ctrl(cs, a_on, a_off, b_on, b_off);
- splx(s);
-}
-
-int
-zskbd_wskbd_get_leds(void *cookie)
-{
- struct zs_chanstate *cs = cookie;
- struct zskbd_softc *sc = cs->cs_private;
- int leds;
-
- leds = 0;
-
- if (sc->sc_dc->kbd_conf[ZSKBD_CTRL_A] & ZSKBD_CTRL_A_NUMLK)
- leds |= WSKBD_LED_NUM;
-
- if (sc->sc_dc->kbd_conf[ZSKBD_CTRL_A] & ZSKBD_CTRL_A_CAPSLK)
- leds |= WSKBD_LED_CAPS;
-
- if (sc->sc_dc->kbd_conf[ZSKBD_CTRL_B] & ZSKBD_CTRL_B_SCRLK)
- leds |= WSKBD_LED_SCROLL;
-
- return (leds);
-}
-
-#if 0
-void
-zskbd_wskbd_set_keyclick(void *cookie, int on)
-{
- struct zs_chanstate *cs = cookie;
- int s;
-
- if (on) {
- if (!zskbd_wskbd_get_keyclick(cookie)) {
- s = splzs();
- zskbd_ctrl(cs, 0, ZSKBD_CTRL_A_NOCLICK, 0, 0);
- splx(s);
- }
- } else {
- if (zskbd_wskbd_get_keyclick(cookie)) {
- s = splzs();
- zskbd_ctrl(cs, ZSKBD_CTRL_A_NOCLICK, 0, 0, 0);
- splx(s);
- }
- }
-}
-
-int
-zskbd_wskbd_get_keyclick(void *cookie)
-{
- struct zs_chanstate *cs = cookie;
- struct zskbd_softc *sc = cs->cs_private;
-
- if (sc->sc_dc->kbd_conf[ZSKBD_CTRL_A] & ZSKBD_CTRL_A_NOCLICK)
- return (0);
- else
- return (1);
-}
-#endif
-
-int
-zskbd_wskbd_ioctl(void *cookie, u_long cmd, caddr_t data, int flag,
- struct proc *p)
-{
- struct zs_chanstate *cs = cookie;
-#ifdef WSDISPLAY_COMPAT_RAWKBD
- struct zskbd_softc *sc = cs->cs_private;
-#endif
-
- switch (cmd) {
- case WSKBDIO_GTYPE:
- *(int *)data = WSKBD_TYPE_SGI;
- break;
- case WSKBDIO_SETLEDS:
- zskbd_wskbd_set_leds(cs, *(int *)data);
- break;
- case WSKBDIO_GETLEDS:
- *(int *)data = zskbd_wskbd_get_leds(cs);
- break;
-#if 0
- case WSKBDIO_SETKEYCLICK:
- zskbd_wskbd_set_keyclick(cs, *(int *)data);
- break;
- case WSKBDIO_GETKEYCLICK:
- *(int *)data = zskbd_wskbd_get_keyclick(cs);
- break;
-#endif
-#ifdef WSDISPLAY_COMPAT_RAWKBD
- case WSKBDIO_SETMODE:
- sc->sc_rawkbd = *(int *)data == WSKBD_RAW;
- break;
-#endif
- default:
- return -1;
- }
-
- return 0;
-}
-
-/*
- * console routines
- */
-void
-zskbd_cnattach(int zsunit, int zschan)
-{
- struct zschan *zs;
- struct zskbd_devconfig *dc;
-
- zs = zs_get_chan_addr(zsunit, zschan);
- dc = &zskbd_consdc;
-
- /*
- * Try and figure out our dip switches early, in order to pick
- * the right keyboard layout.
- */
- dc->expected = 2;
- zs_putc(zs, ZSKBD_CTRL_A_RCB);
- zs_putc(zs, ZSKBD_CTRL_B); /* unnecessary? */
-
- while (dc->expected != 0) {
- zskbd_process(dc, zs_getc(zs));
- }
-
- if (dc->dip < nitems(zskbd_layouts) && zskbd_layouts[dc->dip] != -1)
- sgikbd_wskbd_keymapdata.layout = zskbd_layouts[dc->dip];
-
- wskbd_cnattach(&zskbd_wskbd_consops, zs, &sgikbd_wskbd_keymapdata);
- zskbd_is_console = 1;
-}
-
-void
-zskbd_wskbd_getc(void *cookie, u_int *type, int *data)
-{
- int key;
-
- key = zs_getc(cookie);
-
- if (key & ZSKBD_KEY_UP)
- *type = WSCONS_EVENT_KEY_UP;
- else
- *type = WSCONS_EVENT_KEY_DOWN;
-
- *data = key & ~ZSKBD_KEY_UP;
-}
-
-void
-zskbd_wskbd_pollc(void *cookie, int on)
-{
-}
-
-void
-zskbd_wskbd_bell(void *cookie, u_int pitch, u_int period, u_int volume)
-{
- /*
- * Since we don't have any state, this'll nuke our lights,
- * key click, and other bits in ZSKBD_CTRL_A.
- */
- if (period >= 1000)
- zs_putc(cookie, ZSKBD_CTRL_A_LBEEP);
- else
- zs_putc(cookie, ZSKBD_CTRL_A_SBEEP);
-}
+++ /dev/null
-/* $OpenBSD: z8530ms.c,v 1.2 2016/06/05 20:02:36 bru Exp $ */
-/* $NetBSD: zs_ms.c,v 1.7 2008/03/29 19:15:35 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2004 Steve Rumble
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * IP20 serial mouse driver attached to zs channel 1 at 4800bps.
- * This layer feeds wsmouse.
- *
- * 5 byte packets: sync, x1, y1, x2, y2
- * sync format: binary 10000LMR (left, middle, right) 0 is down
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/device.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsmousevar.h>
-
-#include <machine/autoconf.h>
-#include <mips64/archtype.h>
-
-#include <dev/ic/z8530reg.h>
-#include <machine/z8530var.h>
-
-#define ZSMS_BAUD 4800
-#define ZSMS_RXQ_LEN 64 /* power of 2 */
-
-/* protocol */
-#define ZSMS_SYNC 0x80
-#define ZSMS_SYNC_MASK 0xf8
-#define ZSMS_SYNC_BTN_R 0x01
-#define ZSMS_SYNC_BTN_M 0x02
-#define ZSMS_SYNC_BTN_L 0x04
-#define ZSMS_SYNC_BTN_MASK 0x07
-
-struct zsms_softc {
- struct device sc_dev;
-
- /* tail-chasing fifo */
- uint8_t rxq[ZSMS_RXQ_LEN];
- uint8_t rxq_head;
- uint8_t rxq_tail;
-
- /* 5-byte packet as described above */
-#define ZSMS_PACKET_SYNC 0
-#define ZSMS_PACKET_X1 1
-#define ZSMS_PACKET_Y1 2
-#define ZSMS_PACKET_X2 3
-#define ZSMS_PACKET_Y2 4
- int8_t packet[5];
-
-#define ZSMS_STATE_SYNC 0x01
-#define ZSMS_STATE_X1 0x02
-#define ZSMS_STATE_Y1 0x04
-#define ZSMS_STATE_X2 0x08
-#define ZSMS_STATE_Y2 0x10
- uint8_t state;
-
- /* wsmouse bits */
- int enabled;
- struct device *wsmousedev;
-};
-
-int zsms_match(struct device *, void *, void *);
-void zsms_attach(struct device *, struct device *, void *);
-
-struct cfdriver zsms_cd = {
- NULL, "zsms", DV_DULL
-};
-
-const struct cfattach zsms_ca = {
- sizeof(struct zsms_softc), zsms_match, zsms_attach
-};
-
-void zsms_rxint(struct zs_chanstate *);
-void zsms_txint(struct zs_chanstate *);
-void zsms_stint(struct zs_chanstate *, int);
-void zsms_softint(struct zs_chanstate *);
-
-void zsms_wsmouse_input(struct zsms_softc *);
-int zsms_wsmouse_enable(void *);
-void zsms_wsmouse_disable(void *);
-int zsms_wsmouse_ioctl(void *, u_long, caddr_t, int, struct proc *);
-
-static struct zsops zsms_zsops = {
- zsms_rxint,
- zsms_stint,
- zsms_txint,
- zsms_softint
-};
-
-static const struct wsmouse_accessops zsms_wsmouse_accessops = {
- zsms_wsmouse_enable,
- zsms_wsmouse_ioctl,
- zsms_wsmouse_disable
-};
-
-int
-zsms_match(struct device *parent, void *vcf, void *aux)
-{
- if (sys_config.system_type == SGI_IP20) {
- struct zsc_attach_args *args = aux;
-
- if (args->channel == 1)
- return (1);
- }
-
- return (0);
-}
-
-void
-zsms_attach(struct device *parent, struct device *self, void *aux)
-{
- struct zsc_softc *zsc = (struct zsc_softc *)parent;
- struct zsms_softc *sc = (struct zsms_softc *)self;
- struct zsc_attach_args *args = aux;
- struct zs_chanstate *cs;
- int s, channel;
- struct wsmousedev_attach_args wsmaa;
-
- /* Establish ourself with the MD z8530 driver */
- channel = args->channel;
- cs = zsc->zsc_cs[channel];
- cs->cs_ops = &zsms_zsops;
- cs->cs_private = sc;
-
- sc->enabled = 0;
- sc->rxq_head = 0;
- sc->rxq_tail = 0;
- sc->state = ZSMS_STATE_SYNC;
-
- printf("\n");
-
- s = splzs();
- zs_write_reg(cs, 9, (channel == 0) ? ZSWR9_A_RESET : ZSWR9_B_RESET);
- cs->cs_preg[1] = ZSWR1_RIE;
- zs_set_speed(cs, ZSMS_BAUD);
- zs_loadchannelregs(cs);
- splx(s);
-
- /* attach wsmouse */
- wsmaa.accessops = &zsms_wsmouse_accessops;
- wsmaa.accesscookie = sc;
- sc->wsmousedev = config_found(self, &wsmaa, wsmousedevprint);
-}
-
-void
-zsms_rxint(struct zs_chanstate *cs)
-{
- struct zsms_softc *sc = cs->cs_private;
- uint8_t c, r;
-
- /* clear errors */
- r = zs_read_reg(cs, 1);
- if (r & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE))
- zs_write_csr(cs, ZSWR0_RESET_ERRORS);
-
- /* read byte and append to our queue */
- c = zs_read_data(cs);
-
- sc->rxq[sc->rxq_tail] = c;
- sc->rxq_tail = (sc->rxq_tail + 1) & ~ZSMS_RXQ_LEN;
-
- cs->cs_softreq = 1;
-}
-
-/* We should never get here. */
-void
-zsms_txint(struct zs_chanstate *cs)
-{
- zs_write_reg(cs, 0, ZSWR0_RESET_TXINT);
-
- /* disable tx interrupts */
- CLR(cs->cs_preg[1], ZSWR1_TIE);
- zs_loadchannelregs(cs);
-}
-
-void
-zsms_stint(struct zs_chanstate *cs, int force)
-{
- zs_write_csr(cs, ZSWR0_RESET_STATUS);
- cs->cs_softreq = 1;
-}
-
-void
-zsms_softint(struct zs_chanstate *cs)
-{
- struct zsms_softc *sc = cs->cs_private;
-
- /* No need to keep score if nobody is listening */
- if (!sc->enabled) {
- sc->rxq_head = sc->rxq_tail;
- return;
- }
-
- /*
- * Here's the real action. Read a full packet and
- * then let wsmouse know what has happened.
- */
- while (sc->rxq_head != sc->rxq_tail) {
- int8_t c = sc->rxq[sc->rxq_head];
-
- switch (sc->state) {
- case ZSMS_STATE_SYNC:
- if ((c & ZSMS_SYNC_MASK) == ZSMS_SYNC) {
- sc->packet[ZSMS_PACKET_SYNC] = c;
- sc->state = ZSMS_STATE_X1;
- }
- break;
-
- case ZSMS_STATE_X1:
- sc->packet[ZSMS_PACKET_X1] = c;
- sc->state = ZSMS_STATE_Y1;
- break;
-
- case ZSMS_STATE_Y1:
- sc->packet[ZSMS_PACKET_Y1] = c;
- sc->state = ZSMS_STATE_X2;
- break;
-
- case ZSMS_STATE_X2:
- sc->packet[ZSMS_PACKET_X2] = c;
- sc->state = ZSMS_STATE_Y2;
- break;
-
- case ZSMS_STATE_Y2:
- sc->packet[ZSMS_PACKET_Y2] = c;
-
- /* tweak wsmouse */
- zsms_wsmouse_input(sc);
-
- sc->state = ZSMS_STATE_SYNC;
- }
-
- sc->rxq_head = (sc->rxq_head + 1) & ~ZSMS_RXQ_LEN;
- }
-}
-
-/******************************************************************************
- * wsmouse glue
- ******************************************************************************/
-
-void
-zsms_wsmouse_input(struct zsms_softc *sc)
-{
- u_int btns;
- int bl, bm, br;
- int x, y;
-
- if (sc->wsmousedev == NULL)
- return;
-
- btns = (uint8_t)sc->packet[ZSMS_PACKET_SYNC] & ZSMS_SYNC_BTN_MASK;
-
- bl = (btns & ZSMS_SYNC_BTN_L) == 0;
- bm = (btns & ZSMS_SYNC_BTN_M) == 0;
- br = (btns & ZSMS_SYNC_BTN_R) == 0;
-
- /* for wsmouse(4), 1 is down, 0 is up, the most left button is LSB */
- btns = 0;
- if (bl)
- btns |= 1 << 0;
- if (bm)
- btns |= 1 << 1;
- if (br)
- btns |= 1 << 2;
-
- x = (int)sc->packet[ZSMS_PACKET_X1] + (int)sc->packet[ZSMS_PACKET_X2];
- y = (int)sc->packet[ZSMS_PACKET_Y1] + (int)sc->packet[ZSMS_PACKET_Y2];
-
- WSMOUSE_INPUT(sc->wsmousedev, btns, x, y, 0, 0);
-}
-
-int
-zsms_wsmouse_enable(void *cookie)
-{
- struct zsms_softc *sc = cookie;
-
- if (sc->enabled)
- return (EBUSY);
-
- sc->state = ZSMS_STATE_SYNC;
- sc->enabled = 1;
-
- return (0);
-}
-
-void
-zsms_wsmouse_disable(void *cookie)
-{
- struct zsms_softc *sc = cookie;
-
- sc->enabled = 0;
-}
-
-int
-zsms_wsmouse_ioctl(void *cookie, u_long cmd, caddr_t data, int flag,
- struct proc *p)
-{
- switch (cmd) {
- case WSMOUSEIO_GTYPE:
- *(u_int *)data = WSMOUSE_TYPE_SGI;
- break;
- default:
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-/* $OpenBSD: zs.c,v 1.17 2021/03/11 11:17:00 jsg Exp $ */
-/* $NetBSD: zs.c,v 1.37 2011/02/20 07:59:50 matt Exp $ */
-
-/*-
- * Copyright (c) 1996, 2000 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Gordon W. Ross and Wayne Knowles
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Zilog Z8530 Dual UART driver (machine-dependent part)
- *
- * Runs two serial lines per chip using slave drivers.
- * Plain tty/async lines use the zstty slave.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/device.h>
-#include <sys/ioctl.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/tty.h>
-#include <sys/time.h>
-#include <sys/syslog.h>
-
-#include <mips64/archtype.h>
-#include <mips64/arcbios.h>
-
-#include <machine/autoconf.h>
-#include <machine/cpu.h>
-#include <machine/z8530var.h>
-
-#include <dev/cons.h>
-
-#include <dev/ic/z8530reg.h>
-
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/hpc/hpcreg.h>
-
-/*
- * Some warts needed by z8530tty.c -
- * The default parity REALLY needs to be the same as the PROM uses,
- * or you can not see messages done with printf during boot-up...
- */
-int zs_def_cflag = (CREAD | CS8 | HUPCL);
-int zs_major = 19;
-
-#define PCLK 3672000 /* PCLK pin input clock rate */
-
-#ifndef ZS_DEFSPEED
-#define ZS_DEFSPEED 9600
-#endif
-
-/*
- * Define interrupt levels.
- */
-#define ZSHARD_PRI 64
-
-/* SGI shouldn't need ZS_DELAY() as recovery time is done in hardware? */
-#define ZS_DELAY() delay(2)
-
-/* The layout of this is hardware-dependent (padding, order). */
-struct zschan {
- uint8_t pad1[3];
- volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
- uint8_t pad2[3];
- volatile uint8_t zc_data; /* data */
-};
-
-struct zsdevice {
- struct zschan zs_chan_b;
- struct zschan zs_chan_a;
-};
-
-/* Return the byte offset of element within a structure */
-#define OFFSET(struct_def, el) ((size_t)&((struct_def *)0)->el)
-
-#define ZS_CHAN_A OFFSET(struct zsdevice, zs_chan_a)
-#define ZS_CHAN_B OFFSET(struct zsdevice, zs_chan_b)
-#define ZS_REG_CSR 3
-#define ZS_REG_DATA 7
-static int zs_chan_offset[] = {ZS_CHAN_A, ZS_CHAN_B};
-
-cons_decl(zs);
-struct consdev zs_cn = {
- zscnprobe,
- zscninit,
- zscngetc,
- zscnputc,
- zscnpollc,
- NULL
-};
-
-
-/* Flags from cninit() */
-static int zs_consunit = -1;
-static int zs_conschan = -1;
-
-/* Default speed for all channels */
-static int zs_defspeed = ZS_DEFSPEED;
-
-static uint8_t zs_init_reg[17] = {
- 0, /* 0: CMD (reset, etc.) */
- 0, /* 1: No interrupts yet. */
- ZSHARD_PRI, /* 2: IVECT */
- ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
- ZSWR4_CLK_X16 | ZSWR4_ONESB,
- ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
- 0, /* 6: TXSYNC/SYNCLO */
- 0, /* 7: RXSYNC/SYNCHI */
- 0, /* 8: alias for data port */
- ZSWR9_MASTER_IE,
- 0, /*10: Misc. TX/RX control bits */
- ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD | ZSWR11_TRXC_OUT_ENA,
- BPS_TO_TCONST(PCLK/16, ZS_DEFSPEED), /*12: BAUDLO (default=9600) */
- 0, /*13: BAUDHI (default=9600) */
- ZSWR14_BAUD_ENA,
- ZSWR15_BREAK_IE,
- ZSWR7P_TX_FIFO /* 7': TX FIFO interrupt level */
-};
-
-
-/****************************************************************
- * Autoconfig
- ****************************************************************/
-
-/* Definition of the driver for autoconfig. */
-int zs_hpc_match(struct device *, void *, void *);
-void zs_hpc_attach(struct device *, struct device *, void *);
-int zs_print(void *, const char *name);
-
-struct cfdriver zs_cd = {
- NULL, "zs", DV_TTY
-};
-
-struct cfattach zs_hpc_ca = {
- sizeof(struct zsc_softc), zs_hpc_match, zs_hpc_attach
-};
-
-int zshard(void *);
-void zssoft(void *);
-struct zschan *zs_get_chan_addr(int, int);
-int zs_getc(void *);
-void zs_putc(void *, int);
-
-/*
- * Is the zs chip present?
- */
-int
-zs_hpc_match(struct device *parent, void *vcf, void *aux)
-{
- struct cfdata *cf = vcf;
- struct hpc_attach_args *ha = aux;
-
- if (strcmp(ha->ha_name, cf->cf_driver->cd_name) == 0)
- return (1);
-
- return (0);
-}
-
-/*
- * Attach a found zs.
- *
- * Match slave number to zs unit number, so that misconfiguration will
- * not set up the keyboard as ttya, etc.
- */
-void
-zs_hpc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct zsc_softc *zsc = (void *)self;
- struct cfdata *cf = self->dv_cfdata;
- struct hpc_attach_args *haa = aux;
- struct zsc_attach_args zsc_args;
- struct zs_chanstate *cs;
- struct zs_channel *ch;
- int zs_unit, channel, err, s;
- int has_fifo;
-
- zsc->zsc_bustag = haa->ha_st;
- if ((err = bus_space_subregion(haa->ha_st, haa->ha_sh,
- haa->ha_devoff, 0x10,
- &zsc->zsc_base)) != 0) {
- printf(": unable to map 85c30 registers, error = %d\n",
- err);
- return;
- }
-
- zs_unit = zsc->zsc_dev.dv_unit;
-
- /*
- * Initialize software state for each channel.
- *
- * Done in reverse order of channels since the first serial port
- * is actually attached to the *second* channel, and vice versa.
- * Doing it this way should force a 'zstty*' to attach zstty0 to
- * channel 1 and zstty1 to channel 0. They couldn't have wired
- * it up in a more sensible fashion, could they?
- */
- for (channel = 1; channel >= 0; channel--) {
- zsc_args.channel = channel;
- ch = &zsc->zsc_cs_store[channel];
- cs = zsc->zsc_cs[channel] = (struct zs_chanstate *)ch;
-
- /*
- * According to IRIX <sys/z8530.h>, on Indigo, the CTR, DCD,
- * DTR and RTS bits are inverted.
- *
- * That is, inverted when compared to the Indy and Indigo 2
- * designs. However, it turns out that the Indigo wiring is
- * the `natural' one, with these pins being inverted from
- * what one would naively expect, on the other designs.
- *
- * Choose wiring logic according to the hardware we run on,
- * and the device flags.
- */
- if (sys_config.system_type != SGI_IP20)
- ch->cs_flags |= ZSCFL_INVERT_WIRING;
- if (cf->cf_flags & ZSCFL_INVERT_WIRING)
- ch->cs_flags ^= ZSCFL_INVERT_WIRING;
-
- cs->cs_reg_csr = NULL;
- cs->cs_reg_data = NULL;
- cs->cs_channel = channel;
- cs->cs_private = NULL;
- cs->cs_ops = &zsops_null;
- cs->cs_brg_clk = PCLK / 16;
-
- if (bus_space_subregion(zsc->zsc_bustag, zsc->zsc_base,
- zs_chan_offset[channel],
- sizeof(struct zschan),
- &ch->cs_regs) != 0) {
- printf(": cannot map regs\n");
- return;
- }
- ch->cs_bustag = zsc->zsc_bustag;
-
- /*
- * Figure out whether this chip is a 8530 or a 85230.
- */
- if (channel == 1) {
- zs_write_reg(cs, 15, ZSWR15_ENABLE_ENHANCED);
- has_fifo = zs_read_reg(cs, 15) & ZSWR15_ENABLE_ENHANCED;
-
- if (has_fifo) {
- zs_write_reg(cs, 15, 0);
- printf(": 85230\n");
- } else
- printf(": 8530\n");
- }
-
- if (has_fifo)
- zs_init_reg[15] |= ZSWR15_ENABLE_ENHANCED;
- else
- zs_init_reg[15] &= ~ZSWR15_ENABLE_ENHANCED;
- memcpy(cs->cs_creg, zs_init_reg, 17);
- memcpy(cs->cs_preg, zs_init_reg, 17);
-
- /* If console, don't stomp speed, let zstty know */
- if (zs_unit == zs_consunit && channel == zs_conschan) {
- zsc_args.consdev = &zs_cn;
- zsc_args.hwflags = ZS_HWFLAG_CONSOLE;
- cs->cs_defspeed = bios_consrate;
- } else {
- zsc_args.consdev = NULL;
- zsc_args.hwflags = 0;
- cs->cs_defspeed = zs_defspeed;
- }
-
- cs->cs_defcflag = zs_def_cflag;
-
- /* Make these correspond to cs_defcflag (-crtscts) */
- cs->cs_rr0_dcd = ZSRR0_DCD;
- cs->cs_rr0_cts = 0;
- cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
- cs->cs_wr5_rts = 0;
-
- /*
- * Clear the master interrupt enable.
- * The INTENA is common to both channels,
- * so just do it on the A channel.
- */
- if (channel == 0) {
- zs_write_reg(cs, 9, 0);
- }
- /*
- * Look for a child driver for this channel.
- * The child attach will setup the hardware.
- */
- if (!config_found(self, (void *)&zsc_args, zs_print)) {
- /* No sub-driver. Just reset it. */
- uint8_t reset = (channel == 0) ?
- ZSWR9_A_RESET : ZSWR9_B_RESET;
-
- s = splhigh();
- zs_write_reg(cs, 9, reset);
- splx(s);
- }
- }
-
-
- zsc->sc_si = softintr_establish(IPL_SOFTTTY, zssoft, zsc);
- hpc_intr_establish(haa->ha_irq, IPL_TTY, zshard, zsc, self->dv_xname);
-
- /*
- * Set the master interrupt enable and interrupt vector.
- * (common to both channels, do it on A)
- */
- cs = zsc->zsc_cs[0];
- s = splhigh();
- /* interrupt vector */
- zs_write_reg(cs, 2, zs_init_reg[2]);
- /* master interrupt control (enable) */
- zs_write_reg(cs, 9, zs_init_reg[9]);
- splx(s);
-}
-
-int
-zs_print(void *aux, const char *name)
-{
- struct zsc_attach_args *args = aux;
-
- if (name != NULL)
- printf("%s:", name);
-
- if (args->channel != -1)
- printf(" channel %d", args->channel);
-
- return UNCONF;
-}
-
-/*
- * Our ZS chips all share a common, autovectored interrupt,
- * so we have to look at all of them on each interrupt.
- */
-int
-zshard(void *arg)
-{
- struct zsc_softc *zsc = arg;
- int rval;
-
- rval = zsc_intr_hard(zsc);
- if (rval != 0) {
- if (zsc->zsc_cs[0]->cs_softreq ||
- zsc->zsc_cs[1]->cs_softreq)
- softintr_schedule(zsc->sc_si);
- }
-
- return rval;
-}
-
-/*
- * Similar scheme as for zshard (look at all of them)
- */
-void
-zssoft(void *arg)
-{
- struct zsc_softc *zsc = arg;
- int s;
-
- /* Make sure we call the tty layer at spltty. */
- s = spltty();
- (void)zsc_intr_soft(zsc);
- splx(s);
-}
-
-
-/*
- * MD functions for setting the baud rate and control modes.
- */
-int
-zs_set_speed(struct zs_chanstate *cs, int bps)
-{
- int tconst, real_bps;
-
- if (bps == 0)
- return (0);
-
-#ifdef DIAGNOSTIC
- if (cs->cs_brg_clk == 0)
- panic("zs_set_speed");
-#endif
-
- tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
- if (tconst < 0)
- return (EINVAL);
-
- /* Convert back to make sure we can do it. */
- real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
-
-#if 0 /* PCLK is too small, 9600bps really yields 9562 */
- /* XXX - Allow some tolerance here? */
- if (real_bps != bps)
- return (EINVAL);
-#endif
-
- cs->cs_preg[12] = tconst;
- cs->cs_preg[13] = tconst >> 8;
-
- /* Caller will stuff the pending registers. */
- return (0);
-}
-
-int
-zs_set_modes(struct zs_chanstate *cs, int cflag)
-{
- int s;
-
- /*
- * Output hardware flow control on the chip is horrendous:
- * if carrier detect drops, the receiver is disabled, and if
- * CTS drops, the transmitter is stopped IN MID CHARACTER!
- * Therefore, NEVER set the HFC bit, and instead use the
- * status interrupt to detect CTS changes.
- */
- s = splzs();
- cs->cs_rr0_pps = 0;
- if ((cflag & (CLOCAL | MDMBUF)) != 0) {
- cs->cs_rr0_dcd = 0;
- if ((cflag & MDMBUF) == 0)
- cs->cs_rr0_pps = ZSRR0_DCD;
- } else
- cs->cs_rr0_dcd = ZSRR0_DCD;
- if ((cflag & CRTSCTS) != 0) {
- cs->cs_wr5_dtr = ZSWR5_DTR;
- cs->cs_wr5_rts = ZSWR5_RTS;
- cs->cs_rr0_cts = ZSRR0_CTS;
- } else if ((cflag & MDMBUF) != 0) {
- cs->cs_wr5_dtr = 0;
- cs->cs_wr5_rts = ZSWR5_DTR;
- cs->cs_rr0_cts = ZSRR0_DCD;
- } else {
- cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
- cs->cs_wr5_rts = 0;
- cs->cs_rr0_cts = 0;
- }
- splx(s);
-
- /* Caller will stuff the pending registers. */
- return (0);
-}
-
-
-/*
- * Read or write the chip with suitable delays.
- */
-
-uint8_t
-zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
-{
- uint8_t val;
- struct zs_channel *zsc = (struct zs_channel *)cs;
-
- bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, reg);
- bus_space_barrier(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, 1,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
- ZS_DELAY();
- val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR);
- ZS_DELAY();
-
- if ((zsc->cs_flags & ZSCFL_INVERT_WIRING) && reg == 0)
- val ^= ZSRR0_CTS | ZSRR0_DCD;
-
- return val;
-}
-
-void
-zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
-{
- struct zs_channel *zsc = (struct zs_channel *)cs;
-
- if ((zsc->cs_flags & ZSCFL_INVERT_WIRING) && reg == 5)
- val ^= ZSWR5_DTR | ZSWR5_RTS;
-
- bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, reg);
- bus_space_barrier(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, 1,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
- ZS_DELAY();
- bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, val);
- bus_space_barrier(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, 1,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
- ZS_DELAY();
-}
-
-uint8_t
-zs_read_csr(struct zs_chanstate *cs)
-{
- struct zs_channel *zsc = (struct zs_channel *)cs;
- uint8_t val;
-
- val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR);
- ZS_DELAY();
-
- if (zsc->cs_flags & ZSCFL_INVERT_WIRING)
- val ^= ZSRR0_CTS | ZSRR0_DCD;
-
- return val;
-}
-
-void
-zs_write_csr(struct zs_chanstate *cs, uint8_t val)
-{
- struct zs_channel *zsc = (struct zs_channel *)cs;
-
- bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, val);
- bus_space_barrier(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, 1,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
- ZS_DELAY();
-}
-
-uint8_t
-zs_read_data(struct zs_chanstate *cs)
-{
- struct zs_channel *zsc = (struct zs_channel *)cs;
- uint8_t val;
-
- val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_DATA);
- ZS_DELAY();
- return val;
-}
-
-void
-zs_write_data(struct zs_chanstate *cs, uint8_t val)
-{
- struct zs_channel *zsc = (struct zs_channel *)cs;
-
- bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_DATA, val);
- bus_space_barrier(zsc->cs_bustag, zsc->cs_regs, ZS_REG_DATA, 1,
- BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
- ZS_DELAY();
-}
-
-void
-zs_abort(struct zs_chanstate *cs)
-{
-#if defined(DDB)
- db_enter();
-#endif
-}
-
-
-/*****************************************************/
-/* Polled character I/O functions for console KGDB */
-/*****************************************************/
-
-struct zschan *
-zs_get_chan_addr(int zs_unit, int channel)
-{
-#if 0
- static int dumped_addr = 0;
-#endif
- struct zsdevice *addr = NULL;
- struct zschan *zc;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- switch (zs_unit) {
- case 0:
- addr = (struct zsdevice *)
- PHYS_TO_XKPHYS(0x1fb80d00, CCA_NC);
- break;
- case 1:
- addr = (struct zsdevice *)
- PHYS_TO_XKPHYS(0x1fb80d10, CCA_NC);
- break;
- }
- break;
-
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- if (zs_unit == 0)
- addr = (struct zsdevice *)
- PHYS_TO_XKPHYS(0x1fbd9830, CCA_NC);
- break;
- }
- if (addr == NULL)
- panic("zs_get_chan_addr: bad zs_unit %d\n", zs_unit);
-
- /*
- * We need to swap serial ports to match reality on
- * non-keyboard channels.
- */
- if (sys_config.system_type != SGI_IP20) {
- if (channel == 0)
- zc = &addr->zs_chan_b;
- else
- zc = &addr->zs_chan_a;
- } else {
- if (zs_unit == 0) {
- if (channel == 0)
- zc = &addr->zs_chan_a;
- else
- zc = &addr->zs_chan_b;
- } else {
- if (channel == 0)
- zc = &addr->zs_chan_b;
- else
- zc = &addr->zs_chan_a;
- }
- }
-
-#if 0
- if (dumped_addr == 0) {
- dumped_addr++;
- printf("zs unit %d, channel %d had address %p\n",
- zs_unit, channel, zc);
- }
-#endif
-
- return (zc);
-}
-
-int
-zs_getc(void *arg)
-{
- register volatile struct zschan *zc = arg;
- register int s, c, rr0;
-
- s = splzs();
- /* Wait for a character to arrive. */
- do {
- rr0 = zc->zc_csr;
- ZS_DELAY();
- } while ((rr0 & ZSRR0_RX_READY) == 0);
-
- c = zc->zc_data;
- ZS_DELAY();
- splx(s);
-
- return (c);
-}
-
-/*
- * Polled output char.
- */
-void
-zs_putc(void *arg, int c)
-{
- register volatile struct zschan *zc = arg;
- register int s, rr0;
-
- s = splzs();
- /* Wait for transmitter to become ready. */
- do {
- rr0 = zc->zc_csr;
- ZS_DELAY();
- } while ((rr0 & ZSRR0_TX_READY) == 0);
-
- zc->zc_data = c;
-
- /* inline bus_space_barrier() */
- mips_sync();
- if (sys_config.system_type != SGI_IP20) {
- (void)*(volatile uint32_t *)PHYS_TO_XKPHYS(HPC_BASE_ADDRESS_0 +
- HPC3_INTRSTAT_40, CCA_NC);
- }
-
- ZS_DELAY();
- splx(s);
-}
-
-/***************************************************************/
-
-static int cons_port;
-
-void
-zscnprobe(struct consdev *cp)
-{
- cp->cn_dev = makedev(zs_major, 0);
- cp->cn_pri = CN_DEAD;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- if (strlen(bios_console) == 9 &&
- strncmp(bios_console, "serial", 6) == 0)
- cp->cn_pri = CN_FORCED;
- else
- cp->cn_pri = CN_MIDPRI;
- break;
- }
-}
-
-void
-zscninit(struct consdev *cn)
-{
- if (strlen(bios_console) == 9 &&
- strncmp(bios_console, "serial", 6) != 0)
- cons_port = bios_console[7] - '0';
-
- /* Mark this unit as the console */
- zs_consunit = 0;
-
- /* SGI hardware wires serial port 1 to channel B, port 2 to A */
- if (cons_port == 0)
- zs_conschan = 1;
- else
- zs_conschan = 0;
-}
-
-int
-zscngetc(dev_t dev)
-{
- struct zschan *zs;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- zs = zs_get_chan_addr(1, cons_port);
- break;
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- default:
- zs = zs_get_chan_addr(0, cons_port);
- break;
- }
-
- return zs_getc(zs);
-}
-
-void
-zscnputc(dev_t dev, int c)
-{
- struct zschan *zs;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- zs = zs_get_chan_addr(1, cons_port);
- break;
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- default:
- zs = zs_get_chan_addr(0, cons_port);
- break;
- }
-
- zs_putc(zs, c);
-}
-
-void
-zscnpollc(dev_t dev, int on)
-{
-}
+++ /dev/null
-/* $OpenBSD: _float.h,v 1.1 2012/06/26 16:12:44 deraadt Exp $ */
-
-#include <mips64/_float.h>
+++ /dev/null
-/* $OpenBSD: _types.h,v 1.3 2007/05/15 15:23:36 art Exp $ */
-
-/* public domain */
-#include <mips64/_types.h>
-
+++ /dev/null
-/* $OpenBSD: asm.h,v 1.6 2015/12/25 05:52:29 visa Exp $ */
-#ifndef _SGI_ASM_H_
-#define _SGI_ASM_H_
-
-#include <mips64/asm.h>
-#ifdef TGT_OCTANE
-#include <sgi/sgi/ip30.h>
-#endif
-
-#ifdef MULTIPROCESSOR
-
-#if defined(TGT_OCTANE)
-
-#include <sgi/xbow/xheartreg.h>
-
-/* Returns the physical cpu identifier */
-#define HW_GET_CPU_PRID(prid, tmp) \
- LOAD_XKPHYS(tmp, CCA_NC); \
- PTR_L prid, (HEART_PIU_BASE + HEART_PRID)(tmp) \
-
-/* Return the cpu_info pointer - see locore.S for the logic behind this */
-#define HW_GET_CPU_INFO(ci, tmp) \
- HW_GET_CPU_PRID(ci, tmp); \
- LOAD_XKPHYS(tmp, CCA_COHERENT_EXCLWRITE); \
- PTR_SLL ci, MPCONF_SHIFT; \
- PTR_ADD ci, MPCONF_BASE; \
- or tmp, ci; \
- PTR_L ci, (MPCONF_LEN - REGSZ)(tmp)
-
-#elif defined(TGT_ORIGIN)
-
-#define HW_GET_CPU_INFO(ci, tmp) \
- DMFC0 ci, COP_0_ERROR_PC
-
-#endif /* TGT_ORIGIN */
-
-#endif /* MULTIPROCESSOR */
-
-#endif /* _SGI_ASM_H_ */
+++ /dev/null
-/* $OpenBSD: atomic.h,v 1.3 2011/03/23 16:54:36 pirofti Exp $ */
-
-/* Public Domain */
-
-#ifndef _MACHINE_ATOMIC_H_
-#define _MACHINE_ATOMIC_H_
-
-#include <mips64/atomic.h>
-
-#endif /* _MACHINE_ATOMIC_H_ */
+++ /dev/null
-/* $OpenBSD: autoconf.h,v 1.39 2015/12/25 08:34:50 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * Definitions used by autoconfiguration.
- */
-
-#ifndef _MACHINE_AUTOCONF_H_
-#define _MACHINE_AUTOCONF_H_
-
-#include <machine/bus.h>
-
-/*
- * Structure holding all misc config information.
- */
-struct cpu_info;
-
-struct sys_rec {
- int system_type;
- int system_subtype; /* IP35 only */
-
- /* Serial console configuration. */
- struct mips_bus_space console_io;
-};
-
-extern struct sys_rec sys_config;
-
-/*
- * Attachment information for mainbus child devices.
- */
-struct mainbus_attach_args {
- const char *maa_name;
- int16_t maa_nasid;
- int16_t maa_physid;
-};
-
-/*
- * Device physical location information. Used to match console and boot
- * devices on IP27 and IP30 kernels.
- */
-struct sgi_device_location {
- int16_t nasid; /* node identifier */
- uint widget; /* widget number */
-
- int bus; /* bus number if connected to PIC */
- int device; /* device number if PCI */
- int fn; /* function number if PCI */
-
- uint32_t specific; /* port on dual-scsibus controllers,
- device id on serial controllers */
-};
-
-#include <mips64/autoconf.h>
-
-void enaddr_aton(const char *, u_int8_t *);
-u_long bios_getenvint(const char *);
-
-struct device;
-
-void arcs_device_register(struct device *, void *);
-void dksc_device_register(struct device *, void *);
-extern void (*_device_register)(struct device *, void *);
-
-void ip22_setup(void);
-void ip22_post_autoconf(void);
-void ip27_setup(void);
-void ip27_autoconf(struct device *);
-void ip30_setup(void);
-void ip30_autoconf(struct device *);
-void ip32_setup(void);
-
-extern char osloadpartition[256];
-extern char osloadoptions[129];
-extern int16_t masternasid;
-extern int16_t currentnasid;
-
-extern struct sgi_device_location console_output, console_input;
-
-int location_match(struct sgi_device_location *,
- struct sgi_device_location *);
-
-extern void (*md_halt)(int);
-void arcbios_halt(int);
-
-#endif /* _MACHINE_AUTOCONF_H_ */
+++ /dev/null
-/* $OpenBSD: bus.h,v 1.29 2020/04/14 17:35:28 kettenis Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_BUS_H_
-#define _MACHINE_BUS_H_
-
-#ifdef __STDC__
-#define CAT(a,b) a##b
-#define CAT3(a,b,c) a##b##c
-#else
-#define CAT(a,b) a/**/b
-#define CAT3(a,b,c) a/**/b/**/c
-#endif
-
-/*
- * Bus access types.
- */
-struct mips_bus_space;
-typedef u_long bus_addr_t;
-typedef u_long bus_size_t;
-typedef u_long bus_space_handle_t;
-typedef struct mips_bus_space *bus_space_tag_t;
-typedef struct mips_bus_space bus_space_t;
-
-struct mips_bus_space {
- bus_addr_t bus_base;
- void *bus_private;
- u_int8_t (*_space_read_1)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t);
- void (*_space_write_1)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t, u_int8_t);
- u_int16_t (*_space_read_2)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t);
- void (*_space_write_2)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t, u_int16_t);
- u_int32_t (*_space_read_4)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t);
- void (*_space_write_4)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t, u_int32_t);
- u_int64_t (*_space_read_8)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t);
- void (*_space_write_8)(bus_space_tag_t , bus_space_handle_t,
- bus_size_t, u_int64_t);
- void (*_space_read_raw_2)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, u_int8_t *, bus_size_t);
- void (*_space_write_raw_2)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, const u_int8_t *, bus_size_t);
- void (*_space_read_raw_4)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, u_int8_t *, bus_size_t);
- void (*_space_write_raw_4)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, const u_int8_t *, bus_size_t);
- void (*_space_read_raw_8)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, u_int8_t *, bus_size_t);
- void (*_space_write_raw_8)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, const u_int8_t *, bus_size_t);
- int (*_space_map)(bus_space_tag_t , bus_addr_t,
- bus_size_t, int, bus_space_handle_t *);
- void (*_space_unmap)(bus_space_tag_t, bus_space_handle_t,
- bus_size_t);
- int (*_space_subregion)(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_size_t, bus_space_handle_t *);
- void * (*_space_vaddr)(bus_space_tag_t, bus_space_handle_t);
- void (*_space_barrier)(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_size_t, int);
-};
-
-#define bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o))
-#define bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o))
-#define bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o))
-#define bus_space_read_8(t, h, o) (*(t)->_space_read_8)((t), (h), (o))
-
-#define bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v))
-#define bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v))
-#define bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v))
-#define bus_space_write_8(t, h, o, v) (*(t)->_space_write_8)((t), (h), (o), (v))
-
-#define bus_space_read_raw_multi_2(t, h, a, b, l) \
- (*(t)->_space_read_raw_2)((t), (h), (a), (b), (l))
-#define bus_space_read_raw_multi_4(t, h, a, b, l) \
- (*(t)->_space_read_raw_4)((t), (h), (a), (b), (l))
-#define bus_space_read_raw_multi_8(t, h, a, b, l) \
- (*(t)->_space_read_raw_8)((t), (h), (a), (b), (l))
-
-#define bus_space_write_raw_multi_2(t, h, a, b, l) \
- (*(t)->_space_write_raw_2)((t), (h), (a), (b), (l))
-#define bus_space_write_raw_multi_4(t, h, a, b, l) \
- (*(t)->_space_write_raw_4)((t), (h), (a), (b), (l))
-#define bus_space_write_raw_multi_8(t, h, a, b, l) \
- (*(t)->_space_write_raw_8)((t), (h), (a), (b), (l))
-
-#define bus_space_map(t, o, s, c, p) (*(t)->_space_map)((t), (o), (s), (c), (p))
-#define bus_space_unmap(t, h, s) (*(t)->_space_unmap)((t), (h), (s))
-#define bus_space_subregion(t, h, o, s, p) \
- (*(t)->_space_subregion)((t), (h), (o), (s), (p))
-
-#define BUS_SPACE_MAP_CACHEABLE 0x01
-#define BUS_SPACE_MAP_LINEAR 0x02
-#define BUS_SPACE_MAP_PREFETCHABLE 0x04
-
-#define bus_space_vaddr(t, h) (*(t)->_space_vaddr)((t), (h))
-
-/*----------------------------------------------------------------------------*/
-#define bus_space_read_multi(n,m) \
-static __inline void \
-CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
- bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt) \
-{ \
- while (cnt--) \
- *x++ = CAT(bus_space_read_,n)(bst, bsh, o); \
-}
-
-bus_space_read_multi(1,8)
-bus_space_read_multi(2,16)
-bus_space_read_multi(4,32)
-bus_space_read_multi(8,64)
-
-/*----------------------------------------------------------------------------*/
-#define bus_space_read_region(n,m) \
-static __inline void \
-CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
- bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt) \
-{ \
- while (cnt--) { \
- *x++ = CAT(bus_space_read_,n)(bst, bsh, ba); \
- ba += (n); \
- } \
-}
-
-bus_space_read_region(1,8)
-bus_space_read_region(2,16)
-bus_space_read_region(4,32)
-bus_space_read_region(8,64)
-
-/*----------------------------------------------------------------------------*/
-#define bus_space_read_raw_region(n,m) \
-static __inline void \
-CAT(bus_space_read_raw_region_,n)(bus_space_tag_t bst, \
- bus_space_handle_t bsh, \
- bus_addr_t ba, u_int8_t *x, size_t cnt) \
-{ \
- cnt >>= ((n) >> 1); \
- while (cnt--) { \
- CAT(bus_space_read_raw_multi_,n)(bst, bsh, ba, x, (n)); \
- ba += (n); \
- x += (n); \
- } \
-}
-
-bus_space_read_raw_region(2,16)
-bus_space_read_raw_region(4,32)
-bus_space_read_raw_region(8,64)
-
-/*----------------------------------------------------------------------------*/
-#define bus_space_write_multi(n,m) \
-static __inline void \
-CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
- bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt) \
-{ \
- while (cnt--) \
- CAT(bus_space_write_,n)(bst, bsh, o, *x++); \
-}
-
-bus_space_write_multi(1,8)
-bus_space_write_multi(2,16)
-bus_space_write_multi(4,32)
-bus_space_write_multi(8,64)
-
-/*----------------------------------------------------------------------------*/
-#define bus_space_write_region(n,m) \
-static __inline void \
-CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
- bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt) \
-{ \
- while (cnt--) { \
- CAT(bus_space_write_,n)(bst, bsh, ba, *x++); \
- ba += (n); \
- } \
-}
-
-bus_space_write_region(1,8)
-bus_space_write_region(2,16)
-bus_space_write_region(4,32)
-bus_space_write_region(8,64)
-
-/*----------------------------------------------------------------------------*/
-#define bus_space_write_raw_region(n,m) \
-static __inline void \
-CAT(bus_space_write_raw_region_,n)(bus_space_tag_t bst, \
- bus_space_handle_t bsh, \
- bus_addr_t ba, const u_int8_t *x, size_t cnt) \
-{ \
- cnt >>= ((n) >> 1); \
- while (cnt--) { \
- CAT(bus_space_write_raw_multi_,n)(bst, bsh, ba, x, (n)); \
- ba += (n); \
- x += (n); \
- } \
-}
-
-bus_space_write_raw_region(2,16)
-bus_space_write_raw_region(4,32)
-bus_space_write_raw_region(8,64)
-
-/*----------------------------------------------------------------------------*/
-#define bus_space_set_region(n,m) \
-static __inline void \
-CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
- bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt) \
-{ \
- while (cnt--) { \
- CAT(bus_space_write_,n)(bst, bsh, ba, x); \
- ba += (n); \
- } \
-}
-
-bus_space_set_region(1,8)
-bus_space_set_region(2,16)
-bus_space_set_region(4,32)
-bus_space_set_region(8,64)
-
-/*----------------------------------------------------------------------------*/
-static __inline void
-bus_space_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1,
- bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
-{
- char *s = (char *)(h1 + o1);
- char *d = (char *)(h2 + o2);
-
- while (c--)
- *d++ = *s++;
-}
-
-
-static __inline void
-bus_space_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1,
- bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
-{
- short *s = (short *)(h1 + o1);
- short *d = (short *)(h2 + o2);
-
- while (c--)
- *d++ = *s++;
-}
-
-static __inline void
-bus_space_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1,
- bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
-{
- int *s = (int *)(h1 + o1);
- int *d = (int *)(h2 + o2);
-
- while (c--)
- *d++ = *s++;
-}
-
-static __inline void
-bus_space_copy_8(void *v, bus_space_handle_t h1, bus_size_t o1,
- bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
-{
- int64_t *s = (int64_t *)(h1 + o1);
- int64_t *d = (int64_t *)(h2 + o2);
-
- while (c--)
- *d++ = *s++;
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Bus read/write barrier methods.
- *
- * void bus_space_barrier(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset,
- * bus_size_t len, int flags);
- *
- */
-static __inline void
-bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offs,
- bus_size_t len, int flags)
-{
- (*(t)->_space_barrier)(t, h, offs, len, flags);
-}
-
-#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
-#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
-
-#define BUS_DMA_WAITOK 0x0000
-#define BUS_DMA_NOWAIT 0x0001
-#define BUS_DMA_ALLOCNOW 0x0002
-#define BUS_DMA_COHERENT 0x0008
-#define BUS_DMA_BUS1 0x0010 /* placeholders for bus functions... */
-#define BUS_DMA_BUS2 0x0020
-#define BUS_DMA_BUS3 0x0040
-#define BUS_DMA_BUS4 0x0080
-#define BUS_DMA_READ 0x0100 /* mapping is device -> memory only */
-#define BUS_DMA_WRITE 0x0200 /* mapping is memory -> device only */
-#define BUS_DMA_STREAMING 0x0400 /* hint: sequential, unidirectional */
-#define BUS_DMA_ZERO 0x0800 /* zero memory in dmamem_alloc */
-#define BUS_DMA_NOCACHE 0x1000
-#define BUS_DMA_64BIT 0x2000 /* device handles 64bit dva */
-
-/* Forwards needed by prototypes below. */
-struct mbuf;
-struct proc;
-struct uio;
-
-#define BUS_DMASYNC_POSTREAD 0x0001
-#define BUS_DMASYNC_POSTWRITE 0x0002
-#define BUS_DMASYNC_PREREAD 0x0004
-#define BUS_DMASYNC_PREWRITE 0x0008
-
-typedef struct machine_bus_dma_tag *bus_dma_tag_t;
-typedef struct machine_bus_dmamap *bus_dmamap_t;
-
-/*
- * bus_dma_segment_t
- *
- * Describes a single contiguous DMA transaction. Values
- * are suitable for programming into DMA registers.
- */
-struct machine_bus_dma_segment {
- bus_addr_t ds_addr; /* DMA address */
- bus_size_t ds_len; /* length of transfer */
-
- paddr_t _ds_paddr; /* CPU address */
- vaddr_t _ds_vaddr; /* CPU address - only valid after
- calling bus_dmamap_load*() */
-};
-typedef struct machine_bus_dma_segment bus_dma_segment_t;
-
-/*
- * bus_dma_tag_t
- *
- * A machine-dependent opaque type describing the implementation of
- * DMA for a given bus.
- */
-
-struct machine_bus_dma_tag {
- void *_cookie; /* cookie used in the guts */
-
- /*
- * DMA mapping methods.
- */
- int (*_dmamap_create)(bus_dma_tag_t , bus_size_t, int,
- bus_size_t, bus_size_t, int, bus_dmamap_t *);
- void (*_dmamap_destroy)(bus_dma_tag_t , bus_dmamap_t);
- int (*_dmamap_load)(bus_dma_tag_t , bus_dmamap_t, void *,
- bus_size_t, struct proc *, int);
- int (*_dmamap_load_mbuf)(bus_dma_tag_t , bus_dmamap_t,
- struct mbuf *, int);
- int (*_dmamap_load_uio)(bus_dma_tag_t , bus_dmamap_t,
- struct uio *, int);
- int (*_dmamap_load_raw)(bus_dma_tag_t , bus_dmamap_t,
- bus_dma_segment_t *, int, bus_size_t, int);
- int (*_dmamap_load_buffer)(bus_dma_tag_t, bus_dmamap_t, void *,
- bus_size_t, struct proc *, int, paddr_t *, int *, int);
- void (*_dmamap_unload)(bus_dma_tag_t , bus_dmamap_t);
- void (*_dmamap_sync)(bus_dma_tag_t , bus_dmamap_t,
- bus_addr_t, bus_size_t, int);
-
- /*
- * DMA memory utility functions.
- */
- int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
- bus_size_t, bus_dma_segment_t *, int, int *, int);
- void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
- int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
- int, size_t, caddr_t *, int);
- void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
- paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
- int, off_t, int, int);
-
- /*
- * internal memory address translation information.
- */
- bus_addr_t (*_pa_to_device)(paddr_t, int);
- bus_addr_t _dma_mask;
-};
-
-#define bus_dmamap_create(t, s, n, m, b, f, p) \
- (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
-#define bus_dmamap_destroy(t, p) \
- (*(t)->_dmamap_destroy)((t), (p))
-#define bus_dmamap_load(t, m, b, s, p, f) \
- (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
-#define bus_dmamap_load_mbuf(t, m, b, f) \
- (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
-#define bus_dmamap_load_uio(t, m, u, f) \
- (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
-#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
- (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
-#define bus_dmamap_unload(t, p) \
- (*(t)->_dmamap_unload)((t), (p))
-#define bus_dmamap_sync(t, p, a, l, o) \
- (void)((t)->_dmamap_sync ? \
- (*(t)->_dmamap_sync)((t), (p), (a), (l), (o)) : (void)0)
-
-#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
- (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
-#define bus_dmamem_free(t, sg, n) \
- (*(t)->_dmamem_free)((t), (sg), (n))
-#define bus_dmamem_map(t, sg, n, s, k, f) \
- (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
-#define bus_dmamem_unmap(t, k, s) \
- (*(t)->_dmamem_unmap)((t), (k), (s))
-#define bus_dmamem_mmap(t, sg, n, o, p, f) \
- (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
-
-int _dmamap_create(bus_dma_tag_t, bus_size_t, int,
- bus_size_t, bus_size_t, int, bus_dmamap_t *);
-void _dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
-int _dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
- bus_size_t, struct proc *, int);
-int _dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
-int _dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
-int _dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
- bus_dma_segment_t *, int, bus_size_t, int);
-int _dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
- bus_size_t, struct proc *, int, paddr_t *, int *, int);
-void _dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
-void _dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
- bus_size_t, int);
-
-int _dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
- bus_size_t, bus_dma_segment_t *, int, int *, int);
-void _dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
-int _dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
- int, size_t, caddr_t *, int);
-void _dmamem_unmap(bus_dma_tag_t, caddr_t, size_t);
-paddr_t _dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, int);
-int _dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
- bus_dma_segment_t *, int, int *, int, paddr_t, paddr_t);
-
-/*
- * bus_dmamap_t
- *
- * Describes a DMA mapping.
- */
-struct machine_bus_dmamap {
- /*
- * PRIVATE MEMBERS: not for use by machine-independent code.
- */
- bus_size_t _dm_size; /* largest DMA transfer mappable */
- int _dm_segcnt; /* number of segs this map can map */
- bus_size_t _dm_maxsegsz; /* largest possible segment */
- bus_size_t _dm_boundary; /* don't cross this */
- int _dm_flags; /* misc. flags */
-
- void *_dm_cookie; /* cookie for bus-specific functions */
-
- /*
- * PUBLIC MEMBERS: these are used by machine-independent code.
- */
- bus_size_t dm_mapsize; /* size of the mapping */
- int dm_nsegs; /* # valid segments in mapping */
- bus_dma_segment_t dm_segs[1]; /* segments; variable length */
-};
-
-#endif /* _MACHINE_BUS_H_ */
+++ /dev/null
-/* $OpenBSD: cdefs.h,v 1.3 2013/03/28 17:30:45 martynas Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/cdefs.h>
+++ /dev/null
-/* $OpenBSD: conf.h,v 1.1 2009/08/09 21:07:22 miod Exp $ */
-/* public domain */
-#include <sys/conf.h>
+++ /dev/null
-/* $OpenBSD: cpu.h,v 1.16 2017/07/30 16:05:24 visa Exp $ */
-/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell and Rick Macklem.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Copyright (C) 1989 Digital Equipment Corporation.
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby granted,
- * provided that the above copyright notice appears in all copies.
- * Digital Equipment Corporation makes no representations about the
- * suitability of this software for any purpose. It is provided "as is"
- * without express or implied warranty.
- *
- * from: @(#)cpu.h 8.4 (Berkeley) 1/4/94
- */
-
-#ifndef _MACHINE_CPU_H_
-#define _MACHINE_CPU_H_
-
-#ifdef _KERNEL
-#if defined(MULTIPROCESSOR) && !defined(_LOCORE)
-#define MAXCPUS 4
-struct cpu_info;
-struct cpu_info *hw_getcurcpu(void);
-void hw_setcurcpu(struct cpu_info *);
-void hw_cpu_boot_secondary(struct cpu_info *);
-void hw_cpu_hatch(struct cpu_info *);
-void hw_cpu_spinup_trampoline(struct cpu_info *);
-int hw_ipi_intr_establish(int (*)(void *), u_long);
-void hw_ipi_intr_set(u_long);
-void hw_ipi_intr_clear(u_long);
-#endif /* MULTIPROCESSOR && !_LOCORE */
-
-
-#endif/* _KERNEL */
-
-#include <mips64/cpu.h>
-
-#endif /* !_MACHINE_CPU_H_ */
+++ /dev/null
-/* $OpenBSD: cpustate.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
-
-#include <mips64/cpustate.h>
+++ /dev/null
-/* $OpenBSD: db_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/db_machdep.h>
+++ /dev/null
-/* $OpenBSD: disklabel.h,v 1.7 2015/09/30 14:57:03 krw Exp $ */
-
-/*
- * Copyright (c) 1994 Christopher G. Demetriou
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Christopher G. Demetriou.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_DISKLABEL_H_
-#define _MACHINE_DISKLABEL_H_
-
-#define LABELSECTOR 1 /* sector containing label */
-#define LABELOFFSET 0 /* offset of label in sector */
-#define MAXPARTITIONS 16 /* number of partitions */
-
-/*
- * SGI Volume Header.
- */
-
-#define SGILABEL_MAGIC 0xbe5a941
-#define SGI_SIZE_VOLDIR 15
-
-/* Partition types. */
-#define SGI_PTYPE_VOLHDR 0
-#define SGI_PTYPE_RAW 3
-#define SGI_PTYPE_BSD 4
-#define SGI_PTYPE_VOLUME 6
-#define SGI_PTYPE_EFS 7
-#define SGI_PTYPE_LVOL 8
-#define SGI_PTYPE_RLVOL 9
-#define SGI_PTYPE_XFS 10
-#define SGI_PTYPE_XFSLOG 11
-#define SGI_PTYPE_XLV 12
-#define SGI_PTYPE_XVM 13
-
-/* Device parameters. */
-struct devparms {
- u_int8_t dp_skew;
- u_int8_t dp_gap1;
- u_int8_t dp_gap2;
- u_int8_t dp_spares_cyl;
- u_int16_t dp_cyls;
- u_int16_t dp_shd0;
- u_int16_t dp_trks0;
- u_int8_t dp_ctq_depth;
- u_int8_t dp_cylshi;
- u_int16_t dp_unused;
- u_int16_t dp_secs;
- u_int16_t dp_secbytes;
- u_int16_t dp_interleave;
- u_int32_t dp_flags;
- u_int32_t dp_datarate;
- u_int32_t dp_nretries;
- u_int32_t dp_mspw;
- u_int16_t dp_xgap1;
- u_int16_t dp_xsync;
- u_int16_t dp_xrdly;
- u_int16_t dp_xgap2;
- u_int16_t dp_xrgate;
- u_int16_t dp_xwcont;
-} __packed;
-
-/* SGI volume header. */
-struct sgilabel {
- u_int32_t magic;
- int16_t root;
- int16_t swap;
- char bootfile[16];
- struct devparms dp;
- struct {
- char name[8];
- int32_t block;
- int32_t bytes;
- } voldir[SGI_SIZE_VOLDIR];
- struct {
- int32_t blocks;
- int32_t first;
- int32_t type;
- } partitions[MAXPARTITIONS];
- int32_t checksum;
- int32_t _pad;
-} __packed;
-
-#endif /* _MACHINE_DISKLABEL_H_ */
+++ /dev/null
-/* $OpenBSD: eisa_machdep.h,v 1.1 2012/03/28 20:44:23 miod Exp $ */
-/* $NetBSD: eisa_machdep.h,v 1.4 1997/06/06 23:12:52 thorpej Exp $ */
-
-/*
- * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Christopher G. Demetriou
- * for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Machine-specific definitions for EISA autoconfiguration.
- */
-
-/*
- * EISA spaces memory layout
- */
-
-#define EISA_IO_BASE 0x00080000
-#define EISA_IO_END 0x00090000
-
-#define EISA_MEM0_BASE 0x00100000
-#define EISA_MEM0_END 0x08000000
-
-#define EISA_MEM1_BASE 0x80000000
-#define EISA_MEM1_END 0x100000000UL
-
-/*
- * Types provided to machine-independent EISA code.
- */
-typedef void *eisa_chipset_tag_t;
-typedef int eisa_intr_handle_t;
-
-/*
- * Functions provided to machine-independent EISA code.
- */
-void eisa_attach_hook(struct device *, struct device *,
- struct eisabus_attach_args *);
-int eisa_maxslots(eisa_chipset_tag_t);
-int eisa_intr_map(eisa_chipset_tag_t, u_int,
- eisa_intr_handle_t *);
-const char *eisa_intr_string(eisa_chipset_tag_t, eisa_intr_handle_t);
-void *eisa_intr_establish(eisa_chipset_tag_t, eisa_intr_handle_t,
- int, int, int (*)(void *), void *, char *);
-void eisa_intr_disestablish(eisa_chipset_tag_t, void *);
+++ /dev/null
-/* $OpenBSD: endian.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-#include <mips64/endian.h>
+++ /dev/null
-/* $OpenBSD: exec.h,v 1.8 2004/10/18 19:05:36 grange Exp $ */
-
-#include <mips64/exec.h>
+++ /dev/null
-/* $OpenBSD: fenv.h,v 1.2 2013/06/01 21:20:54 jasper Exp $ */
-/* public domain */
-#include <mips64/fenv.h>
+++ /dev/null
-/* $OpenBSD: fpu.h,v 1.1 2010/09/17 00:34:08 miod Exp $ */
-/* public domain */
-#include <mips64/fpu.h>
+++ /dev/null
-/* $OpenBSD: frame.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/frame.h>
+++ /dev/null
-/* $OpenBSD: ieee.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/ieee.h>
+++ /dev/null
-/* $OpenBSD: ieeefp.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/ieeefp.h>
+++ /dev/null
-/* $OpenBSD: intr.h,v 1.53 2019/09/05 05:31:38 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MACHINE_INTR_H_
-#define _MACHINE_INTR_H_
-
-/*
- * The interrupt level ipl is a logical level; per-platform interrupt
- * code will turn it into the appropriate hardware interrupt masks
- * values.
- *
- * Interrupt sources on the CPU are kept enabled regardless of the
- * current ipl value; individual hardware sources interrupting while
- * logically masked are masked on the fly, remembered as pending, and
- * unmasked at the first splx() opportunity.
- *
- * An exception to this rule is the clock interrupt. Clock interrupts
- * are always allowed to happen, but will (of course!) not be serviced
- * if logically masked. The reason for this is that clocks usually sit on
- * INT5 and cannot be easily masked if external hardware masking is used.
- */
-
-/* Interrupt priority `levels'; not mutually exclusive. */
-#define IPL_NONE 0 /* nothing */
-#define IPL_SOFTINT 1 /* soft interrupts */
-#define IPL_SOFTCLOCK 1 /* soft clock interrupts */
-#define IPL_SOFTNET 2 /* soft network interrupts */
-#define IPL_SOFTTTY 3 /* soft terminal interrupts */
-#define IPL_SOFTHIGH IPL_SOFTTTY /* highest level of soft interrupts */
-#define IPL_BIO 4 /* block I/O */
-#define IPL_AUDIO IPL_BIO
-#define IPL_NET 5 /* network */
-#define IPL_TTY 6 /* terminal */
-#define IPL_VM 7 /* memory allocation */
-#define IPL_CLOCK 8 /* clock */
-#define IPL_SCHED IPL_CLOCK
-#define IPL_HIGH 9 /* everything */
-#define IPL_IPI 10 /* interprocessor interrupt */
-#define NIPLS 11 /* number of levels */
-
-#define IPL_MPFLOOR IPL_TTY
-
-/* Interrupt priority 'flags'. */
-#define IPL_MPSAFE 0x100
-
-/* Interrupt sharing types. */
-#define IST_NONE 0 /* none */
-#define IST_PULSE 1 /* pulsed */
-#define IST_EDGE 2 /* edge-triggered */
-#define IST_LEVEL 3 /* level-triggered */
-
-#define SINTBIT(q) (q)
-#define SINTMASK(q) (1 << SINTBIT(q))
-
-/* Soft interrupt masks. */
-
-#define SI_SOFTCLOCK 0 /* for IPL_SOFTCLOCK */
-#define SI_SOFTNET 1 /* for IPL_SOFTNET */
-#define SI_SOFTTTY 2 /* for IPL_SOFTTTY */
-
-#define SI_NQUEUES 3
-
-#ifndef _LOCORE
-
-#include <sys/mutex.h>
-#include <sys/queue.h>
-
-struct soft_intrhand {
- TAILQ_ENTRY(soft_intrhand) sih_list;
- void (*sih_func)(void *);
- void *sih_arg;
- struct soft_intrq *sih_siq;
- int sih_pending;
-};
-
-struct soft_intrq {
- TAILQ_HEAD(, soft_intrhand) siq_list;
- int siq_si;
- struct mutex siq_mtx;
-};
-
-void softintr_disestablish(void *);
-void softintr_dispatch(int);
-void *softintr_establish(int, void (*)(void *), void *);
-void softintr_init(void);
-void softintr_schedule(void *);
-
-#define splbio() splraise(IPL_BIO)
-#define splnet() splraise(IPL_NET)
-#define spltty() splraise(IPL_TTY)
-#define splaudio() splraise(IPL_AUDIO)
-#define splvm() splraise(IPL_VM)
-#define splclock() splraise(IPL_CLOCK)
-#define splsched() splraise(IPL_SCHED)
-#define splhigh() splraise(IPL_HIGH)
-
-#define splsoftclock() splraise(IPL_SOFTCLOCK)
-#define splsoftnet() splraise(IPL_SOFTNET)
-#define splstatclock() splhigh()
-
-#define spl0() spllower(0)
-
-void splinit(void);
-
-#ifdef DIAGNOSTIC
-/*
- * Although this function is implemented in MI code, it must be in this MD
- * header because we don't want this header to include MI includes.
- */
-void splassert_fail(int, int, const char *);
-extern int splassert_ctl;
-void splassert_check(int, const char *);
-#define splassert(__wantipl) do { \
- if (splassert_ctl > 0) { \
- splassert_check(__wantipl, __func__); \
- } \
-} while (0)
-#define splsoftassert(wantipl) splassert(wantipl)
-#else
-#define splassert(X)
-#define splsoftassert(X)
-#endif
-
-void register_splx_handler(void (*)(int));
-int splraise(int);
-void splx(int);
-int spllower(int);
-
-/*
- * Interrupt control struct used by interrupt dispatchers
- * to hold interrupt handler info.
- */
-
-#include <sys/evcount.h>
-
-struct intrhand {
- struct intrhand *ih_next;
- int (*ih_fun)(void *);
- void *ih_arg;
- int ih_level;
- int ih_irq;
- struct evcount ih_count;
- int ih_flags;
-#define IH_ALLOCATED 0x01
-#define IH_MPSAFE 0x02
-};
-
-void intr_barrier(void *);
-
-/*
- * Low level interrupt dispatcher registration data.
- */
-
-/* Schedule priorities for base interrupts (CPU) */
-#define INTPRI_IPI 0
-#define INTPRI_CLOCK 1
-/* other values are system-specific */
-
-#define NLOWINT 16 /* Number of low level registrations possible */
-
-extern uint32_t idle_mask;
-
-struct trapframe;
-void set_intr(int, uint32_t, uint32_t(*)(uint32_t, struct trapframe *));
-
-uint32_t updateimask(uint32_t);
-void dosoftint(void);
-
-#ifdef MULTIPROCESSOR
-#if defined (TGT_OCTANE)
-#define ENABLEIPI() updateimask(~CR_INT_2) /* enable IPI interrupt level */
-#elif defined (TGT_ORIGIN)
-#define ENABLEIPI() updateimask(~CR_INT_0) /* enable IPI interrupt level */
-#else
-#error MULTIPROCESSOR kernel not supported on this configuration
-#endif
-#endif
-
-#endif /* _LOCORE */
-
-#endif /* _MACHINE_INTR_H_ */
+++ /dev/null
-/* $OpenBSD: kcore.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/kcore.h>
+++ /dev/null
-/* $OpenBSD: limits.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/limits.h>
+++ /dev/null
-/* $OpenBSD: loadfile_machdep.h,v 1.5 2015/07/17 20:44:39 miod Exp $ */
-/* $NetBSD: loadfile_machdep.h,v 1.2 2001/10/31 17:20:49 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1999 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Christos Zoulas.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#define BOOT_ELF
-#define ELFSIZE 64
-
-#define LOAD_KERNEL LOAD_ALL
-#define COUNT_KERNEL COUNT_ALL
-
-#define LOADADDR(a) (((u_long)(a)) + offset)
-#define ALIGNENTRY(a) ((u_long)(a))
-#define READ(f, b, c) read((f), (void *)LOADADDR(b), (c))
-#define BCOPY(s, d, c) memcpy((void *)LOADADDR(d), (void *)(s), (c))
-#define BZERO(d, c) memset((void *)LOADADDR(d), 0, (c))
-#define WARN(a) (void)(printf a, \
- printf((errno ? ": %s\n" : "\n"), \
- strerror(errno)))
-#define PROGRESS(a) (void) printf a
-#define ALLOC(a) alloc(a)
-#define FREE(a, b) free(a, b)
-
-extern int check_phdr(void *);
-#define CHECK_PHDR(sz,phdr) check_phdr(phdr)
+++ /dev/null
-/* $OpenBSD: lock.h,v 1.1 2007/05/01 18:56:31 miod Exp $ */
-/* public domain */
-#include <mips64/lock.h>
+++ /dev/null
-/* $OpenBSD: memconf.h,v 1.3 2011/03/23 16:54:36 pirofti Exp $ */
-
-#ifndef _MACHINE_MEMCONF_H_
-#define _MACHINE_MEMCONF_H_
-
-#define MAXMEMSEGS 32
-
-#include <mips64/memconf.h>
-
-#endif /* _MACHINE_MEMCONF_H_ */
+++ /dev/null
-/* $OpenBSD: mips_opcode.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/mips_opcode.h>
+++ /dev/null
-/* $OpenBSD: mnode.h,v 1.18 2011/04/17 17:44:24 miod Exp $ */
-
-/*
- * Copyright (c) 2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MACHINE_MNODE_H_
-#define _MACHINE_MNODE_H_
-
-/*
- * Definitions for Nodes set up in M-Mode. Some stuff here
- * inspired by information gathered from Linux source code.
- */
-
-/*
- * IP27 uses XKSSEG to access the 1TB memory area.
- */
-#define IP27_CAC_BASE PHYS_TO_XKPHYS(0, CCA_CACHED)
-
-/*
- * IP27 uses XKPHYS space for accessing special objects.
- * Note that IP27_UNCAC_BASE is a linear space without specials.
- */
-#define IP27_HSPEC_BASE PHYS_TO_XKPHYS_UNCACHED(0, SP_HUB)
-#define IP27_IO_BASE PHYS_TO_XKPHYS_UNCACHED(0, SP_IO)
-#define IP27_MSPEC_BASE PHYS_TO_XKPHYS_UNCACHED(0, SP_SPECIAL)
-#define IP27_UNCAC_BASE PHYS_TO_XKPHYS_UNCACHED(0, SP_NC)
-
-/*
- * Macros used to find the base of each nodes address space.
- * In M mode each node space is 4GB; in N mode each node space is 2GB only.
- */
-#define IP27_NODE_BASE(base, node) ((base) + ((uint64_t)(node) << kl_n_shift))
-#define IP27_NODE_SIZE_MASK ((1UL << kl_n_shift) - 1)
-
-#define IP27_NODE_CAC_BASE(node) (IP27_NODE_BASE(IP27_CAC_BASE, node))
-#define IP27_NODE_HSPEC_BASE(node) (IP27_NODE_BASE(IP27_HSPEC_BASE, node))
-#define IP27_NODE_IO_BASE(node) (IP27_NODE_BASE(IP27_IO_BASE, node))
-#define IP27_NODE_MSPEC_BASE(node) (IP27_NODE_BASE(IP27_MSPEC_BASE, node))
-#define IP27_NODE_UNCAC_BASE(node) (IP27_NODE_BASE(IP27_UNCAC_BASE, node))
-
-/* Get typed address to nodes uncached space */
-#define IP27_UNCAC_ADDR(type, node, offs) \
- ((type)(IP27_NODE_UNCAC_BASE(node) + ((offs) & IP27_NODE_SIZE_MASK)))
-
-/*
- * Convert a physical (XIO) address to a node number.
- */
-#define IP27_PHYS_TO_NODE(addr) ((addr) >> kl_n_shift)
-
-/*
- * IP27 platforms uses something called kldir to describe each
- * nodes configuration. Directory entries looks like:
- */
-#define IP27_KLDIR_MAGIC 0x434d5f53505f5357
-
-typedef struct kldir_entry {
- uint64_t magic;
- off_t offset; /* Offset from start of node space */
- void *pointer;
- size_t size; /* Size in bytes */
- uint64_t count; /* # of entries if array, 1 if not */
- size_t stride; /* Stride if array, 0 if not */
- char rsvd[16]; /* Pad entry to 0x40 bytes */
-} kldir_entry_t;
-
-/* Get address to a specific directory entry */
-#define IP27_KLD_BASE(node) IP27_UNCAC_ADDR(kldir_entry_t *, node, 0x2000)
-#define IP27_KLD_LAUNCH(node) (IP27_KLD_BASE(node) + 0)
-#define IP27_KLD_KLCONFIG(node) (IP27_KLD_BASE(node) + 1)
-#define IP27_KLD_NMI(node) (IP27_KLD_BASE(node) + 2)
-#define IP27_KLD_GDA(node) (IP27_KLD_BASE(node) + 3)
-#define IP27_KLD_FREEMEM(node) (IP27_KLD_BASE(node) + 4)
-#define IP27_KLD_SYMMON_STK(node) (IP27_KLD_BASE(node) + 5)
-#define IP27_KLD_PI_ERROR(node) (IP27_KLD_BASE(node) + 6)
-#define IP27_KLD_KERN_VARS(node) (IP27_KLD_BASE(node) + 7)
-#define IP27_KLD_KERN_XP(node) (IP27_KLD_BASE(node) + 8)
-#define IP27_KLD_KERN_PARTID(node) (IP27_KLD_BASE(node) + 9)
-
-/* ========== */
-
-/*
- * KLCONFIG is a linked list of data structures describing the
- * system configuration.
- */
-typedef uint32_t klconf_off_t;
-typedef char confidence_t;
-
-typedef struct console_s {
- unsigned long uart_base;
- unsigned long config_base;
- unsigned long memory_base;
- short baud;
- short flag;
- int type;
- int16_t nasid;
- char wid;
- char npci;
- uint64_t baseio_nic;
-} console_t;
-
-typedef struct klc_malloc_hdr {
- klconf_off_t km_base;
- klconf_off_t km_limit;
- klconf_off_t km_current;
-} klc_malloc_hdr_t;
-
-/* KLCONFIG header addressed by IP27_KLCONFIG_HDR(node) */
-#define IP27_KLCONFIG_HDR(n) \
- IP27_UNCAC_ADDR(kl_config_hdr_t *, n, IP27_KLD_KLCONFIG(n)->offset)
-
-typedef struct kl_config_hdr {
- uint64_t magic; /* set this to KLCFGINFO_MAGIC */
- uint32_t version; /* structure version number */
- klconf_off_t malloc_hdr_off; /* offset of ch_malloc_hdr */
- klconf_off_t cons_off; /* offset of ch_cons */
- klconf_off_t board_info; /* the link list of boards */
- console_t cons_info; /* address info of the console */
- klc_malloc_hdr_t malloc_hdr[3];
- confidence_t sw_belief; /* confidence that software is bad */
- confidence_t sn0net_belief; /* confidence that sn0net is bad */
-} kl_config_hdr_t;
-
-/* Board info. */
-#define IP27_KLFIRST_BOARD(n) \
- IP27_UNCAC_ADDR(lboard_t *, n, IP27_KLCONFIG_HDR(n)->board_info)
-#define IP27_KLNEXT_BOARD(n, board) \
- IP27_UNCAC_ADDR(lboard_t *, n, board->brd_next)
-#define MAX_COMPTS_PER_BRD 24
-
-typedef struct lboard_s {
- klconf_off_t brd_next; /* Next BOARD */
- uint8_t struct_type; /* type, local or remote */
- unsigned char brd_type; /* type+class */
- unsigned char brd_sversion; /* version of this structure */
- unsigned char brd_brevision; /* board revision */
- unsigned char brd_promver; /* board prom version, if any */
- unsigned char brd_flags; /* Enabled, Disabled etc */
- unsigned char brd_slot; /* slot number (widget on IP35) */
- unsigned short brd_bus_num: 2, /* PIC bus number (IP35) */
- brd_unused: 14;
- short brd_module; /* module to which it belongs */
- char brd_partition; /* Partition number */
- unsigned short brd_diagval; /* diagnostic value */
- unsigned short brd_diagparm; /* diagnostic parameter */
- unsigned char brd_inventory; /* inventory history */
- unsigned char brd_numcompts; /* Number of components */
- uint64_t brd_nic; /* Number in CAN */
- int16_t brd_nasid; /* passed parameter */
- klconf_off_t brd_compts[MAX_COMPTS_PER_BRD]; /* COMPONENTS */
- klconf_off_t brd_errinfo; /* Board's error information */
- struct lboard_s *brd_parent; /* Logical parent for this brd */
- uint32_t brd_graph_link; /* vertex hdl to connect extrn compts */
- confidence_t brd_confidence; /* confidence that the board is bad */
- int16_t brd_owner; /* who owns this board */
- uint8_t brd_nic_flags; /* To handle 8 more NICs */
- char brd_name[32];
-} lboard_t;
-
-#define LBOARD 0x01
-#define RBOARD 0x02
-
-/* Definitions of board type and class */
-#define IP27_BC_MASK 0xf0
-#define IP27_BT_MASK 0x0f
-
-#define IP27_BC_NODE 0x10
-#define IP27_BC_IO 0x20
-#define IP27_BC_ROUTER 0x30
-#define IP27_BC_MPLANE 0x40
-#define IP27_BC_GRAF 0x50
-#define IP27_BC_HDTV 0x60
-#define IP27_BC_BRICK 0x70
-#define IP27_BC_IO2 0x80
-
-/* NODE types */
-#define IP27_BRD_CPU (IP27_BC_NODE | 0x01)
-/* IO types */
-#define IP27_BRD_BASEIO (IP27_BC_IO | 0x01) /* IO6 */
-#define IP27_BRD_MSCSI (IP27_BC_IO | 0x02)
-#define IP27_BRD_MENET (IP27_BC_IO | 0x03)
-#define IP27_BRD_FDDI (IP27_BC_IO | 0x04)
-#define IP27_BRD_PCI1 (IP27_BC_IO | 0x06) /* PCI shoebox */
-#define IP27_BRD_VME (IP27_BC_IO | 0x07)
-#define IP27_BRD_MIO (IP27_BC_IO | 0x08)
-#define IP27_BRD_FC (IP27_BC_IO | 0x09)
-#define IP27_BRD_LINC (IP27_BC_IO | 0x0a)
-/* MPLANE types */
-#define IP27_BRD_MPLANE8 (IP27_BC_MPLANE | 0x01)
-#define IP27_BRD_IOBRICK_XBOW (IP27_BC_MPLANE | 0x02)
-/* GRAF types */
-#define IP27_BRD_KONA (IP27_BC_GRAF | 0x01)
-#define IP27_BRD_MGRAS (IP27_BC_GRAF | 0x03)
-#define IP27_BRD_ODSY (IP27_BC_GRAF | 0x04)
-/* BRICK types */
-#define IP27_BRD_IOBRICK (IP27_BC_BRICK | 0x00)
-#define IP27_BRD_IBRICK (IP27_BC_BRICK | 0x01)
-#define IP27_BRD_PBRICK (IP27_BC_BRICK | 0x02)
-#define IP27_BRD_XBRICK (IP27_BC_BRICK | 0x03)
-#define IP27_BRD_NBRICK (IP27_BC_BRICK | 0x04)
-#define IP27_BRD_PEBRICK (IP27_BC_BRICK | 0x05)
-#define IP27_BRD_PXBRICK (IP27_BC_BRICK | 0x06)
-#define IP27_BRD_IXBRICK (IP27_BC_BRICK | 0x07)
-#define IP27_BRD_CGBRICK (IP27_BC_BRICK | 0x08)
-/* IO2 types */
-#define IP27_BRD_DIVO (IP27_BC_IO2 | 0x01)
-#define IP27_BRD_TPU (IP27_BC_IO2 | 0x02)
-#define IP27_BRD_GSN (IP27_BC_IO2 | 0x03)
-#define IP27_BRD_GSN_AUX (IP27_BC_IO2 | 0x04)
-#define IP27_BRD_PCI3 (IP27_BC_IO2 | 0x05) /* PCI shoehorn */
-#define IP27_BRD_HIPPI (IP27_BC_IO2 | 0x06)
-#define IP27_BRD_ATM (IP27_BC_IO2 | 0x07)
-
-/* Component info. Common info about a component. */
-typedef struct klinfo_s { /* Generic info */
- unsigned char struct_type; /* type of this structure */
- unsigned char struct_version; /* version of this structure */
- unsigned char flags; /* Enabled, disabled etc */
- unsigned char revision; /* component revision */
- unsigned short diagval; /* result of diagnostics */
- unsigned short diagparm; /* diagnostic parameter */
- unsigned char inventory; /* previous inventory status */
- uint64_t nic; /* Must be aligned properly */
- unsigned char physid; /* physical id of component */
- unsigned int virtid; /* virtual id as seen by system */
- unsigned char widid; /* Widget id - if applicable */
- int16_t nasid; /* node number - from parent */
- unsigned short port: 2, /* (IP35) port on dual port controller */
- pci_bus_num: 2, /* (IP35) PCI bus number if on PIC */
- pci_multifunc: 1,
- pci_func_num: 3,/* (IP35) PCI function number */
- pci_unused: 8;
- char pad2; /* pad out structure. */
- void *arcs_compt; /* ptr to the arcs struct for ease*/
- klconf_off_t errinfo; /* component specific errors */
- unsigned short pad3; /* pci fields have moved over to */
- unsigned short pad4; /* klbri_t */
-} klinfo_t;
-
-#define KLINFO_PHYSID_PIC_BUS1 0x10 /* set if on PIC bus 1 */
-#define KLINFO_PHYSID_WIDGET_MASK 0x0f
-
-#define KLINFO_ENABLED 0x01
-#define KLINFO_FAILED 0x02
-
-/*
- * Component structure types.
- */
-#define KLSTRUCT_UNKNOWN 0
-#define KLSTRUCT_CPU 1
-#define KLSTRUCT_HUB 2
-#define KLSTRUCT_MEMBNK 3
-#define KLSTRUCT_XBOW 4
-#define KLSTRUCT_BRI 5
-#define KLSTRUCT_IOC3 6
-#define KLSTRUCT_PCI 7
-#define KLSTRUCT_VME 8
-#define KLSTRUCT_ROU 9
-#define KLSTRUCT_GFX 10
-#define KLSTRUCT_SCSI 11
-#define KLSTRUCT_FDDI 12
-#define KLSTRUCT_MIO 13
-#define KLSTRUCT_DISK 14
-#define KLSTRUCT_TAPE 15
-#define KLSTRUCT_CDROM 16
-#define KLSTRUCT_HUB_UART 17
-#define KLSTRUCT_IOC3ENET 18
-#define KLSTRUCT_IOC3UART 19
-#define KLSTRUCT_IOC3PCKM 21
-#define KLSTRUCT_RAD 22
-#define KLSTRUCT_HUB_TTY 23
-#define KLSTRUCT_IOC3_TTY 24
-/* new IP35 values */
-#define KLSTRUCT_FIBERCHANNEL 25
-#define KLSTRUCT_MOD_SERIAL_NUM 26
-#define KLSTRUCT_IOC3MS 27
-#define KLSTRUCT_TPU 28
-#define KLSTRUCT_GSN 29
-#define KLSTRUCT_GSN_AUX 30
-#define KLSTRUCT_XTHD 31
-#define KLSTRUCT_QLFIBRE 32
-#define KLSTRUCT_FIREWIRE 33
-#define KLSTRUCT_USB 34
-#define KLSTRUCT_USBKBD 35
-#define KLSTRUCT_USBMS 36
-#define KLSTRUCT_SCSI2 37
-#define KLSTRUCT_PEBRICK 38
-#define KLSTRUCT_GIGENET 39
-#define KLSTRUCT_IDE 40
-/* new IP53 values */
-#define KLSTRUCT_IOC4 41
-#define KLSTRUCT_IOC4UART 42
-#define KLSTRUCT_IOC4_TTY 43
-#define KLSTRUCT_IOC4PCKM 44
-#define KLSTRUCT_IOC4MS 45
-#define KLSTRUCT_IOC4_ATA 46
-#define KLSTRUCT_VGAGFX 47
-
-typedef struct klport_s {
- int16_t port_nasid;
- unsigned char port_flag;
- klconf_off_t port_offset;
-} klport_t;
-
-/* KLSTRUCT_CPU: CPU component info */
-typedef struct klcpu_s {
- klinfo_t cpu_info;
- uint16_t cpu_prid; /* Processor PRID value */
- uint16_t cpu_fpirr; /* IP27: FPU IRR value */
- /* IP35: mode information (?) */
- uint16_t cpu_speed; /* Speed in MHZ */
- uint16_t cpu_scachesz; /* secondary cache size in MB */
- uint16_t cpu_scachespeed;/* secondary cache speed in MHz */
-} klcpu_t;
-
-/* KLSTRUCT_HUB: Hub */
-typedef struct klhub_s {
- klinfo_t hub_info;
- uint32_t hub_flags; /* PCFG_HUB_xxx flags */
- klport_t hub_port; /* hub is connected to this */
- uint64_t hub_box_nic; /* nic of containing box */
- klconf_off_t hub_mfg_nic; /* MFG NIC string */
- uint64_t hub_speed; /* Speed of hub in HZ */
-} klhub_t;
-
-/* KLSTRUCT_MEMBNK: Memory bank */
-#define MD_MEM_BANKS_M 8 /* M-Mode */
-typedef struct klmembnk_m_s {
- klinfo_t membnk_info;
- int16_t membnk_memsz; /* Total memory in megabytes */
- int16_t membnk_dimm_select; /* bank to phys addr mapping*/
- int16_t membnk_bnksz[MD_MEM_BANKS_M]; /* Memory bank sizes */
- int16_t membnk_attr; /* directory memory, per bank */
-} klmembnk_m_t;
-
-#define MD_MEM_BANKS_N 4 /* N-Mode */
-typedef struct klmembnk_n_s {
- klinfo_t membnk_info;
- int16_t membnk_memsz; /* Total memory in megabytes */
- int16_t membnk_dimm_select; /* bank to phys addr mapping*/
- int16_t membnk_bnksz[MD_MEM_BANKS_N]; /* Memory bank sizes */
- int16_t membnk_attr; /* directory memory, per bank */
-} klmembnk_n_t;
-
-/* KLSTRUCT_XBOW: Xbow */
-#define MAX_XBOW_LINKS 16
-typedef struct klxbow_s {
- klinfo_t xbow_info;
- klport_t xbow_port_info[MAX_XBOW_LINKS]; /* Module number */
- int xbow_hub_master_link;
-} klxbow_t;
-
-/* xbow_port_info.port_flag bits */
-#define XBOW_PORT_IO 0x01
-#define XBOW_PORT_HUB 0x02
-#define XBOW_PORT_ENABLE 0x04
-
-/* KLSTRUCT_SCSI: SCSI Bus, or single-bus SCSI Controller */
-#define MAX_SCSI_DEVS 16
-typedef struct klscsi_s {
- klinfo_t scsi_info;
- uint64_t scsi_specific;
- uint8_t scsi_numdevs;
- klconf_off_t scsi_devinfo[MAX_SCSI_DEVS];
-} klscsi_t;
-
-/* KLSTRUCT_IOC3: Basic I/O Controller */
-typedef struct klioc3_s {
- klinfo_t ioc3_info;
- unsigned char ioc3_ssram; /* Info about ssram */
- unsigned char ioc3_nvram; /* Info about nvram */
- klconf_off_t ioc3_tty_off;
- klconf_off_t ioc3_kbd_off;
- klinfo_t ioc3_superio; /* Info about superio */
- klinfo_t ioc3_enet;
- klconf_off_t ioc3_enet_off;
-} klioc3_t;
-
-/* KLSTRUCT_IOC3_TTY: IOC3 attached TTY */
-typedef struct klttydev_s {
- klinfo_t ttydev_info;
- struct terminal_data *ttydev_cfg; /* driver fills up this */
-} klttydev_t;
-
-/* KLSTRUCT_SCSI2: SCSI Controller */
-typedef struct klscctl_s {
- klinfo_t scsi_info;
- uint type;
- uint scsi_buscnt;
- uint64_t scsi_bus[2];
-} klscctl_t;
-
-/* ========== */
-
-#define IP27_NMI(n) \
- IP27_UNCAC_ADDR(nmi_t *, n, IP27_KLD_NMI(n)->offset)
-
-#define NMI_MAGIC 0x0048414d4d455201 /* \x00HAMMER\x01 */
-
-typedef struct nmi {
- uint64_t magic; /* NMI_MAGIC */
- uint64_t flags;
- uint64_t cb; /* callback function */
- uint64_t cb_complement; /* two's complement of above */
- uint64_t cb_arg; /* callback arg */
- uint64_t master; /* nonzero if master node */
-} nmi_t;
-
-/* ========== */
-
-#define IP27_GDA(n) (gda_t *)(IP27_KLD_GDA(n)->pointer)
-#define IP27_GDA_SIZE(n) (IP27_KLD_GDA(n)->size)
-
-#define GDA_MAGIC 0x58464552 /* XFER */
-
-#define GDA_MAXNODES 128
-
-typedef struct gda {
- uint32_t magic; /* GDA_MAGIC */
- uint16_t ver;
- uint16_t masternasid; /* NASID of the master cpu */
- uint32_t promop; /* Request to pass to PROM */
- uint32_t switches;
- void *tlb_handlers[3];
- uint partid;
- uint symcnt;
- void *symtab;
- char *symnames;
- void *replication_mask;
- uint32_t pad[14];
- int16_t nasid[GDA_MAXNODES]; /* NASID of connected nodes */
-} gda_t;
-
-#define GDA_PROMOP_MAGIC 0x0ead0000
-/* commands */
-#define GDA_PROMOP_HALT 0x00000010
-#define GDA_PROMOP_POWERDOWN 0x00000020
-#define GDA_PROMOP_RESTART 0x00000030
-#define GDA_PROMOP_REBOOT 0x00000040
-#define GDA_PROMOP_EIM 0x00000050
-/* options */
-#define GDA_PROMOP_NO_DIAGS 0x00000100 /* don't run diagnostics */
-#define GDA_PROMOP_NO_MEMINIT 0x00000200 /* don't initialize memory */
-#define GDA_PROMOP_NO_DEVINIT 0x00000400 /* don't initialize devices */
-
-/* ========== */
-
-/*
- * Functions.
- */
-
-console_t *kl_get_console(void);
-void kl_init(int);
-int kl_scan_all_nodes(uint, int (*)(lboard_t *, void *), void *);
-int kl_scan_node(int, uint, int (*)(lboard_t *, void *), void *);
-#define KLBRD_ANY 0
-int kl_scan_board(lboard_t *, uint, int (*)(klinfo_t *, void *), void *);
-#define KLSTRUCT_ANY ((uint)~0)
-void kl_get_location(klinfo_t *, struct sgi_device_location *);
-void kl_get_console_location(console_t *, struct sgi_device_location *);
-
-/* widget number of the XBow `hub', for each node */
-extern int kl_hub_widget[GDA_MAXNODES];
-
-extern int kl_n_mode;
-extern u_int kl_n_shift;
-extern klinfo_t *kl_glass_console;
-extern gda_t *gda;
-extern uint maxnodes;
-
-#endif /* _MACHINE_MNODE_H_ */
+++ /dev/null
-/* $OpenBSD: mplock.h,v 1.2 2015/09/09 15:48:53 visa Exp $ */
-
-#include <mips64/mplock.h>
+++ /dev/null
-/* $OpenBSD: mutex.h,v 1.9 2015/07/08 13:37:31 dlg Exp $ */
-
-#include <mips64/mutex.h>
+++ /dev/null
-/* $OpenBSD: param.h,v 1.7 2013/03/23 16:12:26 deraadt Exp $ */
-
-/*
- * Copyright (c) 2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_PARAM_H_
-#define _MACHINE_PARAM_H_
-
-#define MACHINE "sgi"
-#define _MACHINE sgi
-#define MACHINE_ARCH "mips64"
-#define _MACHINE_ARCH mips64
-#define MID_MACHINE MID_MIPS64 /* None but has to be defined */
-
-#ifdef _KERNEL
-#ifndef PAGE_SHIFT
-#if defined(CPU_R5000) || defined(CPU_RM7000)
-#define PAGE_SHIFT 12
-#else
-#define PAGE_SHIFT 14
-#endif
-#endif
-#endif /* _KERNEL */
-
-#include <mips64/param.h>
-
-#endif /* _MACHINE_PARAM_H_ */
+++ /dev/null
-/* $OpenBSD: pcb.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/pcb.h>
+++ /dev/null
-/* $OpenBSD: pmap.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/pmap.h>
+++ /dev/null
-/* $OpenBSD: proc.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/proc.h>
+++ /dev/null
-/* $OpenBSD: profile.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/profile.h>
+++ /dev/null
-/* $OpenBSD: pte.h,v 1.4 2004/09/20 20:03:19 miod Exp $ */
-#include <mips64/pte.h>
+++ /dev/null
-/* $OpenBSD: ptrace.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/ptrace.h>
+++ /dev/null
-/* $OpenBSD: rbus_machdep.h,v 1.2 2011/03/23 16:54:36 pirofti Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _MACHINE_RBUS_MACHDEP_H_
-#define _MACHINE_RBUS_MACHDEP_H_
-
-/*
- * RBUS mapping routines
- */
-
-struct rb_md_fnptr {
- int (*rbus_md_space_map)(bus_space_tag_t, bus_addr_t, bus_size_t,
- int, bus_space_handle_t *);
- void (*rbus_md_space_unmap)(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_addr_t *);
-};
-
-static __inline__ int
-md_space_map(rbus_tag_t rbt, u_long addr, bus_size_t size, int flags,
- bus_space_handle_t *bshp)
-{
- struct rb_md_fnptr *fn = (struct rb_md_fnptr *)rbt->rb_md;
-
- return (*fn->rbus_md_space_map)(rbt->rb_bt, (bus_addr_t)addr, size,
- flags, bshp);
-}
-
-static __inline__ void
-md_space_unmap(rbus_tag_t rbt, bus_space_handle_t h, bus_size_t size,
- bus_addr_t *addrp)
-{
- struct rb_md_fnptr *fn = (struct rb_md_fnptr *)rbt->rb_md;
-
- (*fn->rbus_md_space_unmap)(rbt->rb_bt, h, size, addrp);
-}
-
-/*
- * PCCBB RBUS allocation routines (rbus_pccbb_parent_io, rbus_pccbb_parent_mem)
- * are implemented in pci_machdep.h.
- */
-
-#define pccbb_attach_hook(parent, self, paa) \
- do { /* nothing */} while (/*CONSTCOND*/0)
-
-#endif /* _MACHINE_RBUS_MACHDEP_H_ */
+++ /dev/null
-/* $OpenBSD: reg.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/reg.h>
+++ /dev/null
-/* $OpenBSD: regdef.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/regdef.h>
+++ /dev/null
-/* $OpenBSD: regnum.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/regnum.h>
+++ /dev/null
-/* $OpenBSD: reloc.h,v 1.3 2017/08/12 15:33:41 visa Exp $ */
-
-/* public domain */
-
-#include <mips64/reloc.h>
+++ /dev/null
-/* $OpenBSD: setjmp.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/setjmp.h>
+++ /dev/null
-/* $OpenBSD: signal.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/signal.h>
+++ /dev/null
-/* $OpenBSD: spinlock.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-#include <mips64/spinlock.h>
+++ /dev/null
-/* $OpenBSD: sysarch.h,v 1.1 2009/09/27 18:20:13 miod Exp $ */
-/* public domain */
-#include <mips64/sysarch.h>
+++ /dev/null
-/* $OpenBSD: tcb.h,v 1.2 2013/06/01 21:20:54 jasper Exp $ */
-/* public domain */
-#include <mips64/tcb.h>
+++ /dev/null
-/* $OpenBSD: timetc.h,v 1.2 2020/07/18 08:37:44 visa Exp $ */
-/*
- * Copyright (c) 2020 Paul Irofti <paul@irofti.net>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _MACHINE_TIMETC_H_
-#define _MACHINE_TIMETC_H_
-
-#include <mips64/timetc.h>
-
-#endif /* _MACHINE_TIMETC_H_ */
+++ /dev/null
-/* $OpenBSD: trap.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
-
-/* Use Mips generic include file */
-
-#include <mips64/trap.h>
+++ /dev/null
-/* $OpenBSD: vmparam.h,v 1.10 2014/07/13 15:48:32 miod Exp $ */
-/* public domain */
-#ifndef _MACHINE_VMPARAM_H_
-#define _MACHINE_VMPARAM_H_
-
-#define VM_PHYSSEG_MAX 32 /* Max number of physical memory segments */
-
-#include <mips64/vmparam.h>
-
-#endif /* _MACHINE_VMPARAM_H_ */
+++ /dev/null
-/* $OpenBSD: z8530var.h,v 1.4 2013/04/21 14:44:16 sebastia Exp $ */
-/* $NetBSD: z8530var.h,v 1.10 2011/07/01 21:00:21 dyoung Exp $ */
-
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
- *
- * All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratory.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
- */
-
-/*
- * Copyright (c) 1994 Gordon W. Ross
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
- *
- * All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratory.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
- */
-
-#include <machine/bus.h>
-#include <dev/ic/z8530sc.h>
-
-struct zs_channel {
- struct zs_chanstate cs_zscs; /* Required: soft state */
- bus_space_tag_t cs_bustag; /* Machine-dependent */
- bus_space_handle_t cs_regs;
- int cs_flags;
-#define ZSCFL_INVERT_WIRING 0x01
-};
-
-struct zsc_softc {
- struct device zsc_dev; /* required: base device */
- struct zs_chanstate *zsc_cs[2]; /* channel soft state */
- struct zs_channel zsc_cs_store[2];
- /* Machine-dependent part follows... */
- bus_space_tag_t zsc_bustag; /* Bus type */
- bus_space_handle_t zsc_base; /* Device base address */
- void *sc_si; /* Softinterrupt handle */
-};
-
-/*
- * Functions to read and write individual registers in a channel.
- * The SCC chip requires 3-4 PCLK cycles recovery time between accesses
- */
-
-uint8_t zs_read_reg(struct zs_chanstate *, uint8_t);
-uint8_t zs_read_csr(struct zs_chanstate *);
-uint8_t zs_read_data(struct zs_chanstate *);
-
-void zs_write_reg(struct zs_chanstate *, uint8_t, uint8_t);
-void zs_write_csr(struct zs_chanstate *, uint8_t);
-void zs_write_data(struct zs_chanstate *, uint8_t);
-
-/* Zilog Serial hardware interrupts (level 0) */
-#define splzs() spltty()
-#define IPL_ZS IPL_TTY
+++ /dev/null
-/* $OpenBSD: com_lbus.c,v 1.13 2018/12/03 13:46:30 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/tty.h>
-
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <dev/ic/comreg.h>
-#include <dev/ic/comvar.h>
-#include <dev/ic/ns16550reg.h>
-
-#include <sgi/localbus/macebusvar.h>
-
-int com_macebus_probe(struct device *, void *, void *);
-void com_macebus_attach(struct device *, struct device *, void *);
-
-struct cfattach com_macebus_ca = {
- sizeof(struct com_softc), com_macebus_probe, com_macebus_attach
-};
-
-int
-com_macebus_probe(struct device *parent, void *match, void *aux)
-{
- struct macebus_attach_args *maa = aux;
- bus_space_handle_t ioh;
- int rv;
-
- /* If it's in use as the console, then it's there. */
- if (maa->maa_baseaddr == comconsaddr && !comconsattached)
- return (1);
-
- if (bus_space_map(maa->maa_iot, maa->maa_baseaddr, COM_NPORTS, 0, &ioh))
- return (0);
-
- rv = comprobe1(maa->maa_iot, ioh);
- bus_space_unmap(maa->maa_iot, ioh, COM_NPORTS);
-
- return rv;
-}
-
-void
-com_macebus_attach(struct device *parent, struct device *self, void *aux)
-{
- struct com_softc *sc = (void *)self;
- struct macebus_attach_args *maa = aux;
-
- sc->sc_iot = maa->maa_iot;
- sc->sc_hwflags = 0;
- sc->sc_swflags = 0;
- sc->sc_iobase = maa->maa_baseaddr;
- sc->sc_frequency = 1843200;
-
- /* If it's in use as the console, then it's there. */
- if (maa->maa_baseaddr == comconsaddr && !comconsattached) {
- if (comcnattach(sc->sc_iot, sc->sc_iobase, comconsrate,
- sc->sc_frequency, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8))
- panic("failed to setup serial console!");
- sc->sc_ioh = comconsioh;
- } else {
- if (bus_space_map(sc->sc_iot, maa->maa_baseaddr, COM_NPORTS, 0,
- &sc->sc_ioh)) {
- printf(": can't map i/o space\n");
- return;
- }
- }
-
- com_attach_subr(sc);
-
- macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
- IPL_TTY, comintr, (void *)sc, sc->sc_dev.dv_xname);
-}
+++ /dev/null
-/* $OpenBSD: crimebus.h,v 1.9 2012/04/21 19:17:50 miod Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _CRIMEBUS_H_
-#define _CRIMEBUS_H_
-
-#include <machine/bus.h>
-
-#define CRIMEBUS_BASE 0x14000000
-
-#define CRIME_REVISION 0x0000
-
-#define CRIME_CONTROL 0x0008
-#define CRIME_CTRL_TRITON_SYSADC 0x2000
-#define CRIME_CTRL_CRIME_SYSADC 0x1000
-#define CRIME_CTRL_HARD_RESET 0x0800
-#define CRIME_CTRL_SOFT_RESET 0x0400
-#define CRIME_CTRL_DOG_ENABLE 0x0200
-#define CRIME_CTRL_ENDIAN_BIG 0x0100
-
-#define CRIME_INT_STAT 0x0010
-#define CRIME_INT_MASK 0x0018
-#define CRIME_INT_SOFT 0x0020
-#define CRIME_INT_HARD 0x0028
-
-/*
- * CRIME_INT_STAT and CRIME_INT_MASK mapping.
- */
-#define CRIME_INT_VIDEO_IN_1 0x00000001 /* Video in 1 */
-#define CRIME_INT_VIDEO_IN_2 0x00000002 /* Video in 2 */
-#define CRIME_INT_VIDEO_OUT 0x00000004 /* Video out */
-#define CRIME_INT_MACE_ETHER 0x00000008 /* Mace Ethernet NIC */
-#define CRIME_INT_SUPER_IO 0x00000010 /* Super I/O sub interrupt */
-#define CRIME_INT_SUB_MISC 0x00000020 /* Miscellaneous sub interrupt */
-#define CRIME_INT_SUB_AUDIO 0x00000040 /* Audio sub interrupt */
-#define CRIME_INT_PCI_BRIDGE 0x00000080 /* PCI bridge errors */
-#define CRIME_INT_PCI_SCSI_0 0x00000100 /* AIC SCSI controller 0 */
-#define CRIME_INT_PCI_SCSI_1 0x00000200 /* AIC SCSI controller 1 */
-#define CRIME_INT_PCI_SLOT_0 0x00000400 /* PCI expansion slot 0 */
-#define CRIME_INT_PCI_SLOT_1 0x00000800 /* PCI expansion slot 1 */
-#define CRIME_INT_PCI_SLOT_2 0x00001000 /* PCI expansion slot 2 */
-#define CRIME_INT_PCI_SHARE_0 0x00002000 /* PCI shared 0 */
-#define CRIME_INT_PCI_SHARE_1 0x00004000 /* PCI shared 1 */
-#define CRIME_INT_PCI_SHARE_2 0x00008000 /* PCI shared 2 */
-#define CRIME_INT_GBE_0 0x00010000 /* GBE0 (E) */
-#define CRIME_INT_GBE_1 0x00020000 /* GBE1 (E) */
-#define CRIME_INT_GBE_2 0x00040000 /* GBE2 (E) */
-#define CRIME_INT_GBE_3 0x00080000 /* GBE3 (E) */
-#define CRIME_INT_CPU_ERR 0x00100000 /* CPU Errors */
-#define CRIME_INT_MEM_ERR 0x00200000 /* Memory Errors */
-#define CRIME_INT_RE_EDGE_EMPTY 0x00400000 /* RE */
-#define CRIME_INT_RE_EDGE_FULL 0x00800000 /* RE */
-#define CRIME_INT_RE_EDGE_IDLE 0x01000000 /* RE */
-#define CRIME_INT_RE_LEVL_EMPTY 0x02000000 /* RE */
-#define CRIME_INT_RE_LEVL_FULL 0x04000000 /* RE */
-#define CRIME_INT_RE_LEVL_IDLE 0x08000000 /* RE */
-#define CRIME_INT_SOFT_0 0x10000000 /* ??? */
-#define CRIME_INT_SOFT_1 0x20000000 /* ??? */
-#define CRIME_INT_SOFT_2 0x40000000 /* ??? */
-#define CRIME_INT_VICE 0x80000000 /* Video Image Compression Engine */
-
-#define CRIME_NINTS 32
-
-
-/*
- * Watchdog?
- */
-#define CRIME_KICK_DOG 0x0030
-#define CRIME_TIMER 0x0038
-
-#define CRIME_CPU_ERROR_ADDR 0x0040
-#define CRIME_CPU_ERROR_STAT 0x0048
-#define CRIME_CPU_ERROR_ENAB 0x0050
-
-#define CRIME_MEM_BANK0_CONTROL 0x0208
-#define CRIME_MEM_BANK_ADDR 0x01f
-#define CRIME_MEM_BANK_128MB 0x100
-#define CRIME_MAX_BANKS 8
-
-#define CRIME_MEMORY_OFFSET 0x40000000 /* 1GB */
-#define CRIME_MEMORY_MASK 0x3fffffff
-
-#define CRIME_MEM_ERROR_STAT 0x0250
-#define CRIME_MEM_ERROR_ADDR 0x0258
-
-extern bus_space_t crimebus_tag;
-
-#endif /* _CRIMEBUS_H_ */
+++ /dev/null
-/* $OpenBSD: imc.c,v 1.22 2017/05/11 15:47:45 visa Exp $ */
-/* $NetBSD: imc.c,v 1.32 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2001 Rafal K. Boni
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Indigo/Indigo2/Indy on-board Memory Controller support code.
- */
-
-#include <sys/param.h>
-#include <sys/device.h>
-#include <sys/systm.h>
-
-#include <mips64/archtype.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-
-#include <sgi/sgi/ip22.h>
-#include <sgi/localbus/imcreg.h>
-#include <sgi/localbus/imcvar.h>
-#include <sgi/localbus/intreg.h>
-
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giovar.h>
-
-#include "eisa.h"
-
-#if NEISA > 0
-#include <dev/eisa/eisavar.h>
-#endif
-
-int imc_match(struct device *, void *, void *);
-void imc_attach(struct device *, struct device *, void *);
-int imc_activate(struct device *, int);
-int imc_print(void *, const char *);
-
-const struct cfattach imc_ca = {
- sizeof(struct device), imc_match, imc_attach, NULL, imc_activate
-};
-
-struct cfdriver imc_cd = {
- NULL, "imc", DV_DULL
-};
-
-uint32_t imc_bus_error(uint32_t, struct trapframe *);
-int imc_watchdog_cb(void *, int);
-
-void imc_space_barrier(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, int);
-
-/* can't be static for gio_cnattach() */
-bus_space_t imcbus_tag = {
- PHYS_TO_XKPHYS(0, CCA_NC),
- NULL,
- imc_read_1, imc_write_1,
- imc_read_2, imc_write_2,
- imc_read_4, imc_write_4,
- imc_read_8, imc_write_8,
- imc_read_raw_2, imc_write_raw_2,
- imc_read_raw_4, imc_write_raw_4,
- imc_read_raw_8, imc_write_raw_8,
- imc_space_map, imc_space_unmap, imc_space_region,
- imc_space_vaddr, imc_space_barrier
-};
-
-#if NEISA > 0
-void imc_eisa_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void imc_eisa_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-void imc_eisa_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void imc_eisa_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-void imc_eisa_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void imc_eisa_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-int imc_eisa_io_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-int imc_eisa_io_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, bus_space_handle_t *);
-int imc_eisa_mem_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-int imc_eisa_mem_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, bus_space_handle_t *);
-
-static bus_space_t imcbus_eisa_io_tag = {
- PHYS_TO_XKPHYS(EISA_IO_BASE, CCA_NC),
- NULL,
- imc_read_1, imc_write_1,
- imc_read_2, imc_write_2,
- imc_read_4, imc_write_4,
- imc_read_8, imc_write_8,
- imc_eisa_read_raw_2, imc_eisa_write_raw_2,
- imc_eisa_read_raw_4, imc_eisa_write_raw_4,
- imc_eisa_read_raw_8, imc_eisa_write_raw_8,
- imc_eisa_io_map, imc_space_unmap, imc_eisa_io_region,
- imc_space_vaddr, imc_space_barrier
-};
-static bus_space_t imcbus_eisa_mem_tag = {
- PHYS_TO_XKPHYS(0, CCA_NC),
- NULL,
- imc_read_1, imc_write_1,
- imc_read_2, imc_write_2,
- imc_read_4, imc_write_4,
- imc_read_8, imc_write_8,
- imc_read_raw_2, imc_write_raw_2,
- imc_read_raw_4, imc_write_raw_4,
- imc_read_raw_8, imc_write_raw_8,
- imc_eisa_mem_map, imc_space_unmap, imc_eisa_mem_region,
- imc_space_vaddr, imc_space_barrier
-};
-#endif
-
-bus_addr_t imc_pa_to_device(paddr_t, int);
-
-/* can't be static for gio_cnattach() */
-struct machine_bus_dma_tag imc_bus_dma_tag = {
- NULL, /* _cookie */
- _dmamap_create,
- _dmamap_destroy,
- _dmamap_load,
- _dmamap_load_mbuf,
- _dmamap_load_uio,
- _dmamap_load_raw,
- _dmamap_load_buffer,
- _dmamap_unload,
- _dmamap_sync,
- _dmamem_alloc,
- _dmamem_free,
- _dmamem_map,
- _dmamem_unmap,
- _dmamem_mmap,
- imc_pa_to_device,
- 0
-};
-
-/*
- * Bus access primitives.
- */
-
-uint8_t
-imc_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint8_t *)(h + o);
-}
-
-uint16_t
-imc_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint16_t *)(h + o);
-}
-
-uint32_t
-imc_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint32_t *)(h + o);
-}
-
-uint64_t
-imc_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint64_t *)(h + o);
-}
-
-void
-imc_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint8_t v)
-{
- *(volatile uint8_t *)(h + o) = v;
-}
-
-void
-imc_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint16_t v)
-{
- *(volatile uint16_t *)(h + o) = v;
-}
-
-void
-imc_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint32_t v)
-{
- *(volatile uint32_t *)(h + o) = v;
-}
-
-void
-imc_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint64_t v)
-{
- *(volatile uint64_t *)(h + o) = v;
-}
-
-void
-imc_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)(h + o);
- len >>= 1;
- while (len-- != 0) {
- *(uint16_t *)buf = *addr;
- buf += 2;
- }
-}
-
-void
-imc_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)(h + o);
- len >>= 1;
- while (len-- != 0) {
- *addr = *(uint16_t *)buf;
- buf += 2;
- }
-}
-
-void
-imc_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *(uint32_t *)buf = *addr;
- buf += 4;
- }
-}
-
-void
-imc_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *addr = *(uint32_t *)buf;
- buf += 4;
- }
-}
-
-void
-imc_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *(uint64_t *)buf = *addr;
- buf += 8;
- }
-}
-
-void
-imc_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *addr = *(uint64_t *)buf;
- buf += 8;
- }
-}
-
-int
-imc_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
- *bshp = t->bus_base + offs;
- return 0;
-}
-
-void
-imc_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
-{
-}
-
-int
-imc_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
- *nbshp = bsh + offset;
- return 0;
-}
-
-void *
-imc_space_vaddr(bus_space_tag_t t, bus_space_handle_t h)
-{
- return (void *)h;
-}
-
-void
-imc_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offs,
- bus_size_t len, int flags)
-{
- mips_sync();
-}
-
-#if NEISA > 0
-void
-imc_eisa_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)(h + o);
- len >>= 1;
- while (len-- != 0) {
- *(uint16_t *)buf = swap16(*addr);
- buf += 2;
- }
-}
-
-void
-imc_eisa_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)(h + o);
- len >>= 1;
- while (len-- != 0) {
- *addr = swap16(*(uint16_t *)buf);
- buf += 2;
- }
-}
-
-void
-imc_eisa_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *(uint32_t *)buf = swap32(*addr);
- buf += 4;
- }
-}
-
-void
-imc_eisa_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *addr = swap32(*(uint32_t *)buf);
- buf += 4;
- }
-}
-
-void
-imc_eisa_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *(uint64_t *)buf = swap64(*addr);
- buf += 8;
- }
-}
-
-void
-imc_eisa_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *addr = swap64(*(uint64_t *)buf);
- buf += 8;
- }
-}
-
-int
-imc_eisa_io_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size, int flags,
- bus_space_handle_t *bshp)
-{
- if (offs + size > EISA_IO_END - EISA_IO_BASE)
- return EINVAL;
-
- *bshp = t->bus_base + offs;
- return 0;
-}
-
-int
-imc_eisa_io_region(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
- bus_size_t size, bus_space_handle_t *nbshp)
-{
- if ((bsh - t->bus_base) + offset + size > EISA_IO_END - EISA_IO_BASE)
- return EINVAL;
-
- *nbshp = bsh + offset;
- return 0;
-}
-
-int
-imc_eisa_mem_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size, int flags,
- bus_space_handle_t *bshp)
-{
- if ((offs >= EISA_MEM0_BASE && offs + size <= EISA_MEM0_END) ||
- (offs >= EISA_MEM1_BASE && offs + size <= EISA_MEM1_END)) {
- *bshp = t->bus_base + offs;
- return 0;
- }
-
- return EINVAL;
-}
-
-int
-imc_eisa_mem_region(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
- bus_addr_t orig = bsh - t->bus_base;
-
- if ((orig >= EISA_MEM0_BASE && orig + offset + size <= EISA_MEM0_END) ||
- (orig >= EISA_MEM1_BASE && orig + offset + size <= EISA_MEM1_END)) {
- *nbshp = t->bus_base + offset;
- return 0;
- }
-
- return EINVAL;
-}
-#endif
-
-bus_addr_t
-imc_pa_to_device(paddr_t pa, int flags)
-{
- return (bus_addr_t)pa;
-}
-
-/*
- * For some reason, reading the arbitration register sometimes returns
- * wrong values, at least on IP20 (where the usual value is 0x400, but
- * nonsense values such as 0x34f have been witnessed).
- * Because of this, we'll treat the register as write-only, once we have
- * been able to read a supposedly safe value.
- * This variable contains the last known value written to this register.
- */
-uint32_t imc_arb_value;
-
-/*
- * Autoconf glue.
- */
-
-int
-imc_match(struct device *parent, void *match, void *aux)
-{
- struct mainbus_attach_args *maa = (void *)aux;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- break;
- default:
- return 0;
- }
-
- return strcmp(maa->maa_name, imc_cd.cd_name) == 0;
-}
-
-void
-imc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct imc_attach_args iaa;
-#if NEISA > 0
- struct eisabus_attach_args eba;
-#endif
- uint32_t reg, lastreg;
- uint32_t id, rev;
- int have_eisa;
-
- id = imc_read(IMC_SYSID);
- rev = id & IMC_SYSID_REVMASK;
-
- /* EISA exists on Indigo2 only */
- if (sys_config.system_type != SGI_IP20 &&
- sys_config.system_subtype == IP22_INDIGO2)
- have_eisa = (id & IMC_SYSID_HAVEISA) != 0;
- else
- have_eisa = 0;
-
- printf(": revision %d\n", rev);
-
- /* Clear CPU/GIO error status registers to clear any leftover bits. */
- imc_bus_reset();
-
- /* Disable watchdog if leftover from previous reboot */
- imc_watchdog_cb(self, 0);
-
- /* Hook the bus error handler into the ISR */
- set_intr(INTPRI_BUSERR, CR_INT_4, imc_bus_error);
-
- /*
- * Enable parity reporting on GIO/main memory transactions, except
- * on systems with the ECC memory controller, where enabling parity
- * interferes with regular operation and causes sticky false errors.
- *
- * Disable parity checking on CPU bus transactions (as turning
- * it on seems to cause spurious bus errors), but enable parity
- * checking on CPU reads from main memory (note that this bit
- * has the opposite sense... Turning it on turns the checks off!).
- *
- * Finally, turn on interrupt writes to the CPU from the MC.
- */
- reg = imc_read(IMC_CPUCTRL0);
- if (ip22_ecc)
- reg &= ~(IMC_CPUCTRL0_GPR | IMC_CPUCTRL0_MPR);
- else
- reg |= IMC_CPUCTRL0_GPR | IMC_CPUCTRL0_MPR;
- reg &= ~IMC_CPUCTRL0_NCHKMEMPAR;
- reg |= IMC_CPUCTRL0_INTENA;
- imc_write(IMC_CPUCTRL0, reg);
-
- /* Setup the MC write buffer depth */
- /*
- * XXX This hardcoded value is not documented anywhere, and can be
- * XXX traced back to DaveM's internship at SGI in 1996, so it can
- * XXX be considered correct at least for IP24 (and, to a lesser
- * XXX extent, IP22). IP20 and IP28 systems seem to run happy with
- * XXX this value as well.
- */
- reg = imc_read(IMC_CPUCTRL1);
- reg = (reg & ~IMC_CPUCTRL1_MCHWMSK) | 13;
-
- /*
- * Force endianness on the onboard HPC and both slots.
- * This should be safe for Fullhouse, but leave it conditional
- * for now.
- */
- switch (sys_config.system_type) {
- case SGI_IP22:
- if (sys_config.system_subtype == IP22_INDIGO2)
- break;
- /* FALLTHROUGH */
- case SGI_IP20:
- reg |= IMC_CPUCTRL1_HPCFX;
- reg |= IMC_CPUCTRL1_EXP0FX;
- reg |= IMC_CPUCTRL1_EXP1FX;
- reg &= ~IMC_CPUCTRL1_HPCLITTLE;
- reg &= ~IMC_CPUCTRL1_EXP0LITTLE;
- reg &= ~IMC_CPUCTRL1_EXP1LITTLE;
- break;
- }
- imc_write(IMC_CPUCTRL1, reg);
-
- /*
- * Try and read the GIO64 arbitrator configuration register value.
- * See comments above the declaration of imc_arb_value for why we
- * are doing this.
- */
- reg = 0; lastreg = ~reg;
- while (reg != lastreg || (reg & ~0xffff) != 0) {
- lastreg = reg;
- reg = imc_read(IMC_GIO64ARB);
- /* read another harmless register */
- (void)imc_read(IMC_CPUCTRL0);
- }
-
- /*
- * Set GIO64 arbitrator configuration register:
- *
- * Preserve PROM-set graphics-related bits, as they seem to depend
- * on the graphics variant present and I'm not sure how to figure
- * that out or 100% sure what the correct settings are for each.
- */
- reg &= (IMC_GIO64ARB_GRX64 | IMC_GIO64ARB_GRXRT | IMC_GIO64ARB_GRXMST);
-
- /*
- * Rest of settings are machine/board dependent
- */
- switch (sys_config.system_type) {
- case SGI_IP20:
- reg |= IMC_GIO64ARB_ONEGIO;
- reg |= IMC_GIO64ARB_EXP0RT | IMC_GIO64ARB_EXP1RT;
- reg |= IMC_GIO64ARB_EXP0MST | IMC_GIO64ARB_EXP1MST;
- reg &= ~(IMC_GIO64ARB_HPC64 |
- IMC_GIO64ARB_HPCEXP64 | IMC_GIO64ARB_EISA64 |
- IMC_GIO64ARB_EXP064 | IMC_GIO64ARB_EXP164 |
- IMC_GIO64ARB_EXP0PIPE | IMC_GIO64ARB_EXP1PIPE);
- break;
- default:
- /*
- * GIO64 invariant for all IP22 platforms: one GIO bus,
- * HPC1 @ 64
- */
- reg |= IMC_GIO64ARB_ONEGIO | IMC_GIO64ARB_HPC64;
-
- switch (sys_config.system_subtype) {
- default:
- case IP22_INDY:
- case IP22_CHALLS:
- /* XXX is MST mutually exclusive? */
- reg |= IMC_GIO64ARB_EXP0RT | IMC_GIO64ARB_EXP1RT;
- reg |= IMC_GIO64ARB_EXP0MST | IMC_GIO64ARB_EXP1MST;
-
- /* EISA (VINO, really) can bus-master, is 64-bit */
- reg |= IMC_GIO64ARB_EISAMST | IMC_GIO64ARB_EISA64;
- break;
-
- case IP22_INDIGO2:
- /*
- * All Fullhouse boards have a 64-bit HPC2 and pipelined
- * EXP0 slot.
- */
- reg |= IMC_GIO64ARB_HPCEXP64 | IMC_GIO64ARB_EXP0PIPE;
-
- /*
- * The EISA bus is the real thing, and is a 32-bit bus.
- */
- reg &= ~IMC_GIO64ARB_EISA64;
-
- if (rev < 2) {
- /* EXP0 realtime, EXP1 can master */
- reg |= IMC_GIO64ARB_EXP0RT |
- IMC_GIO64ARB_EXP1MST;
- } else {
- /* EXP1 pipelined as well, EISA masters */
- reg |= IMC_GIO64ARB_EXP1PIPE |
- IMC_GIO64ARB_EISAMST;
- }
- break;
- }
- }
-
- imc_write(IMC_GIO64ARB, reg);
- imc_arb_value = reg;
-
- memset(&iaa, 0, sizeof(iaa));
- iaa.iaa_name = "gio";
- iaa.iaa_st = &imcbus_tag;
- iaa.iaa_dmat = &imc_bus_dma_tag;
- config_found(self, &iaa, imc_print);
-
-#if NEISA > 0
- if (have_eisa) {
- memset(&eba, 0, sizeof(eba));
- eba.eba_busname = "eisa";
- eba.eba_iot = &imcbus_eisa_io_tag;
- eba.eba_memt = &imcbus_eisa_mem_tag;
- eba.eba_dmat = &imc_bus_dma_tag;
- eba.eba_ec = NULL;
- config_found(self, &eba, imc_print);
- }
-#endif
-
-#ifndef SMALL_KERNEL
- /* Register watchdog */
- wdog_register(imc_watchdog_cb, self);
-#endif
-}
-
-int
-imc_activate(struct device *self, int act)
-{
- int rv = 0;
-
- switch (act) {
- case DVACT_POWERDOWN:
-#ifndef SMALL_KERNEL
- wdog_shutdown(self);
-#endif
- rv = config_activate_children(self, act);
- break;
- }
-
- return (rv);
-}
-
-int
-imc_print(void *aux, const char *name)
-{
- struct imc_attach_args *iaa = aux;
-
- if (name != NULL)
- printf("%s at %s", iaa->iaa_name, name);
-
- return UNCONF;
-}
-
-void
-imc_bus_reset()
-{
- imc_write(IMC_CPU_ERRSTAT, 0);
- imc_write(IMC_GIO_ERRSTAT, 0);
-}
-
-uint32_t
-imc_bus_error(uint32_t hwpend, struct trapframe *tf)
-{
- uint32_t cpustat, giostat;
- paddr_t cpuaddr, gioaddr;
- int cpuquiet = 0, gioquiet = 0;
-
- cpustat = imc_read(IMC_CPU_ERRSTAT);
- giostat = imc_read(IMC_GIO_ERRSTAT);
-
- if (sys_config.system_type == SGI_IP26) {
- /*
- * We are sharing the bus error interrupt with the streaming
- * cache controller. This interrupt might not be ours.
- */
- if (cpustat == 0 && giostat == 0)
- return 0;
- }
-
- if (cpustat != 0)
- cpuaddr = imc_read(IMC_CPU_ERRADDR);
- if (giostat != 0)
- gioaddr = imc_read(IMC_GIO_ERRADDR);
-
- switch (sys_config.system_type) {
- case SGI_IP28:
- /*
- * R10000 speculative execution may attempt to access
- * non-existing memory when in the kernel. We do not
- * want to flood the console about those.
- */
- if (cpustat & IMC_CPU_ERRSTAT_ADDR) {
- if (IS_XKPHYS((vaddr_t)tf->pc))
- cpuquiet = 1;
- }
- if (giostat != 0) {
- /*
- * Ignore speculative writes to interrupt controller
- * registers.
- */
- if ((giostat & IMC_ECC_ERRSTAT_FUW) &&
- (gioaddr & ~0x3f) == INT2_IP22)
- gioquiet = 1;
- /* XXX is it wise to hide these? */
- if ((giostat & IMC_GIO_ERRSTAT_TMO) &&
- !IS_GIO_ADDRESS(gioaddr))
- gioquiet = 1;
- }
- break;
- }
-
- if (cpustat != 0 && cpuquiet == 0) {
- vaddr_t pc = tf->pc;
- uint32_t insn = 0xffffffff;
-
- if (tf->pc < 0)
- guarded_read_4(pc, &insn);
- else
- copyin((void *)pc, &insn, sizeof insn);
-
- printf("bus error: cpu_stat %08x addr %08lx pc %p insn %08x\n",
- cpustat, cpuaddr, (void *)pc, insn);
- }
- if (giostat != 0 && gioquiet == 0) {
- printf("bus error: gio_stat %08x addr %08lx\n",
- giostat, gioaddr);
- }
-
- if (cpustat != 0)
- imc_write(IMC_CPU_ERRSTAT, 0);
- if (giostat != 0)
- imc_write(IMC_GIO_ERRSTAT, 0);
-
- return hwpend;
-}
-
-int
-imc_watchdog_cb(void *v, int period)
-{
- uint32_t reg;
-
- if (period == 0) {
- /* reset... */
- imc_write(IMC_WDOG, 0);
- /* ...and disable */
- reg = imc_read(IMC_CPUCTRL0);
- reg &= ~(IMC_CPUCTRL0_WDOG);
- imc_write(IMC_CPUCTRL0, reg);
-
- return 0;
- } else {
- /* enable... */
- reg = imc_read(IMC_CPUCTRL0);
- reg |= IMC_CPUCTRL0_WDOG;
- imc_write(IMC_CPUCTRL0, reg);
- /* ...and reset */
- imc_write(IMC_WDOG, 0);
-
- /*
- * The watchdog period is not controllable; it will fire
- * when the 20 bit counter, running on a 64 usec clock,
- * overflows.
- */
- return (64 << 20) / 1000000;
- }
-}
-
-/* intended to be called from gio/gio.c only */
-int
-imc_gio64_arb_config(int slot, uint32_t flags)
-{
- uint32_t reg;
-
- if (sys_config.system_type == SGI_IP20 ||
- sys_config.system_subtype != IP22_INDIGO2) {
- /* GIO_SLOT_GFX is only usable on Fullhouse */
- if (slot == GIO_SLOT_GFX)
- return EINVAL;
- } else {
- /* GIO_SLOT_EXP1 is unusable on Fullhouse */
- if (slot == GIO_SLOT_EXP1)
- return EINVAL;
- }
-
- /* GIO_SLOT_GFX is always pipelined */
- if (slot == GIO_SLOT_GFX && (flags & GIO_ARB_NOPIPE))
- return EINVAL;
-
- /* IP20 does not support pipelining (XXX what about Indy?) */
- if (((flags & GIO_ARB_PIPE) || (flags & GIO_ARB_NOPIPE)) &&
- sys_config.system_type == SGI_IP20)
- return EINVAL;
-
- reg = imc_arb_value;
-
- if (flags & GIO_ARB_RT) {
- if (slot == GIO_SLOT_EXP0)
- reg |= IMC_GIO64ARB_EXP0RT;
- else if (slot == GIO_SLOT_EXP1)
- reg |= IMC_GIO64ARB_EXP1RT;
- else if (slot == GIO_SLOT_GFX)
- reg |= IMC_GIO64ARB_GRXRT;
- }
-
- if (flags & GIO_ARB_MST) {
- if (slot == GIO_SLOT_EXP0)
- reg |= IMC_GIO64ARB_EXP0MST;
- else if (slot == GIO_SLOT_EXP1)
- reg |= IMC_GIO64ARB_EXP1MST;
- else if (slot == GIO_SLOT_GFX)
- reg |= IMC_GIO64ARB_GRXMST;
- }
-
- if (flags & GIO_ARB_PIPE) {
- if (slot == GIO_SLOT_EXP0)
- reg |= IMC_GIO64ARB_EXP0PIPE;
- else if (slot == GIO_SLOT_EXP1)
- reg |= IMC_GIO64ARB_EXP1PIPE;
- }
-
- if (flags & GIO_ARB_LB) {
- if (slot == GIO_SLOT_EXP0)
- reg &= ~IMC_GIO64ARB_EXP0RT;
- else if (slot == GIO_SLOT_EXP1)
- reg &= ~IMC_GIO64ARB_EXP1RT;
- else if (slot == GIO_SLOT_GFX)
- reg &= ~IMC_GIO64ARB_GRXRT;
- }
-
- if (flags & GIO_ARB_SLV) {
- if (slot == GIO_SLOT_EXP0)
- reg &= ~IMC_GIO64ARB_EXP0MST;
- else if (slot == GIO_SLOT_EXP1)
- reg &= ~IMC_GIO64ARB_EXP1MST;
- else if (slot == GIO_SLOT_GFX)
- reg &= ~IMC_GIO64ARB_GRXMST;
- }
-
- if (flags & GIO_ARB_NOPIPE) {
- if (slot == GIO_SLOT_EXP0)
- reg &= ~IMC_GIO64ARB_EXP0PIPE;
- else if (slot == GIO_SLOT_EXP1)
- reg &= ~IMC_GIO64ARB_EXP1PIPE;
- }
-
- if (flags & GIO_ARB_32BIT) {
- if (slot == GIO_SLOT_EXP0)
- reg &= ~IMC_GIO64ARB_EXP064;
- else if (slot == GIO_SLOT_EXP1)
- reg &= ~IMC_GIO64ARB_EXP164;
- }
-
- if (flags & GIO_ARB_64BIT) {
- if (slot == GIO_SLOT_EXP0)
- reg |= IMC_GIO64ARB_EXP064;
- else if (slot == GIO_SLOT_EXP1)
- reg |= IMC_GIO64ARB_EXP164;
- }
-
- if (flags & GIO_ARB_HPC2_32BIT)
- reg &= ~IMC_GIO64ARB_HPCEXP64;
-
- if (flags & GIO_ARB_HPC2_64BIT)
- reg |= IMC_GIO64ARB_HPCEXP64;
-
- imc_write(IMC_GIO64ARB, reg);
- imc_arb_value = reg;
-
- return 0;
-}
-
-/*
- * According to chapter 19 of the "IRIX Device Driver Programmer's Guide",
- * some GIO devices, which do not drive all data lines, may cause false
- * memory read parity errors on the SysAD bus. The workaround is to disable
- * parity checking.
- */
-void
-imc_disable_sysad_parity(void)
-{
- uint32_t reg;
-
- if (ip22_ecc)
- return;
-
- reg = imc_read(IMC_CPUCTRL0);
- reg |= IMC_CPUCTRL0_NCHKMEMPAR;
- imc_write(IMC_CPUCTRL0, reg);
-}
-
-void
-imc_enable_sysad_parity(void)
-{
- uint32_t reg;
-
- if (ip22_ecc)
- return;
-
- reg = imc_read(IMC_CPUCTRL0);
- reg &= ~IMC_CPUCTRL0_NCHKMEMPAR;
- imc_write(IMC_CPUCTRL0, reg);
-}
-
-#if 0
-int
-imc_is_sysad_parity_enabled(void)
-{
- uint32_t reg;
-
- if (ip22_ecc)
- return 0;
-
- reg = imc_read(IMC_CPUCTRL0);
- return ~reg & IMC_CPUCTRL0_NCHKMEMPAR;
-}
-#endif
+++ /dev/null
-/* $OpenBSD: imcreg.h,v 1.5 2014/07/02 17:44:35 miod Exp $ */
-/* $NetBSD: imcreg.h,v 1.4 2005/12/11 12:18:52 christos Exp $ */
-
-/*
- * Copyright (c) 2001 Rafal K. Boni
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#define IMC_BASE 0x1fa00000
-
-#define IMC_CPUCTRL0 0x04 /* CPU control, register 0 */
-
-#define IMC_CPUCTRL0_REFMASK 0x0000000f /* # lines to refresh */
-#define IMC_CPUCTRL0_RFE 0x00000010 /* refresh enable */
-#define IMC_CPUCTRL0_GPR 0x00000020 /* GIO parity enable */
-#define IMC_CPUCTRL0_MPR 0x00000040 /* memory parity enable */
-#define IMC_CPUCTRL0_CPR 0x00000080 /* cpu bus parity enable */
-#define IMC_CPUCTRL0_WDOG 0x00000100 /* watchdog enable */
-#define IMC_CPUCTRL0_SIN 0x00000200 /* reset system */
-#define IMC_CPUCTRL0_GRR 0x00000400 /* graphics reset */
-#define IMC_CPUCTRL0_ENLOCK 0x00000800 /* enable EISA memory lock */
-#define IMC_CPUCTRL0_CMDPAR 0x00001000 /* SysCmd parity enable */
-#define IMC_CPUCTRL0_INTENA 0x00002000 /* enable CPU interrupts */
-#define IMC_CPUCTRL0_SNOOPENA 0x00004000 /* enable gfx DMA snoop */
-#define IMC_CPUCTRL0_PROM_WRENA 0x00008000 /* disable buserr on PROM
- * writes */
-#define IMC_CPUCTRL0_WRST 0x00010000 /* warm restart (reset cpu) */
-/* Bit 17 reserved 0x00020000 */
-#define IMC_CPUCTRL0_LITTLE 0x00040000 /* MC little-endian toggle */
-#define IMC_CPUCTRL0_WRRST 0x00080000 /* cpu warm reset */
-#define IMC_CPUCTRL0_MUXHWMSK 0x01f00000 /* MUX fifo high-water mask */
-#define IMC_CPUCTRL0_BADPAR 0x02000000 /* generate bad parity on
- * CPU->memory writes */
-#define IMC_CPUCTRL0_NCHKMEMPAR 0x04000000 /* disable CPU parity check
- * on memory reads. */
-#define IMC_CPUCTRL0_BACK2 0x08000000 /* enable back2back GIO wrt */
-#define IMC_CPUCTRL0_BUSRTMSK 0xf0000000 /* stall cycle for berr data */
-
-#define IMC_CPUCTRL1 0x0c /* CPU control, register 1 */
-#define IMC_CPUCTRL1_MCHWMSK 0x0000000f /* MC FIFO high water mask */
-#define IMC_CPUCTRL1_ABORTEN 0x00000010 /* Enable GIO bus timeouts */
-/* Bits 5 - 11 reserved 0x00000fe0 */
-#define IMC_CPUCTRL1_HPCFX 0x00001000 /* HPC endian fix */
-#define IMC_CPUCTRL1_HPCLITTLE 0x00002000 /* HPC DMA is little-endian */
-#define IMC_CPUCTRL1_EXP0FX 0x00004000 /* EXP0 endian fix */
-#define IMC_CPUCTRL1_EXP0LITTLE 0x00008000 /* EXP0 DMA is little-endian */
-#define IMC_CPUCTRL1_EXP1FX 0x00010000 /* EXP1 endian fix */
-#define IMC_CPUCTRL1_EXP1LITTLE 0x00020000 /* EXP1 DMA is little-endian */
-
-#define IMC_WDOG 0x14 /* Watchdog counter */
-#define IMC_WDOG_MASK 0x001fffff /* counter mask */
-
-#define IMC_SYSID 0x1c /* MC revision register */
-#define IMC_SYSID_REVMASK 0x0000000f /* MC revision mask */
-#define IMC_SYSID_HAVEISA 0x00000010 /* EISA present */
-
-#define IMC_RPSSDIV 0x2c /* RPSS divider */
-#define IMC_RPSSDIV_DIVMSK 0x000000ff /* RPC divider mask */
-#define IMC_RPSSDIV_INCMSK 0x0000ff00 /* RPC increment mask */
-
-#define IMC_EEPROM 0x34 /* EEPROM serial interface */
-/* Bit 1 is reserved 0x00000001 */
-#define IMC_EEPROM_CS 0x00000002 /* EEPROM chip select */
-#define IMC_EEPROM_SCK 0x00000004 /* EEPROM serial clock */
-#define IMC_EEPROM_SO 0x00000008 /* Serial data to EEPROM */
-#define IMC_EEPROM_SI 0x00000010 /* Serial data from EEPROM */
-
-#define IMC_CTRLD 0x44 /* Refresh counter preload */
-#define IMC_CTRLD_MSK 0x000000ff /* Counter preload mask */
-
-#define IMC_REFCTR 0x4c /* Refresh counter */
-#define IMC_REFCTR_MSK 0x000000ff /* Refresh counter mask */
-
-#define IMC_GIO64ARB 0x84 /* GIO64 arbitration params */
-#define IMC_GIO64ARB_HPC64 0x00000001 /* HPC addr size (32/64bit) */
-#define IMC_GIO64ARB_GRX64 0x00000002 /* Gfx addr size (32/64bit) */
-#define IMC_GIO64ARB_EXP064 0x00000004 /* EXP0 addr size (32/64bit) */
-#define IMC_GIO64ARB_EXP164 0x00000008 /* EXP1 addr size (32/64bit) */
-#define IMC_GIO64ARB_EISA64 0x00000010 /* EISA addr size (32/64bit) */
-#define IMC_GIO64ARB_HPCEXP64 0x00000020 /* HPC2 addr size (32/64bit) */
-#define IMC_GIO64ARB_GRXRT 0x00000040 /* Gfx is realtime device */
-#define IMC_GIO64ARB_EXP0RT 0x00000080 /* EXP0 is realtime device */
-#define IMC_GIO64ARB_EXP1RT 0x00000100 /* EXP1 is realtime device */
-#define IMC_GIO64ARB_EISAMST 0x00000200 /* EISA can be busmaster */
-#define IMC_GIO64ARB_ONEGIO 0x00000400 /* Only one GIO64 bus */
-#define IMC_GIO64ARB_GRXMST 0x00000800 /* Gfx can be busmaster */
-#define IMC_GIO64ARB_EXP0MST 0x00001000 /* EXP0 can be busmaster */
-#define IMC_GIO64ARB_EXP1MST 0x00002000 /* EXP1 can be busmaster */
-#define IMC_GIO64ARB_EXP0PIPE 0x00004000 /* EXP0 is pipelined */
-#define IMC_GIO64ARB_EXP1PIPE 0x00008000 /* EXP1 is pipelined */
-
-#define IMC_CPUTIME 0x8c /* Arbiter CPU time period */
-
-#define IMC_LBTIME 0x9c /* Arbiter long-burst time */
-
-#define IMC_MEMCFG0 0xc4 /* Mem config, register 0 */
-#define IMC_MEMCFG1 0xcc /* Mem config, register 1 */
-#define IMC_MEMC_BANK_MASK 0x0000ffff
-#define IMC_MEMC_BANK_SHIFT 16
-#define IMC_MEMC_ADDR_MASK 0x00ff
-#define IMC_MEMC_ADDR_SHIFT 0
-#define IMC_MEMC_SIZE_MASK 0x1f00
-#define IMC_MEMC_SIZE_SHIFT 8
-#define IMC_MEMC_LSHIFT 22 /* 4MB units */
-#define IMC_MEMC_LSHIFT_HUGE 24 /* 16MB units */
-#define IMC_MEMC_VALID 0x2000
-#define IMC_MEMC_SUBBANKS 0x4000
-
-#define IMC_CPU_MEMACC 0xd4 /* CPU mem access config */
-
-#define IMC_GIO_MEMACC 0xdc /* GIO mem access config */
-
-#define IMC_CPU_ERRADDR 0xe4 /* CPU error address */
-#define IMC_CPU_ERRSTAT 0xec /* CPU error status */
-#define IMC_CPU_ERRSTAT_RD 0x00000100 /* memory parity error */
-#define IMC_CPU_ERRSTAT_PAR 0x00000200 /* CPU parity error */
-#define IMC_CPU_ERRSTAT_ADDR 0x00000400 /* memory bus error */
-#define IMC_CPU_ERRSTAT_SYSAD 0x00000800 /* SysAD parity error */
-#define IMC_CPU_ERRSTAT_SYSCMD 0x00001000 /* syscmd parity error */
-
-#define IMC_GIO_ERRADDR 0xf4 /* GIO error address */
-#define IMC_GIO_ERRSTAT 0xfc /* GIO error status */
-#define IMC_GIO_ERRSTAT_RD 0x00000100 /* read parity error */
-#define IMC_GIO_ERRSTAT_WR 0x00000200 /* write parity error */
-#define IMC_GIO_ERRSTAT_TMO 0x00000400 /* bus timeout */
-#define IMC_GIO_ERRSTAT_PROM 0x00000800 /* PROM write while disabled */
-#define IMC_GIO_ERRSTAT_ADDR 0x00001000 /* parity error during */
- /* address cycle */
-#define IMC_GIO_ERRSTAT_BC 0x00002000 /* parity error during */
- /* byte count cycle */
-#define IMC_GIO_ERRSTAT_PIO_RD 0x00004000 /* data parity error during */
- /* PIO read */
-#define IMC_GIO_ERRSTAT_PIO_WR 0x00008000 /* data parity error during */
- /* PIO write */
-/* {CPU,GIO}_ERRSTAT bits in ECC mode */
-#define IMC_ECC_ERRSTAT_FUW 0x00000001 /* fast mode uncached write */
-#define IMC_ECC_ERRSTAT_MULTI 0x00000002 /* multi bit error */
-
-#define IMC_RPSS 0x1004 /* RPSS counter */
-
-/*
- * IP26/IP28 ECC Controller defines
- */
-
-#define ECC_BASE 0x60000000
-/* control register */
-#define ECC_CTRL 0x00
-#define ECC_CTRL_ENABLE 0x00000000 /* fast mode */
-#define ECC_CTRL_DISABLE 0x00010000 /* slow mode */
-#define ECC_CTRL_WRITE 0x00020000 /* write low bits to chip */
-#define ECC_CTRL_INT_CLR 0x00030000 /* clear pending interrupts */
-#define ECC_CTRL_CHK_ENABLE 0x00050000 /* enable ECC err generation */
-#define ECC_CTRL_CHK_DISABLE 0x00060000 /* disable ECC err generation */
-
-/* ecc control chip modes */
-#define ECC_MODE_PASSTHROUGH 0x0002 /* error detection only */
-#define ECC_MODE_NORMAL 0x0003 /* error detection and correction */
+++ /dev/null
-/* $OpenBSD: imcvar.h,v 1.3 2012/09/29 21:46:02 miod Exp $ */
-/* $NetBSD: imcvar.h,v 1.1 2006/08/30 23:44:52 rumble Exp $ */
-
-/*
- * Copyright (c) 2006 Stephen M. Rumble
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-struct imc_attach_args {
- const char *iaa_name;
- bus_space_tag_t iaa_st;
- bus_dma_tag_t iaa_dmat;
-};
-
-void imc_bus_reset(void);
-int imc_gio64_arb_config(int, uint32_t);
-void imc_disable_sysad_parity(void);
-void imc_enable_sysad_parity(void);
-int imc_is_sysad_parity_enabled(void);
-
-#define imc_read(o) \
- *(volatile uint32_t *)PHYS_TO_XKPHYS(IMC_BASE + (o), CCA_NC)
-#define imc_write(o,v) \
- *(volatile uint32_t *)PHYS_TO_XKPHYS(IMC_BASE + (o), CCA_NC) = (v)
-
-uint8_t imc_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-uint16_t imc_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-void imc_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void imc_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, uint8_t);
-void imc_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, uint16_t);
-void imc_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-uint32_t imc_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-uint64_t imc_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-void imc_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, uint32_t);
-void imc_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, uint64_t);
-void imc_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void imc_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-void imc_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void imc_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-int imc_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-void imc_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-int imc_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, bus_space_handle_t *);
-void *imc_space_vaddr(bus_space_tag_t, bus_space_handle_t);
-
-extern struct machine_bus_dma_tag imc_bus_dma_tag;
-extern bus_space_t imcbus_tag;
+++ /dev/null
-/* $OpenBSD: int.c,v 1.15 2018/02/24 11:42:31 visa Exp $ */
-/* $NetBSD: int.c,v 1.24 2011/07/01 18:53:46 dyoung Exp $ */
-
-/*
- * Copyright (c) 2009 Stephen M. Rumble
- * Copyright (c) 2004 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * INT2 (IP20, IP22) / INT3 (IP24) interrupt controllers
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/atomic.h>
-
-#include <mips64/archtype.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/intr.h>
-
-#include <dev/ic/i8253reg.h>
-
-#include <sgi/localbus/intreg.h>
-#include <sgi/localbus/intvar.h>
-#include <sgi/sgi/ip22.h>
-
-int int2_match(struct device *, void *, void *);
-void int2_attach(struct device *, struct device *, void *);
-int int2_mappable_intr(void *);
-
-const struct cfattach int_ca = {
- sizeof(struct device), int2_match, int2_attach
-};
-
-struct cfdriver int_cd = {
- NULL, "int", DV_DULL
-};
-
-paddr_t int2_base;
-paddr_t int2_get_base(void);
-
-#define int2_read(r) *(volatile uint8_t *)(int2_base + (r))
-#define int2_write(r, v) *(volatile uint8_t *)(int2_base + (r)) = (v)
-
-void int_8254_cal(void);
-void int_8254_startclock(struct cpu_info *);
-uint32_t int_8254_intr0(uint32_t, struct trapframe *);
-
-/*
- * INT2 Interrupt handling declarations: 16 local sources on 2 levels.
- *
- * In addition to this, INT3 provides 8 so-called mappable interrupts, which
- * are cascaded to either one of the unused two INT2 VME interrupts.
- * To make things easier from a software viewpoint, we pretend there are
- * 16 of them - one set of 8 per cascaded interrupt. This allows for
- * faster recognition on where to connect these interrupts - as long as
- * interrupt vector assignment makes sure no mappable interrupt is
- * registered on both cascaded interrupts.
- */
-
-struct int2_intrhand {
- struct intrhand ih;
- uint32_t flags;
-#define IH_FL_DISABLED 0x01
-};
-
-#define INT2_NINTS (8 + 8 + 2 * 8)
-struct int2_intrhand *int2_intrhand[INT2_NINTS];
-
-uint32_t int2_intem;
-uint8_t int2_l0imask[NIPLS], int2_l1imask[NIPLS];
-
-void int2_splx(int);
-uint32_t int2_l0intr(uint32_t, struct trapframe *);
-void int2_l0makemasks(void);
-uint32_t int2_l1intr(uint32_t, struct trapframe *);
-void int2_l1makemasks(void);
-
-/*
- * Level 0 interrupt handler.
- */
-
-uint32_t save_l0imr, save_l0isr, save_l0ipl;
-#define INTR_FUNCTIONNAME int2_l0intr
-#define MASK_FUNCTIONNAME int2_l0makemasks
-
-#define INTR_LOCAL_DECLS
-#define MASK_LOCAL_DECLS
-#define INTR_GETMASKS \
-do { \
- isr = int2_read(INT2_LOCAL0_STATUS); \
- imr = int2_read(INT2_LOCAL0_MASK); \
- bit = 7; \
-save_l0isr = isr; save_l0imr = imr; save_l0ipl = frame->ipl; \
-} while (0)
-#define INTR_MASKPENDING \
- int2_write(INT2_LOCAL0_MASK, imr & ~isr)
-#define INTR_IMASK(ipl) int2_l0imask[ipl]
-#define INTR_HANDLER(bit) (struct intrhand *)int2_intrhand[bit + 0]
-#define INTR_SPURIOUS(bit) \
-do { \
- printf("spurious int2 interrupt %d\n", bit); \
-} while (0)
-/* explicit masking with int2_intem to cope with handlers disabling themselves */
-#define INTR_MASKRESTORE \
- int2_write(INT2_LOCAL0_MASK, int2_intem & imr)
-#define INTR_MASKSIZE 8
-
-#define INTR_HANDLER_SKIP(ih) \
- (((struct int2_intrhand *)(ih))->flags /* & IH_FL_DISABLED */)
-
-#include <sgi/sgi/intr_template.c>
-
-/*
- * Level 1 interrupt handler.
- */
-
-uint32_t save_l1imr, save_l1isr, save_l1ipl;
-#define INTR_FUNCTIONNAME int2_l1intr
-#define MASK_FUNCTIONNAME int2_l1makemasks
-
-#define INTR_LOCAL_DECLS
-#define MASK_LOCAL_DECLS
-#define INTR_GETMASKS \
-do { \
- isr = int2_read(INT2_LOCAL1_STATUS); \
- imr = int2_read(INT2_LOCAL1_MASK); \
- bit = 7; \
-save_l1isr = isr; save_l1imr = imr; save_l1ipl = frame->ipl; \
-} while (0)
-#define INTR_MASKPENDING \
- int2_write(INT2_LOCAL1_MASK, imr & ~isr)
-#define INTR_IMASK(ipl) int2_l1imask[ipl]
-#define INTR_HANDLER(bit) (struct intrhand *)int2_intrhand[bit + 8]
-#define INTR_SPURIOUS(bit) \
-do { \
- printf("spurious int2 interrupt %d\n", bit + 8); \
-} while (0)
-/* explicit masking with int2_intem to cope with handlers disabling themselves */
-#define INTR_MASKRESTORE \
- int2_write(INT2_LOCAL1_MASK, (int2_intem >> 8) & imr)
-#define INTR_MASKSIZE 8
-
-#define INTR_HANDLER_SKIP(ih) \
- (((struct int2_intrhand *)(ih))->flags /* & IH_FL_DISABLED */)
-
-#include <sgi/sgi/intr_template.c>
-
-void *
-int2_intr_establish(int irq, int level, int (*ih_fun) (void *),
- void *ih_arg, const char *ih_what)
-{
- struct int2_intrhand **p, *q, *ih;
- int s;
-
- level &= ~IPL_MPSAFE;
-
-#ifdef DIAGNOSTIC
- if (irq < 0 || irq >= INT2_NINTS)
- panic("int2_intr_establish: illegal irq %d", irq);
- /* Mappable interrupts can't be above IPL_TTY */
- if ((irq >> 3) >= 2 && level > IPL_TTY)
- return NULL;
-#endif
-
- ih = malloc(sizeof *ih, M_DEVBUF, M_NOWAIT);
- if (ih == NULL)
- return NULL;
-
- ih->ih.ih_next = NULL;
- ih->ih.ih_fun = ih_fun;
- ih->ih.ih_arg = ih_arg;
- ih->ih.ih_level = level;
- ih->ih.ih_irq = irq;
- ih->ih.ih_flags = 0;
- if (ih_what != NULL)
- evcount_attach(&ih->ih.ih_count, ih_what, &ih->ih.ih_irq);
- ih->flags = 0;
-
- s = splhigh();
-
- for (p = &int2_intrhand[irq]; (q = *p) != NULL;
- p = (struct int2_intrhand **)&q->ih.ih_next)
- continue;
- *p = ih;
-
- int2_intem |= 1 << irq;
- switch (irq >> 3) {
- case 0:
- int2_l0makemasks();
- break;
- case 1:
- int2_l1makemasks();
- break;
- /*
- * We do not maintain masks for mappable interrupts. They are
- * masked as a whole, by the level 0 or 1 interrupt they cascade to.
- */
- case 2:
- int2_write(INT2_IP22_MAP_MASK0,
- int2_read(INT2_IP22_MAP_MASK0) | (1 << (irq & 7)));
- break;
- case 3:
- int2_write(INT2_IP22_MAP_MASK1,
- int2_read(INT2_IP22_MAP_MASK1) | (1 << (irq & 7)));
- break;
- }
-
- splx(s); /* will cause hardware mask update */
-
- return ih;
-}
-
-void
-int2_splx(int newipl)
-{
- struct cpu_info *ci = curcpu();
- register_t sr;
-
- ci->ci_ipl = newipl;
-
- sr = disableintr(); /* XXX overkill? */
- int2_write(INT2_LOCAL1_MASK, (int2_intem >> 8) & ~int2_l1imask[newipl]);
- int2_write(INT2_LOCAL0_MASK, int2_intem & ~int2_l0imask[newipl]);
- setsr(sr);
-
- if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT)
- setsoftintr0();
-}
-
-/*
- * Mappable interrupts handler.
- */
-
-int
-int2_mappable_intr(void *arg)
-{
- uint which = (unsigned long)arg;
- vaddr_t imrreg;
- uint64_t imr, isr;
- uint i, intnum;
- struct int2_intrhand *ih;
- int rc, ret;
-
- imrreg = which == 0 ? INT2_IP22_MAP_MASK0 : INT2_IP22_MAP_MASK1;
- isr = int2_read(INT2_IP22_MAP_STATUS);
- imr = int2_read(imrreg);
-
- isr &= imr;
- if (isr == 0)
- return 0; /* not for us */
-
- /*
- * Don't bother masking sources here - all mappable interrupts are
- * tied to either a level 1 or level 0 interrupt, and the dispatcher
- * is registered at IPL_TTY, so we can safely assume we are running
- * at IPL_TTY now.
- */
- for (i = 0; i < 8; i++) {
- intnum = i + 16 + (which << 3);
- if (isr & (1 << i)) {
- rc = 0;
- for (ih = int2_intrhand[intnum]; ih != NULL;
- ih = (struct int2_intrhand *)ih->ih.ih_next) {
- if (ih->flags /* & IH_FL_DISABLED */)
- continue;
- ret = (*ih->ih.ih_fun)(ih->ih.ih_arg);
- if (ret != 0) {
- rc = 1;
- atomic_inc_long((unsigned long *)
- &ih->ih.ih_count.ec_count);
- }
- if (ret == 1)
- break;
- }
- if (rc == 0)
- printf("spurious int2 mapped interrupt %d\n",
- i);
- }
- }
-
- return 1;
-}
-
-int
-int2_match(struct device *parent, void *match, void *aux)
-{
- struct mainbus_attach_args *maa = (void *)aux;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- break;
- default:
- return 0;
- }
-
- return !strcmp(maa->maa_name, int_cd.cd_name);
-}
-
-void
-int2_attach(struct device *parent, struct device *self, void *aux)
-{
- if (int2_base == 0)
- int2_base = int2_get_base();
-
- printf(" addr 0x%lx\n", XKPHYS_TO_PHYS(int2_base));
-
- /* Clean out interrupt masks */
- int2_write(INT2_LOCAL0_MASK, 0);
- int2_write(INT2_LOCAL1_MASK, 0);
- int2_write(INT2_IP22_MAP_MASK0, 0);
- int2_write(INT2_IP22_MAP_MASK1, 0);
-
- /* Reset timer interrupts */
- int2_write(INT2_TIMER_CONTROL,
- TIMER_SEL0 | TIMER_16BIT | TIMER_SWSTROBE);
- int2_write(INT2_TIMER_CONTROL,
- TIMER_SEL1 | TIMER_16BIT | TIMER_SWSTROBE);
- int2_write(INT2_TIMER_CONTROL,
- TIMER_SEL2 | TIMER_16BIT | TIMER_SWSTROBE);
- mips_sync();
- delay(4);
- int2_write(INT2_TIMER_CLEAR, 0x03);
-
- set_intr(INTPRI_L1, CR_INT_1, int2_l1intr);
- set_intr(INTPRI_L0, CR_INT_0, int2_l0intr);
- register_splx_handler(int2_splx);
-
- if (sys_config.system_type != SGI_IP20) {
- /* Wire mappable interrupt handlers */
- int2_intr_establish(INT2_L0_INTR(INT2_L0_IP22_MAP0), IPL_TTY,
- int2_mappable_intr, NULL, NULL);
- int2_intr_establish(INT2_L1_INTR(INT2_L1_IP22_MAP1), IPL_TTY,
- int2_mappable_intr, (void *)1, NULL);
- }
-
- /*
- * The 8254 timer does not interrupt on (some?) IP24 systems.
- */
- if (sys_config.system_type == SGI_IP20 ||
- sys_config.system_subtype == IP22_INDIGO2)
- int_8254_cal();
-}
-
-paddr_t
-int2_get_base(void)
-{
- uint32_t address;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- address = INT2_IP20;
- break;
- default:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- if (sys_config.system_subtype == IP22_INDIGO2)
- address = INT2_IP22;
- else
- address = INT2_IP24;
- break;
- }
-
- return PHYS_TO_XKPHYS((uint64_t)address, CCA_NC);
-}
-
-/*
- * Returns nonzero if the given interrupt source is pending.
- */
-int
-int2_is_intr_pending(int irq)
-{
- paddr_t reg;
-
- if (int2_base == 0)
- int2_base = int2_get_base();
- switch (irq >> 3) {
- case 0:
- reg = INT2_LOCAL0_STATUS;
- break;
- case 1:
- reg = INT2_LOCAL1_STATUS;
- break;
- case 2:
- case 3:
- reg = INT2_IP22_MAP_STATUS;
- break;
- default:
- return 0;
- }
-
- return int2_read(reg) & (1 << (irq & 7));
-}
-
-/*
- * Temporarily disable an interrupt handler. Note that disable/enable
- * calls can not be stacked.
- *
- * The interrupt source will become masked if it is the only handler.
- * (This is intended for panel(4) which is not supposed to be a shared
- * interrupt)
- */
-void
-int2_intr_disable(void *v)
-{
- struct int2_intrhand *ih = (struct int2_intrhand *)v;
- int s;
-
- s = splhigh();
- if ((ih->flags & IH_FL_DISABLED) == 0) {
- ih->flags |= IH_FL_DISABLED;
- if (ih == int2_intrhand[ih->ih.ih_irq] &&
- ih->ih.ih_next == NULL) {
- /* disable interrupt source */
- int2_intem &= ~(1 << ih->ih.ih_irq);
- }
- }
- splx(s);
-}
-
-/*
- * Reenable an interrupt handler.
- */
-void
-int2_intr_enable(void *v)
-{
- struct int2_intrhand *ih = (struct int2_intrhand *)v;
- int s;
-
- s = splhigh();
- if ((ih->flags & IH_FL_DISABLED) != 0) {
- ih->flags &= ~IH_FL_DISABLED;
- if (ih == int2_intrhand[ih->ih.ih_irq] &&
- ih->ih.ih_next == NULL) {
- /* reenable interrupt source */
- int2_intem |= 1 << ih->ih.ih_irq;
- }
- }
- splx(s);
-}
-
-/*
- * A master clock is wired to TIMER_2, which in turn clocks the two other
- * timers. The master frequency is 1MHz.
- *
- * TIMER_0 and TIMER_1 interrupt on HW_INT_2 and HW_INT_3, respectively.
- *
- * NB: Apparently int2 doesn't like counting down from one, but two works.
- */
-
-static struct evcount int_clock_count;
-static int int_clock_irq = 2;
-
-void
-int_8254_cal(void)
-{
- uint freq = 1000000 / 2 / hz;
-
- /* Timer0 is our hz. */
- int2_write(INT2_TIMER_CONTROL,
- TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
- int2_write(INT2_TIMER_0, freq & 0xff);
- mips_sync();
- delay(4);
- int2_write(INT2_TIMER_0, freq >> 8);
-
- /* Timer2 clocks timer0 and timer1. */
- int2_write(INT2_TIMER_CONTROL,
- TIMER_SEL2 | TIMER_RATEGEN | TIMER_16BIT);
- int2_write(INT2_TIMER_2, 2);
- mips_sync();
- delay(4);
- int2_write(INT2_TIMER_2, 0);
-
- set_intr(INTPRI_CLOCK, CR_INT_2, int_8254_intr0);
- evcount_attach(&int_clock_count, "clock", &int_clock_irq);
- md_startclock = int_8254_startclock;
-}
-
-uint32_t
-int_8254_intr0(uint32_t hwpend, struct trapframe *tf)
-{
- struct cpu_info *ci = curcpu();
-
- int2_write(INT2_TIMER_CLEAR, 0x01);
- ci->ci_pendingticks++;
- if (ci->ci_clock_started != 0) {
- if (tf->ipl < IPL_CLOCK) {
- while (ci->ci_pendingticks) {
- int_clock_count.ec_count++;
- hardclock(tf);
- ci->ci_pendingticks--;
- }
- }
- }
-
- return hwpend;
-}
-
-void
-int_8254_startclock(struct cpu_info *ci)
-{
- ci->ci_clock_started++;
-}
+++ /dev/null
-/* $OpenBSD: intreg.h,v 1.2 2012/04/15 20:44:52 miod Exp $ */
-/* $NetBSD: int2reg.h,v 1.5 2009/02/12 06:33:57 rumble Exp $ */
-
-/*
- * Copyright (c) 2004 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* The INT has known locations on all SGI machines */
-#define INT2_IP20 0x1fb801c0
-#define INT2_IP22 0x1fbd9000
-#define INT2_IP24 0x1fbd9880
-
-/* The following registers are all 8 bit. */
-#define INT2_LOCAL0_STATUS 0x03
-#define INT2_LOCAL0_STATUS_FIFO 0x01
-#define INT2_LOCAL0_MASK 0x07
-#define INT2_LOCAL1_STATUS 0x0b
-#define INT2_LOCAL1_MASK 0x0f
-#define INT2_IP22_MAP_STATUS 0x13
-#define INT2_IP22_MAP_MASK0 0x17
-#define INT2_IP22_MAP_MASK1 0x1b
-#define INT2_IP22_MAP_POL 0x1f
-#define INT2_IP20_LED 0x1f
-#define INT2_TIMER_CLEAR 0x23
-#define INT2_ERROR_STATUS 0x27
-#define INT2_TIMER_0 0x33
-#define INT2_TIMER_1 0x37
-#define INT2_TIMER_2 0x3b
-#define INT2_TIMER_CONTROL 0x3f
-
-/* LOCAL0 bits */
-#define INT2_L0_FIFO 0
-#define INT2_L0_GIO_SLOT0 0 /* IP24 */
-#define INT2_L0_GIO_LVL0 0 /* IP20/IP22 */
-#define INT2_L0_IP20_PARALLEL 1
-#define INT2_L0_IP22_SCSI0 1
-#define INT2_L0_SCSI1 2
-#define INT2_L0_ENET 3
-#define INT2_L0_GFX_DMA 4
-#define INT2_L0_IP20_SERIAL 5
-#define INT2_L0_IP22_PARALLEL 5
-#define INT2_L0_GIO_LVL1 6 /* IP20/IP22 */
-#define INT2_L0_IP20_VME0 7
-#define INT2_L0_IP22_MAP0 7
-
-/* LOCAL1 bits */
-#define INT2_L1_IP24_ISDN_ISAC 0
-#define INT2_L1_IP20_GR1MODE 1 /* not an interrupt but a status bit */
-#define INT2_L1_IP22_PANEL 1
-#define INT2_L1_IP24_ISDN_HSCX 2
-#define INT2_L1_IP20_VME1 3
-#define INT2_L1_IP22_MAP1 3
-#define INT2_L1_IP20_DSP 4
-#define INT2_L1_IP22_HPC_DMA 4
-#define INT2_L1_ACFAIL 5
-#define INT2_L1_VIDEO 6
-#define INT2_L1_RETRACE 7
-#define INT2_L1_GIO_LVL2 7 /* IP20/IP22 */
-
-/* MAP bits */
-#define INT2_MAP_NEWPORT 0 /* IP24 */
-#define INT2_MAP_PASSWD 1
-#define INT2_MAP_ISDN_POWER 2 /* IP24 */
-#define INT2_MAP_EISA 3 /* IP22 */
-#define INT2_MAP_PCKBC 4
-#define INT2_MAP_SERIAL 5
-#define INT2_MAP_GFX0_DRAIN 6 /* IP22 */
-#define INT2_MAP_GIO_SLOT0 6 /* IP24 */
-#define INT2_MAP_GFX1_DRAIN 7 /* IP22 */
-#define INT2_MAP_GIO_SLOT1 7 /* IP24 */
-
-#define INT2_L0_INTR(x) ((x) + 0)
-#define INT2_L1_INTR(x) ((x) + 8)
-#define INT2_MAP0_INTR(x) ((x) + 16)
-#define INT2_MAP1_INTR(x) ((x) + 24)
+++ /dev/null
-/* $OpenBSD: intvar.h,v 1.3 2012/04/18 11:01:55 miod Exp $ */
-/* $NetBSD: int2var.h,v 1.3 2008/08/23 17:25:54 tsutsui Exp $ */
-
-/*
- * Copyright (c) 2004 Christopher SEKIYA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-void *int2_intr_establish(int, int, int (*)(void *),
- void *, const char *);
-int int2_is_intr_pending(int);
-void int2_intr_disable(void *);
-void int2_intr_enable(void *);
+++ /dev/null
-/* $OpenBSD: macebus.c,v 1.70 2021/03/11 11:17:00 jsg Exp $ */
-
-/*
- * Copyright (c) 2000-2004 Opsycon AB (www.opsycon.se)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * This is a combined macebus/crimebus driver. It handles configuration of all
- * devices on the processor bus.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/conf.h>
-#include <sys/malloc.h>
-#include <sys/device.h>
-#include <sys/proc.h>
-#include <sys/atomic.h>
-
-#include <mips64/archtype.h>
-#include <mips64/mips_cpu.h>
-
-#include <machine/autoconf.h>
-#include <machine/intr.h>
-
-#include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
-#include <sgi/localbus/macebusvar.h>
-
-int macebusmatch(struct device *, void *, void *);
-void macebusattach(struct device *, struct device *, void *);
-int macebusprint(void *, const char *);
-int macebussubmatch(struct device *, void *, void *);
-
-void macebus_intr_makemasks(void);
-void macebus_splx(int);
-uint32_t macebus_iointr(uint32_t, struct trapframe *);
-uint32_t macebus_aux(uint32_t, struct trapframe *);
-int macebus_iointr_skip(struct intrhand *, uint64_t, uint64_t);
-void crime_setintrmask(int);
-
-u_int8_t mace_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int16_t mace_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int32_t mace_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int64_t mace_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-
-void mace_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int8_t);
-void mace_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int16_t);
-void mace_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int32_t);
-void mace_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int64_t);
-
-void mace_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- u_int8_t *, bus_size_t);
-void mace_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const u_int8_t *, bus_size_t);
-void mace_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- u_int8_t *, bus_size_t);
-void mace_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const u_int8_t *, bus_size_t);
-void mace_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- u_int8_t *, bus_size_t);
-void mace_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const u_int8_t *, bus_size_t);
-
-int mace_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-void mace_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-int mace_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, bus_space_handle_t *);
-
-void *mace_space_vaddr(bus_space_tag_t, bus_space_handle_t);
-void mace_space_barrier(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, int);
-
-bus_addr_t macebus_pa_to_device(paddr_t, int);
-
-struct cfattach macebus_ca = {
- sizeof(struct device), macebusmatch, macebusattach
-};
-
-struct cfdriver macebus_cd = {
- NULL, "macebus", DV_DULL
-};
-
-bus_space_t macebus_tag = {
- PHYS_TO_XKPHYS(MACEBUS_BASE, CCA_NC),
- NULL,
- mace_read_1, mace_write_1,
- mace_read_2, mace_write_2,
- mace_read_4, mace_write_4,
- mace_read_8, mace_write_8,
- mace_read_raw_2, mace_write_raw_2,
- mace_read_raw_4, mace_write_raw_4,
- mace_read_raw_8, mace_write_raw_8,
- mace_space_map, mace_space_unmap, mace_space_region,
- mace_space_vaddr, mace_space_barrier
-};
-
-bus_space_t crimebus_tag = {
- PHYS_TO_XKPHYS(CRIMEBUS_BASE, CCA_NC),
- NULL,
- mace_read_1, mace_write_1,
- mace_read_2, mace_write_2,
- mace_read_4, mace_write_4,
- mace_read_8, mace_write_8,
- mace_read_raw_2, mace_write_raw_2,
- mace_read_raw_4, mace_write_raw_4,
- mace_read_raw_8, mace_write_raw_8,
- mace_space_map, mace_space_unmap, mace_space_region,
- mace_space_vaddr, mace_space_barrier
-};
-
-bus_space_handle_t crime_h;
-bus_space_handle_t mace_h;
-
-struct machine_bus_dma_tag mace_bus_dma_tag = {
- NULL, /* _cookie */
- _dmamap_create,
- _dmamap_destroy,
- _dmamap_load,
- _dmamap_load_mbuf,
- _dmamap_load_uio,
- _dmamap_load_raw,
- _dmamap_load_buffer,
- _dmamap_unload,
- _dmamap_sync,
- _dmamem_alloc,
- _dmamem_free,
- _dmamem_map,
- _dmamem_unmap,
- _dmamem_mmap,
- macebus_pa_to_device,
- CRIME_MEMORY_MASK
-};
-
-/*
- * CRIME/MACE interrupt handling declarations: 32 CRIME sources, 16 MACE
- * sources (multiplexed by CRIME); 1 level.
- * We define another level for periodic tasks as well.
- */
-
-struct crime_intrhand {
- struct intrhand ih;
- uint32_t mace_irqmask;
-};
-struct crime_intrhand *crime_intrhand[CRIME_NINTS];
-
-#define INTPRI_MACEIO (INTPRI_CLOCK + 1)
-#define INTPRI_MACEAUX (INTPRI_MACEIO + 1)
-
-uint64_t crime_intem, mace_intem;
-uint64_t crime_imask[NIPLS];
-
-/*
- * List of macebus child devices.
- */
-
-#define MACEBUSDEV(name, addr, i, i2) \
- { name, &macebus_tag, &macebus_tag, &mace_bus_dma_tag, addr, i, i2 }
-struct macebus_attach_args macebus_children[] = {
- MACEBUSDEV("com", MACE_ISA_SER1_OFFS, 4, MACE_ISA_INT_SERIAL_1),
- MACEBUSDEV("com", MACE_ISA_SER2_OFFS, 4, MACE_ISA_INT_SERIAL_2),
- MACEBUSDEV("dsrtc", MACE_ISA_RTC_OFFS, -1, 0),
-#if 0
- MACEBUSDEV("lpt", MACE_ISA_EPP_OFFS, 4, MACE_ISA_INT_PARALLEL),
-#endif
- MACEBUSDEV("macepcibr", MACE_PCI_OFFS, 7, 0),
- MACEBUSDEV("mavb", MACE_IO_AUDIO_OFFS, 6, MACE_ISA_INT_AUDIO),
- MACEBUSDEV("mec", MACE_ETHERNET_OFFS, 3, 0),
- MACEBUSDEV("mkbc", MACE_IO_KBC_OFFS, 5,
- MACE_ISA_INT_KBD | MACE_ISA_INT_KBD_POLL |
- MACE_ISA_INT_MOUSE | MACE_ISA_INT_MOUSE_POLL),
- MACEBUSDEV("power", 0, 5, MACE_ISA_INT_RTC)
-};
-#undef MACEBUSDEV
-
-/*
- * Match bus only to targets which have this bus.
- */
-int
-macebusmatch(struct device *parent, void *match, void *aux)
-{
- if (sys_config.system_type == SGI_O2)
- return (1);
- return (0);
-}
-
-int
-macebusprint(void *aux, const char *macebus)
-{
- struct macebus_attach_args *maa = aux;
-
- if (macebus != NULL)
- printf("%s at %s", maa->maa_name, macebus);
-
- if (maa->maa_baseaddr != 0)
- printf(" base 0x%08lx", maa->maa_baseaddr);
- if (maa->maa_intr >= 0)
- printf(" irq %d", maa->maa_intr);
-
- return (UNCONF);
-}
-
-int
-macebussubmatch(struct device *parent, void *vcf, void *args)
-{
- struct cfdata *cf = vcf;
- struct macebus_attach_args *maa = args;
-
- if (strcmp(cf->cf_driver->cd_name, maa->maa_name) != 0)
- return 0;
-
- if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)maa->maa_baseaddr)
- return 0;
-
- return (*cf->cf_attach->ca_match)(parent, cf, maa);
-}
-
-void
-macebusattach(struct device *parent, struct device *self, void *aux)
-{
- u_int32_t creg;
- uint i;
-
- /*
- * Map and setup CRIME control registers.
- */
- if (bus_space_map(&crimebus_tag, 0x00000000, 0x400, 0, &crime_h)) {
- printf(": can't map CRIME control registers\n");
- return;
- }
-
- creg = bus_space_read_8(&crimebus_tag, crime_h, CRIME_REVISION);
- printf(": crime rev %d.%d\n", (creg & 0xf0) >> 4, creg & 0xf);
-
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_CPU_ERROR_STAT, 0);
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_MEM_ERROR_STAT, 0);
-
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_MASK, 0);
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_SOFT, 0);
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_HARD, 0);
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_STAT, 0);
-
- /*
- * Map and setup MACE ISA control registers.
- */
- if (bus_space_map(&macebus_tag, MACE_ISA_OFFS, 0x400, 0, &mace_h)) {
- printf("%s: can't map MACE control registers\n",
- self->dv_xname);
- return;
- }
-
- bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK, 0);
- bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_STAT, 0);
-
- /*
- * On O2 systems all interrupts are handled by the macebus interrupt
- * handler. Register all except clock.
- */
- set_intr(INTPRI_MACEIO, CR_INT_0, macebus_iointr);
- register_splx_handler(macebus_splx);
-
- /* Set up a handler called when clock interrupts go off. */
- set_intr(INTPRI_MACEAUX, CR_INT_5, macebus_aux);
-
- /*
- * Attach subdevices.
- */
- for (i = 0; i < nitems(macebus_children); i++)
- config_found_sm(self, macebus_children + i,
- macebusprint, macebussubmatch);
-}
-
-/*
- * Bus access primitives. These are really ugly...
- */
-
-u_int8_t
-mace_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile u_int8_t *)(h + (o << 8) + 7);
-}
-
-u_int16_t
-mace_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- panic(__func__);
-}
-
-u_int32_t
-mace_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile u_int32_t *)(h + o);
-}
-
-u_int64_t
-mace_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile u_int64_t *)(h + o);
-}
-
-void
-mace_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
-{
- *(volatile u_int8_t *)(h + (o << 8) + 7) = v;
-}
-
-void
-mace_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int16_t v)
-{
- panic(__func__);
-}
-
-void
-mace_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int32_t v)
-{
- *(volatile u_int32_t *)(h + o) = v;
-}
-
-void
-mace_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int64_t v)
-{
- *(volatile u_int64_t *)(h + o) = v;
-}
-
-void
-mace_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- u_int8_t *buf, bus_size_t len)
-{
- panic(__func__);
-}
-
-void
-mace_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const u_int8_t *buf, bus_size_t len)
-{
- panic(__func__);
-}
-
-void
-mace_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- u_int8_t *buf, bus_size_t len)
-{
- volatile u_int32_t *addr = (volatile u_int32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *(u_int32_t *)buf = *addr;
- buf += 4;
- }
-}
-
-void
-mace_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const u_int8_t *buf, bus_size_t len)
-{
- volatile u_int32_t *addr = (volatile u_int32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *addr = *(u_int32_t *)buf;
- buf += 4;
- }
-}
-
-void
-mace_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- u_int8_t *buf, bus_size_t len)
-{
- volatile u_int64_t *addr = (volatile u_int64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *(u_int64_t *)buf = *addr;
- buf += 8;
- }
-}
-
-void
-mace_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const u_int8_t *buf, bus_size_t len)
-{
- volatile u_int64_t *addr = (volatile u_int64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *addr = *(u_int64_t *)buf;
- buf += 8;
- }
-}
-
-int
-mace_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
- if (ISSET(flags, BUS_SPACE_MAP_CACHEABLE))
- offs +=
- PHYS_TO_XKPHYS(0, CCA_CACHED) - PHYS_TO_XKPHYS(0, CCA_NC);
- *bshp = t->bus_base + offs;
- return 0;
-}
-
-void
-mace_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
-{
-}
-
-int
-mace_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
- *nbshp = bsh + offset;
- return (0);
-}
-
-void *
-mace_space_vaddr(bus_space_tag_t t, bus_space_handle_t h)
-{
- return (void *)h;
-}
-
-void
-mace_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offs,
- bus_size_t len, int flags)
-{
- mips_sync();
-}
-
-/*
- * Macebus bus_dma helpers.
- * Mace accesses memory contiguously at 0x40000000 onwards.
- */
-
-bus_addr_t
-macebus_pa_to_device(paddr_t pa, int flags)
-{
- return (pa | CRIME_MEMORY_OFFSET);
-}
-
-/*
- * Macebus interrupt handler driver.
- */
-
-/*
- * Establish an interrupt handler called from the dispatcher.
- * The interrupt function established should return zero if there was nothing
- * to serve (no int) and non-zero when an interrupt was serviced.
- */
-void *
-macebus_intr_establish(int irq, uint32_t mace_irqmask, int level,
- int (*ih_fun)(void *), void *ih_arg, const char *ih_what)
-{
- struct crime_intrhand **p, *q, *ih;
- int s;
-
- level &= ~IPL_MPSAFE;
-
-#ifdef DIAGNOSTIC
- if (irq >= CRIME_NINTS || irq < 0)
- panic("intr_establish: illegal irq %d", irq);
-#endif
-
- ih = malloc(sizeof *ih, M_DEVBUF, M_NOWAIT);
- if (ih == NULL)
- return NULL;
-
- ih->ih.ih_next = NULL;
- ih->ih.ih_fun = ih_fun;
- ih->ih.ih_arg = ih_arg;
- ih->ih.ih_level = level;
- ih->ih.ih_irq = irq;
- ih->ih.ih_flags = 0;
- ih->mace_irqmask = mace_irqmask;
- evcount_attach(&ih->ih.ih_count, ih_what, &ih->ih.ih_irq);
-
- s = splhigh();
-
- /*
- * Figure out where to put the handler.
- * This is O(N^2), but we want to preserve the order, and N is
- * generally small.
- */
- for (p = &crime_intrhand[irq]; (q = *p) != NULL;
- p = (struct crime_intrhand **)&q->ih.ih_next)
- ;
- *p = ih;
-
- crime_intem |= 1UL << irq;
- macebus_intr_makemasks();
-
- /* enable further MACE sources if necessary */
- if (mace_irqmask != 0) {
- mace_intem |= mace_irqmask;
- bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK,
- mace_intem);
- }
-
- splx(s); /* causes hw mask update */
-
- return (ih);
-}
-
-void
-macebus_intr_disestablish(void *ih)
-{
- /* XXX */
- panic("%s not implemented", __func__);
-}
-
-void
-macebus_splx(int newipl)
-{
- struct cpu_info *ci = curcpu();
-
- /* Update masks to new ipl. Order highly important! */
- ci->ci_ipl = newipl;
- crime_setintrmask(newipl);
- /* If we still have softints pending trigger processing. */
- if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT)
- setsoftintr0();
-}
-
-/*
- * Crime interrupt handler.
- */
-
-#define INTR_FUNCTIONNAME macebus_iointr
-#define MASK_FUNCTIONNAME macebus_intr_makemasks
-
-#define INTR_LOCAL_DECLS \
- uint64_t mace_isr, mace_imr;
-#define MASK_LOCAL_DECLS
-#define INTR_GETMASKS \
-do { \
- isr = bus_space_read_8(&crimebus_tag, crime_h, CRIME_INT_STAT); \
- imr = bus_space_read_8(&crimebus_tag, crime_h, CRIME_INT_MASK); \
- if (((CRIME_INT_SUPER_IO | CRIME_INT_SUB_MISC | CRIME_INT_SUB_AUDIO) & \
- isr & imr) != 0) { \
- mace_isr = bus_space_read_8(&macebus_tag, mace_h, \
- MACE_ISA_INT_STAT); \
- mace_imr = bus_space_read_8(&macebus_tag, mace_h, \
- MACE_ISA_INT_MASK); \
- } else \
- mace_isr = mace_imr = 0; \
- bit = CRIME_NINTS - 1; \
-} while (0)
-#define INTR_MASKPENDING \
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_MASK, imr & ~isr)
-#define INTR_IMASK(ipl) crime_imask[ipl]
-#define INTR_HANDLER(bit) (struct intrhand *)crime_intrhand[bit]
-#define INTR_SPURIOUS(bit) \
-do { \
- if (((CRIME_INT_SUPER_IO | CRIME_INT_SUB_MISC | CRIME_INT_SUB_AUDIO) & \
- (1 << (bit))) != 0) { \
- if ((mace_isr & mace_imr) != 0) \
- printf("spurious crime interrupt %d" \
- " mace isr %p imr %p\n", \
- bit, (void *)mace_isr, (void *)mace_imr); \
- } else \
- printf("spurious crime interrupt %d\n", bit); \
-} while (0)
-#define INTR_MASKRESTORE \
- bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_MASK, imr)
-#define INTR_MASKSIZE CRIME_NINTS
-
-#define INTR_HANDLER_SKIP(ih) \
- macebus_iointr_skip((void *)ih, mace_isr, mace_imr)
-
-#include <sgi/sgi/intr_template.c>
-
-int
-macebus_iointr_skip(struct intrhand *ih, uint64_t mace_isr, uint64_t mace_imr)
-{
- struct crime_intrhand *mih = (struct crime_intrhand *)ih;
-
- /* do not skip pure CRIME interrupts */
- if (mih->mace_irqmask == 0)
- return 0;
-
- /*
- * Several CRIME interrupts (such as superio and miscellaneous) are
- * shared by multiple devices, so narrow the selection with the
- * MACE interrupt status.
- */
-
- if ((mace_isr & mace_imr & mih->mace_irqmask) != 0)
- return 0;
-
- return 1;
-}
-
-/*
- * Macebus auxiliary functions run each clock interrupt.
- */
-uint32_t
-macebus_aux(uint32_t hwpend, struct trapframe *cf)
-{
- u_int64_t mask;
-
- mask = bus_space_read_8(&macebus_tag, mace_h, MACE_ISA_MISC_REG);
- mask |= MACE_ISA_MISC_RLED_OFF | MACE_ISA_MISC_GLED_OFF;
-
- /* GREEN - Idle */
- /* AMBER - System mode */
- /* RED - User mode */
- if (cf->sr & SR_KSU_USER) {
- mask &= ~MACE_ISA_MISC_RLED_OFF;
- } else if (curproc == NULL ||
- curproc == curcpu()->ci_schedstate.spc_idleproc) {
- mask &= ~MACE_ISA_MISC_GLED_OFF;
- } else {
- mask &= ~(MACE_ISA_MISC_RLED_OFF | MACE_ISA_MISC_GLED_OFF);
- }
- bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_MISC_REG, mask);
-
- return 0; /* Real clock int handler will claim the interrupt. */
-}
-
-void
-crime_setintrmask(int level)
-{
- *(volatile uint64_t *)(PHYS_TO_XKPHYS(CRIMEBUS_BASE, CCA_NC) +
- CRIME_INT_MASK) = crime_intem & ~crime_imask[level];
-}
+++ /dev/null
-/* $OpenBSD: macebus.h,v 1.15 2009/10/26 18:00:06 miod Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.com).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * Physical address of MACEBUS.
- */
-#define MACEBUS_BASE 0x1f000000
-
-/*
- * Offsets for various I/O sections on MACEBUS
- */
-#define MACE_PCI_OFFS 0x00080000
-#define MACE_VIN1_OFFS 0x00100000
-#define MACE_VIN2_OFFS 0x00180000
-#define MACE_VOUT_OFFS 0x00200000
-#define MACE_ETHERNET_OFFS 0x00280000
-#define MACE_IO_OFFS 0x00300000
-#define MACE_IO_SIZE 0x00050000
-#define MACE_ISAX_OFFS 0x00380000
-#define MACE_ISAX_SIZE 0x00020000
-
-/*
- * PCI control registers (relative MACE_PCI_OFFS)
- */
-#define MACE_PCI_ERROR_ADDRESS 0x0000
-#define MACE_PCI_ERROR_FLAGS 0x0004
-#define MACE_PCI_CONTROL 0x0008
-#define MACE_PCI_REVISION 0x000c
-#define MACE_PCI_FLUSH 0x000c
-#define MACE_PCI_CFGADDR 0x0cf8
-#define MACE_PCI_CFGDATA 0x0cfc
-
-#define MACE_PCI_INTCTRL 0x000000ff /* Interrupt control mask */
-
-/* PCI_ERROR_FLAGS Bits */
-#define PERR_MASTER_ABORT 0x80000000
-#define PERR_TARGET_ABORT 0x40000000
-#define PERR_DATA_PARITY_ERR 0x20000000
-#define PERR_RETRY_ERR 0x10000000
-#define PERR_ILLEGAL_CMD 0x08000000
-#define PERR_SYSTEM_ERR 0x04000000
-#define PERR_INTERRUPT_TEST 0x02000000
-#define PERR_PARITY_ERR 0x01000000
-#define PERR_OVERRUN 0x00800000
-#define PERR_RSVD 0x00400000
-#define PERR_MEMORY_ADDR 0x00200000
-#define PERR_CONFIG_ADDR 0x00100000
-#define PERR_MASTER_ABORT_ADDR_VALID 0x00080000
-#define PERR_TARGET_ABORT_ADDR_VALID 0x00040000
-#define PERR_DATA_PARITY_ADDR_VALID 0x00020000
-#define PERR_RETRY_ADDR_VALID 0x00010000
-
-/*
- * MACE IO definitions.
- */
-#define MACE_IO_AUDIO_OFFS (MACE_IO_OFFS+0x00000000)
-#define MACE_IO_KBC_OFFS (MACE_IO_OFFS+0x00020000)
-
-/*
- * MACE ISA definitions.
- */
-#define MACE_ISA_OFFS (MACE_IO_OFFS+0x00010000)
-
-#define MACE_ISA_RING_BASE 0x0000
-#define MACE_ISA_RING_ALIGN 0x00010000
-#define MACE_ISA_MISC_REG 0x0008 /* Various status and controls */
-#define MACE_ISA_INT_STAT 0x0010
-#define MACE_ISA_INT_MASK 0x0018
-
-/* MACE_ISA_MISC_REG definitions */
-#define MACE_ISA_MISC_RLED_OFF 0x0010 /* Turns off RED LED */
-#define MACE_ISA_MISC_GLED_OFF 0x0020 /* Turns off GREEN LED */
-
-/* MACE_ISA_INT_* definitions */
-#define MACE_ISA_INT_AUDIO 0x000000ff /* Audio ints */
-#define MACE_ISA_INT_AUDIO_SC 0x02
-#define MACE_ISA_INT_AUDIO_DMA1 0x04
-#define MACE_ISA_INT_AUDIO_DMA2 0x10
-#define MACE_ISA_INT_AUDIO_DMA3 0x40
-#define MACE_ISA_INT_RTC 0x00000100 /* RTC */
-#define MACE_ISA_INT_KBD 0x00000200 /* Keyboard */
-#define MACE_ISA_INT_KBD_POLL 0x00000400 /* Keyboard polled */
-#define MACE_ISA_INT_MOUSE 0x00000800 /* Mouse */
-#define MACE_ISA_INT_MOUSE_POLL 0x00001000 /* Mouse polled */
-#define MACE_ISA_INT_TIMER 0x0000e000 /* Timer/counter compare */
-#define MACE_ISA_INT_PARALLEL 0x000f0000 /* Parallel port */
-#define MACE_ISA_INT_SERIAL_1 0x03f00000 /* Serial port 1 */
-#define MACE_ISA_INT_SERIAL_2 0xfc000000 /* Serial port 2 */
-
-/* ISA Peripherals */
-#define MACE_ISA_EPP_OFFS (MACE_ISAX_OFFS+0x00000000)
-#define MACE_ISA_ECP_OFFS (MACE_ISAX_OFFS+0x00008000)
-#define MACE_ISA_SER1_OFFS (MACE_ISAX_OFFS+0x00010000)
-#define MACE_ISA_SER2_OFFS (MACE_ISAX_OFFS+0x00018000)
-#define MACE_ISA_RTC_OFFS (MACE_ISAX_OFFS+0x00020000)
-#define MACE_ISA_GAME_OFFS (MACE_ISAX_OFFS+0x00030000)
+++ /dev/null
-/* $OpenBSD: macebusvar.h,v 1.2 2018/12/03 13:46:30 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MACEBUSVAR_H_
-#define _MACEBUSVAR_H_
-
-#include <machine/bus.h>
-
-extern bus_space_t macebus_tag;
-extern struct machine_bus_dma_tag mace_bus_dma_tag;
-
-struct macebus_attach_args {
- char *maa_name;
-
- bus_space_tag_t maa_iot;
- bus_space_tag_t maa_memt;
- bus_dma_tag_t maa_dmat;
- bus_addr_t maa_baseaddr;
- int maa_intr; /* crime intr bit */
- uint32_t maa_mace_intr; /* narrowing mace intr mask */
-};
-
-void *macebus_intr_establish(int, uint32_t, int, int (*)(void *),
- void *, const char *);
-void macebus_intr_disestablish(void *);
-
-#endif /* _MACEBUSVAR_H_ */
+++ /dev/null
-/* $OpenBSD: tcc.c,v 1.11 2021/03/11 11:17:00 jsg Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * POWER Indigo2 TBus Cache Controller (Stream Cache) support code.
- */
-
-#include <sys/param.h>
-#include <sys/device.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <mips64/archtype.h>
-#include <mips64/cache.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-
-#include <sgi/sgi/ip22.h>
-#include <sgi/localbus/tccreg.h>
-#include <sgi/localbus/tccvar.h>
-
-int tcc_match(struct device *, void *, void *);
-void tcc_attach(struct device *, struct device *, void *);
-
-const struct cfattach tcc_ca = {
- sizeof(struct device), tcc_match, tcc_attach
-};
-
-struct cfdriver tcc_cd = {
- NULL, "tcc", DV_DULL
-};
-
-uint32_t tcc_bus_error(uint32_t, struct trapframe *);
-
-CACHE_PROTOS(tcc)
-
-int
-tcc_match(struct device *parent, void *match, void *aux)
-{
- struct mainbus_attach_args *maa = (void *)aux;
-
- switch (sys_config.system_type) {
- case SGI_IP26:
- return strcmp(maa->maa_name, tcc_cd.cd_name) == 0;
- default:
- return 0;
- }
-}
-
-void
-tcc_attach(struct device *parent, struct device *self, void *aux)
-{
- uint32_t ctrl, rev;
-
- ctrl = (uint32_t)tcc_read(TCC_GCACHE_CTRL);
- rev = (ctrl & TCC_GCACHE_REV_MASK) >> TCC_GCACHE_REV_SHIFT;
- printf(": streaming cache revision %d\n", rev);
-
- tcc_bus_reset();
-
- /* Enable bus error and machine check interrupts. */
- set_intr(INTPRI_BUSERR_TCC, CR_INT_4, tcc_bus_error);
- tcc_write(TCC_INTR, TCC_INTR_MCHECK_ENAB | TCC_INTR_BERR_ENAB);
-
- /* Enable all cache sets. */
- tcc_write(TCC_GCACHE_CTRL, (ctrl | TCC_GCACHE_SET_ALL) &
- ~TCC_GCACHE_DISABLE_WB);
-
- /* Enable prefetching. */
- tcc_prefetch_enable();
-}
-
-void
-tcc_bus_reset()
-{
- tcc_write(TCC_INTR, (tcc_read(TCC_INTR) & TCC_INTR_ENABLE_MASK) |
- TCC_INTR_MCHECK | TCC_INTR_BERR);
- tcc_write(TCC_ERROR, TCC_ERROR_NESTED_MCHECK | TCC_ERROR_NESTED_BERR);
-}
-
-uint32_t
-tcc_bus_error(uint32_t hwpend, struct trapframe *tf)
-{
- uint64_t intr, error, addr, errack;
- unsigned int errtype;
-
- intr = tcc_read(TCC_INTR);
- error = tcc_read(TCC_ERROR);
-
- errtype = (error & TCC_ERROR_TYPE_MASK) >> TCC_ERROR_TYPE_SHIFT;
-
- /*
- * Execution of the `sync' instruction is not supported by the
- * T-Bus and raises a machine check exception.
- * Do not report anything on console in that case, so that
- * userland does not suffer too much.
- */
- if (errtype != TCC_ERROR_TYPE_TBUS || (intr & TCC_INTR_MCHECK) == 0) {
- addr = tcc_read(TCC_BERR_ADDR);
-
- printf("tcc bus error: intr %llx error %llx (%u) addr %08llx\n",
- intr, error, errtype, addr);
- }
-
- /* Ack error condition */
- errack = 0;
- if (intr & TCC_INTR_MCHECK)
- errack |= TCC_ERROR_NESTED_MCHECK;
- if (intr & TCC_INTR_BERR)
- errack |= TCC_ERROR_NESTED_BERR;
- tcc_write(TCC_INTR, (intr & TCC_INTR_ENABLE_MASK) |
- (intr & (TCC_INTR_MCHECK | TCC_INTR_BERR)));
- tcc_write(TCC_ERROR, errack);
-
- return hwpend;
-}
-
-/*
- * Cache maintenance routines
- */
-
-#define tcc_cache_hit(addr,op) \
-__asm__ volatile ("lw $0, %0(%1)" :: "i" (TCC_CACHEOP_HIT), \
- "r" (PHYS_TO_XKPHYS(TCC_CACHEOP_BASE | (addr) | (op), CCA_NC)) : "memory")
-#define tcc_cache_index(s,i,op) \
-__asm__ volatile ("lw $0, %0(%1)" :: "i" (TCC_CACHEOP_INDEX | (op)), \
- "r" (PHYS_TO_XKPHYS(TCC_CACHEOP_BASE | ((s) << TCC_CACHEOP_SET_SHIFT) | \
- ((i) << TCC_CACHEOP_INDEX_SHIFT), CCA_NC)) : "memory")
-
-void tcc_virtual(struct cpu_info *, vaddr_t, vsize_t, uint64_t);
-
-void
-tcc_ConfigCache(struct cpu_info *ci)
-{
- struct cache_info l2;
-
- l2 = ci->ci_l2;
-
- tfp_ConfigCache(ci);
-
- if (l2.size != 0) {
- ci->ci_l2 = l2;
-
- ci->ci_SyncCache = tcc_SyncCache;
- ci->ci_SyncDCachePage = tcc_SyncDCachePage;
- ci->ci_HitSyncDCachePage = tcc_SyncDCachePage;
- ci->ci_HitSyncDCache = tcc_HitSyncDCache;
- ci->ci_HitInvalidateDCache = tcc_HitInvalidateDCache;
- ci->ci_IOSyncDCache = tcc_IOSyncDCache;
- }
-}
-
-void
-tcc_SyncCache(struct cpu_info *ci)
-{
- uint64_t idx;
-
- mips_sync();
- tcc_prefetch_invalidate();
- tfp_InvalidateICache(ci, 0, ci->ci_l1inst.size);
-
- /*
- * The following relies upon the fact that the (line, set)
- * fields are contiguous. Therefore by pretending there is
- * a huge number of sets and only one line, we can span the
- * whole cache.
- */
- idx = (uint64_t)ci->ci_l2.size / TCC_CACHE_LINE;
- while (idx != 0) {
- idx--;
- tcc_cache_index(idx, 0,
- TCC_CACHEOP_WRITEBACK | TCC_CACHEOP_INVALIDATE);
- }
- tcc_prefetch_invalidate();
-}
-
-void
-tcc_SyncDCachePage(struct cpu_info *ci, vaddr_t va, paddr_t pa)
-{
- vaddr_t epa;
-
- mips_sync();
- tcc_prefetch_invalidate();
- epa = pa + PAGE_SIZE;
- do {
- tcc_cache_hit(pa,
- TCC_CACHEOP_WRITEBACK | TCC_CACHEOP_INVALIDATE);
- pa += TCC_CACHE_LINE;
- } while (pa != epa);
- tcc_prefetch_invalidate();
-}
-
-void
-tcc_virtual(struct cpu_info *ci, vaddr_t va, vsize_t sz, uint64_t op)
-{
- paddr_t pa;
-
- if (IS_XKPHYS(va)) {
- pa = XKPHYS_TO_PHYS(va);
-
- while (sz != 0) {
- tcc_cache_hit(pa, op);
- pa += TCC_CACHE_LINE;
- sz -= TCC_CACHE_LINE;
- }
- return;
- }
-
- while (sz != 0) {
- /* get the proper physical address */
- if (pmap_extract(pmap_kernel(), va, &pa) == 0) {
-#ifdef DIAGNOSTIC
- panic("%s: invalid va %p", __func__, (void *)va);
-#else
- /* should not happen */
-#endif
- }
-
- while (sz != 0) {
- tcc_cache_hit(pa, op);
- pa += TCC_CACHE_LINE;
- va += TCC_CACHE_LINE;
- sz -= TCC_CACHE_LINE;
- if (sz == 0)
- return;
- if ((va & PAGE_MASK) == 0)
- break; /* need new pmap_extract() */
- }
- }
-}
-
-void
-tcc_HitSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
-
- /* extend the range to integral cache lines */
- va = _va & ~(TCC_CACHE_LINE - 1);
- sz = ((_va + _sz + TCC_CACHE_LINE - 1) & ~(TCC_CACHE_LINE - 1)) - va;
-
- mips_sync();
- tcc_prefetch_invalidate();
- tcc_virtual(ci, va, sz, TCC_CACHEOP_WRITEBACK | TCC_CACHEOP_INVALIDATE);
- tcc_prefetch_invalidate();
-}
-
-void
-tcc_HitInvalidateDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz)
-{
- vaddr_t va;
- vsize_t sz;
-
- /* extend the range to integral cache lines */
- va = _va & ~(TCC_CACHE_LINE - 1);
- sz = ((_va + _sz + TCC_CACHE_LINE - 1) & ~(TCC_CACHE_LINE - 1)) - va;
-
- mips_sync();
- tcc_prefetch_invalidate();
- tcc_virtual(ci, va, sz, TCC_CACHEOP_INVALIDATE);
- tcc_prefetch_invalidate();
-}
-
-void
-tcc_IOSyncDCache(struct cpu_info *ci, vaddr_t _va, size_t _sz, int how)
-{
- vaddr_t va;
- vsize_t sz;
- int partial_start, partial_end;
-
- /* extend the range to integral cache lines */
- va = _va & ~(TCC_CACHE_LINE - 1);
- sz = ((_va + _sz + TCC_CACHE_LINE - 1) & ~(TCC_CACHE_LINE - 1)) - va;
-
- mips_sync();
-
- switch (how) {
- default:
- case CACHE_SYNC_R:
- /* writeback partial cachelines */
- if (((_va | _sz) & (TCC_CACHE_LINE - 1)) != 0) {
- partial_start = va != _va;
- partial_end = va + sz != _va + _sz;
- } else {
- partial_start = partial_end = 0;
- }
- tcc_prefetch_invalidate();
- if (partial_start) {
- tcc_virtual(ci, va, TCC_CACHE_LINE,
- TCC_CACHEOP_WRITEBACK | TCC_CACHEOP_INVALIDATE);
- va += TCC_CACHE_LINE;
- sz -= TCC_CACHE_LINE;
- }
- if (sz != 0 && partial_end) {
- sz -= TCC_CACHE_LINE;
- tcc_virtual(ci, va + sz, TCC_CACHE_LINE,
- TCC_CACHEOP_WRITEBACK | TCC_CACHEOP_INVALIDATE);
- }
- if (sz != 0)
- tcc_virtual(ci, va, sz, TCC_CACHEOP_INVALIDATE);
- break;
-
- case CACHE_SYNC_X:
- tcc_prefetch_invalidate();
- tcc_virtual(ci, va, sz, TCC_CACHEOP_WRITEBACK);
- break;
-
- case CACHE_SYNC_W:
- tcc_prefetch_invalidate();
- tcc_virtual(ci, va, sz,
- TCC_CACHEOP_WRITEBACK | TCC_CACHEOP_INVALIDATE);
- break;
- }
- tcc_prefetch_invalidate();
-
- tfp_IOSyncDCache(ci, _va, _sz, how);
-}
+++ /dev/null
-/* $OpenBSD: tccreg.h,v 1.1 2012/09/29 21:46:02 miod Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * POWER Indigo2 TBus Cache Controller (Stream Cache) support code.
- */
-
-#define TCC_BASE 0x0000000018000000UL
-
-/*
- * TCC Control Registers
- */
-
-#define TCC_FIFO_CTRL 0x0000000
-
-#define TCC_GCACHE_CTRL 0x0000008
-#define TCC_GCACHE_SET_0 0x00000001 /* cache set enables */
-#define TCC_GCACHE_SET_1 0x00000002
-#define TCC_GCACHE_SET_2 0x00000004
-#define TCC_GCACHE_SET_3 0x00000008
-#define TCC_GCACHE_SET_ALL 0x0000000f
-#define TCC_GCACHE_DISABLE_WB 0x00000020 /* prevents writebacks */
-#define TCC_GCACHE_REV_MASK 0x03c00000
-#define TCC_GCACHE_REV_SHIFT 18
-
-#define TCC_INTR 0x0000010
-#define TCC_INTR_MASK_0 0x00000001
-#define TCC_INTR_MASK_1 0x00000002
-#define TCC_INTR_MASK_2 0x00000004
-#define TCC_INTR_MASK_3 0x00000008
-#define TCC_INTR_MASK_4 0x00000010
-#define TCC_INTR_MASK_5 0x00000020
-#define TCC_INTR_GFX_FIFO_HIWAT 0x00000040
-#define TCC_INTR_GFX_FIFO_LOWAT 0x00000080
-#define TCC_INTR_COUNTER 0x00000100
-#define TCC_INTR_BERR 0x00000200
-#define TCC_INTR_MCHECK 0x00000400
-#define TCC_INTR_PENDING_MASK 0x000007ff
-#define TCC_INTR_GFX_FIFO_HIWAT_ENAB 0x00000800
-#define TCC_INTR_GFX_FIFO_LOWAT_ENAB 0x00001000
-#define TCC_INTR_COUNTER_ENAB 0x00002000
-#define TCC_INTR_BERR_ENAB 0x00004000
-#define TCC_INTR_MCHECK_ENAB 0x00008000
-#define TCC_INTR_ENABLE_MASK 0x0000f800
-
-#define TCC_BERR_ADDR 0x0000018
-
-#define TCC_ERROR 0x0000020
-#define TCC_ERROR_NESTED_BERR 0x00000001
-#define TCC_ERROR_NESTED_MCHECK 0x00000002
-#define TCC_ERROR_TYPE_MASK 0x0000001c
-#define TCC_ERROR_TYPE_SHIFT 2
-
-#define TCC_ERROR_TYPE_TDB_PAR 0
-#define TCC_ERROR_TYPE_TCC_PAR 1
-#define TCC_ERROR_TYPE_CMD_PAR 2
-#define TCC_ERROR_TYPE_SYSAD 3
-#define TCC_ERROR_TYPE_GCACHE_PAR 4
-#define TCC_ERROR_TYPE_TBUS 5
-
-#define TCC_PARITY_CTRL 0x0000028
-
-#define TCC_COUNT 0x0000030
-
-#define TCC_COMPARE 0x0000038
-
-#define TCC_PREFETCH_CTRL 0x0010038
-
-#define TCC_PREFETCH_INVALIDATE 0x0000000000000001 /* one-shot */
-#define TCC_PREFETCH_TIMEOUT_MASK 0x000000000000001e
-#define TCC_PREFETCH_TIMEOUT_MAX 15
-#define TCC_PREFETCH_TIMEOUT_SHIFT 1
-#define TCC_PREFETCH_BUF_A_ENABLE 0x0000000000000020
-#define TCC_PREFETCH_BUF_B_ENABLE 0x0000000000000040
-#define TCC_PREFETCH_QUEUE_DEPTH_MASK 0x0000000000000380
-#define TCC_PREFETCH_QUEUE_DEPTH_MAX 7
-#define TCC_PREFETCH_QUEUE_DEPTH_SHIFT 7
-
-/*
- * The following default prefetch settings has been borrowed from IRIX's
- * <sys/IP26.h>. We can only assume these settings are optimal for most
- * workloads.
- */
-#define TCC_PREFETCH_ENABLE \
- (TCC_PREFETCH_BUF_A_ENABLE | TCC_PREFETCH_BUF_B_ENABLE | \
- (3 << TCC_PREFETCH_TIMEOUT_SHIFT) | \
- (TCC_PREFETCH_QUEUE_DEPTH_MAX << TCC_PREFETCH_QUEUE_DEPTH_SHIFT))
-
-/*
- * TCC Cache Operations
- */
-
-#define TCC_CACHEOP_BASE 0x0000000100000000UL
-
-#define TCC_CACHEOP_HIT 0x00000000
-#define TCC_CACHEOP_INDEX 0x00000004
-#define TCC_CACHEOP_WRITEBACK 0x00000008
-#define TCC_CACHEOP_INVALIDATE 0x00000010
-#define TCC_CACHEOP_SET_SHIFT 5
-#define TCC_CACHEOP_INDEX_SHIFT 7
-#define TCC_CACHE_SETS 4
-#define TCC_CACHE_LINE 128UL
+++ /dev/null
-/* $OpenBSD: tccvar.h,v 1.1 2012/09/29 21:46:02 miod Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#define tcc_read(o) \
- *(volatile uint64_t *)PHYS_TO_XKPHYS(TCC_BASE + (o), CCA_NC)
-#define tcc_write(o,v) \
- *(volatile uint64_t *)PHYS_TO_XKPHYS(TCC_BASE + (o), CCA_NC) = (v)
-
-static __inline__ void
-tcc_prefetch_disable(void)
-{
- tcc_write(TCC_PREFETCH_CTRL, TCC_PREFETCH_INVALIDATE);
-}
-
-static __inline__ void
-tcc_prefetch_enable(void)
-{
- tcc_write(TCC_PREFETCH_CTRL, TCC_PREFETCH_ENABLE);
-}
-
-static __inline__ void
-tcc_prefetch_invalidate(void)
-{
- tcc_write(TCC_PREFETCH_CTRL,
- tcc_read(TCC_PREFETCH_CTRL) | TCC_PREFETCH_INVALIDATE);
-}
-
-void tcc_bus_reset(void);
+++ /dev/null
-/* $OpenBSD: ioc.c,v 1.40 2016/01/02 05:49:35 visa Exp $ */
-
-/*
- * Copyright (c) 2008 Joel Sing.
- * Copyright (c) 2008, 2009, 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * IOC3 device driver.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <mips64/archtype.h>
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#ifdef TGT_ORIGIN
-#include <sgi/sgi/ip27.h>
-#include <sgi/sgi/l1.h>
-#endif
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcidevs.h>
-
-#include <sgi/pci/iocreg.h>
-#include <sgi/pci/iocvar.h>
-
-#include <dev/onewire/onewirereg.h>
-#include <dev/onewire/onewirevar.h>
-
-#include <sgi/dev/owmacvar.h>
-#include <sgi/dev/owserialvar.h>
-
-int ioc_match(struct device *, void *, void *);
-void ioc_attach(struct device *, struct device *, void *);
-
-struct ioc_intr {
- struct ioc_softc *ii_ioc;
-
- int (*ii_func)(void *);
- void *ii_arg;
-
- struct evcount ii_count;
- int ii_level;
-};
-
-struct ioc_softc {
- struct device sc_dev;
-
- bus_space_tag_t sc_memt;
- bus_space_handle_t sc_memh;
- bus_dma_tag_t sc_dmat;
- pci_chipset_tag_t sc_pc;
- pcitag_t sc_tag;
-
- void *sc_ih_enet; /* Ethernet interrupt */
- void *sc_ih_superio; /* SuperIO interrupt */
- struct ioc_intr *sc_intr[IOC_NDEVS];
-
- struct onewire_bus sc_bus;
-
- struct owmac_softc *sc_owmac;
- struct owserial_softc *sc_owserial;
-
- int sc_attach_flags;
-};
-
-struct cfattach ioc_ca = {
- sizeof(struct ioc_softc), ioc_match, ioc_attach,
-};
-
-struct cfdriver ioc_cd = {
- NULL, "ioc", DV_DULL,
-};
-
-void ioc_attach_child(struct ioc_softc *, const char *, bus_addr_t, int);
-int ioc_search_onewire(struct device *, void *, void *);
-int ioc_search_mundane(struct device *, void *, void *);
-int ioc_print(void *, const char *);
-
-int ioc_intr_dispatch(struct ioc_softc *, int);
-int ioc_intr_ethernet(void *);
-int ioc_intr_shared(void *);
-int ioc_intr_superio(void *);
-
-int iocow_reset(void *);
-int iocow_read_bit(struct ioc_softc *);
-int iocow_send_bit(void *, int);
-int iocow_read_byte(void *);
-int iocow_triplet(void *, int);
-int iocow_pulse(struct ioc_softc *, int, int);
-
-#ifdef TGT_ORIGIN
-/*
- * A mask of nodes on which an ioc driver has attached.
- * We use this on IP35 systems, to prevent attaching a pci IOC3 card which NIC
- * has failed, as the onboard IOC3.
- * XXX This obviously will not work in N mode... but then IP35 are supposed to
- * XXX always run in M mode.
- */
-static uint64_t ioc_nodemask = 0;
-#endif
-
-int
-ioc_match(struct device *parent, void *match, void *aux)
-{
- struct pci_attach_args *pa = aux;
-
- if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SGI &&
- PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SGI_IOC3)
- return (1);
-
- return (0);
-}
-
-int
-ioc_print(void *aux, const char *iocname)
-{
- struct ioc_attach_args *iaa = aux;
-
- if (iocname != NULL)
- printf("%s at %s", iaa->iaa_name, iocname);
-
- /* no base for onewire, and don't display it for rtc */
- if ((int)iaa->iaa_base > 0 && (int)iaa->iaa_base < IOC3_BYTEBUS_0)
- printf(" base 0x%lx", iaa->iaa_base);
-
- return (UNCONF);
-}
-
-void
-ioc_attach(struct device *parent, struct device *self, void *aux)
-{
- struct ioc_softc *sc = (struct ioc_softc *)self;
- struct pci_attach_args *pa = aux;
- pci_intr_handle_t ih_enet, ih_superio;
- bus_space_tag_t memt;
- bus_space_handle_t memh;
- bus_size_t memsize;
- pcireg_t data;
- int has_superio, has_enet, is_obio;
- int subdevice_mask;
- bus_addr_t rtcbase;
-
- if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
- &memt, &memh, NULL, &memsize, 0)) {
- printf(": can't map mem space\n");
- return;
- }
-
- sc->sc_pc = pa->pa_pc;
- sc->sc_tag = pa->pa_tag;
- sc->sc_dmat = pa->pa_dmat;
-
- /*
- * Initialise IOC3 ASIC.
- */
- data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
- data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_PARITY_ENABLE |
- PCI_COMMAND_SERR_ENABLE;
- data &= ~PCI_COMMAND_INTERRUPT_DISABLE;
- pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, data);
-
- printf("\n");
-
- sc->sc_memt = memt;
- sc->sc_memh = memh;
-
- /*
- * Attach the 1-Wire bus now, so that we can get our own part
- * number and deduce which devices are really available on the
- * board.
- */
-
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_GPCR_S,
- IOC3_GPCR_MLAN);
- (void)bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC3_GPCR_S);
- config_search(ioc_search_onewire, self, aux);
-
- /*
- * Now figure out what our configuration is.
- */
-
- has_superio = has_enet = 0;
- is_obio = 0;
- subdevice_mask = 0;
- if (sc->sc_owserial != NULL) {
- if (strncmp(sc->sc_owserial->sc_product, "030-0873-", 9) == 0) {
- /*
- * MENET board; these attach as four ioc devices
- * behind an xbridge. However the fourth one lacks
- * the superio chip.
- */
- subdevice_mask = (1 << IOCDEV_EF);
- has_enet = 1;
- if (pa->pa_device != 3) {
- subdevice_mask |= (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B);
- has_superio = 1;
- }
- } else
- if (strncmp(sc->sc_owserial->sc_product, "030-0891-", 9) == 0) {
- /* IP30 on-board IOC3 */
- subdevice_mask = (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B) | (1 << IOCDEV_LPT) |
- (1 << IOCDEV_KBC) | (1 << IOCDEV_RTC) |
- (1 << IOCDEV_EF);
- rtcbase = IOC3_BYTEBUS_1;
- has_superio = has_enet = 1;
- is_obio = 1;
- } else
- if (strncmp(sc->sc_owserial->sc_product, "030-1155-", 9) == 0) {
- /* CADDuo board */
- subdevice_mask = (1 << IOCDEV_KBC) | (1 << IOCDEV_EF);
- has_superio = has_enet = 1;
- } else
- if (strncmp(sc->sc_owserial->sc_product, "030-1657-", 9) == 0 ||
- strncmp(sc->sc_owserial->sc_product, "030-1664-", 9) == 0) {
- /* PCI_SIO_UFC dual serial board */
- subdevice_mask = (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B);
- has_superio = 1;
- } else
- goto unknown;
- } else {
-#ifdef TGT_ORIGIN
- /*
- * If no owserial device has been found, then it is
- * very likely that we are the on-board IOC3 found
- * on IP27 and IP35 systems, unless we have already
- * found an on-board IOC3 on this node.
- *
- * Origin 2000 (real IP27) systems are a real annoyance,
- * because they actually have two IOC3 on their BASEIO
- * board, with the various devices split accross them
- * (two IOC3 chips are needed to provide the four serial
- * ports). We can rely upon the PCI device numbers (2 and 6)
- * to tell onboard IOC3 from PCI IOC3 devices.
- */
- switch (sys_config.system_type) {
- case SGI_IP27:
- switch (sys_config.system_subtype) {
- case IP27_O2K:
- if (pci_get_widget(sc->sc_pc) ==
- IP27_O2K_BRIDGE_WIDGET)
- switch (pa->pa_device) {
- case IP27_IOC_SLOTNO:
- subdevice_mask =
- (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B) |
- (1 << IOCDEV_RTC) |
- (1 << IOCDEV_EF);
- break;
- case IP27_IOC2_SLOTNO:
- subdevice_mask =
- (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B) |
- (1 << IOCDEV_LPT) |
-#if 0 /* not worth doing */
- (1 << IOCDEV_RTC) |
-#endif
- (1 << IOCDEV_KBC);
- break;
- default:
- break;
- }
- break;
- case IP27_O200:
- if (pci_get_widget(sc->sc_pc) ==
- IP27_O200_BRIDGE_WIDGET)
- switch (pa->pa_device) {
- case IP27_IOC_SLOTNO:
- subdevice_mask =
- (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B) |
- (1 << IOCDEV_LPT) |
- (1 << IOCDEV_KBC) |
- (1 << IOCDEV_RTC) |
- (1 << IOCDEV_EF);
- break;
- default:
- break;
- }
- break;
- default:
- break;
- }
- break;
- case SGI_IP35:
- if (!ISSET(ioc_nodemask, 1UL << currentnasid)) {
- SET(ioc_nodemask, 1UL << currentnasid);
-
- switch (sys_config.system_subtype) {
- /*
- * Origin 300 onboard IOC3 do not have PS/2
- * ports; since they can only be connected to
- * other 300 or 350 bricks (the latter using
- * IOC4 devices), it is safe to do this
- * regardless of the current nasid.
- * XXX What about Onyx 300 though???
- */
- case IP35_O300:
- subdevice_mask =
- (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B) |
- (1 << IOCDEV_LPT) |
- (1 << IOCDEV_RTC) |
- (1 << IOCDEV_EF);
- break;
- /*
- * Origin 3000 I-Bricks have only one serial
- * port, and no keyboard or parallel ports.
- */
- case IP35_CBRICK:
- subdevice_mask =
- (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_RTC) |
- (1 << IOCDEV_EF);
- break;
- default:
- subdevice_mask =
- (1 << IOCDEV_SERIAL_A) |
- (1 << IOCDEV_SERIAL_B) |
- (1 << IOCDEV_LPT) |
- (1 << IOCDEV_KBC) |
- (1 << IOCDEV_RTC) |
- (1 << IOCDEV_EF);
- break;
- }
- }
- break;
- default:
- break;
- }
-
- if (subdevice_mask != 0) {
- rtcbase = IOC3_BYTEBUS_0;
- has_superio = 1;
- if (ISSET(subdevice_mask, 1 << IOCDEV_EF))
- has_enet = 1;
- is_obio = 1;
- } else
-#endif /* TGT_ORIGIN */
- {
-unknown:
- /*
- * Well, we don't really know what kind of device
- * we are. We should probe various registers
- * to figure out, but for now we'll just
- * chicken out.
- */
- printf("%s: unknown flavour\n", self->dv_xname);
- return;
- }
- }
-
- /*
- * Acknowledge all pending interrupts, and disable them.
- * Be careful not all registers may be wired depending on what
- * devices are actually present.
- */
-
- if (has_superio) {
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IEC, ~0x0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IES, 0x0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IR,
- bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IR));
- }
- if (has_enet) {
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_ENET_IER, 0);
- }
-
- /*
- * IOC3 is not a real PCI device - it's a poor wrapper over a set
- * of convenience chips. And when it is in full-blown configuration,
- * it actually needs to use two interrupts, one for the superio
- * chip, and the other for the Ethernet chip.
- *
- * This would not be a problem if the device advertized itself
- * as a multifunction device. But it doesn't...
- *
- * Fortunately, the interrupt used are simply interrupt pins A
- * and B; so with the help of the PCI bridge driver, we can
- * register the two interrupts and almost pretend things are
- * as normal as they could be.
- */
-
- if (has_enet) {
- pa->pa_intrpin = PCI_INTERRUPT_PIN_A;
- if (pci_intr_map(pa, &ih_enet) != 0) {
- printf("%s: failed to map ethernet interrupt\n",
- self->dv_xname);
- goto unmap;
- }
- }
-
- if (has_superio) {
- if (has_enet)
- pa->pa_intrpin =
- is_obio ? PCI_INTERRUPT_PIN_D : PCI_INTERRUPT_PIN_B;
- else
- pa->pa_intrpin = PCI_INTERRUPT_PIN_A;
-
- if (pci_intr_map(pa, &ih_superio) != 0) {
- printf("%s: failed to map superio interrupt\n",
- self->dv_xname);
- goto unmap;
- }
- }
-
- if (has_enet) {
- sc->sc_ih_enet = pci_intr_establish(sc->sc_pc, ih_enet,
- IPL_NET, ioc_intr_ethernet, sc, self->dv_xname);
- if (sc->sc_ih_enet == NULL) {
- printf("%s: failed to establish ethernet interrupt "
- "at %s\n", self->dv_xname,
- pci_intr_string(sc->sc_pc, ih_enet));
- goto unmap;
- }
- }
-
- if (has_superio) {
- sc->sc_ih_superio = pci_intr_establish(sc->sc_pc, ih_superio,
- IPL_TTY, ioc_intr_superio, sc, self->dv_xname);
- if (sc->sc_ih_superio == NULL) {
- printf("%s: failed to establish superio interrupt "
- "at %s\n", self->dv_xname,
- pci_intr_string(sc->sc_pc, ih_superio));
- goto unregister;
- }
- }
-
- if (has_enet)
- printf("%s: ethernet %s\n",
- self->dv_xname, pci_intr_string(sc->sc_pc, ih_enet));
- if (has_superio)
- printf("%s: superio %s\n",
- self->dv_xname, pci_intr_string(sc->sc_pc, ih_superio));
-
- /*
- * Attach other sub-devices.
- */
-
- sc->sc_attach_flags = is_obio ? IOC_FLAGS_OBIO : 0;
-
- if (ISSET(subdevice_mask, 1 << IOCDEV_SERIAL_A)) {
- /*
- * Put serial ports in passthrough mode,
- * to use the MI com(4) 16550 support.
- */
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_UARTA_SSCR, 0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_UARTB_SSCR, 0);
-
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC3_UARTA_SHADOW, 0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC3_UARTB_SHADOW, 0);
-
- ioc_attach_child(sc, "com", IOC3_UARTA_BASE, IOCDEV_SERIAL_A);
- if (ISSET(subdevice_mask, 1 << IOCDEV_SERIAL_B))
- ioc_attach_child(sc, "com", IOC3_UARTB_BASE,
- IOCDEV_SERIAL_B);
- }
- if (ISSET(subdevice_mask, 1 << IOCDEV_KBC))
- ioc_attach_child(sc, "iockbc", 0, IOCDEV_KBC);
- if (ISSET(subdevice_mask, 1 << IOCDEV_EF)) {
- /*
- * Make sure the PHY is correctly reset before attaching
- * the interface.
- */
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC3_GPPR(5), 0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC3_GPCR_S, IOC3_GPCR_PHY_RESET);
- delay(10);
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC3_GPPR(5), 1);
-
- ioc_attach_child(sc, "iec", 0, IOCDEV_EF);
- }
- if (ISSET(subdevice_mask, 1 << IOCDEV_LPT))
- ioc_attach_child(sc, "lpt", 0, IOCDEV_LPT);
- if (ISSET(subdevice_mask, 1 << IOCDEV_RTC))
- ioc_attach_child(sc, "dsrtc", rtcbase, IOCDEV_RTC);
-
- return;
-
-unregister:
- if (has_enet)
- pci_intr_disestablish(sc->sc_pc, sc->sc_ih_enet);
-unmap:
- bus_space_unmap(memt, memh, memsize);
-}
-
-void
-ioc_attach_child(struct ioc_softc *sc, const char *name, bus_addr_t base,
- int dev)
-{
- struct ioc_attach_args iaa;
-
- memset(&iaa, 0, sizeof iaa);
-
- iaa.iaa_name = name;
- pci_get_device_location(sc->sc_pc, sc->sc_tag, &iaa.iaa_location);
- iaa.iaa_memt = sc->sc_memt;
- iaa.iaa_memh = sc->sc_memh;
- iaa.iaa_dmat = sc->sc_dmat;
- iaa.iaa_base = base;
- iaa.iaa_dev = dev;
- iaa.iaa_flags = sc->sc_attach_flags;
-
- if (dev == IOCDEV_EF) {
- if (sc->sc_owmac != NULL)
- memcpy(iaa.iaa_enaddr, sc->sc_owmac->sc_enaddr, 6);
- else {
-#ifdef TGT_ORIGIN
- /*
- * On IP35 class machines, there are no
- * Number-In-a-Can attached to the onboard
- * IOC3; instead, the Ethernet address is
- * stored in the Brick EEPROM, and can be
- * retrieved with an L1 controller query.
- */
- if (sys_config.system_type != SGI_IP35 ||
- l1_get_brick_ethernet_address(currentnasid,
- iaa.iaa_enaddr) != 0)
-#endif
- memset(iaa.iaa_enaddr, 0xff, 6);
- }
- }
-
- config_found_sm(&sc->sc_dev, &iaa, ioc_print, ioc_search_mundane);
-}
-
-int
-ioc_search_mundane(struct device *parent, void *vcf, void *args)
-{
- struct cfdata *cf = vcf;
- struct ioc_attach_args *iaa = (struct ioc_attach_args *)args;
-
- if (strcmp(cf->cf_driver->cd_name, iaa->iaa_name) != 0)
- return 0;
-
- if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)iaa->iaa_base)
- return 0;
-
- return (*cf->cf_attach->ca_match)(parent, cf, iaa);
-}
-
-/*
- * Number-In-a-Can access driver (1-Wire interface through IOC)
- */
-
-int
-ioc_search_onewire(struct device *parent, void *vcf, void *args)
-{
- struct ioc_softc *sc = (struct ioc_softc *)parent;
- struct cfdata *cf = vcf;
- struct onewirebus_attach_args oba;
- struct device *owdev, *dev;
- extern struct cfdriver owmac_cd;
- extern struct cfdriver owserial_cd;
- struct owserial_softc *s;
-
- if (strcmp(cf->cf_driver->cd_name, "onewire") != 0)
- return 0;
-
- sc->sc_bus.bus_cookie = sc;
- sc->sc_bus.bus_reset = iocow_reset;
- sc->sc_bus.bus_bit = iocow_send_bit;
- sc->sc_bus.bus_read_byte = iocow_read_byte;
- sc->sc_bus.bus_write_byte = NULL; /* use default routine */
- sc->sc_bus.bus_read_block = NULL; /* use default routine */
- sc->sc_bus.bus_write_block = NULL; /* use default routine */
- sc->sc_bus.bus_triplet = iocow_triplet;
- sc->sc_bus.bus_matchrom = NULL; /* use default routine */
- sc->sc_bus.bus_search = NULL; /* use default routine */
-
- oba.oba_bus = &sc->sc_bus;
- oba.oba_flags = ONEWIRE_SCAN_NOW | ONEWIRE_NO_PERIODIC_SCAN;
-
- /* In case onewire is disabled in UKC... */
- if ((*cf->cf_attach->ca_match)(parent, cf, &oba) == 0)
- return 0;
-
- owdev = config_attach(parent, cf, &oba, onewirebus_print);
-
- /*
- * Find the first owmac child of the onewire bus, and keep
- * a pointer to it. This allows us to pass the ethernet
- * address to the ethernet subdevice.
- */
- if (owdev != NULL) {
- TAILQ_FOREACH(dev, &alldevs, dv_list)
- if (dev->dv_parent == owdev &&
- dev->dv_cfdata->cf_driver == &owmac_cd) {
- sc->sc_owmac = (struct owmac_softc *)dev;
- break;
- }
- }
-
- /*
- * Find the first owserial child of the onewire bus not
- * reporting power supply information, and keep a pointer
- * to it. This is a bit overkill since we do not need to
- * keep the pointer after attach, but it makes that kind
- * of code contained in the same place.
- */
- if (owdev != NULL) {
- TAILQ_FOREACH(dev, &alldevs, dv_list)
- if (dev->dv_parent == owdev &&
- dev->dv_cfdata->cf_driver == &owserial_cd) {
- s = (struct owserial_softc *)dev;
- if (strncmp(s->sc_name, "PWR", 3) == 0)
- continue;
- sc->sc_owserial = s;
- break;
- }
- }
-
-
- return 1;
-}
-
-int
-iocow_reset(void *v)
-{
- struct ioc_softc *sc = v;
- return iocow_pulse(sc, 500, 65);
-}
-
-int
-iocow_read_bit(struct ioc_softc *sc)
-{
- return iocow_pulse(sc, 6, 13);
-}
-
-int
-iocow_send_bit(void *v, int bit)
-{
- struct ioc_softc *sc = v;
- int rc;
-
- if (bit != 0)
- rc = iocow_pulse(sc, 6, 110);
- else
- rc = iocow_pulse(sc, 80, 30);
- return rc;
-}
-
-int
-iocow_read_byte(void *v)
-{
- struct ioc_softc *sc = v;
- unsigned int byte = 0;
- int i;
-
- for (i = 0; i < 8; i++)
- byte |= iocow_read_bit(sc) << i;
-
- return byte;
-}
-
-int
-iocow_triplet(void *v, int dir)
-{
- struct ioc_softc *sc = v;
- int rc;
-
- rc = iocow_read_bit(sc);
- rc <<= 1;
- rc |= iocow_read_bit(sc);
-
- switch (rc) {
- case 0x0:
- iocow_send_bit(v, dir);
- break;
- case 0x1:
- iocow_send_bit(v, 0);
- break;
- default:
- iocow_send_bit(v, 1);
- break;
- }
-
- return (rc);
-}
-
-int
-iocow_pulse(struct ioc_softc *sc, int pulse, int data)
-{
- uint32_t mcr_value;
-
- mcr_value = (pulse << 10) | (data << 2);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_MCR, mcr_value);
- do {
- mcr_value =
- bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC3_MCR);
- } while ((mcr_value & 0x00000002) == 0);
-
- delay(500);
-
- return (mcr_value & 1);
-}
-
-/*
- * Interrupt handling.
- */
-
-/*
- * List of interrupt bits to enable for each device.
- *
- * For the serial ports, we only enable the passthrough interrupt and
- * let com(4) tinker with the appropriate registers, instead of adding
- * an unnecessary layer there.
- */
-static const uint32_t ioc_intrbits[IOC_NDEVS] = {
- IOC3_IRQ_UARTA,
- IOC3_IRQ_UARTB,
- IOC3_IRQ_LPT,
- IOC3_IRQ_KBC,
- 0, /* RTC */
- 0 /* Ethernet, handled differently */
-};
-
-void *
-ioc_intr_establish(void *cookie, u_long dev, int level, int (*func)(void *),
- void *arg, char *name)
-{
- struct ioc_softc *sc = cookie;
- struct ioc_intr *ii;
-
- if (dev < 0 || dev >= IOC_NDEVS)
- return NULL;
-
- ii = (struct ioc_intr *)malloc(sizeof(*ii), M_DEVBUF, M_NOWAIT);
- if (ii == NULL)
- return NULL;
-
- ii->ii_ioc = sc;
- ii->ii_func = func;
- ii->ii_arg = arg;
- ii->ii_level = level;
-
- evcount_attach(&ii->ii_count, name, &ii->ii_level);
- sc->sc_intr[dev] = ii;
-
- /* enable hardware source if necessary */
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IES,
- ioc_intrbits[dev]);
-
- return (ii);
-}
-
-int
-ioc_intr_superio(void *v)
-{
- struct ioc_softc *sc = (struct ioc_softc *)v;
- uint32_t pending, mask;
- int dev;
-
- pending = bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IR) &
- bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IES);
-
- if (pending == 0)
- return 0;
-
- /* Disable pending interrupts */
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC3_SIO_IEC, pending);
-
- for (dev = 0; dev < IOC_NDEVS - 1 /* skip Ethernet */; dev++) {
- mask = pending & ioc_intrbits[dev];
- if (mask != 0) {
- (void)ioc_intr_dispatch(sc, dev);
-
- /* Ack, then reenable, pending interrupts */
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC3_SIO_IR, mask);
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC3_SIO_IES, mask);
- }
- }
-
- return 1;
-}
-
-int
-ioc_intr_ethernet(void *v)
-{
- struct ioc_softc *sc = (struct ioc_softc *)v;
-
- /* This interrupt source is not shared between several devices. */
- return ioc_intr_dispatch(sc, IOCDEV_EF);
-}
-
-int
-ioc_intr_shared(void *v)
-{
- return ioc_intr_superio(v) | ioc_intr_ethernet(v);
-}
-
-int
-ioc_intr_dispatch(struct ioc_softc *sc, int dev)
-{
- struct ioc_intr *ii;
- int rc = 0;
-
- /* Call registered interrupt function. */
- if ((ii = sc->sc_intr[dev]) != NULL && ii->ii_func != NULL) {
- rc = (*ii->ii_func)(ii->ii_arg);
- if (rc != 0)
- ii->ii_count.ec_count++;
- }
-
- return rc;
-}
+++ /dev/null
-/* $OpenBSD: iocreg.h,v 1.11 2016/01/02 05:49:36 visa Exp $ */
-
-/*
- * Copyright (c) 2008 Joel Sing.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Register definitions for SGI IOC3 ASIC.
- */
-
-#define IOC_NDEVS 6
-
-#define IOCDEV_SERIAL_A 0
-#define IOCDEV_SERIAL_B 1
-#define IOCDEV_LPT 2
-#define IOCDEV_KBC 3
-#define IOCDEV_RTC 4
-#define IOCDEV_EF 5
-
-/* SuperIO registers */
-#define IOC3_SIO_IR 0x0000001c /* SIO interrupt register */
-#define IOC3_SIO_IES 0x00000020 /* SIO interrupt enable */
-#define IOC3_SIO_IEC 0x00000024 /* SIO interrupt disable */
-#define IOC3_SIO_CR 0x00000028 /* SIO control register */
-#define IOC3_MCR 0x00000030 /* MicroLan control register */
-
-/* GPIO registers */
-#define IOC3_GPCR_S 0x00000034 /* GPIO control bit set */
-#define IOC3_GPCR_C 0x00000038 /* GPIO control bit clear */
-#define IOC3_GPDR 0x0000003c /* GPIO data */
-#define IOC3_GPPR_BASE 0x00000040 /* 9 GPIO pin registers */
-#define IOC3_GPPR(x) (IOC3_GPPR_BASE + (x) * 4)
-
-/* Keyboard controller registers. */
-#define IOC3_KBC_CTRL_STATUS 0x0000009c
-#define IOC3_KBC_KBD_RX 0x000000a0
-#define IOC3_KBC_AUX_RX 0x000000a4
-#define IOC3_KBC_KBD_TX 0x000000a8
-#define IOC3_KBC_AUX_TX 0x000000ac
-
-/* Non-16550 mode UART registers */
-#define IOC3_UARTA_SSCR 0x000000b8 /* control register */
-#define IOC3_UARTA_STPIR 0x000000bc /* TX producer index register */
-#define IOC3_UARTA_STCIR 0x000000c0 /* TX consumer index register */
-#define IOC3_UARTA_SRPIR 0x000000c4 /* RX producer index register */
-#define IOC3_UARTA_SRCIR 0x000000c8 /* RX consumer index register */
-#define IOC3_UARTA_SRTR 0x000000cc /* receive timer register */
-#define IOC3_UARTA_SHADOW 0x000000d0 /* 16550 shadow register */
-
-#define IOC3_UARTB_SSCR 0x000000d4
-#define IOC3_UARTB_STPIR 0x000000d8
-#define IOC3_UARTB_STCIR 0x000000dc
-#define IOC3_UARTB_SRPIR 0x000000e0
-#define IOC3_UARTB_SRCIR 0x000000e4
-#define IOC3_UARTB_SRTR 0x000000e8
-#define IOC3_UARTB_SHADOW 0x000000ec
-
-/* Ethernet registers */
-#define IOC3_ENET_MCR 0x000000f0 /* Master Control Register */
-#define IOC3_ENET_ISR 0x000000f4 /* Interrupt Status Register */
-#define IOC3_ENET_IER 0x000000f8 /* Interrupt Enable Register */
-#define IOC3_ENET_RCSR 0x000000fc /* RX Control and Status Reg. */
-#define IOC3_ENET_RBR_H 0x00000100 /* RX Base Register */
-#define IOC3_ENET_RBR_L 0x00000104
-#define IOC3_ENET_RBAR 0x00000108 /* RX Barrier Register */
-#define IOC3_ENET_RCIR 0x0000010c /* RX Consumer Index Register */
-#define IOC3_ENET_RPIR 0x00000110 /* RX Producer Index Register */
-#define IOC3_ENET_RTR 0x00000114 /* RX Timer Register */
-#define IOC3_ENET_TCSR 0x00000118 /* TX Control and Status Reg. */
-#define IOC3_ENET_RSR 0x0000011c /* Random Seed Register */
-#define IOC3_ENET_TCDC 0x00000120 /* TX Collision Detect Counter */
-#define IOC3_ENET_BIR 0x00000124
-#define IOC3_ENET_TBR_H 0x00000128 /* TX Base Register */
-#define IOC3_ENET_TBR_L 0x0000012c
-#define IOC3_ENET_TCIR 0x00000130 /* TX Consumer Index Register */
-#define IOC3_ENET_TPIR 0x00000134 /* TX Producer Index Register */
-#define IOC3_ENET_MAR_H 0x00000138 /* MAC Address Register */
-#define IOC3_ENET_MAR_L 0x0000013c
-#define IOC3_ENET_HAR_H 0x00000140 /* Hash filter Address Reg. */
-#define IOC3_ENET_HAR_L 0x00000144
-#define IOC3_ENET_MICR 0x00000148 /* MII Control Register */
-#define IOC3_ENET_MIDR_R 0x0000014c /* MII Data Register (read) */
-#define IOC3_ENET_MIDR_W 0x00000150 /* MII Data Register (write) */
-
-/* bits in the SIO interrupt register */
-#define IOC3_IRQ_UARTA 0x00000040 /* UART A passthrough */
-#define IOC3_IRQ_UARTB 0x00008000 /* UART B passthrough */
-#define IOC3_IRQ_LPT 0x00040000 /* parallel port passthrough */
-#define IOC3_IRQ_KBC 0x00400000 /* keyboard controller */
-
-/* bits in GPCR */
-#define IOC3_GPCR_PHY_RESET 0x00000020 /* reset Ethernet PHY */
-#define IOC3_GPCR_UARTA_PIO 0x00000040 /* UARTA in PIO mode */
-#define IOC3_GPCR_UARTB_PIO 0x00000080 /* UARTB in PIO mode */
-#define IOC3_GPCR_MLAN 0x00200000 /* MicroLan enable */
-
-/* bits in SSCR */
-#define IOC3_SSCR_RESET 0x80000000
-
-/* bits in ENET_MCR */
-#define IOC3_ENET_MCR_DUPLEX 0x00000001
-#define IOC3_ENET_MCR_PROMISC 0x00000002
-#define IOC3_ENET_MCR_PADEN 0x00000004
-#define IOC3_ENET_MCR_RXOFF_MASK 0x000001f8
-#define IOC3_ENET_MCR_RXOFF_SHIFT 3
-#define IOC3_ENET_MCR_PARITY_ENABLE 0x00000200
-#define IOC3_ENET_MCR_LARGE_SSRAM 0x00001000
-#define IOC3_ENET_MCR_TX_DMA 0x00002000
-#define IOC3_ENET_MCR_TX 0x00004000
-#define IOC3_ENET_MCR_RX_DMA 0x00008000
-#define IOC3_ENET_MCR_RX 0x00010000
-#define IOC3_ENET_MCR_LOOPBACK 0x00020000
-#define IOC3_ENET_MCR_RESET 0x80000000
-
-/* bits in the ENET interrupt register */
-#define IOC3_ENET_ISR_RX_TIMER 0x00000001 /* RX periodic int */
-#define IOC3_ENET_ISR_RX_THRESHOLD 0x00000002 /* RX q above threshold */
-#define IOC3_ENET_ISR_RX_OFLOW 0x00000004 /* RX q overflow */
-#define IOC3_ENET_ISR_RX_BUF_OFLOW 0x00000008 /* RX buffer overflow */
-#define IOC3_ENET_ISR_RX_MEMORY 0x00000010 /* RX memory acc. err */
-#define IOC3_ENET_ISR_RX_PARITY 0x00000020 /* RX parity error */
-#define IOC3_ENET_ISR_TX_EMPTY 0x00010000 /* TX q empty */
-#define IOC3_ENET_ISR_TX_RETRY 0x00020000
-#define IOC3_ENET_ISR_TX_EXDEF 0x00040000
-#define IOC3_ENET_ISR_TX_LCOLL 0x00080000 /* TX Late Collision */
-#define IOC3_ENET_ISR_TX_GIANT 0x00100000
-#define IOC3_ENET_ISR_TX_BUF_UFLOW 0x00200000 /* TX buf underflow */
-#define IOC3_ENET_ISR_TX_EXPLICIT 0x00400000 /* TX int requested */
-#define IOC3_ENET_ISR_TX_COLL_WRAP 0x00800000
-#define IOC3_ENET_ISR_TX_DEFER_WRAP 0x01000000
-#define IOC3_ENET_ISR_TX_MEMORY 0x02000000 /* TX memory acc. err */
-#define IOC3_ENET_ISR_TX_PARITY 0x04000000 /* TX parity error */
-
-#define IOC3_ENET_ISR_TX_ALL 0x07ff0000 /* all TX bits */
-
-/* bits in ENET_RCSR */
-#define IOC3_ENET_RCSR_THRESHOLD_MASK 0x000001ff
-
-/* bits in ENET_RPIR */
-#define IOC3_ENET_PIR_SET 0x80000000 /* set new value */
-
-/* bits in ENET_TCSR */
-#define IOC3_ENET_TCSR_IPGT_MASK 0x0000007f /* interpacket gap */
-#define IOC3_ENET_TCSR_IPGT_SHIFT 0
-#define IOC3_ENET_TCSR_IPGR1_MASK 0x00007f00
-#define IOC3_ENET_TCSR_IPGR1_SHIFT 8
-#define IOC3_ENET_TCSR_IPGR2_MASK 0x007f0000
-#define IOC3_ENET_TCSR_IPGR2_SHIFT 16
-#define IOC3_ENET_TCSR_NOTXCLOCK 0x80000000
-#define IOC3_ENET_TCSR_FULL_DUPLEX \
- ((17 << IOC3_ENET_TCSR_IPGR2_SHIFT) | \
- (11 << IOC3_ENET_TCSR_IPGR1_SHIFT) | \
- (21 << IOC3_ENET_TCSR_IPGT_SHIFT))
-#define IOC3_ENET_TCSR_HALF_DUPLEX \
- ((21 << IOC3_ENET_TCSR_IPGR2_SHIFT) | \
- (21 << IOC3_ENET_TCSR_IPGR1_SHIFT) | \
- (21 << IOC3_ENET_TCSR_IPGT_SHIFT))
-
-/* bits in ENET_TCDC */
-#define IOC3_ENET_TCDC_COLLISION_MASK 0x0000ffff
-#define IOC3_ENET_TCDC_DEFER_MASK 0xffff0000
-#define IOC3_ENET_TCDC_DEFER_SHIFT 16
-
-/* bits in ENET_TCIR */
-#define IOC3_ENET_TCIR_IDLE 0x80000000
-
-/* bits in ENET_MICR */
-#define IOC3_ENET_MICR_REG_MASK 0x0000001f
-#define IOC3_ENET_MICR_PHY_MASK 0x000003e0
-#define IOC3_ENET_MICR_PHY_SHIFT 5
-#define IOC3_ENET_MICR_READ 0x00000400
-#define IOC3_ENET_MICR_WRITE 0x00000000
-#define IOC3_ENET_MICR_BUSY 0x00000800
-
-#define IOC3_ENET_MIDR_MASK 0x0000ffff
-
-/*
- * Offsets and sizes for subdevices handled by mi drivers.
- */
-
-#define IOC3_UARTA_BASE 0x00020178
-#define IOC3_UARTB_BASE 0x00020170
-
-/*
- * Ethernet SSRAM.
- */
-
-#define IOC3_SSRAM_BASE 0x00040000
-#define IOC3_SSRAM_SMALL_SIZE 0x00020000
-#define IOC3_SSRAM_LARGE_SIZE 0x00040000
-
-#define IOC3_SSRAM_PARITY_BIT 0x00010000
-#define IOC3_SSRAM_DATA_MASK 0x0000ffff
-
-/*
- * Offsets of devices connected to the four IOC3 `bytebus'.
- */
-
-#define IOC3_BYTEBUS_0 0x00080000
-#define IOC3_BYTEBUS_1 0x000a0000
-#define IOC3_BYTEBUS_2 0x000c0000
-#define IOC3_BYTEBUS_3 0x000e0000
+++ /dev/null
-/* $OpenBSD: iocvar.h,v 1.6 2010/04/06 19:12:34 miod Exp $ */
-
-/*
- * Copyright (c) 2008, 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-struct ioc_attach_args {
- const char *iaa_name;
-
- bus_space_tag_t iaa_memt;
- bus_space_handle_t iaa_memh;
- bus_dma_tag_t iaa_dmat;
-
- bus_addr_t iaa_base;
- int iaa_dev;
-
- uint8_t iaa_enaddr[6];
-
- int iaa_flags;
-#define IOC_FLAGS_OBIO 0x00000001
-
- struct sgi_device_location iaa_location;
-};
-
-void *ioc_intr_establish(void *, u_long, int, int (*)(void *),
- void *, char *);
+++ /dev/null
-/* $OpenBSD: iof.c,v 1.9 2014/05/19 21:18:42 miod Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * IOC4 device driver.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcidevs.h>
-
-#include <sgi/pci/iofreg.h>
-#include <sgi/pci/iofvar.h>
-
-int iof_match(struct device *, void *, void *);
-void iof_attach(struct device *, struct device *, void *);
-void iof_attach_child(struct device *, const char *, bus_addr_t, uint);
-int iof_search(struct device *, void *, void *);
-int iof_print(void *, const char *);
-
-struct iof_intr {
- struct iof_softc *ii_iof;
-
- int (*ii_func)(void *);
- void *ii_arg;
-
- struct evcount ii_count;
- int ii_level;
-};
-
-struct iof_softc {
- struct device sc_dev;
-
- bus_space_tag_t sc_memt;
- bus_space_handle_t sc_memh;
- bus_dma_tag_t sc_dmat;
- pci_chipset_tag_t sc_pc;
- pcitag_t sc_tag;
-
- uint32_t sc_mcr;
-
- void *sc_ih;
- struct iof_intr *sc_intr[IOC4_NDEVS];
-};
-
-struct cfattach iof_ca = {
- sizeof(struct iof_softc), iof_match, iof_attach,
-};
-
-struct cfdriver iof_cd = {
- NULL, "iof", DV_DULL,
-};
-
-int iof_intr_dispatch(struct iof_softc *, int);
-int iof_intr(void *);
-
-int
-iof_match(struct device *parent, void *match, void *aux)
-{
- struct pci_attach_args *pa = aux;
-
- if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SGI &&
- PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SGI_IOC4)
- return 1;
-
- return 0;
-}
-
-int
-iof_print(void *aux, const char *iofname)
-{
- struct iof_attach_args *iaa = aux;
-
- if (iofname != NULL)
- printf("%s at %s", iaa->iaa_name, iofname);
-
- printf(" base 0x%lx", iaa->iaa_base);
-
- return UNCONF;
-}
-
-void
-iof_attach(struct device *parent, struct device *self, void *aux)
-{
- struct iof_softc *sc = (struct iof_softc *)self;
- struct pci_attach_args *pa = aux;
- pci_intr_handle_t ih;
- bus_space_tag_t memt;
- bus_space_handle_t memh;
- bus_size_t memsize;
- const char *intrstr;
-
- printf(": ");
-
- if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
- &memt, &memh, NULL, &memsize, 0)) {
- printf("can't map mem space\n");
- return;
- }
-
- sc->sc_pc = pa->pa_pc;
- sc->sc_tag = pa->pa_tag;
- sc->sc_dmat = pa->pa_dmat;
-
- sc->sc_memt = memt;
- sc->sc_memh = memh;
-
- sc->sc_mcr = bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC4_MCR);
-
- /*
- * Acknowledge all pending interrupts, and disable them.
- */
-
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IEC, ~0x0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IES, 0x0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IR,
- bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IR));
-
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IEC, ~0x0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IES, 0x0);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IR,
- bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IR));
-
- if (pci_intr_map(pa, &ih) != 0) {
- printf("failed to map interrupt!\n");
- goto unmap;
- }
- intrstr = pci_intr_string(sc->sc_pc, ih);
-
- sc->sc_ih = pci_intr_establish(sc->sc_pc, ih, IPL_TTY, iof_intr,
- sc, self->dv_xname);
- if (sc->sc_ih == NULL) {
- printf("failed to establish interrupt at %s\n", intrstr);
- goto unmap;
- }
- printf("%s\n", intrstr);
-
- /*
- * Attach other sub-devices.
- */
-
- iof_attach_child(self, "com", IOC4_UARTA_BASE, IOC4DEV_SERIAL_A);
- iof_attach_child(self, "com", IOC4_UARTB_BASE, IOC4DEV_SERIAL_B);
- iof_attach_child(self, "com", IOC4_UARTC_BASE, IOC4DEV_SERIAL_C);
- iof_attach_child(self, "com", IOC4_UARTD_BASE, IOC4DEV_SERIAL_D);
- iof_attach_child(self, "iockbc", IOC4_KBC_BASE, IOC4DEV_KBC);
- iof_attach_child(self, "dsrtc", IOC4_BYTEBUS_0, IOC4DEV_RTC);
-
- return;
-
-unmap:
- bus_space_unmap(memt, memh, memsize);
-}
-
-void
-iof_attach_child(struct device *iof, const char *name, bus_addr_t base,
- uint dev)
-{
- struct iof_softc *sc = (struct iof_softc *)iof;
- struct iof_attach_args iaa;
-
- iaa.iaa_name = name;
- pci_get_device_location(sc->sc_pc, sc->sc_tag, &iaa.iaa_location);
- iaa.iaa_memt = sc->sc_memt;
- iaa.iaa_memh = sc->sc_memh;
- iaa.iaa_dmat = sc->sc_dmat;
- iaa.iaa_base = base;
- iaa.iaa_dev = dev;
- iaa.iaa_clock = sc->sc_mcr & IOC4_MCR_PCI_66MHZ ? 66666667 : 33333333;
-
- config_found_sm(iof, &iaa, iof_print, iof_search);
-}
-
-int
-iof_search(struct device *parent, void *vcf, void *args)
-{
- struct cfdata *cf = vcf;
- struct iof_attach_args *iaa = (struct iof_attach_args *)args;
-
- if (strcmp(cf->cf_driver->cd_name, iaa->iaa_name) != 0)
- return 0;
-
- if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)iaa->iaa_base)
- return 0;
-
- return (*cf->cf_attach->ca_match)(parent, cf, iaa);
-}
-
-/*
- * Interrupt handling.
- */
-
-/*
- * List of interrupt bits to enable for each device.
- *
- * For the serial ports, we only enable the passthrough interrupt and
- * let com(4) tinker with the appropriate registers, instead of adding
- * an unnecessary layer there.
- */
-static const struct {
- uint32_t sio;
- uint32_t other;
-} ioc4_intrbits[IOC4_NDEVS] = {
- { IOC4_SIRQ_UARTA, 0 },
- { IOC4_SIRQ_UARTB, 0 },
- { IOC4_SIRQ_UARTC, 0 },
- { IOC4_SIRQ_UARTD, 0 },
- { 0, IOC4_OIRQ_KBC },
- { 0, IOC4_OIRQ_ATAPI },
- { 0, 0 } /* no RTC interrupt */
-};
-
-void *
-iof_intr_establish(void *cookie, uint dev, int level, int (*func)(void *),
- void *arg, char *name)
-{
- struct iof_softc *sc = cookie;
- struct iof_intr *ii;
-
- if (dev < 0 || dev >= IOC4_NDEVS)
- return NULL;
-
- if (ioc4_intrbits[dev].sio == 0 && ioc4_intrbits[dev].other == 0)
- return NULL;
-
- ii = (struct iof_intr *)malloc(sizeof(*ii), M_DEVBUF, M_NOWAIT);
- if (ii == NULL)
- return NULL;
-
- ii->ii_iof = sc;
- ii->ii_func = func;
- ii->ii_arg = arg;
- ii->ii_level = level;
-
- evcount_attach(&ii->ii_count, name, &ii->ii_level);
- sc->sc_intr[dev] = ii;
-
- /* enable hardware source if necessary */
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IES,
- ioc4_intrbits[dev].sio);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IES,
- ioc4_intrbits[dev].other);
-
- return (ii);
-}
-
-int
-iof_intr(void *v)
-{
- struct iof_softc *sc = (struct iof_softc *)v;
- uint32_t spending, opending, mask;
- int dev;
-
- spending = bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IR) &
- bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IES);
- opending = bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IR) &
- bus_space_read_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IES);
-
- if (spending == 0 && opending == 0)
- return 0;
-
- /* Disable pending interrupts */
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_SIO_IEC, spending);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, IOC4_OTHER_IEC, opending);
-
- for (dev = 0; dev < IOC4_NDEVS; dev++) {
- mask = spending & ioc4_intrbits[dev].sio;
- if (mask != 0) {
- (void)iof_intr_dispatch(sc, dev);
-
- /* Ack, then reenable, pending interrupts */
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC4_SIO_IR, mask);
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC4_SIO_IES, mask);
- }
- mask = opending & ioc4_intrbits[dev].other;
- if (mask != 0) {
- (void)iof_intr_dispatch(sc, dev);
-
- /* Ack, then reenable, pending interrupts */
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC4_OTHER_IR, mask);
- bus_space_write_4(sc->sc_memt, sc->sc_memh,
- IOC4_OTHER_IES, mask);
- }
- }
-
- return 1;
-}
-
-int
-iof_intr_dispatch(struct iof_softc *sc, int dev)
-{
- struct iof_intr *ii;
- int rc = 0;
-
- /* Call registered interrupt function. */
- if ((ii = sc->sc_intr[dev]) != NULL && ii->ii_func != NULL) {
- rc = (*ii->ii_func)(ii->ii_arg);
- if (rc != 0)
- ii->ii_count.ec_count++;
- }
-
- return rc;
-}
+++ /dev/null
-/* $OpenBSD: iofreg.h,v 1.5 2013/12/30 05:27:01 miod Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Register definitions for SGI IOC4 ASIC.
- */
-
-#define IOC4_NDEVS 7
-
-#define IOC4DEV_SERIAL_A 0
-#define IOC4DEV_SERIAL_B 1
-#define IOC4DEV_SERIAL_C 2
-#define IOC4DEV_SERIAL_D 3
-#define IOC4DEV_KBC 4
-#define IOC4DEV_ATAPI 5
-#define IOC4DEV_RTC 6
-
-/* Interrupt control registers */
-#define IOC4_SIO_IR 0x00000008
-#define IOC4_OTHER_IR 0x0000000c
-#define IOC4_SIO_IES 0x00000010
-#define IOC4_OTHER_IES 0x00000014
-#define IOC4_SIO_IEC 0x00000018
-#define IOC4_OTHER_IEC 0x0000001c
-#define IOC4_SIO_CR 0x00000020
-#define IOC4_MCR 0x00000024
-
-/* Keyboard controller registers */
-#define IOC4_KBC_CTRL_STATUS 0x00000200
-#define IOC4_KBC_KBD_RX 0x00000204
-#define IOC4_KBC_AUX_RX 0x00000208
-#define IOC4_KBC_KBD_TX 0x0000020c
-#define IOC4_KBC_AUX_TX 0x00000210
-
-/* bits in the SIO interrupt register */
-#define IOC4_SIRQ_UARTA 0x00000040 /* UART A passthrough */
-#define IOC4_SIRQ_UARTB 0x00004000 /* UART B passthrough */
-#define IOC4_SIRQ_UARTC 0x00400000 /* UART C passthrough */
-#define IOC4_SIRQ_UARTD 0x40000000 /* UART D passthrough */
-
-/* bits in the OTHER interrupt register */
-#define IOC4_OIRQ_ATAPI 0x00000001 /* ATAPI passthrough */
-#define IOC4_OIRQ_KBC 0x00000040 /* keyboard controller */
-
-/* bits in the MCR register */
-#define IOC4_MCR_PCI_66MHZ 0x00000001
-
-#define IOC4_ATAPI_BASE 0x00000100
-#define IOC4_ATAPI_SIZE 0x00000100
-
-#define IOC4_KBC_BASE 0x00000200
-#define IOC4_KBC_SIZE 0x00000014
-
-#define IOC4_UARTA_BASE 0x00000380
-#define IOC4_UARTB_BASE 0x00000388
-#define IOC4_UARTC_BASE 0x00000390
-#define IOC4_UARTD_BASE 0x00000398
-
-#define IOC4_BYTEBUS_0 0x00080000
-#define IOC4_BYTEBUS_1 0x000a0000
-#define IOC4_BYTEBUS_2 0x000c0000
-#define IOC4_BYTEBUS_3 0x000e0000
+++ /dev/null
-/* $OpenBSD: iofvar.h,v 1.4 2010/04/06 19:12:34 miod Exp $ */
-
-/*
- * Copyright (c) 2009, 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-struct iof_attach_args {
- const char *iaa_name;
-
- bus_space_tag_t iaa_memt;
- bus_space_handle_t iaa_memh;
- bus_dma_tag_t iaa_dmat;
-
- bus_addr_t iaa_base;
- uint iaa_dev;
- uint iaa_clock;
-
- struct sgi_device_location iaa_location;
-};
-
-void *iof_intr_establish(void *, uint, int, int (*)(void *), void *, char *);
+++ /dev/null
-/* $OpenBSD: macepcibridge.c,v 1.49 2018/12/03 13:46:30 visa Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * Machine dependent PCI BUS Bridge driver on Mace (O2).
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/device.h>
-#include <sys/proc.h>
-#include <sys/ioctl.h>
-#include <sys/extent.h>
-
-#include <machine/autoconf.h>
-#include <machine/cpu.h>
-#include <machine/vmparam.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/ppbreg.h>
-#include <dev/pci/pcidevs.h>
-
-#include <dev/cardbus/rbus.h>
-
-#include <mips64/archtype.h>
-#include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
-#include <sgi/localbus/macebusvar.h>
-#include <sgi/pci/macepcibrvar.h>
-
-#include "cardbus.h"
-
-int mace_pcibrmatch(struct device *, void *, void *);
-void mace_pcibrattach(struct device *, struct device *, void *);
-
-void mace_pcibr_attach_hook(struct device *, struct device *,
- struct pcibus_attach_args *);
-int mace_pcibr_bus_maxdevs(void *, int);
-pcitag_t mace_pcibr_make_tag(void *, int, int, int);
-void mace_pcibr_decompose_tag(void *, pcitag_t, int *, int *, int *);
-int mace_pcibr_conf_size(void *, pcitag_t);
-pcireg_t mace_pcibr_conf_read(void *, pcitag_t, int);
-void mace_pcibr_conf_write(void *, pcitag_t, int, pcireg_t);
-int mace_pcibr_probe_device_hook(void *, struct pci_attach_args *);
-int mace_pcibr_get_widget(void *);
-int mace_pcibr_get_dl(void *, pcitag_t, struct sgi_device_location *);
-int mace_pcibr_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
-const char *mace_pcibr_intr_string(void *, pci_intr_handle_t);
-void *mace_pcibr_intr_establish(void *, pci_intr_handle_t, int,
- int (*)(void *), void *, const char *);
-void mace_pcibr_intr_disestablish(void *, void *);
-int mace_pcibr_intr_line(void *, pci_intr_handle_t);
-int mace_pcibr_ppb_setup(void *, pcitag_t, bus_addr_t *, bus_addr_t *,
- bus_addr_t *, bus_addr_t *);
-void *mace_pcibr_rbus_parent_io(struct pci_attach_args *);
-void *mace_pcibr_rbus_parent_mem(struct pci_attach_args *);
-
-void *mace_pcib_space_vaddr(bus_space_tag_t, bus_space_handle_t);
-void mace_pcib_space_barrier(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_size_t, int);
-bus_addr_t mace_pcibr_pa_to_device(paddr_t, int);
-
-int mace_pcibr_rbus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t,
- int, bus_space_handle_t *);
-void mace_pcibr_rbus_space_unmap(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_addr_t *);
-
-void mace_pcibr_configure(struct mace_pcibr_softc *);
-void mace_pcibr_device_fixup(struct mace_pcibr_softc *, int, int);
-int mace_pcibr_errintr(void *);
-
-struct cfattach macepcibr_ca = {
- sizeof(struct mace_pcibr_softc), mace_pcibrmatch, mace_pcibrattach,
-};
-
-struct cfdriver macepcibr_cd = {
- NULL, "macepcibr", DV_DULL,
-};
-
-bus_space_t mace_pcibbus_mem_tag = {
- PHYS_TO_XKPHYS(MACE_PCI_MEM_BASE, CCA_NC),
- NULL,
- mace_pcib_read_1, mace_pcib_write_1,
- mace_pcib_read_2, mace_pcib_write_2,
- mace_pcib_read_4, mace_pcib_write_4,
- mace_pcib_read_8, mace_pcib_write_8,
- mace_pcib_read_raw_2, mace_pcib_write_raw_2,
- mace_pcib_read_raw_4, mace_pcib_write_raw_4,
- mace_pcib_read_raw_8, mace_pcib_write_raw_8,
- mace_pcib_space_map, mace_pcib_space_unmap, mace_pcib_space_region,
- mace_pcib_space_vaddr, mace_pcib_space_barrier
-};
-
-bus_space_t mace_pcibbus_io_tag = {
- PHYS_TO_XKPHYS(MACE_PCI_IO_BASE, CCA_NC),
- NULL,
- mace_pcib_read_1, mace_pcib_write_1,
- mace_pcib_read_2, mace_pcib_write_2,
- mace_pcib_read_4, mace_pcib_write_4,
- mace_pcib_read_8, mace_pcib_write_8,
- mace_pcib_read_raw_2, mace_pcib_write_raw_2,
- mace_pcib_read_raw_4, mace_pcib_write_raw_4,
- mace_pcib_read_raw_8, mace_pcib_write_raw_8,
- mace_pcib_space_map, mace_pcib_space_unmap, mace_pcib_space_region,
- mace_pcib_space_vaddr, mace_pcib_space_barrier
-};
-
-static const struct mips_pci_chipset mace_pci_chipset = {
- .pc_attach_hook = mace_pcibr_attach_hook,
- .pc_bus_maxdevs = mace_pcibr_bus_maxdevs,
- .pc_make_tag = mace_pcibr_make_tag,
- .pc_decompose_tag = mace_pcibr_decompose_tag,
- .pc_conf_size = mace_pcibr_conf_size,
- .pc_conf_read = mace_pcibr_conf_read,
- .pc_conf_write = mace_pcibr_conf_write,
- .pc_probe_device_hook = mace_pcibr_probe_device_hook,
- .pc_get_widget = mace_pcibr_get_widget,
- .pc_get_dl = mace_pcibr_get_dl,
- .pc_intr_map = mace_pcibr_intr_map,
- .pc_intr_string = mace_pcibr_intr_string,
- .pc_intr_establish = mace_pcibr_intr_establish,
- .pc_intr_disestablish = mace_pcibr_intr_disestablish,
- .pc_intr_line = mace_pcibr_intr_line,
- .pc_ppb_setup = mace_pcibr_ppb_setup,
-#if NCARDBUS > 0
- .pc_rbus_parent_io = mace_pcibr_rbus_parent_io,
- .pc_rbus_parent_mem = mace_pcibr_rbus_parent_mem
-#endif
-};
-
-/*
- * PCI doesn't have any special needs; just use the generic versions
- * of these functions.
- */
-struct machine_bus_dma_tag mace_pci_bus_dma_tag = {
- NULL, /* _cookie */
- _dmamap_create,
- _dmamap_destroy,
- _dmamap_load,
- _dmamap_load_mbuf,
- _dmamap_load_uio,
- _dmamap_load_raw,
- _dmamap_load_buffer,
- _dmamap_unload,
- _dmamap_sync,
- _dmamem_alloc,
- _dmamem_free,
- _dmamem_map,
- _dmamem_unmap,
- _dmamem_mmap,
- mace_pcibr_pa_to_device,
- CRIME_MEMORY_MASK
-};
-
-const struct _perr_map {
- pcireg_t mask;
- pcireg_t flag;
- const char *text;
-} perr_map[] = {
- { PERR_MASTER_ABORT, PERR_MASTER_ABORT_ADDR_VALID, "master abort" },
- { PERR_TARGET_ABORT, PERR_TARGET_ABORT_ADDR_VALID, "target abort" },
- { PERR_DATA_PARITY_ERR,PERR_DATA_PARITY_ADDR_VALID, "data parity error" },
- { PERR_RETRY_ERR, PERR_RETRY_ADDR_VALID, "retry error" },
- { PERR_ILLEGAL_CMD, 0, "illegal command" },
- { PERR_SYSTEM_ERR, 0, "system error" },
- { PERR_INTERRUPT_TEST,0, "interrupt test" },
- { PERR_PARITY_ERR, 0, "parity error" },
- { PERR_OVERRUN, 0, "overrun error" },
- { PERR_RSVD, 0, "reserved ??" },
- { PERR_MEMORY_ADDR, 0, "memory address" },
- { PERR_CONFIG_ADDR, 0, "config address" },
- { 0, 0, NULL }
-};
-
-static int mace_pcibrprint(void *, const char *pnp);
-
-int
-mace_pcibrmatch(struct device *parent, void *match, void *aux)
-{
- switch (sys_config.system_type) {
- case SGI_O2:
- return 1;
- default:
- return 0;
- }
-}
-
-void
-mace_pcibrattach(struct device *parent, struct device *self, void *aux)
-{
- struct mace_pcibr_softc *sc = (struct mace_pcibr_softc *)self;
- struct pcibus_attach_args pba;
- struct macebus_attach_args *maa = aux;
- pcireg_t pcireg;
-
- sc->sc_mem_bus_space = &mace_pcibbus_mem_tag;
- sc->sc_io_bus_space = &mace_pcibbus_io_tag;
-
- /* Map in PCI control registers */
- sc->sc_memt = maa->maa_memt;
- if (bus_space_map(sc->sc_memt, maa->maa_baseaddr, 4096, 0,
- &sc->sc_memh)) {
- printf(": can't map PCI control registers\n");
- return;
- }
- pcireg = bus_space_read_4(sc->sc_memt, sc->sc_memh, MACE_PCI_REVISION);
-
- printf(": mace rev %d\n", pcireg);
-
- /* Register the PCI ERROR interrupt handler */
- macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
- IPL_HIGH, mace_pcibr_errintr, sc, sc->sc_dev.dv_xname);
-
- bcopy(&mace_pci_chipset, &sc->sc_pc, sizeof(mace_pci_chipset));
- sc->sc_pc.pc_conf_v = sc;
- sc->sc_pc.pc_intr_v = NULL;
-
- /*
- * The O2 firmware sucks. It makes a mess of I/O BARs and
- * an even bigger mess for PCI-PCI bridges.
- */
- mace_pcibr_configure(sc);
-
- /*
- * Configure our PCI devices.
- */
- bzero(&pba, sizeof(pba));
- pba.pba_busname = "pci";
- pba.pba_iot = sc->sc_io_bus_space;
- pba.pba_memt = sc->sc_mem_bus_space;
- pba.pba_dmat = &mace_pci_bus_dma_tag;
- pba.pba_pc = &sc->sc_pc;
- pba.pba_ioex = extent_create("mace_io", 0, 0xffffffff, M_DEVBUF,
- NULL, 0, EX_NOWAIT | EX_FILLED);
- if (pba.pba_ioex != NULL) {
- /*
- * I/O accesses at address zero cause PCI errors, so
- * make sure the first few bytes are not available.
- */
- extent_free(pba.pba_ioex, 0x20, (1UL << 32) - 0x20, EX_NOWAIT);
- }
- pba.pba_memex = extent_create("mace_mem", 0, 0xffffffff, M_DEVBUF,
- NULL, 0, EX_NOWAIT | EX_FILLED);
- if (pba.pba_memex != NULL)
- extent_free(pba.pba_memex, MACE_PCI_MEM_OFFSET,
- MACE_PCI_MEM_SIZE, EX_NOWAIT);
- pba.pba_domain = pci_ndomains++;
- pba.pba_bus = 0;
- config_found(self, &pba, mace_pcibrprint);
-
- /* Clear PCI errors and set up error interrupt */
- bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_ERROR_FLAGS, 0);
- pcireg = bus_space_read_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CONTROL);
- pcireg |= MACE_PCI_INTCTRL;
- bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CONTROL, pcireg);
-}
-
-static int
-mace_pcibrprint(void *aux, const char *pnp)
-{
- struct pcibus_attach_args *pba = aux;
-
- if (pnp)
- printf("%s at %s", pba->pba_busname, pnp);
- printf(" bus %d", pba->pba_bus);
- return (UNCONF);
-}
-
-void
-mace_pcibr_attach_hook(struct device *parent, struct device *self,
- struct pcibus_attach_args *pba)
-{
-}
-
-int
-mace_pcibr_errintr(void *v)
-{
- struct mace_pcibr_softc *sc = v;
- bus_space_tag_t memt = sc->sc_memt;
- bus_space_handle_t memh = sc->sc_memh;
- const struct _perr_map *emap = perr_map;
- pcireg_t stat, erraddr;
-
- /* Check and clear any PCI error, report found */
- stat = bus_space_read_4(memt, memh, MACE_PCI_ERROR_FLAGS);
- erraddr = bus_space_read_4(memt, memh, MACE_PCI_ERROR_ADDRESS);
- while (emap->mask) {
- if (stat & emap->mask) {
- printf("mace: pci err %s", emap->text);
- if (emap->flag && stat & emap->flag)
- printf(" at address 0x%08x", erraddr);
- printf("\n");
- }
- emap++;
- }
- bus_space_write_4(memt, memh, MACE_PCI_ERROR_FLAGS, 0);
- return 1;
-}
-
-/*
- * PCI access drivers
- */
-
-pcitag_t
-mace_pcibr_make_tag(void *cpv, int bus, int dev, int fnc)
-{
- return (bus << 16) | (dev << 11) | (fnc << 8);
-}
-
-void
-mace_pcibr_decompose_tag(void *cpv, pcitag_t tag, int *busp, int *devp,
- int *fncp)
-{
- if (busp != NULL)
- *busp = (tag >> 16) & 0xff;
- if (devp != NULL)
- *devp = (tag >> 11) & 0x1f;
- if (fncp != NULL)
- *fncp = (tag >> 8) & 0x7;
-}
-
-int
-mace_pcibr_bus_maxdevs(void *cpv, int busno)
-{
- return busno == 0 ? 6 : 32;
-}
-
-int
-mace_pcibr_conf_size(void *cpv, pcitag_t tag)
-{
- return PCI_CONFIG_SPACE_SIZE;
-}
-
-pcireg_t
-mace_pcibr_conf_read(void *cpv, pcitag_t tag, int offset)
-{
- struct mace_pcibr_softc *sc = cpv;
- bus_space_tag_t memt = sc->sc_memt;
- bus_space_handle_t memh = sc->sc_memh;
- pcireg_t data, stat;
- int bus, dev;
- int s;
-
- s = splhigh();
-
- bus_space_write_4(memt, memh, MACE_PCI_ERROR_FLAGS, 0);
- data = tag | offset;
- bus_space_write_4(memt, memh, MACE_PCI_CFGADDR, data);
- data = bus_space_read_4(memt, memh, MACE_PCI_CFGDATA);
- bus_space_write_4(memt, memh, MACE_PCI_CFGADDR, 0);
-
- /*
- * Onboard ahc on O2 can do Ultra speed despite not
- * having SEEPROM nor external precision resistors.
- */
- mace_pcibr_decompose_tag(cpv, tag, &bus, &dev, NULL);
- if (bus == 0 && (dev == 1 || dev == 2) && offset == 0x40)
- data |= 0x1000; /* REXTVALID */
-
- /* Check and clear any PCI error, returns -1 if error is found */
- stat = bus_space_read_4(memt, memh, MACE_PCI_ERROR_FLAGS);
- bus_space_write_4(memt, memh, MACE_PCI_ERROR_FLAGS, 0);
- if (stat & (PERR_MASTER_ABORT | PERR_TARGET_ABORT |
- PERR_DATA_PARITY_ERR | PERR_RETRY_ERR)) {
- data = -1;
- }
-
- splx(s);
- return(data);
-}
-
-void
-mace_pcibr_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
-{
- struct mace_pcibr_softc *sc = cpv;
- pcireg_t addr;
- int s;
-
- s = splhigh();
-
- addr = tag | offset;
- bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CFGADDR, addr);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CFGDATA, data);
- bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CFGADDR, 0);
-
- splx(s);
-}
-
-int
-mace_pcibr_probe_device_hook(void *unused, struct pci_attach_args *notused)
-{
- return 0;
-}
-
-int
-mace_pcibr_get_widget(void *unused)
-{
- return 0;
-}
-
-int
-mace_pcibr_get_dl(void *cpv, pcitag_t tag, struct sgi_device_location *sdl)
-{
- int bus, device, fn;
-
- memset(sdl, 0, sizeof *sdl);
- mace_pcibr_decompose_tag(cpv, tag, &bus, &device, &fn);
- if (bus != 0)
- return 0;
- sdl->device = device;
- sdl->fn = fn;
- return 1;
-}
-
-int
-mace_pcibr_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
-{
- int bus, dev, pin = pa->pa_rawintrpin;
- static const signed char intrmap[][PCI_INTERRUPT_PIN_MAX] = {
- { -1, -1, -1, -1 },
- { 8, -1, -1, -1 }, /* ahc0 */
- { 9, -1, -1, -1 }, /* ahc1 */
- { 10, 13, 14, 15 }, /* slot */
- { 11, 15, 13, 14 }, /* no slots... */
- { 12, 14, 15, 13 } /* ... unless you solder them */
- };
-
- *ihp = -1;
-
- if (pin == 0) {
- /* No IRQ used. */
- return 1;
- }
-#ifdef DIAGNOSTIC
- if (pin > PCI_INTERRUPT_PIN_MAX) {
- printf("mace_pcibr_intr_map: bad interrupt pin %d\n", pin);
- return 1;
- }
-#endif
-
- pci_decompose_tag(pa->pa_pc, pa->pa_tag, &bus, &dev, NULL);
-
- if (pa->pa_bridgetag) {
- pin = PPB_INTERRUPT_SWIZZLE(pin, dev);
- *ihp = pa->pa_bridgeih[pin - PCI_INTERRUPT_PIN_A];
-
- return ((*ihp == -1) ? 1 : 0);
- }
-
- if (dev < nitems(intrmap))
- *ihp = intrmap[dev][pin - PCI_INTERRUPT_PIN_A];
-
- return ((*ihp == -1) ? 1 : 0);
-}
-
-const char *
-mace_pcibr_intr_string(void *lcv, pci_intr_handle_t ih)
-{
- static char str[16];
-
- snprintf(str, sizeof(str), "irq %ld", ih);
- return(str);
-}
-
-void *
-mace_pcibr_intr_establish(void *lcv, pci_intr_handle_t ih, int level,
- int (*func)(void *), void *arg, const char *name)
-{
- return macebus_intr_establish(ih, 0, level, func, arg, name);
-}
-
-void
-mace_pcibr_intr_disestablish(void *lcv, void *ih)
-{
- macebus_intr_disestablish(ih);
-}
-
-int
-mace_pcibr_intr_line(void *lcv, pci_intr_handle_t ih)
-{
- return ih;
-}
-
-/*
- * Bus access primitives
- */
-
-u_int8_t
-mace_pcib_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile u_int8_t *)(h + (o ^ 3));
-}
-
-u_int16_t
-mace_pcib_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile u_int16_t *)(h + (o ^ 2));
-}
-
-u_int32_t
-mace_pcib_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile u_int32_t *)(h + o);
-}
-
-u_int64_t
-mace_pcib_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile u_int64_t *)(h + o);
-}
-
-void
-mace_pcib_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
- u_int8_t v)
-{
- *(volatile u_int8_t *)(h + (o ^ 3)) = v;
-}
-
-void
-mace_pcib_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
- u_int16_t v)
-{
- *(volatile u_int16_t *)(h + (o ^ 2)) = v;
-}
-
-void
-mace_pcib_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
- u_int32_t v)
-{
- *(volatile u_int32_t *)(h + o) = v;
-}
-
-void
-mace_pcib_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
- u_int64_t v)
-{
- *(volatile u_int64_t *)(h + o) = v;
-}
-
-void
-mace_pcib_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- u_int8_t *buf, bus_size_t len)
-{
- volatile u_int16_t *addr = (volatile u_int16_t *)(h + (o ^ 2));
- len >>= 1;
- while (len-- != 0) {
- *(u_int16_t *)buf = letoh16(*addr);
- buf += 2;
- }
-}
-
-void
-mace_pcib_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const u_int8_t *buf, bus_size_t len)
-{
- volatile u_int16_t *addr = (volatile u_int16_t *)(h + (o ^ 2));
- len >>= 1;
- while (len-- != 0) {
- *addr = htole16(*(u_int16_t *)buf);
- buf += 2;
- }
-}
-
-void
-mace_pcib_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- u_int8_t *buf, bus_size_t len)
-{
- volatile u_int32_t *addr = (volatile u_int32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *(u_int32_t *)buf = letoh32(*addr);
- buf += 4;
- }
-}
-
-void
-mace_pcib_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const u_int8_t *buf, bus_size_t len)
-{
- volatile u_int32_t *addr = (volatile u_int32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *addr = htole32(*(u_int32_t *)buf);
- buf += 4;
- }
-}
-
-void
-mace_pcib_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- u_int8_t *buf, bus_size_t len)
-{
- volatile u_int64_t *addr = (volatile u_int64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *(u_int64_t *)buf = letoh64(*addr);
- buf += 8;
- }
-}
-
-void
-mace_pcib_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const u_int8_t *buf, bus_size_t len)
-{
- volatile u_int64_t *addr = (volatile u_int64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *addr = htole64(*(u_int64_t *)buf);
- buf += 8;
- }
-}
-
-int
-mace_pcib_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
-#ifdef DIAGNOSTIC
- if (t->bus_base == mace_pcibbus_mem_tag.bus_base) {
- if (offs < MACE_PCI_MEM_OFFSET ||
- ((offs + size - 1) >> 32) != 0)
- return EINVAL;
- } else {
- if (((offs + size - 1) >> 32) != 0)
- return EINVAL;
- }
-#endif
-
- if (ISSET(flags, BUS_SPACE_MAP_CACHEABLE))
- offs +=
- PHYS_TO_XKPHYS(0, CCA_CACHED) - PHYS_TO_XKPHYS(0, CCA_NC);
- *bshp = t->bus_base + offs;
- return 0;
-}
-
-void
-mace_pcib_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t size)
-{
-}
-
-int
-mace_pcib_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
- *nbshp = bsh + offset;
- return (0);
-}
-
-void *
-mace_pcib_space_vaddr(bus_space_tag_t t, bus_space_handle_t h)
-{
- return (void *)h;
-}
-
-void
-mace_pcib_space_barrier(bus_space_tag_t t, bus_space_handle_t h,
- bus_size_t offs, bus_size_t len, int flags)
-{
- mips_sync();
-}
-
-/*
- * Mace PCI bus_dma helpers.
- * The PCI bus accesses memory contiguously at 0x00000000 onwards.
- */
-
-bus_addr_t
-mace_pcibr_pa_to_device(paddr_t pa, int flags)
-{
- return (pa & CRIME_MEMORY_MASK);
-}
-
-/*
- * PCI configuration.
- */
-
-void
-mace_pcibr_configure(struct mace_pcibr_softc *sc)
-{
- pci_chipset_tag_t pc = &sc->sc_pc;
- pcitag_t tag;
- pcireg_t id, bhlcr;
- int dev, nfuncs;
- uint nppb, npccbb;
- const struct pci_quirkdata *qd;
-
- nppb = npccbb = 0;
- for (dev = 0; dev < pci_bus_maxdevs(pc, 0); dev++) {
- tag = pci_make_tag(pc, 0, dev, 0);
-
- id = pci_conf_read(pc, tag, PCI_ID_REG);
- if (PCI_VENDOR(id) == PCI_VENDOR_INVALID ||
- PCI_VENDOR(id) == 0)
- continue;
-
- bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
- if (PCI_HDRTYPE_TYPE(bhlcr) == 1)
- nppb++;
- if (PCI_HDRTYPE_TYPE(bhlcr) == 2)
- npccbb++;
-
- qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
- if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
- (qd != NULL && (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
- nfuncs = 8;
- else
- nfuncs = 1;
-
- mace_pcibr_device_fixup(sc, dev, nfuncs);
- }
-
- /*
- * Since there is only one working slot, there should be only
- * up to one bridge (PCI-PCI or PCI-CardBus), which we'll map
- * after the on-board device resources.
- */
- if (nppb + npccbb != 1)
- return;
-
- for (dev = 0; dev < pci_bus_maxdevs(pc, 0); dev++) {
- tag = pci_make_tag(pc, 0, dev, 0);
-
- id = pci_conf_read(pc, tag, PCI_ID_REG);
- if (PCI_VENDOR(id) == PCI_VENDOR_INVALID ||
- PCI_VENDOR(id) == 0)
- continue;
-
- bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
- switch (PCI_HDRTYPE_TYPE(bhlcr)) {
- case 1:
- ppb_initialize(pc, tag, 0, 1, 255);
- break;
- case 2:
- pccbb_initialize(pc, tag, 0, 1, 1);
- break;
- }
- }
-}
-
-void
-mace_pcibr_device_fixup(struct mace_pcibr_softc *sc, int dev, int nfuncs)
-{
- pci_chipset_tag_t pc = &sc->sc_pc;
- pcitag_t tag;
- pcireg_t csr, bhlcr, type;
- int function;
- int reg, reg_start, reg_end;
-
- for (function = 0; function < nfuncs; function++) {
- tag = pci_make_tag(pc, 0, dev, function);
-
- bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
- switch (PCI_HDRTYPE_TYPE(bhlcr)) {
- case 0:
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_END;
- break;
- case 1: /* PCI-PCI bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PPB_END;
- break;
- case 2: /* PCI-CardBus bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PCB_END;
- break;
- default:
- continue;
- }
-
- /*
- * The firmware will only initialize memory BARs, and only
- * the lower half of them if they are 64 bit.
- * So here we disable I/O space and reset the I/O BARs to 0,
- * and make sure the upper part of 64 bit memory BARs is
- * correct.
- * Device drivers will allocate resources themselves and
- * enable I/O space on an as-needed basis.
- */
- csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
- pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
- csr & ~PCI_COMMAND_IO_ENABLE);
-
- for (reg = reg_start; reg < reg_end; reg += 4) {
- if (pci_mapreg_probe(pc, tag, reg, &type) == 0)
- continue;
-
- switch (type) {
- case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
- reg += 4;
- /* FALLTHROUGH */
- case PCI_MAPREG_TYPE_IO:
- pci_conf_write(pc, tag, reg, 0);
- break;
- }
- }
- }
-}
-
-int
-mace_pcibr_ppb_setup(void *cookie, pcitag_t tag, bus_addr_t *iostart,
- bus_addr_t *ioend, bus_addr_t *memstart, bus_addr_t *memend)
-{
- if (*memend != 0) {
- /*
- * Give all resources to the bridge
- * (except for the few the on-board ahc(4) will use).
- */
- *memstart = 0x81000000;
- *memend = 0xffffffff;
- } else {
- *memstart = 0xffffffff;
- *memend = 0;
- }
-
- if (*ioend != 0) {
- /*
- * Give all resources to the bridge
- * (except for the few the on-board ahc(4) will use).
- */
- *iostart = 0x00010000;
- *ioend = 0xffffffff;
- } else {
- *iostart = 0xffffffff;
- *ioend = 0;
- }
-
- return 0;
-}
-
-#if NCARDBUS > 0
-
-static struct rb_md_fnptr mace_pcibr_rb_md_fn = {
- mace_pcibr_rbus_space_map,
- mace_pcibr_rbus_space_unmap
-};
-
-int
-mace_pcibr_rbus_space_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
- return bus_space_map(t, addr, size, flags, bshp);
-}
-
-void
-mace_pcibr_rbus_space_unmap(bus_space_tag_t t, bus_space_handle_t h,
- bus_size_t size, bus_addr_t *addrp)
-{
- bus_space_unmap(t, h, size);
- /* can't simply subtract because of possible cacheability */
- *addrp = XKPHYS_TO_PHYS(h) - XKPHYS_TO_PHYS(t->bus_base);
-}
-
-void *
-mace_pcibr_rbus_parent_io(struct pci_attach_args *pa)
-{
- rbus_tag_t rb;
-
- rb = rbus_new_root_share(pa->pa_iot, pa->pa_ioex,
- 0x0000, 0xffff);
- if (rb != NULL)
- rb->rb_md = &mace_pcibr_rb_md_fn;
-
- return rb;
-}
-
-void *
-mace_pcibr_rbus_parent_mem(struct pci_attach_args *pa)
-{
- rbus_tag_t rb;
-
- rb = rbus_new_root_share(pa->pa_memt, pa->pa_memex,
- 0, 0xffffffff);
- if (rb != NULL)
- rb->rb_md = &mace_pcibr_rb_md_fn;
-
- return rb;
-}
-
-#endif /* NCARDBUS > 0 */
+++ /dev/null
-/* $OpenBSD: macepcibrvar.h,v 1.6 2009/07/22 20:28:21 miod Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _PCIBRVAR_H_
-#define _PCIBRVAR_H_
-
-/*
- * Addresses of the PCI I/O and memory spaces.
- *
- * Note that PCI memory space addresses need to have bit 31 set to
- * reach hardware, otherwise they reach physical memory.
- */
-#define MACE_PCI_IO_BASE 0x100000000UL
-#define MACE_PCI_MEM_BASE 0x200000000UL
-#define MACE_PCI_MEM_OFFSET 0x80000000
-#define MACE_PCI_MEM_SIZE 0x80000000
-
-struct mace_pcibr_softc {
- struct device sc_dev;
- struct mips_bus_space *sc_mem_bus_space;
- struct mips_bus_space *sc_io_bus_space;
- struct mips_pci_chipset sc_pc;
- bus_space_tag_t sc_memt;
- bus_space_handle_t sc_memh;
-};
-
-u_int8_t mace_pcib_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int16_t mace_pcib_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int32_t mace_pcib_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int64_t mace_pcib_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-
-void mace_pcib_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int8_t);
-void mace_pcib_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int16_t);
-void mace_pcib_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int32_t);
-void mace_pcib_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- u_int64_t);
-
-void mace_pcib_read_raw_2(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, u_int8_t *, bus_size_t);
-void mace_pcib_write_raw_2(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, const u_int8_t *, bus_size_t);
-void mace_pcib_read_raw_4(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, u_int8_t *, bus_size_t);
-void mace_pcib_write_raw_4(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, const u_int8_t *, bus_size_t);
-void mace_pcib_read_raw_8(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, u_int8_t *, bus_size_t);
-void mace_pcib_write_raw_8(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, const u_int8_t *, bus_size_t);
-
-int mace_pcib_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-void mace_pcib_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-int mace_pcib_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, bus_space_handle_t *);
-
-#endif
+++ /dev/null
-/* $OpenBSD: pci_machdep.c,v 1.5 2009/07/23 19:24:30 miod Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/extent.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pccbbreg.h>
-#include <dev/pci/ppbreg.h>
-#include <dev/pci/pcidevs.h>
-
-void ppb_device_explore(pci_chipset_tag_t, uint, int, int, struct extent *,
- struct extent *);
-void ppb_function_explore(pci_chipset_tag_t, pcitag_t, struct extent *,
- struct extent *);
-
-/*
- * Configure a PCI-PCI bridge.
- */
-void
-ppb_initialize(pci_chipset_tag_t pc, pcitag_t ppbtag, uint primary,
- uint secondary, uint subordinate)
-{
- int dev, nfuncs;
- pcireg_t id, csr, bhlcr;
- pcitag_t tag;
- const struct pci_quirkdata *qd;
- bus_addr_t iostart, ioend, memstart, memend;
- struct extent *ioex, *memex;
- struct extent_region *region;
-
- /*
- * In a first pass, enable access to the configuration space,
- * and figure out what resources the devices behind it will
- * need.
- *
- * Note that, doing this, we do not intend to support any
- * hotplug capabilities. This should not be a problem on
- * sgi.
- */
-
- csr = pci_conf_read(pc, ppbtag, PCI_COMMAND_STATUS_REG);
- csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
- pci_conf_write(pc, ppbtag, PCI_COMMAND_STATUS_REG, csr);
-
- pci_conf_write(pc, ppbtag, PPB_REG_BUSINFO,
- primary | (secondary << 8) | (subordinate << 16));
-
- ioex = extent_create("ppb_io", 0, 0xffffffff,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
- memex = extent_create("ppb_mem", 0, 0xffffffff,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
-
- for (dev = 0; dev < pci_bus_maxdevs(pc, secondary); dev++) {
- tag = pci_make_tag(pc, secondary, dev, 0);
- id = pci_conf_read(pc, tag, PCI_ID_REG);
-
- if (PCI_VENDOR(id) == PCI_VENDOR_INVALID ||
- PCI_VENDOR(id) == 0)
- continue;
-
- bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
- qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
- if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
- (qd != NULL && (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
- nfuncs = 8;
- else
- nfuncs = 1;
-
- ppb_device_explore(pc, secondary, dev, nfuncs, ioex, memex);
- }
-
- /*
- * Now figure out the size of the resources we need...
- */
-
- iostart = memstart = 0xffffffff;
- ioend = memend = 0;
-
- if (ioex != NULL) {
- LIST_FOREACH(region, &ioex->ex_regions, er_link) {
- if (region->er_start < iostart)
- iostart = region->er_start;
- if (region->er_end > ioend)
- ioend = region->er_end;
- }
- extent_destroy(ioex);
- }
- if (memex != NULL) {
- LIST_FOREACH(region, &memex->ex_regions, er_link) {
- if (region->er_start < memstart)
- memstart = region->er_start;
- if (region->er_end > memend)
- memend = region->er_end;
- }
- extent_destroy(memex);
- }
-
- /*
- * ... and ask the bridge to setup resources for them.
- */
-
- if (pc->pc_ppb_setup == NULL || (*pc->pc_ppb_setup)(pc->pc_conf_v,
- ppbtag, &iostart, &ioend, &memstart, &memend) != 0) {
- iostart = memstart = 0xffffffff;
- ioend = memend = 0;
- }
-
- pci_conf_write(pc, ppbtag, PPB_REG_MEM,
- ((memstart & 0xfff00000) >> 16) | (memend & 0xfff00000));
- pci_conf_write(pc, ppbtag, PPB_REG_IOSTATUS,
- (pci_conf_read(pc, ppbtag, PPB_REG_IOSTATUS) & 0xffff0000) |
- ((iostart & 0x0000f000) >> 8) | (ioend & 0x0000f000));
- pci_conf_write(pc, ppbtag, PPB_REG_IO_HI,
- ((iostart & 0xffff0000) >> 16) | (ioend & 0xffff0000));
- pci_conf_write(pc, ppbtag, PPB_REG_PREFMEM, 0x0000fff0);
- pci_conf_write(pc, ppbtag, PPB_REG_PREFBASE_HI32, 0);
- pci_conf_write(pc, ppbtag, PPB_REG_PREFLIM_HI32, 0);
-
- if (iostart <= ioend)
- csr |= PCI_COMMAND_IO_ENABLE;
- if (memstart <= memend)
- csr |= PCI_COMMAND_MEM_ENABLE;
-
- pci_conf_write(pc, ppbtag, PCI_COMMAND_STATUS_REG, csr |
- PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_INVALIDATE_ENABLE |
- PCI_COMMAND_SERR_ENABLE);
-}
-
-/*
- * Figure out what resources a device behind a bridge would need and
- * disable them.
- */
-void
-ppb_device_explore(pci_chipset_tag_t pc, uint bus, int dev, int nfuncs,
- struct extent *ioex, struct extent *memex)
-{
- pcitag_t tag;
- pcireg_t id;
- int function;
-
- for (function = 0; function < nfuncs; function++) {
- tag = pci_make_tag(pc, bus, dev, function);
-
- id = pci_conf_read(pc, tag, PCI_ID_REG);
- if (PCI_VENDOR(id) == PCI_VENDOR_INVALID ||
- PCI_VENDOR(id) == 0)
- continue;
-
- ppb_function_explore(pc, tag, ioex, memex);
- }
-}
-
-/*
- * Figure out what resources a device function would need and
- * disable them.
- */
-void
-ppb_function_explore(pci_chipset_tag_t pc, pcitag_t tag, struct extent *ioex,
- struct extent *memex)
-{
- bus_addr_t base;
- bus_size_t size;
- int reg, reg_start, reg_end, reg_rom;
- pcireg_t csr, bhlcr, type, mask;
-
- csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
- pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr &
- ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE));
-
- bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
- switch (PCI_HDRTYPE_TYPE(bhlcr)) {
- case 0:
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_END;
- reg_rom = PCI_ROM_REG;
- break;
- case 1: /* PCI-PCI bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PPB_END;
- reg_rom = 0; /* 0x38 */
- break;
- case 2: /* PCI-Cardbus bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PCB_END;
- reg_rom = 0;
- break;
- default:
- return;
- }
-
- for (reg = reg_start; reg < reg_end; reg += 4) {
- if (pci_mapreg_probe(pc, tag, reg, &type) == 0)
- continue;
-
- if (pci_mapreg_info(pc, tag, reg, type, &base, &size, NULL))
- continue;
-
- switch (type) {
- case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
- pci_conf_write(pc, tag, reg + 4, 0);
- /* FALLTHROUGH */
- case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
- if (memex != NULL)
- (void)extent_alloc(memex, size, size, 0, 0, 0,
- &base);
- break;
- case PCI_MAPREG_TYPE_IO:
- if (ioex != NULL)
- (void)extent_alloc(ioex, size, size, 0, 0, 0,
- &base);
- break;
- }
-
- pci_conf_write(pc, tag, reg, 0);
-
- if (type == (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT))
- reg += 4;
- }
-
- if (reg_rom != 0) {
- pci_conf_write(pc, tag, reg_rom, ~PCI_ROM_ENABLE);
- mask = pci_conf_read(pc, tag, reg_rom);
- size = PCI_ROM_SIZE(mask);
-
- if (size != 0) {
- if (memex != NULL)
- (void)extent_alloc(memex, size, size, 0, 0, 0,
- &base);
- }
-
- pci_conf_write(pc, tag, reg_rom, 0);
- }
-
- /*
- * Note that we do not try to be recursive and configure PCI-PCI
- * bridges behind PCI-PCI bridges.
- */
-}
-
-/*
- * Configure a PCI-CardBus bridge.
- */
-void
-pccbb_initialize(pci_chipset_tag_t pc, pcitag_t tag, uint primary,
- uint secondary, uint subordinate)
-{
- pcireg_t csr;
-
- csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
- csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
- pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
-
- pci_conf_write(pc, tag, PCI_BUSNUM,
- primary | (secondary << 8) | (subordinate << 16));
-
-#if 0 /* done by pccbb(4) */
- csr |= PCI_COMMAND_IO_ENABLE;
- csr |= PCI_COMMAND_MEM_ENABLE;
-
- pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr |
- PCI_COMMAND_MASTER_ENABLE);
-#endif
-}
+++ /dev/null
-/* $OpenBSD: pci_machdep.h,v 1.17 2016/05/04 14:30:01 kettenis Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-typedef struct mips_pci_chipset *pci_chipset_tag_t;
-typedef u_long pcitag_t;
-typedef u_long pci_intr_handle_t;
-
-struct pci_attach_args;
-struct sgi_device_location;
-
-/*
- * mips-specific PCI structure and type definitions.
- * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
- */
-struct mips_pci_chipset {
- void *pc_conf_v;
- void (*pc_attach_hook)(struct device *,
- struct device *, struct pcibus_attach_args *);
- int (*pc_bus_maxdevs)(void *, int);
- pcitag_t (*pc_make_tag)(void *, int, int, int);
- void (*pc_decompose_tag)(void *, pcitag_t, int *,
- int *, int *);
- int (*pc_conf_size)(void *, pcitag_t);
- pcireg_t (*pc_conf_read)(void *, pcitag_t, int);
- void (*pc_conf_write)(void *, pcitag_t, int, pcireg_t);
- int (*pc_probe_device_hook)(void *, struct pci_attach_args *);
-
- int (*pc_get_widget)(void *);
- int (*pc_get_dl)(void *, pcitag_t, struct sgi_device_location *);
-
- void *pc_intr_v;
- int (*pc_intr_map)(struct pci_attach_args *, pci_intr_handle_t *);
- const char *(*pc_intr_string)(void *, pci_intr_handle_t);
- void *(*pc_intr_establish)(void *, pci_intr_handle_t,
- int, int (*)(void *), void *, const char *);
- void (*pc_intr_disestablish)(void *, void *);
- int (*pc_intr_line)(void *, pci_intr_handle_t);
-
- int (*pc_ppb_setup)(void *, pcitag_t, bus_addr_t *, bus_addr_t *,
- bus_addr_t *, bus_addr_t *);
-
- void *(*pc_rbus_parent_io)(struct pci_attach_args *);
- void *(*pc_rbus_parent_mem)(struct pci_attach_args *);
-};
-
-/*
- * Functions provided to machine-independent PCI code.
- */
-#define pci_attach_hook(p, s, pba) \
- (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
-#define pci_bus_maxdevs(c, b) \
- (*(c)->pc_bus_maxdevs)((c)->pc_conf_v, (b))
-#define pci_make_tag(c, b, d, f) \
- (*(c)->pc_make_tag)((c)->pc_conf_v, (b), (d), (f))
-#define pci_decompose_tag(c, t, bp, dp, fp) \
- (*(c)->pc_decompose_tag)((c)->pc_conf_v, (t), (bp), (dp), (fp))
-#define pci_conf_size(c, t) \
- (*(c)->pc_conf_size)((c)->pc_conf_v, (t))
-#define pci_conf_read(c, t, r) \
- (*(c)->pc_conf_read)((c)->pc_conf_v, (t), (r))
-#define pci_conf_write(c, t, r, v) \
- (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v))
-#define pci_intr_map(c, ihp) \
- (*(c)->pa_pc->pc_intr_map)((c), (ihp))
-#define pci_intr_map_msi(c, ihp) (-1)
-#define pci_intr_map_msix(c, vec, ihp) (-1)
-#define pci_intr_string(c, ih) \
- (*(c)->pc_intr_string)((c)->pc_intr_v, (ih))
-#define pci_intr_establish(c, ih, l, h, a, nm) \
- (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), (h), (a), (nm))
-#define pci_intr_disestablish(c, iv) \
- (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv))
-#define pci_intr_line(c, ih) \
- (*(c)->pc_intr_line)((c)->pc_intr_v, (ih))
-#define pci_probe_device_hook(c, a) \
- (*(c)->pc_probe_device_hook)((c)->pc_conf_v, (a))
-#define pci_dev_postattach(a, b) do { } while (0)
-
-#define pci_min_powerstate(c, t) (PCI_PMCSR_STATE_D3)
-#define pci_set_powerstate_md(c, t, s, p)
-
-/*
- * Functions provided to machine-dependent PCI code.
- */
-#define pci_get_widget(c) \
- (*(c)->pc_get_widget)((c)->pc_conf_v)
-#define pci_get_device_location(c,t,l) \
- (*(c)->pc_get_dl)((c)->pc_conf_v, (t), (l))
-
-/*
- * Functions provided to machine-independent rbus code.
- */
-#define rbus_pccbb_parent_io(dev, pa) \
- (rbus_tag_t)((*(pa)->pa_pc->pc_rbus_parent_io)(pa))
-#define rbus_pccbb_parent_mem(dev, pa) \
- (rbus_tag_t)((*(pa)->pa_pc->pc_rbus_parent_mem)(pa))
-
-void pccbb_initialize(pci_chipset_tag_t, pcitag_t, uint, uint, uint);
-void ppb_initialize(pci_chipset_tag_t, pcitag_t, uint, uint, uint);
+++ /dev/null
-/* $OpenBSD: autoconf.c,v 1.43 2018/01/27 22:55:23 naddy Exp $ */
-/*
- * Copyright (c) 2009, 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-/*
- * Copyright (c) 1996 Per Fogelstrom
- * Copyright (c) 1995 Theo de Raadt
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Setup the system to run on the current machine.
- *
- * cpu_configure() is called at boot time. Available
- * devices are determined (from possibilities mentioned in ioconf.c),
- * and the drivers are initialized.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/buf.h>
-#include <sys/conf.h>
-#include <sys/reboot.h>
-#include <sys/device.h>
-
-#include <machine/autoconf.h>
-#include <machine/memconf.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-
-#include <uvm/uvm_extern.h>
-
-#ifdef TGT_ORIGIN
-#include <machine/mnode.h>
-#endif
-#ifdef TGT_OCTANE
-#include <sgi/sgi/ip30.h>
-#endif
-#include <sgi/xbow/xbow.h>
-#include <dev/pci/pcivar.h>
-#include <scsi/scsi_all.h>
-#include <scsi/scsiconf.h>
-
-extern void dumpconf(void);
-
-static u_long strtoul(const char *, int, const char **);
-
-/*
- * The following several variables are related to
- * the configuration process, and are used in initializing
- * the machine.
- */
-int cold = 1; /* if 1, still working on cold-start */
-struct device *bootdv = NULL;
-int16_t currentnasid = 0;
-
-char osloadpartition[256];
-char osloadoptions[129];
-
-/*
- * Configure all devices found that we know about.
- * This is done at boot time.
- */
-void
-cpu_configure(void)
-{
- (void)splhigh(); /* Set mask to what we intend. */
-
- softintr_init();
-
- if (config_rootfound("mainbus", "mainbus") == 0) {
- panic("no mainbus found");
- }
-
- unmap_startup();
-
- splinit(); /* Initialized, fire up interrupt system */
- cold = 0;
-}
-
-void
-diskconf(void)
-{
- if (bootdv == NULL)
- printf("boot device: '%s' unrecognized.\n", osloadpartition);
- else
- printf("boot device: %s\n", bootdv->dv_xname);
-
- setroot(bootdv, 0, RB_USERREQ);
- dumpconf();
-}
-
-/*
- * Register a memory region.
- */
-int
-memrange_register(uint64_t startpfn, uint64_t endpfn, uint64_t bmask)
-{
- struct phys_mem_desc *cur, *m = NULL;
- int i;
-
-#ifdef DEBUG
-{
- extern int console_ok;
-
- if (console_ok)
- printf("%s: memory from 0x%lx to 0x%lx\n",
- __func__, ptoa(startpfn), ptoa(endpfn));
- else
- bios_printf("%s: memory from 0x%lx to 0x%lx\n",
- __func__, ptoa(startpfn), ptoa(endpfn));
-}
-#endif
- physmem += endpfn - startpfn;
-
-#ifdef TGT_OCTANE
- /*
- * On Octane, the second 16KB page is reserved for the NMI handler.
- */
- if (sys_config.system_type == SGI_OCTANE &&
- startpfn < atop(IP30_MEMORY_BASE) + 2) {
- startpfn = atop(IP30_MEMORY_BASE) + 2;
- if (startpfn >= endpfn)
- return 0;
- }
-#endif
-
- /*
- * Prevent use of memory beyond what pmap can support.
- * PG_FRAME is the highest supported page number.
- */
- if (startpfn > atop(pfn_to_pad(PG_FRAME)))
- return 0;
- if (endpfn > atop(pfn_to_pad(PG_FRAME)))
- endpfn = 1 + atop(pfn_to_pad(PG_FRAME));
-
- for (i = 0, cur = mem_layout; i < MAXMEMSEGS; i++, cur++) {
- if (cur->mem_last_page == 0) {
- if (m == NULL)
- m = cur; /* first free segment */
- continue;
- }
- /* merge contiguous areas */
- if (cur->mem_first_page == endpfn &&
- ((cur->mem_last_page ^ startpfn) & bmask) == 0) {
- cur->mem_first_page = startpfn;
- return 0;
- }
- if (cur->mem_last_page == startpfn &&
- ((cur->mem_first_page ^ endpfn) & bmask) == 0) {
- cur->mem_last_page = endpfn;
- return 0;
- }
- }
-
- if (m == NULL)
- return ENOMEM;
-
- m->mem_first_page = startpfn;
- m->mem_last_page = endpfn;
- return 0;
-}
-
-void (*_device_register)(struct device *, void *);
-
-void
-device_register(struct device *dev, void *aux)
-{
- if (_device_register)
- (*_device_register)(dev, aux);
-}
-
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2) || \
- defined(TGT_O2) || defined(TGT_OCTANE)
-
-/*
- * ARCS boot path traversal
- */
-
-const char *bootpath_get(int *);
-void bootpath_init(void);
-void bootpath_next(void);
-
-static char bootpath_store[sizeof osloadpartition];
-static char *bootpath_curpos;
-static char *bootpath_lastpos;
-static int bootpath_lastunit;
-
-/*
- * Initialize bootpath analysis.
- */
-void
-bootpath_init()
-{
- strlcpy(bootpath_store, osloadpartition, sizeof bootpath_store);
- bootpath_curpos = bootpath_store;
-}
-
-/*
- * Extract a component of the boot path, and return its name and unit
- * value.
- */
-const char *
-bootpath_get(int *u)
-{
- char *c;
- int unit;
-
- /*
- * If we don't have a value in cache, compute it.
- */
- if (bootpath_lastpos == NULL) {
- if (bootpath_curpos == NULL)
- bootpath_init();
-
- unit = 0;
- c = strchr(bootpath_curpos, '(');
- if (c != NULL) {
- for (*c++ = '\0'; *c >= '0' && *c <= '9'; c++)
- unit = 10 * unit + (*c - '0');
- while (*c != ')' && *c != '\0')
- c++;
- if (*c == ')')
- c++;
- } else {
- c = bootpath_curpos + strlen(bootpath_curpos);
- }
-
- bootpath_lastpos = bootpath_curpos;
- bootpath_lastunit = unit;
- bootpath_curpos = c;
-#ifdef DEBUG
- printf("%s: new component %s unit %d remainder %s\n", __func__,
- bootpath_lastpos, bootpath_lastunit, bootpath_curpos);
-#endif
- }
-
- *u = bootpath_lastunit;
- return bootpath_lastpos;
-}
-
-/*
- * Consume the current component of the bootpath, and switch to the next.
- */
-void
-bootpath_next()
-{
- /* force bootpath_get to go forward */
- bootpath_lastpos = NULL;
-#ifdef DEBUG
- printf("%s\n", __func__);
-#endif
-}
-
-void
-arcs_device_register(struct device *dev, void *aux)
-{
- static struct device *lastparent = NULL;
-#if defined(TGT_O2) || defined(TGT_OCTANE)
- static struct device *pciparent = NULL;
-#endif
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2)
- static struct device *wdscparent = NULL;
-#endif
- static int component_pos = 0;
-
- struct device *parent = dev->dv_parent;
- struct cfdata *cf = dev->dv_cfdata;
- struct cfdriver *cd = cf->cf_driver;
-
- const char *component;
- int unit;
-
- if (parent == NULL)
- return; /* one of the @root devices */
-
- if (bootdv != NULL)
- return;
-
- component = bootpath_get(&unit);
- if (*component == '\0')
- return; /* exhausted path */
-
- /*
- * The matching rules are as follows:
- * xio() matches xbow.
- * pci() matches any pci controller (macepcibr, xbridge), with the
- * unit number being ignored on O2 and the widget number of the
- * controller elsewhere.
- * scsi() matches any pci scsi controller, with the unit number
- * being the pci device number (minus one on the O2, grr).
- * disk() and cdrom() match sd and cd, respectively, with the
- * unit number being the target number.
- *
- * When a disk is found, we stop the parsing; rdisk() and
- * partition() components are ignored.
- */
-
-#ifdef TGT_OCTANE
- if (strcmp(component, "xio") == 0) {
- struct mainbus_attach_args *maa = aux;
-
- if (strcmp(cd->cd_name, "xbow") == 0 && unit == maa->maa_nasid)
- goto found_advance;
- }
-#endif
-
-#if defined(TGT_O2) || defined(TGT_OCTANE)
- if (strcmp(component, "pci") == 0) {
- /*
- * We'll work in two steps. The controller itself will be
- * recognized with its parent device and attachment
- * arguments (if necessary).
- *
- * Then we'll only advance the bootpath when matching the
- * pci device.
- */
- if (strcmp(cd->cd_name, "pci") == 0 &&
- parent == lastparent) {
- pciparent = dev;
- goto found_advance;
- }
-
-#ifdef TGT_O2
- if (strcmp(cd->cd_name, "macepcibr") == 0)
- goto found;
-#endif
-#ifdef TGT_OCTANE
- if (strcmp(cd->cd_name, "xbridge") == 0 &&
- parent == lastparent) {
- struct xbow_attach_args *xaa = aux;
-
- if (unit == xaa->xaa_widget)
- goto found;
- }
- if (strcmp(cd->cd_name, "xbpci") == 0 &&
- parent == lastparent) {
- goto found;
- }
-#endif
- }
-#endif /* TGT_O2 || TGT_OCTANE */
-
- if (strcmp(component, "scsi") == 0) {
- /*
- * We'll work in two steps. The controller itself will be
- * recognized with its parent device and pci_attach_args
- * need to match the scsi() unit number.
- *
- * Then we'll only advance the bootpath when matching the
- * scsibus device.
- */
-
- if (strcmp(cd->cd_name, "scsibus") == 0) {
- if (parent == lastparent)
- goto found_advance;
-
- if (component_pos == 0)
- switch (sys_config.system_type) {
-#ifdef TGT_O2
- /*
- * On O2, the pci(0) component may be omitted from
- * the bootpath, in which case we fake the missing
- * pci(0) component.
- */
- case SGI_O2:
- if (parent->dv_parent != NULL &&
- strcmp(parent->dv_parent->dv_cfdata->cf_driver->cd_name,
- "pci") == 0) {
- pciparent = parent->dv_parent;
- goto found_advance;
- }
- break;
-#endif
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2)
- /*
- * On Ind{igo,y,igo^2} systems, the bootpath
- * starts at scsi().
- */
- case SGI_IP20:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- if (strcmp(parent->dv_cfdata->cf_driver->cd_name,
- "wdsc") == 0 &&
- parent->dv_parent != NULL &&
- strcmp(parent->dv_parent->dv_cfdata->cf_driver->cd_name,
- "hpc") == 0) {
- wdscparent = parent;
- goto found_advance;
- }
- break;
-#endif
- default:
- break;
- }
- }
-
- if (parent == lastparent) {
-#if defined(TGT_O2) || defined(TGT_OCTANE)
- if (parent == pciparent) {
- struct pci_attach_args *paa = aux;
-
- if (unit == paa->pa_device -
- (sys_config.system_type == SGI_O2 ? 1 : 0))
- goto found;
- } else
-#endif
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2)
- if (parent == wdscparent) {
- /* XXX is there any better information to use
- XXX than the attachment number? */
- if (unit == parent->dv_unit)
- goto found;
- } else
-#endif
- {
- /*
- * in case scsi() can follow something else then
- * pci(), write code to handle this here...
- */
- }
- }
- }
-
- if ((strcmp(component, "disk") == 0 &&
- strcmp(cd->cd_name, "sd") == 0) ||
- (strcmp(component, "cdrom") == 0 &&
- strcmp(cd->cd_name, "cd") == 0)) {
- if (parent == lastparent) {
- struct scsi_attach_args *saa = aux;
-
- if (unit == saa->sa_sc_link->target) {
- /*
- * We found our boot device.
- * Now get the partition number.
- */
- bootdv = dev;
-#ifdef DEBUG
- printf("%s: boot device is %s\n",
- __func__, dev->dv_xname);
-#endif
- return;
- }
- }
- }
-
- if (strcmp(component, "bootp") == 0 && cd->cd_class == DV_IFNET) {
-#ifdef TGT_OCTANE
- if (strcmp(cd->cd_name, "iec") == 0)
- bootdv = dev;
-#endif
-#ifdef TGT_O2
- if (strcmp(cd->cd_name, "mec") == 0)
- bootdv = dev;
-#endif
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2)
- if (strcmp(cd->cd_name, "sq") == 0)
- bootdv = dev;
-#endif
-#ifdef DEBUG
- if (bootdv != NULL)
- printf("%s: boot device is %s\n",
- __func__, dev->dv_xname);
-#endif
- return;
- }
-
- return;
-
-found_advance:
- bootpath_next();
- component_pos++;
-found:
- lastparent = dev;
-}
-
-#endif /* IP20/22/24/26/28/30/32 */
-
-#ifdef TGT_ORIGIN
-
-/*
- * Origin (dksc) boot path analysis
- */
-
-void dksc_init(void);
-int dksc_scan_board(lboard_t *, void *);
-int dksc_scan_cmp(klinfo_t *, void *);
-
-static struct sgi_device_location dksc_device;
-static int dksc_ctrl, dksc_unit;
-static const char *dksc_devname;
-
-void
-dksc_init()
-{
- int val[3], idx;
- char *c = NULL;
-
- if (strncmp(osloadpartition, "dksc(", 5) == 0) {
- c = osloadpartition + 5;
- dksc_devname = "sd";
- } else if (strncmp(osloadpartition, "cdrom(", 6) == 0) {
- c = osloadpartition + 6;
- dksc_devname = "cd";
- }
-
- if (c == NULL)
- return;
-
- val[0] = val[1] = val[2] = 0;
- idx = 0;
-
- for (; *c != '\0'; c++) {
- if (*c == ')')
- break;
- else if (*c == ',') {
- if (++idx == 3)
- break;
- } else if (*c >= '0' && *c <= '9')
- val[idx] = 10 * val[idx] + (*c - '0');
- }
-
- dksc_ctrl = val[0];
- dksc_unit = val[1];
-
- /*
- * Walk kl configuration and try to match the boot controller
- * with a component.
- */
- kl_scan_all_nodes(KLBRD_ANY, dksc_scan_board, NULL);
-}
-
-int
-dksc_scan_board(lboard_t *brd, void *arg)
-{
- kl_scan_board(brd, KLSTRUCT_ANY, dksc_scan_cmp, arg);
- return 0;
-}
-
-int
-dksc_scan_cmp(klinfo_t *cmp, void *arg)
-{
- klscctl_t *scsi2comp;
- klscsi_t *scsicomp;
- int i;
-
- /* bail out quickly if no controller number */
- if (cmp->virtid < 0)
- return 0;
-
- switch (cmp->struct_type) {
- case KLSTRUCT_SCSI:
- case KLSTRUCT_FIBERCHANNEL:
- case KLSTRUCT_QLFIBRE:
- case KLSTRUCT_FIREWIRE:
-#if 0 /* should not get controller numbers anyway */
- case KLSTRUCT_IDE:
- case KLSTRUCT_IOC4_ATA:
-#endif
- if (cmp->virtid == dksc_ctrl) {
- kl_get_location(cmp, &dksc_device);
- return 1;
- }
- break;
- case KLSTRUCT_SCSI2:
- /*
- * Figure out whether one of the two ports matches our
- * controller number.
- */
- scsi2comp = (klscctl_t *)cmp;
- for (i = 0; i < scsi2comp->scsi_buscnt; i++) {
- scsicomp = (klscsi_t *)scsi2comp->scsi_bus[i];
- if (scsicomp == NULL)
- continue;
- if (scsicomp->scsi_info.virtid == dksc_ctrl) {
- kl_get_location(cmp, &dksc_device);
- dksc_device.specific = i; /* port # */
- return 1;
- }
- }
- break;
- }
-
- return 0;
-}
-
-void
-dksc_device_register(struct device *dev, void *aux)
-{
- static int dksc_state = 0;
- static struct device *controller = NULL;
- static struct device *scsibus = NULL;
-
- struct device *parent = dev->dv_parent;
- struct cfdata *cf = dev->dv_cfdata;
- struct cfdriver *cd = cf->cf_driver;
-
- struct sgi_device_location dl;
-
- if (dksc_state == 0) {
- dksc_state = 1;
- dksc_init();
- }
-
- if (parent == NULL)
- return; /* one of the @root devices */
-
- if (bootdv != NULL)
- return;
-
- /*
- * If we already know our bus, try to match the correct device.
- */
- if (scsibus != NULL) {
- if (strcmp(cd->cd_name, dksc_devname) == 0) {
- struct scsi_attach_args *saa = aux;
- if (dksc_unit == saa->sa_sc_link->target)
- bootdv = dev;
- }
- return;
- }
-
- /*
- * If we already know our controller driver, try to match the
- * correct scsibus.
- */
- if (controller != NULL) {
- if (parent == controller &&
- strcmp(cd->cd_name, "scsibus") == 0) {
- /* only match on the required bus */
- if (dksc_device.specific == 0)
- scsibus = dev;
- else
- dksc_device.specific--;
- }
- return;
- }
-
- /*
- * If we are investigating a PCI bus, check whether the current
- * device may be the controller we are looking for.
- */
-
- if (strcmp(parent->dv_cfdata->cf_driver->cd_name, "pci") == 0) {
- struct pci_attach_args *paa = aux;
- if (pci_get_device_location(paa->pa_pc, paa->pa_tag, &dl) &&
- location_match(&dksc_device, &dl))
- controller = dev;
- return;
- }
-}
-
-#endif /* IP27/35 */
-
-struct nam2blk nam2blk[] = {
- { "sd", 0 },
- { "vnd", 2 },
- { "cd", 3 },
- { "wd", 4 },
- { "rd", 8 },
- { NULL, -1 }
-};
-
-/*
- * Convert "xx:xx:xx:xx:xx:xx" string to Ethernet hardware address.
- */
-void
-enaddr_aton(const char *s, u_int8_t *a)
-{
- int i;
-
- if (s != NULL) {
- for (i = 0; i < 6; i++) {
- a[i] = strtoul(s, 16, &s);
- if (*s == ':')
- s++;
- }
- }
-}
-
-/*
- * Get a numeric environment variable
- */
-u_long
-bios_getenvint(const char *name)
-{
- const char *envvar;
- u_long value;
-
- envvar = Bios_GetEnvironmentVariable(name);
- if (envvar != NULL) {
- value = strtoul(envvar, 10, &envvar);
- if (*envvar != '\0')
- value = 0;
- } else
- value = 0;
-
- return value;
-}
-
-/*
- * Convert an ASCII string into an integer.
- */
-static u_long
-strtoul(const char *s, int b, const char **o)
-{
- int c;
- unsigned base = b, d;
- int neg = 0;
- u_long val = 0;
-
- if (s == NULL || *s == 0) {
- if (o != NULL)
- *o = s;
- return 0;
- }
-
- /* Skip spaces if any. */
- do {
- c = *s++;
- } while (c == ' ' || c == '\t');
-
- /* Parse sign, allow more than one (compat). */
- while (c == '-') {
- neg = !neg;
- c = *s++;
- }
-
- /* Parse base specification, if any. */
- if (base == 0 && c == '0') {
- c = *s++;
- switch (c) {
- case 'X':
- case 'x':
- base = 16;
- c = *s++;
- break;
- case 'B':
- case 'b':
- base = 2;
- c = *s++;
- break;
- default:
- base = 8;
- }
- }
-
- /* Parse number proper. */
- for (;;) {
- if (c >= '0' && c <= '9')
- d = c - '0';
- else if (c >= 'a' && c <= 'z')
- d = c - 'a' + 10;
- else if (c >= 'A' && c <= 'Z')
- d = c - 'A' + 10;
- else
- break;
- if (d >= base)
- break;
- val *= base;
- val += d;
- c = *s++;
- }
- if (neg)
- val = -val;
- if (o != NULL)
- *o = s - 1;
- return val;
-}
-
-/*
- * Relaxed comparison of two devices' physical location.
- */
-int
-location_match(struct sgi_device_location *l1, struct sgi_device_location *l2)
-{
- /* must be on the same widget */
- if (l1->nasid != l2->nasid || l1->widget != l2->widget)
- return 0;
-
- /* must be on the same PCI bus, if applicable */
- if (l1->bus == -1 || l2->bus == -1)
- return 1;
- if (l1->bus != l2->bus)
- return 0;
-
- /* must be the same PCI device, if applicable */
- if (l1->device == -1 || l2->device == -1)
- return 1;
- if (l1->device != l2->device)
- return 0;
-
- /* must be the same PCI function, if applicable */
- if (l1->fn == -1 || l2->fn == -1)
- return 1;
- if (l1->fn != l2->fn)
- return 0;
-
- return 1;
-}
+++ /dev/null
-/* $OpenBSD: bus_dma.c,v 1.43 2019/12/20 13:34:41 visa Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-/*-
- * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <mips64/cache.h>
-#include <machine/cpu.h>
-
-#include <machine/bus.h>
-
-#if defined(TGT_INDY) || defined(TGT_INDIGO2)
-#include <sgi/sgi/ip22.h>
-#endif
-
-/*
- * Common function for DMA map creation. May be called by bus-specific
- * DMA map creation functions.
- */
-int
-_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
- bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
-{
- struct machine_bus_dmamap *map;
- void *mapstore;
- size_t mapsize;
-
- /*
- * Allocate and initialize the DMA map. The end of the map
- * is a variable-sized array of segments, so we allocate enough
- * room for them in one shot.
- *
- * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
- * of ALLOCNOW notifies others that we've reserved these resources,
- * and they are not to be freed.
- *
- * The bus_dmamap_t includes one bus_dma_segment_t, hence
- * the (nsegments - 1).
- */
- mapsize = sizeof(struct machine_bus_dmamap) +
- (sizeof(bus_dma_segment_t) * (nsegments - 1));
- if ((mapstore = malloc(mapsize, M_DEVBUF, (flags & BUS_DMA_NOWAIT) ?
- (M_NOWAIT | M_ZERO) : (M_WAITOK | M_ZERO))) == NULL)
- return (ENOMEM);
-
- map = (struct machine_bus_dmamap *)mapstore;
- map->_dm_size = size;
- map->_dm_segcnt = nsegments;
- map->_dm_maxsegsz = maxsegsz;
- map->_dm_boundary = boundary;
- map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
-
- *dmamp = map;
- return (0);
-}
-
-/*
- * Common function for DMA map destruction. May be called by bus-specific
- * DMA map destruction functions.
- */
-void
-_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
-{
- size_t mapsize;
-
- mapsize = sizeof(struct machine_bus_dmamap) +
- (sizeof(bus_dma_segment_t) * (map->_dm_segcnt - 1));
- free(map, M_DEVBUF, mapsize);
-}
-
-/*
- * Common function for loading a DMA map with a linear buffer. May
- * be called by bus-specific DMA map load functions.
- */
-int
-_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf, bus_size_t buflen,
- struct proc *p, int flags)
-{
- paddr_t lastaddr;
- int seg, error;
-
- /*
- * Make sure that on error condition we return "no valid mappings".
- */
- map->dm_nsegs = 0;
- map->dm_mapsize = 0;
-
- if (buflen > map->_dm_size)
- return (EINVAL);
-
- seg = 0;
- error = (*t->_dmamap_load_buffer)(t, map, buf, buflen, p, flags,
- &lastaddr, &seg, 1);
- if (error == 0) {
- map->dm_nsegs = seg + 1;
- map->dm_mapsize = buflen;
- }
-
- return (error);
-}
-
-/*
- * Like _bus_dmamap_load(), but for mbufs.
- */
-int
-_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0, int flags)
-{
- paddr_t lastaddr;
- int seg, error, first;
- struct mbuf *m;
-
- /*
- * Make sure that on error condition we return "no valid mappings".
- */
- map->dm_nsegs = 0;
- map->dm_mapsize = 0;
-
-#ifdef DIAGNOSTIC
- if ((m0->m_flags & M_PKTHDR) == 0)
- panic("_dmamap_load_mbuf: no packet header");
-#endif
-
- if (m0->m_pkthdr.len > map->_dm_size)
- return (EINVAL);
-
- first = 1;
- seg = 0;
- error = 0;
- for (m = m0; m != NULL && error == 0; m = m->m_next) {
- if (m->m_len == 0)
- continue;
- error = (*t->_dmamap_load_buffer)(t, map, m->m_data, m->m_len,
- NULL, flags, &lastaddr, &seg, first);
- first = 0;
- }
- if (error == 0) {
- map->dm_nsegs = seg + 1;
- map->dm_mapsize = m0->m_pkthdr.len;
- }
-
- return (error);
-}
-
-/*
- * Like _dmamap_load(), but for uios.
- */
-int
-_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio, int flags)
-{
- paddr_t lastaddr;
- int seg, i, error, first;
- bus_size_t minlen, resid;
- struct proc *p = NULL;
- struct iovec *iov;
- void *addr;
-
- /*
- * Make sure that on error condition we return "no valid mappings".
- */
- map->dm_nsegs = 0;
- map->dm_mapsize = 0;
-
- resid = uio->uio_resid;
- iov = uio->uio_iov;
-
- if (uio->uio_segflg == UIO_USERSPACE) {
- p = uio->uio_procp;
-#ifdef DIAGNOSTIC
- if (p == NULL)
- panic("_dmamap_load_uio: USERSPACE but no proc");
-#endif
- }
-
- first = 1;
- seg = 0;
- error = 0;
- for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
- /*
- * Now at the first iovec to load. Load each iovec
- * until we have exhausted the residual count.
- */
- minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
- addr = (void *)iov[i].iov_base;
-
- error = (*t->_dmamap_load_buffer)(t, map, addr, minlen,
- p, flags, &lastaddr, &seg, first);
- first = 0;
-
- resid -= minlen;
- }
- if (error == 0) {
- map->dm_nsegs = seg + 1;
- map->dm_mapsize = uio->uio_resid;
- }
-
- return (error);
-}
-
-/*
- * Like _dmamap_load(), but for raw memory allocated with
- * bus_dmamem_alloc().
- */
-int
-_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, bus_dma_segment_t *segs,
- int nsegs, bus_size_t size, int flags)
-{
- if (nsegs > map->_dm_segcnt || size > map->_dm_size)
- return (EINVAL);
-
- /*
- * Make sure we don't cross any boundaries.
- */
- if (map->_dm_boundary) {
- bus_addr_t bmask = ~(map->_dm_boundary - 1);
- int i;
-
- if (t->_dma_mask != 0)
- bmask &= t->_dma_mask;
- for (i = 0; i < nsegs; i++) {
- if (segs[i].ds_len > map->_dm_maxsegsz)
- return (EINVAL);
- if ((segs[i].ds_addr & bmask) !=
- ((segs[i].ds_addr + segs[i].ds_len - 1) & bmask))
- return (EINVAL);
- }
- }
-
- bcopy(segs, map->dm_segs, nsegs * sizeof(*segs));
- map->dm_nsegs = nsegs;
- map->dm_mapsize = size;
- return (0);
-}
-
-/*
- * Common function for unloading a DMA map. May be called by
- * bus-specific DMA map unload functions.
- */
-void
-_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
-{
- /*
- * No resources to free; just mark the mappings as
- * invalid.
- */
- map->dm_nsegs = 0;
- map->dm_mapsize = 0;
-}
-
-/*
- * Common function for DMA map synchronization. May be called
- * by bus-specific DMA map synchronization functions.
- */
-void
-_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
- bus_size_t size, int op)
-{
- int nsegs;
- int curseg;
- int how;
- struct cpu_info *ci;
-
-#ifdef TGT_COHERENT
- /* we only need to writeback here */
- if ((op & BUS_DMASYNC_PREWRITE) == 0)
- return;
- else
- how = CACHE_SYNC_W;
-#else
- /*
- * If only PREWRITE is requested, writeback.
- * PREWRITE with PREREAD writebacks and invalidates (since noncoherent)
- * *all* cache levels.
- * Otherwise, just invalidate (since noncoherent).
- */
- if (op & BUS_DMASYNC_PREWRITE) {
- if (op & BUS_DMASYNC_PREREAD)
- how = CACHE_SYNC_X;
- else
- how = CACHE_SYNC_W;
- } else {
- if (op & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD))
- how = CACHE_SYNC_R;
- else
- return;
- }
-#endif
-
- ci = curcpu();
- nsegs = map->dm_nsegs;
- curseg = 0;
-
- while (size && nsegs) {
- paddr_t paddr;
- vaddr_t vaddr;
- bus_size_t ssize;
-
- ssize = map->dm_segs[curseg].ds_len;
- paddr = map->dm_segs[curseg]._ds_paddr;
- vaddr = map->dm_segs[curseg]._ds_vaddr;
-
- if (addr != 0) {
- if (addr >= ssize) {
- addr -= ssize;
- ssize = 0;
- } else {
- vaddr += addr;
- paddr += addr;
- ssize -= addr;
- addr = 0;
- }
- }
- if (ssize > size)
- ssize = size;
-
-#ifndef TGT_COHERENT
- if (IS_XKPHYS(vaddr) && XKPHYS_TO_CCA(vaddr) == CCA_NC) {
- size -= ssize;
- ssize = 0;
- }
-#endif
-
- if (ssize != 0) {
- Mips_IOSyncDCache(ci, vaddr, ssize, how);
-#if defined(TGT_INDY) || defined(TGT_INDIGO2)
- /*
- * Also flush external L2 if available - this could
- * (and used to) be done in Mips_IOSyncDCache, but
- * as the external L2 is physically addressed, this
- * would require the physical address to be
- * recomputed, although we know it here.
- */
- if (ip22_extsync != NULL)
- (*ip22_extsync)(ci, paddr, ssize, how);
-#endif
- size -= ssize;
- }
- curseg++;
- nsegs--;
- }
-
-#ifdef DIAGNOSTIC
- if (size != 0)
- panic("_dmamap_sync: ran off map!");
-#endif
-}
-
-/*
- * Common function for DMA-safe memory allocation. May be called
- * by bus-specific DMA memory allocation functions.
- */
-int
-_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
- bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
- int flags)
-{
- return _dmamem_alloc_range(t, size, alignment, boundary,
- segs, nsegs, rsegs, flags,
- dma_constraint.ucr_low, dma_constraint.ucr_high);
-}
-
-/*
- * Common function for freeing DMA-safe memory. May be called by
- * bus-specific DMA memory free functions.
- */
-void
-_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
-{
- vm_page_t m;
- paddr_t pa;
- struct pglist mlist;
- int curseg;
-
- /*
- * Build a list of pages to free back to the VM system.
- */
- TAILQ_INIT(&mlist);
- for (curseg = 0; curseg < nsegs; curseg++) {
- for (pa = segs[curseg]._ds_paddr;
- pa < (segs[curseg]._ds_paddr + segs[curseg].ds_len);
- pa += PAGE_SIZE) {
- m = PHYS_TO_VM_PAGE(pa);
- TAILQ_INSERT_TAIL(&mlist, m, pageq);
- }
- }
-
- uvm_pglistfree(&mlist);
-}
-
-/*
- * Common function for mapping DMA-safe memory. May be called by
- * bus-specific DMA memory map functions.
- */
-int
-_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size,
- caddr_t *kvap, int flags)
-{
- vaddr_t va, sva;
- size_t ssize;
- paddr_t pa;
- int curseg, error, pmap_flags;
- const struct kmem_dyn_mode *kd;
-
-#if defined(TGT_INDIGO2)
- /*
- * On ECC MC systems, which do not allow uncached writes to memory
- * during regular operation, fail requests for uncached (coherent)
- * memory.
- */
- if ((flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE)) && ip22_ecc)
- return EINVAL;
-#endif
-
-#ifdef TGT_COHERENT
- /* coherent mappings do not need to be uncached on these platforms */
- flags &= ~BUS_DMA_COHERENT;
-#endif
-
- if (nsegs == 1) {
- pa = segs[0]._ds_paddr;
- if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
- *kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_NC);
- else
- *kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_CACHED);
- return (0);
- }
-
- size = round_page(size);
- kd = flags & BUS_DMA_NOWAIT ? &kd_trylock : &kd_waitok;
- va = (vaddr_t)km_alloc(size, &kv_any, &kp_none, kd);
- if (va == 0)
- return (ENOMEM);
-
- *kvap = (caddr_t)va;
-
- sva = va;
- ssize = size;
- pmap_flags = PMAP_WIRED | PMAP_CANFAIL;
- if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
- pmap_flags |= PMAP_NOCACHE;
- for (curseg = 0; curseg < nsegs; curseg++) {
- for (pa = segs[curseg]._ds_paddr;
- pa < (segs[curseg]._ds_paddr + segs[curseg].ds_len);
- pa += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) {
-#ifdef DIAGNOSTIC
- if (size == 0)
- panic("_dmamem_map: size botch");
-#endif
- error = pmap_enter(pmap_kernel(), va, pa,
- PROT_READ | PROT_WRITE,
- PROT_READ | PROT_WRITE | pmap_flags);
- if (error) {
- pmap_update(pmap_kernel());
- km_free((void *)sva, ssize, &kv_any, &kp_none);
- return (error);
- }
-
- /*
- * This is redundant with what pmap_enter() did
- * above, but will take care of forcing other
- * mappings of the same page (if any) to be
- * uncached.
- * If there are no multiple mappings of that
- * page, this amounts to a noop.
- */
- if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
- pmap_page_cache(PHYS_TO_VM_PAGE(pa),
- PGF_UNCACHED);
- }
- pmap_update(pmap_kernel());
- }
-
- return (0);
-}
-
-/*
- * Common function for unmapping DMA-safe memory. May be called by
- * bus-specific DMA memory unmapping functions.
- */
-void
-_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
-{
- if (IS_XKPHYS((vaddr_t)kva))
- return;
-
- km_free(kva, round_page(size), &kv_any, &kp_none);
-}
-
-/*
- * Common function for mmap(2)'ing DMA-safe memory. May be called by
- * bus-specific DMA mmap(2)'ing functions.
- */
-paddr_t
-_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t off,
- int prot, int flags)
-{
- int i;
-
- for (i = 0; i < nsegs; i++) {
-#ifdef DIAGNOSTIC
- if (off & PAGE_MASK)
- panic("_dmamem_mmap: offset unaligned");
- if (segs[i].ds_addr & PAGE_MASK)
- panic("_dmamem_mmap: segment unaligned");
- if (segs[i].ds_len & PAGE_MASK)
- panic("_dmamem_mmap: segment size not multiple"
- " of page size");
-#endif
- if (off >= segs[i].ds_len) {
- off -= segs[i].ds_len;
- continue;
- }
-
- return segs[i]._ds_paddr + off;
- }
-
- /* Page not found. */
- return (-1);
-}
-
-/**********************************************************************
- * DMA utility functions
- **********************************************************************/
-
-/*
- * Utility function to load a linear buffer. lastaddrp holds state
- * between invocations (for multiple-buffer loads). segp contains
- * the starting segment on entrance, and the ending segment on exit.
- * first indicates if this is the first invocation of this function.
- */
-int
-_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
- bus_size_t buflen, struct proc *p, int flags, paddr_t *lastaddrp,
- int *segp, int first)
-{
- bus_size_t sgsize;
- bus_addr_t lastaddr, baddr, bmask;
- paddr_t curaddr;
- vaddr_t vaddr = (vaddr_t)buf;
- int seg;
- pmap_t pmap;
-
- if (p != NULL)
- pmap = p->p_vmspace->vm_map.pmap;
- else
- pmap = pmap_kernel();
-
- lastaddr = *lastaddrp;
- bmask = ~(map->_dm_boundary - 1);
- if (t->_dma_mask != 0)
- bmask &= t->_dma_mask;
-
- for (seg = *segp; buflen > 0; ) {
- /*
- * Get the physical address for this segment.
- */
- if (pmap_extract(pmap, vaddr, &curaddr) == 0)
- panic("_dmapmap_load_buffer: pmap_extract(%p, %p) failed!",
- pmap, (void *)vaddr);
-
-#ifdef DIAGNOSTIC
- if (curaddr > dma_constraint.ucr_high ||
- curaddr < dma_constraint.ucr_low)
- panic("Non DMA-reachable buffer at addr %p (raw)",
- (void *)curaddr);
-#endif
-
- /*
- * Compute the segment size, and adjust counts.
- */
- sgsize = NBPG - ((u_long)vaddr & PGOFSET);
- if (buflen < sgsize)
- sgsize = buflen;
-
- /*
- * Make sure we don't cross any boundaries.
- */
- if (map->_dm_boundary > 0) {
- baddr = ((bus_addr_t)curaddr + map->_dm_boundary) &
- bmask;
- if (sgsize > (baddr - (bus_addr_t)curaddr))
- sgsize = (baddr - (bus_addr_t)curaddr);
- }
-
- /*
- * Insert chunk into a segment, coalescing with
- * previous segment if possible.
- */
- if (first) {
- map->dm_segs[seg].ds_addr =
- (*t->_pa_to_device)(curaddr, map->_dm_flags);
- map->dm_segs[seg].ds_len = sgsize;
- map->dm_segs[seg]._ds_paddr = curaddr;
- map->dm_segs[seg]._ds_vaddr = vaddr;
- first = 0;
- } else {
- if ((bus_addr_t)curaddr == lastaddr + 1 &&
- (map->dm_segs[seg].ds_len + sgsize) <=
- map->_dm_maxsegsz &&
- (map->_dm_boundary == 0 ||
- (map->dm_segs[seg].ds_addr & bmask) ==
- ((bus_addr_t)curaddr & bmask)))
- map->dm_segs[seg].ds_len += sgsize;
- else {
- if (++seg >= map->_dm_segcnt)
- break;
- map->dm_segs[seg].ds_addr =
- (*t->_pa_to_device)(curaddr,
- map->_dm_flags);
- map->dm_segs[seg].ds_len = sgsize;
- map->dm_segs[seg]._ds_paddr = curaddr;
- map->dm_segs[seg]._ds_vaddr = vaddr;
- }
- }
-
- lastaddr = (bus_addr_t)curaddr + sgsize - 1;
- vaddr += sgsize;
- buflen -= sgsize;
- }
-
- *segp = seg;
- *lastaddrp = lastaddr;
-
- /*
- * Did we fit?
- */
- if (buflen != 0)
- return (EFBIG); /* XXX better return value here? */
-
- return (0);
-}
-
-/*
- * Allocate physical memory from the given physical address range.
- * Called by DMA-safe memory allocation methods.
- */
-int
-_dmamem_alloc_range(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
- bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
- int flags, paddr_t low, paddr_t high)
-{
- paddr_t curaddr, lastaddr;
- vm_page_t m;
- struct pglist mlist;
- int curseg, error, plaflag;
-
- /* Always round the size. */
- size = round_page(size);
-
- /*
- * Allocate pages from the VM system.
- */
- plaflag = flags & BUS_DMA_NOWAIT ? UVM_PLA_NOWAIT : UVM_PLA_WAITOK;
- if (flags & BUS_DMA_ZERO)
- plaflag |= UVM_PLA_ZERO;
-
- TAILQ_INIT(&mlist);
- error = uvm_pglistalloc(size, low, high, alignment, boundary,
- &mlist, nsegs, plaflag);
- if (error)
- return (error);
-
- /*
- * Compute the location, size, and number of segments actually
- * returned by the VM code.
- */
- m = TAILQ_FIRST(&mlist);
- curseg = 0;
- segs[curseg]._ds_paddr = VM_PAGE_TO_PHYS(m);
- lastaddr = segs[curseg].ds_addr =
- (*t->_pa_to_device)(segs[curseg]._ds_paddr, flags);
- segs[curseg].ds_len = PAGE_SIZE;
- m = TAILQ_NEXT(m, pageq);
-
- for (; m != NULL; m = TAILQ_NEXT(m, pageq)) {
- paddr_t pa = VM_PAGE_TO_PHYS(m);
-#ifdef DIAGNOSTIC
- if (pa < low || pa >= high) {
- printf("vm_page_alloc_memory returned non-sensical"
- " address 0x%lx\n", pa);
- panic("_dmamem_alloc_range");
- }
-#endif
- curaddr = (*t->_pa_to_device)(pa, flags);
- if (curaddr == (lastaddr + PAGE_SIZE))
- segs[curseg].ds_len += PAGE_SIZE;
- else {
- curseg++;
- segs[curseg]._ds_paddr = pa;
- segs[curseg].ds_addr = curaddr;
- segs[curseg].ds_len = PAGE_SIZE;
- }
- lastaddr = curaddr;
- }
-
- *rsegs = curseg + 1;
-
- return (0);
-}
+++ /dev/null
-/* $OpenBSD: conf.c,v 1.44 2021/01/23 05:08:36 thfr Exp $ */
-
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/buf.h>
-#include <sys/ioctl.h>
-#include <sys/proc.h>
-#include <sys/vnode.h>
-#include <sys/tty.h>
-
-#include <machine/conf.h>
-
-/*
- * Block devices.
- */
-
-#include "vnd.h"
-#include "sd.h"
-#include "cd.h"
-#include "st.h"
-#include "wd.h"
-bdev_decl(wd);
-#include "rd.h"
-#include "hotplug.h"
-
-struct bdevsw bdevsw[] =
-{
- bdev_disk_init(NSD,sd), /* 0: SCSI disk */
- bdev_swap_init(1,sw), /* 1: should be here swap pseudo-dev */
- bdev_disk_init(NVND,vnd), /* 2: vnode disk driver */
- bdev_disk_init(NCD,cd), /* 3: SCSI CD-ROM */
- bdev_disk_init(NWD,wd), /* 4: ST506/ESDI/IDE disk */
- bdev_notdef(), /* 5: */
- bdev_notdef(), /* 6: was: concatenated disk driver */
- bdev_notdef(), /* 7: */
- bdev_disk_init(NRD,rd), /* 8: RAM disk (for install) */
- bdev_notdef(), /* 9: */
- bdev_notdef(), /* 10: was: SCSI tape */
- bdev_notdef(), /* 11: */
- bdev_notdef(), /* 12: */
- bdev_notdef(), /* 13: */
- bdev_notdef(), /* 14: */
- bdev_notdef(), /* 15: */
-};
-
-int nblkdev = nitems(bdevsw);
-
-/*
- * Character devices.
- */
-
-#define mmread mmrw
-#define mmwrite mmrw
-dev_type_read(mmrw);
-cdev_decl(mm);
-#include "bio.h"
-#include "pty.h"
-cdev_decl(fd);
-#include "st.h"
-#include "bpfilter.h"
-#include "tun.h"
-#include "com.h"
-cdev_decl(com);
-#include "zs.h"
-cdev_decl(zs);
-#include "lpt.h"
-cdev_decl(lpt);
-#include "ch.h"
-#include "uk.h"
-cdev_decl(wd);
-#include "audio.h"
-#include "video.h"
-#include "ksyms.h"
-#include "kstat.h"
-
-#include "wsdisplay.h"
-#include "wskbd.h"
-#include "wsmouse.h"
-#include "wsmux.h"
-#include "pci.h"
-cdev_decl(pci);
-
-#include "dt.h"
-#include "pf.h"
-
-#include "usb.h"
-#include "uhid.h"
-#include "fido.h"
-#include "ujoy.h"
-#include "ugen.h"
-#include "ulpt.h"
-#include "ucom.h"
-
-#include "vscsi.h"
-#include "pppx.h"
-#include "fuse.h"
-#include "switch.h"
-
-struct cdevsw cdevsw[] =
-{
- cdev_cn_init(1,cn), /* 0: virtual console */
- cdev_notdef(), /* 1 was /dev/drum */
- cdev_ctty_init(1,ctty), /* 2: controlling terminal */
- cdev_mm_init(1,mm), /* 3: /dev/{null,mem,kmem,...} */
- cdev_tty_init(NPTY,pts), /* 4: pseudo-tty slave */
- cdev_ptc_init(NPTY,ptc), /* 5: pseudo-tty master */
- cdev_log_init(1,log), /* 6: /dev/klog */
- cdev_fd_init(1,filedesc), /* 7: file descriptor pseudo-dev */
- cdev_disk_init(NCD,cd), /* 8: SCSI CD */
- cdev_disk_init(NSD,sd), /* 9: SCSI disk */
- cdev_tape_init(NST,st), /* 10: SCSI tape */
- cdev_disk_init(NVND,vnd), /* 11: vnode disk */
- cdev_bpf_init(NBPFILTER,bpf), /* 12: berkeley packet filter */
- cdev_tun_init(NTUN,tun), /* 13: network tunnel */
- cdev_notdef(), /* 14 */
- cdev_notdef(), /* 15: */
- cdev_lpt_init(NLPT,lpt), /* 16: Parallel printer interface */
- cdev_tty_init(NCOM,com), /* 17: 16C450 serial interface */
- cdev_disk_init(NWD,wd), /* 18: ST506/ESDI/IDE disk */
- cdev_tty_init(NZS,zs), /* 19: Z8530 serial interface */
- cdev_notdef(), /* 20: */
- cdev_notdef(), /* 21: */
- cdev_disk_init(NRD,rd), /* 22: ramdisk device */
- cdev_notdef(), /* 23: was: concatenated disk driver */
- cdev_notdef(), /* 24: */
- cdev_wsdisplay_init(NWSDISPLAY, wsdisplay), /* 25: */
- cdev_mouse_init(NWSKBD, wskbd), /* 26: */
- cdev_mouse_init(NWSMOUSE, wsmouse), /* 27: */
- cdev_mouse_init(NWSMUX, wsmux), /* 28: */
-#ifdef USER_PCICONF
- cdev_pci_init(NPCI,pci), /* 29: PCI user */
-#else
- cdev_notdef(), /* 29 */
-#endif
- cdev_dt_init(NDT,dt), /* 30: dynamic tracer */
- cdev_pf_init(NPF,pf), /* 31: packet filter */
- cdev_uk_init(NUK,uk), /* 32: unknown SCSI */
- cdev_random_init(1,random), /* 33: random data source */
- cdev_notdef(), /* 34: */
- cdev_ksyms_init(NKSYMS,ksyms), /* 35: Kernel symbols device */
- cdev_ch_init(NCH,ch), /* 36: SCSI autochanger */
- cdev_notdef(), /* 37: */
- cdev_notdef(), /* 38: */
- cdev_notdef(), /* 39: */
- cdev_notdef(), /* 40: */
- cdev_notdef(), /* 41: */
- cdev_notdef(), /* 42: */
- cdev_notdef(), /* 33: */
- cdev_audio_init(NAUDIO,audio), /* 44: /dev/audio */
- cdev_video_init(NVIDEO,video), /* 45: generic video I/O */
- cdev_notdef(), /* 46: */
- cdev_notdef(), /* 47: was: /dev/crypto */
- cdev_notdef(), /* 48: */
- cdev_bio_init(NBIO,bio), /* 49: ioctl tunnel */
- cdev_notdef(), /* 50: */
- cdev_kstat_init(NKSTAT,kstat), /* 51: kernel statistics */
- cdev_ptm_init(NPTY,ptm), /* 52: pseudo-tty ptm device */
- cdev_notdef(), /* 53: */
- cdev_notdef(), /* 54: */
- cdev_notdef(), /* 55: */
- cdev_notdef(), /* 56: */
- cdev_notdef(), /* 57: */
- cdev_notdef(), /* 58: */
- cdev_notdef(), /* 59: */
- cdev_notdef(), /* 60: */
- cdev_usb_init(NUSB,usb), /* 61: USB controller */
- cdev_usbdev_init(NUHID,uhid), /* 62: USB generic HID */
- cdev_usbdev_init(NUGEN,ugen), /* 63: USB generic driver */
- cdev_ulpt_init(NULPT,ulpt), /* 64: USB printers */
- cdev_notdef(), /* 65: was urio */
- cdev_tty_init(NUCOM,ucom), /* 66: USB tty */
- cdev_hotplug_init(NHOTPLUG,hotplug), /* 67: devices hotplugging */
- cdev_vscsi_init(NVSCSI,vscsi), /* 68: vscsi */
- cdev_disk_init(1,diskmap), /* 69: disk mapper */
- cdev_pppx_init(NPPPX,pppx), /* 70: pppx */
- cdev_notdef(), /* 71: */
- cdev_notdef(), /* 72: was USB scanners */
- cdev_fuse_init(NFUSE,fuse), /* 73: fuse */
- cdev_tun_init(NTUN,tap), /* 74: Ethernet network tunnel */
- cdev_switch_init(NSWITCH,switch), /* 75: switch(4) control interface */
- cdev_fido_init(NFIDO,fido), /* 76: FIDO/U2F security key */
- cdev_pppx_init(NPPPX,pppac), /* 77: PPP Access Concentrator */
- cdev_ujoy_init(NUJOY,ujoy), /* 78: USB joystick/gamecontroller */
-};
-
-int nchrdev = nitems(cdevsw);
-
-/*
- * Swapdev is a fake device implemented
- * in sw.c used only internally to get to swstrategy.
- * It cannot be provided to the users, because the
- * swstrategy routine munches the b_dev and b_blkno entries
- * before calling the appropriate driver. This would horribly
- * confuse, e.g. the hashing routines. Instead, /dev/drum is
- * provided as a character (raw) device.
- */
-dev_t swapdev = makedev(1, 0);
-
-/*
- * Routine that identifies /dev/mem and /dev/kmem.
- *
- * A minimal stub routine can always return 0.
- */
-int
-iskmemdev(dev)
- dev_t dev;
-{
-
- if (major(dev) == 3 && (minor(dev) == 0 || minor(dev) == 1))
- return (1);
- return (0);
-}
-
-/*
- * Returns true if def is /dev/zero
- */
-int
-iszerodev(dev)
- dev_t dev;
-{
- return (major(dev) == 3 && minor(dev) == 12);
-}
-
-dev_t
-getnulldev()
-{
- return(makedev(3, 2));
-}
-
-
-int chrtoblktbl[] = {
- /* VCHR VBLK */
- /* 0 */ NODEV,
- /* 1 */ NODEV,
- /* 2 */ NODEV,
- /* 3 */ NODEV,
- /* 4 */ NODEV,
- /* 5 */ NODEV,
- /* 6 */ NODEV,
- /* 7 */ NODEV,
- /* 8 */ 3, /* cd */
- /* 9 */ 0, /* sd */
- /* 10 */ NODEV,
- /* 11 */ 2, /* vnd */
- /* 12 */ NODEV,
- /* 13 */ NODEV,
- /* 14 */ NODEV,
- /* 15 */ NODEV,
- /* 16 */ NODEV,
- /* 17 */ NODEV,
- /* 18 */ 4, /* wd */
- /* 19 */ NODEV,
- /* 20 */ NODEV,
- /* 21 */ NODEV,
- /* 22 */ 8 /* rd */
-};
-
-int nchrtoblktbl = nitems(chrtoblktbl);
-
-#include <dev/cons.h>
-
-cons_decl(com);
-cons_decl(ws);
-cons_decl(zs);
-
-struct consdev constab[] = {
-#if NWSDISPLAY > 0
- cons_init(ws),
-#endif
-#if NCOM > 0
- cons_init(com),
-#endif
-#if NZS > 0
- cons_init(zs),
-#endif
- { 0 },
-};
+++ /dev/null
-/* $OpenBSD: disksubr.c,v 1.33 2017/02/28 10:49:37 natano Exp $ */
-
-/*
- * Copyright (c) 1999 Michael Shalayeff
- * Copyright (c) 1997 Niklas Hallqvist
- * Copyright (c) 1996 Theo de Raadt
- * Copyright (c) 1982, 1986, 1988 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/buf.h>
-#include <sys/device.h>
-#include <sys/disklabel.h>
-#include <sys/syslog.h>
-#include <sys/disk.h>
-
-int readsgilabel(struct buf *, void (*)(struct buf *),
- struct disklabel *, daddr_t *, int);
-
-/*
- * Attempt to read a disk label from a device
- * using the indicated strategy routine.
- * The label must be partly set up before this:
- * secpercyl, secsize and anything required for a block i/o read
- * operation in the driver's strategy/start routines
- * must be filled in before calling us.
- */
-int
-readdisklabel(dev_t dev, void (*strat)(struct buf *),
- struct disklabel *lp, int spoofonly)
-{
- struct buf *bp = NULL;
- int error;
-
- if ((error = initdisklabel(lp)))
- goto done;
- lp->d_flags |= D_VENDOR;
-
- /* get a buffer and initialize it */
- bp = geteblk(lp->d_secsize);
- bp->b_dev = dev;
-
- error = readsgilabel(bp, strat, lp, NULL, spoofonly);
- if (error == 0)
- goto done;
-
- error = readdoslabel(bp, strat, lp, NULL, spoofonly);
- if (error == 0)
- goto done;
-
-#if defined(CD9660)
- error = iso_disklabelspoof(dev, strat, lp);
- if (error == 0)
- goto done;
-#endif
-#if defined(UDF)
- error = udf_disklabelspoof(dev, strat, lp);
- if (error == 0)
- goto done;
-#endif
-
-done:
- if (bp) {
- bp->b_flags |= B_INVAL;
- brelse(bp);
- }
- disk_change = 1;
- return (error);
-}
-
-static struct {
- int m;
- int b;
-} maptab[] = {
- { 0, FS_BSDFFS}, { 1, FS_SWAP}, { 10, FS_BSDFFS},
- { 3, FS_BSDFFS}, { 4, FS_BSDFFS}, { 5, FS_BSDFFS},
- { 6, FS_BSDFFS}, { 7, FS_BSDFFS}, { 15, FS_OTHER},
- { 9, FS_BSDFFS}, { 2, FS_UNUSED}, { 11, FS_BSDFFS},
- { 12, FS_BSDFFS}, { 13, FS_BSDFFS}, { 14, FS_BSDFFS},
- { 8, FS_BSDFFS}
-};
-
-int
-readsgilabel(struct buf *bp, void (*strat)(struct buf *),
- struct disklabel *lp, daddr_t *partoffp, int spoofonly)
-{
- struct sgilabel *dlp;
- int i, *p, cs = 0;
- daddr_t fsoffs, fsend;
- int error, offset;
-
- /* if successful, locate disk label within block and validate */
- error = readdisksector(bp, strat, lp, 0);
- if (error)
- return (error);
-
- fsoffs = DL_SECTOBLK(lp, DL_GETBSTART(lp));
- fsend = DL_SECTOBLK(lp, DL_GETBEND(lp));
-
- dlp = (struct sgilabel *)(bp->b_data + LABELOFFSET);
- if (dlp->magic != htobe32(SGILABEL_MAGIC))
- goto finished;
-
- if (dlp->partitions[0].blocks == 0)
- return (EINVAL);
- fsoffs = (long long)dlp->partitions[0].first;
- fsend = fsoffs + dlp->partitions[0].blocks;
-
- /* Only came here to find the offset... */
- if (partoffp) {
- *partoffp = fsoffs;
- goto finished;
- }
-
- p = (int *)dlp;
- i = sizeof(struct sgilabel) / sizeof(int);
- while (i--)
- cs += *p++;
- if (cs != 0)
- return (EINVAL); /* sgilabel checksum error */
-
- /* Spoof info from sgi label, in case there is no OpenBSD label. */
- lp->d_npartitions = MAXPARTITIONS;
-
- for (i = 0; i < 16; i++) {
- int bsd = maptab[i].m;
- int type = maptab[i].b;
-
- if (spoofonly && type != FS_UNUSED && type != FS_OTHER)
- continue;
-
- DL_SETPOFFSET(&lp->d_partitions[bsd],
- dlp->partitions[i].first);
- DL_SETPSIZE(&lp->d_partitions[bsd],
- dlp->partitions[i].blocks);
- lp->d_partitions[bsd].p_fstype = type;
- if (type == FS_BSDFFS) {
- lp->d_partitions[bsd].p_fragblock =
- DISKLABELV1_FFS_FRAGBLOCK(1024, 8);
- lp->d_partitions[bsd].p_cpg = 16;
- }
- }
-
- DL_SETBSTART(lp, DL_BLKTOSEC(lp, fsoffs));
- DL_SETBEND(lp, DL_BLKTOSEC(lp, fsend));
- lp->d_version = 1;
- lp->d_flags = D_VENDOR;
- lp->d_checksum = 0;
- lp->d_checksum = dkcksum(lp);
-
-finished:
- /* record the OpenBSD partition's placement for the caller */
- if (partoffp)
- *partoffp = fsoffs;
- else {
- DL_SETBSTART(lp, DL_BLKTOSEC(lp, fsoffs));
- DL_SETBEND(lp, DL_BLKTOSEC(lp, fsend));
- }
-
- /* don't read the on-disk label if we are in spoofed-only mode */
- if (spoofonly)
- return (0);
-
- error = readdisksector(bp, strat, lp, DL_BLKTOSEC(lp, fsoffs +
- LABELSECTOR));
- if (error)
- return (error);
- offset = DL_BLKOFFSET(lp, fsoffs + LABELSECTOR) + LABELOFFSET;
-
- error = checkdisklabel(bp->b_data + offset, lp, fsoffs, fsend);
- return (error);
-}
-
-/*
- * Write disk label back to device after modification.
- */
-int
-writedisklabel(dev_t dev, void (*strat)(struct buf *), struct disklabel *lp)
-{
- daddr_t partoff = -1;
- int error = EIO;
- int offset;
- struct buf *bp = NULL;
- struct disklabel *dlp;
-
- /* get a buffer and initialize it */
- bp = geteblk(lp->d_secsize);
- bp->b_dev = dev;
-
- if (readsgilabel(bp, strat, lp, &partoff, 1) != 0 &&
- readdoslabel(bp, strat, lp, &partoff, 1) != 0)
- goto done;
-
- /* Read it in, slap the new label in, and write it back out */
- error = readdisksector(bp, strat, lp, DL_BLKTOSEC(lp, partoff +
- DOS_LABELSECTOR));
- if (error)
- goto done;
- offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);
-
- dlp = (struct disklabel *)(bp->b_data + offset);
- *dlp = *lp;
- CLR(bp->b_flags, B_READ | B_WRITE | B_DONE);
- SET(bp->b_flags, B_BUSY | B_WRITE | B_RAW);
- (*strat)(bp);
- error = biowait(bp);
-
-done:
- if (bp) {
- bp->b_flags |= B_INVAL;
- brelse(bp);
- }
- disk_change = 1;
- return (error);
-}
+++ /dev/null
-/* $OpenBSD: eisa_machdep.c,v 1.4 2015/09/08 10:21:50 deraadt Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/errno.h>
-#include <sys/malloc.h>
-#include <sys/queue.h>
-
-#include <machine/bus.h>
-#include <sgi/localbus/intreg.h>
-#include <sgi/localbus/intvar.h>
-
-#include <dev/ic/i8259reg.h>
-#include <dev/isa/isareg.h>
-#include <dev/eisa/eisavar.h>
-
-#define IO_EXTNMI 0x0461
-#define IO_ELCR0 0x04d0
-#define IO_ELCR1 0x04d1
-
-#define IRQ_CASCADE 2
-
-int eisa_intr(void *);
-
-/*
- * Magic registers (from IRIX IP22.h). They appear in EISA I/O space.
- */
-
-#define EIU_MODE_REG 0x0001ffc0
-#define EIU_STAT_REG 0x0001ffc4
-#define EIU_PREMPT_REG 0x0001ffc8
-#define EIU_QUIET_REG 0x0001ffcc
-#define EIU_INTRPT_ACK 0x00010004
-
-#define eiu_read(o) \
- *(volatile uint32_t *)PHYS_TO_XKPHYS(EISA_IO_BASE | (o), CCA_NC)
-#define eiu_write(o,v) \
- *(volatile uint32_t *)PHYS_TO_XKPHYS(EISA_IO_BASE | (o), CCA_NC) = (v)
-
-#define eisa_io_read(o) \
- *(volatile uint8_t *)PHYS_TO_XKPHYS(EISA_IO_BASE | (o), CCA_NC)
-#define eisa_io_write(o,v) \
- *(volatile uint8_t *)PHYS_TO_XKPHYS(EISA_IO_BASE | (o), CCA_NC) = (v)
-
-#define EISA_INT2_IRQNO INT2_MAP1_INTR(INT2_MAP_EISA)
-
-/*
- * EISA interrupt handlers.
- */
-
-#define EISA_NINTS 16
-
-struct eisa_intrhand {
- SLIST_ENTRY(eisa_intrhand) ei_list;
- int (*ei_fn)(void *);
- void *ei_arg;
- int ei_type;
-
- int ei_intr;
- struct evcount ei_evcnt;
-};
-
-SLIST_HEAD(, eisa_intrhand) eisa_ih[EISA_NINTS];
-
-int
-eisa_intr_map(eisa_chipset_tag_t ec, u_int irq, eisa_intr_handle_t *ihp)
-{
- *ihp = -1;
-
- if (irq >= EISA_NINTS)
- return 1;
-
- if (irq == IRQ_CASCADE) /* cascade */
- irq = 9;
-
- *ihp = irq;
- return 0;
-}
-
-const char *
-eisa_intr_string(eisa_chipset_tag_t ec, eisa_intr_handle_t ih)
-{
- static char irqstr[32];
-
- snprintf(irqstr, sizeof irqstr, "eisa irq %d", ih);
- return irqstr;
-}
-
-void *
-eisa_intr_establish(eisa_chipset_tag_t ec, eisa_intr_handle_t ih, int type,
- int level, int (*func)(void *), void *arg, char *what)
-{
- struct eisa_intrhand *first = NULL, *eih;
-
- if (ih >= EISA_NINTS || ih == IRQ_CASCADE)
- return NULL;
-
- if (!SLIST_EMPTY(&eisa_ih[ih])) {
- first = SLIST_FIRST(&eisa_ih[ih]);
- /* can't share edge and level interrupts */
- if (first->ei_type != type)
- return NULL;
- }
-
- eih = malloc(sizeof(*eih), M_DEVBUF, M_NOWAIT);
- if (eih == NULL)
- return NULL;
-
- eih->ei_fn = func;
- eih->ei_arg = arg;
- eih->ei_type = type;
- eih->ei_intr = ih;
- evcount_attach(&eih->ei_evcnt, what, &eih->ei_intr);
-
- if (first == NULL) {
- /* Update ELCR */
- if (type == IST_LEVEL) {
- if (ih >= 8)
- eisa_io_write(IO_ELCR1,
- eisa_io_read(IO_ELCR1) | (1 << (ih & 7)));
- else
- eisa_io_write(IO_ELCR0,
- eisa_io_read(IO_ELCR0) | (1 << ih));
- }
- /* Update OCW */
- if (ih >= 8)
- eisa_io_write(IO_ICU2 + PIC_OCW1,
- eisa_io_read(IO_ICU2 + PIC_OCW1) & ~(1 << (ih & 7)));
- else
- eisa_io_write(IO_ICU1 + PIC_OCW1,
- eisa_io_read(IO_ICU1 + PIC_OCW1) & ~(1 << ih));
- }
-
- SLIST_INSERT_HEAD(&eisa_ih[ih], eih, ei_list);
-
- return eih;
-}
-
-void
-eisa_intr_disestablish(eisa_chipset_tag_t ec, void *cookie)
-{
- struct eisa_intrhand *eih = (struct eisa_intrhand *)cookie;
- unsigned int ih = (unsigned int)eih->ei_intr;
-
-#ifdef DIAGNOSTIC
- if (ih >= EISA_NINTS || ih == IRQ_CASCADE)
- return;
-#endif
-
- SLIST_REMOVE(&eisa_ih[ih], eih, eisa_intrhand, ei_list);
-
- if (SLIST_EMPTY(&eisa_ih[ih])) {
- /* Reset ELCR */
- if (ih >= 8)
- eisa_io_write(IO_ELCR1,
- eisa_io_read(IO_ELCR1) & ~(1 << (ih & 7)));
- else
- eisa_io_write(IO_ELCR0,
- eisa_io_read(IO_ELCR0) & ~(1 << ih));
- /* Update OCW */
- if (ih >= 8)
- eisa_io_write(IO_ICU2 + PIC_OCW1,
- eisa_io_read(IO_ICU2 + PIC_OCW1) | (1 << (ih & 7)));
- else
- eisa_io_write(IO_ICU1 + PIC_OCW1,
- eisa_io_read(IO_ICU1 + PIC_OCW1) | (1 << ih));
- }
-
- evcount_detach(&eih->ei_evcnt);
- free(eih, M_DEVBUF, sizeof *eih);
-}
-
-int
-eisa_intr(void *arg)
-{
- struct device *dv = (struct device *)arg;
- struct eisa_intrhand *eih;
- uint irq;
- int rc, handled;
-
- irq = eisa_io_read(EIU_INTRPT_ACK);
- if (irq >= EISA_NINTS) {
- /* anything better to do? */
- panic("%s: unexpected irq value %08x", dv->dv_xname, irq);
- return -1;
- }
-
- handled = 0;
- SLIST_FOREACH(eih, &eisa_ih[irq], ei_list) {
- rc = (*eih->ei_fn)(eih->ei_arg);
- if (rc != 0) {
- handled = 1;
- eih->ei_evcnt.ec_count++;
- if (rc > 0)
- break;
- }
- }
- if (handled == 0)
- printf("%s: spurious irq %d\n", dv->dv_xname, irq);
-
- if (irq >= 8)
- eisa_io_write(IO_ICU2 + PIC_OCW2, OCW2_EOI);
- eisa_io_write(IO_ICU1 + PIC_OCW2, OCW2_EOI);
-
- return handled;
-}
-
-void
-eisa_attach_hook(struct device *parent, struct device *self,
- struct eisabus_attach_args *eba)
-{
- unsigned int irq;
-
- /*
- * Unlock the bus. Magic sequence taken from Linux.
- */
-
- eiu_write(EIU_PREMPT_REG, 0x0000ffff);
- eiu_write(EIU_QUIET_REG, 1);
- eiu_write(EIU_MODE_REG, 0x40f3c07f);
-
- /*
- * Reset the bus.
- */
-
- eisa_io_write(IO_EXTNMI, 0x01);
- delay(10000);
- eisa_io_write(IO_EXTNMI, 0x00);
- /* some boards need enough time to reset, or they won't probe */
- delay(250000);
-
- /*
- * Setup i8259...
- */
-
- /* Program PIC1. */
- eisa_io_write(IO_ICU1 + PIC_ICW1, ICW1_SELECT | ICW1_IC4);
- eisa_io_write(IO_ICU1 + PIC_ICW2, ICW2_VECTOR(0));
- eisa_io_write(IO_ICU1 + PIC_ICW3, ICW3_CASCADE(IRQ_CASCADE));
- eisa_io_write(IO_ICU1 + PIC_ICW4, ICW4_8086);
- eisa_io_write(IO_ICU1 + PIC_OCW1, 0xff);
-
- /* Program PIC2. */
- eisa_io_write(IO_ICU2 + PIC_ICW1, ICW1_SELECT | ICW1_IC4);
- eisa_io_write(IO_ICU2 + PIC_ICW2, ICW2_VECTOR(8));
- eisa_io_write(IO_ICU2 + PIC_ICW3, ICW3_SIC(IRQ_CASCADE));
- eisa_io_write(IO_ICU2 + PIC_ICW4, ICW4_8086);
- eisa_io_write(IO_ICU2 + PIC_OCW1, 0xff);
-
- /* Interrupts are edge-triggered by default. */
- eisa_io_write(IO_ELCR0, 0x00);
- eisa_io_write(IO_ELCR1, 0x00);
-
- /* Unmask the cascade interrupt */
- eisa_io_write(IO_ICU1 + PIC_OCW1, 0xff ^ (1 << IRQ_CASCADE));
-
- /*
- * Setup interrupt handling.
- */
-
- for (irq = 0; irq < EISA_NINTS; irq++)
- SLIST_INIT(&eisa_ih[irq]);
-
- int2_intr_establish(EISA_INT2_IRQNO, IPL_TTY, eisa_intr, self,
- self->dv_xname);
- printf(" irq %d", EISA_INT2_IRQNO);
-}
-
-int
-eisa_maxslots(eisa_chipset_tag_t ec)
-{
- /*
- * Indigo2 systems can only have up to four slots (and only three
- * for Impact models), but slot numbering starts at 1 (#0 being
- * the host).
- */
- return 1 + 4;
-}
+++ /dev/null
-# $OpenBSD: genassym.cf,v 1.21 2010/01/03 14:17:27 miod Exp $
+++ /dev/null
-/* $OpenBSD: intr_template.c,v 1.19 2018/02/24 11:42:31 visa Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Common interrupt dispatcher bowels.
- *
- * This file is not a standalone file; to use it, define the following
- * macros and #include <sgi/sgi/intr_template.c>:
- *
- * INTR_FUNCTIONNAME interrupt handler function name
- * MASK_FUNCTIONNAME interrupt mask computation function name
- * INTR_GETMASKS logic to get `imr', `isr', and initialize `bit'
- * INTR_HANDLER(bit) logic to access intrhand array head for `bit'
- * INTR_IMASK(ipl) logic to access imask array for `ipl'
- * INTR_LOCAL_DECLS local declarations (may be empty)
- * MASK_LOCAL_DECLS local declarations (may be empty)
- * INTR_MASKPENDING logic to mask `isr'
- * INTR_MASKRESTORE logic to reset `imr'
- * INTR_MASKSIZE size of interrupt mask in bits
- * INTR_SPURIOUS(bit) print a spurious interrupt message for `bit'
- *
- * The following macros are optional:
- * INTR_HANDLER_SKIP(ih) nonzero to skip intrhand invocation
- * INTR_IPI_HOOK(ipl) special case logic for IPIs
- */
-
-/*
- * Recompute interrupt masks.
- */
-void
-MASK_FUNCTIONNAME()
-{
- int irq, level;
- struct intrhand *q;
- uint intrlevel[INTR_MASKSIZE];
-
- MASK_LOCAL_DECLS
-
- /* First, figure out which levels each IRQ uses. */
- for (irq = 0; irq < INTR_MASKSIZE; irq++) {
- uint levels = 0;
- for (q = INTR_HANDLER(irq); q != NULL; q = q->ih_next)
- levels |= 1 << q->ih_level;
- intrlevel[irq] = levels;
- }
-
- /*
- * Then figure out which IRQs use each level.
- * Note that we make sure never to overwrite imask[IPL_HIGH], in
- * case an interrupt occurs during intr_disestablish() and causes
- * an unfortunate splx() while we are here recomputing the masks.
- */
- for (level = IPL_NONE; level < NIPLS; level++) {
- uint64_t irqs = 0;
- for (irq = 0; irq < INTR_MASKSIZE; irq++)
- if (intrlevel[irq] & (1 << level))
- irqs |= 1UL << irq;
- INTR_IMASK(level) = irqs;
- }
-
- /*
- * There are tty, network and disk drivers that use free() at interrupt
- * time, so vm > (tty | net | bio).
- *
- * Enforce a hierarchy that gives slow devices a better chance at not
- * dropping data.
- */
- INTR_IMASK(IPL_NET) |= INTR_IMASK(IPL_BIO);
- INTR_IMASK(IPL_TTY) |= INTR_IMASK(IPL_NET);
- INTR_IMASK(IPL_VM) |= INTR_IMASK(IPL_TTY);
- INTR_IMASK(IPL_CLOCK) |= INTR_IMASK(IPL_VM);
- INTR_IMASK(IPL_HIGH) |= INTR_IMASK(IPL_CLOCK);
- INTR_IMASK(IPL_IPI) |= INTR_IMASK(IPL_HIGH);
-
- /*
- * These are pseudo-levels.
- */
- INTR_IMASK(IPL_NONE) = 0;
-}
-
-/*
- * Interrupt dispatcher.
- */
-uint32_t
-INTR_FUNCTIONNAME(uint32_t hwpend, struct trapframe *frame)
-{
- struct cpu_info *ci = curcpu();
- uint64_t imr, isr, mask;
- int ipl;
- int bit;
- struct intrhand *ih;
- int rc, ret;
- INTR_LOCAL_DECLS
-
- INTR_GETMASKS;
-
- isr &= imr;
- if (isr == 0)
- return 0; /* not for us */
-
-#ifdef INTR_IPI_HOOK
- INTR_IPI_HOOK(frame->ipl);
-#endif
-
- /*
- * Mask all pending interrupts.
- */
- INTR_MASKPENDING;
-
- /*
- * If interrupts are spl-masked, mask them and wait for splx()
- * to reenable them when necessary.
- */
- if ((mask = isr & INTR_IMASK(frame->ipl)) != 0) {
- isr &= ~mask;
- imr &= ~mask;
- }
-
- /*
- * Now process allowed interrupts.
- */
- if (isr != 0) {
- int lvl, bitno;
- uint64_t tmpisr;
-
- ipl = ci->ci_ipl;
-
- /* Service higher level interrupts first */
- for (lvl = NIPLS - 1; lvl != IPL_NONE; lvl--) {
- tmpisr = isr & (INTR_IMASK(lvl) ^ INTR_IMASK(lvl - 1));
- if (tmpisr == 0)
- continue;
- for (bitno = bit, mask = 1UL << bitno; mask != 0;
- bitno--, mask >>= 1) {
- if ((tmpisr & mask) == 0)
- continue;
-
- rc = 0;
- for (ih = INTR_HANDLER(bitno); ih != NULL;
- ih = ih->ih_next) {
-#ifdef MULTIPROCESSOR
- register_t sr;
- int need_lock;
-#endif
-#if defined(INTR_HANDLER_SKIP)
- if (INTR_HANDLER_SKIP(ih) != 0)
- continue;
-#endif
- splraise(ih->ih_level);
-#ifdef MULTIPROCESSOR
- if (ih->ih_level < IPL_IPI) {
- sr = getsr();
- ENABLEIPI();
- }
- if (ih->ih_flags & IH_MPSAFE)
- need_lock = 0;
- else
- need_lock =
- ih->ih_level < IPL_CLOCK;
- if (need_lock)
- __mp_lock(&kernel_lock);
-#endif
- ret = (*ih->ih_fun)(ih->ih_arg);
- if (ret != 0) {
- rc = 1;
- atomic_inc_long((unsigned long *)
- &ih->ih_count.ec_count);
- }
-#ifdef MULTIPROCESSOR
- if (need_lock)
- __mp_unlock(&kernel_lock);
- if (ih->ih_level < IPL_IPI)
- setsr(sr);
-#endif
- ci->ci_ipl = ipl;
- if (ret == 1)
- break;
- }
- if (rc == 0)
- INTR_SPURIOUS(bitno);
-
- isr ^= mask;
- if ((tmpisr ^= mask) == 0)
- break;
- }
- }
-
- /*
- * Reenable interrupts which have been serviced.
- */
- INTR_MASKRESTORE;
- }
-
- return hwpend;
-}
-
-#undef INTR_FUNCTIONNAME
-#undef MASK_FUNCTIONNAME
-#undef INTR_GETMASKS
-#undef INTR_HANDLER
-#undef INTR_HANDLER_SKIP
-#undef INTR_IMASK
-#undef INTR_LOCAL_DECLS
-#undef MASK_LOCAL_DECLS
-#undef INTR_MASKPENDING
-#undef INTR_MASKRESTORE
-#undef INTR_SPURIOUS
-#undef INTR_IPI_HOOK
+++ /dev/null
-/* $OpenBSD: ip22.h,v 1.11 2015/09/23 21:22:26 miod Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * IP20/IP22/IP24 definitions
- */
-
-/* IP22/IP24 system types */
-
-#define IP22_INDY 0 /* IP24 Indy */
-#define IP22_CHALLS 1 /* IP24 Challenge S */
-#define IP22_INDIGO2 2 /* IP22 Indigo 2, Challenge M */
-
-/* Interrupt handling priority */
-
-#ifdef CPU_R8000
-#define INTPRI_BUSERR_TCC (INTPRI_CLOCK + 1)
-#define INTPRI_BUSERR (INTPRI_BUSERR_TCC + 1)
-#else
-#define INTPRI_BUSERR (INTPRI_CLOCK + 1)
-#endif
-#define INTPRI_L1 (INTPRI_BUSERR + 1)
-#define INTPRI_L0 (INTPRI_L1 + 1)
-
-extern int hpc_old; /* nonzero if at least one HPC 1.x device found */
-extern int bios_year;
-extern int ip22_ecc; /* nonzero if running with an ECC memory system */
-
-void ip22_ConfigCache(struct cpu_info *);
-extern void (*ip22_extsync)(struct cpu_info *, paddr_t, size_t, int);
+++ /dev/null
-/* $OpenBSD: ip22_machdep.c,v 1.23 2020/08/26 03:29:06 visa Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Specific routines for IP20/22/24/26/28 systems. Yet another case of a
- * file which name no longer matches its original purpose.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/buf.h>
-#include <sys/mount.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/memconf.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-
-#include <sgi/sgi/ip22.h>
-#include <sgi/localbus/imcreg.h>
-#include <sgi/localbus/imcvar.h>
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/iocreg.h>
-
-#include "gio.h"
-#include "tcc.h"
-
-#if NGIO > 0
-#include <sgi/gio/gioreg.h>
-#include <sgi/gio/giovar.h>
-#include <sgi/gio/lightreg.h>
-#endif
-#if NTCC > 0
-#include <sgi/localbus/tccreg.h>
-#include <sgi/localbus/tccvar.h>
-#endif
-
-int hpc_old = 0;
-int bios_year;
-int ip22_ecc = 0;
-
-void (*ip22_extsync)(struct cpu_info *, paddr_t, size_t, int);
-
-void ip22_arcbios_walk(void);
-int ip22_arcbios_walk_component(arc_config_t *);
-void ip22_cache_halt(int);
-void ip22_cache_sync(struct cpu_info *, paddr_t, size_t, int);
-void ip22_ecc_halt(int);
-void ip22_ecc_init(int);
-void ip22_fast_mode(void);
-void ip22_memory_setup(void);
-void ip22_slow_mode(void);
-void ip22_video_setup(void);
-
-/*
- * Walk the ARCBios component tree to get hardware information we can't
- * obtain by other means.
- */
-
-#define IP22_HAS_L2 0x01
-#define IP22_HAS_AUDIO 0x02
-#define IP22_HAS_ENOUGH_FB 0x04
-static int ip22_arcwalk_results = 0;
-
-#if NGIO > 0
-static char ip22_fb_names[GIO_MAX_FB][64];
-#endif
-
-int
-ip22_arcbios_walk_component(arc_config_t *cf)
-{
- struct cpu_info *ci = curcpu();
- arc_config_t *child;
- arc_config64_t *cf64 = (arc_config64_t *)cf;
-#if NGIO > 0
- static int fbidx = 0;
-#endif
-
- /*
- * Split secondary caches are not supported.
- * No IP22 processor module uses them anyway.
- */
- if (cf->class == arc_CacheClass && cf->type == arc_SecondaryCache) {
- uint64_t key;
-
- if (bios_is_32bit)
- key = cf->key;
- else
- key = cf64->key >> 32;
-
- /*
- * Secondary cache information is encoded as WWLLSSSS, where
- * WW is the number of ways
- * (should be 01)
- * LL is Log2(line size)
- * (should be 04 or 05 for IP20/IP22/IP24, 07 for IP26)
- * SS is Log2(cache size in 4KB units)
- * (should be between 0007 and 0009)
- */
- ci->ci_l2.size = (1 << 12) << (key & 0x0000ffff);
- ci->ci_l2.linesize = 1 << ((key >> 16) & 0xff);
- ci->ci_l2.sets = (key >> 24) & 0xff;
- ci->ci_l2.setsize = ci->ci_l2.size / ci->ci_l2.sets;
-
- ip22_arcwalk_results |= IP22_HAS_L2;
- }
-
- if (cf->class == arc_ControllerClass &&
- cf->type == arc_AudioController) {
- ip22_arcwalk_results |= IP22_HAS_AUDIO;
- }
-
-#if NGIO > 0
- if (cf->class == arc_ControllerClass &&
- cf->type == arc_DisplayController) {
- if (fbidx >= GIO_MAX_FB) {
- /*
- * Not worth printing a message. If the system is
- * configured for glass console, it will get
- * overwritten anyway.
- */
- ip22_arcwalk_results |= IP22_HAS_ENOUGH_FB;
- } else {
- const char *id;
- size_t idlen;
-
- if (bios_is_32bit) {
- idlen = cf->id_len;
- id = (const char *)(vaddr_t)cf->id;
- } else {
- idlen = cf64->id_len;
- id = (const char *)cf64->id;
- }
- if (idlen != 0) {
- /* skip leading spaces */
- while (idlen > 0 && id[0] == ' ') {
- id++;
- idlen--;
- }
- /* skip SGI- prefix */
- if (idlen >= 4 && strncmp(id, "SGI-", 4) == 0) {
- id += 4;
- idlen -= 4;
- }
- if (idlen >= sizeof(ip22_fb_names[0]))
- idlen = sizeof(ip22_fb_names[0]) - 1;
- bcopy(id, ip22_fb_names[fbidx], idlen);
- }
- giofb_names[fbidx] = ip22_fb_names[fbidx];
- fbidx++;
- }
- }
-#endif
-
- if (ip22_arcwalk_results ==
- (IP22_HAS_L2 | IP22_HAS_AUDIO | IP22_HAS_ENOUGH_FB))
- return 0; /* abort walk */
-
- for (child = (arc_config_t *)Bios_GetChild(cf); child != NULL;
- child = (arc_config_t *)Bios_GetPeer(child)) {
- if (ip22_arcbios_walk_component(child) == 0)
- return 0;
- }
-
- return 1; /* continue walk */
-}
-
-void
-ip22_arcbios_walk()
-{
-#if NGIO == 0
- ip22_arcwalk_results |= IP22_HAS_ENOUGH_FB;
-#endif
- (void)ip22_arcbios_walk_component((arc_config_t *)Bios_GetChild(NULL));
-}
-
-/*
- * Parse memory controller settings.
- */
-
-#define IMC_NREGION 3
-
-void
-ip22_memory_setup()
-{
- uint i, bank, shift;
- uint32_t memc0, memc1;
- uint32_t memc;
- paddr_t base[IMC_NREGION], size[IMC_NREGION], limit;
- paddr_t start0, end0, start1, end1;
- struct phys_mem_desc *mem;
-
- /*
- * Figure out the top of memory, as reported by ARCBios.
- */
-
- limit = 0;
- for (i = 0, mem = mem_layout; i < MAXMEMSEGS; i++, mem++) {
- if (mem->mem_last_page > limit)
- limit = mem->mem_last_page;
- }
- limit = ptoa(limit);
-
- /*
- * Figure out where the memory controller has put memory.
- */
-
- memc0 = imc_read(IMC_MEMCFG0);
- memc1 = imc_read(IMC_MEMCFG1);
-
- /* Revision D onwards uses larger units, to allow for more memory */
- if ((imc_read(IMC_SYSID) & IMC_SYSID_REVMASK) >= 5)
- shift = IMC_MEMC_LSHIFT_HUGE;
- else
- shift = IMC_MEMC_LSHIFT;
-
- for (bank = 0; bank < IMC_NREGION; bank++) {
- memc = (bank & 2) ? memc1 : memc0;
- if ((bank & 1) == 0)
- memc >>= IMC_MEMC_BANK_SHIFT;
- memc &= IMC_MEMC_BANK_MASK;
-
- if ((memc & IMC_MEMC_VALID) == 0) {
- base[bank] = size[bank] = 0;
- continue;
- }
-
- base[bank] = (memc & IMC_MEMC_ADDR_MASK) >> IMC_MEMC_ADDR_SHIFT;
- base[bank] <<= shift;
-
- size[bank] = (memc & IMC_MEMC_SIZE_MASK) >> IMC_MEMC_SIZE_SHIFT;
- size[bank]++;
- size[bank] <<= shift;
- }
-
- /*
- * Perform sanity checks on the above data..
- */
-
- /* memory should not start below 128MB */
- for (bank = 0; bank < IMC_NREGION; bank++)
- if (size[bank] != 0 && base[bank] < (1ULL << 27))
- goto dopanic;
-
- /* banks should not overlap */
- for (bank = 1; bank < IMC_NREGION; bank++) {
- if (size[bank] == 0)
- continue;
- start0 = base[bank];
- end0 = base[bank] + size[bank];
- for (i = 0; i < bank; i++) {
- if (size[i] == 0)
- continue;
- start1 = base[i];
- end1 = base[i] + size[i];
- if (end0 > start1 && start0 < end1)
- goto dopanic;
- }
- }
-
- /*
- * Now register all the memory beyond what ARCBios stopped at.
- */
-
- for (bank = 0; bank < IMC_NREGION; bank++) {
- if (size[bank] == 0)
- continue;
-
- start0 = base[bank];
- end0 = base[bank] + size[bank];
- if (end0 <= limit)
- continue;
-
- if (start0 < limit)
- start0 = limit;
-
- memrange_register(atop(start0), atop(end0), 0);
- }
-
- return;
-
-dopanic:
- bios_printf("** UNEXPECTED MEMORY CONFIGURATION **\n");
- bios_printf("MEMC0 %08x MEMC1 %08x\n", memc0, memc1);
- bios_printf("Please contact <sgi@openbsd.org>\n"
- "Halting system.\n");
- Bios_Halt();
- for (;;)
- continue;
- /* NOTREACHED */
-}
-
-void
-ip22_video_setup()
-{
-#if NGIO > 0
- /*
- * According to Linux, the base address of the console device,
- * if there is a glass console, can be obtained by invoking the
- * 8th function pointer of the vendor-specific vector table.
- *
- * This function returns a pointer to a list of addresses (or
- * whatever struct it is), which second field is the address we
- * are looking for.
- *
- * However, the address does not point to the base address of the
- * slot the frame buffer, but to some registers in it. While this
- * might help identifying the actual frame buffer type, at the
- * moment we are only interested in the base address.
- */
-
- long (*get_gfxinfo)(void);
- vaddr_t fbaddr;
- paddr_t fbphys;
-
- if (bios_is_32bit) {
- int32_t *vec, *addr;
-
- vec = (int32_t *)(int64_t)(int32_t)ArcBiosBase32->vendor_vect;
- get_gfxinfo = (long (*)(void))(int64_t)vec[8];
- addr = (int32_t *)(int64_t)(*get_gfxinfo)();
- fbaddr = addr[1];
- } else {
- int64_t *vec, *addr;
-
- vec = (int64_t *)ArcBiosBase64->vendor_vect;
- get_gfxinfo = (long (*)(void))vec[8];
- addr = (int64_t *)(*get_gfxinfo)();
- fbaddr = addr[1];
- }
-
- if (fbaddr >= CKSEG1_BASE && fbaddr < CKSSEG_BASE)
- fbphys = CKSEG1_TO_PHYS(fbaddr);
- else if (IS_XKPHYS(fbaddr))
- fbphys = XKPHYS_TO_PHYS(fbaddr);
- else
- return;
-
- if (!IS_GIO_ADDRESS(fbphys))
- return;
-
- /*
- * Try to convert the address to a slot base or, for light(4)
- * frame buffers, a frame buffer base.
- *
- * Verified addresses:
- * grtwo slot + 0x00000000
- * impact slot + 0x00000000
- * light slot + 0x003f0000 (LIGHT_ADDR_0)
- * newport slot + 0x000f0000 (NEWPORT_REX3_OFFSET)
- */
-
- /* light(4) only exists on IP20 */
- if (sys_config.system_type == SGI_IP20) {
- paddr_t tmp = fbphys & ~((paddr_t)LIGHT_SIZE - 1);
- if (tmp == LIGHT_ADDR_0 || tmp == LIGHT_ADDR_1) {
- giofb_consaddr = tmp;
- return;
- }
- }
-
- if (fbphys < GIO_ADDR_EXP0)
- giofb_consaddr = GIO_ADDR_GFX;
- else if (fbphys < GIO_ADDR_EXP1)
- giofb_consaddr = GIO_ADDR_EXP0;
- else
- giofb_consaddr = GIO_ADDR_EXP1;
-#endif
-}
-
-void
-ip22_setup()
-{
- u_long cpuspeed;
- uint8_t ip22_sysid;
-
- /*
- * Get CPU information.
- */
- bootcpu_hwinfo.c0prid = cp0_get_prid();
- bootcpu_hwinfo.c1prid = cp1_get_prid();
- cpuspeed = bios_getenvint("cpufreq");
- if (sys_config.system_type == SGI_IP20)
- cpuspeed <<= 1;
- switch (sys_config.system_type) {
- default:
- if (cpuspeed < 100)
- cpuspeed = 100; /* reasonable default */
- break;
- case SGI_IP26:
- if (cpuspeed < 70)
- cpuspeed = 75; /* reasonable default */
- break;
- }
- bootcpu_hwinfo.clock = cpuspeed * 1000000;
- bootcpu_hwinfo.type = (bootcpu_hwinfo.c0prid >> 8) & 0xff;
-
- switch (sys_config.system_type) {
- case SGI_IP20:
- ip22_sysid = 0;
- break;
- default:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- ip22_sysid = (uint8_t)*(volatile uint32_t *)
- PHYS_TO_XKPHYS(HPC_BASE_ADDRESS_0 + IOC_BASE + IOC_SYSID,
- CCA_NC);
- break;
- }
-
- /*
- * Scan ARCBios component list for useful information (L2 cache
- * configuration, audio device availability)
- */
- ip22_arcbios_walk();
-
- /*
- * Figure out what critter we are running on.
- */
- switch (sys_config.system_type) {
- case SGI_IP20:
- if (ip22_arcwalk_results & IP22_HAS_AUDIO)
- hw_prod = "Indigo";
- else
- hw_prod = "VME Indigo";
- break;
- case SGI_IP22:
- if (ip22_sysid & 0x01) {
- sys_config.system_subtype = IP22_INDIGO2;
- hw_prod = "Indigo2";
- } else {
- if (ip22_arcwalk_results & IP22_HAS_AUDIO) {
- sys_config.system_subtype = IP22_INDY;
- hw_prod = "Indy";
- } else {
- sys_config.system_subtype = IP22_CHALLS;
- hw_prod = "Challenge S";
- }
- }
- break;
- case SGI_IP26:
- sys_config.system_subtype = IP22_INDIGO2;
- hw_prod = "POWER Indigo2 R8000";
- break;
- case SGI_IP28:
- sys_config.system_subtype = IP22_INDIGO2;
- hw_prod = "POWER Indigo2 R10000";
- break;
- }
-
- /*
- * Figure out whether we are running on an Indigo2 system with the
- * ECC board.
- */
-
- switch (sys_config.system_type) {
- default:
- break;
- case SGI_IP26:
- /*
- * According to IRIX <sys/IP22.h>, earlier IP26 systems
- * have an incomplete ECC board, and thus run in parity
- * mode.
- */
- if (((ip22_sysid & IOC_SYSID_BOARDREV) >>
- IOC_SYSID_BOARDREV_SHIFT) >=
- (0x18 >> IOC_SYSID_BOARDREV_SHIFT))
- ip22_ecc = 1;
- break;
- case SGI_IP28:
- /* All IP28 systems use the ECC board */
- ip22_ecc = 1;
- break;
- }
-
- if (ip22_ecc) {
- ip22_ecc_init(sys_config.system_type);
- md_halt = ip22_ecc_halt;
- }
-
- /*
- * Figure out how many TLB entries are available.
- */
- switch (bootcpu_hwinfo.type) {
- default:
-#if defined(CPU_R4000) || defined(CPU_R4600) || defined(CPU_R5000)
- case MIPS_R4000:
- case MIPS_R4600:
- case MIPS_R5000:
- bootcpu_hwinfo.tlbsize = 48;
- break;
-#endif
-#ifdef CPU_R8000
- case MIPS_R8000:
- bootcpu_hwinfo.tlbsize = 128 * 3;
- break;
-#endif
-#ifdef CPU_R10000
- case MIPS_R10000:
- bootcpu_hwinfo.tlbsize = 64;
- break;
-#endif
- }
-
- /*
- * Compute memory layout. ARCBios may not report all memory (on
- * Indigo, it seems to only report up to 128MB, and on Indigo2,
- * up to 256MB).
- */
- ip22_memory_setup();
-
- /*
- * Get glass console information, if necessary.
- */
- ip22_video_setup();
-
- /*
- * Register DMA-reachable memory constraints.
- * hpc(4) revision 1 and 1.5 only use 28-bit address pointers, thus
- * only 256MB are addressable; unfortunately, since physical memory
- * starts at 128MB, this enforces a 128MB limit.
- *
- * The following logic is pessimistic, as IP24 (Indy) systems have
- * a revision 3 hpc(4) onboard, but will accept older revisions in
- * expansion boards.
- */
- switch (sys_config.system_type) {
- default:
-#if defined(TGT_INDY) || defined(TGT_INDIGO2)
- dma_constraint.ucr_low = 0;
- dma_constraint.ucr_high = (1UL << 32) - 1;
- if (sys_config.system_subtype == IP22_INDIGO2)
- break;
- /* FALLTHROUGH */
-#endif
- case SGI_IP20:
- dma_constraint.ucr_low = 0;
- dma_constraint.ucr_high = (1UL << 28) - 1;
- break;
- }
-
- /*
- * Get ARCBios' current time.
- */
- bios_year = Bios_GetTime()->Year;
-
- _device_register = arcs_device_register;
-}
-
-void
-ip22_post_autoconf()
-{
- /*
- * Clear any pending bus error caused by the device probes.
- */
-#if NTCC > 0
- if (sys_config.system_type == SGI_IP26)
- tcc_bus_reset();
-#endif
- imc_bus_reset();
-
- /*
- * Relax DMA-reachable memory constraints if no 28-bit hpc(4)
- * device has attached.
- */
- if (hpc_old == 0) {
- uint64_t dmapages_before, dmapages;
-
- dmapages_before = uvm_pagecount(&dma_constraint);
- dma_constraint.ucr_high = (1UL << 32) - 1;
- dmapages = uvm_pagecount(&dma_constraint);
- if (dmapages_before != dmapages) {
- bufadjust(bufcachepercent * dmapages / 100);
- bufhighpages = bufpages;
- }
- }
-
- if (ip22_ecc) {
- ip22_fast_mode();
- }
-}
-
-/*
- * ECC board specific routines
- */
-
-#define ecc_write(o,v) \
- *(volatile uint64_t *)PHYS_TO_XKPHYS(ECC_BASE + (o), CCA_NC) = (v)
-
-static __inline__ uint32_t ip22_ecc_map(void);
-static __inline__ void ip22_ecc_unmap(uint32_t);
-
-static int ip22_ecc_mode; /* 0 if slow mode, 1 if fast mode */
-
-static __inline__ uint32_t
-ip22_ecc_map()
-{
- register uint32_t omemc1, nmemc1;
-
- omemc1 = imc_read(IMC_MEMCFG1);
- nmemc1 = omemc1 & ~IMC_MEMC_BANK_MASK;
- nmemc1 |= IMC_MEMC_VALID | (ECC_BASE >> IMC_MEMC_LSHIFT_HUGE);
- imc_write(IMC_MEMCFG1, nmemc1);
- (void)imc_read(IMC_MEMCFG1);
- mips_sync();
-
- return omemc1;
-}
-
-static __inline__ void
-ip22_ecc_unmap(uint32_t omemc1)
-{
- imc_write(IMC_MEMCFG1, omemc1);
- (void)imc_read(IMC_MEMCFG1);
- mips_sync();
-}
-
-void
-ip22_fast_mode()
-{
- register uint32_t memc1;
-
- if (ip22_ecc_mode == 0) {
- memc1 = ip22_ecc_map();
- ecc_write(ECC_CTRL, ECC_CTRL_ENABLE);
- mips_sync();
- (void)imc_read(IMC_MEMCFG1);
- imc_write(IMC_CPU_MEMACC, imc_read(IMC_CPU_MEMACC) & ~2);
- ip22_ecc_unmap(memc1);
- ip22_ecc_mode = 1;
-#if NTCC > 0
- /* if (sys_config.system_type == SGI_IP26) */
- tcc_prefetch_enable();
-#endif
- }
-}
-
-void
-ip22_slow_mode()
-{
- register uint32_t memc1;
-
- if (ip22_ecc_mode != 0) {
-#if NTCC > 0
- /* if (sys_config.system_type == SGI_IP26) */
- tcc_prefetch_disable();
-#endif
- memc1 = ip22_ecc_map();
- imc_write(IMC_CPU_MEMACC, imc_read(IMC_CPU_MEMACC) | 2);
- ecc_write(ECC_CTRL, ECC_CTRL_DISABLE);
- mips_sync();
- (void)imc_read(IMC_MEMCFG1);
- ip22_ecc_unmap(memc1);
- ip22_ecc_mode = 0;
- }
-}
-
-void
-ip22_ecc_init(int system_type)
-{
- uint32_t memc1;
-
- /* setup slow mode */
- memc1 = ip22_ecc_map();
- imc_write(IMC_CPU_MEMACC, imc_read(IMC_CPU_MEMACC) | 2);
- ecc_write(ECC_CTRL, ECC_CTRL_DISABLE);
- mips_sync();
- (void)imc_read(IMC_MEMCFG1);
- /* clear pending errors, if any */
- ecc_write(ECC_CTRL, ECC_CTRL_INT_CLR);
- mips_sync();
- (void)imc_read(IMC_MEMCFG1);
-
- if (system_type == SGI_IP28) {
- ecc_write(ECC_CTRL, ECC_CTRL_CHK_DISABLE); /* XXX for now */
- mips_sync();
- (void)imc_read(IMC_MEMCFG1);
- }
-
- ip22_ecc_unmap(memc1);
- ip22_ecc_mode = 0;
-}
-
-void
-ip22_ecc_halt(int howto)
-{
- ip22_slow_mode();
- arcbios_halt(howto);
-}
-
-#if (defined(TGT_INDY) || defined(TGT_INDIGO2)) && \
- (defined(CPU_R4600) || defined(CPU_R5000))
-
-/*
- * Cache routines for the secondary cache found on R4600SC and R5000SC
- * systems.
- */
-
-#include <mips64/cache.h>
-CACHE_PROTOS(ip22)
-
-#define IP22_L2_LINE 32UL
-#define IP22_CACHE_TAG_ADDRESS 0x80000000UL
-
-static inline void ip22_l2_disable(void)
-{
- /* halfword write: disable entire cache */
- *(volatile uint16_t *)(PHYS_TO_XKPHYS(IP22_CACHE_TAG_ADDRESS, CCA_NC)) =
- 0;
-}
-static inline void ip22_l2_enable(void)
-{
- /* byte write: enable entire cache */
- *(volatile uint8_t *)(PHYS_TO_XKPHYS(IP22_CACHE_TAG_ADDRESS, CCA_NC)) =
- 0;
-}
-
-void
-ip22_cache_halt(int howto)
-{
- ip22_l2_disable();
- arcbios_halt(howto);
-}
-
-void
-ip22_ConfigCache(struct cpu_info *ci)
-{
- struct cache_info l2;
-
- /*
- * Note that we are relying upon machdep.c only invoking us if we
- * are running on an R4600 or R5000 system.
- */
- if ((ip22_arcwalk_results & IP22_HAS_L2) == 0) {
- Mips5k_ConfigCache(ci);
- return;
- }
-
- l2 = ci->ci_l2;
-
- Mips5k_ConfigCache(ci);
-
- if (l2.linesize != IP22_L2_LINE || l2.sets != 1) {
- /*
- * This should not happen. Better not try and tame an
- * unknown beast.
- */
- return;
- }
-
- ci->ci_l2 = l2;
-
- ci->ci_SyncCache = ip22_SyncCache;
- ip22_extsync = ip22_cache_sync;
-
- md_halt = ip22_cache_halt;
- ip22_l2_enable();
-}
-
-void
-ip22_SyncCache(struct cpu_info *ci)
-{
- vaddr_t sva, eva;
-
- Mips5k_SyncCache(ci);
-
- sva = PHYS_TO_XKPHYS(IP22_CACHE_TAG_ADDRESS, CCA_NC);
- eva = sva + ci->ci_l2.size;
-
- while (sva < eva) {
- *(volatile uint32_t *)sva = 0;
- sva += IP22_L2_LINE;
- }
-}
-
-void
-ip22_cache_sync(struct cpu_info *ci, paddr_t _pa, size_t _sz, int how)
-{
- size_t sz;
- paddr_t pa, tagbase;
-
- switch (how) {
- default:
- case CACHE_SYNC_W:
- break;
- case CACHE_SYNC_X:
- case CACHE_SYNC_R:
- /* extend the range to integral cache lines */
- pa = _pa & ~(IP22_L2_LINE - 1);
- sz = ((_pa + _sz + IP22_L2_LINE - 1) & ~(IP22_L2_LINE - 1)) -
- pa;
-
- pa &= ci->ci_l2.size - 1;
- tagbase = PHYS_TO_XKPHYS(IP22_CACHE_TAG_ADDRESS, CCA_NC);
-
- while (sz != 0) {
- /* word write: invalidate line */
- *(volatile uint32_t *)(tagbase | pa) = 0;
-
- pa += IP22_L2_LINE;
- pa &= ci->ci_l2.size - 1;
- sz -= IP22_L2_LINE;
- }
- break;
- }
-}
-
-#endif
+++ /dev/null
-/* $OpenBSD: ip27.h,v 1.6 2015/12/25 09:02:57 visa Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Non-XBow related IP27 and IP35 definitions
- */
-
-/* NMI register save areas */
-
-#define IP27_NMI_KREGS_BASE 0x11400
-#define IP27_NMI_KREGS_SIZE 0x200 /* per CPU */
-#define IP27_NMI_EFRAME_BASE 0x11800
-
-#define IP35_NMI_KREGS_BASE 0x9000
-#define IP35_NMI_KREGS_SIZE 0x400 /* per CPU */
-#define IP35_NMI_EFRAME_BASE 0xa000
-
-/* IP27 system types */
-
-#define IP27_SN0 0x00
-#define IP27_SN00 0x01
-#define IP27_O200 IP27_SN00
-#define IP27_O2K IP27_SN0
-#define IP27_UNKNOWN 0x02
-
-/* IP35 Brick types */
-
-#define IP35_CBRICK 0x00
-#define IP35_O350 0x02
-#define IP35_FUEL 0x04
-#define IP35_O300 0x08
-
-/*
- * Specific device assignment
- */
-
-#define IP27_O200_BRIDGE_WIDGET 8
-#define IP27_O2K_BRIDGE_WIDGET 15
-
-#define IP27_IOC_SLOTNO 2
-#define IP27_IOC2_SLOTNO 6
-
-/* PROM entry points */
-
-#define IP27_PROM_LAUNCH_SLAVE 0x1fc00038
-
-#define ip27_prom_launch_slave (*(void (*)(int nasid, int cpu, \
- void (*func)(uint64_t), uint64_t param, uint64_t sp, \
- uint64_t gp))PHYS_TO_CKSEG1(IP27_PROM_LAUNCH_SLAVE))
-
-/*
- * IP27 configuration structure. Used to tell Origin 200 and Origin 2000
- * apart.
- */
-
-#define IP27_CONFIG_OFFSET 0x60 /* relative to LBOOTBASE */
-#define IP27_CONFIG_MAGIC 0x69703237636f6e66LL /* "ip27conf" */
-
-struct ip27_config {
- volatile uint32_t time_const;
- volatile uint32_t r10k_sysad;
- volatile uint64_t magic;
- volatile uint64_t cpu_hz;
- volatile uint64_t hub_hz;
- volatile uint64_t rtc_hz;
- volatile uint32_t ecc_enable;
- volatile uint32_t fprom_cyc;
- volatile uint32_t ip27_subtype;
- volatile uint32_t cksum;
- volatile uint32_t flash_count;
- volatile uint32_t fprom_wr;
- volatile uint32_t prom_ver;
- volatile uint32_t prom_rev;
- volatile uint32_t config_specific;
-};
-
-/*
- * CPU identification
- */
-
-#define IP27_SLICE_LCPU(x) ((x) & 1)
-#define IP27_SLICE_SUBNODE(x) (((x) & 2) >> 1)
+++ /dev/null
-/* $OpenBSD: ip27_machdep.c,v 1.82 2020/08/26 03:29:06 visa Exp $ */
-
-/*
- * Copyright (c) 2008, 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Origin 200 / Origin 2000 / Onyx 2 (IP27), as well as
- * Origin 300 / Onyx 300 / Origin 350 / Onyx 350 / Onyx 4 / Origin 3000 /
- * Fuel / Tezro (IP35) specific code.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/atomic.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/reboot.h>
-#include <sys/timetc.h>
-#include <sys/tty.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-#include <mips64/cache.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/memconf.h>
-#include <machine/mnode.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <sgi/sgi/ip27.h>
-#include <sgi/sgi/l1.h>
-#include <sgi/xbow/hub.h>
-#include <sgi/xbow/widget.h>
-#include <sgi/xbow/xbow.h>
-
-#include <sgi/pci/iofreg.h>
-#include <dev/ic/comvar.h>
-
-#include <dev/cons.h>
-
-extern void (*md_halt)(int);
-
-paddr_t ip27_widget_short(int16_t, u_int);
-paddr_t ip27_widget_long(int16_t, u_int);
-paddr_t ip27_widget_map(int16_t, u_int,bus_addr_t *, bus_size_t *);
-int ip27_widget_id(int16_t, u_int, uint32_t *);
-int ip27_widget_id_early(int16_t, u_int, uint32_t *);
-
-void ip27_halt(int);
-
-unsigned int xbow_long_shift = 29;
-
-static paddr_t io_base;
-static int ip35 = 0;
-uint maxnodes;
-gda_t *gda;
-
-int ip27_hub_intr_register(int, int, int *);
-int ip27_hub_intr_establish(int (*)(void *), void *, int, int,
- const char *, struct intrhand *);
-void ip27_hub_intr_disestablish(int);
-void ip27_hub_intr_clear(int);
-void ip27_hub_intr_set(int);
-uint32_t hubpi_intr0(uint32_t, struct trapframe *);
-uint32_t hubpi_intr1(uint32_t, struct trapframe *);
-void ip27_hub_intr_makemasks0(void);
-void ip27_hub_intr_makemasks1(void);
-void ip27_hub_setintrmask(int);
-void ip27_hub_splx(int);
-
-void ip27_attach_node(struct device *, int16_t);
-int ip27_print(void *, const char *);
-void ip27_nmi(void *);
-
-#ifdef MULTIPROCESSOR
-
-#define IP27_SLICE_IPI(slice) ((slice) + HUBPI_ISR0_IPI_A)
-
-unsigned int ip27_ncpus;
-
-int ip27_kl_launch_cpu(klinfo_t *, void *);
-int ip27_kl_launch_cpu_board(lboard_t *, void *);
-int ip27_kl_attach_cpu(klinfo_t *, void *);
-int ip27_kl_attach_cpu_board(lboard_t *, void *);
-
-uint ip27_hub_get_timecount(struct timecounter *);
-
-struct timecounter ip27_hub_timecounter = {
- .tc_get_timecount = ip27_hub_get_timecount,
- .tc_poll_pps = NULL,
- .tc_counter_mask = 0xffffffff, /* truncated to 32 bits. */
- .tc_frequency = 1250000,
- .tc_name = "hubrt",
- .tc_quality = 100,
- .tc_priv = 0,
- .tc_user = 0,
-};
-
-volatile uint64_t ip27_spinup_a0;
-volatile uint64_t ip27_spinup_sp;
-volatile uint32_t ip27_spinup_turn = ~0;
-
-#define SPINUP_TICKET(nasid, slice) (((nasid) << 8) | (slice))
-
-void ip27_cpu_spinup_trampoline(uint64_t);
-
-#endif /* MULTIPROCESSOR */
-
-/*
- * IP27 interrupt handling declarations: 128 hw sources, plus timers and
- * hub error sources; 5 levels.
- */
-
-struct intrhand *hubpi_intrhand0[HUBPI_NINTS];
-struct intrhand *hubpi_intrhand1[HUBPI_NINTS];
-
-#ifdef notyet
-#define INTPRI_XBOW_HUB (INTPRI_CLOCK + 1) /* HUB errors */
-#define INTPRI_XBOW_TIMER (INTPRI_XBOW_HUB + 1) /* prof timer */
-#define INTPRI_XBOW_CLOCK (INTPRI_XBOW_TIMER + 1) /* RTC */
-#define INTPRI_XBOW_HW1 (INTPRI_XBOW_CLOCK + 1) /* HW level 1 */
-#else
-#define INTPRI_XBOW_HW1 (INTPRI_CLOCK + 1) /* HW level 1 */
-#endif
-#define INTPRI_XBOW_HW0 (INTPRI_XBOW_HW1 + 1) /* HW level 0 */
-
-struct {
- uint64_t hw[2];
-} hubpi_intem[MAXCPUS], hubpi_imask[MAXCPUS][NIPLS];
-
-void
-ip27_setup()
-{
- struct cpu_info *ci = curcpu();
- struct ip27_config *ip27_config;
- uint64_t synergy0_0;
- console_t *cons;
- nmi_t *nmi;
- static char unknown_model[20];
-
- ci->ci_nasid = masternasid;
- ci->ci_slice = IP27_LHUB_L(HUBPI_CPU_NUMBER);
-
- io_base = PHYS_TO_XKPHYS_UNCACHED(0, SP_IO);
-
- ip35 = sys_config.system_type == SGI_IP35;
-
- if (ip35) {
- /*
- * Get brick model type.
- * We need to access the Synergy registers through the remote
- * HUB interface, local access is protected on some models.
- * Synergy0 register #0 is a 16 bits identification register.
- */
- synergy0_0 = IP27_RHSPEC_L(0, HSPEC_SYNERGY(0, 0));
- sys_config.system_subtype = (synergy0_0 & 0xf000) >> 12;
- switch (sys_config.system_subtype) {
- case IP35_O350: /* Chimera */
- hw_prod = "Origin 350";
- break;
- case IP35_FUEL: /* Asterix */
- hw_prod = "Fuel";
- break;
- case IP35_O300: /* Speedo2 */
- hw_prod = "Origin 300";
- break;
- case IP35_CBRICK:
- /* regular C-Brick, must be an Origin 3000 system */
- hw_prod = "Origin 3000";
- break;
- default:
- snprintf(unknown_model, sizeof unknown_model,
- "Unknown IP35 type %x", sys_config.system_subtype);
- hw_prod = unknown_model;
- break;
- }
- } else {
- ip27_config = (struct ip27_config *)
- IP27_LHSPEC_ADDR(LBOOTBASE_IP27 + IP27_CONFIG_OFFSET);
- if (ip27_config->magic == IP27_CONFIG_MAGIC)
- sys_config.system_subtype = ip27_config->ip27_subtype;
- else
- sys_config.system_subtype = IP27_UNKNOWN;
- switch (sys_config.system_subtype) {
- case IP27_O2K:
- hw_prod = "Origin 2000";
- break;
- case IP27_O200:
- hw_prod = "Origin 200";
- break;
- default:
- snprintf(unknown_model, sizeof unknown_model,
- "Unknown IP27 type %x", sys_config.system_subtype);
- hw_prod = unknown_model;
- break;
- }
- }
-
- /*
- * Register DMA-reachable memory constraints.
- * The xbridge(4) is limited to a 31-bit region (its IOMMU features
- * are too restricted to be of use).
- */
- dma_constraint.ucr_low = 0;
- dma_constraint.ucr_high = (1UL << 31) - 1;
-
- xbow_widget_base = ip27_widget_short;
- xbow_widget_map = ip27_widget_map;
- xbow_widget_id = ip27_widget_id_early;
-
- md_halt = ip27_halt;
-
- /*
- * Figure out as early as possibly whether we are running in M
- * or N mode.
- */
-
- kl_init(ip35);
- if (kl_n_mode != 0)
- xbow_long_shift = 28;
-
-#ifdef MULTIPROCESSOR
- /*
- * Pre-launch secondary CPUs with the help of the PROM. This has to be
- * done now, before tearing down the PROM TLB and disabling interrupts
- * on the secondary CPUs. The CPUs will wait in the spinup trampoline
- * until the system launches them for real.
- */
- ip27_ncpus = 1;
- kl_scan_all_nodes(IP27_BC_NODE, ip27_kl_launch_cpu_board, NULL);
-#endif
-
- /*
- * Initialize the early console parameters.
- * This assumes it is either on IOC3 or IOC4, accessible through
- * a widget small window.
- *
- * Since IOC3 and IOC4 use different clocks, we need to tell them
- * apart early. We rely on the serial port offset within the IOC
- * space.
- */
-
- cons = kl_get_console();
- xbow_build_bus_space(&sys_config.console_io, 0,
- 8 /* whatever nonzero */);
- /* point to devio base */
- sys_config.console_io.bus_base =
- cons->uart_base & 0xfffffffffff00000UL;
- comconsaddr = cons->uart_base & 0x00000000000fffffUL;
- comconsrate = cons->baud;
- if (comconsrate < 50 || comconsrate > 115200)
- comconsrate = 9600;
- if ((comconsaddr & 0xfff) < 0x380) {
- /* IOC3 */
- comconsfreq = 22000000 / 3;
- } else {
- /* IOC4 */
- uint32_t ioc4_mcr;
- paddr_t ioc4_base;
-
- /*
- * IOC4 clocks are derived from the PCI clock,
- * so we need to figure out whether this is an 66MHz
- * or a 33MHz bus.
- */
- ioc4_base = sys_config.console_io.bus_base;
- ioc4_mcr = *(volatile uint32_t *)(ioc4_base + IOC4_MCR);
- if (ioc4_mcr & IOC4_MCR_PCI_66MHZ)
- comconsfreq = 66666667;
- else
- comconsfreq = 33333333;
- }
- comconsiot = &sys_config.console_io;
-
- /*
- * Force widget interrupts to run through us, unless a
- * better interrupt master widget is found.
- */
-
- xbow_intr_widget_intr_register = ip27_hub_intr_register;
- xbow_intr_widget_intr_establish = ip27_hub_intr_establish;
- xbow_intr_widget_intr_disestablish = ip27_hub_intr_disestablish;
- xbow_intr_widget_intr_clear = ip27_hub_intr_clear;
- xbow_intr_widget_intr_set = ip27_hub_intr_set;
-
- set_intr(INTPRI_XBOW_HW1, CR_INT_1, hubpi_intr1);
- set_intr(INTPRI_XBOW_HW0, CR_INT_0, hubpi_intr0);
- register_splx_handler(ip27_hub_splx);
-
- /*
- * Disable all hardware interrupts.
- */
-
- IP27_LHUB_S(HUBPI_CPU0_IMR0, 0);
- IP27_LHUB_S(HUBPI_CPU0_IMR1, 0);
- IP27_LHUB_S(HUBPI_CPU1_IMR0, 0);
- IP27_LHUB_S(HUBPI_CPU1_IMR1, 0);
- (void)IP27_LHUB_L(HUBPI_IR0);
- (void)IP27_LHUB_L(HUBPI_IR1);
- if (ip35) {
- IP27_RHUB_PI_S(masternasid, 1, HUBPI_CPU0_IMR0, 0);
- IP27_RHUB_PI_S(masternasid, 1, HUBPI_CPU0_IMR1, 0);
- IP27_RHUB_PI_S(masternasid, 1, HUBPI_CPU1_IMR0, 0);
- IP27_RHUB_PI_S(masternasid, 1, HUBPI_CPU1_IMR1, 0);
- (void)IP27_RHUB_PI_L(masternasid, 1, HUBPI_IR0);
- (void)IP27_RHUB_PI_L(masternasid, 1, HUBPI_IR1);
- }
-
- /*
- * Setup NMI handler.
- */
- nmi = IP27_NMI(0);
- nmi->magic = NMI_MAGIC;
- nmi->cb = (vaddr_t)ip27_nmi;
- nmi->cb_complement = ~nmi->cb;
- nmi->cb_arg = 0;
-
- /*
- * Set up Node 0's HUB.
- */
- IP27_LHUB_S(HUBPI_REGION_PRESENT, 0xffffffffffffffff);
- IP27_LHUB_S(HUBPI_CALIAS_SIZE, PI_CALIAS_SIZE_0);
- if (ip35) {
- IP27_RHUB_PI_S(masternasid, 1,
- HUBPI_REGION_PRESENT, 0xffffffffffffffff);
- IP27_RHUB_PI_S(masternasid, 1,
- HUBPI_CALIAS_SIZE, PI_CALIAS_SIZE_0);
- }
-
- /*
- * Compute interrupt register address.
- */
- xbow_intr_address = (1UL << 47) /* XIO I/O space */ |
- (masternasid << (ip35 ? 39 : 38)) |
- ((uint64_t)IP27_RHUB_ADDR(0, HUBPI_IR_CHANGE) -
- IP27_NODE_IO_BASE(0)) /* HUB register offset */;
-
- _device_register = dksc_device_register;
-
-#ifdef MULTIPROCESSOR
- tc_init(&ip27_hub_timecounter);
-#endif
-}
-
-/*
- * Autoconf enumeration
- */
-
-void
-ip27_autoconf(struct device *parent)
-{
- union {
- struct mainbus_attach_args maa;
- struct cpu_attach_args caa;
- } u;
- uint node;
-
- xbow_widget_id = ip27_widget_id;
-
- /*
- * Attach the CPU we are running on early; other processors,
- * if any, will get attached as they are discovered.
- */
-
- bzero(&u, sizeof u);
- u.maa.maa_name = "cpu";
- u.maa.maa_nasid = currentnasid = masternasid;
- u.maa.maa_physid = IP27_LHUB_L(HUBPI_CPU_NUMBER);
- u.caa.caa_hw = &bootcpu_hwinfo;
- config_found(parent, &u, ip27_print);
- u.maa.maa_name = "clock";
- config_found(parent, &u, ip27_print);
-
- /*
- * Now attach all nodes' I/O devices.
- */
-
-#ifdef MULTIPROCESSOR
- ip27_ncpus = 1;
-#endif
- ip27_attach_node(parent, masternasid);
- for (node = 0; node < maxnodes; node++) {
- if (gda->nasid[node] < 0)
- continue;
- if (gda->nasid[node] == masternasid)
- continue;
- ip27_attach_node(parent, gda->nasid[node]);
- }
-}
-
-void
-ip27_attach_node(struct device *parent, int16_t nasid)
-{
- union {
- struct mainbus_attach_args maa;
- struct spdmem_attach_args saa;
- } u;
- uint dimm;
- void *match;
-
- currentnasid = nasid;
- bzero(&u, sizeof u);
-
- /*
- * IRIX performs this extra initialization on Origin 200 systems.
- * This seems to properly initialize on-board devices on the
- * second node.
- */
- if (sys_config.system_type == SGI_IP27 &&
- sys_config.system_subtype == IP27_O200) {
- IP27_RHUB_S(nasid, HUBMDBASE_IP27 | HUBMD_LED0,
- nasid == masternasid ? 1 : 9);
- IP27_RHUB_S(nasid, HUBMDBASE_IP27 | HUBMD_LED0,
- nasid == masternasid ? 1 : 9);
- }
-
-#ifdef MULTIPROCESSOR
- kl_scan_node(nasid, IP27_BC_NODE, ip27_kl_attach_cpu_board, parent);
-#endif
-
- if (ip35) {
- l1_display(nasid, 1, "OpenBSD/sgi");
-
- u.maa.maa_name = "spdmem";
- u.maa.maa_nasid = nasid;
- for (dimm = 0; dimm < L1_SPD_DIMM_MAX; dimm++) {
- u.saa.dimm = dimm;
- /*
- * inline config_found_sm() without printing a message
- * if match() fails, to avoid getting
- * ``spdmem not configured'' for empty memory slots.
- */
- if ((match = config_search(NULL, parent, &u)) != NULL)
- config_attach(parent, match, &u, ip27_print);
- }
- }
- u.maa.maa_name = "xbow";
- u.maa.maa_nasid = nasid;
- config_found(parent, &u, ip27_print);
-}
-
-int
-ip27_print(void *aux, const char *pnp)
-{
- struct mainbus_attach_args *maa = aux;
-
- if (pnp != NULL)
- printf("%s at %s", maa->maa_name, pnp);
- printf(" nasid %d", maa->maa_nasid);
-
- return UNCONF;
-}
-
-/*
- * Widget mapping.
- */
-
-paddr_t
-ip27_widget_short(int16_t nasid, u_int widget)
-{
- /*
- * A hardware bug on the PI side of the Hub chip (at least in
- * earlier versions) causes accesses to the short window #0
- * to be unreliable.
- * The PROM implements a workaround by remapping it to
- * big window #6 (the last programmable big window).
- */
- if (widget == 0)
- return ip27_widget_long(nasid, IOTTE_SWIN0);
-
- return ((uint64_t)(widget) << 24) |
- ((uint64_t)(nasid) << kl_n_shift) | io_base;
-}
-
-paddr_t
-ip27_widget_long(int16_t nasid, u_int window)
-{
- return ((uint64_t)(window + 1) << xbow_long_shift) |
- ((uint64_t)(nasid) << kl_n_shift) | io_base;
-}
-
-paddr_t
-ip27_widget_map(int16_t nasid, u_int widget, bus_addr_t *offs, bus_size_t *len)
-{
- uint tte, avail_tte;
- uint64_t iotte;
- paddr_t delta, start, end;
- int s;
-
- /*
- * On Origin systems, we can only have partial views of the widget
- * address space, due to the addressing scheme limiting each node's
- * address space to 31 to 33 bits.
- *
- * The largest window is 256MB or 512MB large, depending on the
- * mode the system is in (M/N).
- */
-
- /*
- * Round the requested range to a large window boundary.
- */
-
- start = *offs;
- end = start + *len;
-
- start = (start >> xbow_long_shift);
- end = (end + (1 << xbow_long_shift) - 1) >> xbow_long_shift;
-
- /*
- * See if an existing IOTTE covers part of the mapping we are asking
- * for. If so, reuse it and truncate the caller's range.
- */
-
- s = splhigh(); /* XXX or disable interrupts completely? */
-
- avail_tte = IOTTE_MAX;
- for (tte = 0; tte < IOTTE_MAX; tte++) {
- if (tte == IOTTE_SWIN0)
- continue;
-
- iotte = IP27_RHUB_L(nasid, HUBIOBASE + HUBIO_IOTTE(tte));
- if (IOTTE_WIDGET(iotte) == 0) {
- if (avail_tte == IOTTE_MAX)
- avail_tte = tte;
- continue;
- }
- if (IOTTE_WIDGET(iotte) != widget)
- continue;
-
- if (IOTTE_OFFSET(iotte) < start ||
- (IOTTE_OFFSET(iotte) + 1) >= end)
- continue;
-
- /*
- * We found a matching IOTTE (an exact match if we asked for
- * less than the large window size, a partial match otherwise).
- * Reuse it (since we never unmap IOTTE at this point, there
- * is no need to maintain a reference count).
- */
- break;
- }
-
- /*
- * If we found an unused IOTTE while searching above, program it
- * to map the beginning of the requested range.
- */
-
- if (tte == IOTTE_MAX && avail_tte != IOTTE_MAX) {
- tte = avail_tte;
-
- /* XXX I don't understand why it's not device space. */
- iotte = IOTTE(IOTTE_SPACE_MEMORY, widget, start);
- IP27_RHUB_S(nasid, HUBIOBASE + HUBIO_IOTTE(tte), iotte);
- (void)IP27_RHUB_L(nasid, HUBIOBASE + HUBIO_IOTTE(tte));
- }
-
- splx(s);
-
- if (tte != IOTTE_MAX) {
- delta = *offs - (start << xbow_long_shift);
- /* *offs unmodified */
- *len = (1 << xbow_long_shift) - delta;
-
- return ip27_widget_long(nasid, tte) + delta;
- }
-
- return 0UL;
-}
-
-/*
- * Widget enumeration
- */
-
-int
-ip27_widget_id(int16_t nasid, u_int widget, uint32_t *wid)
-{
- paddr_t wpa;
- uint32_t id;
-
- if (widget != 0)
- {
- if (widget < WIDGET_MIN || widget > WIDGET_MAX)
- return EINVAL;
- }
-
- wpa = ip27_widget_short(nasid, widget);
- if (guarded_read_4(wpa + (WIDGET_ID | 4), &id) != 0)
- return ENXIO;
-
- if (wid != NULL)
- *wid = id;
-
- return 0;
-}
-
-/*
- * Same as the above, but usable before we can handle faults.
- * Expects the caller to only use valid widget numbers...
- */
-int
-ip27_widget_id_early(int16_t nasid, u_int widget, uint32_t *wid)
-{
- paddr_t wpa;
-
- if (widget != 0)
- {
- if (widget < WIDGET_MIN || widget > WIDGET_MAX)
- return EINVAL;
- }
-
- wpa = ip27_widget_short(nasid, widget);
- if (wid != NULL)
- *wid = *(uint32_t *)(wpa + (WIDGET_ID | 4));
-
- return 0;
-}
-
-/*
- * Reboot code
- */
-
-void
-ip27_halt(int howto)
-{
- uint32_t promop;
- uint node;
- uint64_t nibase, action;
-
- /*
- * Even if ARCBios TLB and exception vectors are restored,
- * returning to ARCBios doesn't work.
- *
- * So, instead, send a reset through the network interface
- * of the Hub space. Although there seems to be a way to tell
- * the PROM which action we want it to take afterwards, it
- * always reboots for me...
- */
-
- if (howto & RB_HALT) {
-#if 0
- if (howto & RB_POWERDOWN)
- promop = GDA_PROMOP_HALT;
- else
- promop = GDA_PROMOP_EIM;
-#else
- if (howto & RB_POWERDOWN) {
- if (ip35) {
- l1_exec_command(masternasid, "* pwr d");
- delay(1000000);
- printf("Powerdown failed, "
- "please switch off power manually.\n");
- } else {
- printf("Software powerdown not supported, "
- "please switch off power manually.\n");
- }
- for (;;)
- continue;
- /* NOTREACHED */
- } else {
- printf("System halted.\n"
- "Press any key to restart\n");
- cngetc();
- promop = GDA_PROMOP_REBOOT;
- }
-#endif
- } else
- promop = GDA_PROMOP_REBOOT;
-
- promop |= GDA_PROMOP_MAGIC | GDA_PROMOP_NO_DIAGS |
- GDA_PROMOP_NO_MEMINIT;
-
-#if 0
- /*
- * That's what one would expect, based on the gda layout...
- */
- gda->promop = promop;
-#else
- /*
- * ...but the magic location is in a different castle.
- * And it's not even the same between IP27 and IP35.
- * Laugh, everyone! It's what SGI wants us to.
- */
- if (ip35)
- IP27_LHUB_S(HUBLBBASE_IP35 + 0x8010, promop);
- else
- IP27_LHUB_S(HUBPIBASE + 0x418, promop);
-#endif
-
- if (ip35) {
- nibase = HUBNIBASE_IP35;
- action = NI_RESET_LOCAL_IP35 | NI_RESET_ACTION_IP35;
- } else {
- nibase = HUBNIBASE_IP27;
- action = NI_RESET_LOCAL_IP27 | NI_RESET_ACTION_IP27;
- }
-
- /*
- * Reset all other nodes, if present.
- */
-
- for (node = 0; node < maxnodes; node++) {
- if (gda->nasid[node] < 0)
- continue;
- if (gda->nasid[node] == masternasid)
- continue;
- IP27_RHUB_S(gda->nasid[node],
- nibase + HUBNI_RESET_ENABLE, NI_RESET_ENABLE);
- IP27_RHUB_S(gda->nasid[node],
- nibase + HUBNI_RESET, action);
- }
- IP27_LHUB_S(nibase + HUBNI_RESET_ENABLE, NI_RESET_ENABLE);
- IP27_LHUB_S(nibase + HUBNI_RESET, action);
-}
-
-/*
- * Local HUB interrupt handling routines
- */
-
-/*
- * Find a suitable interrupt bit for the given interrupt.
- */
-int
-ip27_hub_intr_register(int widget, int level, int *intrbit)
-{
- u_long cpuid = cpu_number();
- int bit;
-
- /*
- * Try to allocate a bit on hardware level 0 first.
- */
- for (bit = HUBPI_INTR0_WIDGET_MAX; bit >= HUBPI_INTR0_WIDGET_MIN; bit--)
- if ((hubpi_intem[cpuid].hw[0] & (1UL << bit)) == 0)
- goto found;
-
- /*
- * If all level 0 sources are in use, try to allocate a bit on
- * level 1.
- */
- for (bit = HUBPI_INTR1_WIDGET_MAX; bit >= HUBPI_INTR1_WIDGET_MIN; bit--)
- if ((hubpi_intem[cpuid].hw[1] & (1UL << bit)) == 0) {
- bit += HUBPI_NINTS;
- goto found;
- }
-
- return EINVAL;
-
-found:
- *intrbit = bit;
- return 0;
-}
-
-/*
- * Register an interrupt handler for a given source, and enable it.
- */
-int
-ip27_hub_intr_establish(int (*func)(void *), void *arg, int intrbit,
- int level, const char *name, struct intrhand *ihstore)
-{
- struct intrhand *ih, **anchor;
- u_long cpuid = cpu_number();
- int flags;
- int s;
-
-#ifdef DIAGNOSTIC
- if (intrbit < 0 || intrbit >= HUBPI_NINTS + HUBPI_NINTS)
- return EINVAL;
-#endif
-
- flags = (level & IPL_MPSAFE) ? IH_MPSAFE : 0;
- level &= ~IPL_MPSAFE;
-
- /*
- * Widget interrupts are not supposed to be shared - the interrupt
- * mask is supposedly large enough for all interrupt sources.
- *
- * XXX On systems with many widgets and/or nodes, this assumption
- * XXX will no longer stand; we'll need to implement interrupt
- * XXX sharing at some point.
- */
- if (intrbit >= HUBPI_NINTS)
- anchor = &hubpi_intrhand1[intrbit % HUBPI_NINTS];
- else
- anchor = &hubpi_intrhand0[intrbit];
- if (*anchor != NULL)
- return EEXIST;
-
- if (ihstore == NULL) {
- ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
- if (ih == NULL)
- return ENOMEM;
- flags |= IH_ALLOCATED;
- } else
- ih = ihstore;
-
- ih->ih_next = NULL;
- ih->ih_fun = func;
- ih->ih_arg = arg;
- ih->ih_level = level;
- ih->ih_irq = intrbit;
- ih->ih_flags = flags;
- if (name != NULL)
- evcount_attach(&ih->ih_count, name, &ih->ih_level);
-
- s = splhigh();
-
- *anchor = ih;
-
- hubpi_intem[cpuid].hw[intrbit / HUBPI_NINTS] |=
- 1UL << (intrbit % HUBPI_NINTS);
- if (intrbit / HUBPI_NINTS != 0)
- ip27_hub_intr_makemasks1();
- else
- ip27_hub_intr_makemasks0();
-
- splx(s); /* causes hw mask update */
-
- return 0;
-}
-
-void
-ip27_hub_intr_disestablish(int intrbit)
-{
- struct intrhand *ih, **anchor;
- u_long cpuid = cpu_number();
- int s;
-
-#ifdef DIAGNOSTIC
- if (intrbit < 0 || intrbit >= HUBPI_NINTS + HUBPI_NINTS)
- return;
-#endif
-
- if (intrbit >= HUBPI_NINTS)
- anchor = &hubpi_intrhand1[intrbit % HUBPI_NINTS];
- else
- anchor = &hubpi_intrhand0[intrbit];
-
- s = splhigh();
-
- if ((ih = *anchor) == NULL) {
- splx(s);
- return;
- }
-
- *anchor = NULL;
-
- hubpi_intem[cpuid].hw[intrbit / HUBPI_NINTS] &=
- ~(1UL << (intrbit % HUBPI_NINTS));
- if (intrbit / HUBPI_NINTS != 0)
- ip27_hub_intr_makemasks1();
- else
- ip27_hub_intr_makemasks0();
-
- splx(s);
-
- if (ISSET(ih->ih_flags, IH_ALLOCATED))
- free(ih, M_DEVBUF, sizeof *ih);
-}
-
-void
-ip27_hub_intr_clear(int intrbit)
-{
- struct cpu_info *ci = curcpu();
-
- IP27_RHUB_PI_S(ci->ci_nasid, IP27_SLICE_SUBNODE(ci->ci_slice),
- HUBPI_IR_CHANGE, PI_IR_CLR | intrbit);
- (void)IP27_RHUB_PI_L(ci->ci_nasid, IP27_SLICE_SUBNODE(ci->ci_slice),
- HUBPI_IR0);
-}
-
-void
-ip27_hub_intr_set(int intrbit)
-{
- struct cpu_info *ci = curcpu();
-
- IP27_RHUB_PI_S(ci->ci_nasid, IP27_SLICE_SUBNODE(ci->ci_slice),
- HUBPI_IR_CHANGE, PI_IR_SET | intrbit);
-}
-
-void
-ip27_hub_splx(int newipl)
-{
- struct cpu_info *ci = curcpu();
-
- /* Update masks to new ipl. Order highly important! */
- ci->ci_ipl = newipl;
- ip27_hub_setintrmask(newipl);
-
- /* If we still have softints pending trigger processing. */
- if (ci->ci_softpending && newipl < IPL_SOFTINT)
- setsoftintr0();
-}
-
-/*
- * Level 0 and level 1 interrupt dispatchers.
- */
-
-#define INTR_FUNCTIONNAME hubpi_intr0
-#define MASK_FUNCTIONNAME ip27_hub_intr_makemasks0
-#define INTR_LOCAL_DECLS
-#define MASK_LOCAL_DECLS \
- struct cpu_info *ci = curcpu();
-#define INTR_GETMASKS \
-do { \
- isr = IP27_LHUB_L(HUBPI_IR0); \
- imr = IP27_LHUB_L(IP27_SLICE_LCPU(ci->ci_slice) == 0 ? \
- HUBPI_CPU0_IMR0 : HUBPI_CPU1_IMR0); \
- bit = HUBPI_INTR0_WIDGET_MAX; \
-} while (0)
-#define INTR_MASKPENDING \
-do { \
- IP27_LHUB_S(IP27_SLICE_LCPU(ci->ci_slice) == 0 ? \
- HUBPI_CPU0_IMR0 : HUBPI_CPU1_IMR0, imr & ~isr); \
- (void)IP27_LHUB_L(HUBPI_IR0); \
-} while (0)
-#define INTR_IMASK(ipl) hubpi_imask[ci->ci_cpuid][ipl].hw[0]
-#ifdef MULTIPROCESSOR
-#define INTR_IPI_HOOK(ipl) \
-do { \
- unsigned long ipibit = IP27_SLICE_IPI(ci->ci_slice); \
- unsigned long ipimask = 1 << ipibit; \
- if ((isr & ipimask) && \
- !(hubpi_imask[ci->ci_cpuid][ipl].hw[0] & ipimask)) { \
- struct intrhand *ih = hubpi_intrhand0[ipibit]; \
- ih->ih_fun(ih->ih_arg); \
- isr &= ~ipimask; \
- } \
-} while (0)
-#endif /* MULTIPROCESSOR */
-#define INTR_HANDLER(bit) hubpi_intrhand0[bit]
-#define INTR_SPURIOUS(bit) \
-do { \
- printf("spurious interrupt, source %d\n", bit); \
-} while (0)
-#define INTR_MASKRESTORE \
-do { \
- IP27_LHUB_S(IP27_SLICE_LCPU(ci->ci_slice) == 0 ? \
- HUBPI_CPU0_IMR0 : HUBPI_CPU1_IMR0, imr); \
- (void)IP27_LHUB_L(HUBPI_IR0); \
-} while (0)
-#define INTR_MASKSIZE HUBPI_NINTS
-
-#include <sgi/sgi/intr_template.c>
-
-#define INTR_FUNCTIONNAME hubpi_intr1
-#define MASK_FUNCTIONNAME ip27_hub_intr_makemasks1
-#define INTR_LOCAL_DECLS
-#define MASK_LOCAL_DECLS \
- struct cpu_info *ci = curcpu();
-#define INTR_GETMASKS \
-do { \
- isr = IP27_LHUB_L(HUBPI_IR1); \
- imr = IP27_LHUB_L(IP27_SLICE_LCPU(ci->ci_slice) == 0 ? \
- HUBPI_CPU0_IMR1 : HUBPI_CPU1_IMR1); \
- bit = HUBPI_INTR1_WIDGET_MAX; \
-} while (0)
-#define INTR_MASKPENDING \
-do { \
- IP27_LHUB_S(IP27_SLICE_LCPU(ci->ci_slice) == 0 ? \
- HUBPI_CPU0_IMR1 : HUBPI_CPU1_IMR1, imr & ~isr); \
- (void)IP27_LHUB_L(HUBPI_IR1); \
-} while (0)
-#define INTR_IMASK(ipl) hubpi_imask[ci->ci_cpuid][ipl].hw[1]
-#define INTR_HANDLER(bit) hubpi_intrhand1[bit]
-#define INTR_SPURIOUS(bit) \
-do { \
- printf("spurious interrupt, source %d\n", bit + HUBPI_NINTS); \
-} while (0)
-#define INTR_MASKRESTORE \
-do { \
- IP27_LHUB_S(IP27_SLICE_LCPU(ci->ci_slice) == 0 ? \
- HUBPI_CPU0_IMR1 : HUBPI_CPU1_IMR1, imr); \
- (void)IP27_LHUB_L(HUBPI_IR1); \
-} while (0)
-#define INTR_MASKSIZE HUBPI_NINTS
-
-#include <sgi/sgi/intr_template.c>
-
-void
-ip27_hub_setintrmask(int level)
-{
- struct cpu_info *ci = curcpu();
- u_long imr0, imr1;
-
- if (IP27_SLICE_LCPU(ci->ci_slice) == 0) {
- imr0 = HUBPI_CPU0_IMR0;
- imr1 = HUBPI_CPU0_IMR1;
- } else {
- imr0 = HUBPI_CPU1_IMR0;
- imr1 = HUBPI_CPU1_IMR1;
- }
-
- IP27_LHUB_S(imr0, hubpi_intem[ci->ci_cpuid].hw[0] &
- ~hubpi_imask[ci->ci_cpuid][level].hw[0]);
- (void)IP27_LHUB_L(HUBPI_IR0);
- IP27_LHUB_S(imr1, hubpi_intem[ci->ci_cpuid].hw[1] &
- ~hubpi_imask[ci->ci_cpuid][level].hw[1]);
- (void)IP27_LHUB_L(HUBPI_IR1);
-}
-
-void
-ip27_nmi(void *arg)
-{
- vaddr_t regs_offs;
- register_t *regs, epc;
- struct trapframe nmi_frame;
- extern int db_ktrap(int, struct trapframe *);
-
- /*
- * Build a ddb frame from the registers saved in the NMI KREGS
- * area.
- */
-
- if (ip35)
- regs_offs = IP35_NMI_KREGS_BASE; /* XXX assumes cpu0 */
- else
- regs_offs = IP27_NMI_KREGS_BASE; /* XXX assumes cpu0 */
- regs = IP27_UNCAC_ADDR(register_t *, 0, regs_offs);
-
- memset(&nmi_frame, 0xff, sizeof nmi_frame);
-
- /* general registers */
- memcpy(&nmi_frame.zero, regs, 32 * sizeof(register_t));
- regs += 32;
- nmi_frame.sr = *regs++; /* COP_0_STATUS_REG */
- nmi_frame.cause = *regs++; /* COP_0_CAUSE_REG */
- nmi_frame.pc = *regs++;
- nmi_frame.badvaddr = *regs++; /* COP_0_BAD_VADDR */
- epc = *regs++; /* COP_0_EXC_PC */
- regs++; /* COP_0_CACHE_ERR */
- regs++; /* NMI COP_0_STATUS_REG */
-
- setsr(getsr() & ~SR_BOOT_EXC_VEC);
- printf("NMI, PC = %p RA = %p SR = %08lx EPC = %p\n",
- (void *)nmi_frame.pc, (void *)nmi_frame.ra, nmi_frame.sr,
- (void *)epc);
-#ifdef DDB
- (void)db_ktrap(-1, &nmi_frame);
-#endif
- panic("NMI");
- /* NOTREACHED */
-}
-
-#ifdef MULTIPROCESSOR
-
-int
-ip27_kl_launch_cpu(klinfo_t *comp, void *arg)
-{
- struct cpu_info *ci = curcpu();
-
- /* Skip the running CPU. */
- if (comp->nasid == ci->ci_nasid &&
- comp->physid == ci->ci_slice)
- return 0;
-
- /* XXX Skip CPUs on other nodes. */
- if (comp->nasid != ci->ci_nasid)
- return 0;
-
- if (ip27_ncpus >= MAXCPUS)
- return 0;
-
- ip27_prom_launch_slave(comp->nasid, comp->physid,
- ip27_cpu_spinup_trampoline,
- SPINUP_TICKET(comp->nasid, comp->physid), 0, 0);
- ip27_ncpus++;
-
- return 0;
-}
-
-int
-ip27_kl_launch_cpu_board(lboard_t *board, void *arg)
-{
- kl_scan_board(board, KLSTRUCT_CPU, ip27_kl_launch_cpu, arg);
- return 0;
-}
-
-int
-ip27_kl_attach_cpu(klinfo_t *comp, void *arg)
-{
- struct cpu_attach_args caa;
- struct cpu_hwinfo hw;
- struct cpu_info *ci = curcpu();
- struct device *parent = arg;
- klcpu_t *cpucomp;
-
- /* Skip the running CPU. */
- if (comp->nasid == ci->ci_nasid &&
- comp->physid == ci->ci_slice)
- return 0;
-
- /* XXX Skip CPUs on other nodes. */
- if (comp->nasid != ci->ci_nasid)
- return 0;
-
- if (ip27_ncpus >= MAXCPUS)
- return 0;
-
- cpucomp = (klcpu_t *)comp;
-
- hw.c0prid = cpucomp->cpu_prid;
- hw.c1prid = cpucomp->cpu_prid;
- hw.clock = cpucomp->cpu_speed * 1000000;
- hw.tlbsize = 64;
- hw.type = (cpucomp->cpu_prid >> 8) & 0xff;
-
- caa.caa_maa.maa_name = "cpu";
- caa.caa_maa.maa_nasid = comp->nasid;
- caa.caa_maa.maa_physid = comp->physid;
- caa.caa_hw = &hw;
- config_found(parent, &caa, ip27_print);
- ip27_ncpus++;
-
- return 0;
-}
-
-int
-ip27_kl_attach_cpu_board(lboard_t *board, void *arg)
-{
- kl_scan_board(board, KLSTRUCT_CPU, ip27_kl_attach_cpu, arg);
- return 0;
-}
-
-uint
-ip27_hub_get_timecount(struct timecounter *tc)
-{
- return IP27_RHUB_L(masternasid, HUBPI_RT_COUNT);
-}
-
-void
-hw_ipi_intr_set(u_long cpuid)
-{
- struct cpu_info *ci = get_cpu_info(cpuid);
- int intr;
-
- intr = IP27_SLICE_IPI(ci->ci_slice);
- IP27_RHUB_PI_S(ci->ci_nasid, IP27_SLICE_SUBNODE(ci->ci_slice),
- HUBPI_IR_CHANGE, PI_IR_SET | intr);
-}
-
-void
-hw_ipi_intr_clear(u_long cpuid)
-{
- struct cpu_info *ci = get_cpu_info(cpuid);
- int intr;
-
- intr = IP27_SLICE_IPI(ci->ci_slice);
- IP27_RHUB_PI_S(ci->ci_nasid, IP27_SLICE_SUBNODE(ci->ci_slice),
- HUBPI_IR_CHANGE, PI_IR_CLR | intr);
- (void)IP27_RHUB_PI_L(ci->ci_nasid, IP27_SLICE_SUBNODE(ci->ci_slice),
- HUBPI_IR0);
-}
-
-int
-hw_ipi_intr_establish(int (*func)(void *), u_long cpuid)
-{
- struct cpu_info *ci = get_cpu_info(cpuid);
- int intr;
-
- intr = IP27_SLICE_IPI(ci->ci_slice);
- return ip27_hub_intr_establish(func, (void *)cpuid, intr,
- IPL_IPI | IPL_MPSAFE, NULL, NULL);
-}
-
-void
-hw_cpu_hatch(struct cpu_info *ci)
-{
- int s;
-
- setcurcpu(ci);
-
- /*
- * Make sure we can access the extended address space.
- * Note that r10k and later do not allow XUSEG accesses
- * from kernel mode unless SR_UX is set.
- */
- setsr(getsr() | SR_KX | SR_UX);
-
- tlb_init(64);
- tlb_set_pid(0);
-
- /*
- * Turn off bootstrap exception vectors.
- */
- setsr(getsr() & ~SR_BOOT_EXC_VEC);
-
- /*
- * Clear out the I and D caches.
- */
- Mips10k_ConfigCache(ci);
- Mips_SyncCache(ci);
-
- printf("cpu%lu launched\n", cpu_number());
-
- (*md_startclock)(ci);
-
- ncpus++;
- cpuset_add(&cpus_running, ci);
-
- mips64_ipi_init();
- ip27_hub_setintrmask(0);
-
- spl0();
- (void)updateimask(0);
-
- SCHED_LOCK(s);
- cpu_switchto(NULL, sched_chooseproc());
-}
-
-void
-hw_cpu_boot_secondary(struct cpu_info *ci)
-{
- vaddr_t kstack;
-
- kstack = alloc_contiguous_pages(USPACE);
- if (kstack == 0)
- panic("unable to allocate idle stack\n");
-
- __asm__ (".set noreorder\n");
- ci->ci_curprocpaddr = (void *)kstack;
- ip27_spinup_a0 = (uint64_t)ci;
- ip27_spinup_sp = (uint64_t)(kstack + USPACE);
- mips_sync();
- __asm__ (".set reorder\n");
- ip27_spinup_turn = SPINUP_TICKET(ci->ci_nasid, ci->ci_slice);
-
- while (!cpuset_isset(&cpus_running, ci))
- ;
-}
-
-#endif /* MULTIPROCESSOR */
+++ /dev/null
-/* $OpenBSD: ip30.h,v 1.10 2012/06/17 12:34:19 miod Exp $ */
-
-/*
- * Copyright (c) 2008, 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Physical memory on Octane starts at 512MB.
- *
- * This allows the small windows of all widgets to appear under physical
- * memory, and the Bridge window (#f) to sport the machine PROM at the
- * physical address where the CPU expects it on reset.
- */
-
-#define IP30_MEMORY_BASE 0x20000000
-#define IP30_MEMORY_ARCBIOS_LIMIT 0x40000000
-
-/*
- * Specific widget assignment
- */
-
-#define IP30_HEART_WIDGET 8
-#define IP30_BRIDGE_WIDGET 15
-
-#define IP30_IOC_SLOTNO 2
-
-/*
- * On-board IOC3 specific GPIO registers wiring
- */
-
-/* Light bar control: 0 to dim, 1 to lit */
-#define IP30_GPIO_WHITE_LED 0 /* actually lightbulbs */
-#define IP30_GPIO_RED_LED 1
-/* Classic Octane (1) vs Octane 2 (0), read only */
-#define IP30_GPIO_CLASSIC 2
-
-/*
- * Flash PROM physical address, within BRIDGE widget
- */
-
-#define IP30_FLASH_BASE 0xc00000
-#define IP30_FLASH_SIZE 0x200000
-#define IP30_FLASH_ALT 0xe00000
-
-/*
- * Multiprocessor configuration area
- */
-
-#define IP30_MAXCPUS 4
-
-#define MPCONF_BASE 0x0000000000000600
-#define MPCONF_LEN 0x80
-#define MPCONF_SHIFT 7 /* Log2(MPCONF_LEN) */
-
-#define MPCONF_MAGIC(i) ((i) * MPCONF_LEN + 0x00)
-#define MPCONF_PRID(i) ((i) * MPCONF_LEN + 0x04)
-#define MPCONF_PHYSID(i) ((i) * MPCONF_LEN + 0x08)
-#define MPCONF_VIRTID(i) ((i) * MPCONF_LEN + 0x0c)
-#define MPCONF_SCACHESZ(i) ((i) * MPCONF_LEN + 0x10)
-#define MPCONF_FANLOADS(i) ((i) * MPCONF_LEN + 0x14)
-#define MPCONF_LAUNCH(i) ((i) * MPCONF_LEN + 0x18)
-#define MPCONF_RNDVZ(i) ((i) * MPCONF_LEN + 0x20)
-#define MPCONF_STACKADDR(i) ((i) * MPCONF_LEN + 0x40)
-#define MPCONF_LPARAM(i) ((i) * MPCONF_LEN + 0x48)
-#define MPCONF_RPARAM(i) ((i) * MPCONF_LEN + 0x50)
-#define MPCONF_IDLEFLAG(i) ((i) * MPCONF_LEN + 0x58)
-
-#define MPCONF_MAGIC_VAL 0xbaddeed2
-
-/*
- * Global data area
- */
-
-#define GDA_BASE 0x0000000000000400
-
-#define GDA_MAGIC 0x58464552 /* XFER */
-
-#if !defined(_LOCORE)
-struct ip30_gda {
- uint32_t magic; /* GDA_MAGIC */
- uint32_t promop;
- void (*nmi_cb)(void);
- uint64_t masterspid;
- void *tlb_handlers[3];
- uint64_t nmi_count;
-};
-
-int ip30_find_video(void);
-#endif
+++ /dev/null
-/* $OpenBSD: ip30_machdep.c,v 1.70 2020/08/26 03:29:06 visa Exp $ */
-
-/*
- * Copyright (c) 2008, 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Octane (IP30) specific code.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/device.h>
-#include <sys/tty.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/cache.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/memconf.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <sgi/sgi/ip30.h>
-#include <sgi/xbow/widget.h>
-#include <sgi/xbow/xbow.h>
-#include <sgi/xbow/xbowdevs.h>
-#include <sgi/xbow/xbridgereg.h> /* BRIDGE_PCI0_MEM_SPACE_BASE */
-
-#include <sgi/xbow/xheartreg.h>
-#include <sgi/pci/iocreg.h>
-
-#include <dev/ic/comvar.h>
-
-extern int mbprint(void *, const char *);
-
-#ifdef MULTIPROCESSOR
-extern int xheart_intr_establish(int (*)(void *), void *, int, int,
- const char *, struct intrhand *);
-extern void xheart_intr_set(int);
-extern void xheart_intr_clear(int);
-extern void xheart_setintrmask(int);
-
-extern struct user *proc0paddr;
-#endif
-
-uint32_t ip30_lights_frob(uint32_t, struct trapframe *);
-paddr_t ip30_widget_short(int16_t, u_int);
-paddr_t ip30_widget_long(int16_t, u_int);
-paddr_t ip30_widget_map(int16_t, u_int, bus_addr_t *, bus_size_t *);
-int ip30_widget_id(int16_t, u_int, uint32_t *);
-static u_long ip30_get_ncpusfound(void);
-
-#ifdef DDB
-void ip30_nmi(void); /* ip30_nmi.S */
-void ip30_nmi_handler(void);
-#endif
-
-static paddr_t ip30_iocbase;
-
-static const paddr_t mpconf =
- PHYS_TO_XKPHYS(MPCONF_BASE, CCA_COHERENT_EXCLWRITE);
-
-static int ip30_cpu_exists(int);
-
-void
-ip30_setup()
-{
- paddr_t heart;
- int bank;
- uint32_t memcfg;
- uint64_t start, count, end;
- u_long cpuspeed;
-#ifdef DDB
- struct ip30_gda *gda;
-#endif
-
- /*
- * Scan for memory. ARCBios reports up to 1GB of memory as available,
- * and anything after is reported as reserved.
- */
- heart = PHYS_TO_XKPHYS(HEART_PIU_BASE, CCA_NC);
- for (bank = 0; bank < 8; bank++) {
- memcfg = *(volatile uint32_t *)
- (heart + HEART_MEMORY_STATUS + bank * sizeof(uint32_t));
-#ifdef DEBUG
- bios_printf("memory bank %d: %08x\n", bank, memcfg);
-#endif
-
- if (!ISSET(memcfg, HEART_MEMORY_VALID))
- continue;
-
- count = ((memcfg & HEART_MEMORY_SIZE_MASK) >>
- HEART_MEMORY_SIZE_SHIFT) + 1;
- start = (memcfg & HEART_MEMORY_ADDR_MASK) >>
- HEART_MEMORY_ADDR_SHIFT;
-
- count <<= HEART_MEMORY_UNIT_SHIFT;
- start <<= HEART_MEMORY_UNIT_SHIFT;
-
- /* Physical memory starts at 512MB */
- start += IP30_MEMORY_BASE;
- end = start + count;
-#ifdef DEBUG
- bios_printf("memory from %p to %p\n",
- start, end);
-#endif
-
- /*
- * Add memory not obtained through ARCBios.
- */
- if (start < IP30_MEMORY_BASE + IP30_MEMORY_ARCBIOS_LIMIT)
- start = IP30_MEMORY_BASE + IP30_MEMORY_ARCBIOS_LIMIT;
-#if 0
- /*
- * XXX Temporarily restrict memory to 1.5GB, until the bug
- * XXX causing low memory corruption is found.
- */
- if (end > 0x80000000UL)
- end = 0x80000000UL;
-#endif
- if (start < end)
- memrange_register(atop(start), atop(end), 0);
- }
-
- /*
- * Register DMA-reachable memory constraints.
- * The xbridge(4) is limited to a 31-bit region (its IOMMU features
- * are too restricted to be of use).
- */
- dma_constraint.ucr_low = 0;
- dma_constraint.ucr_high = (1UL << 31) - 1;
-
- xbow_widget_base = ip30_widget_short;
- xbow_widget_map = ip30_widget_map;
- xbow_widget_id = ip30_widget_id;
-
- bootcpu_hwinfo.c0prid = cp0_get_prid();
- bootcpu_hwinfo.c1prid = cp1_get_prid();
- cpuspeed = bios_getenvint("cpufreq");
- if (cpuspeed < 100)
- cpuspeed = 175; /* reasonable default */
- bootcpu_hwinfo.clock = cpuspeed * 1000000;
- bootcpu_hwinfo.tlbsize = 64; /* R10000 family */
- bootcpu_hwinfo.type = (bootcpu_hwinfo.c0prid >> 8) & 0xff;
-
- /*
- * Initialize the early console parameters.
- * On Octane, the BRIDGE is always widget 15, and IOC3 is always
- * mapped in memory space at address 0x500000.
- *
- * Also, note that by using a direct widget bus_space, there is
- * no endianness conversion done on the bus addresses. Which is
- * exactly what we need, since the IOC3 doesn't need any. Some
- * may consider this an evil abuse of bus_space knowledge, though.
- */
-
- xbow_build_bus_space(&sys_config.console_io, 0, IP30_BRIDGE_WIDGET);
- sys_config.console_io.bus_base =
- ip30_widget_long(0, IP30_BRIDGE_WIDGET) +
- BRIDGE_PCI0_MEM_SPACE_BASE + 0x500000;
-
- comconsaddr = IOC3_UARTA_BASE;
- comconsfreq = 22000000 / 3;
- comconsiot = &sys_config.console_io;
- comconsrate = bios_consrate;
-
-#ifdef DDB
- /*
- * Setup NMI handler.
- */
- gda = (struct ip30_gda *)PHYS_TO_XKPHYS(GDA_BASE, CCA_CACHED);
- if (gda->magic == GDA_MAGIC)
- gda->nmi_cb = ip30_nmi;
-#endif
-
- /*
- * Octane and Octane2 can be told apart with a GPIO source bit
- * in the onboard IOC3.
- */
- ip30_iocbase = sys_config.console_io.bus_base;
- if (*(volatile uint32_t *)
- (ip30_iocbase + IOC3_GPPR(IP30_GPIO_CLASSIC)) != 0)
- hw_prod = "Octane";
- else
- hw_prod = "Octane2";
-
- ncpusfound = ip30_get_ncpusfound();
-
- _device_register = arcs_device_register;
-}
-
-/*
- * Autoconf enumeration
- */
-
-void
-ip30_autoconf(struct device *parent)
-{
- struct cpu_attach_args caa;
-#ifdef MULTIPROCESSOR
- struct cpu_hwinfo hw;
- int cpuid;
-#endif
-
- bzero(&caa, sizeof caa);
- caa.caa_maa.maa_nasid = masternasid;
- caa.caa_maa.maa_name = "cpu";
- caa.caa_hw = &bootcpu_hwinfo;
- config_found(parent, &caa, mbprint);
-
-#ifdef MULTIPROCESSOR
- for (cpuid = 1; cpuid < IP30_MAXCPUS; cpuid++)
- if (ip30_cpu_exists(cpuid)) {
- /*
- * Attach other processors with the same hardware
- * information as the boot processor, unless we
- * can get this information from the MPCONF area;
- * since Octane processors should be identical
- * (model, speed and cache), this should be safe.
- */
- bcopy(&bootcpu_hwinfo, &hw, sizeof(struct cpu_hwinfo));
- hw.c0prid =
- *(volatile uint32_t *)(mpconf + MPCONF_PRID(cpuid));
- hw.type = (hw.c0prid >> 8) & 0xff;
- hw.l2size = 1 << *(volatile uint32_t *)
- (mpconf + MPCONF_SCACHESZ(cpuid));
- caa.caa_hw = &hw;
- config_found(parent, &caa, mbprint);
- }
-#endif
-
- caa.caa_maa.maa_name = "clock";
- config_found(parent, &caa.caa_maa, mbprint);
- caa.caa_maa.maa_name = "xbow";
- config_found(parent, &caa.caa_maa, mbprint);
- caa.caa_maa.maa_name = "power";
- config_found(parent, &caa.caa_maa, mbprint);
-}
-
-/*
- * Widget mapping. IP30 only has one processor board node, so the nasid
- * parameter is ignored.
- */
-
-paddr_t
-ip30_widget_short(int16_t nasid, u_int widget)
-{
- return PHYS_TO_XKPHYS(((uint64_t)widget << 24) | (1ULL << 28), CCA_NC);
-}
-
-paddr_t
-ip30_widget_long(int16_t nasid, u_int widget)
-{
- return PHYS_TO_XKPHYS((uint64_t)(widget) << 36, CCA_NC);
-}
-
-paddr_t
-ip30_widget_map(int16_t nasid, u_int widget, bus_addr_t *offs, bus_size_t *len)
-{
- paddr_t base;
-
- /*
- * On Octane, the whole widget space is always accessible.
- */
-
- base = ip30_widget_long(nasid, widget);
- *len = (1ULL << 36) - *offs;
-
- return base + *offs;
-}
-
-/*
- * Widget enumeration
- */
-
-int
-ip30_widget_id(int16_t nasid, u_int widget, uint32_t *wid)
-{
- paddr_t linkpa, wpa;
-
- if (widget != 0) {
- if (widget < WIDGET_MIN || widget > WIDGET_MAX)
- return EINVAL;
-
- linkpa = ip30_widget_short(nasid, 0) + XBOW_WIDGET_LINK(widget);
- if (!ISSET(*(uint32_t *)(linkpa + (WIDGET_LINK_STATUS | 4)),
- WIDGET_STATUS_ALIVE))
- return ENXIO; /* not connected */
- }
-
- wpa = ip30_widget_short(nasid, widget);
- if (wid != NULL)
- *wid = *(uint32_t *)(wpa + (WIDGET_ID | 4));
-
- return 0;
-}
-
-/*
- * Figure out which video widget to use.
- *
- * If we are running with glass console, ConsoleOut will be `video(#)' with
- * the optional number being the number of the video device in the ARCBios
- * component tree.
- *
- * Unfortunately, we do not know how to match an ARCBios component to a
- * given widget (the PROM can... it's just not sharing this with us).
- *
- * So simply walk the available widget space and count video devices.
- */
-
-int
-ip30_find_video()
-{
- uint widid, head;
- uint32_t id, vendor, product;
- char *p;
-
- if (strncmp(bios_console, "video", 5) != 0)
- return 0; /* not graphics console */
-
- p = bios_console + 5;
- switch (*p) {
- case '(':
- /* 8 widgets max -> single digit */
- p++;
- if (*p == ')')
- head = 0;
- else {
- if (*p < '0' || *p > '9')
- return 0;
- head = *p++ - '0';
- if (*p != ')')
- return 0;
- }
- break;
- case '\0':
- head = 0;
- break;
- default:
- return 0;
- }
-
- for (widid = WIDGET_MAX; widid >= WIDGET_MIN; widid--) {
- if (ip30_widget_id(0, widid, &id) != 0)
- continue;
-
- vendor = WIDGET_ID_VENDOR(id);
- product = WIDGET_ID_PRODUCT(id);
-
- if ((vendor == XBOW_VENDOR_SGI2 &&
- product == XBOW_PRODUCT_SGI2_ODYSSEY) ||
- (vendor == XBOW_VENDOR_SGI5 &&
- product == XBOW_PRODUCT_SGI5_IMPACT) ||
- (vendor == XBOW_VENDOR_SGI5 &&
- product == XBOW_PRODUCT_SGI5_KONA)) {
- /* found a video device */
- if (head == 0)
- return widid;
- head--;
- }
- }
-
- return 0;
-}
-
-/*
- * Fun with the lightbar
- */
-uint32_t
-ip30_lights_frob(uint32_t hwpend, struct trapframe *cf)
-{
- uint32_t gpioold, gpio;
-
- /* Light bar status: idle - white, user - red, system - both */
-
- gpio = gpioold = *(volatile uint32_t *)(ip30_iocbase + IOC3_GPDR);
- gpio &= ~((1 << IP30_GPIO_WHITE_LED) | (1 << IP30_GPIO_RED_LED));
-
- if (cf->sr & SR_KSU_USER)
- gpio |= (1 << IP30_GPIO_RED_LED);
- else {
- gpio |= (1 << IP30_GPIO_WHITE_LED);
-
- /* XXX SMP check other CPU is unidle */
- if (curproc != curcpu()->ci_schedstate.spc_idleproc)
- gpio |= (1 << IP30_GPIO_RED_LED);
- }
-
- if (gpio != gpioold)
- *(volatile uint32_t *)(ip30_iocbase + IOC3_GPDR) = gpio;
-
- return 0; /* Real clock int handler will claim the interrupt. */
-}
-
-static int
-ip30_cpu_exists(int cpuid)
-{
- uint32_t magic =
- *(volatile uint32_t *)(mpconf + MPCONF_MAGIC(cpuid));
- return magic == MPCONF_MAGIC_VAL;
-}
-
-u_long
-ip30_get_ncpusfound(void)
-{
- int i;
- int ncpus = 0;
-
- for (i = 0; i < IP30_MAXCPUS; i++)
- if (ip30_cpu_exists(i))
- ncpus++;
-
- return ncpus;
-}
-
-#ifdef DDB
-void
-ip30_nmi_handler()
-{
- extern int db_ktrap(int, struct trapframe *);
- extern void stacktrace(struct trapframe *);
- struct trapframe *fr0;
- int s;
-#ifdef MULTIPROCESSOR
- struct trapframe *fr1;
- struct cpu_info *ci = curcpu();
-#endif
-
- setsr(getsr() & ~SR_BOOT_EXC_VEC);
-
- s = splhigh();
-#ifdef MULTIPROCESSOR
- ENABLEIPI();
-
- if (!CPU_IS_PRIMARY(ci)) {
- for (;;)
- continue;
- /* NOTREACHED */
- }
-#endif
-
- printf("NMI\n");
-
- fr0 = (struct trapframe *)PHYS_TO_XKPHYS(IP30_MEMORY_BASE + 0x4000,
- CCA_CACHED);
-#ifdef MULTIPROCESSOR
- fr1 = (struct trapframe *)PHYS_TO_XKPHYS(IP30_MEMORY_BASE + 0x6000,
- CCA_CACHED);
-#endif
-
-#ifdef MULTIPROCESSOR
- printf("cpu #0 traceback\n");
-#endif
- stacktrace(fr0);
-#ifdef MULTIPROCESSOR
- printf("cpu #1 traceback\n");
- stacktrace(fr1);
-#endif
-
- db_ktrap(-1, fr0);
-
- splx(s);
- panic("NMI");
- /* NOTREACHED */
-}
-#endif
-
-#ifdef MULTIPROCESSOR
-void
-hw_cpu_boot_secondary(struct cpu_info *ci)
-{
- int cpuid = ci->ci_cpuid;
- vaddr_t kstack;
-
-#ifdef DEBUG
- uint64_t stackaddr =
- *(volatile uint64_t *)(mpconf + MPCONF_STACKADDR(cpuid));
- uint64_t lparam =
- *(volatile uint64_t *)(mpconf + MPCONF_LPARAM(cpuid));
- uint64_t launch =
- *(volatile uint64_t *)(mpconf + MPCONF_LAUNCH(cpuid));
- uint32_t magic =
- *(volatile uint32_t *)(mpconf + MPCONF_MAGIC(cpuid));
- uint32_t prid =
- *(volatile uint32_t *)(mpconf + MPCONF_PRID(cpuid));
- uint32_t physid =
- *(volatile uint32_t *)(mpconf + MPCONF_PHYSID(cpuid));
- uint32_t virtid =
- *(volatile uint32_t *)(mpconf + MPCONF_VIRTID(cpuid));
- uint32_t scachesz =
- *(volatile uint32_t *)(mpconf + MPCONF_SCACHESZ(cpuid));
- uint16_t fanloads =
- *(volatile uint16_t *)(mpconf + MPCONF_FANLOADS(cpuid));
- uint64_t rndvz =
- *(volatile uint64_t *)(mpconf + MPCONF_RNDVZ(cpuid));
- uint64_t rparam =
- *(volatile uint64_t *)(mpconf + MPCONF_RPARAM(cpuid));
- uint32_t idleflag =
- *(volatile uint32_t *)(mpconf + MPCONF_IDLEFLAG(cpuid));
-
- printf("ci:%p cpuid:%d magic:%x prid:%x physid:%x virtid:%x\n"
- "scachesz:%u fanloads:%x launch:%llx rndvz:%llx\n"
- "stackaddr:%llx lparam:%llx rparam:%llx idleflag:%x\n",
- ci, cpuid, magic, prid, physid, virtid,
- scachesz, fanloads, launch, rndvz,
- stackaddr, lparam, rparam, idleflag);
-#endif
- kstack = alloc_contiguous_pages(USPACE);
- if (kstack == 0)
- panic("unable to allocate idle stack");
- ci->ci_curprocpaddr = (void *)kstack;
-
- *(volatile uint64_t *)(mpconf + MPCONF_STACKADDR(cpuid)) =
- (uint64_t)(kstack + USPACE);
- *(volatile uint64_t *)(mpconf + MPCONF_LPARAM(cpuid)) =
- (uint64_t)ci;
- *(volatile uint64_t *)(mpconf + MPCONF_LAUNCH(cpuid)) =
- (uint64_t)hw_cpu_spinup_trampoline;
-
- while (!cpuset_isset(&cpus_running, ci))
- ;
-}
-
-void
-hw_cpu_hatch(struct cpu_info *ci)
-{
- int s;
-
- /*
- * Set curcpu address on this processor.
- */
- setcurcpu(ci);
-
- /*
- * Make sure we can access the extended address space.
- * Note that r10k and later do not allow XUSEG accesses
- * from kernel mode unless SR_UX is set.
- */
- setsr(getsr() | SR_KX | SR_UX);
-
- tlb_init(64);
- tlb_set_pid(0);
-
- /*
- * Turn off bootstrap exception vectors.
- */
- setsr(getsr() & ~SR_BOOT_EXC_VEC);
-
- /*
- * Clear out the I and D caches.
- */
- Mips10k_ConfigCache(ci);
- Mips_SyncCache(ci);
-
- (*md_startclock)(ci);
-
- ncpus++;
- cpuset_add(&cpus_running, ci);
-
- mips64_ipi_init();
- xheart_setintrmask(0);
-
- spl0();
- (void)updateimask(0);
-
- SCHED_LOCK(s);
- cpu_switchto(NULL, sched_chooseproc());
-}
-
-int
-hw_ipi_intr_establish(int (*func)(void *), u_long cpuid)
-{
- return xheart_intr_establish(func, (void *)cpuid, HEART_ISR_IPI(cpuid),
- IPL_IPI | IPL_MPSAFE, NULL, NULL);
-};
-
-void
-hw_ipi_intr_set(u_long cpuid)
-{
- xheart_intr_set(HEART_ISR_IPI(cpuid));
-}
-
-void
-hw_ipi_intr_clear(u_long cpuid)
-{
- xheart_intr_clear(HEART_ISR_IPI(cpuid));
-}
-#endif
+++ /dev/null
-/* $OpenBSD: ip30_nmi.S,v 1.7 2021/02/11 14:44:14 visa Exp $ */
-
-/*
- * Copyright (c) 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/regnum.h>
-#include <machine/cpustate.h>
-
-#define HW_CPU_NUMBER_REG 0x900000000ff50000 /* HEART_PRID */
-
-#include "assym.h"
-
- .set mips3
-
-/*
- * The NMI handler routine is shared accross all processors.
- *
- * When the NMI is triggered, we might be in the middle of an exception
- * handler, and relying upon k0 and k1.
- *
- * Unfortunately, since there is no way to know whether our stack is valid,
- * we will need these registers. Therefore NMI are fatal if they occur in
- * kernel mode... but we don't even try to resume from them, yet.
- */
- .globl ip30_nmi
-ip30_nmi:
- .set noat
- sync
-
- LOAD_XKPHYS(k0, CCA_CACHED)
- LA k1, IP30_MEMORY_BASE + 0x4000
- PTR_ADDU k0, k0, k1
-
- /*
- * We use part of the low memory as stack and save area.
- * This is safe since we reserved this area early.
- * We give ourselves 8KB, minus the size of the frame, of stack.
- */
-
- LA k1, HW_CPU_NUMBER_REG
- PTR_L k1, 0(k1)
- beqz k1, 1f
- nop
-
- /* CPU #1 */
- PTR_ADDU k0, k0, 0x2000
-1:
- /*
- * Save state.
- * k0 = frame base, k1 = cpu number
- */
-
- SAVE_CPU(k0, 0)
- SAVE_CPU_SREG(k0, 0)
- .set at
-
- PTR_ADDU sp, k0, 0x2000
-
- /*
- * Interrupts should be disabled. Just in case they aren't,
- * enforce this (a1 still contains the value of cop0 SR).
- */
-
- and a1, a1, ~SR_INT_ENAB
- mtc0 a1, COP_0_STATUS_REG
- MTC0_SR_IE_HAZARD
-
- jal ip30_nmi_handler /* ip30_machdep.c */
- nop
-
-9:
- sync
- b 9b
- nop
+++ /dev/null
-/* $OpenBSD: ip32_machdep.c,v 1.24 2020/08/26 03:29:06 visa Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/device.h>
-#include <sys/extent.h>
-#include <sys/tty.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/memconf.h>
-
-#include <mips64/arcbios.h>
-
-#include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
-#include <sgi/localbus/macebusvar.h>
-
-#include <dev/ic/comvar.h>
-
-extern int tlb_set_wired_get_random(int); /* tlbhandler.S */
-
-void crime_configure_memory(void);
-
-void
-crime_configure_memory(void)
-{
- volatile u_int64_t *bank_ctrl;
- paddr_t addr;
- psize_t size;
- u_int64_t ctrl0, ctrl;
- u_int64_t first_page, last_page;
- int bank;
-#ifdef DEBUG
- int i;
-#endif
-
- bank_ctrl =
- (void *)PHYS_TO_CKSEG1(CRIMEBUS_BASE + CRIME_MEM_BANK0_CONTROL);
- for (bank = 0; bank < CRIME_MAX_BANKS; bank++) {
- ctrl = bank_ctrl[bank];
- addr = (ctrl & CRIME_MEM_BANK_ADDR) << 25;
- size = (ctrl & CRIME_MEM_BANK_128MB) ? 128 : 32;
-
- /*
- * Empty banks are reported as duplicates of bank #0.
- */
- if (bank == 0)
- ctrl0 = ctrl;
- else if (ctrl == ctrl0)
- continue;
-
-#ifdef DEBUG
- bios_printf("crime: bank %d contains %ld MB at %p\n",
- bank, size, addr);
-#endif
-
- /*
- * Do not report memory regions below 256MB, since ARCBIOS
- * will do.
- */
- if (addr < 256 * 1024 * 1024)
- continue;
-
- addr += CRIME_MEMORY_OFFSET;
- size *= 1024 * 1024;
- first_page = atop(addr);
- last_page = atop(addr + size);
-
- memrange_register(first_page, last_page, 0);
- }
-
-#ifdef DEBUG
- for (i = 0; i < MAXMEMSEGS; i++)
- if (mem_layout[i].mem_last_page != 0)
- bios_printf("MEM %d, %p to %p\n", i,
- ptoa(mem_layout[i].mem_first_page),
- ptoa(mem_layout[i].mem_last_page));
-#endif
-}
-
-void
-ip32_setup()
-{
- u_long cpuspeed;
-
- /*
- * IP32 PROM version 4.18:
- * PROM Monitor (BE)
- * Tue Oct 22 10:58:00 PDT 2002
- * VERSION 4.18
- * O2 R5K/R7K/R10K/R12K
- * IRIX 6.5.x IP32prom IP32PROM-v4
- * has incorrect function pointers for all ARCBios calls running in
- * CKSEG1 (all the reboot/restart routines).
- *
- * We attempt to detect this and fix the function pointers here.
- *
- * XXX 4.16 and 4.17 might need similar fixes. 4.15 is sane.
- */
-
- if ((vaddr_t)bios_halt == RESET_EXC_VEC + 0x161c &&
- (vaddr_t)bios_powerdown == RESET_EXC_VEC + 0x1648 &&
- (vaddr_t)bios_restart == RESET_EXC_VEC + 0x1674 &&
- (vaddr_t)bios_reboot == RESET_EXC_VEC + 0x16a0 &&
- (vaddr_t)bios_eim == RESET_EXC_VEC + 0x15f0 &&
- *(uint32_t *)bios_halt == 0xafbf0014 &&
- *(uint32_t *)bios_powerdown == 0xafbf0014 &&
- *(uint32_t *)bios_restart == 0xafb1001c &&
- *(uint32_t *)bios_eim == 0xafbf0014) {
- bios_halt = (void (*)(void))(RESET_EXC_VEC + 0x15bc);
- bios_powerdown = (void (*)(void))(RESET_EXC_VEC + 0x15e8);
- bios_restart = (void (*)(void))(RESET_EXC_VEC + 0x1614);
- bios_reboot = (void (*)(void))(RESET_EXC_VEC + 0x1640);
- bios_eim = (void (*)(void))(RESET_EXC_VEC + 0x1590);
- }
-
- crime_configure_memory();
-
- /* R12K O2s must run with DSD on. */
- switch ((cp0_get_prid() >> 8) & 0xff) {
- case MIPS_R12000:
- setsr(getsr() | SR_DSD);
- protosr |= SR_DSD;
- break;
- }
-
- bootcpu_hwinfo.c0prid = cp0_get_prid();
- bootcpu_hwinfo.c1prid = cp1_get_prid();
- cpuspeed = bios_getenvint("cpufreq");
- if (cpuspeed < 100)
- cpuspeed = 180; /* reasonable default */
- bootcpu_hwinfo.clock = cpuspeed * 1000000;
- bootcpu_hwinfo.type = (bootcpu_hwinfo.c0prid >> 8) & 0xff;
-
- /*
- * Figure out how many TLB are available.
- */
- switch (bootcpu_hwinfo.type) {
-#ifdef CPU_RM7000
- case MIPS_RM7000:
- /*
- * Rev A (version >= 2) CPU's have 64 TLB entries.
- *
- * However, the last 16 are only enabled if one
- * particular configuration bit (mode bit #24)
- * is set on cpu reset, so check whether the
- * extra TLB are really usable.
- *
- * If they are disabled, they are nevertheless
- * writable, but random TLB insert operations
- * will never use any of them. This can be
- * checked by writing to the wired register, which
- * sets the random register to the number of available
- * TLB entries.
- * As its value decreases with every instruction
- * executed, we use a combined write-then-read routine
- * which will return a number close enough to the
- * number of entries, so that any value larger than 48
- * means that there are 64 entries available
- * (in the current state of that code, the value will
- * be the number of entries, minus 2).
- */
- bootcpu_hwinfo.tlbsize = 48;
- if ((bootcpu_hwinfo.c0prid & 0xf0) >= 0x20) {
- /*
- * The whole 64 entries exist, although the last
- * 16 may not be used by the random placement
- * operations, as we are about to check; but we
- * need to make them invalid anyway.
- */
- tlb_set_wired(48);
- tlb_flush(64);
- if (tlb_set_wired_get_random(0) > 48)
- bootcpu_hwinfo.tlbsize = 64;
- }
- break;
-#endif
-#ifdef CPU_R10000
- case MIPS_R10000:
- case MIPS_R12000:
- case MIPS_R14000:
- bootcpu_hwinfo.tlbsize = 64;
- break;
-#endif
- default: /* R5000, RM52xx */
- bootcpu_hwinfo.tlbsize = 48;
- break;
- }
-
- /* Setup serial console if ARCS is telling us not to use video. */
- if (strncmp(bios_console, "video", 5) != 0) {
- comconsaddr = MACE_ISA_SER1_OFFS;
- comconsfreq = 1843200;
- comconsiot = &macebus_tag;
- comconsrate = bios_consrate;
- }
-
- /* not sure if there is a way to tell O2 and O2+ apart */
- hw_prod = "O2";
-
- _device_register = arcs_device_register;
-}
+++ /dev/null
-/* $OpenBSD: l1.c,v 1.11 2015/09/19 21:07:04 semarie Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Communication with the L1 controller, on IP35 systems.
- * We use a direct 57600 bps serial link from each processor to the L1 chip.
- * Information is sent as ppp-encoded packets.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-
-#include <machine/autoconf.h>
-#include <machine/mnode.h>
-#include <sgi/xbow/hub.h>
-
-#include <dev/ic/ns16550reg.h>
-#include <dev/ic/comreg.h>
-
-#include <net/ppp_defs.h>
-
-#include <sgi/sgi/ip27.h>
-#include <sgi/sgi/l1.h>
-
-/*
- * L1 communication defines
- */
-
-/* packet types */
-#define L1PKT_REQUEST 0x00
-#define L1PKT_RESPONSE 0x20
-#define L1PKT_EVENT 0x40
-
-/* packet subchannels */
-#define L1CH_CPU0 0x00 /* exclusive channel for cpu 0 */
-#define L1CH_CPU1 0x01 /* exclusive channel for cpu 1 */
-#define L1CH_CPU2 0x02 /* exclusive channel for cpu 2 */
-#define L1CH_CPU3 0x03 /* exclusive channel for cpu 3 */
-#define L1CH_CONSOLE 0x04 /* L1 console */
-/* 05..0f reserved */
-/* 10..1f available for operating system */
-#define L1CH_MISC 0x10
-
-/* argument encoding */
-#define L1_ARG_INT 0x00 /* followed by 32 bit BE value */
-#define L1_ARG_ASCII 0x01 /* followed by NUL terminated string */
-#define L1_ARG_BINARY 0x80 /* length in low 7 bits */
-
-int l1_serial_getc(int16_t);
-int l1_serial_putc(int16_t, u_char);
-int l1_serial_ppp_write(int16_t, uint16_t *, u_char, int);
-int l1_serial_ppp_read(int16_t, int);
-int l1_packet_put(int16_t, u_char *, size_t);
-int l1_packet_get(int16_t, u_char *, size_t);
-static inline
-void l1_packet_put_be32(u_char *, uint32_t);
-static inline
-void l1_packet_put_be16(u_char *, uint16_t);
-static inline
-uint32_t l1_packet_get_be32(u_char *);
-int l1_packet_get_int(u_char **, size_t *, uint32_t *);
-int l1_packet_get_ascii(u_char **, size_t *, char **);
-int l1_packet_get_binary(u_char **, size_t *, u_char **, size_t *);
-size_t l1_command_build(u_char *, size_t, uint32_t, uint16_t, int, ...);
-int l1_receive_response(int16_t, u_char *, size_t *);
-int l1_response_to_errno(uint32_t);
-int l1_read_board_ia(int16_t, int, u_char **, size_t *);
-
-static inline
-size_t ia_skip(u_char *, size_t, size_t);
-
-/* l1_packet_get() return values */
-#define L1PG_TIMEOUT -1
-#define L1PG_BADCRC -2
-#define L1PG_SHORTPACKET -3
-
-/*
- * Basic serial routines (polled)
- */
-
-#define L1_UART_ADDRESS(nasid, r) \
- IP27_RHSPEC_ADDR(nasid, HSPEC_L1_UART(r))
-
-int
-l1_serial_getc(int16_t nasid)
-{
- uint64_t lsr;
- int n;
-
- for (n = 1000000; n != 0; n--) {
- lsr = *(volatile uint64_t *)L1_UART_ADDRESS(nasid, com_lsr);
- if ((lsr & LSR_RXRDY) != 0)
- break;
- }
-
- if (n == 0) {
-#ifdef L1_DEBUG
- printf("%s: RX timeout, lsr %02llx\n", __func__, lsr);
-#endif
- return -1;
- }
-
- return *(volatile uint64_t *)L1_UART_ADDRESS(nasid, com_data) & 0xff;
-
-}
-
-int
-l1_serial_putc(int16_t nasid, u_char val)
-{
- uint64_t lsr;
- int n;
-
- for (n = 1000000; n != 0; n--) {
- lsr = *(volatile uint64_t *)L1_UART_ADDRESS(nasid, com_lsr);
- if ((lsr & LSR_TXRDY) != 0)
- break;
- }
-
- if (n == 0) {
-#ifdef L1_DEBUG
- printf("%s: TX timeout, lsr %02llx\n", __func__, lsr);
-#endif
- return EWOULDBLOCK;
- }
-
- *(volatile uint64_t *)L1_UART_ADDRESS(nasid, com_data) = (uint64_t)val;
- return 0;
-}
-
-/*
- * Single character routines, with optional ppp frame escaping, and optional
- * ppp crc update.
- */
-
-/*
- * FCS lookup table as calculated by genfcstab.
- * Straight from <net/ppp_tty.c>, only 512 bytes long; probably not worth
- * trying to share with outsmart config(8) machinery...
- */
-static const u_int16_t fcstab[256] = {
- 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
- 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
- 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
- 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
- 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
- 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
- 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
- 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
- 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
- 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
- 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
- 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
- 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
- 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
- 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
- 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
- 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
- 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
- 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
- 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
- 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
- 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
- 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
- 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
- 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
- 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
- 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
- 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
- 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
- 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
- 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
- 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
-};
-
-int
-l1_serial_ppp_write(int16_t nasid, uint16_t *crc, u_char data, int escape)
-{
- /* update crc if necessary */
- if (crc != NULL)
- *crc = PPP_FCS(*crc, data);
-
- /* escape data if necessary */
- if (escape && (data == PPP_FLAG || data == PPP_ESCAPE)) {
- if (l1_serial_putc(nasid, PPP_ESCAPE) != 0)
- return EWOULDBLOCK;
- data ^= PPP_TRANS;
- }
-
- return l1_serial_putc(nasid, data);
-}
-
-int
-l1_serial_ppp_read(int16_t nasid, int unescape)
-{
- int data;
-
- if ((data = l1_serial_getc(nasid)) < 0)
- return data;
-
- /* unescape data if necessary */
- if (unescape && data == PPP_ESCAPE) {
- if ((data = l1_serial_getc(nasid)) < 0)
- return data;
- data ^= PPP_TRANS;
- }
-
- return data;
-}
-
-/*
- * Complete ppp packet emission and reception.
- */
-
-int
-l1_packet_put(int16_t nasid, u_char *packet, size_t len)
-{
- uint16_t crc = PPP_INITFCS;
-
- /* send incoming packet flag */
- if (l1_serial_ppp_write(nasid, NULL, PPP_FLAG, 0) != 0)
- return EWOULDBLOCK;
-
- /* send packet data */
- while (len-- != 0)
- if (l1_serial_ppp_write(nasid, &crc, *packet++, 1) != 0)
- return EWOULDBLOCK;
-
- /* send crc */
- crc ^= PPP_INITFCS;
- if (l1_serial_ppp_write(nasid, NULL, crc & 0xff, 1) != 0)
- return EWOULDBLOCK;
- if (l1_serial_ppp_write(nasid, NULL, (crc >> 8) & 0xff, 1) != 0)
- return EWOULDBLOCK;
-
- /* send final packet byte flag */
- if (l1_serial_ppp_write(nasid, NULL, PPP_FLAG, 0) != 0)
- return EWOULDBLOCK;
-
- return 0;
-}
-
-int
-l1_packet_get(int16_t nasid, u_char *buf, size_t buflen)
-{
- uint16_t crc;
- size_t rcvlen;
- int data;
-
- /* wait for incoming packet flag */
- for (;;) {
- data = l1_serial_ppp_read(nasid, 0);
- if (data < 0)
- return L1PG_TIMEOUT;
- if (data == PPP_FLAG)
- break;
- }
-
- /* read packet */
- rcvlen = 0;
- crc = PPP_INITFCS;
- for (;;) {
- data = l1_serial_ppp_read(nasid, 1);
- if (data < 0)
- return L1PG_TIMEOUT;
- if (data == PPP_FLAG) /* end of packet */
- break;
- if (rcvlen < buflen)
- buf[rcvlen] = data;
- rcvlen++;
- crc = PPP_FCS(crc, data);
- }
-
- if (rcvlen < 2) {
-#ifdef L1_DEBUG
- printf("%s: short packet\n", __func__);
-#endif
- return L1PG_SHORTPACKET;
- }
-
- /* check CRC */
- rcvlen -= 2; /* crc bytes */
- if (crc != PPP_GOODFCS) {
-#ifdef L1_DEBUG
- printf("%s: CRC error (%04x)\n", __func__, crc);
-#endif
- return L1PG_BADCRC;
- }
-
- return rcvlen;
-}
-
-/*
- * L1 packet construction and deconstruction helpers
- */
-
-static inline void
-l1_packet_put_be32(u_char *buf, uint32_t data)
-{
- *buf++ = data >> 24;
- *buf++ = data >> 16;
- *buf++ = data >> 8;
- *buf++ = data;
-}
-
-static inline void
-l1_packet_put_be16(u_char *buf, uint16_t data)
-{
- *buf++ = data >> 8;
- *buf++ = data;
-}
-
-static inline uint32_t
-l1_packet_get_be32(u_char *buf)
-{
- uint32_t data;
-
- data = *buf++;
- data <<= 8;
- data |= *buf++;
- data <<= 8;
- data |= *buf++;
- data <<= 8;
- data |= *buf++;
-
- return data;
-}
-
-int
-l1_packet_get_int(u_char **buf, size_t *buflen, uint32_t *rval)
-{
- u_char *b = *buf;
-
- if (*buflen < 5)
- return EIO;
-
- if (*b++ != L1_ARG_INT)
- return EINVAL;
-
- *rval = l1_packet_get_be32(b);
-
- b += 4;
- *buf = b;
- *buflen -= 5;
-
- return 0;
-}
-
-int
-l1_packet_get_ascii(u_char **buf, size_t *buflen, char **rval)
-{
- u_char *b = *buf;
- u_char *s, *e;
-
- if (*buflen < 2)
- return EIO;
-
- if (*b != L1_ARG_ASCII)
- return EINVAL;
-
- /* check for a terminating NUL within the given bounds */
- e = b + *buflen;
- for (s = b + 1; s != e; s++)
- if (*s == '\0')
- break;
- if (s == e)
- return ENOMEM;
-
- *rval = (char *)b + 1;
-
- s++;
- *buflen -= s - b;
- *buf = s;
-
- return 0;
-}
-
-int
-l1_packet_get_binary(u_char **buf, size_t *buflen, u_char **rval, size_t *rlen)
-{
- u_char *b = *buf;
- size_t datalen;
-
- if (*buflen < 1)
- return EIO;
-
- if ((*b & L1_ARG_BINARY) == 0)
- return EINVAL;
-
- datalen = *b & ~L1_ARG_BINARY;
- if (*buflen < 1 + datalen)
- return ENOMEM;
-
- b++;
- *rval = b;
- *rlen = datalen;
- *buflen -= 1 + datalen;
- b += datalen;
- *buf = b;
-
- return 0;
-}
-
-/*
- * Build a whole request packet.
- */
-
-size_t
-l1_command_build(u_char *buf, size_t buflen, uint32_t address, uint16_t request,
- int nargs, ...)
-{
- va_list ap;
- uint32_t data;
- size_t len = 0;
- int argtype;
- const char *str;
-
- /*
- * Setup packet header (type, channel, address, request)
- */
-
- if (buflen >= 1) {
- *buf++ = L1PKT_REQUEST | L1CH_MISC;
- buflen--;
- }
- len++;
-
- if (buflen >= 4) {
- l1_packet_put_be32(buf, address);
- buf += 4;
- buflen -= 4;
- }
- len += 4;
-
- if (buflen >= 2) {
- l1_packet_put_be16(buf, request);
- buf += 2;
- buflen -= 2;
- }
- len += 2;
-
- /*
- * Setup command arguments
- */
-
- if (buflen >= 1) {
- *buf++ = nargs;
- buflen--;
- }
- len++;
-
- va_start(ap, nargs);
- while (nargs-- != 0) {
- argtype = va_arg(ap, int);
- switch (argtype) {
- case L1_ARG_INT:
- data = va_arg(ap, uint32_t);
- if (buflen >= 5) {
- *buf++ = L1_ARG_INT;
- l1_packet_put_be32(buf, data);
- buf += 4;
- buflen -= 5;
- }
- len += 5;
- break;
- case L1_ARG_ASCII:
- str = va_arg(ap, const char *);
- data = strlen(str);
- if (buflen >= data + 2) {
- *buf++ = L1_ARG_ASCII;
- memcpy(buf, str, data + 1);
- buf += data + 1;
- buflen -= data + 2;
- }
- len += data + 2;
- break;
- case L1_ARG_BINARY:
- data = (uint32_t)va_arg(ap, size_t); /* size */
- str = va_arg(ap, const char *); /* data */
- if (buflen >= 1 + data) {
- *buf++ = L1_ARG_BINARY | data;
- memcpy(buf, str, data);
- buf += data;
- buflen -= data + 1;
- }
- len += data + 1;
- break;
- }
- }
- va_end(ap);
-
- return len;
-}
-
-/*
- * Get a packet response, ignoring any other packet seen in between.
- * Note that despite being the only user of L1 in the kernel, we may
- * receive event packets from the console.
- */
-int
-l1_receive_response(int16_t nasid, u_char *pkt, size_t *pktlen)
-{
- int rc;
-
- for (;;) {
- rc = l1_packet_get(nasid, pkt, *pktlen);
- if (rc == L1PG_TIMEOUT)
- return EWOULDBLOCK;
-
- if (rc < 0) /* bad packet */
- continue;
-
- if (pkt[0] != (L1PKT_RESPONSE | L1CH_MISC)) {
-#ifdef L1_DEBUG
- printf("unexpected L1 packet: head %02x\n", pkt[0]);
-#endif
- continue; /* it's not our response */
- }
-
- *pktlen = (size_t)rc;
- return 0;
- }
-}
-
-/*
- * Process a response code.
- */
-int
-l1_response_to_errno(uint32_t response)
-{
- int rc;
-
- switch (response) {
- case L1_RESP_OK:
- rc = 0;
- break;
- case L1_RESP_INVAL:
- rc = EINVAL;
- break;
- case L1_RESP_NXDATA:
- rc = ENXIO;
- break;
- default:
-#ifdef L1_DEBUG
- printf("unexpected L1 response code: %08x\n", response);
-#endif
- rc = EIO;
- break;
- }
-
- return rc;
-}
-
-/*
- * Read a board IA information record from EEPROM
- */
-
-#define EEPROM_CHUNK 0x40
-
-int
-l1_read_board_ia(int16_t nasid, int type, u_char **ria, size_t *rialen)
-{
- u_char pkt[64 + EEPROM_CHUNK]; /* command and response packet buffer */
- u_char *pktbuf, *chunk, *ia = NULL;
- size_t pktlen, chunklen, ialen, iapos;
- uint32_t data;
- int rc;
-
- /*
- * Build a first packet, asking for 0 bytes to be read.
- */
- pktlen = l1_command_build(pkt, sizeof pkt,
- L1_ADDRESS(type, L1_ADDRESS_LOCAL | L1_TASK_GENERAL),
- L1_REQ_EEPROM, 4,
- L1_ARG_INT, (uint32_t)L1_EEP_LOGIC,
- L1_ARG_INT, (uint32_t)L1_EEP_BOARD,
- L1_ARG_INT, (uint32_t)0, /* offset */
- L1_ARG_INT, (uint32_t)0); /* size */
- if (pktlen > sizeof pkt) {
-#ifdef DIAGNOSTIC
- panic("%s: L1 command packet too large (%zu) for buffer",
- __func__, pktlen);
-#endif
- return ENOMEM;
- }
-
- if (l1_packet_put(nasid, pkt, pktlen) != 0)
- return EWOULDBLOCK;
-
- pktlen = sizeof pkt;
- if (l1_receive_response(nasid, pkt, &pktlen) != 0)
- return EWOULDBLOCK;
-
- if (pktlen < 6) {
-#ifdef L1_DEBUG
- printf("truncated response (length %zu)\n", pktlen);
-#endif
- return EIO;
- }
-
- /*
- * Check the response code.
- */
-
- data = l1_packet_get_be32(&pkt[1]);
- rc = l1_response_to_errno(data);
- if (rc != 0)
- return rc;
-
- /*
- * EEPROM read commands should return either one or two values:
- * the first value is the size of the remaining EEPROM data, and
- * the second value is the data read itself, if we asked for a
- * nonzero size in the command (that size might be shorter than
- * the data we asked for).
- */
-
- if (pkt[5] != 1) {
-#ifdef L1_DEBUG
- printf("unexpected L1 response: %d values\n", pkt[5]);
-#endif
- return EIO;
- }
-
- pktbuf = pkt + 6;
- pktlen -= 6;
-
- if (l1_packet_get_int(&pktbuf, &pktlen, &data) != 0) {
-#ifdef L1_DEBUG
- printf("unable to parse response as integer\n");
-#endif
- return EIO;
- }
-
- /*
- * Now that we know the size of the IA entry, allocate memory for it.
- */
-
- ialen = (size_t)data;
- ia = (u_char *)malloc(ialen, M_DEVBUF, M_NOWAIT);
- if (ia == NULL)
- return ENOMEM;
-
- /*
- * Read the EEPROM contents in small chunks, so as not to keep L1
- * busy for too long.
- */
-
- iapos = 0;
- while (iapos < ialen) {
- /*
- * Build a command packet, this time actually reading data.
- */
- pktlen = l1_command_build(pkt, sizeof pkt,
- L1_ADDRESS(type, L1_ADDRESS_LOCAL | L1_TASK_GENERAL),
- L1_REQ_EEPROM, 4,
- L1_ARG_INT, (uint32_t)L1_EEP_LOGIC,
- L1_ARG_INT, (uint32_t)L1_EEP_BOARD,
- L1_ARG_INT, (uint32_t)iapos,
- L1_ARG_INT, (uint32_t)EEPROM_CHUNK);
- /* no need to check size again, it's the same size as earlier */
-
- if (l1_packet_put(nasid, pkt, pktlen) != 0) {
- rc = EWOULDBLOCK;
- goto fail;
- }
-
- pktlen = sizeof pkt;
- if (l1_receive_response(nasid, pkt, &pktlen) != 0) {
- rc = EWOULDBLOCK;
- goto fail;
- }
-
- if (pktlen < 6) {
-#ifdef L1_DEBUG
- printf("truncated response (length %zu)\n", pktlen);
-#endif
- rc = EIO;
- goto fail;
- }
-
- /*
- * Check the response code.
- */
-
- data = l1_packet_get_be32(&pkt[1]);
- rc = l1_response_to_errno(data);
- if (rc != 0)
- goto fail;
-
- if (pkt[5] != 2) {
-#ifdef L1_DEBUG
- printf("unexpected L1 response: %d values\n", pkt[5]);
-#endif
- rc = EIO;
- goto fail;
- }
-
- pktbuf = pkt + 6;
- pktlen -= 6;
-
- if (l1_packet_get_int(&pktbuf, &pktlen, &data) != 0) {
-#ifdef L1_DEBUG
- printf("unable to parse first response as integer\n");
-#endif
- rc = EIO;
- goto fail;
- }
-
- if (l1_packet_get_binary(&pktbuf, &pktlen,
- &chunk, &chunklen) != 0) {
-#ifdef L1_DEBUG
- printf("unable to parse second response as binary\n");
-#endif
- rc = EIO;
- goto fail;
- }
-
- /* should not happen, but we don't like infinite loops */
- if (chunklen == 0) {
-#ifdef L1_DEBUG
- printf("read command returned 0 bytes\n");
-#endif
- rc = EIO;
- goto fail;
- }
-
- memcpy(ia + iapos, chunk, chunklen);
- iapos += chunklen;
-#ifdef L1_DEBUG
- printf("got %02zx bytes of eeprom, %zx/%zx\n",
- chunklen, iapos, ialen);
-#endif
- }
-
- /*
- * Verify the checksum
- */
-
- chunk = ia;
- iapos = ialen;
- data = 0;
- while (iapos-- != 0)
- data += *chunk++;
- if ((data & 0xff) != 0) {
-#ifdef L1_DEBUG
- printf("wrong IA checksum\n");
-#endif
- rc = EINVAL;
- goto fail;
- }
-
- *ria = ia;
- *rialen = ialen;
- return 0;
-
-fail:
- free(ia, M_DEVBUF, ialen);
- return rc;
-}
-
-/*
- * Information Area (IA) decoding helpers
- *
- * The format of an Information Area is as follows:
- * B format byte (00)
- * B length in 8 byte units
- * B language (00 = english)
- * 3B manufacturing date, minutes since 1/1/1996
- * B type/length of manufacturer name string (up to 20 chars)
- * #B manufacturer name
- * B type/length of product name string (up to 14 chars)
- * #B product name
- * B type/length of serial number (up to 6 chars)
- * #B serial number
- * B type/length of part number (up to 10 chars)
- * #B part number
- * B FRU file id
- * B type/length of board rev (always 0xC2)
- * 2B board revision
- * B type/length of eeprom size field (0x01)
- * 1B size code for eeprom (02)
- * B type/length of temp waiver field (0xC2)
- * 2B temp waiver
- *
- * and then in main boards only:
- * G, P and Y encryption keys, each being
- * B type/length (0x04)
- * 4B key
- *
- * and then on main boards being I-Bricks only:
- * B type/length of mac address (as ascii string)
- * 12B mac address
- * followed by IEEE1394 configuration info, as type/length followed
- * by data again.
- *
- * A 0xC1 byte is the EOF record, and the last byte is a checksum.
- *
- * Type/length encoding is done as follows:
- * bits 7-6 are the type:
- * 00 binary data
- * 01 BCD
- * 02 packed 6 bit ascii
- * 03 regular 8 bit ascii
- * bits 5-0 are the length.
- */
-
-#define IA_TYPE_SHIFT 6
-#define IA_TYPE_BINARY 0
-#define IA_TYPE_BCD 1
-#define IA_TYPE_PACKED 2
-#define IA_TYPE_ASCII 3
-#define IA_LENGTH_MASK 0x3f
-
-#define IA_TL(t,l) (((t) << IA_TYPE_SHIFT) | (l))
-
-#define IA_EOF IA_TL(IA_TYPE_ASCII, 1)
-
-static inline size_t
-ia_skip(u_char *ia, size_t iapos, size_t ialen)
-{
- size_t npos;
-
- ia += iapos;
-
- /* don't go past EOF marker */
- if (*ia == IA_EOF)
- return iapos;
-
- npos = iapos + 1 + (*ia & IA_LENGTH_MASK);
- return npos >= ialen ? iapos : npos;
-}
-
-int
-l1_get_brick_ethernet_address(int16_t nasid, uint8_t *enaddr)
-{
- u_char *ia;
- size_t iapos, ialen;
- char hexaddr[18], *d, *s;
- int type;
- int rc;
-
- /*
- * If we are running on a C-Brick, the Ethernet address is stored
- * in the matching I-Brick.
- */
- if (sys_config.system_subtype == IP35_CBRICK)
- type = L1_TYPE_IOBRICK;
- else
- type = L1_TYPE_L1;
-
- /* read the Board IA of this node */
- rc = l1_read_board_ia(nasid, type, &ia, &ialen);
- if (rc != 0)
- return rc;
-
- /* simple sanity checks */
- if (ia[0] != 0 || ia[1] < 2 || ia[1] * 8UL > ialen) {
- rc = EINVAL;
- goto out;
- }
-
- /* skip fixed part */
- iapos = 6;
- /* skip 4 records */
- iapos = ia_skip(ia, iapos, ialen);
- iapos = ia_skip(ia, iapos, ialen);
- iapos = ia_skip(ia, iapos, ialen);
- iapos = ia_skip(ia, iapos, ialen);
- /* skip FRU */
- if (iapos < ialen - 1)
- iapos++;
- /* skip 3 records */
- iapos = ia_skip(ia, iapos, ialen);
- iapos = ia_skip(ia, iapos, ialen);
- iapos = ia_skip(ia, iapos, ialen);
- /* skip encryption key records if applicable */
- if (iapos < ialen && ia[iapos] == IA_TL(IA_TYPE_BINARY, 4)) {
- iapos = ia_skip(ia, iapos, ialen);
- iapos = ia_skip(ia, iapos, ialen);
- iapos = ia_skip(ia, iapos, ialen);
- }
- /* check the next record looks like an Ethernet address */
- if (iapos >= ialen - 1 - 12 || ia[iapos] != IA_TL(IA_TYPE_ASCII, 12)) {
- rc = EINVAL;
- goto out;
- }
-
- iapos++;
- s = (char *)ia + iapos;
- d = hexaddr;
- *d++ = *s++; *d++ = *s++; *d++ = ':';
- *d++ = *s++; *d++ = *s++; *d++ = ':';
- *d++ = *s++; *d++ = *s++; *d++ = ':';
- *d++ = *s++; *d++ = *s++; *d++ = ':';
- *d++ = *s++; *d++ = *s++; *d++ = ':';
- *d++ = *s++; *d++ = *s++; *d++ = '\0';
- enaddr_aton(hexaddr, enaddr);
-
-out:
- free(ia, M_DEVBUF, ialen);
- return rc;
-}
-
-/*
- * Issue an arbitrary L1 command.
- */
-int
-l1_exec_command(int16_t nasid, const char *cmd)
-{
- u_char pkt[64 + 64]; /* command and response packet buffer */
- size_t pktlen;
- uint32_t data;
- int rc;
-
- /*
- * Build the command packet.
- */
- pktlen = l1_command_build(pkt, sizeof pkt,
- L1_ADDRESS(L1_TYPE_L1, L1_ADDRESS_LOCAL | L1_TASK_COMMAND),
- L1_REQ_EXEC_CMD, 1,
- L1_ARG_ASCII, cmd);
- if (pktlen > sizeof pkt) {
-#ifdef DIAGNOSTIC
- panic("%s: L1 command packet too large (%zu) for buffer",
- __func__, pktlen);
-#endif
- return ENOMEM;
- }
-
- if (l1_packet_put(nasid, pkt, pktlen) != 0)
- return EWOULDBLOCK;
-
- pktlen = sizeof pkt;
- if (l1_receive_response(nasid, pkt, &pktlen) != 0)
- return EWOULDBLOCK;
-
- if (pktlen < 6) {
-#ifdef L1_DEBUG
- printf("truncated response (length %zu)\n", pktlen);
-#endif
- return EIO;
- }
-
- /*
- * Check the response code.
- */
-
- data = l1_packet_get_be32(&pkt[1]);
- rc = l1_response_to_errno(data);
- if (rc != 0)
- return rc;
-
- /*
- * We do not expect anything in return.
- */
-
- if (pkt[5] != 0) {
-#ifdef L1_DEBUG
- printf("unexpected L1 response: %d values\n", pkt[5]);
-#endif
- return EIO;
- }
-
- return 0;
-}
-
-/*
- * Get a DIMM SPD record.
- */
-
-int
-l1_get_brick_spd_record(int16_t nasid, int dimm, u_char **rspd, size_t *rspdlen)
-{
- u_char pkt[64 + EEPROM_CHUNK]; /* command and response packet buffer */
- u_char *pktbuf, *chunk, *spd = NULL;
- size_t pktlen, chunklen, spdlen, spdpos;
- uint32_t address, data;
- int rc;
-
- /*
- * The L1 address of SPD records differs between Fuel and Origin 350
- * systems. This is likely because the Fuel is a single-PIMM system,
- * while all other IP35 are dual-PIMM, and thus carry one more PIMM
- * record at a lower address (and are interleaving DIMM accesses).
- * Since Fuel is also a single-node system, we can safely check for
- * the system subtype to decide which address to use.
- */
- switch (sys_config.system_subtype) {
- case IP35_FUEL:
- address = L1_EEP_DIMM_NOINTERLEAVE(dimm);
- break;
- case IP35_CBRICK:
- address = L1_EEP_DIMM_INTERLEAVE(L1_EEP_DIMM_BASE_CBRICK, dimm);
- break;
- default:
- address =
- L1_EEP_DIMM_INTERLEAVE(L1_EEP_DIMM_BASE_CHIMERA, dimm);
- break;
- }
-
- /*
- * Build a first packet, asking for 0 bytes to be read.
- */
- pktlen = l1_command_build(pkt, sizeof pkt,
- L1_ADDRESS(L1_TYPE_L1, L1_ADDRESS_LOCAL | L1_TASK_GENERAL),
- L1_REQ_EEPROM, 4,
- L1_ARG_INT, address,
- L1_ARG_INT, (uint32_t)L1_EEP_SPD,
- L1_ARG_INT, (uint32_t)0, /* offset */
- L1_ARG_INT, (uint32_t)0); /* size */
- if (pktlen > sizeof pkt) {
-#ifdef DIAGNOSTIC
- panic("%s: L1 command packet too large (%zu) for buffer",
- __func__, pktlen);
-#endif
- return ENOMEM;
- }
-
- if (l1_packet_put(nasid, pkt, pktlen) != 0)
- return EWOULDBLOCK;
-
- pktlen = sizeof pkt;
- if (l1_receive_response(nasid, pkt, &pktlen) != 0)
- return EWOULDBLOCK;
-
- if (pktlen < 6) {
-#ifdef L1_DEBUG
- printf("truncated response (length %zu)\n", pktlen);
-#endif
- return EIO;
- }
-
- /*
- * Check the response code.
- */
-
- data = l1_packet_get_be32(&pkt[1]);
- rc = l1_response_to_errno(data);
- if (rc != 0)
- return rc;
-
- /*
- * EEPROM read commands should return either one or two values:
- * the first value is the size of the remaining EEPROM data, and
- * the second value is the data read itself, if we asked for a
- * nonzero size in the command (that size might be shorter than
- * the data we asked for).
- */
-
- if (pkt[5] != 1) {
-#ifdef L1_DEBUG
- printf("unexpected L1 response: %d values\n", pkt[5]);
-#endif
- return EIO;
- }
-
- pktbuf = pkt + 6;
- pktlen -= 6;
-
- if (l1_packet_get_int(&pktbuf, &pktlen, &data) != 0) {
-#ifdef L1_DEBUG
- printf("unable to parse response as integer\n");
-#endif
- return EIO;
- }
-
- /*
- * Now that we know the size of the spd record, allocate memory for it.
- */
-
- spdlen = (size_t)data;
- spd = (u_char *)malloc(spdlen, M_DEVBUF, M_NOWAIT);
- if (spd == NULL)
- return ENOMEM;
-
- /*
- * Read the EEPROM contents in small chunks, so as not to keep L1
- * busy for too long.
- */
-
- spdpos = 0;
- while (spdpos < spdlen) {
- /*
- * Build a command packet, this time actually reading data.
- */
- pktlen = l1_command_build(pkt, sizeof pkt,
- L1_ADDRESS(L1_TYPE_L1, L1_ADDRESS_LOCAL | L1_TASK_GENERAL),
- L1_REQ_EEPROM, 4,
- L1_ARG_INT, address,
- L1_ARG_INT, (uint32_t)L1_EEP_SPD,
- L1_ARG_INT, (uint32_t)spdpos,
- L1_ARG_INT, (uint32_t)EEPROM_CHUNK);
- /* no need to check size again, it's the same size as earlier */
-
- if (l1_packet_put(nasid, pkt, pktlen) != 0) {
- rc = EWOULDBLOCK;
- goto fail;
- }
-
- pktlen = sizeof pkt;
- if (l1_receive_response(nasid, pkt, &pktlen) != 0) {
- rc = EWOULDBLOCK;
- goto fail;
- }
-
- if (pktlen < 6) {
-#ifdef L1_DEBUG
- printf("truncated response (length %zu)\n", pktlen);
-#endif
- rc = EIO;
- goto fail;
- }
-
- /*
- * Check the response code.
- */
-
- data = l1_packet_get_be32(&pkt[1]);
- rc = l1_response_to_errno(data);
- if (rc != 0)
- goto fail;
-
- if (pkt[5] != 2) {
-#ifdef L1_DEBUG
- printf("unexpected L1 response: %d values\n", pkt[5]);
-#endif
- rc = EIO;
- goto fail;
- }
-
- pktbuf = pkt + 6;
- pktlen -= 6;
-
- if (l1_packet_get_int(&pktbuf, &pktlen, &data) != 0) {
-#ifdef L1_DEBUG
- printf("unable to parse first response as integer\n");
-#endif
- rc = EIO;
- goto fail;
- }
-
- if (l1_packet_get_binary(&pktbuf, &pktlen,
- &chunk, &chunklen) != 0) {
-#ifdef L1_DEBUG
- printf("unable to parse second response as binary\n");
-#endif
- rc = EIO;
- goto fail;
- }
-
- /* should not happen, but we don't like infinite loops */
- if (chunklen == 0) {
-#ifdef L1_DEBUG
- printf("read command returned 0 bytes\n");
-#endif
- rc = EIO;
- goto fail;
- }
-
- memcpy(spd + spdpos, chunk, chunklen);
- spdpos += chunklen;
-#ifdef L1_DEBUG
- printf("got %02zx bytes of eeprom, %zx/%zx\n",
- chunklen, spdpos, spdlen);
-#endif
- }
-
- *rspd = spd;
- *rspdlen = spdlen;
- return 0;
-
-fail:
- free(spd, M_DEVBUF, spdlen);
- return rc;
-}
-
-int
-l1_display(int16_t nasid, int down, const char *message)
-{
- char line[1 + 12];
- u_char pkt[64]; /* command packet buffer */
- size_t pktlen;
- uint32_t data;
- int rc;
-
- if (sys_config.system_subtype == IP35_FUEL)
- return ENXIO;
-
- /* pad the line with spaces and truncate at 12 chars */
- (void)snprintf(line, sizeof line, "%s ", message);
-
- /*
- * Build the command packet.
- */
- pktlen = l1_command_build(pkt, sizeof pkt,
- L1_ADDRESS(L1_TYPE_L1, L1_ADDRESS_LOCAL | L1_TASK_GENERAL),
- down ? L1_REQ_DISP2 : L1_REQ_DISP1, 1,
- L1_ARG_ASCII, line);
- if (pktlen > sizeof pkt) {
-#ifdef DIAGNOSTIC
- panic("%s: L1 command packet too large (%zu) for buffer",
- __func__, pktlen);
-#endif
- return ENOMEM;
- }
-
- if (l1_packet_put(nasid, pkt, pktlen) != 0)
- return EWOULDBLOCK;
-
- pktlen = sizeof pkt;
- if (l1_receive_response(nasid, pkt, &pktlen) != 0)
- return EWOULDBLOCK;
-
- if (pktlen < 6) {
-#ifdef L1_DEBUG
- printf("truncated response (length %zu)\n", pktlen);
-#endif
- return EIO;
- }
-
- /*
- * Check the response code.
- */
-
- data = l1_packet_get_be32(&pkt[1]);
- rc = l1_response_to_errno(data);
- if (rc != 0)
- return rc;
-
- /*
- * We do not expect anything in return.
- */
-
- if (pkt[5] != 0) {
-#ifdef L1_DEBUG
- printf("unexpected L1 response: %d values\n", pkt[5]);
-#endif
- return EIO;
- }
-
- return 0;
-}
+++ /dev/null
-/* $OpenBSD: l1.h,v 1.6 2014/11/25 19:08:42 miod Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * High-level L1 communication defines
- */
-
-/* L1 command types and destination addresses */
-#define L1_ADDRESS(type,addr) (((type) << 28) | (addr))
-
-#define L1_TYPE_L1 0x00
-#define L1_TYPE_L2 0x01
-#define L1_TYPE_L3 0x02
-#define L1_TYPE_CBRICK 0x03
-#define L1_TYPE_IOBRICK 0x04
-
-#define L1_ADDRESS_RACK_MASK 0x0ffc0000
-#define L1_ADDRESS_RACK_SHIFT 18
-#define L1_ADDRESS_RACK_LOCAL 0x3ff
-#define L1_ADDRESS_BAY_MASK 0x0003f000
-#define L1_ADDRESS_BAY_SHIFT 12
-#define L1_ADDRESS_BAY_LOCAL 0x3f
-#define L1_ADDRESS_TASK_MASK 0x0000001f
-#define L1_ADDRESS_TASK_SHIFT 0
-
-#define L1_ADDRESS_LOCAL \
- ((L1_ADDRESS_RACK_LOCAL << L1_ADDRESS_RACK_SHIFT) | \
- (L1_ADDRESS_BAY_LOCAL << L1_ADDRESS_BAY_SHIFT))
-
-#define L1_TASK_INVALID 0x00
-#define L1_TASK_ROUTER 0x01
-#define L1_TASK_SYSMGMT 0x02
-#define L1_TASK_COMMAND 0x03
-#define L1_TASK_ENVIRONMENT 0x04
-#define L1_TASK_BEDROCK 0x05
-#define L1_TASK_GENERAL 0x06
-
-/* response codes */
-#define L1_RESP_OK ((uint32_t)0)
-#define L1_RESP_NXDATA ((uint32_t)-0x68)
-#define L1_RESP_INVAL ((uint32_t)-0x6b)
-
-/*
- * Various commands (very incomplete list)
- */
-
-/* L1_TASK_COMMAND requests */
-#define L1_REQ_EXEC_CMD 0x0000 /* interpret plaintext command */
-
-/* L1_TASK_GENERAL requests */
-#define L1_REQ_EEPROM 0x0006 /* access eeprom */
-#define L1_REQ_DISP1 0x1004 /* display text on LCD first line */
-#define L1_REQ_DISP2 0x1005 /* display text on LCD second line */
-
-/* L1_REQ_EEPROM additional argument value */
-/* non C-brick component */
-#define L1_EEP_POWER 0x00 /* power board */
-#define L1_EEP_LOGIC 0x01 /* logic board */
-/* C-brick component */
-#define L1_EEP_DIMM_NOINTERLEAVE_BASE 0x04
-#define L1_EEP_DIMM_BASE_CBRICK 0x03
-#define L1_EEP_DIMM_BASE_CHIMERA 0x05
-#define L1_EEP_DIMM_NOINTERLEAVE(dimm) \
- (L1_EEP_DIMM_NOINTERLEAVE_BASE + (dimm))
-#define L1_EEP_DIMM_INTERLEAVE(base, dimm) \
- ((base) + ((dimm) >> 1) + ((dimm) & 0x01 ? 4 : 0))
-/* ia code */
-#define L1_EEP_CHASSIS 0x01 /* chassis ia */
-#define L1_EEP_BOARD 0x02 /* board ia */
-#define L1_EEP_IUSE 0x03 /* internal use ia */
-#define L1_EEP_SPD 0x04 /* spd record */
-
-#define L1_SPD_DIMM_MAX 8
-
-struct spdmem_attach_args {
- struct mainbus_attach_args maa;
- int dimm;
-};
-
-int l1_display(int16_t, int, const char *);
-int l1_exec_command(int16_t, const char *);
-int l1_get_brick_ethernet_address(int16_t, uint8_t *);
-int l1_get_brick_spd_record(int16_t, int, u_char **, size_t *);
+++ /dev/null
-/* $OpenBSD: locore.S,v 1.20 2021/02/11 14:44:14 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include <sys/errno.h>
-#include <sys/syscall.h>
-
-#include <machine/param.h>
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/regnum.h>
-#include <machine/cpustate.h>
-
-#include "assym.h"
-
- .set mips3
- .set noreorder # Noreorder is default style!
-
- .globl locore_start
- .ent locore_start, 0
-locore_start:
- MFC0 v0, COP_0_STATUS_REG
- LI v1, ~SR_INT_ENAB
- and v0, v1
- MTC0 v0, COP_0_STATUS_REG # disable all interrupts
- MTC0_SR_IE_HAZARD
- MTC0 zero, COP_0_CAUSE_REG # Clear soft interrupts
- MTC0_HAZARD
-
- /*
- * Initialize stack and call machine startup.
- */
- LA sp, start - FRAMESZ(CF_SZ)
- jal mips_init # mips_init(argc, argv, envp)
- PTR_S zero, CF_RA_OFFS(sp) # Zero out old ra for debugger
-
- move sp, v0 # switch to new stack
- jal main # main(regs)
- move a0, zero
- PANIC("Startup failed!")
- .end locore_start
-
-#if defined(MULTIPROCESSOR)
-LEAF(hw_cpu_spinup_trampoline, 0)
- MFC0 v0, COP_0_STATUS_REG
- LI v1, ~SR_INT_ENAB
- and v0, v1
- ori v0, SR_KX | SR_UX
- MTC0 v0, COP_0_STATUS_REG # disable all interrupts
- MTC0 zero, COP_0_CAUSE_REG # Clear soft interrupts
- jal hw_cpu_hatch
- NOP
-END(hw_cpu_spinup_trampoline)
-
-#if defined(TGT_OCTANE)
-
-LEAF(hw_getcurcpu, 0)
- GET_CPU_INFO(v0, v1)
- j ra
- NOP
-END(hw_getcurcpu)
-
-/*
- * There does not seem to be any fast way to store the curcpu pointer on
- * Octane. We used to abuse the LLAddr register, but this is a 32-bit register,
- * not suitable for allocation over 2GB physical.
- * Instead, we will use an unused field of the MPCONF structure.
- */
-LEAF(hw_setcurcpu, 0)
- HW_GET_CPU_PRID(v0, v1) # get physical processor ID
- LOAD_XKPHYS(v1, CCA_COHERENT_EXCLWRITE)
- PTR_SLL v0, MPCONF_SHIFT
- PTR_ADD v0, MPCONF_BASE
- or v1, v0
- j ra
- PTR_S a0, (MPCONF_LEN - REGSZ)(v1)
-END(hw_setcurcpu)
-
-#elif defined(TGT_ORIGIN)
-
-LEAF(hw_getcurcpu, 0)
- GET_CPU_INFO(v0, v1)
- j ra
- NOP
-END(hw_getcurcpu)
-
-LEAF(hw_setcurcpu, 0)
- DMTC0 a0, COP_0_ERROR_PC
- j ra
- NOP
-END(hw_setcurcpu)
-
-LEAF(ip27_cpu_spinup_trampoline, 0)
- MFC0 v0, COP_0_STATUS_REG
- LI v1, ~SR_INT_ENAB
- and v0, v1
- MTC0 v0, COP_0_STATUS_REG # Disable all interrupts.
- MTC0 zero, COP_0_CAUSE_REG # Clear soft interrupts.
-
- /* Wait the turn of this CPU. */
- LA v1, ip27_spinup_turn
-1: ll v0, 0(v1)
- bne v0, a0, 1b
- not v0, zero
- sc v0, 0(v1)
- beqz v0, 1b
- nop
-
- LA v0, ip27_spinup_a0
- ld a0, 0(v0)
- LA v0, ip27_spinup_sp
- ld sp, 0(v0)
- jal hw_cpu_hatch
- nop
- PANIC("secondary CPU start failed")
-END(ip27_cpu_spinup_trampoline)
-
-#endif /* TGT_ORIGIN */
-
-#endif /* MULTIPROCESSOR */
+++ /dev/null
-/* $OpenBSD: locore0.S,v 1.1 2017/06/08 11:47:25 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <machine/param.h>
-#include <machine/asm.h>
-
-#include "assym.h"
-
- .set mips3
- .set noreorder # Noreorder is default style!
-
- .globl kernel_text
- .globl start
- .ent start, 0
-kernel_text = start
-start:
- /*
- * On at least the O2, when netbooting the bsd.rd kernel, the
- * kernel image gets loaded in CKSEG1, which causes the kernel
- * text to be uncached. Just to be on the safe side, jump to
- * our intended execution address.
- */
- LA v0, 1f
- jr v0
- NOP
-1:
- j locore_start
- NOP
- .end start
+++ /dev/null
-/* $OpenBSD: machdep.c,v 1.164 2020/08/26 03:29:06 visa Exp $ */
-
-/*
- * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/buf.h>
-#include <sys/reboot.h>
-#include <sys/conf.h>
-#include <sys/msgbuf.h>
-#include <sys/user.h>
-#include <sys/exec.h>
-#include <sys/sysctl.h>
-#include <sys/mount.h>
-#include <sys/syscallargs.h>
-#include <sys/exec_elf.h>
-#ifdef SYSVSHM
-#include <sys/shm.h>
-#endif
-#ifdef SYSVSEM
-#include <sys/sem.h>
-#endif
-
-#include <net/if.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <machine/db_machdep.h>
-#include <ddb/db_interface.h>
-
-#include <mips64/cache.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/frame.h>
-#include <machine/autoconf.h>
-#include <machine/memconf.h>
-#include <machine/regnum.h>
-#ifdef TGT_ORIGIN
-#include <machine/mnode.h>
-#endif
-#if defined(TGT_INDY) || defined(TGT_INDIGO2)
-CACHE_PROTOS(ip22)
-#endif
-#ifdef TGT_INDIGO2
-CACHE_PROTOS(tcc)
-#endif
-
-#include <dev/cons.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-#include <machine/bus.h>
-
-extern char kernel_text[];
-extern bus_addr_t comconsaddr;
-
-/* The following is used externally (sysctl_hw) */
-char machine[] = MACHINE; /* Machine "architecture" */
-char cpu_model[30];
-
-/* will be updated in ipXX_machdep.c whenever necessary */
-struct uvm_constraint_range dma_constraint = { 0x0, (paddr_t)-1 };
-struct uvm_constraint_range *uvm_md_constraints[] = {
- &dma_constraint,
- NULL
-};
-
-vm_map_t exec_map;
-vm_map_t phys_map;
-
-/*
- * safepri is a safe priority for sleep to set for a spin-wait
- * during autoconfiguration or after a panic.
- */
-int safepri = 0;
-
-caddr_t msgbufbase;
-
-int physmem; /* Max supported memory, changes to actual. */
-int rsvdmem; /* Reserved memory not usable. */
-int ncpu = 1; /* At least one CPU in the system. */
-struct user *proc0paddr;
-int console_ok; /* Set when console initialized. */
-int16_t masternasid;
-
-int32_t *environment;
-struct sys_rec sys_config;
-struct cpu_hwinfo bootcpu_hwinfo;
-
-/* Pointers to the start and end of the symbol table. */
-caddr_t ssym;
-caddr_t esym;
-caddr_t ekern;
-
-struct phys_mem_desc mem_layout[MAXMEMSEGS];
-
-caddr_t mips_init(int, void *, caddr_t);
-void dumpsys(void);
-void dumpconf(void);
-
-static void dobootopts(int, void *);
-
-int is_memory_range(paddr_t, psize_t, psize_t);
-
-void (*md_halt)(int) = arcbios_halt;
-
-int sgi_cpuspeed(int *);
-
-/*
- * Do all the stuff that locore normally does before calling main().
- * Reset mapping and set up mapping to hardware and init "wired" reg.
- */
-
-caddr_t
-mips_init(int argc, void *argv, caddr_t boot_esym)
-{
- char *cp;
- int i, guessed;
- u_int cpufamily;
- struct cpu_info *ci;
- extern char start[], edata[], end[];
-#ifndef CPU_R8000
- extern char cache_err[], exception[], e_exception[];
- vaddr_t xtlb_handler;
-#endif
-
-#ifdef MULTIPROCESSOR
- /*
- * Set curcpu address on primary processor.
- */
- setcurcpu(&cpu_info_primary);
-#endif
-
- ci = curcpu();
-
- /*
- * Make sure we can access the extended address space.
- * Note that r10k and later do not allow XUSEG accesses
- * from kernel mode unless SR_UX is set.
- */
- setsr(getsr() | SR_KX | SR_UX);
-
- /*
- * Clear the compiled BSS segment in OpenBSD code.
- */
- bzero(edata, end - edata);
-
- /*
- * Reserve space for the symbol table, if it exists.
- */
- ssym = (char *)*(u_int64_t *)end;
-
- /* Attempt to locate ELF header and symbol table after kernel. */
- if (end[0] == ELFMAG0 && end[1] == ELFMAG1 &&
- end[2] == ELFMAG2 && end[3] == ELFMAG3 ) {
-
- /* ELF header exists directly after kernel. */
- ssym = end;
- esym = boot_esym;
- ekern = esym;
-
- } else if (((long)ssym - (long)end) >= 0 &&
- ((long)ssym - (long)end) <= 0x1000 &&
- ssym[0] == ELFMAG0 && ssym[1] == ELFMAG1 &&
- ssym[2] == ELFMAG2 && ssym[3] == ELFMAG3 ) {
-
- /* Pointers exist directly after kernel. */
- esym = (char *)*((u_int64_t *)end + 1);
- ekern = esym;
-
- } else {
-
- /* Pointers aren't setup either... */
- ssym = NULL;
- esym = NULL;
- ekern = end;
- }
-
- /*
- * Initialize the system type and set up memory layout.
- * Note that some systems have a more complex memory setup.
- */
- bios_ident();
-
- /*
- * Read and store ARCBios variables for future reference.
- */
- cp = Bios_GetEnvironmentVariable("ConsoleOut");
- if (cp != NULL && *cp != '\0')
- strlcpy(bios_console, cp, sizeof(bios_console));
- cp = Bios_GetEnvironmentVariable("gfx");
- if (cp != NULL && *cp != '\0')
- strlcpy(bios_graphics, cp, sizeof(bios_graphics));
- cp = Bios_GetEnvironmentVariable("keybd");
- if (cp != NULL && *cp != '\0')
- strlcpy(bios_keyboard, cp, sizeof(bios_keyboard));
- /* the following variables may not exist on all systems */
- cp = Bios_GetEnvironmentVariable("eaddr");
- if (cp != NULL && strlen(cp) > 0)
- strlcpy(bios_enaddr, cp, sizeof bios_enaddr);
- bios_consrate = bios_getenvint("dbaud");
- if (bios_consrate < 50 || bios_consrate > 115200)
- bios_consrate = 9600; /* sane default */
- cp = Bios_GetEnvironmentVariable("OSLoadOptions");
- if (cp != NULL && strlen(cp) > 0)
- strlcpy(osloadoptions, cp, sizeof osloadoptions);
-
- /*
- * Determine system type and set up configuration record data.
- */
- hw_vendor = "SGI";
- switch (sys_config.system_type) {
-#ifdef TGT_INDIGO
- case SGI_IP20:
- bios_printf("Found SGI-IP20, setting up.\n");
- /* IP22 is intentional, we use the same kernel */
- strlcpy(cpu_model, "IP22", sizeof(cpu_model));
- ip22_setup();
- break;
-#endif
-#if defined(TGT_INDY) || defined(TGT_INDIGO2)
- case SGI_IP22:
- bios_printf("Found SGI-IP22, setting up.\n");
- strlcpy(cpu_model, "IP22", sizeof(cpu_model));
- ip22_setup();
- break;
-#endif
-#ifdef TGT_INDIGO2
- case SGI_IP26:
- bios_printf("Found SGI-IP26, setting up.\n");
- strlcpy(cpu_model, "IP26", sizeof(cpu_model));
- ip22_setup();
- break;
- case SGI_IP28:
- bios_printf("Found SGI-IP28, setting up.\n");
- strlcpy(cpu_model, "IP28", sizeof(cpu_model));
- ip22_setup();
- break;
-#endif
-#ifdef TGT_O2
- case SGI_O2:
- bios_printf("Found SGI-IP32, setting up.\n");
- strlcpy(cpu_model, "IP32", sizeof(cpu_model));
- ip32_setup();
- break;
-#endif
-#ifdef TGT_ORIGIN
- case SGI_IP27:
- bios_printf("Found SGI-IP27, setting up.\n");
- strlcpy(cpu_model, "IP27", sizeof(cpu_model));
- ip27_setup();
-
- break;
-
- case SGI_IP35:
- bios_printf("Found SGI-IP35, setting up.\n");
- /* IP27 is intentional, we use the same kernel */
- strlcpy(cpu_model, "IP27", sizeof(cpu_model));
- ip27_setup();
-
- break;
-#endif
-#ifdef TGT_OCTANE
- case SGI_OCTANE:
- bios_printf("Found SGI-IP30, setting up.\n");
- strlcpy(cpu_model, "IP30", sizeof(cpu_model));
- ip30_setup();
- break;
-#endif
- default:
- bios_printf("There is no support for this system type "
- "(%02x) in this kernel.\n"
- "Are you sure you have booted the right kernel "
- "for this machine?\n",
- sys_config.system_type);
- bios_printf("Halting system.\n");
- Bios_Halt();
- for (;;)
- continue;
- /* NOTREACHED */
- }
-
- /*
- * Look at arguments passed to us and compute boothowto.
- */
- boothowto = RB_AUTOBOOT;
- dobootopts(argc, argv);
-
- /*
- * Figure out where we supposedly booted from.
- */
- cp = Bios_GetEnvironmentVariable("OSLoadPartition");
- if (cp == NULL)
- cp = "unknown";
- if (strlcpy(osloadpartition, cp, sizeof osloadpartition) >=
- sizeof osloadpartition)
- bios_printf("Value of `OSLoadPartition' is too large.\n"
- "The kernel might not be able to find out its root device.\n");
-
- /*
- * Set pagesize to enable use of page macros and functions.
- * Commit available memory to UVM system.
- */
- uvmexp.pagesize = PAGE_SIZE;
- uvm_setpagesize();
-
- for (i = 0; i < MAXMEMSEGS && mem_layout[i].mem_last_page != 0; i++) {
- uint64_t fp, lp;
- uint64_t firstkernpage, lastkernpage;
- paddr_t firstkernpa, lastkernpa;
-
- if (IS_XKPHYS((vaddr_t)start))
- firstkernpa = XKPHYS_TO_PHYS((vaddr_t)start);
- else
- firstkernpa = CKSEG0_TO_PHYS((vaddr_t)start);
- if (IS_XKPHYS((vaddr_t)ekern))
- lastkernpa = XKPHYS_TO_PHYS((vaddr_t)ekern);
- else
- lastkernpa = CKSEG0_TO_PHYS((vaddr_t)ekern);
-
- firstkernpage = atop(trunc_page(firstkernpa));
- lastkernpage = atop(round_page(lastkernpa));
-
- fp = mem_layout[i].mem_first_page;
- lp = mem_layout[i].mem_last_page;
-
- /* Account for kernel and kernel symbol table. */
- if (fp >= firstkernpage && lp < lastkernpage)
- continue; /* In kernel. */
-
- if (lp < firstkernpage || fp > lastkernpage) {
- uvm_page_physload(fp, lp, fp, lp, 0);
- continue; /* Outside kernel. */
- }
-
- if (fp >= firstkernpage)
- fp = lastkernpage;
- else if (lp < lastkernpage)
- lp = firstkernpage;
- else { /* Need to split! */
- uint64_t xp = firstkernpage;
- uvm_page_physload(fp, xp, fp, xp, 0);
- fp = lastkernpage;
- }
- if (lp > fp) {
- uvm_page_physload(fp, lp, fp, lp, 0);
- }
- }
-
- /*
- * Configure cache.
- */
- guessed = 0;
- switch (bootcpu_hwinfo.type) {
-#ifdef CPU_R4000
- case MIPS_R4000:
- cpufamily = MIPS_R4000;
- break;
-#endif
-#ifdef CPU_R4600
- case MIPS_R4600:
- cpufamily = MIPS_R5000;
- break;
-#endif
-#ifdef CPU_R5000
- case MIPS_R5000:
- case MIPS_RM52X0:
- cpufamily = MIPS_R5000;
- break;
-#endif
-#ifdef CPU_RM7000
- case MIPS_RM7000:
- case MIPS_RM9000:
- cpufamily = MIPS_R5000;
- break;
-#endif
-#ifdef CPU_R8000
- case MIPS_R8000:
- cpufamily = MIPS_R8000;
- break;
-#endif
-#ifdef CPU_R10000
- case MIPS_R10000:
- case MIPS_R12000:
- case MIPS_R14000:
- cpufamily = MIPS_R10000;
- break;
-#endif
- default:
- /*
- * If we can't identify the cpu type, it must be
- * r10k-compatible on Octane and Origin families, and
- * it is likely to be r5k-compatible on O2 and
- * r4k-compatible on Ind{igo*,y}.
- */
- guessed = 1;
- switch (sys_config.system_type) {
- case SGI_IP20:
- case SGI_IP22:
- bios_printf("Unrecognized processor type %02x, assuming"
- " R4000 compatible\n", bootcpu_hwinfo.type);
- cpufamily = MIPS_R4000;
- break;
- case SGI_O2:
- bios_printf("Unrecognized processor type %02x, assuming"
- " R5000 compatible\n", bootcpu_hwinfo.type);
- cpufamily = MIPS_R5000;
- break;
- case SGI_IP26:
- bios_printf("Unrecognized processor type %02x, assuming"
- " R8000 compatible\n", bootcpu_hwinfo.type);
- cpufamily = MIPS_R8000;
- break;
- default:
- case SGI_IP27:
- case SGI_IP28:
- case SGI_OCTANE:
- case SGI_IP35:
- bios_printf("Unrecognized processor type %02x, assuming"
- " R10000 compatible\n", bootcpu_hwinfo.type);
- cpufamily = MIPS_R10000;
- break;
- }
- break;
- }
- switch (cpufamily) {
-#ifdef CPU_R4000
- case MIPS_R4000:
- Mips4k_ConfigCache(ci);
- break;
-#endif
-#if defined(CPU_R4600) || defined(CPU_R5000) || defined(CPU_RM7000)
- case MIPS_R5000:
-#if defined(TGT_INDY) || defined(TGT_INDIGO2)
- if (sys_config.system_type == SGI_IP22)
- ip22_ConfigCache(ci);
- else
-#endif
- Mips5k_ConfigCache(ci);
- break;
-#endif
-#ifdef CPU_R8000
- case MIPS_R8000:
-#ifdef TGT_INDIGO2
- if (sys_config.system_type == SGI_IP26)
- tcc_ConfigCache(ci);
- else
-#endif
- tfp_ConfigCache(ci);
- break;
-#endif
-#ifdef CPU_R10000
- case MIPS_R10000:
- Mips10k_ConfigCache(ci);
- break;
-#endif
- default:
- if (guessed) {
- bios_printf("There is no support for this processor "
- "family in this kernel.\n"
- "Are you sure you have booted the right kernel "
- "for this machine?\n");
- } else {
- bios_printf("There is no support for this processor "
- "family (%02x) in this kernel.\n",
- bootcpu_hwinfo.type);
- }
- bios_printf("Halting system.\n");
- Bios_Halt();
- for (;;)
- continue;
- /* NOTREACHED */
- break;
- }
-
- /*
- * Last chance to call the BIOS. Wiping the TLB means the BIOS' data
- * areas are demapped on most systems.
- */
- delay(20*1000); /* Let any UART FIFO drain... */
-
- tlb_init(bootcpu_hwinfo.tlbsize);
-
-#ifdef CPU_R8000 /* { */
- /*
- * Set up TrapBase to point to our own trap vector area.
- */
- {
- extern char tfp_trapbase[];
- cp0_set_trapbase((vaddr_t)tfp_trapbase);
- }
-#else /* } { */
- /*
- * Copy down exception vector code.
- */
- bcopy(exception, (char *)CACHE_ERR_EXC_VEC, e_exception - cache_err);
- bcopy(exception, (char *)GEN_EXC_VEC, e_exception - exception);
-
- /*
- * Build proper TLB refill handler trampolines.
- */
- switch (cpufamily) {
-#ifdef CPU_R4000
- case MIPS_R4000:
- {
- extern void xtlb_miss_err_r4k;
- extern void xtlb_miss_err_r4000SC;
-
- if (ci->ci_l2.size == 0 ||
- ((cp0_get_prid() >> 4) & 0x0f) >= 4) /* R4400 */
- xtlb_handler = (vaddr_t)&xtlb_miss_err_r4k;
- else {
- xtlb_handler = (vaddr_t)&xtlb_miss_err_r4000SC;
- xtlb_handler |= CKSEG1_BASE;
- }
- }
- break;
-#endif
-#if defined(CPU_R5000) || defined(CPU_RM7000)
- case MIPS_R5000:
- {
- /*
- * R5000 processors need a specific chip bug workaround
- * in their tlb handlers. Theoretically only revision 1
- * of the processor need it, but there is evidence
- * later versions also need it.
- *
- * This is also necessary on RM52x0 and most RM7k/RM9k,
- * and is a documented errata for these chips.
- */
- extern void xtlb_miss_err_r5k;
- xtlb_handler = (vaddr_t)&xtlb_miss_err_r5k;
- }
- break;
-#endif
- default:
- {
- extern void xtlb_miss;
- xtlb_handler = (vaddr_t)&xtlb_miss;
- }
- break;
- }
-
- build_trampoline(TLB_MISS_EXC_VEC, xtlb_handler);
- build_trampoline(XTLB_MISS_EXC_VEC, xtlb_handler);
-#endif /* } */
-
-#ifdef CPU_R4000
- /*
- * Enable R4000 EOP errata workaround code if necessary.
- */
- if (cpufamily == MIPS_R4000 && ((cp0_get_prid() >> 4) & 0x0f) < 3)
- r4000_errata = 1;
-#endif
-
- /*
- * Allocate U page(s) for proc[0], pm_tlbpid 1.
- */
- ci->ci_curproc = &proc0;
- proc0.p_cpu = ci;
- proc0.p_addr = proc0paddr = ci->ci_curprocpaddr =
- (struct user *)pmap_steal_memory(USPACE, NULL, NULL);
- proc0.p_md.md_regs = (struct trapframe *)&proc0paddr->u_pcb.pcb_regs;
- tlb_set_pid(MIN_USER_ASID);
-
- /*
- * Get a console, very early but after initial mapping setup
- * and exception handler setup - console probe code might need
- * to invoke guarded_read(), and this needs our handlers to be
- * available.
- */
- consinit();
- printf("Initial setup done, switching console.\n");
-
-#ifdef DDB
- {
- /*
- * Early initialize cpu0 so that commands such as `mach tlb'
- * can work from ddb if ddb is entered before cpu0 attaches.
- */
- extern struct cpu_info cpu_info_primary;
- bcopy(&bootcpu_hwinfo, &cpu_info_primary.ci_hw,
- sizeof(struct cpu_hwinfo));
- }
-#endif
-
- /*
- * Init message buffer.
- */
- msgbufbase = (caddr_t)pmap_steal_memory(MSGBUFSIZE, NULL, NULL);
- initmsgbuf(msgbufbase, MSGBUFSIZE);
-
- /*
- * Bootstrap VM system.
- */
- pmap_bootstrap();
-
-#ifdef CPU_R8000
- /*
- * Turn on precise FPU exceptions. This also causes the FS bit in
- * the FPU status register to be honoured, instead of being forced
- * to one.
- */
- setsr(getsr() | SR_SERIALIZE_FPU);
-
- /*
- * Turn on sequential memory model. This makes sure that there are
- * no risks of hitting virtual coherency exceptions, which are not
- * recoverable on R8000.
- */
- cp0_set_config((cp0_get_config() & ~CFGR_ICE) | CFGR_SMM);
-#else
- /*
- * Turn off bootstrap exception vectors.
- */
- setsr(getsr() & ~SR_BOOT_EXC_VEC);
-#endif
-
- proc0.p_md.md_regs->sr = getsr();
-
- /*
- * Clear out the I and D caches.
- */
- Mips_SyncCache(ci);
-
-#ifdef DDB
- db_machine_init();
- if (boothowto & RB_KDB)
- db_enter();
-#endif
-
- /*
- * Return new stack pointer.
- */
- return ((caddr_t)proc0paddr + USPACE - 64);
-}
-
-/*
- * Decode boot options.
- */
-static void
-dobootopts(int argc, void *argv)
-{
- char *cp;
- int i;
-
- /* XXX Should this be done differently, eg env vs. args? */
- for (i = 1; i < argc; i++) {
- if (bios_is_32bit)
- cp = (char *)(long)((int32_t *)argv)[i];
- else
- cp = ((char **)argv)[i];
- if (cp == NULL)
- continue;
-
- /*
- * Parse PROM options.
- */
- if (strncmp(cp, "OSLoadOptions=", 14) == 0) {
- if (strcmp(&cp[14], "auto") == 0)
- boothowto &= ~(RB_SINGLE|RB_ASKNAME);
- else if (strcmp(&cp[14], "single") == 0)
- boothowto |= RB_SINGLE;
- else if (strcmp(&cp[14], "debug") == 0)
- boothowto |= RB_KDB;
- continue;
- }
-
- /*
- * Parse kernel options.
- */
- if (*cp == '-') {
- while (*++cp != '\0')
- switch (*cp) {
- case 'a':
- boothowto |= RB_ASKNAME;
- break;
- case 'c':
- boothowto |= RB_CONFIG;
- break;
- case 'd':
- boothowto |= RB_KDB;
- break;
- case 's':
- boothowto |= RB_SINGLE;
- break;
- }
- }
- }
-}
-
-
-/*
- * Console initialization: called early on from mips_init(), before vm init
- * is completed.
- * Do enough configuration to choose and initialize a console.
- */
-void
-consinit()
-{
- if (console_ok)
- return;
- cninit();
- console_ok = 1;
-}
-
-/*
- * cpu_startup: allocate memory for variable-sized tables, initialize CPU, and
- * do auto-configuration.
- */
-void
-cpu_startup()
-{
- vaddr_t minaddr, maxaddr;
-#ifdef PMAPDEBUG
- extern int pmapdebug;
- int opmapdebug = pmapdebug;
-
- pmapdebug = 0; /* Shut up pmap debug during bootstrap. */
-#endif
-
- /*
- * Good {morning,afternoon,evening,night}.
- */
- printf("%s", version);
- printf("real mem = %lu (%luMB)\n", ptoa((psize_t)physmem),
- ptoa((psize_t)physmem)/1024/1024);
- printf("rsvd mem = %lu (%luMB)\n", ptoa((psize_t)rsvdmem),
- (ptoa((psize_t)rsvdmem) + 1023 * 1024)/1024/1024);
-
- /*
- * Allocate a submap for exec arguments. This map effectively
- * limits the number of processes exec'ing at any time.
- */
- minaddr = vm_map_min(kernel_map);
- exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
- 16 * NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
- /* Allocate a submap for physio. */
- phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
- VM_PHYS_SIZE, 0, FALSE, NULL);
-
-#ifdef PMAPDEBUG
- pmapdebug = opmapdebug;
-#endif
- printf("avail mem = %lu (%luMB)\n", ptoa((psize_t)uvmexp.free),
- ptoa((psize_t)uvmexp.free)/1024/1024);
-
- cpu_cpuspeed = sgi_cpuspeed;
-
- /*
- * Set up buffers, so they can be used to read disk labels.
- */
- bufinit();
-
- /*
- * Configure the system.
- */
- if (boothowto & RB_CONFIG) {
-#ifdef BOOT_CONFIG
- user_config();
-#else
- printf("kernel does not support -c; continuing..\n");
-#endif
- }
-}
-
-/*
- * Machine dependent system variables.
- */
-int
-cpu_sysctl(int *name, u_int namelen, void *oldp, size_t *oldlenp, void *newp,
- size_t newlen, struct proc *p)
-{
- /* All sysctl names at this level are terminal. */
- if (namelen != 1)
- return ENOTDIR; /* Overloaded */
-
- switch (name[0]) {
- default:
- return EOPNOTSUPP;
- }
-}
-
-int
-sgi_cpuspeed(int *freq)
-{
- /*
- * XXX assumes all CPU have the same frequency
- */
- *freq = curcpu()->ci_hw.clock / 1000000;
- return (0);
-}
-
-int waittime = -1;
-
-__dead void
-boot(int howto)
-{
- if ((howto & RB_RESET) != 0)
- goto doreset;
-
- if (curproc)
- savectx(curproc->p_addr, 0);
-
- if (cold) {
- if ((howto & RB_USERREQ) == 0)
- howto |= RB_HALT;
- goto haltsys;
- }
-
- boothowto = howto;
- if ((howto & RB_NOSYNC) == 0 && waittime < 0) {
- waittime = 0;
- vfs_shutdown(curproc);
-
- if ((howto & RB_TIMEBAD) == 0) {
- resettodr();
- } else {
- printf("WARNING: not updating battery clock\n");
- }
- }
- if_downall();
-
- uvm_shutdown();
- splhigh();
- cold = 1;
-
- if ((howto & RB_DUMP) != 0)
- dumpsys();
-
-haltsys:
- config_suspend_all(DVACT_POWERDOWN);
-
- if ((howto & RB_HALT) != 0) {
- if ((howto & RB_POWERDOWN) != 0)
- printf("System Power Down.\n");
- else
- printf("System Halt.\n");
- } else {
-doreset:
- printf("System restart.\n");
- }
-
- delay(1000000);
- md_halt(howto);
-
- printf("Failed!!! Please reset manually.\n");
- for (;;)
- continue;
- /* NOTREACHED */
-}
-
-void
-arcbios_halt(int howto)
-{
- register_t sr;
-
- sr = disableintr();
-
-#if 0
- /* restore ARCBios page size... */
- tlb_set_page_mask(PG_SIZE_4K);
-#endif
-
- if (howto & RB_HALT) {
-#ifdef TGT_INDIGO
- /* Indigo does not support powerdown */
- if (sys_config.system_type == SGI_IP20)
- howto &= ~RB_POWERDOWN;
-#endif
- if (howto & RB_POWERDOWN) {
-#ifdef TGT_INDY
- /*
- * ARCBios needs to use the FPU on Indy during
- * shutdown.
- */
- if (sys_config.system_type == SGI_IP22)
- setsr(getsr() | SR_COP_1_BIT);
-#endif
- Bios_PowerDown();
- } else
- Bios_EnterInteractiveMode();
- } else
- Bios_Reboot();
-
- setsr(sr);
-}
-
-u_long dumpmag = 0x8fca0101; /* Magic number for savecore. */
-int dumpsize = 0; /* Also for savecore. */
-long dumplo = 0;
-
-void
-dumpconf(void)
-{
- int nblks;
-
- if (dumpdev == NODEV ||
- (nblks = (bdevsw[major(dumpdev)].d_psize)(dumpdev)) == 0)
- return;
- if (nblks <= ctod(1))
- return;
-
- dumpsize = ptoa(physmem);
- if (dumpsize > atop(round_page(dbtob(nblks - dumplo))))
- dumpsize = atop(round_page(dbtob(nblks - dumplo)));
- else if (dumplo == 0)
- dumplo = nblks - btodb(ptoa(physmem));
-
- /*
- * Don't dump on the first page in case the dump device includes a
- * disk label.
- */
- if (dumplo < btodb(PAGE_SIZE))
- dumplo = btodb(PAGE_SIZE);
-}
-
-/*
- * Doadump comes here after turning off memory management and getting on the
- * dump stack, either when called above, or by the auto-restart code.
- */
-void
-dumpsys()
-{
- extern int msgbufmapped;
-
- msgbufmapped = 0;
- if (dumpdev == NODEV)
- return;
- /*
- * For dumps during auto-configuration, if dump device has already
- * configured...
- */
- if (dumpsize == 0)
- dumpconf();
- if (dumplo < 0)
- return;
- printf("\ndumping to dev %x, offset %ld\n", dumpdev, dumplo);
- printf("dump not yet implemented\n");
-#if 0 /* XXX HAVE TO FIX XXX */
- switch (error = (*bdevsw[major(dumpdev)].d_dump)(dumpdev, dumplo,)) {
-
- case ENXIO:
- printf("device bad\n");
- break;
-
- case EFAULT:
- printf("device not ready\n");
- break;
-
- case EINVAL:
- printf("area improper\n");
- break;
-
- case EIO:
- printf("i/o error\n");
- break;
-
- default:
- printf("error %d\n", error);
- break;
-
- case 0:
- printf("succeeded\n");
- }
-#endif
-}
-
-int
-is_memory_range(paddr_t pa, psize_t len, psize_t limit)
-{
- struct phys_mem_desc *seg;
- uint64_t fp, lp;
- int i;
-
- fp = atop(pa);
- lp = atop(round_page(pa + len));
-
- if (limit != 0 && lp > atop(limit))
- return 0;
-
- for (i = 0, seg = mem_layout; i < MAXMEMSEGS; i++, seg++)
- if (fp >= seg->mem_first_page && lp <= seg->mem_last_page)
- return 1;
-
- return 0;
-}
-
-void
-intr_barrier(void *cookie)
-{
- sched_barrier(NULL);
-}
+++ /dev/null
-/* $OpenBSD: mainbus.c,v 1.14 2020/08/26 03:29:06 visa Exp $ */
-
-/*
- * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <sys/reboot.h>
-
-#include <mips64/archtype.h>
-#include <machine/autoconf.h>
-
-/* Definition of the mainbus driver. */
-int mbmatch(struct device *, void *, void *);
-void mbattach(struct device *, struct device *, void *);
-int mbprint(void *, const char *);
-
-const struct cfattach mainbus_ca = {
- sizeof(struct device), mbmatch, mbattach
-};
-
-struct cfdriver mainbus_cd = {
- NULL, "mainbus", DV_DULL
-};
-
-int
-mbmatch(struct device *parent, void *cfdata, void *aux)
-{
- static int mbattached = 0;
-
- if (mbattached != 0)
- return 0;
-
- return mbattached = 1;
-}
-
-void
-mbattach(struct device *parent, struct device *self, void *aux)
-{
- struct cpu_attach_args caa;
-
- if (hw_prod != NULL)
- printf(": %s", hw_prod);
- printf("\n");
-
- /*
- * On multiprocessor capable systems, delegate everything to the
- * IP-specific code.
- */
- switch (sys_config.system_type) {
-#ifdef TGT_ORIGIN
- case SGI_IP27:
- case SGI_IP35:
- ip27_autoconf(self);
- return;
-#endif
-#ifdef TGT_OCTANE
- case SGI_OCTANE:
- ip30_autoconf(self);
- return;
-#endif
- default:
- break;
- }
-
- /*
- * On other systems, attach the CPU, its clock, and the
- * mainbus here.
- * XXX Would be worth doing as ipXX_autoconf() too.
- */
-
- bzero(&caa, sizeof caa);
- caa.caa_maa.maa_name = "cpu";
- caa.caa_hw = &bootcpu_hwinfo;
- config_found(self, &caa, mbprint);
-
- switch (sys_config.system_type) {
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2)
- case SGI_IP20:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
- /* Interrupt Controller */
- caa.caa_maa.maa_name = "int";
- config_found(self, &caa.caa_maa, mbprint);
-#ifdef TGT_INDIGO2
- if (sys_config.system_type == SGI_IP26) {
- /* Streaming Cache Controller */
- caa.caa_maa.maa_name = "tcc";
- config_found(self, &caa.caa_maa, mbprint);
- }
-#endif
- /* Memory Controller */
- caa.caa_maa.maa_name = "imc";
- config_found(self, &caa.caa_maa, mbprint);
-
- if (md_startclock == NULL) {
- caa.caa_maa.maa_name = "clock";
- config_found(self, &caa.caa_maa, mbprint);
- }
-
- ip22_post_autoconf();
-
- break;
-#endif
-#ifdef TGT_O2
- case SGI_O2:
- caa.caa_maa.maa_name = "clock";
- config_found(self, &caa.caa_maa, mbprint);
- caa.caa_maa.maa_name = "macebus";
- config_found(self, &caa.caa_maa, mbprint);
- caa.caa_maa.maa_name = "gbe";
- config_found(self, &caa.caa_maa, mbprint);
- break;
-#endif
- default:
- break;
- }
-}
-
-int
-mbprint(void *aux, const char *pnp)
-{
- if (pnp)
- return (QUIET);
- return (UNCONF);
-}
+++ /dev/null
-/* $OpenBSD: sginode.c,v 1.32 2015/12/03 15:38:06 visa Exp $ */
-/*
- * Copyright (c) 2008, 2009, 2011 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2004 Opsycon AB. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <machine/cpu.h>
-#include <machine/memconf.h>
-#include <machine/param.h>
-#include <machine/autoconf.h>
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcidevs.h>
-
-#include <machine/mnode.h>
-#include <sgi/xbow/hub.h>
-#include <sgi/xbow/widget.h>
-#include <sgi/xbow/xbow.h>
-#include <sgi/xbow/xbowdevs.h>
-
-void kl_add_memory_ip27(int16_t, int16_t *, unsigned int);
-void kl_add_memory_ip35(int16_t, int16_t *, unsigned int);
-
-int kl_first_pass_board(lboard_t *, void *);
-int kl_first_pass_comp(klinfo_t *, void *);
-
-#ifdef DEBUG
-#define DB_PRF(x) bios_printf x
-#else
-#define DB_PRF(x)
-#endif
-
-/* widget number of the XBow `hub', for each node */
-int kl_hub_widget[GDA_MAXNODES];
-
-int kl_n_mode = 0;
-u_int kl_n_shift = 32;
-klinfo_t *kl_glass_console = NULL;
-
-void
-kl_init(int ip35)
-{
- kl_config_hdr_t *cfghdr;
- uint64_t val;
- uint64_t nibase = ip35 ? HUBNIBASE_IP35 : HUBNIBASE_IP27;
- size_t gsz;
-
- /* will be recomputed when processing memory information */
- physmem = 0;
-
- cfghdr = IP27_KLCONFIG_HDR(0);
- DB_PRF(("config @%p\n", cfghdr));
- DB_PRF(("magic %#llx version %x\n", cfghdr->magic, cfghdr->version));
- DB_PRF(("console %#lx baud %d\n", cfghdr->cons_info.uart_base,
- cfghdr->cons_info.baud));
-
- val = IP27_LHUB_L(nibase | HUBNI_STATUS);
- kl_n_mode = (val & NI_MORENODES) != 0;
- kl_n_shift = (ip35 ? 33 : 32) - kl_n_mode;
- bios_printf("Machine is in %c mode.\n", kl_n_mode + 'M');
-
- val = IP27_LHUB_L(HUBPI_REGION_PRESENT);
- DB_PRF(("Region present %#llx.\n", val));
- val = IP27_LHUB_L(HUBPI_CALIAS_SIZE);
- DB_PRF(("Calias size %#llx.\n", val));
-
- /*
- * Get a grip on the global data area, and figure out how many
- * theoretical nodes are available.
- */
-
- gda = IP27_GDA(0);
- gsz = IP27_GDA_SIZE(0);
- if (gda->magic != GDA_MAGIC || gda->ver < 2) {
- masternasid = 0;
- maxnodes = 0;
- } else {
- masternasid = gda->masternasid;
- maxnodes = (gsz - offsetof(gda_t, nasid)) / sizeof(int16_t);
- if (maxnodes > GDA_MAXNODES)
- maxnodes = GDA_MAXNODES;
- /* in M mode, there can't be more than 64 nodes anyway */
- if (kl_n_mode == 0 && maxnodes > 64)
- maxnodes = 64;
- }
-
- /*
- * Scan all nodes configurations to find out CPU and memory
- * information, starting with the master node.
- */
-
- kl_scan_all_nodes(KLBRD_ANY, kl_first_pass_board, &ip35);
-}
-
-/*
- * Callback routine for the initial enumeration (boards).
- */
-int
-kl_first_pass_board(lboard_t *boardinfo, void *arg)
-{
- DB_PRF(("%cboard type %x slot %x nasid %x nic %#llx ncomp %d\n",
- boardinfo->struct_type & LBOARD ? 'l' : 'r',
- boardinfo->brd_type, boardinfo->brd_slot,
- boardinfo->brd_nasid, boardinfo->brd_nic,
- boardinfo->brd_numcompts));
-
- /*
- * Assume the worst case of a restricted XBow, as found on
- * Origin 200 systems. This value will be overridden should a
- * full-blown XBow be found during component enumeration.
- *
- * On Origin 200, widget 0 reports itself as a Bridge, and
- * interrupt widget is hardwired to #a (which is another facet
- * of the bridge).
- */
- if (kl_hub_widget[boardinfo->brd_nasid] == 0)
- kl_hub_widget[boardinfo->brd_nasid] = 0x0a;
-
- kl_scan_board(boardinfo, KLSTRUCT_ANY, kl_first_pass_comp, arg);
-
- return 0;
-}
-
-#ifdef DEBUG
-static const char *klstruct_names[] = {
- "unknown component",
- "cpu",
- "hub",
- "memory",
- "xbow",
- "bridge",
- "ioc3",
- "pci",
- "vme",
- "router",
- "graphics",
- "scsi",
- "fddi",
- "mio",
- "disk",
- "tape",
- "cdrom",
- "hub uart",
- "ioc3 Ethernet",
- "ioc3 uart",
- "component type 20",
- "ioc3 keyboard",
- "rad",
- "hub tty",
- "ioc3 tty",
- "fc",
- "module serialnumber",
- "ioc3 mouse",
- "tpu",
- "gsn main board",
- "gsn aux board",
- "xthd",
- "QLogic fc",
- "firewire",
- "usb",
- "usb keyboard",
- "usb mouse",
- "dual scsi",
- "PE brick",
- "gigabit Ethernet",
- "ide",
- "ioc4",
- "ioc4 uart",
- "ioc4 tty",
- "ioc4 keyboard",
- "ioc4 mouse",
- "ioc4 ATA",
- "pci graphics"
-};
-#endif
-
-/*
- * Callback routine for the initial enumeration (components).
- * We are interested in cpu and memory information only, but display a few
- * other things if option DEBUG.
- */
-int
-kl_first_pass_comp(klinfo_t *comp, void *arg)
-{
- int ip35 = *(int *)arg;
- klcpu_t *cpucomp;
- klmembnk_m_t *memcomp_m;
- klxbow_t *xbowcomp;
- arc_config64_t *arc;
-#ifdef DEBUG
- klmembnk_n_t *memcomp_n;
- klhub_t *hubcomp;
- klscsi_t *scsicomp;
- klscctl_t *scsi2comp;
- int i;
-#endif
-
- arc = (arc_config64_t *)comp->arcs_compt;
-
-#ifdef DEBUG
- if (comp->struct_type < nitems(klstruct_names))
- DB_PRF(("\t%s", klstruct_names[comp->struct_type]));
- else
- DB_PRF(("\tcomponent type %d", comp->struct_type));
- DB_PRF((", widget %x physid 0x%02x virtid %d",
- comp->widid, comp->physid, comp->virtid));
- if (ip35) {
- DB_PRF((" prt %d bus %d", comp->port, comp->pci_bus_num));
- if (comp->pci_multifunc)
- DB_PRF((" pcifn %d", comp->pci_func_num));
- }
- DB_PRF(("\n"));
-#endif
-
- switch (comp->struct_type) {
- case KLSTRUCT_CPU:
- cpucomp = (klcpu_t *)comp;
- DB_PRF(("\t type %x/%x %dMHz cache %dMB speed %dMHz\n",
- cpucomp->cpu_prid, cpucomp->cpu_fpirr,
- cpucomp->cpu_speed, cpucomp->cpu_scachesz,
- cpucomp->cpu_scachespeed));
- /*
- * XXX this assumes the first cpu encountered is the boot
- * XXX cpu.
- */
- if (bootcpu_hwinfo.clock == 0) {
- bootcpu_hwinfo.c0prid = cpucomp->cpu_prid;
- bootcpu_hwinfo.c1prid = cpucomp->cpu_prid; /* XXX */
- bootcpu_hwinfo.clock = cpucomp->cpu_speed * 1000000;
- bootcpu_hwinfo.tlbsize = 64;
- bootcpu_hwinfo.type = (cpucomp->cpu_prid >> 8) & 0xff;
- } else
- ncpusfound++;
- break;
-
- case KLSTRUCT_MEMBNK:
- memcomp_m = (klmembnk_m_t *)comp;
-#ifdef DEBUG
- memcomp_n = (klmembnk_n_t *)comp;
- DB_PRF(("\t %dMB, select %x flags %x\n",
- memcomp_m->membnk_memsz, memcomp_m->membnk_dimm_select,
- kl_n_mode ?
- memcomp_n->membnk_attr : memcomp_m->membnk_attr));
-
- if (kl_n_mode) {
- for (i = 0; i < MD_MEM_BANKS_N; i++) {
- if (memcomp_n->membnk_bnksz[i] == 0)
- continue;
- DB_PRF(("\t\tbank %d %dMB\n",
- i + 1, memcomp_n->membnk_bnksz[i]));
- }
- } else {
- for (i = 0; i < MD_MEM_BANKS_M; i++) {
- if (memcomp_m->membnk_bnksz[i] == 0)
- continue;
- DB_PRF(("\t\tbank %d %dMB\n",
- i + 1, memcomp_m->membnk_bnksz[i]));
- }
- }
-#endif
- if (ip35)
- kl_add_memory_ip35(comp->nasid,
- memcomp_m->membnk_bnksz,
- kl_n_mode ? MD_MEM_BANKS_N : MD_MEM_BANKS_M);
- else
- kl_add_memory_ip27(comp->nasid,
- memcomp_m->membnk_bnksz,
- kl_n_mode ? MD_MEM_BANKS_N : MD_MEM_BANKS_M);
- break;
-
- case KLSTRUCT_GFX:
- /*
- * We rely upon the PROM setting up a fake ARCBios component
- * for the graphics console, if there is one.
- * Of course, the ARCBios structure is only available as long
- * as we do not tear down the PROM TLB, which is why we check
- * for this as early as possible and remember the console
- * component (KL struct are not short-lived).
- */
- if (arc != NULL &&
- arc->class != 0 && arc->type == arc_DisplayController &&
- ISSET(arc->flags, ARCBIOS_DEVFLAGS_CONSOLE_OUTPUT)) {
- DB_PRF(("\t (console device)\n"));
- /* paranoia */
- if (comp->widid >= WIDGET_MIN &&
- comp->widid <= WIDGET_MAX)
- kl_glass_console = comp;
- }
- break;
-
- case KLSTRUCT_XBOW:
- xbowcomp = (klxbow_t *)comp;
- DB_PRF(("\t hub master link %d\n",
- xbowcomp->xbow_hub_master_link));
- kl_hub_widget[comp->nasid] = xbowcomp->xbow_hub_master_link;
-#ifdef DEBUG
- for (i = 0; i < MAX_XBOW_LINKS; i++) {
- if (!ISSET(xbowcomp->xbow_port_info[i].port_flag,
- XBOW_PORT_ENABLE))
- continue;
- DB_PRF(("\t\twidget %d nasid %d flg %u\n", 8 + i,
- xbowcomp->xbow_port_info[i].port_nasid,
- xbowcomp->xbow_port_info[i].port_flag));
- }
-#endif
- break;
-
-#ifdef DEBUG
- case KLSTRUCT_HUB:
- hubcomp = (klhub_t *)comp;
- DB_PRF(("\t port %d flag %d speed %lldMHz\n",
- hubcomp->hub_port.port_nasid, hubcomp->hub_port.port_flag,
- hubcomp->hub_speed / 1000000));
- break;
-
- case KLSTRUCT_SCSI2:
- scsi2comp = (klscctl_t *)comp;
- for (i = 0; i < scsi2comp->scsi_buscnt; i++) {
- scsicomp = (klscsi_t *)scsi2comp->scsi_bus[i];
- if (scsicomp == NULL)
- continue;
- DB_PRF(("\t\tbus %d, physid 0x%02x virtid %d,"
- " specific %lld, numdevs %d\n",
- i, scsicomp->scsi_info.physid,
- scsicomp->scsi_info.virtid,
- scsicomp->scsi_specific,
- scsicomp->scsi_numdevs));
- }
- break;
-#endif
- }
-
-#ifdef DEBUG
- if (arc != NULL) {
- DB_PRF(("\t[ARCBios component:"
- " class %d type %d flags %02x key 0x%llx",
- arc->class, arc->type, arc->flags, arc->key));
- if (arc->id_len != 0)
- DB_PRF((" %.*s]\n",
- (int)arc->id_len, (const char *)arc->id));
- else
- DB_PRF((" (no name)]\n"));
- }
-#endif
-
- return 0;
-}
-
-/*
- * Enumerate the boards of all nodes, and invoke a callback for those
- * matching the given class.
- */
-int
-kl_scan_all_nodes(uint cls, int (*cb)(lboard_t *, void *), void *cbarg)
-{
- uint node;
-
- if (kl_scan_node(masternasid, cls, cb, cbarg) != 0)
- return 1;
- for (node = 0; node < maxnodes; node++) {
- if (gda->nasid[node] < 0)
- continue;
- if (gda->nasid[node] == masternasid)
- continue;
- if (kl_scan_node(gda->nasid[node], cls, cb, cbarg) != 0)
- return 1;
- }
-
- return 0;
-}
-
-/*
- * Enumerate the boards of a node, and invoke a callback for those matching
- * the given class.
- */
-int
-kl_scan_node(int nasid, uint clss, int (*cb)(lboard_t *, void *), void *cbarg)
-{
- lboard_t *boardinfo;
-
- for (boardinfo = IP27_KLFIRST_BOARD(nasid); boardinfo != NULL;
- boardinfo = IP27_KLNEXT_BOARD(nasid, boardinfo)) {
- if (clss == KLBRD_ANY ||
- (boardinfo->brd_type & IP27_BC_MASK) == clss) {
- if ((*cb)(boardinfo, cbarg) != 0)
- return 1;
- }
- if (boardinfo->brd_next == 0)
- break;
- }
-
- return 0;
-}
-
-/*
- * Enumerate the components of a board, and invoke a callback for those
- * matching the given type.
- */
-int
-kl_scan_board(lboard_t *boardinfo, uint type, int (*cb)(klinfo_t *, void *),
- void *cbarg)
-{
- klinfo_t *comp;
- int i;
-
- if (!ISSET(boardinfo->struct_type, LBOARD))
- return 0;
-
- for (i = 0; i < boardinfo->brd_numcompts; i++) {
- comp = IP27_UNCAC_ADDR(klinfo_t *, boardinfo->brd_nasid,
- boardinfo->brd_compts[i]);
-
- if (!ISSET(comp->flags, KLINFO_ENABLED) ||
- ISSET(comp->flags, KLINFO_FAILED))
- continue;
-
- if (type != KLSTRUCT_ANY && comp->struct_type != type)
- continue;
-
- if ((*cb)(comp, cbarg) != 0)
- return 1;
- }
-
- return 0;
-}
-
-/*
- * Return the console device information.
- */
-console_t *
-kl_get_console()
-{
- kl_config_hdr_t *cfghdr = IP27_KLCONFIG_HDR(0);
-
- return &cfghdr->cons_info;
-}
-
-/*
- * Process memory bank information.
- * There are two different routines, because IP27 and IP35 do not
- * layout memory the same way.
- */
-
-/*
- * On IP27, access to each DIMM is interleaved, which cause it to map to
- * four banks on 128MB boundaries.
- * DIMMs of 128MB or smaller map everything in the first bank, though --
- * interleaving would be horribly non-optimal.
- */
-void
-kl_add_memory_ip27(int16_t nasid, int16_t *sizes, unsigned int cnt)
-{
- paddr_t basepa;
- uint64_t fp, lp, np;
- unsigned int seg, nmeg;
-
- basepa = (paddr_t)nasid << kl_n_shift;
- while (cnt-- != 0) {
- nmeg = *sizes++;
- for (seg = 0; seg < 4; basepa += (1 << 27), seg++) {
- if (nmeg <= 128)
- np = seg == 0 ? nmeg : 0;
- else
- np = nmeg / 4;
- if (np == 0)
- continue;
-
- DB_PRF(("IP27 memory from %#lx to %#llx (%llu MB)\n",
- basepa, basepa + (np << 20), np));
-
- np = atop(np << 20); /* MB to pages */
- fp = atop(basepa);
- lp = fp + np;
-
- /*
- * We do not manage the first 32MB, so skip them here
- * if necessary.
- */
- if (fp < atop(32 << 20)) {
- fp = atop(32 << 20);
- if (fp >= lp)
- continue;
- np = lp - fp;
- physmem += atop(32 << 20);
- }
-
- if (memrange_register(fp, lp,
- ~(atop(1UL << kl_n_shift) - 1)) != 0) {
- /*
- * We could hijack the smallest segment here.
- * But is it really worth doing?
- */
- bios_printf("%lu MB of memory could not be "
- "managed, increase MAXMEMSEGS\n",
- ptoa(np) >> 20);
- }
- }
- }
-}
-
-/*
- * On IP35, the smallest memory DIMMs are 256MB, and the largest is 1GB.
- * Memory is reported at 1GB intervals.
- */
-void
-kl_add_memory_ip35(int16_t nasid, int16_t *sizes, unsigned int cnt)
-{
- paddr_t basepa;
- uint64_t fp, lp, np;
-
- basepa = (paddr_t)nasid << kl_n_shift;
- while (cnt-- != 0) {
- np = *sizes++;
- if (np != 0) {
- DB_PRF(("IP35 memory from %#lx to %#llx (%llu MB)\n",
- basepa, basepa + (np << 20), np));
-
- fp = atop(basepa);
- np = atop(np << 20); /* MB to pages */
- lp = fp + np;
-
- /*
- * We do not manage the first 64MB, so skip them here
- * if necessary.
- */
- if (fp < atop(64 << 20)) {
- fp = atop(64 << 20);
- if (fp >= lp)
- continue;
- np = lp - fp;
- physmem += atop(64 << 20);
- }
-
- if (memrange_register(fp, lp,
- ~(atop(1UL << kl_n_shift) - 1)) != 0) {
- /*
- * We could hijack the smallest segment here.
- * But is it really worth doing?
- */
- bios_printf("%lu MB of memory could not be "
- "managed, increase MAXMEMSEGS\n",
- ptoa(np) >> 20);
- }
- }
- basepa += 1UL << 30; /* 1 GB */
- }
-}
-
-/*
- * Extract unique device location from a klinfo structure.
- */
-void
-kl_get_location(klinfo_t *cmp, struct sgi_device_location *sdl)
-{
- uint32_t wid;
- int device = cmp->physid;
-
- /*
- * If the widget is actually a PIC, we need to compensate
- * for PCI device numbering.
- */
- if (xbow_widget_id(cmp->nasid, cmp->widid, &wid) == 0) {
- if (WIDGET_ID_VENDOR(wid) == XBOW_VENDOR_SGI3 &&
- WIDGET_ID_PRODUCT(wid) == XBOW_PRODUCT_SGI3_PIC)
- device--;
- }
-
- sdl->nasid = cmp->nasid;
- sdl->widget = cmp->widid;
- if (sys_config.system_type == SGI_IP35) {
- /*
- * IP35: need to be aware of secondary buses on PIC, and
- * multifunction PCI cards.
- */
- sdl->bus = cmp->pci_bus_num;
- sdl->device = device;
- if (cmp->pci_multifunc)
- sdl->fn = cmp->pci_func_num;
- else
- sdl->fn = -1;
- sdl->specific = cmp->port;
- } else {
- /*
- * IP27: secondary buses and multifunction PCI devices are
- * not recognized.
- */
- sdl->bus = 0;
- sdl->device = device;
- sdl->fn = -1;
- sdl->specific = 0;
- }
-}
-
-/*
- * Similar to the above, but for the input console device, which information
- * does not come from a klinfo structure.
- */
-void
-kl_get_console_location(console_t *cons, struct sgi_device_location *sdl)
-{
- uint32_t wid;
- int device = cons->npci;
-
- /*
- * If the widget is actually a PIC, we need to compensate
- * for PCI device numbering.
- */
- if (xbow_widget_id(cons->nasid, cons->wid, &wid) == 0) {
- if (WIDGET_ID_VENDOR(wid) == XBOW_VENDOR_SGI3 &&
- WIDGET_ID_PRODUCT(wid) == XBOW_PRODUCT_SGI3_PIC)
- device--;
- }
-
- sdl->nasid = cons->nasid;
- sdl->widget = cons->wid;
- sdl->fn = -1;
- sdl->specific = cons->type;
-
- /*
- * This is a disgusting hack. The console structure does not
- * contain a precise PCI device identification, and will also
- * not point to the relevant klinfo structure.
- *
- * We assume that if the console `type' is not the IOC3 PCI
- * identifier, then it is an IOC4 device connected to a PIC
- * bus, therefore we can compute proper PCI location from the
- * `npci' field.
- */
-
- if (cons->type == PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3) ||
- sys_config.system_type != SGI_IP35) {
- sdl->bus = 0;
- sdl->device = device;
- } else {
- sdl->bus = cons->npci & KLINFO_PHYSID_PIC_BUS1 ? 1 : 0;
- sdl->device = device & KLINFO_PHYSID_WIDGET_MASK;
- }
-}
+++ /dev/null
-/* $OpenBSD: wscons_machdep.c,v 1.12 2015/12/22 21:36:57 mmcc Exp $ */
-
-/*
- * Copyright (c) 2010 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2001 Aaron Campbell
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/conf.h>
-#include <sys/device.h>
-#include <sys/extent.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#if defined(TGT_ORIGIN)
-#include <machine/mnode.h>
-#endif
-
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-
-#include <dev/cons.h>
-#include <dev/ic/i8042reg.h>
-#include <dev/ic/pckbcvar.h>
-#include <dev/usb/ukbdvar.h>
-#include <dev/wscons/wskbdvar.h>
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsdisplayvar.h>
-
-#include <sgi/dev/gbereg.h>
-#include <sgi/dev/impactvar.h>
-#include <sgi/dev/iockbcvar.h>
-#include <sgi/dev/mkbcreg.h>
-#include <sgi/gio/giovar.h>
-#include <sgi/hpc/hpcreg.h>
-#include <sgi/hpc/hpcvar.h>
-#include <sgi/hpc/iocreg.h>
-#include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
-#include <sgi/localbus/macebusvar.h>
-#include <sgi/xbow/odysseyvar.h>
-
-#if defined(TGT_OCTANE)
-#include <sgi/sgi/ip30.h>
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcidevs.h>
-#endif
-
-#include "gbe.h"
-#include "gio.h"
-#include "iockbc.h"
-#include "impact.h"
-#include "mkbc.h"
-#include "odyssey.h"
-#include "pckbc.h"
-#include "ukbd.h"
-#include "zskbd.h"
-
-cons_decl(ws);
-extern bus_addr_t comconsaddr;
-
-#if defined(TGT_OCTANE) || defined(TGT_ORIGIN)
-struct sgi_device_location console_output;
-struct sgi_device_location console_input;
-int (*output_widget_cninit)(void) = NULL;
-
-int widget_cnprobe(void);
-void widget_cnattach(void);
-#endif
-
-void
-wscnprobe(struct consdev *cp)
-{
- int maj;
-
- /* Locate the major number. */
- for (maj = 0; maj < nchrdev; maj++) {
- if (cdevsw[maj].d_open == wsdisplayopen)
- break;
- }
-
- if (maj == nchrdev) {
- /* We are not in cdevsw[], give up. */
- panic("wsdisplay is not in cdevsw[]");
- }
-
- cp->cn_dev = makedev(maj, 0);
- cp->cn_pri = CN_DEAD;
-
- switch (sys_config.system_type) {
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2)
- case SGI_IP20:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
-#if NGIO > 0
- if (giofb_cnprobe() == 0) {
- if (strncmp(bios_console, "video", 5) == 0)
- cp->cn_pri = CN_FORCED;
- else
- cp->cn_pri = CN_MIDPRI;
- }
-#endif
- break;
-#endif /* TGT_INDIGO || TGT_INDY || TGT_INDIGO2 */
-
-#if defined(TGT_O2)
- case SGI_O2:
-#if NGBE > 0
- if (gbe_cnprobe(&crimebus_tag, GBE_BASE) != 0) {
- if (strncmp(bios_console, "video", 5) == 0)
- cp->cn_pri = CN_FORCED;
- else
- cp->cn_pri = CN_MIDPRI;
- }
-#endif
- break;
-#endif /* TGT_O2 */
-
-#if defined(TGT_ORIGIN)
- case SGI_IP27:
- case SGI_IP35:
- if (widget_cnprobe() != 0) {
- if (strncmp(bios_console,
- "/dev/graphics/textport", 22) == 0)
- cp->cn_pri = CN_FORCED;
- else
- cp->cn_pri = CN_MIDPRI;
- }
- break;
-#endif /* TGT_ORIGIN */
-
-#if defined(TGT_OCTANE)
- case SGI_OCTANE:
- if (widget_cnprobe() != 0) {
- if (strncmp(bios_console, "video", 5) == 0)
- cp->cn_pri = CN_FORCED;
- else
- cp->cn_pri = CN_MIDPRI;
- }
- break;
-#endif /* TGT_OCTANE */
-
- default:
- break;
- }
-}
-
-void
-wscninit(struct consdev *cp)
-{
-static int initted;
-
- if (initted)
- return;
-
- initted = 1;
-
- switch (sys_config.system_type) {
-#if defined(TGT_INDIGO) || defined(TGT_INDY) || defined(TGT_INDIGO2)
- case SGI_IP20:
- case SGI_IP22:
- case SGI_IP26:
- case SGI_IP28:
-#if NGIO > 0
- if (giofb_cnattach() != 0)
- return;
-#endif
- if (sys_config.system_type == SGI_IP20) {
-#if NZSKBD > 0
- extern void zskbd_cnattach(int, int);
- zskbd_cnattach(0, 0);
-#endif
- } else {
-#if NPCKBC > 0
- if (pckbc_cnattach(&hpc3bus_tag,
- HPC_BASE_ADDRESS_0 + IOC_BASE + IOC_KB_REGS + 3,
- KBCMDP - KBDATAP, 0))
- return;
-#endif
- }
- break;
-#endif /* TGT_INDIGO || TGT_INDY || TGT_INDIGO2 */
-
-#if defined(TGT_O2)
- case SGI_O2:
-#if NGBE > 0
- if (gbe_cnattach(&crimebus_tag, GBE_BASE) != 0)
- return;
-#endif
-
-#if NMKBC > 0
- if (mkbc_cnattach(&macebus_tag, MACE_IO_KBC_OFFS) == 0)
- return; /* console keyboard found */
-#endif
-#if NUKBD > 0
- /* fallback keyboard console attachment if the others failed */
- ukbd_cnattach();
-#endif
- break;
-#endif /* TGT_O2 */
-
-#if defined(TGT_OCTANE) || defined(TGT_ORIGIN)
- case SGI_IP27:
- case SGI_IP35:
- case SGI_OCTANE:
- widget_cnattach();
- break;
-#endif /* TGT_OCTANE || TGT_ORIGIN */
-
- default:
- break;
- }
-}
-
-void
-wscnputc(dev_t dev, int i)
-{
- wsdisplay_cnputc(dev, i);
-}
-
-int
-wscngetc(dev_t dev)
-{
- int c;
-
- wskbd_cnpollc(dev, 1);
- c = wskbd_cngetc(dev);
- wskbd_cnpollc(dev, 0);
-
- return c;
-}
-
-void
-wscnpollc(dev_t dev, int on)
-{
- wskbd_cnpollc(dev, on);
-}
-
-/*
- * Try to figure out if we have a glass console widget, and if we have
- * a driver for it.
- */
-
-#if defined(TGT_OCTANE) || defined(TGT_ORIGIN)
-int
-widget_cnprobe()
-{
-#ifdef TGT_ORIGIN
- console_t *cons;
-#endif
-
- switch (sys_config.system_type) {
-#ifdef TGT_ORIGIN
- case SGI_IP27:
- case SGI_IP35:
- /*
- * Our first pass over the KL configuration data has figured
- * out which component is the glass console, if any.
- */
- if (kl_glass_console == NULL)
- return 0;
- kl_get_location(kl_glass_console, &console_output);
-
- cons = kl_get_console();
- kl_get_console_location(cons, &console_input);
- break;
-#endif
-#ifdef TGT_OCTANE
- case SGI_OCTANE:
- console_output.nasid = masternasid;
- console_output.widget = ip30_find_video();
- if (console_output.widget == 0)
- return 0;
-
- console_input.nasid = masternasid;
- console_input.widget = IP30_BRIDGE_WIDGET;
- console_input.bus = 0;
- console_input.device = IP30_IOC_SLOTNO;
- console_input.fn = -1;
- console_input.specific =
- PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3);
- break;
-#endif
- default:
- return 0;
- }
-
- /*
- * Try supported frame buffers in no particular order.
- */
-
-#if NIMPACT_XBOW > 0
- if (impact_xbow_cnprobe() != 0) {
- output_widget_cninit = impact_xbow_cnattach;
- goto success;
- }
-#endif
-#if NODYSSEY > 0
- if (odyssey_cnprobe() != 0) {
- output_widget_cninit = odyssey_cnattach;
- goto success;
- }
-#endif
-
- return 0;
-
-success:
- /*
- * At this point, we are committed to setup a glass console,
- * so prevent serial console from winning over.
- */
- comconsaddr = 0;
-
- return 1;
-}
-
-void
-widget_cnattach()
-{
- /* should not happen */
- if (output_widget_cninit == NULL)
- return;
-
- if ((*output_widget_cninit)() != 0)
- return;
-
-#if NIOCKBC > 0
- if (iockbc_cnattach() == 0)
- return; /* console keyboard found */
-#endif
-#if NUKBD > 0
- /* fallback keyboard console attachment if the others failed */
- ukbd_cnattach();
-#endif
-}
-#endif /* TGT_ORIGIN || TGT_OCTANE */
+++ /dev/null
-# $OpenBSD: Makefile,v 1.8 2012/03/28 20:44:23 miod Exp $
-
-SUBDIR= sgivol
-
-.if ${MACHINE} == "sgi"
-SUBDIR+= libsa libsa32 libz libz32
-SUBDIR+= boot64 boot32 bootecoff
-.endif
-
-.include <bsd.subdir.mk>
+++ /dev/null
-# $OpenBSD: Makefile.inc,v 1.10 2012/10/19 13:51:59 miod Exp $
-# $NetBSD: Makefile.inc,v 1.7 2000/08/20 14:57:16 mrg Exp $
-
-.ifndef __INCLUDED_STAND_MAKEFILE_INC
-__INCLUDED_STAND_MAKEFILE_INC=
-
-BINDIR= /usr/mdec
-
-STANDALONE?= -D_STANDALONE
-
-.if ${MACHINE} == "sgi"
-CPPFLAGS+= ${STANDALONE}
-CPPFLAGS+= -I.
-
-CFLAGS+= -fno-stack-protector -Wall
-CFLAGS+= -fno-builtin-vprintf -fno-builtin-printf -fno-builtin-putchar
-CFLAGS+= -fno-builtin-exit
-SAABI?= -mips3 -mno-abicalls -D_NO_ABICALLS -G 0 -fno-pic -fno-common
-AS?= as
-LD?= ld
-LIBSA_CPPFLAGS?= -DNEEDS_HEAP_H
-.endif
-
-### Figure out what to use for libsa
-LIBSADIR?= ${.CURDIR}/../libsa
-
-.if exists(${LIBSADIR}/${__objdir})
-LIBSAOBJDIR= ${LIBSADIR}/${__objdir}
-.else
-LIBSAOBJDIR= ${LIBSADIR}
-.endif
-
-LIBSA= ${LIBSAOBJDIR}/libsa.a
-
-### Figure out what to use for libz
-LIBZDIR?= ${.CURDIR}/../libz
-
-.if exists(${LIBZDIR}/${__objdir})
-LIBZOBJDIR= ${LIBZDIR}/${__objdir}
-.else
-LIBZOBJDIR= ${LIBZDIR}
-.endif
-
-LIBZ= ${LIBZOBJDIR}/libz.a
-
-.endif
+++ /dev/null
-# $OpenBSD: Makefile32.inc,v 1.6 2016/10/05 11:55:45 visa Exp $
-
-.ifndef __INCLUDED_STAND_MAKEFILE32_INC
-__INCLUDED_STAND_MAKEFILE32_INC=
-
-.if ${MACHINE} == "sgi"
-# Silence warnings
-CFLAGS+= -fno-builtin-snprintf
-CFLAGS+= -fno-builtin-memcpy
-CFLAGS+= -fno-builtin-memcmp
-CFLAGS+= -fno-builtin-memset
-CFLAGS+= -fno-builtin-strncpy
-CFLAGS+= -fno-builtin-strncmp
-# Override toolchain options to force 32 bit binaries
-SAABI= -mno-abicalls -D_NO_ABICALLS -mabi=32 -mips2 -Wa,-G0
-AS?= as
-AS+= -32
-LD?= ld
-LD+= -m elf32btsmip
-LIBSA_CPPFLAGS=
-CFLAGS+= -DLIBSA_LONGLONG_PRINTF
-.endif
-
-### Figure out what to use for libsa and libz
-LIBSADIR= ${.CURDIR}/../libsa32
-LIBZDIR= ${.CURDIR}/../libz32
-
-.endif
+++ /dev/null
-# $OpenBSD: Makefile,v 1.20 2019/10/29 02:55:52 deraadt Exp $
-
-NOMAN= noman
-
-CFLAGS+= ${SAABI} -mno-abicalls -D_NO_ABICALLS -nostdinc -D__sgi__ \
- -I${.CURDIR}/../include -I${.CURDIR}/../../../.. \
- -I${.CURDIR}/../../../../lib/libsa \
- -I${.OBJDIR}
-CFLAGS+= -D__INTERNAL_LIBSA_CREAD ${STANDALONE} -fno-pie
-LDFLAGS+= -nopie -znorelro
-
-AFLAGS+= ${SAABI}
-
-S= ${.CURDIR}/../../../..
-SRCS= start.S arcbios.c boot.c conf.c diskio.c filesystem.c \
- netfs.c netio.c strstr.c
-
-.PATH: ${S}/lib/libsa
-SRCS+= loadfile.c arc4.c
-
-.PATH: ${S}/lib/libkern/arch/mips64 ${S}/lib/libkern
-SRCS+= memcpy.c memmove.c strchr.c strcmp.S strlcat.c strlcpy.c strlen.c \
- strncmp.c strrchr.c
-
-CLEANFILES+= machine mips64
-
-.if !make(clean) && !make(cleandir) && !make(includes) && !make(libdep) && \
- !make(sadep) && !make(salibdir) && !make(obj)
-.BEGIN:
- @([ -h machine ] || ln -s ${.CURDIR}/../../include machine)
- @([ -h mips64 ] || ln -s ${.CURDIR}/../../../mips64/include mips64)
-.endif
+++ /dev/null
-/* $OpenBSD: arcbios.c,v 1.20 2014/03/29 18:09:30 guenther Exp $ */
-/*-
- * Copyright (c) 1996 M. Warner Losh. All rights reserved.
- * Copyright (c) 1996-2004 Opsycon AB. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <lib/libkern/libkern.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/archtype.h>
-#include <machine/autoconf.h>
-#include <machine/cpu.h>
-#include <machine/mnode.h>
-
-#include <stand.h>
-
-#ifdef __LP64__
-int bios_is_32bit;
-#endif
-void *bios_base;
-#ifdef __LP64__
-u_int kl_n_shift = 32;
-#endif
-
-int arcbios_init(void);
-const char *boot_get_path_component(const char *, char *, int *);
-const char *boot_getnr(const char *, int *);
-
-static const struct systypes {
- char *sys_name;
- int sys_ip;
-} sys_types[] = {
- { "SGI-IP20", 20 },
- { "SGI-IP22", 22 },
- { "SGI-IP26", 26 },
- { "SGI-IP28", 28 },
- { "SGI-IP30", 30 },
- { "SGI-IP32", 32 }
-};
-
-#define KNOWNSYSTEMS (nitems(sys_types))
-
-/*
- * ARCBios trampoline code.
- */
-#ifdef __LP64__
-#define ARC_Call(Name,Offset) \
-__asm__("\n" \
-" .text\n" \
-" .ent " #Name "\n" \
-" .align 3\n" \
-" .set noreorder\n" \
-" .globl " #Name "\n" \
-#Name":\n" \
-" lw $3, bios_is_32bit\n"\
-" ld $2, bios_base\n"\
-" beqz $3, 1f\n" \
-" nop\n" \
-" lw $3, 0x20($2)\n" \
-" lw $2," #Offset "($3)\n"\
-" jr $2\n" \
-" nop\n" \
-"1:\n" \
-" ld $3, 2*0x20($2)\n"\
-" ld $2, 2*" #Offset "($3)\n"\
-" jr $2\n" \
-" nop\n" \
-" .end " #Name "\n" );
-#else
-#define ARC_Call(Name,Offset) \
-__asm__("\n" \
-" .text\n" \
-" .ent " #Name "\n" \
-" .align 3\n" \
-" .set noreorder\n" \
-" .globl " #Name "\n" \
-#Name":\n" \
-" lw $2, bios_base\n"\
-" lw $3, 0x20($2)\n" \
-" lw $2," #Offset "($3)\n"\
-" jr $2\n" \
-" nop\n" \
-" .end " #Name "\n" );
-#endif
-
-#if 0
-ARC_Call(Bios_Load, 0x00);
-ARC_Call(Bios_Invoke, 0x04);
-ARC_Call(Bios_Execute, 0x08);
-#endif
-ARC_Call(Bios_Halt, 0x0c);
-#if 0
-ARC_Call(Bios_PowerDown, 0x10);
-ARC_Call(Bios_Restart, 0x14);
-ARC_Call(Bios_Reboot, 0x18);
-#endif
-ARC_Call(Bios_EnterInteractiveMode, 0x1c);
-#if 0
-ARC_Call(Bios_Unused1, 0x20);
-#endif
-ARC_Call(Bios_GetPeer, 0x24);
-ARC_Call(Bios_GetChild, 0x28);
-#if 0
-ARC_Call(Bios_GetParent, 0x2c);
-ARC_Call(Bios_GetConfigurationData, 0x30);
-ARC_Call(Bios_AddChild, 0x34);
-ARC_Call(Bios_DeleteComponent, 0x38);
-ARC_Call(Bios_GetComponent, 0x3c);
-ARC_Call(Bios_SaveConfiguration, 0x40);
-#endif
-ARC_Call(Bios_GetSystemId, 0x44);
-ARC_Call(Bios_GetMemoryDescriptor, 0x48);
-#if 0
-ARC_Call(Bios_Unused2, 0x4c);
-ARC_Call(Bios_GetTime, 0x50);
-ARC_Call(Bios_GetRelativeTime, 0x54);
-ARC_Call(Bios_GetDirectoryEntry, 0x58);
-#endif
-ARC_Call(Bios_Open, 0x5c);
-ARC_Call(Bios_Close, 0x60);
-ARC_Call(Bios_Read, 0x64);
-#if 0
-ARC_Call(Bios_GetReadStatus, 0x68);
-#endif
-ARC_Call(Bios_Write, 0x6c);
-ARC_Call(Bios_Seek, 0x70);
-#if 0
-ARC_Call(Bios_Mount, 0x74);
-ARC_Call(Bios_GetEnvironmentVariable, 0x78);
-ARC_Call(Bios_SetEnvironmentVariable, 0x7c);
-ARC_Call(Bios_GetFileInformation, 0x80);
-ARC_Call(Bios_SetFileInformation, 0x84);
-ARC_Call(Bios_FlushAllCaches, 0x88);
-ARC_Call(Bios_TestUnicodeCharacter, 0x8c);
-ARC_Call(Bios_GetDisplayStatus, 0x90);
-#endif
-
-/*
- * Simple getchar/putchar interface.
- */
-
-#if 0
-int
-getchar()
-{
- char buf[4];
- long cnt;
-
- if (Bios_Read(0, &buf[0], 1, &cnt) != 0)
- return (-1);
-
- return (buf[0] & 255);
-}
-#endif
-
-void
-putchar(int c)
-{
- char buf[4];
- long cnt;
-
- if (c == '\n') {
- buf[0] = '\r';
- buf[1] = c;
- cnt = 2;
- } else {
- buf[0] = c;
- cnt = 1;
- }
-
- Bios_Write(1, &buf[0], cnt, &cnt);
-}
-
-/*
- * Identify ARCBios type.
- */
-int
-arcbios_init()
-{
- arc_config_t *cf;
- arc_sid_t *sid;
-#ifdef __LP64__
- register_t prid;
-#endif
- char *sysid = NULL;
- int sysid_len;
- int i;
-
- /*
- * Figure out where ARCBios can be addressed. On R8000, we can not
- * use compatibility space, but on IP27/IP35, we can not blindly
- * use XKPHYS due to subspacing, while compatibility space works.
- * Fortunately we can get the processor ID to tell these apart, even
- * though 32-bit coprocessor 0 instructions are not supposed to be
- * supported on the R8000 (they probably misbehave somehow if the
- * register has bits sets in the upper 32 bits, which is not the
- * case of the R8000 PrId register).
- */
-#ifdef __LP64__
- __asm__ volatile ("mfc0 %0, $15" /* COP_0_PRID */ : "=r" (prid));
- if ((prid & 0xff00) == (MIPS_R8000 << 8))
- bios_base = (void *)PHYS_TO_XKPHYS(ARCBIOS_BASE, CCA_CACHED);
- else
- bios_base = (void *)PHYS_TO_CKSEG0(ARCBIOS_BASE);
-#else
- bios_base = (void *)(int32_t)PHYS_TO_CKSEG0(ARCBIOS_BASE);
-#endif
-
- /*
- * Figure out if this is an ARCBios machine and if it is, see if we're
- * dealing with a 32 or 64 bit version.
- */
-#ifdef __LP64__
- if ((ArcBiosBase32->magic == ARC_PARAM_BLK_MAGIC) ||
- (ArcBiosBase32->magic == ARC_PARAM_BLK_MAGIC_BUG)) {
- bios_is_32bit = 1;
- } else if ((ArcBiosBase64->magic == ARC_PARAM_BLK_MAGIC) ||
- (ArcBiosBase64->magic == ARC_PARAM_BLK_MAGIC_BUG)) {
- bios_is_32bit = 0;
- }
-#endif
-
- /*
- * Minimal system identification.
- */
- sid = (arc_sid_t *)Bios_GetSystemId();
- cf = (arc_config_t *)Bios_GetChild(NULL);
- if (cf != NULL) {
-#ifdef __LP64__
- if (bios_is_32bit) {
- sysid = (char *)(long)cf->id;
- sysid_len = cf->id_len;
- } else {
- sysid = (char *)((arc_config64_t *)cf)->id;
- sysid_len = ((arc_config64_t *)cf)->id_len;
- }
-#else
- sysid = (char *)(long)cf->id;
- sysid_len = cf->id_len;
-#endif
-
- if (sysid_len > 0 && sysid != NULL) {
- sysid_len--;
- for (i = 0; i < KNOWNSYSTEMS; i++) {
- if (strlen(sys_types[i].sys_name) != sysid_len)
- continue;
- if (strncmp(sys_types[i].sys_name, sysid,
- sysid_len) != 0)
- continue;
- return sys_types[i].sys_ip; /* Found it. */
- }
- }
- } else {
-#ifdef __LP64__
- if (IP27_KLD_KLCONFIG(0)->magic == IP27_KLDIR_MAGIC) {
- /*
- * If we find a kldir assume IP27. Boot blocks
- * do not need to tell IP27 and IP35 apart.
- */
- return 27;
- }
-#endif
- }
-
- printf("UNRECOGNIZED SYSTEM '%s' VENDOR '%s' PRODUCT '%s'\n",
- cf == NULL || sysid == NULL ? "(null)" : sysid,
- sid->vendor, sid->prodid);
- printf("Halting system!\n");
- Bios_Halt();
- printf("Halting failed, use manual reset!\n");
- for (;;) ;
-}
-
-/*
- * Decompose the device pathname and find driver.
- * Returns pointer to remaining filename path in file.
- */
-int
-devopen(struct open_file *f, const char *fname, char **file)
-{
- const char *cp, *ncp, *ecp;
- struct devsw *dp;
- int partition = 0;
- char namebuf[256];
- char devname[32];
- int rc, i, n, noopen = 0;
-
- ecp = cp = fname;
- namebuf[0] = '\0';
-
- /*
- * Scan the component list and find device and partition.
- */
- if (strncmp(cp, "bootp()", 7) == 0) {
- strlcpy(devname, "bootp", sizeof(devname));
- strlcpy(namebuf, cp, sizeof(namebuf));
- noopen = 1;
- } else if (strncmp(cp, "dksc(", 5) == 0) {
- strncpy(devname, "scsi", sizeof(devname));
- cp += 5;
- cp = boot_getnr(cp, &i);
- /* i = controller number */
- if (*cp++ == ',') {
- cp = boot_getnr(cp, &i);
- /* i = target id */
- if (*cp++ == ',') {
- memcpy(namebuf, fname, cp - fname);
- namebuf[cp - fname] = '\0';
- strlcat(namebuf, "0)", sizeof namebuf);
-
- cp = boot_getnr(cp, &i);
- partition = i;
- cp++; /* skip final ) */
- }
- }
- } else {
- ncp = boot_get_path_component(cp, namebuf, &i);
- while (ncp != NULL) {
- if (strcmp(namebuf, "partition") == 0)
- partition = i;
- ecp = ncp;
-
- /* XXX Do this with a table if more devs are added. */
- if (strcmp(namebuf, "scsi") == 0)
- strncpy(devname, namebuf, sizeof(devname));
-
- cp = ncp;
- ncp = boot_get_path_component(cp, namebuf, &i);
- }
-
- memcpy(namebuf, fname, ecp - fname);
- namebuf[ecp - fname] = '\0';
- }
-
- /*
- * Dig out the driver.
- */
- dp = devsw;
- n = ndevs;
- while (n--) {
- if (strcmp(devname, dp->dv_name) == 0) {
- if (noopen)
- rc = 0;
- else
- rc = (dp->dv_open)(f, namebuf, partition, 0);
- if (rc == 0) {
- f->f_dev = dp;
- if (file && *cp != '\0')
- *file = (char *)cp;
- }
- return (rc);
- }
- dp++;
- }
- return (ENXIO);
-}
-
-const char *
-boot_get_path_component(const char *p, char *comp, int *no)
-{
- while (*p && *p != '(')
- *comp++ = *p++;
- *comp = '\0';
-
- if (*p == '\0')
- return (NULL);
-
- *no = 0;
- p++;
- while (*p && *p != ')') {
- if (*p >= '0' && *p <= '9')
- *no = *no * 10 + *p++ - '0';
- else
- return (NULL);
- }
- return (++p);
-}
-
-const char *
-boot_getnr(const char *p, int *no)
-{
- *no = 0;
- while (*p >= '0' && *p <= '9')
- *no = *no * 10 + *p++ - '0';
- return p;
-}
+++ /dev/null
-/* $OpenBSD: boot.c,v 1.30 2020/06/06 10:53:09 visa Exp $ */
-
-/*
- * Copyright (c) 2004 Opsycon AB, www.opsycon.se.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/param.h>
-#include <sys/stat.h>
-#define _KERNEL
-#include <sys/fcntl.h>
-#undef _KERNEL
-
-#include <lib/libkern/libkern.h>
-#include <lib/libsa/arc4.h>
-#include <stand.h>
-
-#include <mips64/arcbios.h>
-#include <mips64/cpu.h>
-
-#include <sys/exec_elf.h>
-#undef ELFSIZE
-#include "loadfile.h"
-
-void dobootopts(int, char **);
-int loadrandom(const char *, const char *, void *, size_t);
-char *strstr(char *, const char *); /* strstr.c */
-
-enum {
- AUTO_NONE,
- AUTO_YES,
- AUTO_NO,
- AUTO_MINI,
- AUTO_DEBUG
-} bootauto = AUTO_NONE;
-char *OSLoadPartition = NULL;
-char *OSLoadFilename = NULL;
-
-int IP;
-
-char rnddata[BOOTRANDOM_MAX];
-struct rc4_ctx randomctx;
-
-/*
- * OpenBSD/sgi Boot Loader.
- */
-void
-boot_main(int argc, char *argv[])
-{
- uint64_t marks[MARK_MAX];
- u_int64_t *esym;
- char line[1024];
- u_long entry;
- int fd;
- extern int arcbios_init(void);
- extern char version[];
-
- IP = arcbios_init();
- printf("\nOpenBSD/sgi-IP%d ARCBios boot version %s\n", IP, version);
- /* we want to print IP20 but load IP22 */
- if (IP == 20)
- IP = 22;
-
- for (entry = 0; entry < argc; entry++)
- printf("arg %d: %s\n", entry, argv[entry]);
-
- dobootopts(argc, argv);
- if (OSLoadPartition == NULL) {
- /*
- * Things are probably horribly wrong, or user has no idea
- * what's he's doing. Be nice lads and try to provide
- * working defaults, which ought to work on all systems.
- */
- OSLoadPartition = "disk(0)part(0)";
- }
- strlcpy(line, OSLoadPartition, sizeof(line));
- if (OSLoadFilename != NULL)
- strlcat(line, OSLoadFilename, sizeof(line));
-
- printf("Boot: %s\n", line);
-
- /*
- * Try and load randomness if booting from a disk.
- */
-
- if (bootauto != AUTO_MINI &&
- strstr(OSLoadPartition, "bootp(") == NULL &&
- strstr(OSLoadPartition, "cdrom(") == NULL) {
- /* XXX set RB_GOODRANDOM in boothowto */
- loadrandom(OSLoadPartition, BOOTRANDOM, rnddata,
- sizeof(rnddata));
- }
-
- rc4_keysetup(&randomctx, rnddata, sizeof rnddata);
- rc4_skip(&randomctx, 1536);
-
- /*
- * Load the kernel and symbol table.
- */
-
- marks[MARK_START] = 0;
- if ((fd = loadfile(line, marks, LOAD_KERNEL | COUNT_KERNEL)) != -1) {
- (void)close(fd);
-
- entry = marks[MARK_ENTRY];
-#ifdef __LP64__
- esym = (u_int64_t *)marks[MARK_END];
-#else
-#undef CKSEG0_BASE
-#define CKSEG0_BASE 0xffffffff80000000ULL
- esym = (u_int64_t *)(uint32_t)PHYS_TO_CKSEG0(marks[MARK_END]);
-#endif
-
- if (entry != 0)
- ((void (*)())entry)(argc, argv, esym);
- }
-
- /* We failed to load the kernel. */
- panic("Boot FAILED!");
- /* NOTREACHED */
-}
-
-__dead void
-_rtt()
-{
- Bios_EnterInteractiveMode();
- for (;;) ;
-}
-
-/*
- * Decode boot options.
- */
-void
-dobootopts(int argc, char **argv)
-{
- static char filenamebuf[1 + 32];
- char *SystemPartition = NULL;
- char *cp, *sep;
- int i;
- char *writein = NULL;
-
- for (i = 1; i < argc; i++) {
- cp = argv[i];
- if (cp == NULL)
- continue;
- if (strncmp(cp, "OSLoadOptions=", 14) == 0) {
- if (strcmp(&cp[14], "auto") == 0)
- bootauto = AUTO_YES;
- else if (strcmp(&cp[14], "single") == 0)
- bootauto = AUTO_NO;
- else if (strcmp(&cp[14], "mini") == 0)
- bootauto = AUTO_MINI;
- else if (strcmp(&cp[14], "debug") == 0)
- bootauto = AUTO_DEBUG;
- } else if (strncmp(cp, "OSLoadPartition=", 16) == 0)
- OSLoadPartition = &cp[16];
- else if (strncmp(cp, "OSLoadFilename=", 15) == 0)
- OSLoadFilename = &cp[15];
- else if (strncmp(cp, "SystemPartition=", 16) == 0)
- SystemPartition = &cp[16];
- else {
- /*
- * Either a boot-related environment variable, or
- * a boot write-in (boot path or options to the
- * program being loaded).
- */
- if (*cp == '-')
- continue; /* options */
- if (strchr(cp, '=') != NULL)
- continue; /* variable (or bad choice */
- /* of filename) */
- if (writein == NULL)
- writein = cp;
- }
- }
-
- switch (bootauto) {
- case AUTO_NONE:
- /* If "OSLoadOptions=" is missing, use boot path if given. */
- if (writein != NULL) {
- /* check for a possible path component */
- sep = strchr(writein, '(');
- if (sep != NULL && strchr(sep, ')') != NULL) {
- /* looks like this is a full path */
- OSLoadPartition = "";
- } else {
- /* relative path, keep OSLoadPartition */
- }
- OSLoadFilename = writein;
- }
- break;
- case AUTO_MINI:
- {
- static char loadpart[64];
- char *p;
-
- strlcpy(loadpart, argv[0], sizeof loadpart);
- if ((p = strstr(loadpart, "partition(8)")) != NULL) {
- p += strlen("partition(");
- } else if (strncmp(loadpart, "dksc(", 5) == 0) {
- p = strstr(loadpart, ",8)");
- if (p != NULL)
- p++;
- } else
- p = NULL;
-
- if (p != NULL) {
- p[0] = '0';
- p[2] = '\0';
- snprintf(filenamebuf, sizeof filenamebuf,
- "/bsd.rd.IP%d", IP);
- OSLoadPartition = loadpart;
- OSLoadFilename = filenamebuf;
- }
- }
- break;
- default:
- break;
- }
-}
-
-/*
- * Prevent loading a wrong kernel.
- */
-int
-check_phdr(void *v)
-{
- Elf64_Phdr *phdr = (Elf64_Phdr *)v;
- uint64_t addr;
-
- switch (IP) {
- case 22:
- addr = 0xffffffff88000000ULL >> 24;
- break;
- case 26:
- addr = 0xa800000008000000ULL >> 24;
- break;
- case 27:
- addr = 0xa800000000000000ULL >> 24;
- break;
- case 28:
- case 30:
- addr = 0xa800000020000000ULL >> 24;
- break;
- case 32:
- addr = 0xffffffff80000000ULL >> 24;
- break;
- default:
- /*
- * If the system could not be identified, accept any
- * address and hope the user knows what's he's doing.
- */
- return 0;
- }
-
- if ((phdr->p_vaddr >> 24) != addr) {
- /* I'm sorry Dave, I can't let you do that. */
- printf("This kernel does not seem to be compiled for this"
- " machine type.\nYou need to boot an IP%d kernel.\n", IP);
- return 1;
- }
-
- return 0;
-}
-
-/*
- * Load the saved randomness file.
- */
-int
-loadrandom(const char *partition, const char *name, void *buf, size_t buflen)
-{
- char path[MAXPATHLEN];
- struct stat sb;
- int fd, error = 0;
-
- strlcpy(path, partition, sizeof path);
- strlcat(path, name, sizeof path);
-
- fd = open(path, O_RDONLY);
- if (fd == -1) {
- if (errno != EPERM)
- printf("cannot open %s: %s\n", path, strerror(errno));
- return (-1);
- }
- if (fstat(fd, &sb) == -1) {
- error = -1;
- goto done;
- }
- if (read(fd, buf, buflen) != buflen) {
- error = -1;
- goto done;
- }
- if (sb.st_mode & S_ISTXT) {
- printf("NOTE: random seed is being reused.\n");
- error = -1;
- goto done;
- }
- fchmod(fd, sb.st_mode | S_ISTXT);
-done:
- close(fd);
- return (error);
-}
+++ /dev/null
-/* $OpenBSD: conf.c,v 1.9 2020/12/09 18:10:19 krw Exp $ */
-
-/*
- * Copyright (c) 1997 Per Fogelstrom
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#include <stand.h>
-
-const char version[] = "1.13";
-
-extern void nullsys();
-extern int nodev();
-extern int noioctl();
-
-int diostrategy(void *, int, daddr_t, size_t, void *, size_t *);
-int dioopen(struct open_file *, ...);
-int dioclose(struct open_file *);
-#define dioioctl noioctl
-
-int netstrategy(void *, int, daddr_t, size_t, void *, size_t *);
-int netopen(struct open_file *, ...);
-int netclose(struct open_file *);
-#define netioctl noioctl
-
-struct devsw devsw[] = {
- { "scsi", diostrategy, dioopen, dioclose, dioioctl },
- { "bootp", netstrategy, netopen, netclose, netioctl }
-};
-
-int ndevs = (sizeof(devsw)/sizeof(devsw[0]));
+++ /dev/null
-/* $OpenBSD: diskio.c,v 1.14 2020/12/09 18:10:19 krw Exp $ */
-
-/*
- * Copyright (c) 2016 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2000 Opsycon AB (www.opsycon.se)
- * Copyright (c) 2000 Rtmx, Inc (www.rtmx.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for Rtmx, Inc by
- * Opsycon Open System Consulting AB, Sweden.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/param.h>
-#include <lib/libkern/libkern.h>
-#include <stand.h>
-
-#include <sys/disklabel.h>
-#include <mips64/arcbios.h>
-
-char *strstr(char *, const char *); /* strstr.c */
-
-struct dio_softc {
- int sc_fd; /* PROM file ID */
- int sc_part; /* Disk partition number. */
- struct disklabel sc_label; /* Disk label for this disk. */
-};
-
-int
-diostrategy(void *devdata, int rw, daddr_t bn, size_t reqcnt, void *addr,
- size_t *cnt)
-{
- struct dio_softc *sc = (struct dio_softc *)devdata;
- struct partition *pp = &sc->sc_label.d_partitions[sc->sc_part];
- uint64_t blkoffset;
- arc_quad_t offset;
- long result;
-
- if (rw != F_READ)
- return EOPNOTSUPP;
-
- blkoffset =
- (DL_SECTOBLK(&sc->sc_label, DL_GETPOFFSET(pp)) + bn) * DEV_BSIZE;
- offset.hi = blkoffset >> 32;
- offset.lo = blkoffset;
-
- if (Bios_Seek(sc->sc_fd, &offset, 0) < 0 ||
- Bios_Read(sc->sc_fd, addr, reqcnt, &result) < 0)
- return EIO;
-
- if (cnt != NULL)
- *cnt = result;
- return 0;
-}
-
-int
-dioopen(struct open_file *f, ...)
-{
- char *ctlr;
- int partition;
- struct dio_softc *sc;
- struct disklabel *lp;
- struct sgilabel *sl;
- long fd;
- /* XXX getdisklabel() assumes DEV_BSIZE bytes available */
- char buf[DEV_BSIZE + LABELOFFSET];
- arc_quad_t offset;
- daddr_t native_offset;
- long result;
- va_list ap;
- char rawctlr[1 + MAXPATHLEN];
- char *partptr;
-
- va_start(ap, f);
- ctlr = va_arg(ap, char *);
- partition = va_arg(ap, int);
- va_end(ap);
-
- if (partition >= MAXPARTITIONS)
- return ENXIO;
-
- /*
- * If booting from disk, `ctlr` is something like
- * whatever()partition(0)
- * or
- * dksc(whatever,0)
- * where 0 is the volume header #0 partition, which is the
- * OpenBSD area, where the OpenBSD disklabel can be found.
- *
- * However, the OpenBSD `a' partition, where the kernel is to be
- * found, may not start at the same offset.
- *
- * In order to be able to correctly load any file from the OpenBSD
- * partitions, we need to access the volume header partition table
- * and the OpenBSD label.
- *
- * Therefore, make sure we replace `partition(*)' with `partition(10)'
- * before reaching ARCBios, in order to access the raw disk.
- *
- * We could use partition #8 and use the value of SystemPartition in
- * the environment to avoid doing this, but this would prevent us
- * from being able to boot from a different disk than the one
- * pointed to by SystemPartition.
- */
-
- strlcpy(rawctlr, ctlr, sizeof rawctlr);
- partptr = strstr(rawctlr, "partition(");
- if (partptr != NULL) {
- strlcpy(partptr, "partition(10)",
- sizeof rawctlr - (partptr - rawctlr));
- } else {
- if ((partptr = strstr(rawctlr, "dksc(")) != NULL) {
- partptr = strstr(partptr, ",0)");
- if (partptr != NULL && partptr[3] == '\0')
- strlcpy(partptr, ",10)",
- sizeof rawctlr - (partptr - rawctlr));
- }
- }
-
- sl = NULL; /* no volume header found yet */
- if (partptr != NULL) {
- if (Bios_Open(rawctlr, 0, &fd) < 0)
- return ENXIO;
-
- /*
- * Read the volume header.
- */
- offset.hi = offset.lo = 0;
- if (Bios_Seek(fd, &offset, 0) < 0 ||
- Bios_Read(fd, buf, DEV_BSIZE, &result) < 0 ||
- result != DEV_BSIZE)
- return EIO;
-
- sl = (struct sgilabel *)buf;
- if (sl->magic != SGILABEL_MAGIC) {
-#ifdef DEBUG
- printf("Invalid volume header magic %x\n", sl->magic);
-#endif
- Bios_Close(fd);
- sl = NULL;
- }
- }
-
- if (sl == NULL) {
- if (Bios_Open(ctlr, 0, &fd) < 0)
- return ENXIO;
- }
-
- sc = alloc(sizeof(struct dio_softc));
- bzero(sc, sizeof(struct dio_softc));
- f->f_devdata = (void *)sc;
- lp = &sc->sc_label;
-
- sc->sc_fd = fd;
- sc->sc_part = partition;
-
- if (sl != NULL) {
- native_offset = sl->partitions[0].first;
- } else {
- /*
- * We could not read the volume header, or there isn't any.
- * Stick to the device we were given, and assume the
- * OpenBSD disklabel can be found at the beginning.
- */
- native_offset = 0;
- }
-
- /*
- * Read the native OpenBSD label.
- */
-#ifdef DEBUG
- printf("OpenBSD label @%lld\n", native_offset + LABELSECTOR);
-#endif
- offset.hi = ((native_offset + LABELSECTOR) * DEV_BSIZE) >> 32;
- offset.lo = (native_offset + LABELSECTOR) * DEV_BSIZE;
-
- if (Bios_Seek(fd, &offset, 0) < 0 ||
- Bios_Read(fd, buf, DEV_BSIZE, &result) < 0 ||
- result != DEV_BSIZE)
- return EIO;
-
- if (getdisklabel(buf + LABELOFFSET, lp) == NULL) {
-#ifdef DEBUG
- printf("Found native disklabel, "
- "partition %c starts at %lld\n",
- 'a' + partition,
- DL_GETPOFFSET(&lp->d_partitions[partition]));
-#endif
- } else {
- /*
- * Assume the OpenBSD partition spans the whole device.
- */
- lp->d_secsize = DEV_BSIZE;
- lp->d_secpercyl = 1;
- lp->d_npartitions = MAXPARTITIONS;
- DL_SETPOFFSET(&lp->d_partitions[partition], native_offset);
- DL_SETPSIZE(&lp->d_partitions[partition], -1ULL);
-#ifdef DEBUG
- printf("No native disklabel found, "
- "assuming partition %c starts at %lld\n",
- 'a' + partition, native_offset);
-#endif
- }
-
- return 0;
-}
-
-int
-dioclose(struct open_file *f)
-{
- Bios_Close(((struct dio_softc *)f->f_devdata)->sc_fd);
- free(f->f_devdata, sizeof(struct dio_softc));
- f->f_devdata = NULL;
- return (0);
-}
+++ /dev/null
-/* $NetBSD: filesystem.c,v 1.2 1995/02/16 02:33:05 cgd Exp $ */
-
-/*
- * Copyright (c) 1993 Philip A. Nelson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Philip A. Nelson.
- * 4. The name of Philip A. Nelson may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY PHILIP NELSON ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL PHILIP NELSON BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * filesystem.c
- */
-
-#include <stand.h>
-#include <ufs.h>
-#include <ufs2.h>
-#include "netfs.h"
-
-struct fs_ops file_system[] = {
- { netfs_open, netfs_close, netfs_read, netfs_write, netfs_seek,
- netfs_stat },
- { ufs_open, ufs_close, ufs_read, ufs_write, ufs_seek,
- ufs_stat, ufs_readdir, ufs_fchmod },
- { ufs2_open, ufs2_close, ufs2_read, ufs2_write, ufs2_seek,
- ufs2_stat, ufs2_readdir, ufs2_fchmod },
-};
-
-int nfsys = sizeof(file_system)/sizeof(struct fs_ops);
+++ /dev/null
-/* $OpenBSD: netfs.c,v 1.3 2020/12/09 18:10:19 krw Exp $ */
-
-/*-
- * Copyright (c) 2001 Steve Murphree, Jr.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by TooLs GmbH.
- * 4. The name of TooLs GmbH may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * TFTP file system.
- */
-
-#include <sys/param.h>
-#include <lib/libkern/libkern.h>
-#include <stand.h>
-
-#include <sys/stat.h>
-
-#include "netfs.h"
-
-/*
- * In-core open file.
- */
-struct tftp_file {
- char filename[128];
- off_t f_seekp; /* seek pointer */
- char *f_buf; /* buffer for data block */
- off_t f_off; /* index into buffer for data block */
- daddr32_t f_buf_blkno; /* block number of data block */
- size_t f_buf_size;
-};
-
-#define TFTP_BLOCK_SHIFT 9
-#define TFTP_BLOCK_SIZE (1<<TFTP_BLOCK_SHIFT) /* 512 by tftp convention */
-#define TFTP_BLOCK_NO(x) ((x >> TFTP_BLOCK_SHIFT) + 1)
-#define TFTP_BLOCK_OFF(x) (x % TFTP_BLOCK_SIZE)
-
-static int tftp_read_file(struct open_file *, char **, size_t *);
-
-/*
- * Read a portion of a file into an internal buffer. Return
- * the location in the buffer and the amount in the buffer.
- */
-
-char tftp_buf[TFTP_BLOCK_SIZE]; /* static */
-struct tftp_file tftp_ctrl;
-
-static int
-tftp_read_file(f, buf_p, size_p)
- struct open_file *f;
- char **buf_p; /* out */
- size_t *size_p; /* out */
-{
- struct tftp_file *fp = (struct tftp_file *)f->f_fsdata;
- long off;
- daddr32_t file_block;
- size_t block_size;
- int i, rc;
-
- off = TFTP_BLOCK_OFF(fp->f_seekp);
- file_block = TFTP_BLOCK_NO(fp->f_seekp);
- block_size = TFTP_BLOCK_SIZE;
-
- if (file_block == fp->f_buf_blkno + 1) {
- /*
- * Normal, incremental block transfer.
- */
- rc = (f->f_dev->dv_strategy)(f->f_devdata, F_READ,
- file_block, block_size, fp->f_buf, &fp->f_buf_size);
- if (rc)
- return (rc);
- if (!(file_block % 4)) /* twiddle every 4 blocks */
- twiddle();
- fp->f_buf_blkno = file_block;
- } else if (file_block > fp->f_buf_blkno + 1) {
- /*
- * Read ahead to the requested block; If we need
- * those we skipped, see below.
- */
- for (i = (fp->f_buf_blkno + 1); i <= file_block; i++) {
- rc = (f->f_dev->dv_strategy)(f->f_devdata, F_READ,
- i, block_size, fp->f_buf, &fp->f_buf_size);
- if (rc)
- return (rc);
- }
- fp->f_buf_blkno = file_block;
- } else if (file_block < fp->f_buf_blkno) {
- /*
- * Uh oh... We can't rewind. Reopen the file
- * and start again.
- */
- char filename[128];
-
- strlcpy(filename, fp->filename, sizeof filename);
- netfs_close(f);
- netfs_open(filename, f);
-
- /* restore f_seekp reset by netfs_open() */
- fp->f_seekp = (file_block - 1) * TFTP_BLOCK_SIZE + off;
- for (i = 1; i <= file_block; i++) {
- rc = (f->f_dev->dv_strategy)(f->f_devdata, F_READ,
- i, block_size, fp->f_buf, &fp->f_buf_size);
- if (rc)
- return (rc);
- }
- fp->f_buf_blkno = file_block;
- }
-
- /*
- * Return address of byte in buffer corresponding to
- * offset, and size of remainder of buffer after that
- * byte.
- */
- *buf_p = fp->f_buf + off;
- *size_p = fp->f_buf_size - off;
-
- /*
- * But truncate buffer at end of file.
- */
- if (fp->f_buf_size > block_size){
- twiddle();
- return(EIO);
- }
-
-
- return (0);
-}
-
-/*
- * Open a file.
- */
-int
-netfs_open(path, f)
- char *path;
- struct open_file *f;
-{
- struct tftp_file *fp;
- int rc = 0;
-extern int netstrategy(void *, int, daddr_t, size_t, void *, size_t *);
-
- if (f->f_dev->dv_strategy != netstrategy)
- return EINVAL;
-
- /* locate file system specific data structure and zero it.*/
- fp = &tftp_ctrl;
- bzero(fp, sizeof(struct tftp_file));
- f->f_fsdata = (void *)fp;
- fp->f_seekp = 0;
- fp->f_buf = tftp_buf;
- bzero(fp->f_buf, TFTP_BLOCK_SIZE);
- fp->f_buf_size = 0;
-
- strlcpy(fp->filename, path, sizeof fp->filename);
-
- twiddle();
- rc = (f->f_dev->dv_open)(f, path);
- return (rc);
-}
-
-int
-netfs_close(f)
- struct open_file *f;
-{
- struct tftp_file *fp = (struct tftp_file *)f->f_fsdata;
-
- fp->f_buf = NULL;
- f->f_fsdata = NULL;
- (f->f_dev->dv_close)(f);
- return (0);
-}
-
-/*
- * Copy a portion of a file into kernel memory.
- * Cross block boundaries when necessary.
- */
-int
-netfs_read(f, start, size, resid)
- struct open_file *f;
- void *start;
- size_t size;
- size_t *resid; /* out */
-{
- struct tftp_file *fp = (struct tftp_file *)f->f_fsdata;
- size_t csize;
- char *buf;
- size_t buf_size;
- int rc = 0;
- char *addr = start;
-
- while (size != 0) {
- rc = tftp_read_file(f, &buf, &buf_size);
- if (rc)
- break;
-
- csize = size;
- if (csize > buf_size)
- csize = buf_size;
-
- bcopy(buf, addr, csize);
-
- fp->f_seekp += csize;
- addr += csize;
- size -= csize;
- }
- if (resid)
- *resid = size;
- return (rc);
-}
-
-/*
- * Not implemented.
- */
-int
-netfs_write(f, start, size, resid)
- struct open_file *f;
- void *start;
- size_t size;
- size_t *resid; /* out */
-{
-
- return (EROFS);
-}
-
-/*
- * We only see forward. We can't rewind.
- */
-off_t
-netfs_seek(f, offset, where)
- struct open_file *f;
- off_t offset;
- int where;
-{
- struct tftp_file *fp = (struct tftp_file *)f->f_fsdata;
-
- switch (where) {
- case SEEK_SET:
- fp->f_seekp = offset;
- break;
- case SEEK_CUR:
- fp->f_seekp += offset;
- break;
- case SEEK_END:
- errno = EIO;
- return (-1);
- break;
- default:
- return (-1);
- }
- return (fp->f_seekp);
-}
-
-int
-netfs_stat(f, sb)
- struct open_file *f;
- struct stat *sb;
-{
- return EIO;
-}
-
-#ifndef NO_READDIR
-int
-netfs_readdir (struct open_file *f, char *name)
-{
- return EIO;
-}
-#endif
-
+++ /dev/null
-/* $OpenBSD: netfs.h,v 1.1 2012/03/19 17:38:31 miod Exp $ */
-
-/*-
- * Copyright (c) 2001 Steve Murphree, Jr.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by TooLs GmbH.
- * 4. The name of TooLs GmbH may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-int netfs_open(char *path, struct open_file *f);
-int netfs_close(struct open_file *f);
-int netfs_read(struct open_file *f, void *buf,
- size_t size, size_t *resid);
-int netfs_write(struct open_file *f, void *buf,
- size_t size, size_t *resid);
-off_t netfs_seek(struct open_file *f, off_t offset, int where);
-int netfs_stat(struct open_file *f, struct stat *sb);
-#ifndef NO_READDIR
-int netfs_readdir(struct open_file *f, char *name);
-#endif
+++ /dev/null
-/* $OpenBSD: netio.c,v 1.3 2020/12/09 18:10:19 krw Exp $ */
-
-/*
- * Copyright (c) 2012 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-
-#include <sys/param.h>
-#include <lib/libkern/libkern.h>
-#include <stand.h>
-
-#include <mips64/arcbios.h>
-
-int
-netstrategy(void *devdata, int rw, daddr_t bn, size_t reqcnt, void *addr,
- size_t *cnt)
-{
- long fd = (long)devdata;
- long result;
- int rc;
-
- if (rw != F_READ)
- return EOPNOTSUPP;
-
- rc = Bios_Read(fd, addr, reqcnt, &result);
- if (rc != 0)
- return (EIO);
-
- if (cnt != NULL)
- *cnt = result;
- return 0;
-}
-
-int
-netopen(struct open_file *f, ...)
-{
- char *path;
- long fd;
- int rc;
- va_list ap;
-
- va_start(ap, f);
- path = va_arg(ap, char *);
- va_end(ap);
-
- /* to match netfs.c filename buffers... */
- if (strlen(path) > 128 - 1)
- return ENAMETOOLONG;
-
- rc = Bios_Open(path, 0, &fd);
- if (rc != 0) {
- switch (rc) {
- case arc_EACCES:
- return EACCES;
- case arc_EISDIR:
- return EISDIR;
- case arc_ENOENT:
- return ENOENT;
- default:
- return ENXIO;
- }
- }
-
- f->f_devdata = (void *)fd;
-
- return 0;
-}
-
-int
-netclose(struct open_file *f)
-{
- long fd = (long)f->f_devdata;
-
- (void)Bios_Close(fd);
- return 0;
-}
+++ /dev/null
-/* $OpenBSD: start.S,v 1.4 2012/09/29 21:40:48 miod Exp $ */
-
-/*
- * Copyright (c) 2001 Opsycon AB (www.opsycon.se)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed under OpenBSD by
- * Opsycon AB, Sweden (www.opsycon.com).
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#define ABICALLS
-
-#include <machine/regdef.h>
-#include <machine/asm.h>
-
-/*
- * Frame required for the debugger (if we have any).
- */
-#define START_FRAME ((4 * 4) + 4 + 4)
-
- .globl __start
-__start:
-#ifndef __LP64__ /* LP64 code is compiled without gp support */
- LA gp, _gp
-#endif
-
- jal boot_main
-
-1:
- b 1b
-
+++ /dev/null
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Chris Torek.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <lib/libkern/libkern.h>
-
-/*
- * Find the first occurrence of find in s.
- */
-char *
-strstr(char *s, const char *find)
-{
- char c, sc;
- size_t len;
-
- if ((c = *find++) != 0) {
- len = strlen(find);
- do {
- do {
- if ((sc = *s++) == 0)
- return (NULL);
- } while (sc != c);
- } while (strncmp(s, find, len) != 0);
- s--;
- }
- return s;
-}
+++ /dev/null
-# $OpenBSD: Makefile,v 1.3 2020/04/06 02:10:33 visa Exp $
-
-.include "${.CURDIR}/../Makefile32.inc"
-LDSCRIPT= ${.CURDIR}/ld.script
-LDFLAGS+= ${SALDFLAGS} -T ${LDSCRIPT} -e __start -s
-PROG= boot32
-.PATH: ${.CURDIR}/../boot
-.include "${.CURDIR}/../boot/Makefile"
-
-SRCS+= ashrdi3.c divdi3.c moddi3.c udivdi3.c umoddi3.c qdivrem.c
-
-${PROG}: $(OBJS) $(LDADD)
- $(LD) $(LDFLAGS) -o ${PROG} $(OBJS) -L${LIBSADIR} ${LIBSA} \
- -L${LIBZDIR} ${LIBZ}
-
-LINKS= ${BINDIR}/${PROG} ${BINDIR}/boot-IP32
-
-.include <bsd.prog.mk>
+++ /dev/null
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips",
- "elf32-tradlittlemips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = 0x80010000 + SIZEOF_HEADERS;
- .text :
- {
- _ftext = . ;
- *(.text)
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.reginfo)
- *(.init)
- *(.stub)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- } =0
- _etext = .;
- PROVIDE (etext = .);
- .fini : { *(.fini) } =0
- .data :
- {
- _fdata = . ;
- *(.data)
- CONSTRUCTORS
- }
- .data1 : { *(.data1) }
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
- _gp = ALIGN(16) + 0x7ff0;
- .got :
- {
- *(.got.plt) *(.got)
- }
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- .sdata : { *(.sdata) }
- .lit8 : { *(.lit8) }
- .lit4 : { *(.lit4) }
- _edata = .;
- PROVIDE (edata = .);
- __bss_start = .;
- _fbss = .;
- .sbss : { *(.sbss) *(.scommon) }
- .bss :
- {
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
- /* These are needed for ELF backends which have not yet been
- converted to the new style linker. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- /* DWARF debug sections.
- Symbols in the .debug DWARF section are relative to the beginning of the
- section so we begin .debug at 0. It's not clear yet what needs to happen
- for the others. */
- .debug 0 : { *(.debug) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .line 0 : { *(.line) }
- /* These must appear regardless of . */
- .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
- .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
-}
+++ /dev/null
-# $OpenBSD: Makefile,v 1.4 2015/09/27 19:11:37 miod Exp $
-
-LDFLAGS+= ${SALDFLAGS} --oformat=elf64-tradbigmips -e __start
-STRIP= strip
-INSTALL_STRIP=
-
-PROG= boot64
-.PATH: ${.CURDIR}/../boot
-.include "${.CURDIR}/../boot/Makefile"
-
-${PROG}: $(OBJS) $(LDADD)
- @# Link first as self-contained binary to enforce there are no
- @# unresolved symbols
- $(LD) $(LDFLAGS) -o ${PROG} $(OBJS) -L${LIBSADIR} ${LIBSA} \
- -L${LIBZDIR} ${LIBZ}
- @# then link as a relocatable binary
- $(LD) $(LDFLAGS) -r -o ${PROG} $(OBJS) -L${LIBSADIR} ${LIBSA} \
- -L${LIBZDIR} ${LIBZ}
- $(STRIP) --strip-unneeded ${PROG}
-
-LINKS= ${BINDIR}/${PROG} ${BINDIR}/boot-IP26
-LINKS+= ${BINDIR}/${PROG} ${BINDIR}/boot-IP27
-LINKS+= ${BINDIR}/${PROG} ${BINDIR}/boot-IP28
-LINKS+= ${BINDIR}/${PROG} ${BINDIR}/boot-IP30
-
-.include <bsd.prog.mk>
+++ /dev/null
-# $OpenBSD: Makefile,v 1.2 2020/04/06 16:23:44 visa Exp $
-
-.include "${.CURDIR}/../Makefile32.inc"
-STRIP?= strip
-LDSCRIPT= ${.CURDIR}/ld.script
-LDFLAGS+= ${SALDFLAGS} -T ${LDSCRIPT} -e __start -N -s
-PROG= bootecoff
-.PATH: ${.CURDIR}/../boot
-.include "${.CURDIR}/../boot/Makefile"
-
-SRCS+= ashrdi3.c divdi3.c moddi3.c udivdi3.c umoddi3.c qdivrem.c
-
-${PROG}: $(OBJS) $(LDADD)
- $(LD) $(LDFLAGS) -o ${PROG} $(OBJS) -L${LIBSADIR} ${LIBSA} \
- -L${LIBZDIR} ${LIBZ}
-
-LINKS= ${BINDIR}/${PROG} ${BINDIR}/boot-IP22
-
-.include <bsd.prog.mk>
+++ /dev/null
-OUTPUT_FORMAT("ecoff-bigmips", "ecoff-bigmips",
- "ecoff-littlemips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = 0x88002000 + SIZEOF_HEADERS;
- .text :
- {
- _ftext = . ;
- *(.text)
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.reginfo)
- *(.init)
- *(.stub)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- } =0
- _etext = .;
- PROVIDE (etext = .);
- .fini : { *(.fini) } =0
- .data :
- {
- _fdata = . ;
- *(.data)
- CONSTRUCTORS
- }
- .data1 : { *(.data1) }
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
- _gp = ALIGN(16) + 0x7ff0;
- .got :
- {
- *(.got.plt) *(.got)
- }
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- .sdata : { *(.sdata) }
- .lit8 : { *(.lit8) }
- .lit4 : { *(.lit4) }
- _edata = .;
- PROVIDE (edata = .);
- __bss_start = .;
- _fbss = .;
- .sbss : { *(.sbss) *(.scommon) }
- .bss :
- {
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
- /DISCARD/ : {
- *(.pdr)
- *(.mdebug.abi32)
- *(.comment)
- *(.stab)
- *(.stabstr)
- *(.debug)
- *(.debug_srcinfo)
- *(.debug_aranges)
- *(.debug_pubnames)
- *(.debug_sfnames)
- *(.line)
- }
-}
+++ /dev/null
-# $OpenBSD: Makefile,v 1.14 2020/05/25 16:27:05 deraadt Exp $
-
-LIB= sa
-
-.PATH: ${.CURDIR}/../../../../lib/libsa
-
-CLEANFILES += machine mips64
-
-CFLAGS+= ${CEXTRAFLAGS} ${SAABI} -nostdinc -mno-abicalls -D_NO_ABICALLS \
- -fno-pie \
- -I${.CURDIR} -I${.CURDIR}/../include -I${.CURDIR}/../.. \
- -I${.CURDIR}/../../.. -I${.CURDIR}/../../../.. \
- -I${.CURDIR}/../../../../lib/libsa \
- -I${.OBJDIR}
-
-CPPFLAGS+= -D__INTERNAL_LIBSA_CREAD ${STANDALONE}
-CPPFLAGS+= ${LIBSA_CPPFLAGS}
-
-# stand routines
-SRCS= alloc.c exit.c getfile.c getln.c globals.c \
- memcmp.c memcpy.c memmove.c memset.c printf.c snprintf.c strerror.c strncpy.c
-
-# io routines
-SRCS+= close.c closeall.c dev.c disklabel.c dkcksum.c fchmod.c \
- fstat.c fchmod.c ioctl.c lseek.c open.c read.c stat.c write.c cread.c
-
-# boot filesystems
-SRCS+= ufs.c ufs2.c nfs.c cd9660.c
-
-${OBJS}: ${.CURDIR}/../Makefile.inc
-
-NOPROFILE=
-NOPIC=
-
-.if !make(clean) && !make(cleandir) && !make(includes) && !make(libdep) && \
- !make(sadep) && !make(salibdir) && !make(obj)
-.BEGIN:
- @([ -h machine ] || ln -s ${.CURDIR}/../../include machine)
- @([ -h mips64 ] || ln -s ${.CURDIR}/../../../mips64/include mips64)
-.endif
-
-install:
-
-.include <bsd.lib.mk>
+++ /dev/null
-/* $OpenBSD: heap.h,v 1.1 2009/05/14 18:57:43 miod Exp $ */
-/* public domain */
-
-/*
- * Declarations for the libsa heap allocator.
- *
- * Relocatable 64 bit bootblocks use memory below the load address and
- * can not use the `end' symbol.
- */
-
-#ifdef __LP64__
-#define NEEDS_HEAP_INIT
-
-#define HEAP_LIMIT heap_limit
-#define HEAP_SIZE (1UL << 20) /* 1MB */
-#define HEAP_START heap_start
-
-static unsigned long heap_start;
-static unsigned long heap_limit;
-static char *top; /* no longer declared in alloc.c */
-
-static inline void heap_init(void);
-static inline void
-heap_init()
-{
- extern char __start[];
-
- if (top == NULL) {
- heap_limit = (unsigned long)&__start;
- heap_start = heap_limit - HEAP_SIZE;
- top = (char *)heap_start;
- }
-}
-
-#endif
+++ /dev/null
-# $OpenBSD: Makefile,v 1.1 2009/05/14 18:57:43 miod Exp $
-
-.include "${.CURDIR}/../Makefile32.inc"
-.include "${.CURDIR}/../libsa/Makefile"
+++ /dev/null
-# $OpenBSD: Makefile,v 1.5 2012/08/31 08:14:08 pascal Exp $
-
-S=${.CURDIR}/../../../..
-ZDST=${.OBJDIR}
-
-.PATH: ${S}/lib/libz
-
-.include "${S}/lib/libz/Makefile"
-CFLAGS+= ${CEXTRAFLAGS} ${SAABI} -mno-abicalls -D_NO_ABICALLS \
- ${AFLAGS} -fno-pie -I${S}
+++ /dev/null
-# $OpenBSD: Makefile,v 1.1 2009/05/14 18:57:43 miod Exp $
-
-.include "${.CURDIR}/../Makefile32.inc"
-.include "${.CURDIR}/../libz/Makefile"
+++ /dev/null
-# $OpenBSD: Makefile,v 1.3 2005/04/27 18:02:16 deraadt Exp $
-# $NetBSD: Makefile,v 1.5 2002/12/13 02:36:37 lukem Exp $
-
-MAN= sgivol.8
-MANSUBDIR=sgi
-
-.if ${MACHINE} == "sgi"
-PROG= sgivol
-LDADD+= -lutil
-LDSTATIC=-static
-
-.else
-NOPROG=
-.endif
-
-.include <bsd.prog.mk>
+++ /dev/null
-.\" $OpenBSD: sgivol.8,v 1.7 2020/04/23 21:28:10 jmc Exp $
-.\"
-.\" Copyright (c) 2005 Theo de Raadt
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-.\" SUCH DAMAGE.
-.\"
-.\"
-.Dd $Mdocdate: April 23 2020 $
-.Dt SGIVOL 8 sgi
-.Os
-.Sh NAME
-.Nm sgivol
-.Nd initialise and manipulate SGI disk volume headers
-.Sh SYNOPSIS
-.Nm sgivol
-.Op Fl q
-.Ar disk
-.Nm sgivol
-.Op Fl q
-.Fl d Ar vhfilename
-.Ar disk
-.Nm sgivol
-.Op Fl q
-.Fl i
-.Op Fl h Ar vhsize
-.Ar disk
-.Nm sgivol
-.Op Fl q
-.Fl l Ar vhfilename1 Ar vhfilename2
-.Ar disk
-.Nm sgivol
-.Op Fl q
-.Fl r Ar vhfilename diskfilename
-.Ar disk
-.Nm sgivol
-.Op Fl q
-.Fl w Ar vhfilename diskfilename
-.Ar disk
-.Sh DESCRIPTION
-.Nm
-is used to initialise and manipulate SGI disk volume headers.
-.Pp
-The SGI volume header is a disklabel-like structure located at the
-start of a disk.
-It is typically 3135 (512-byte) blocks in size, and can store a
-variety of files inside it, typically boot programs.
-.Pp
-The options are as follows:
-.Bl -tag -width flag_opt
-.It Fl d Ar vhfilename
-Delete the file
-.Ar vhfilename
-from the filesystem storage space in the volume header.
-.It Fl h Ar vhsize
-Choose an alternate volume header size, in (512-byte) disk blocks.
-The default is 3135 blocks.
-.It Fl i
-Initialise a volume header on the supplied device.
-.It Fl l Ar vhfilename1 Ar vhfilename2
-Link the file
-.Ar vhfilename1
-to the file
-.Ar vhfilename2
-within the filesystem storage space in the volume header.
-.It Fl q
-Be quiet about various diagnostic issues.
-.It Fl r Ar vhfilename diskfilename
-Locate the file
-.Ar vhfilename
-in the storage space of the volume header, and copy it to the
-standard file
-.Ar diskfilename .
-.It Fl w Ar vhfilename diskfilename
-Copy the standard file
-.Ar diskfilename
-to the filesystem storage space in the volume header, placing
-it there with the name
-.Ar vhfilename .
-.It Ar disk
-The name of the disk containing the partition in which the second-stage
-boot program resides and the first-stage boot program is to be installed.
-This can either be specified in short form (e.g.,
-.Sq sd0
-or as the explicit device node, such as
-.Pa /dev/rsd0c ) .
-.Pp
-Note that you must be in single-user mode or have your kernel in
-insecure mode (see the
-.Xr sysctl 8
-.Va kern.securelevel
-variable or
-.Pa /etc/rc.securelevel )
-to enable access to the raw partition of a mounted disk.
-.El
-.Pp
-If no special flags are supplied,
-.Nm
-will display the current volume header information.
-.Sh EXAMPLES
-The typical use is
-.Bd -literal -offset indent
-# /usr/mdec/sgivol -i sd0
-# /usr/mdec/sgivol -w boot /usr/mdec/boot sd0
-.Ed
-.Sh SEE ALSO
-.Xr disklabel 8 ,
-.Xr init 8
+++ /dev/null
-/* $OpenBSD: sgivol.c,v 1.24 2017/09/08 05:36:52 deraadt Exp $ */
-/* $NetBSD: sgivol.c,v 1.8 2003/11/08 04:59:00 sekiya Exp $ */
-
-/*-
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Michael Hitch and Hubert Feyrer.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <unistd.h>
-#include <err.h>
-#include <errno.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <util.h>
-
-#include <sys/disklabel.h>
-#include <sys/endian.h>
-#include <sys/ioctl.h>
-#include <sys/param.h>
-#include <sys/stat.h>
-#include <sys/dkio.h>
-
-/*
- * Some IRIX man pages refer to the size being a multiple of whole cylinders.
- * Later ones only refer to the size being "typically" 2MB. IRIX fx(1)
- * uses a default drive geometry if one can't be determined, suggesting
- * that "whole cylinder" multiples are not required.
- */
-
-#define SGI_SIZE_VOLHDR 3135 /* Can be overridden via -h parameter. */
-
-/*
- * Mode of operation can be one of:
- * -i Initialise volume header.
- * -r Read a file from volume header.
- * -w Write a file to volume header.
- * -l Link a file into the volume header.
- * -d Delete a file from the volume header.
- * -p Modify a partition.
- */
-
-char mode;
-int quiet;
-int fd;
-int partno, partfirst, partblocks, parttype;
-struct sgilabel *volhdr;
-int32_t checksum;
-
-/* Volume header size in sectors. */
-u_int32_t volhdr_size = SGI_SIZE_VOLHDR;
-
-const char *vfilename = "";
-const char *ufilename = "";
-
-struct disklabel lbl;
-
-unsigned char *buf;
-unsigned int bufsize;
-
-const char *sgi_types[] = {
- "Volume Header",
- "Repl Trks",
- "Repl Secs",
- "Raw",
- "BSD4.2",
- "SysV",
- "Volume",
- "EFS",
- "LVol",
- "RLVol",
- "XFS",
- "XSFLog",
- "XLV",
- "XVM"
-};
-
-void display_vol(void);
-void init_volhdr(void);
-void read_file(void);
-void write_file(void);
-void link_file(void);
-void delete_file(void);
-void modify_partition(void);
-void write_volhdr(void);
-int allocate_space(int);
-void checksum_vol(void);
-void usage(void);
-
-int
-main(int argc, char *argv[])
-{
- int ch, oflags;
- char fname[FILENAME_MAX];
- char *endp;
-
- quiet = 0;
- mode = ' ';
-
- while ((ch = getopt(argc, argv, "irwlpdqfh:")) != -1) {
- switch (ch) {
- case 'q':
- quiet = 1;
- break;
- case 'f':
- /* Legacy. Do nothing. */
- break;
- case 'i':
- mode = 'i';
- break;
- case 'h':
- volhdr_size = strtol(optarg, &endp, 0);
- if (*endp != '\0' || errno != 0)
- errx(1, "incorrect volume header size: %s",
- optarg);
- break;
- case 'r':
- mode = 'r';
- break;
- case 'w':
- mode = 'w';
- break;
- case 'l':
- mode = 'l';
- break;
- case 'd':
- mode = 'd';
- break;
- case 'p':
- mode = 'p';
- break;
- default:
- usage();
- }
- }
- argc -= optind;
- argv += optind;
-
- if (mode == 'r' || mode == 'w' || mode == 'l') {
- if (argc != 3)
- usage();
- vfilename = argv[0];
- ufilename = argv[1];
- argc -= 2;
- argv += 2;
- } else if (mode == 'd') {
- if (argc != 2)
- usage();
- vfilename = argv[0];
- argc--;
- argv++;
- } else if (mode == 'p') {
- if (argc != 5)
- usage();
- partno = strtol(argv[0], &endp, 0);
- if (*endp != '\0' || errno != 0 ||
- partno < 0 || partno > SGI_SIZE_VOLDIR)
- errx(1, "invalid partition number: %s", argv[0]);
- partfirst = strtol(argv[1], &endp, 0);
- if (*endp != '\0' || errno != 0)
- errx(1, "invalid partition start: %s", argv[1]);
- partblocks = strtol(argv[2], &endp, 0);
- if (*endp != '\0' || errno != 0)
- errx(1, "invalid partition size: %s", argv[2]);
- parttype = strtol(argv[3], &endp, 0);
- if (*endp != '\0' || errno != 0)
- errx(1, "invalid partition type: %s", argv[3]);
- argc -= 4;
- argv += 4;
- }
- if (argc != 1)
- usage();
-
- oflags = ((mode == 'i' || mode == 'w' || mode == 'l' || mode == 'd'
- || mode == 'p') ? O_RDWR : O_RDONLY);
-
- /* Open raw device. */
- if ((fd = open(argv[0], oflags)) < 0) {
- snprintf(fname, sizeof(fname), "/dev/r%s%c",
- argv[0], 'a' + getrawpartition());
- if ((fd = open(fname, oflags)) < 0)
- err(1, "open %s", fname);
- }
-
- /* Get disklabel for device. */
- if (ioctl(fd, DIOCGDINFO, &lbl) == -1)
- err(1, "ioctl DIOCGDINFO");
-
- /* Allocate a buffer that matches the device sector size. */
- bufsize = lbl.d_secsize;
- if (bufsize < sizeof(struct sgilabel))
- errx(1, "sector size is smaller than SGI volume header!\n");
- if ((buf = malloc(bufsize)) == NULL)
- err(1, "failed to allocate buffer");
-
- /* Read SGI volume header. */
- if (read(fd, buf, bufsize) != bufsize)
- err(1, "read volhdr");
- volhdr = (struct sgilabel *)buf;
-
- if (mode == 'i') {
- init_volhdr();
- exit(0);
- }
-
- if (betoh32(volhdr->magic) != SGILABEL_MAGIC)
- errx(2, "no Volume Header found, magic=%x. Use -i first.",
- betoh32(volhdr->magic));
-
- if (mode == 'r')
- read_file();
- else if (mode == 'w')
- write_file();
- else if (mode == 'l')
- link_file();
- else if (mode == 'd')
- delete_file();
- else if (mode == 'p')
- modify_partition();
- else if (!quiet)
- display_vol();
-
- exit (0);
-}
-
-void
-display_vol(void)
-{
- int32_t *l;
- int i;
-
- l = (int32_t *)buf;
- checksum = 0;
- for (i = 0; i < sizeof(struct sgilabel) / sizeof(int32_t); ++i)
- checksum += betoh32(l[i]);
-
- printf("disklabel shows %llu sectors with %u bytes per sector\n",
- DL_GETDSIZE(&lbl), lbl.d_secsize);
- printf("checksum: %08x%s\n", checksum, checksum == 0 ? "" : " *ERROR*");
- printf("root part: %d\n", betoh32(volhdr->root));
- printf("swap part: %d\n", betoh32(volhdr->swap));
- printf("bootfile: %s\n", volhdr->bootfile);
-
- /* volhdr->devparams[0..47] */
- printf("\nVolume header files:\n");
- for (i = 0; i < SGI_SIZE_VOLDIR; ++i) {
- if (volhdr->voldir[i].name[0] != '\0') {
- printf("%-8s offset %4d blocks, "
- "length %8d bytes (%d blocks)\n",
- volhdr->voldir[i].name,
- betoh32(volhdr->voldir[i].block),
- betoh32(volhdr->voldir[i].bytes),
- howmany(betoh32(volhdr->voldir[i].bytes),
- DEV_BSIZE));
- }
- }
-
- printf("\nSGI partitions:\n");
- for (i = 0; i < MAXPARTITIONS; ++i) {
- if (betoh32(volhdr->partitions[i].blocks) != 0) {
- printf("%2d:%c blocks %8d first %8d type %2d (%s)\n",
- i, i + 'a', betoh32(volhdr->partitions[i].blocks),
- betoh32(volhdr->partitions[i].first),
- betoh32(volhdr->partitions[i].type),
- betoh32(volhdr->partitions[i].type) >
- (sizeof(sgi_types) / sizeof(sgi_types[0])) ?
- "???" :
- sgi_types[betoh32(volhdr->partitions[i].type)]);
- }
- }
-}
-
-void
-init_volhdr(void)
-{
- memset(volhdr, 0, sizeof(struct sgilabel));
- volhdr->magic = htobe32(SGILABEL_MAGIC);
- volhdr->root = htobe16(0);
- volhdr->swap = htobe16(1);
- strlcpy(volhdr->bootfile, "/bsd", sizeof(volhdr->bootfile));
- volhdr->dp.dp_skew = 1; /* XXX */
- volhdr->dp.dp_gap1 = 1; /* XXX */
- volhdr->dp.dp_gap2 = 1; /* XXX */
- volhdr->dp.dp_cyls = htobe16(lbl.d_ncylinders);
- volhdr->dp.dp_shd0 = 0;
- volhdr->dp.dp_trks0 = htobe16(lbl.d_ntracks);
- volhdr->dp.dp_secs = htobe16(lbl.d_nsectors);
- volhdr->dp.dp_secbytes = htobe16(lbl.d_secsize);
- volhdr->dp.dp_interleave = 1;
- volhdr->dp.dp_nretries = htobe32(22);
- volhdr->partitions[10].blocks =
- htobe32(DL_SECTOBLK(&lbl, DL_GETDSIZE(&lbl)));
- volhdr->partitions[10].first = 0;
- volhdr->partitions[10].type = htobe32(SGI_PTYPE_VOLUME);
- volhdr->partitions[8].blocks = htobe32(DL_SECTOBLK(&lbl, volhdr_size));
- volhdr->partitions[8].first = 0;
- volhdr->partitions[8].type = htobe32(SGI_PTYPE_VOLHDR);
- volhdr->partitions[0].blocks =
- htobe32(DL_SECTOBLK(&lbl, DL_GETDSIZE(&lbl) - volhdr_size));
- volhdr->partitions[0].first = htobe32(DL_SECTOBLK(&lbl, volhdr_size));
- volhdr->partitions[0].type = htobe32(SGI_PTYPE_BSD);
- write_volhdr();
-}
-
-void
-read_file(void)
-{
- FILE *fp;
- int i;
-
- if (!quiet)
- printf("Reading file %s\n", vfilename);
- for (i = 0; i < SGI_SIZE_VOLDIR; ++i) {
- if (strncmp(vfilename, volhdr->voldir[i].name,
- strlen(volhdr->voldir[i].name)) == 0)
- break;
- }
- if (i >= SGI_SIZE_VOLDIR)
- errx(1, "%s: file not found", vfilename);
- /* XXX assumes volume header starts at 0? */
- lseek(fd, betoh32(volhdr->voldir[i].block) * DEV_BSIZE, SEEK_SET);
- if ((fp = fopen(ufilename, "w")) == NULL)
- err(1, "open %s", ufilename);
- i = betoh32(volhdr->voldir[i].bytes);
- while (i > 0) {
- if (read(fd, buf, bufsize) != bufsize)
- err(1, "read file");
- fwrite(buf, 1, i > bufsize ? bufsize : i, fp);
- i -= i > bufsize ? bufsize : i;
- }
- fclose(fp);
-}
-
-void
-write_file(void)
-{
- FILE *fp;
- int slot;
- int block, i, fsize, fbufsize;
- struct stat st;
- char *fbuf;
-
- if (!quiet)
- printf("Writing file %s\n", ufilename);
-
- if (stat(ufilename, &st) != 0)
- err(1, "stat %s", ufilename);
- if (st.st_size == 0)
- errx(1, "%s: file is empty", vfilename);
-
- if (!quiet)
- printf("File %s has %lld bytes\n", ufilename, st.st_size);
- slot = -1;
- for (i = 0; i < SGI_SIZE_VOLDIR; ++i) {
- if (volhdr->voldir[i].name[0] == '\0' && slot < 0)
- slot = i;
- if (strcmp(vfilename, volhdr->voldir[i].name) == 0) {
- slot = i;
- break;
- }
- }
- if (slot == -1)
- errx(1, "no more directory entries available");
- if (betoh32(volhdr->voldir[slot].block) > 0) {
- if (!quiet)
- printf("File %s exists, removing old file\n",
- vfilename);
- volhdr->voldir[slot].name[0] = 0;
- volhdr->voldir[slot].block = volhdr->voldir[slot].bytes = 0;
- }
- /* XXX assumes volume header starts at 0? */
- block = allocate_space((int)st.st_size);
- if (block < 0)
- errx(1, "no more space available");
-
- /*
- * Make sure the name in the volume header is max. 8 chars,
- * NOT including NUL.
- */
- if (strlen(vfilename) > sizeof(volhdr->voldir[slot].name))
- warnx("%s: filename is too long and will be truncated",
- vfilename);
- strncpy(volhdr->voldir[slot].name, vfilename,
- sizeof(volhdr->voldir[slot].name));
-
- volhdr->voldir[slot].block = htobe32(block);
- volhdr->voldir[slot].bytes = htobe32(st.st_size);
-
- write_volhdr();
-
- /* Write the file itself. */
- if (lseek(fd, block * DEV_BSIZE, SEEK_SET) == -1)
- err(1, "lseek write");
- fbufsize = volhdr->dp.dp_secbytes;
- if ((fbuf = malloc(fbufsize)) == NULL)
- err(1, "failed to allocate buffer");
- i = st.st_size;
- fp = fopen(ufilename, "r");
- while (i > 0) {
- bzero(fbuf, fbufsize);
- fsize = i > fbufsize ? fbufsize : i;
- if (fread(fbuf, 1, fsize, fp) != fsize)
- err(1, "reading file from disk");
- if (write(fd, fbuf, fbufsize) != fbufsize)
- err(1, "writing file to SGI volume header");
- i -= fsize;
- }
- fclose(fp);
- free(fbuf);
-}
-
-void
-link_file(void)
-{
- int slot, i;
- int32_t block, bytes;
-
- if (!quiet)
- printf("Linking file %s to %s\n", vfilename, ufilename);
- for (i = 0; i < SGI_SIZE_VOLDIR; ++i) {
- if (strncmp(vfilename, volhdr->voldir[i].name,
- strlen(volhdr->voldir[i].name)) == 0)
- break;
- }
- if (i >= SGI_SIZE_VOLDIR)
- errx(1, "%s: file not found", vfilename);
-
- block = volhdr->voldir[i].block;
- bytes = volhdr->voldir[i].bytes;
-
- slot = -1;
- for (i = 0; i < SGI_SIZE_VOLDIR; ++i) {
- if (volhdr->voldir[i].name[0] == '\0' && slot < 0)
- slot = i;
- if (strcmp(ufilename, volhdr->voldir[i].name) == 0) {
- slot = i;
- break;
- }
- }
- if (slot == -1)
- errx(1, "no more directory entries available");
-
- /*
- * Make sure the name in the volume header is max. 8 chars,
- * NOT including NUL.
- */
- if (strlen(ufilename) > sizeof(volhdr->voldir[slot].name))
- warnx("%s: filename is too long and will be truncated",
- ufilename);
- strncpy(volhdr->voldir[slot].name, ufilename,
- sizeof(volhdr->voldir[slot].name));
-
- volhdr->voldir[slot].block = block;
- volhdr->voldir[slot].bytes = bytes;
- write_volhdr();
-}
-
-void
-delete_file(void)
-{
- int i;
-
- for (i = 0; i < SGI_SIZE_VOLDIR; ++i) {
- if (strcmp(vfilename, volhdr->voldir[i].name) == 0) {
- break;
- }
- }
- if (i >= SGI_SIZE_VOLDIR)
- errx(1, "%s: file not found", vfilename);
-
- /* XXX: we don't compact the file space, so get fragmentation */
- volhdr->voldir[i].name[0] = '\0';
- volhdr->voldir[i].block = volhdr->voldir[i].bytes = 0;
- write_volhdr();
-}
-
-void
-modify_partition(void)
-{
- if (!quiet)
- printf("Modify partition %d start %d length %d\n",
- partno, partfirst, partblocks);
- volhdr->partitions[partno].blocks = htobe32(partblocks);
- volhdr->partitions[partno].first = htobe32(partfirst);
- volhdr->partitions[partno].type = htobe32(parttype);
- write_volhdr();
-}
-
-void
-write_volhdr(void)
-{
- checksum_vol();
-
- if (!quiet)
- display_vol();
- if (lseek(fd, 0, SEEK_SET) == -1)
- err(1, "lseek 0");
- if (write(fd, buf, bufsize) != bufsize)
- err(1, "write volhdr");
-}
-
-int
-allocate_space(int size)
-{
- int n, blocks;
- int first;
-
- blocks = howmany(size, DEV_BSIZE);
- first = roundup(2 * DEV_BSIZE, volhdr->dp.dp_secbytes) / DEV_BSIZE;
-
- for (n = 0; n < SGI_SIZE_VOLDIR;) {
- if (volhdr->voldir[n].name[0]) {
- if (first < (betoh32(volhdr->voldir[n].block) +
- howmany(betoh32(volhdr->voldir[n].bytes),
- DEV_BSIZE)) &&
- (first + blocks) >
- betoh32(volhdr->voldir[n].block)) {
-
- first = roundup(
- betoh32(volhdr->voldir[n].block) +
- howmany(betoh32(volhdr->voldir[n].bytes),
- DEV_BSIZE),
- volhdr->dp.dp_secbytes / DEV_BSIZE);
-#if DEBUG
- printf("allocate: "
- "n=%d first=%d blocks=%d size=%d\n",
- n, first, blocks, size);
- printf("%s %d %d\n", volhdr->voldir[n].name,
- volhdr->voldir[n].block,
- volhdr->voldir[n].bytes);
- printf("first=%d block=%d last=%d end=%d\n",
- first, volhdr->voldir[n].block,
- first + blocks - 1,
- volhdr->voldir[n].block +
- howmany(volhdr->voldir[n].bytes,
- DEV_BSIZE));
-#endif
- n = 0;
- continue;
- }
- }
- ++n;
- }
- if (first + blocks > DL_GETDSIZE(&lbl))
- first = -1;
- /* XXX assumes volume header is partition 8 */
- /* XXX assumes volume header starts at 0? */
- if (first + blocks >= betoh32(volhdr->partitions[8].blocks))
- first = -1;
- return (first);
-}
-
-void
-checksum_vol(void)
-{
- int32_t *l;
- int i;
-
- volhdr->checksum = checksum = 0;
- l = (int32_t *)buf;
- for (i = 0; i < sizeof(struct sgilabel) / sizeof(int32_t); ++i)
- checksum += betoh32(l[i]);
- volhdr->checksum = htobe32(-checksum);
-}
-
-void
-usage(void)
-{
- extern char *__progname;
-
- fprintf(stderr,
- "usage: %s [-q] disk\n"
- " %s [-q] -d vhfilename disk\n"
- " %s [-q] -i [-h vhsize] disk\n"
- " %s [-q] -l vhfilename1 vhfilename2 disk\n"
- " %s [-q] -r vhfilename diskfilename disk\n"
- " %s [-q] -w vhfilename diskfilename disk\n",
- __progname, __progname, __progname, __progname, __progname,
- __progname);
-
- exit(1);
-}
+++ /dev/null
-# $OpenBSD: Makefile,v 1.1 2008/04/07 22:47:40 miod Exp $
-
-AWK= awk
-
-xbowdevs.h xbowdevs_data.h: xbowdevs devlist2h.awk
- /bin/rm -f xbowdevs.h xbowdevs_data.h
- ${AWK} -f devlist2h.awk xbowdevs
+++ /dev/null
-#! /usr/bin/awk -f
-# $OpenBSD: devlist2h.awk,v 1.2 2008/07/28 18:50:59 miod Exp $
-# $NetBSD: devlist2h.awk,v 1.2 1996/01/22 21:08:09 cgd Exp $
-#
-# Copyright (c) 1995, 1996 Christopher G. Demetriou
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. All advertising materials mentioning features or use of this software
-# must display the following acknowledgement:
-# This product includes software developed by Christopher G. Demetriou.
-# 4. The name of the author may not be used to endorse or promote products
-# derived from this software without specific prior written permission
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-BEGIN {
- nproducts = nvendor_dup = nvendors = 0
- dfile="xbowdevs_data.h"
- hfile="xbowdevs.h"
-}
-NR == 1 {
- VERSION = $0
- gsub("\\$", "", VERSION)
-
- printf("/*\n") > dfile
- printf(" * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n") \
- > dfile
- printf(" *\n") > dfile
- printf(" * generated from:\n") > dfile
- printf(" *\t%s\n", VERSION) > dfile
- printf(" */\n\n") > dfile
-
- printf("/*\n") > hfile
- printf(" * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n") \
- > hfile
- printf(" *\n") > hfile
- printf(" * generated from:\n") > hfile
- printf(" *\t%s\n", VERSION) > hfile
- printf(" */\n") > hfile
-
- next
-}
-$1 == "vendor" {
- nvendors++
-
- if ($2 in vendorindex) {
- printf("duplicate vendor name %s\n", $2);
- nvendor_dup++;
- }
-
- vendorindex[$2] = nvendors; # record index for this name, for later.
- vendors[nvendors, 1] = $2; # name
- vendors[nvendors, 2] = $3; # id
- printf("#define\tXBOW_VENDOR_%s\t%s\n", vendors[nvendors, 1],
- vendors[nvendors, 2]) > hfile
-
- next
-}
-$1 == "product" {
- nproducts++
-
- products[nproducts, 1] = $2; # vendor name
- products[nproducts, 2] = $3; # product id
- products[nproducts, 3] = $4; # id
- printf("#define\tXBOW_PRODUCT_%s_%s\t%s\t", products[nproducts, 1],
- products[nproducts, 2], products[nproducts, 3]) > hfile
-
- i=4; f = 5;
-
- # comments
- ocomment = oparen = 0
- if (f <= NF) {
- printf("\t/* ") > hfile
- ocomment = 1;
- }
- while (f <= NF) {
- if ($f == "#") {
- printf("(") > hfile
- oparen = 1
- f++
- continue
- }
- if (oparen) {
- printf("%s", $f) > hfile
- if (f < NF)
- printf(" ") > hfile
- f++
- continue
- }
- products[nproducts, i] = $f
- printf("%s", products[nproducts, i]) > hfile
- if (f < NF)
- printf(" ") > hfile
- i++; f++;
- }
- if (oparen)
- printf(")") > hfile
- if (ocomment)
- printf(" */") > hfile
- printf("\n") > hfile
-
- next
-}
-{
- if ($0 == "")
- blanklines++
- print $0 > hfile
- if (blanklines < 2)
- print $0 > dfile
-}
-END {
- # print out the match tables
-
- printf("\n") > dfile
-
- if (nvendor_dup > 0)
- exit(1);
-
- printf("/* Descriptions of known devices. */\n") > dfile
-
- printf("struct xbow_product {\n") > dfile
- printf("\tuint32_t vendor;\n") > dfile
- printf("\tuint32_t product;\n") > dfile
- printf("\tconst char *productname;\n") > dfile
- printf("};\n\n") > dfile
-
-
- printf("static const struct xbow_product xbow_products[] = {\n") \
- > dfile
- for (i = 1; i <= nproducts; i++) {
- printf("\t{\n") > dfile
- printf("\t XBOW_VENDOR_%s, XBOW_PRODUCT_%s_%s,\n",
- products[i, 1], products[i, 1], products[i, 2]) \
- > dfile
-
- printf("\t \"") > dfile
- j = 4;
- needspace = 0;
- while (products[i, j] != "") {
- if (needspace)
- printf(" ") > dfile
- printf("%s", products[i, j]) > dfile
- needspace = 1
- j++
- }
- printf("\",\n") > dfile
- printf("\t},\n") > dfile
- }
- printf("\t{ 0, 0, NULL, }\n") > dfile
- printf("};\n\n") > dfile
-}
+++ /dev/null
-# $OpenBSD: files.xbow,v 1.9 2012/05/10 21:30:09 miod Exp $
-
-# IP30 and IP27 planar XBow bus
-define xbow {[widget = -1], [vendor = -1], [product = -1]}
-device xbow
-attach xbow at mainbus
-file arch/sgi/xbow/xbow.c xbow
-
-# IP30 Heart
-device xheart {} : onewirebus
-attach xheart at xbow
-file arch/sgi/xbow/xheart.c xheart
-
-# PCI Bridge
-device xbridge {}
-attach xbridge at xbow
-device xbpci {[bus = -1]} : pcibus
-attach xbpci at xbridge
-file arch/sgi/xbow/xbridge.c xbridge
-
-# Odyssey graphics
-device odyssey: wsemuldisplaydev, rasops32
-attach odyssey at xbow
-file arch/sgi/xbow/odyssey.c odyssey needs-flag
-
-# ImpactSR graphics
-attach impact at xbow with impact_xbow
-file arch/sgi/xbow/impact_xbow.c impact_xbow
+++ /dev/null
-/* $OpenBSD: hub.h,v 1.11 2016/01/02 05:49:36 visa Exp $ */
-
-/*
- * Copyright (c) 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * HUB access macros.
- */
-#define LWIN_SIZE_BITS 24
-#define LWIN_SIZE (1ULL << LWIN_SIZE_BITS)
-
-#define NODE_LWIN_BASE(nasid, widget) \
- (IP27_NODE_IO_BASE(nasid) + ((uint64_t)(widget) << LWIN_SIZE_BITS))
-
-#define IP27_LHUB_ADDR(_x) \
- ((volatile uint64_t *)(NODE_LWIN_BASE(0, 1) + (_x)))
-#define IP27_RHUB_ADDR(_n, _x) \
- ((volatile uint64_t *)(NODE_LWIN_BASE(_n, 1) + 0x800000 + (_x)))
-#define IP27_RHUB_PI_ADDR(_n, _sn, _x) \
- ((volatile uint64_t *)(NODE_LWIN_BASE(_n, 1) + 0x800000 + \
- ((_sn) ? HUBPI_OFFSET : 0) + (_x)))
-
-#define IP27_LHUB_L(r) *(IP27_LHUB_ADDR(r))
-#define IP27_LHUB_S(r, d) *(IP27_LHUB_ADDR(r)) = (d)
-#define IP27_RHUB_L(n, r) *(IP27_RHUB_ADDR((n), (r)))
-#define IP27_RHUB_S(n, r, d) *(IP27_RHUB_ADDR((n), (r))) = (d)
-#define IP27_RHUB_PI_L(n, s, r) *(IP27_RHUB_PI_ADDR((n), (s), (r)))
-#define IP27_RHUB_PI_S(n, s, r, d) *(IP27_RHUB_PI_ADDR((n), (s), (r))) = (d)
-
-#define NODE_HSPEC_BASE(nasid) \
- (IP27_NODE_HSPEC_BASE(nasid))
-
-#define IP27_LHSPEC_ADDR(_x) \
- ((volatile uint64_t *)(NODE_HSPEC_BASE(0) + (_x)))
-#define IP27_RHSPEC_ADDR(_n, _x) \
- ((volatile uint64_t *)(NODE_HSPEC_BASE(_n) + 0x20000000 + (_x)))
-
-#define IP27_LHSPEC_L(r) *(IP27_LHSPEC_ADDR(r))
-#define IP27_LHSPEC_S(r, d) *(IP27_LHSPEC_ADDR(r)) = (d)
-#define IP27_RHSPEC_L(n, r) *(IP27_RHSPEC_ADDR((n), (r)))
-#define IP27_RHSPEC_S(n, r, d) *(IP27_RHSPEC_ADDR((n), (r))) = (d)
-
-/*
- * HUB SPECIAL space (very incomplete)
- */
-
-#define LBOOTBASE_IP27 0x10000000
-#define LBOOTSIZE_IP27 0x10000000
-
-#define LREGBASE_IP35 0x10000000
-#define LREGSIZE_IP35 0x08000000
-#define LBOOTBASE_IP35 0x18000000
-#define LBOOTSIZE_IP35 0x08000000
-
-#define HSPEC_L1_UARTBASE 0x00000080
-#define HSPEC_SYNERGY0 0x04000000 /* synergy #0 base */
-#define HSPEC_SYNERGY1 0x05000000 /* synergy #1 base */
-
-#define HSPEC_L1_UART(r) \
- (LREGBASE_IP35 + HSPEC_L1_UARTBASE + ((r) << 3))
-#define HSPEC_SYNERGY(s,r) \
- (LREGBASE_IP35 + ((s) ? HSPEC_SYNERGY1 : HSPEC_SYNERGY0) + ((r) << 3))
-
-/*
- * HUB IO space (very incomplete)
- */
-
-/*
- * HUB PI - Processor Interface
- */
-
-#define HUBPIBASE 0x00000000
-
-#define HUBPI_REGION_PRESENT 0x00000018
-#define HUBPI_CPU_NUMBER 0x00000020
-#define HUBPI_CALIAS_SIZE 0x00000028
-#define PI_CALIAS_SIZE_0 0
-
-
-#define HUBPI_CPU0_PRESENT 0x00000040
-#define HUBPI_CPU1_PRESENT 0x00000048
-#define HUBPI_CPU0_ENABLED 0x00000050
-#define HUBPI_CPU1_ENABLED 0x00000058
-
-#define HUBPI_IR_CHANGE 0x00000090
-#define PI_IR_SET 0x100
-#define PI_IR_CLR 0x000
-#define HUBPI_IR0 0x00000098
-#define HUBPI_IR1 0x000000a0
-#define HUBPI_CPU0_IMR0 0x000000a8
-#define HUBPI_CPU0_IMR1 0x000000b0
-#define HUBPI_CPU1_IMR0 0x000000b8
-#define HUBPI_CPU1_IMR1 0x000000c0
-
-#define HUBPI_RT_COUNT 0x00030100
-
-/*
- * Offset to use to access the second PI over the remote hub interface
- * on IP35.
- */
-#define HUBPI_OFFSET 0x00200000
-
-/*
- * ISR bit assignments.
- */
-
-/** Level 1 interrupt */
-/* ?? MSC panic */
-#define HUBPI_ISR1_MSC_ERROR 63
-/* NI interface error */
-#define HUBPI_ISR1_NI_ERROR 62
-/* MD correctable error */
-#define HUBPI_ISR1_MD_COR_ERROR 61
-/* cpu correctable error B */
-#define HUBPI_ISR1_COR_ERROR_B 60
-/* cpu correctable error A */
-#define HUBPI_ISR1_COR_ERROR_A 59
-/* clock error */
-#define HUBPI_ISR1_CLOCK_ERROR 58
-/* IP35 NACK interrupts */
-#define HUBPI_ISR1_NACK_B 57
-#define HUBPI_ISR1_NACK_A 56
-/* IP35 LB error */
-#define HUBPI_ISR1_LB 55
-/* IP35 XB error */
-#define HUBPI_ISR1_XB 54
-/* 53-45 used by PROM */
-/* 44-43 available */
-/* 42-41 LLP errors */
-/* NI broadcast errors */
-#define HUBPI_ISR1_NI_ERROR_B 40
-#define HUBPI_ISR1_NI_ERROR_A 39
-/* 38-36 used by IP35 PROM */
-/* 35-0 available */
-
-/** Level 0 interrupt */
-/* 63-11 available */
-/* IPI interrupts */
-#define HUBPI_ISR0_IPI_D 10
-#define HUBPI_ISR0_IPI_C 9
-#define HUBPI_ISR0_IPI_B 8
-#define HUBPI_ISR0_IPI_A 7
-/* ? */
-#define HUBPI_CC_PEND_B 6
-#define HUBPI_CC_PEND_A 5
-/* ? */
-#define HUBPI_ISR0_UART 4
-/* page migration interrupt */
-#define HUBPI_ISR0_PAGE_MIGRATION 3
-/* graphics->cpu interrupts */
-#define HUBPI_ISR0_GFX_B 2
-#define HUBPI_ISR0_GFX_A 1
-/* 0 reserved */
-
-#define HUBPI_INTR1_WIDGET_MAX 35
-#define HUBPI_INTR1_WIDGET_MIN 0
-#define HUBPI_INTR0_WIDGET_MAX 63
-#define HUBPI_INTR0_WIDGET_MIN 11
-
-#define HUBPI_NINTS 64 /* per register */
-
-/*
- * HUB MD - Memory/Directory
- */
-
-#define HUBMDBASE_IP27 0x00200000
-#define HUBMDBASE_IP35 0x00780000
-
-#define HUBMD_LED0 0x00020050
-
-
-/*
- * HUB IO - Widget I/O
- */
-
-#define HUBIOBASE 0x00400000
-
-#define HUBIO_IOTTE(x) (0x00000160 + (x) * 8)
-#define IOTTE_MAX 7
-#define IOTTE_SWIN0 (IOTTE_MAX - 1)
-
-#define IOTTE(space,widget,offset) \
- (((space) << 12) | ((widget) << 8) | (offset))
-#define IOTTE_SPACE_DEVICE 1
-#define IOTTE_SPACE_MEMORY 0
-#define IOTTE_SPACE(iotte) (((iotte) >> 12) & 0x01)
-#define IOTTE_WIDGET(iotte) (((iotte) >> 8) & 0x0f)
-#define IOTTE_OFFSET(iotte) ((iotte) & 0xff)
-
-
-/*
- * HUB LB - Local Bedrock
- */
-
-#define HUBLBBASE_IP35 0x00600000
-
-/*
- * HUB NI - Network Interface
- */
-
-#define HUBNIBASE_IP27 0x00600000
-#define HUBNIBASE_IP35 0x00680000
-
-#define HUBNI_STATUS 0x00000000
-#define NI_MORENODES 0x0000000000040000
-#define HUBNI_RESET 0x00000008
-#define NI_RESET_ACTION_IP27 0x02
-#define NI_RESET_PORT_IP27 0x80
-#define NI_RESET_LOCAL_IP27 0x01
-#define NI_RESET_ACTION_IP35 0x01
-#define NI_RESET_PORT_IP35 0x02
-#define NI_RESET_LOCAL_IP35 0x04
-#define HUBNI_RESET_ENABLE 0x00000010
-#define NI_RESET_ENABLE 0x01
-
-/*
- * HUB XB - Crossbar interface
- */
-
-#define HUBXBBASE_IP35 0x00700000
+++ /dev/null
-/* $OpenBSD: impact_xbow.c,v 1.2 2017/09/08 05:36:52 deraadt Exp $ */
-
-/*
- * Copyright (c) 2010, 2012 Miodrag Vallat.
- * Copyright (c) 2009, 2010 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Driver for the SGI ImpactSR graphics board (XBow attachment).
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-
-#include <machine/autoconf.h>
-
-#include <mips64/arcbios.h>
-
-#include <sgi/dev/impactvar.h>
-#include <sgi/xbow/widget.h>
-#include <sgi/xbow/xbow.h>
-#include <sgi/xbow/xbowdevs.h>
-
-#define IMPACTSR_REG_OFFSET 0x00000000
-#define IMPACTSR_REG_SIZE 0x00200000
-
-struct impact_xbow_softc {
- struct impact_softc sc_base;
-
- struct mips_bus_space iot_store;
-};
-
-int impact_xbow_match(struct device *, void *, void *);
-void impact_xbow_attach(struct device *, struct device *, void *);
-
-const struct cfattach impact_xbow_ca = {
- sizeof(struct impact_xbow_softc), impact_xbow_match, impact_xbow_attach
-};
-
-int impact_xbow_is_console(struct xbow_attach_args *);
-
-int
-impact_xbow_match(struct device *parent, void *match, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
-
- if (xaa->xaa_vendor == XBOW_VENDOR_SGI5 &&
- xaa->xaa_product == XBOW_PRODUCT_SGI5_IMPACT)
- return 1;
-
- return 0;
-}
-
-void
-impact_xbow_attach(struct device *parent, struct device *self, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
- struct impact_xbow_softc *sc = (struct impact_xbow_softc *)self;
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- int console;
-
- if (strncmp(bios_graphics, "alive", 5) != 0) {
- printf(" device has not been setup by firmware!\n");
- return;
- }
-
- printf(" revision %d\n", xaa->xaa_revision);
-
- console = impact_xbow_is_console(xaa);
-
- if (console != 0) {
- iot = NULL;
- ioh = 0;
- } else {
- /*
- * Create a copy of the bus space tag.
- */
- bcopy(xaa->xaa_iot, &sc->iot_store,
- sizeof(struct mips_bus_space));
- iot = &sc->iot_store;
-
- /* Setup bus space mappings. */
- if (bus_space_map(iot, IMPACTSR_REG_OFFSET,
- IMPACTSR_REG_SIZE, 0, &ioh)) {
- printf("failed to map registers\n");
- return;
- }
- }
-
- if (impact_attach_common(&sc->sc_base, iot, ioh, console, 1) != 0) {
- if (console == 0)
- bus_space_unmap(iot, ioh, IMPACTSR_REG_SIZE);
- }
-}
-
-/*
- * Console support.
- */
-
-int
-impact_xbow_cnprobe()
-{
- u_int32_t wid, vendor, product;
-
- if (xbow_widget_id(console_output.nasid, console_output.widget,
- &wid) != 0)
- return 0;
-
- vendor = WIDGET_ID_VENDOR(wid);
- product = WIDGET_ID_PRODUCT(wid);
-
- if (vendor != XBOW_VENDOR_SGI5 || product != XBOW_PRODUCT_SGI5_IMPACT)
- return 0;
-
- if (strncmp(bios_graphics, "alive", 5) != 0)
- return 0;
-
- return 1;
-}
-
-int
-impact_xbow_cnattach()
-{
- static struct mips_bus_space impact_iot_store;
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- int rc;
-
- /* Build bus space accessor. */
- xbow_build_bus_space(&impact_iot_store, console_output.nasid,
- console_output.widget);
- iot = &impact_iot_store;
-
- rc = bus_space_map(iot, IMPACTSR_REG_OFFSET, IMPACTSR_REG_SIZE,
- 0, &ioh);
- if (rc != 0)
- return rc;
-
- rc = impact_cnattach_common(iot, ioh, 1);
- if (rc != 0) {
- bus_space_unmap(iot, ioh, IMPACTSR_REG_SIZE);
- return rc;
- }
-
- return 0;
-}
-
-int
-impact_xbow_is_console(struct xbow_attach_args *xaa)
-{
- return xaa->xaa_nasid == console_output.nasid &&
- xaa->xaa_widget == console_output.widget;
-}
+++ /dev/null
-/* $OpenBSD: odyssey.c,v 1.15 2021/03/11 11:17:00 jsg Exp $ */
-/*
- * Copyright (c) 2009, 2010 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Driver for the SGI VPro (aka Odyssey) Graphics Card.
- */
-
-/*
- * The details regarding the design and operation of this hardware, along with
- * the necessary magic numbers, are only available thanks to the reverse
- * engineering work undertaken by Stanislaw Skowronek <skylark@linux-mips.org>.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/malloc.h>
-
-#include <machine/autoconf.h>
-
-#include <mips64/arcbios.h>
-
-#include <sgi/dev/gl.h>
-#include <sgi/xbow/odysseyreg.h>
-#include <sgi/xbow/odysseyvar.h>
-#include <sgi/xbow/widget.h>
-#include <sgi/xbow/xbow.h>
-#include <sgi/xbow/xbowdevs.h>
-
-#include <dev/wscons/wsconsio.h>
-#include <dev/wscons/wsdisplayvar.h>
-#include <dev/rasops/rasops.h>
-
-/*
- * Colourmap data.
- */
-struct odyssey_cmap {
- u_int8_t cm_red[256];
- u_int8_t cm_green[256];
- u_int8_t cm_blue[256];
-};
-
-/*
- * Screen data.
- */
-struct odyssey_screen {
- struct device *sc; /* Back pointer. */
-
- struct rasops_info ri; /* Screen raster display info. */
- struct odyssey_cmap cmap; /* Display colour map. */
- uint32_t attr; /* Rasops attributes. */
-
- int width; /* Width in pixels. */
- int height; /* Height in pixels. */
- int depth; /* Colour depth in bits. */
- int linebytes; /* Bytes per line. */
-};
-
-struct odyssey_softc {
- struct device sc_dev;
-
- struct mips_bus_space iot_store;
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
-
- int console; /* Is this the console? */
- int screens; /* No of screens allocated. */
-
- struct odyssey_screen *curscr; /* Current screen. */
-};
-
-int odyssey_match(struct device *, void *, void *);
-void odyssey_attach(struct device *, struct device *, void *);
-
-int odyssey_is_console(struct xbow_attach_args *);
-
-void odyssey_cmd_wait(struct odyssey_softc *);
-void odyssey_data_wait(struct odyssey_softc *);
-void odyssey_cmd_flush(struct odyssey_softc *, int);
-
-void odyssey_setup(struct odyssey_softc *);
-void odyssey_init_screen(struct odyssey_screen *);
-
-/*
- * Colour map handling for indexed modes.
- */
-int odyssey_getcmap(struct odyssey_cmap *, struct wsdisplay_cmap *);
-int odyssey_putcmap(struct odyssey_cmap *, struct wsdisplay_cmap *);
-
-/*
- * Hardware acceleration for rasops.
- */
-void odyssey_rop(struct odyssey_softc *, int, int, int, int, int, int);
-void odyssey_copyrect(struct odyssey_softc *, int, int, int, int, int, int);
-void odyssey_fillrect(struct odyssey_softc *, int, int, int, int, u_int);
-int odyssey_do_cursor(struct rasops_info *);
-int odyssey_putchar(void *, int, int, u_int, uint32_t);
-int odyssey_copycols(void *, int, int, int, int);
-int odyssey_erasecols(void *, int, int, int, uint32_t);
-int odyssey_copyrows(void *, int, int, int);
-int odyssey_eraserows(void *, int, int, uint32_t);
-
-u_int32_t ieee754_sp(uint);
-
-/*
- * Interfaces for wscons.
- */
-int odyssey_ioctl(void *, u_long, caddr_t, int, struct proc *);
-paddr_t odyssey_mmap(void *, off_t, int);
-int odyssey_alloc_screen(void *, const struct wsscreen_descr *, void **,
- int *, int *, uint32_t *);
-void odyssey_free_screen(void *, void *);
-int odyssey_show_screen(void *, void *, int, void (*)(void *, int, int),
- void *);
-int odyssey_load_font(void *, void *, struct wsdisplay_font *);
-int odyssey_list_font(void *, struct wsdisplay_font *);
-
-static struct odyssey_screen odyssey_consdata;
-static struct odyssey_softc odyssey_cons_sc;
-
-struct wsscreen_descr odyssey_stdscreen = {
- "std", /* Screen name. */
-};
-
-struct wsdisplay_accessops odyssey_accessops = {
- .ioctl = odyssey_ioctl,
- .mmap = odyssey_mmap,
- .alloc_screen = odyssey_alloc_screen,
- .free_screen = odyssey_free_screen,
- .show_screen = odyssey_show_screen,
- .load_font = odyssey_load_font,
- .list_font = odyssey_list_font
-};
-
-const struct wsscreen_descr *odyssey_scrlist[] = {
- &odyssey_stdscreen
-};
-
-struct wsscreen_list odyssey_screenlist = {
- nitems(odyssey_scrlist), odyssey_scrlist
-};
-
-const struct cfattach odyssey_ca = {
- sizeof(struct odyssey_softc), odyssey_match, odyssey_attach,
-};
-
-struct cfdriver odyssey_cd = {
- NULL, "odyssey", DV_DULL,
-};
-
-int
-odyssey_match(struct device *parent, void *match, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
-
- if (xaa->xaa_vendor == XBOW_VENDOR_SGI2 &&
- xaa->xaa_product == XBOW_PRODUCT_SGI2_ODYSSEY)
- return 1;
-
- return 0;
-}
-
-void
-odyssey_attach(struct device *parent, struct device *self, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
- struct wsemuldisplaydev_attach_args waa;
- struct odyssey_softc *sc = (void *)self;
- struct odyssey_screen *screen;
-
- if (strncmp(bios_graphics, "alive", 5) != 0) {
- printf(" device has not been setup by firmware!\n");
- return;
- }
-
- printf(" revision %d\n", xaa->xaa_revision);
-
- /*
- * Create a copy of the bus space tag.
- */
- bcopy(xaa->xaa_iot, &sc->iot_store, sizeof(struct mips_bus_space));
- sc->iot = &sc->iot_store;
-
- /* Setup bus space mappings. */
- if (bus_space_map(sc->iot, ODYSSEY_REG_OFFSET, ODYSSEY_REG_SIZE,
- BUS_SPACE_MAP_LINEAR, &sc->ioh)) {
- printf("failed to map bus space!\n");
- return;
- }
-
- if (odyssey_is_console(xaa)) {
- /*
- * Setup has already been done via odyssey_cnattach().
- */
- screen = &odyssey_consdata;
- sc->curscr = screen;
- sc->curscr->sc = (void *)sc;
- sc->console = 1;
- } else {
- /*
- * Setup screen data.
- */
- sc->curscr = malloc(sizeof(struct odyssey_screen), M_DEVBUF,
- M_NOWAIT);
- if (sc->curscr == NULL) {
- printf("failed to allocate screen memory!\n");
- return;
- }
- sc->curscr->sc = (void *)sc;
- screen = sc->curscr;
-
- /* Setup hardware and clear screen. */
- odyssey_setup(sc);
- odyssey_fillrect(sc, 0, 0, 1280, 1024, 0x000000);
- odyssey_cmd_flush(sc, 0);
-
- /* Set screen defaults. */
- screen->width = 1280;
- screen->height = 1024;
- screen->depth = 32;
- screen->linebytes = screen->width * screen->depth / 8;
-
- odyssey_init_screen(screen);
- }
-
- waa.console = sc->console;
- waa.scrdata = &odyssey_screenlist;
- waa.accessops = &odyssey_accessops;
- waa.accesscookie = screen;
- waa.defaultscreens = 0;
- config_found(self, &waa, wsemuldisplaydevprint);
-}
-
-void
-odyssey_init_screen(struct odyssey_screen *screen)
-{
- u_char *colour;
- int i;
-
- /*
- * Initialise screen.
- */
-
- /* Initialise rasops. */
- memset(&screen->ri, 0, sizeof(struct rasops_info));
-
- screen->ri.ri_flg = RI_CENTER;
- screen->ri.ri_depth = screen->depth;
- screen->ri.ri_width = screen->width;
- screen->ri.ri_height = screen->height;
- screen->ri.ri_stride = screen->linebytes;
-
- if (screen->depth == 32) {
- screen->ri.ri_bpos = 16;
- screen->ri.ri_bnum = 8;
- screen->ri.ri_gpos = 8;
- screen->ri.ri_gnum = 8;
- screen->ri.ri_rpos = 0;
- screen->ri.ri_rnum = 8;
- } else if (screen->depth == 16) {
- screen->ri.ri_rpos = 10;
- screen->ri.ri_rnum = 5;
- screen->ri.ri_gpos = 5;
- screen->ri.ri_gnum = 5;
- screen->ri.ri_bpos = 0;
- screen->ri.ri_bnum = 5;
- }
-
- rasops_init(&screen->ri, screen->height / 8, screen->width / 8);
-
- /*
- * Initialise colourmap, if required.
- */
- if (screen->depth == 8) {
- for (i = 0; i < 16; i++) {
- colour = (u_char *)&rasops_cmap[i * 3];
- screen->cmap.cm_red[i] = colour[0];
- screen->cmap.cm_green[i] = colour[1];
- screen->cmap.cm_blue[i] = colour[2];
- }
- for (i = 240; i < 256; i++) {
- colour = (u_char *)&rasops_cmap[i * 3];
- screen->cmap.cm_red[i] = colour[0];
- screen->cmap.cm_green[i] = colour[1];
- screen->cmap.cm_blue[i] = colour[2];
- }
- }
-
- screen->ri.ri_hw = screen->sc;
-
- screen->ri.ri_ops.putchar = odyssey_putchar;
- screen->ri.ri_do_cursor = odyssey_do_cursor;
- screen->ri.ri_ops.copyrows = odyssey_copyrows;
- screen->ri.ri_ops.copycols = odyssey_copycols;
- screen->ri.ri_ops.eraserows = odyssey_eraserows;
- screen->ri.ri_ops.erasecols = odyssey_erasecols;
-
- odyssey_stdscreen.ncols = screen->ri.ri_cols;
- odyssey_stdscreen.nrows = screen->ri.ri_rows;
- odyssey_stdscreen.textops = &screen->ri.ri_ops;
- odyssey_stdscreen.fontwidth = screen->ri.ri_font->fontwidth;
- odyssey_stdscreen.fontheight = screen->ri.ri_font->fontheight;
- odyssey_stdscreen.capabilities = screen->ri.ri_caps;
-}
-
-/*
- * Hardware initialisation.
- */
-void
-odyssey_setup(struct odyssey_softc *sc)
-{
- u_int64_t val;
- int i;
-
- /* Initialise Buzz Graphics Engine. */
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x20008003);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x21008010);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x22008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x23008002);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x2400800c);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x2500800e);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x27008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x28008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x290080d6);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x2a0080e0);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x2c0080ea);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x2e008380);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x2f008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x30008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x31008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x32008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x33008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x34008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x35008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x310081e0);
- odyssey_cmd_flush(sc, 0);
-
- /* Initialise Buzz X-Form. */
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x9080bda2);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f800000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0xbf800000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x4e000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x40400000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x4e000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x4d000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x34008000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x9080bdc8);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f800000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f800000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f800000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f800000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x34008010);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x908091df);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3f800000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x34008000);
- odyssey_cmd_flush(sc, 0);
-
- /* Initialise Buzz Raster. */
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x0001203b);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00001000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00001000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00001000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00001000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x0001084a);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000080);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000080);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010845);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x000000ff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x000076ff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x0001141b);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000001);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00011c16);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x03000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010404);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00011023);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00ff0ff0);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00ff0ff0);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x000000ff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00011017);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00002000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000050);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x20004950);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x0001204b);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x004ff3ff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00ffffff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00ffffff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00ffffff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- odyssey_cmd_flush(sc, 0);
-
- /*
- * Initialise Pixel Blaster & Jammer.
- */
- for (i = 0; i < 32; i++) {
- if ((i & 0xf) == 0)
- odyssey_data_wait(sc);
-
- bus_space_write_8(sc->iot, sc->ioh, ODYSSEY_DATA_FIFO,
- ((0x30000001ULL | ((0x2900 + i) << 14)) << 32) |
- 0x905215a6);
- }
-
- odyssey_data_wait(sc);
- bus_space_write_8(sc->iot, sc->ioh, ODYSSEY_DATA_FIFO,
- ((0x30000001ULL | (0x2581 << 14)) << 32) | 0x0);
-
- /* Gamma ramp. */
- for (i = 0; i < 0x600; i++) {
- if ((i & 0xf) == 0)
- odyssey_data_wait(sc);
-
- if (i < 0x200)
- val = i >> 2;
- else if (i < 0x300)
- val = ((i - 0x200) >> 1) + 0x80;
- else
- val = ((i - 0x300) >> 0) + 0x100;
-
- val = (val << 20) | (val << 10) | val;
-
- bus_space_write_8(sc->iot, sc->ioh, ODYSSEY_DATA_FIFO,
- ((0x30000001ULL | ((0x1a00 + i) << 14)) << 32) | val);
- }
-}
-
-void
-odyssey_cmd_wait(struct odyssey_softc *sc)
-{
- u_int32_t val, timeout = 1000000;
-
- val = bus_space_read_4(sc->iot, sc->ioh, ODYSSEY_STATUS);
- while ((val & ODYSSEY_STATUS_CMD_FIFO_LOW) == 0) {
- delay(1);
- if (--timeout == 0) {
- printf("odyssey: timeout waiting for command fifo!\n");
- return;
- }
- val = bus_space_read_4(sc->iot, sc->ioh, ODYSSEY_STATUS);
- }
-}
-
-void
-odyssey_data_wait(struct odyssey_softc *sc)
-{
- u_int32_t val, timeout = 1000000;
-
- val = bus_space_read_4(sc->iot, sc->ioh, ODYSSEY_DBE_STATUS);
- while ((val & 0x7f) > 0) {
- delay(1);
- if (--timeout == 0) {
- printf("odyssey: timeout waiting for data fifo!\n");
- return;
- }
- val = bus_space_read_4(sc->iot, sc->ioh, ODYSSEY_DBE_STATUS);
- }
-}
-
-void
-odyssey_cmd_flush(struct odyssey_softc *sc, int quick)
-{
-
- odyssey_cmd_wait(sc);
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010443);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x000000fa);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
-
- if (quick)
- return;
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010019);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010443);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000096);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010443);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x000000fa);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010046);
-}
-
-/*
- * Interfaces for wscons.
- */
-
-int
-odyssey_ioctl(void *v, u_long cmd, caddr_t data, int flags, struct proc *p)
-{
- struct odyssey_screen *screen = (struct odyssey_screen *)v;
- int rc;
-
- switch (cmd) {
- case WSDISPLAYIO_GTYPE:
- *(u_int *)data = WSDISPLAY_TYPE_ODYSSEY;
- break;
-
- case WSDISPLAYIO_GINFO:
- {
- struct wsdisplay_fbinfo *fb = (struct wsdisplay_fbinfo *)data;
-
- fb->height = screen->height;
- fb->width = screen->width;
- fb->depth = screen->depth;
- fb->cmsize = screen->depth == 8 ? 256 : 0;
- }
- break;
-
- case WSDISPLAYIO_LINEBYTES:
- *(u_int *)data = screen->linebytes;
- break;
-
- case WSDISPLAYIO_GETCMAP:
- if (screen->depth == 8) {
- struct wsdisplay_cmap *cm =
- (struct wsdisplay_cmap *)data;
-
- rc = odyssey_getcmap(&screen->cmap, cm);
- if (rc != 0)
- return (rc);
- }
- break;
-
- case WSDISPLAYIO_PUTCMAP:
- if (screen->depth == 8) {
- struct wsdisplay_cmap *cm =
- (struct wsdisplay_cmap *)data;
-
- rc = odyssey_putcmap(&screen->cmap, cm);
- if (rc != 0)
- return (rc);
- }
- break;
-
- case WSDISPLAYIO_GVIDEO:
- case WSDISPLAYIO_SVIDEO:
- /* Handled by the upper layer. */
- break;
-
- default:
- return (-1);
- }
-
- return (0);
-}
-
-int
-odyssey_getcmap(struct odyssey_cmap *cm, struct wsdisplay_cmap *rcm)
-{
- u_int index = rcm->index, count = rcm->count;
- int rc;
-
- if (index >= 256 || count > 256 - index)
- return (EINVAL);
-
- if ((rc = copyout(&cm->cm_red[index], rcm->red, count)) != 0)
- return (rc);
- if ((rc = copyout(&cm->cm_green[index], rcm->green, count)) != 0)
- return (rc);
- if ((rc = copyout(&cm->cm_blue[index], rcm->blue, count)) != 0)
- return (rc);
-
- return (0);
-}
-
-int
-odyssey_putcmap(struct odyssey_cmap *cm, struct wsdisplay_cmap *rcm)
-{
- u_int index = rcm->index, count = rcm->count;
- int rc;
-
- if (index >= 256 || count > 256 - index)
- return (EINVAL);
-
- if ((rc = copyin(rcm->red, &cm->cm_red[index], count)) != 0)
- return (rc);
- if ((rc = copyin(rcm->green, &cm->cm_green[index], count)) != 0)
- return (rc);
- if ((rc = copyin(rcm->blue, &cm->cm_blue[index], count)) != 0)
- return (rc);
-
- return (0);
-}
-
-paddr_t
-odyssey_mmap(void *v, off_t offset, int protection)
-{
- return (-1);
-}
-
-int
-odyssey_alloc_screen(void *v, const struct wsscreen_descr *type,
- void **cookiep, int *curxp, int *curyp, uint32_t *attrp)
-{
- struct odyssey_screen *screen = (struct odyssey_screen *)v;
- struct odyssey_softc *sc = (struct odyssey_softc *)screen->sc;
-
- /* We do not allow multiple consoles at the moment. */
- if (sc->screens > 0)
- return (ENOMEM);
-
- sc->screens++;
-
- /* Return rasops_info via cookie. */
- *cookiep = &screen->ri;
-
- /* Move cursor to top left of screen. */
- *curxp = 0;
- *curyp = 0;
-
- /* Correct screen attributes. */
- screen->ri.ri_ops.pack_attr(&screen->ri, 0, 0, 0, attrp);
- screen->attr = *attrp;
-
- return (0);
-}
-
-void
-odyssey_free_screen(void *v, void *cookie)
-{
- /* We do not allow multiple consoles at the moment. */
-}
-
-int
-odyssey_show_screen(void *v, void *cookie, int waitok,
- void (*cb)(void *, int, int), void *cbarg)
-{
- /* We do not allow multiple consoles at the moment. */
- return (0);
-}
-
-int
-odyssey_load_font(void *v, void *emulcookie, struct wsdisplay_font *font)
-{
- struct odyssey_screen *screen = (struct odyssey_screen *)v;
-
- return rasops_load_font(&screen->ri, emulcookie, font);
-}
-
-int
-odyssey_list_font(void *v, struct wsdisplay_font *font)
-{
- struct odyssey_screen *screen = (struct odyssey_screen *)v;
-
- return rasops_list_font(&screen->ri, font);
-}
-
-/*
- * Hardware accelerated functions.
- */
-
-void
-odyssey_rop(struct odyssey_softc *sc, int x, int y, int w, int h, int op, int c)
-{
- /* Setup raster operation. */
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010404);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00100000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_LOGIC_OP);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, op);
- odyssey_cmd_flush(sc, 1);
-
- odyssey_fillrect(sc, x, y, w, h, c);
-
- /* Return to copy mode. */
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010404);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00100000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_LOGIC_OP);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO,
- OPENGL_LOGIC_OP_COPY);
- odyssey_cmd_flush(sc, 1);
-}
-
-void
-odyssey_copyrect(struct odyssey_softc *sc, int sx, int sy, int dx, int dy,
- int w, int h)
-{
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010658);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00120000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00002031);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00002000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, sx | (sy << 16));
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x80502050);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, w | (h << 16));
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x82223042);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00002000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, dx | (dy << 16));
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x3222204b);
-
- odyssey_cmd_flush(sc, 1);
-}
-
-void
-odyssey_fillrect(struct odyssey_softc *sc, int x, int y, int w, int h, u_int c)
-{
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_BEGIN);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_QUADS);
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_COLOR_3UB);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, c & 0xff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, (c >> 8) & 0xff);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, (c >> 16) & 0xff);
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_VERTEX_2I);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, x);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, y);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_VERTEX_2I);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, x + w);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, y);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_VERTEX_2I);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, x + w);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, y + h);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_VERTEX_2I);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, x);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, y + h);
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_END);
-
- odyssey_cmd_flush(sc, 1);
-}
-
-int
-odyssey_do_cursor(struct rasops_info *ri)
-{
- struct odyssey_softc *sc = ri->ri_hw;
- struct odyssey_screen *screen = sc->curscr;
- int y, x, w, h, fg, bg;
-
- w = ri->ri_font->fontwidth;
- h = ri->ri_font->fontheight;
- x = ri->ri_xorigin + ri->ri_ccol * w;
- y = ri->ri_yorigin + ri->ri_crow * h;
-
- ri->ri_ops.unpack_attr(ri, screen->attr, &fg, &bg, NULL);
-
- odyssey_rop(sc, x, y, w, h, OPENGL_LOGIC_OP_XOR, ri->ri_devcmap[fg]);
- odyssey_cmd_flush(sc, 0);
-
- return 0;
-}
-
-int
-odyssey_putchar(void *cookie, int row, int col, u_int uc, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct odyssey_softc *sc = ri->ri_hw;
- struct wsdisplay_font *font = ri->ri_font;
- int bg, fg, ul, i, j, ci, l;
- uint x, y, w, h;
- u_int8_t *fontbitmap;
- u_int chunk;
-
- w = ri->ri_font->fontwidth;
- h = ri->ri_font->fontheight;
- x = ri->ri_xorigin + col * w;
- y = ri->ri_yorigin + row * h;
-
- fontbitmap = (u_int8_t *)(font->data + (uc - font->firstchar) *
- ri->ri_fontscale);
- ri->ri_ops.unpack_attr(ri, attr, &fg, &bg, &ul);
-
- /* Handle spaces with a single fillrect. */
- if (uc == ' ') {
- odyssey_fillrect(sc, x, y, w, h, ri->ri_devcmap[bg]);
- odyssey_cmd_flush(sc, 0);
- return 0;
- }
-
- odyssey_fillrect(sc, x, y, w, h, 0xff0000);
-
- /* Setup pixel painting. */
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010405);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00002400);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_COLOR_3UB);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00011453);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000002);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- odyssey_cmd_flush(sc, 0);
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x2900812f);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_BEGIN);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x0000000a);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0xcf80a92f);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, ieee754_sp(x));
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, ieee754_sp(y));
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO,
- ieee754_sp(x + font->fontwidth));
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO,
- ieee754_sp(y + font->fontheight));
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_VERTEX_2I);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00004570);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x0f00104c);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000071);
-
- for (i = font->fontheight; i != 0; i--) {
-
- /* Get bitmap for current line. */
- if (font->fontwidth <= 8)
- chunk = *fontbitmap;
- else
- chunk = *(u_int16_t *)fontbitmap;
- fontbitmap += font->stride;
-
- /* Handle underline. */
- if (ul && i == 1)
- chunk = 0xffff;
-
- /* Draw character. */
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO,
- 0x00004570);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO,
- 0x0fd1104c);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO,
- 0x00000071);
-
- w = font->fontwidth;
- l = 0;
-
- for (j = 0; j < font->fontwidth; j++) {
-
- if (l == 0) {
-
- l = (w > 14 ? 14 : w);
- w -= 14;
-
- /* Number of pixels. */
- bus_space_write_4(sc->iot, sc->ioh,
- ODYSSEY_CMD_FIFO, (0x00014011 |
- (l << 10)));
-
- }
-
- if (font->fontwidth > 8)
- ci = (chunk & (1 << (16 - j)) ? fg : bg);
- else
- ci = (chunk & (1 << (8 - j)) ? fg : bg);
-
- bus_space_write_4(sc->iot, sc->ioh,
- ODYSSEY_CMD_FIFO, ri->ri_devcmap[ci]);
-
- l--;
- }
- }
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, OPENGL_END);
- odyssey_cmd_flush(sc, 1);
-
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x290080d6);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00011453);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00000000);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00010405);
- bus_space_write_4(sc->iot, sc->ioh, ODYSSEY_CMD_FIFO, 0x00002000);
- odyssey_cmd_flush(sc, 0);
-
- return 0;
-}
-
-int
-odyssey_copycols(void *cookie, int row, int src, int dst, int num)
-{
- struct rasops_info *ri = cookie;
- struct odyssey_softc *sc = ri->ri_hw;
- int i;
-
- if (src < dst) {
-
- /* We cannot control copy direction, so copy col by col. */
- for (i = num - 1; i >= 0; i--)
- odyssey_copyrect(sc,
- ri->ri_xorigin + (src + i) * ri->ri_font->fontwidth,
- ri->ri_yorigin + row * ri->ri_font->fontheight,
- ri->ri_xorigin + (dst + i) * ri->ri_font->fontwidth,
- ri->ri_yorigin + row * ri->ri_font->fontheight,
- ri->ri_font->fontwidth, ri->ri_font->fontheight);
-
- } else {
-
- odyssey_copyrect(sc,
- ri->ri_xorigin + src * ri->ri_font->fontwidth,
- ri->ri_yorigin + row * ri->ri_font->fontheight,
- ri->ri_xorigin + dst * ri->ri_font->fontwidth,
- ri->ri_yorigin + row * ri->ri_font->fontheight,
- num * ri->ri_font->fontwidth, ri->ri_font->fontheight);
-
- }
-
- odyssey_cmd_flush(sc, 0);
-
- return 0;
-}
-
-int
-odyssey_erasecols(void *cookie, int row, int col, int num, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct odyssey_softc *sc = ri->ri_hw;
- int bg, fg;
-
- ri->ri_ops.unpack_attr(cookie, attr, &fg, &bg, NULL);
-
- row *= ri->ri_font->fontheight;
- col *= ri->ri_font->fontwidth;
- num *= ri->ri_font->fontwidth;
-
- odyssey_fillrect(sc, ri->ri_xorigin + col, ri->ri_yorigin + row,
- num, ri->ri_font->fontheight, ri->ri_devcmap[bg]);
- odyssey_cmd_flush(sc, 0);
-
- return 0;
-}
-
-int
-odyssey_copyrows(void *cookie, int src, int dst, int num)
-{
- struct rasops_info *ri = cookie;
- struct odyssey_softc *sc = ri->ri_hw;
- int i;
-
- if (src < dst) {
-
- /* We cannot control copy direction, so copy row by row. */
- for (i = num - 1; i >= 0; i--)
- odyssey_copyrect(sc, ri->ri_xorigin, ri->ri_yorigin +
- (src + i) * ri->ri_font->fontheight,
- ri->ri_xorigin, ri->ri_yorigin +
- (dst + i) * ri->ri_font->fontheight,
- ri->ri_emuwidth, ri->ri_font->fontheight);
-
- } else {
-
- odyssey_copyrect(sc, ri->ri_xorigin,
- ri->ri_yorigin + src * ri->ri_font->fontheight,
- ri->ri_xorigin,
- ri->ri_yorigin + dst * ri->ri_font->fontheight,
- ri->ri_emuwidth, num * ri->ri_font->fontheight);
-
- }
-
- odyssey_cmd_flush(sc, 0);
-
- return 0;
-}
-
-int
-odyssey_eraserows(void *cookie, int row, int num, uint32_t attr)
-{
- struct rasops_info *ri = cookie;
- struct odyssey_softc *sc = ri->ri_hw;
- int x, y, w, bg, fg;
-
- ri->ri_ops.unpack_attr(cookie, attr, &fg, &bg, NULL);
-
- if ((num == ri->ri_rows) && ISSET(ri->ri_flg, RI_FULLCLEAR)) {
- num = ri->ri_height;
- x = y = 0;
- w = ri->ri_width;
- } else {
- num *= ri->ri_font->fontheight;
- x = ri->ri_xorigin;
- y = ri->ri_yorigin + row * ri->ri_font->fontheight;
- w = ri->ri_emuwidth;
- }
-
- odyssey_fillrect(sc, x, y, w, num, ri->ri_devcmap[bg]);
- odyssey_cmd_flush(sc, 0);
-
- return 0;
-}
-
-u_int32_t
-ieee754_sp(uint v)
-{
- u_int8_t exp = 0;
- int i = 12; /* 0 <= v < 2048 */
-
- /*
- * Convert a small integer to IEEE754 single precision floating point:
- *
- * Sign - 1 bit
- * Exponent - 8 bits (with 2^(8-1)-1 = 127 bias)
- * Fraction - 23 bits
- */
-
- /* Determine shift for fraction. */
- while (i && (v & (1 << --i)) == 0);
-
- if (v != 0)
- exp = 127 + i;
-
- return (exp << 23) | ((v << (23 - i)) & 0x7fffff);
-}
-
-/*
- * Console support.
- */
-
-int
-odyssey_cnprobe()
-{
- u_int32_t wid, vendor, product;
-
- /* Probe for Odyssey graphics card. */
- if (xbow_widget_id(console_output.nasid, console_output.widget,
- &wid) != 0)
- return 0;
-
- vendor = WIDGET_ID_VENDOR(wid);
- product = WIDGET_ID_PRODUCT(wid);
-
- if (vendor != XBOW_VENDOR_SGI2 || product != XBOW_PRODUCT_SGI2_ODYSSEY)
- return 0;
-
- if (strncmp(bios_graphics, "alive", 5) != 0)
- return 0;
-
- return 1;
-}
-
-int
-odyssey_cnattach()
-{
- struct odyssey_softc *sc;
- struct odyssey_screen *screen;
- int rc;
-
- sc = &odyssey_cons_sc;
- screen = &odyssey_consdata;
- sc->curscr = screen;
- sc->curscr->sc = (void *)sc;
-
- /* Build bus space accessor. */
- xbow_build_bus_space(&sc->iot_store, console_output.nasid,
- console_output.widget);
- sc->iot = &sc->iot_store;
-
- /* Setup bus space mappings. */
- rc = bus_space_map(sc->iot, ODYSSEY_REG_OFFSET, ODYSSEY_REG_SIZE,
- BUS_SPACE_MAP_LINEAR, &sc->ioh);
- if (rc != 0)
- return rc;
-
- /* Setup hardware and clear screen. */
- odyssey_setup(sc);
- odyssey_fillrect(sc, 0, 0, 1280, 1024, 0x000000);
- odyssey_cmd_flush(sc, 0);
-
- /* Set screen defaults. */
- screen->width = 1280;
- screen->height = 1024;
- screen->depth = 32;
- screen->linebytes = screen->width * screen->depth / 8;
-
- odyssey_init_screen(screen);
-
- /*
- * Attach wsdisplay.
- */
- screen->ri.ri_ops.pack_attr(&screen->ri, 0, 0, 0, &screen->attr);
- wsdisplay_cnattach(&odyssey_stdscreen, &screen->ri, 0, 0, screen->attr);
-
- return 0;
-}
-
-int
-odyssey_is_console(struct xbow_attach_args *xaa)
-{
- return xaa->xaa_nasid == console_output.nasid &&
- xaa->xaa_widget == console_output.widget;
-}
+++ /dev/null
-/* $OpenBSD: odysseyreg.h,v 1.2 2012/04/16 22:17:16 miod Exp $ */
-/*
- * Copyright (c) 2009, 2010 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * Register details for the SGI VPro (aka Odyssey) Graphics Card.
- */
-
-#define ODYSSEY_REG_OFFSET 0x00000000
-#define ODYSSEY_REG_SIZE 0x00410000
-
-#define ODYSSEY_STATUS 0x00001064
-#define ODYSSEY_STATUS_CMD_FIFO_HIGH 0x00008000
-#define ODYSSEY_STATUS_CMD_FIFO_LOW 0x00020000
-#define ODYSSEY_DBE_STATUS 0x0000106c
-
-#define ODYSSEY_CMD_FIFO 0x00110000
-#define ODYSSEY_DATA_FIFO 0x00400000
-
-/*
- * OpenGL Commands.
- */
-
-#define OPENGL_BEGIN 0x00014400
-#define OPENGL_END 0x00014001
-#define OPENGL_LOGIC_OP 0x00010422
-#define OPENGL_VERTEX_2I 0x8080c800
-#define OPENGL_COLOR_3UB 0xc580cc08
-
-#define OPENGL_QUADS 0x00000007
+++ /dev/null
-/* $OpenBSD: odysseyvar.h,v 1.2 2010/04/06 19:12:34 miod Exp $ */
-/*
- * Copyright (c) 2010 Joel Sing <jsing@openbsd.org>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-int odyssey_cnprobe(void);
-int odyssey_cnattach(void);
+++ /dev/null
-/* $OpenBSD: widget.h,v 1.2 2010/04/06 19:02:57 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _WIDGET_H_
-#define _WIDGET_H_
-
-/*
- * Common Widget Registers. Every widget provides them.
- *
- * Registers are 32 or 64 bit wide (depending on the particular widget
- * or register) on 64 bit boundaries.
- * The widget_{read,write}_[48] functions below hide the addressing
- * games required to perform 32 bit accesses.
- */
-
-#define WIDGET_ID 0x0000
-#define WIDGET_ID_REV_MASK 0xf0000000
-#define WIDGET_ID_REV_SHIFT 28
-#define WIDGET_ID_REV(wid) \
- (((wid) & WIDGET_ID_REV_MASK) >> WIDGET_ID_REV_SHIFT)
-#define WIDGET_ID_PRODUCT_MASK 0x0ffff000
-#define WIDGET_ID_PRODUCT_SHIFT 12
-#define WIDGET_ID_PRODUCT(wid) \
- (((wid) & WIDGET_ID_PRODUCT_MASK) >> WIDGET_ID_PRODUCT_SHIFT)
-#define WIDGET_ID_VENDOR_MASK 0x00000ffe
-#define WIDGET_ID_VENDOR_SHIFT 1
-#define WIDGET_ID_VENDOR(wid) \
- (((wid) & WIDGET_ID_VENDOR_MASK) >> WIDGET_ID_VENDOR_SHIFT)
-#define WIDGET_STATUS 0x0008
-#define WIDGET_ERR_ADDR_UPPER 0x0010
-#define WIDGET_ERR_ADDR_LOWER 0x0018
-#define WIDGET_CONTROL 0x0020
-#define WIDGET_REQ_TIMEOUT 0x0028
-#define WIDGET_INTDEST_ADDR_UPPER 0x0030
-#define WIDGET_INTDEST_ADDR_LOWER 0x0038
-#define WIDGET_ERR_CMD_WORD 0x0040
-#define WIDGET_LLP_CFG 0x0048
-#define WIDGET_TFLUSH 0x0050
-
-/*
- * Crossbow Specific Registers.
- */
-
-#define XBOW_WID_ARB_RELOAD 0x0058
-#define XBOW_PERFCNTR_A 0x0060
-#define XBOW_PERFCNTR_B 0x0068
-#define XBOW_NIC 0x0070
-#define XBOW_WIDGET_LINK(w) (0x0100 + ((w) & 7) * 0x0040)
-
-/*
- * Crossbow Per-widget ``Link'' Register Set.
- */
-#define WIDGET_LINK_IBF 0x0000
-#define WIDGET_LINK_CONTROL 0x0008
-#define WIDGET_CONTROL_ALIVE 0x80000000
-#define WIDGET_LINK_STATUS 0x0010
-#define WIDGET_STATUS_ALIVE 0x80000000
-#define WIDGET_LINK_ARB_UPPER 0x0018
-#define WIDGET_LINK_ARB_LOWER 0x0020
-#define WIDGET_LINK_STATUS_CLEAR 0x0028
-#define WIDGET_LINK_RESET 0x0030
-#define WIDGET_LINK_AUX_STATUS 0x0038
-
-#endif /* _WIDGET_H_ */
+++ /dev/null
-/* $OpenBSD: xbow.c,v 1.36 2021/03/11 11:17:00 jsg Exp $ */
-
-/*
- * Copyright (c) 2008, 2009, 2011 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-/*
- * Copyright (c) 2004 Opsycon AB (www.opsycon.se)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * XBOW is the mux between two nodes and XIO.
- *
- * A Crossbow (XBOW) connects two nodeboards via their respective
- * HUB to up to six different I/O controllers in XIO slots. In a
- * multiprocessor system all processors have access to the XIO
- * slots but may need to pass traffic via the routers.
- *
- * To each XIO port on the XBOW a XIO interface is attached. Such
- * interfaces can be for example PCI bridges which then add another
- * level to the hierarchy.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/conf.h>
-#include <sys/malloc.h>
-#include <sys/device.h>
-#include <sys/atomic.h>
-
-#include <mips64/archtype.h>
-
-#include <machine/autoconf.h>
-#include <machine/intr.h>
-#include <machine/mnode.h>
-
-#include <sgi/xbow/hub.h>
-#include <sgi/xbow/widget.h>
-#include <sgi/xbow/xbow.h>
-
-#include <sgi/xbow/xbowdevs.h>
-#include <sgi/xbow/xbowdevs_data.h>
-
-int xbowmatch(struct device *, void *, void *);
-void xbowattach(struct device *, struct device *, void *);
-int xbowprint(void *, const char *);
-int xbowsubmatch(struct device *, void *, void *);
-int xbow_attach_widget(struct device *, int16_t, int,
- int (*)(struct device *, void *, void *), cfprint_t);
-
-int xbow_kl_search_brd(lboard_t *, void *);
-int xbow_kl_search_mplane(klinfo_t *, void *);
-
-uint32_t xbow_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-uint64_t xbow_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-void xbow_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, uint32_t);
-void xbow_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, uint64_t);
-void xbow_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void xbow_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-void xbow_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void xbow_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-
-void xbow_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-int xbow_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, bus_space_handle_t *);
-void *xbow_space_vaddr(bus_space_tag_t, bus_space_handle_t);
-void xbow_space_barrier(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- bus_size_t, int);
-
-const struct xbow_product *xbow_identify(uint32_t, uint32_t);
-
-struct xbow_softc {
- struct device sc_dev;
- int16_t sc_nasid;
-};
-
-const struct cfattach xbow_ca = {
- sizeof(struct xbow_softc), xbowmatch, xbowattach
-};
-
-struct cfdriver xbow_cd = {
- NULL, "xbow", DV_DULL
-};
-
-static const bus_space_t xbowbus_tag = {
- (bus_addr_t)0, /* will be modified in widgets bus_space_t */
- NULL,
- xbow_read_1,
- xbow_write_1,
- xbow_read_2,
- xbow_write_2,
- xbow_read_4,
- xbow_write_4,
- xbow_read_8,
- xbow_write_8,
- xbow_read_raw_2,
- xbow_write_raw_2,
- xbow_read_raw_4,
- xbow_write_raw_4,
- xbow_read_raw_8,
- xbow_write_raw_8,
- xbow_space_map,
- xbow_space_unmap,
- xbow_space_region,
- xbow_space_vaddr,
- xbow_space_barrier
-};
-
-/*
- * Function pointers to hide widget discovery and mapping differences across
- * systems.
- */
-paddr_t (*xbow_widget_base)(int16_t, u_int);
-paddr_t (*xbow_widget_map)(int16_t, u_int, bus_addr_t *, bus_size_t *);
-
-int (*xbow_widget_id)(int16_t, u_int, uint32_t *);
-
-/*
- * Attachment glue.
- */
-
-int
-xbowmatch(struct device *parent, void *match, void *aux)
-{
- struct mainbus_attach_args *maa = aux;
-
- if (strcmp(maa->maa_name, xbow_cd.cd_name) != 0)
- return (0);
-
- switch (sys_config.system_type) {
- case SGI_IP27:
- case SGI_IP35:
- case SGI_OCTANE:
- return (1);
- default:
- return (0);
- }
-}
-
-const struct xbow_product *
-xbow_identify(uint32_t vendor, uint32_t product)
-{
- const struct xbow_product *p;
-
- for (p = xbow_products; p->productname != NULL; p++)
- if (p->vendor == vendor && p->product == product)
- return p;
-
- return NULL;
-}
-
-int
-xbowprint(void *aux, const char *pnp)
-{
- struct xbow_attach_args *xaa = aux;
- const struct xbow_product *p;
-
- p = xbow_identify(xaa->xaa_vendor, xaa->xaa_product);
-
- if (pnp != NULL) {
- if (p != NULL)
- printf("\"%s\"", p->productname);
- else
- printf("vendor %x product %x",
- xaa->xaa_vendor, xaa->xaa_product);
- printf(" revision %d at %s",
- xaa->xaa_revision, pnp);
- }
- printf(" widget %d", xaa->xaa_widget);
- if (pnp == NULL) {
- if (p != NULL)
- printf(": %s", p->productname);
- }
-
- return (UNCONF);
-}
-
-int
-xbowsubmatch(struct device *parent, void *vcf, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
- struct cfdata *cf = vcf;
-
- if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != xaa->xaa_widget)
- return 0;
- if (cf->cf_loc[1] != -1 && cf->cf_loc[1] != xaa->xaa_vendor)
- return 0;
- if (cf->cf_loc[2] != -1 && cf->cf_loc[2] != xaa->xaa_product)
- return 0;
-
- return (*cf->cf_attach->ca_match)(parent, vcf, aux);
-}
-
-/*
- * Widget probe order for various components
- */
-
-#ifdef TGT_OCTANE
-/* Octane: probe Heart first, then onboard devices, then other slots */
-const uint8_t xbow_probe_octane[] =
- { 0x08, 0x0f, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0 };
-#endif
-#ifdef TGT_ORIGIN
-/* Origin 200: probe onboard devices, and there is nothing more */
-const uint8_t xbow_probe_singlebridge[] =
- { 0x08, 0 };
-/* Base I/O board: probe onboard devices, then other slots in ascending order */
-const uint8_t xbow_probe_baseio[] =
- { 0x0f, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0 };
-/* I-Brick: probe PCI buses first (starting with the onboard devices) */
-const uint8_t xbow_probe_ibrick[] =
- { 0x0f, 0x0e, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0 };
-/* P-Brick: all widgets are PCI buses, probe in recommended order */
-const uint8_t xbow_probe_pbrick[] =
- { 0x09, 0x08, 0x0f, 0x0e, 0x0c, 0x0d, 0x0a, 0x0b, 0 };
-/* X-Brick: all widgets are XIO devices, probe in recommended order */
-const uint8_t xbow_probe_xbrick[] =
- { 0x08, 0x09, 0x0c, 0x0d, 0x0a, 0x0b, 0x0e, 0x0f, 0 };
-#endif
-
-/*
- * Structures used to carry information between KL and attachment code.
- */
-
-struct xbow_config {
- int valid;
- int widgets[WIDGET_MAX + 1 - WIDGET_MIN];
-};
-
-struct xbow_kl_config {
- const uint8_t *probe_order;
- struct xbow_config *cfg;
-};
-
-void
-xbowattach(struct device *parent, struct device *self, void *aux)
-{
- struct xbow_softc *sc = (struct xbow_softc *)self;
- struct mainbus_attach_args *maa = aux;
- int16_t nasid = maa->maa_nasid;
- uint32_t wid, vendor, product;
- const struct xbow_product *p;
-#ifdef TGT_ORIGIN
- struct xbow_config cfg;
-#endif
- struct xbow_kl_config klcfg;
- uint widget;
-
- sc->sc_nasid = nasid;
-
- /*
- * This assumes widget 0 is the XBow itself (or an XXBow).
- * If it isn't - feel free to haunt my bedroom at night.
- */
- if (xbow_widget_id(nasid, 0, &wid) != 0)
- panic("no xbow");
- vendor = WIDGET_ID_VENDOR(wid);
- product = WIDGET_ID_PRODUCT(wid);
- p = xbow_identify(vendor, product);
- if (p == NULL)
- printf(": unknown xbow (vendor %x product %x)",
- vendor, product);
- else
- printf(": %s", p->productname);
- printf(" revision %d\n", WIDGET_ID_REV(wid));
-
- switch (sys_config.system_type) {
- default:
-#ifdef TGT_ORIGIN
- memset(&cfg, 0, sizeof cfg);
- klcfg.cfg = &cfg;
-
- /*
- * If widget 0 reports itself as a bridge, this is not a
- * complete XBow, but only a limited topology. This is
- * found on at least the Origin 200.
- */
- if (vendor == XBOW_VENDOR_SGI4 &&
- product == XBOW_PRODUCT_SGI4_BRIDGE) {
- klcfg.probe_order = xbow_probe_singlebridge;
- } else {
- /*
- * Get crossbow information from the KL configuration.
- */
- klcfg.probe_order = NULL;
- kl_scan_node(nasid, KLBRD_ANY, xbow_kl_search_brd,
- &klcfg);
- if (klcfg.probe_order == NULL)
- klcfg.probe_order = xbow_probe_baseio;
-
- /* should not happen, but I can't help being paranoid */
- if (cfg.valid == 0) {
- printf("%s: no hub\n", self->dv_xname);
- return;
- }
- }
- break;
-#endif
-#ifdef TGT_OCTANE
- case SGI_OCTANE:
- klcfg.probe_order = xbow_probe_octane;
- break;
-#endif
- }
-
- for (; *klcfg.probe_order != 0; klcfg.probe_order++) {
- widget = *klcfg.probe_order;
-#ifdef TGT_ORIGIN
- if (cfg.valid != 0 &&
- !ISSET(cfg.widgets[widget - WIDGET_MIN], XBOW_PORT_ENABLE))
- continue;
-#endif
- (void)xbow_attach_widget(self, nasid, widget, xbowsubmatch,
- xbowprint);
- }
-}
-
-int
-xbow_attach_widget(struct device *self, int16_t nasid, int widget,
- int (*sm)(struct device *, void *, void *), cfprint_t print)
-{
- struct xbow_attach_args xaa;
- uint32_t wid;
- struct mips_bus_space bs;
- int rc;
-
- if ((rc = xbow_widget_id(nasid, widget, &wid)) != 0)
- return rc;
-
- /*
- * Build a bus_space_t suitable for this widget.
- */
- xbow_build_bus_space(&bs, nasid, widget);
-
- xaa.xaa_nasid = nasid;
- xaa.xaa_widget = widget;
- xaa.xaa_vendor = WIDGET_ID_VENDOR(wid);
- xaa.xaa_product = WIDGET_ID_PRODUCT(wid);
- xaa.xaa_revision = WIDGET_ID_REV(wid);
- xaa.xaa_iot = &bs;
-
- if (config_found_sm(self, &xaa, print, sm) == NULL)
- return ENOENT;
-
- return 0;
-}
-
-#ifdef TGT_ORIGIN
-
-/*
- * These two functions try to figure out the configuration of the XBow
- * on this node.
- *
- * We are looking for two pieces of information:
- * - the Hub widget, to which memory is attached and interrupts are routed.
- * - what kind of Brick we are.
- *
- * The first information can be obtained easily by looking for a MPLANE type
- * board. However there is no easy way to figure the second part, except for
- * checking what kind of boards are reported.
- *
- * A BaseIO board will report itself once, as a single widget. Bricks, on the
- * other hand, appear for each of the widgets they provide.
- */
-
-int
-xbow_kl_search_brd(lboard_t *brd, void *arg)
-{
- struct xbow_kl_config *cfg = arg;
-
- switch (brd->brd_type & IP27_BC_MASK) {
- case IP27_BC_MPLANE:
- if (cfg->cfg->valid == 0)
- kl_scan_board(brd, KLSTRUCT_XBOW, xbow_kl_search_mplane,
- cfg->cfg);
- break;
- case IP27_BC_IO:
- if (cfg->probe_order == NULL)
- cfg->probe_order = xbow_probe_baseio;
- break;
- case IP27_BC_BRICK:
- if (cfg->probe_order == NULL)
- switch (brd->brd_type) {
- case IP27_BRD_IBRICK:
- case IP27_BRD_IXBRICK:
- cfg->probe_order = xbow_probe_ibrick;
- break;
- case IP27_BRD_PBRICK:
- case IP27_BRD_PXBRICK:
- cfg->probe_order = xbow_probe_pbrick;
- break;
- case IP27_BRD_XBRICK:
- cfg->probe_order = xbow_probe_xbrick;
- break;
- default:
- /* other brick */
- break;
- }
- break;
- }
-
- if (cfg->cfg->valid != 0 && cfg->probe_order != NULL)
- return 1; /* stop enumeration */
-
- return 0;
-}
-
-int
-xbow_kl_search_mplane(klinfo_t *c, void *arg)
-{
- klxbow_t *xbow = (klxbow_t *)c;
- struct xbow_config *cfg = arg;
- uint w;
-
- cfg->valid = 1;
- for (w = WIDGET_MIN; w <= WIDGET_MAX; w++)
- cfg->widgets[w - WIDGET_MIN] =
- xbow->xbow_port_info[w - WIDGET_MIN].port_flag;
-
- return 1;
-}
-
-#endif
-
-/*
- * Bus access primitives.
- */
-
-void
-xbow_build_bus_space(struct mips_bus_space *bs, int nasid, int widget)
-{
- bcopy(&xbowbus_tag, bs, sizeof (*bs));
- bs->bus_base = (*xbow_widget_base)(nasid, widget);
-}
-
-uint8_t
-xbow_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint8_t *)(h + o);
-}
-
-uint16_t
-xbow_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint16_t *)(h + o);
-}
-
-uint32_t
-xbow_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint32_t *)(h + o);
-}
-
-uint64_t
-xbow_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint64_t *)(h + o);
-}
-
-void
-xbow_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint8_t v)
-{
- *(volatile uint8_t *)(h + o) = v;
-}
-
-void
-xbow_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint16_t v)
-{
- *(volatile uint16_t *)(h + o) = v;
-}
-
-void
-xbow_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint32_t v)
-{
- *(volatile uint32_t *)(h + o) = v;
-}
-
-void
-xbow_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint64_t v)
-{
- *(volatile uint64_t *)(h + o) = v;
-}
-
-void
-xbow_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)(h + o);
- len >>= 1;
- while (len-- != 0) {
- *(uint16_t *)buf = *addr;
- buf += 2;
- }
-}
-
-void
-xbow_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)(h + o);
- len >>= 1;
- while (len-- != 0) {
- *addr = *(uint16_t *)buf;
- buf += 2;
- }
-}
-
-void
-xbow_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *(uint32_t *)buf = *addr;
- buf += 4;
- }
-}
-
-void
-xbow_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *addr = *(uint32_t *)buf;
- buf += 4;
- }
-}
-
-void
-xbow_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *(uint64_t *)buf = *addr;
- buf += 8;
- }
-}
-
-void
-xbow_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *addr = *(uint64_t *)buf;
- buf += 8;
- }
-}
-
-int
-xbow_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
- bus_addr_t bpa;
-
- bpa = t->bus_base + offs;
-
-#ifdef DIAGNOSTIC
- /* check that this does not overflow the window */
- if (((bpa + size - 1) >> 24) != (t->bus_base >> 24))
- return (EINVAL);
-#endif
-
- *bshp = bpa;
- return 0;
-}
-
-void
-xbow_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
-{
-}
-
-int
-xbow_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
-#ifdef DIAGNOSTIC
- bus_addr_t bpa;
-
- bpa = (bus_addr_t)bsh - t->bus_base;
- /* check that this does not overflow the window */
- if (((bpa + offset) >> 24) != (t->bus_base >> 24))
- return (EINVAL);
-#endif
-
- *nbshp = bsh + offset;
- return 0;
-}
-
-void *
-xbow_space_vaddr(bus_space_tag_t t, bus_space_handle_t h)
-{
- return (void *)h;
-}
-
-void
-xbow_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offs,
- bus_size_t len, int flags)
-{
- mips_sync();
-}
-
-/*
- * Interrupt handling code.
- *
- * Interrupt handling should be done at the Heart/Hub driver level, we only
- * act as a proxy here.
- *
- * Note that, for the time being, interrupt handling is implicitly done at
- * the master nasid; other nodes do not handle interrupts.
- */
-
-uint64_t xbow_intr_address;
-
-int (*xbow_intr_widget_intr_register)(int, int, int *) = NULL;
-int (*xbow_intr_widget_intr_establish)(int (*)(void *), void *, int, int,
- const char *, struct intrhand *) = NULL;
-void (*xbow_intr_widget_intr_disestablish)(int) = NULL;
-void (*xbow_intr_widget_intr_set)(int) = NULL;
-void (*xbow_intr_widget_intr_clear)(int) = NULL;
-
-int
-xbow_intr_register(int widget, int level, int *intrbit)
-{
- if (xbow_intr_widget_intr_register == NULL)
- return EINVAL;
-
- return (*xbow_intr_widget_intr_register)(widget, level, intrbit);
-}
-
-int
-xbow_intr_establish(int (*func)(void *), void *arg, int intrbit, int level,
- const char *name, struct intrhand *ihstore)
-{
- if (xbow_intr_widget_intr_establish == NULL)
- return EINVAL;
-
- return (*xbow_intr_widget_intr_establish)(func, arg, intrbit, level,
- name, ihstore);
-}
-
-void
-xbow_intr_disestablish(int intrbit)
-{
- if (xbow_intr_widget_intr_disestablish == NULL)
- return;
-
- (*xbow_intr_widget_intr_disestablish)(intrbit);
-}
-
-void
-xbow_intr_clear(int intrbit)
-{
- if (xbow_intr_widget_intr_clear == NULL)
- return;
-
- (*xbow_intr_widget_intr_clear)(intrbit);
-}
-
-void
-xbow_intr_set(int intrbit)
-{
- if (xbow_intr_widget_intr_set == NULL)
- return;
-
- (*xbow_intr_widget_intr_set)(intrbit);
-}
-
-/*
- * Widget mapping code.
- */
-
-paddr_t
-xbow_widget_map_space(struct device *dev, u_int widget, bus_addr_t *offs,
- bus_size_t *len)
-{
- struct xbow_softc *sc = (struct xbow_softc *)dev;
-
- if (xbow_widget_map == NULL)
- return 0UL;
-
- return (*xbow_widget_map)(sc->sc_nasid, widget, offs, len);
-}
+++ /dev/null
-/* $OpenBSD: xbow.h,v 1.12 2011/04/17 17:44:24 miod Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _XBOW_H_
-#define _XBOW_H_
-
-/*
- * Devices connected to the XBow are called ``widgets'' and are
- * identified by a common widget memory area at the beginning of their
- * memory space.
- *
- * Each widget has its own memory space. The lowest 16MB are always
- * accessible as a so-called ``short window''. Other `views' of the
- * widget are possible, depending on the system (the whole widget
- * address space is always visible on Octane, while Origin family
- * systems can only map a few ``large windows'', which are a scarce
- * resource).
- *
- * Apart from the crossbow itself being widget #0, the widgets are divided
- * in two groups: widgets #8 to #b are the ``upper'' widgets, while widgets
- * #c to #f are the ``lower'' widgets.
- *
- * Widgets are uniquely identified with their widget number on the XBow
- * bus. However, the way they are mapped and accessed will depend on the
- * processor (well, the processor board node) requesting access. Hence the
- * two parameters needed to map a widget.
- */
-
-extern paddr_t (*xbow_widget_base)(int16_t, u_int);
-extern paddr_t (*xbow_widget_map)(int16_t, u_int, bus_addr_t *, bus_size_t *);
-
-extern int (*xbow_widget_id)(int16_t, u_int, uint32_t *);
-
-extern int (*xbow_intr_widget_intr_register)(int, int, int *);
-extern int (*xbow_intr_widget_intr_establish)(int (*)(void *), void *,
- int, int, const char *, struct intrhand *);
-extern void (*xbow_intr_widget_intr_disestablish)(int);
-
-extern void (*xbow_intr_widget_intr_set)(int);
-extern void (*xbow_intr_widget_intr_clear)(int);
-
-/*
- * Valid widget values
- */
-
-#define WIDGET_MIN 8
-#define WIDGET_MAX 15
-
-/* interrupt register address on the master hub */
-extern uint64_t xbow_intr_address;
-
-struct xbow_attach_args {
- int16_t xaa_nasid;
- int xaa_widget;
-
- uint32_t xaa_vendor;
- uint32_t xaa_product;
- uint32_t xaa_revision;
-
- bus_space_tag_t xaa_iot;
- /*
- * WARNING! xaa_iot points to memory allocated on the stack,
- * drivers need to make a copy of it.
- */
-};
-
-void xbow_build_bus_space(struct mips_bus_space *, int, int);
-int xbow_intr_register(int, int, int *);
-int xbow_intr_establish(int (*)(void *), void *, int, int, const char *,
- struct intrhand *);
-void xbow_intr_disestablish(int);
-void xbow_intr_clear(int);
-void xbow_intr_set(int);
-
-paddr_t xbow_widget_map_space(struct device *, u_int,
- bus_addr_t *, bus_size_t *);
-
-int xbow_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-uint8_t xbow_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-uint16_t xbow_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-void xbow_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void xbow_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, uint8_t);
-void xbow_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- uint16_t);
-void xbow_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-
-/*
- * Widget register access routines hiding addressing games depending upon
- * the access width.
- */
-static __inline__ uint32_t
-widget_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a)
-{
- return bus_space_read_4(t, h, a | 4);
-}
-static __inline__ uint64_t
-widget_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a)
-{
- return bus_space_read_8(t, h, a);
-}
-static __inline__ void
-widget_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a,
- uint32_t v)
-{
- bus_space_write_4(t, h, a | 4, v);
-}
-static __inline__ void
-widget_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a,
- uint64_t v)
-{
- bus_space_write_8(t, h, a, v);
-}
-
-#endif /* _XBOW_H_ */
+++ /dev/null
-$OpenBSD: xbowdevs,v 1.6 2009/10/15 23:42:43 miod Exp $
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-vendor SGI 0x0000
-vendor SGI2 0x0023
-vendor SGI3 0x0024
-vendor SGI4 0x0036
-vendor SGI5 0x02aa
-
-/*
- * List of known products. Grouped by type.
- */
-
-/*
- * Crossbows
- */
-
-product SGI XBOW 0x0000 XBow
-product SGI XXBOW 0xd000 XXBow
-product SGI PXBOW 0xd100 PXBow
-
-/*
- * Frame buffers and graphics related devices
- */
-
-product SGI5 IMPACT 0xc003 ImpactSR
-product SGI2 ODYSSEY 0xc013 Odyssey
-product SGI5 KONA 0xc102 Kona
-product SGI3 TPU 0xc202 TPU
-
-/*
- * Non-XIO bus bridges
- */
-
-product SGI4 BRIDGE 0xc002 Bridge
-product SGI3 XBRIDGE 0xd002 XBridge
-/*
- * PIC is really a single chip but with two widgets headers, and 4 PCI-X
- * slots per widget.
- * The second widget register set uses 0xd112 as the product id.
- */
-product SGI3 PIC 0xd102 PIC
-/*
- * TIO apparently is a next-generation XIO framework; TIO:CP being a TIO
- * variant of PIC with two PCI-X buses, and TIO:CA an AGP bridge.
- * Unlike PIC, the two heads of TIO:CP would appear as two distinct TIO
- * widgets.
- * TIO widgets are supposedly only found on SN2 systems onwards (i.e.
- * ia64-based Altix systems), but in case there is a way to connect TIO
- * nodes to XIO nodes, better identify them properly.
- */
-product SGI3 TIOCP0 0xe000 TIO:CP
-product SGI3 TIOCP1 0xe010 TIO:CP
-product SGI3 TIOCA 0xe020 TIO:CA
-
-/*
- * Octane HEART memory and interrupt controller
- */
-product SGI4 HEART 0xc001 Heart
-
-/*
- * Miscellaneous widgets
- */
-
-product SGI4 HUB 0xc101 Hub
-product SGI4 BEDROCK 0xc110 Bedrock
+++ /dev/null
-/*
- * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
- *
- * generated from:
- * OpenBSD: xbowdevs,v 1.6 2009/10/15 23:42:43 miod Exp
- */
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#define XBOW_VENDOR_SGI 0x0000
-#define XBOW_VENDOR_SGI2 0x0023
-#define XBOW_VENDOR_SGI3 0x0024
-#define XBOW_VENDOR_SGI4 0x0036
-#define XBOW_VENDOR_SGI5 0x02aa
-
-/*
- * List of known products. Grouped by type.
- */
-
-/*
- * Crossbows
- */
-
-#define XBOW_PRODUCT_SGI_XBOW 0x0000 /* XBow */
-#define XBOW_PRODUCT_SGI_XXBOW 0xd000 /* XXBow */
-#define XBOW_PRODUCT_SGI_PXBOW 0xd100 /* PXBow */
-
-/*
- * Frame buffers and graphics related devices
- */
-
-#define XBOW_PRODUCT_SGI5_IMPACT 0xc003 /* ImpactSR */
-#define XBOW_PRODUCT_SGI2_ODYSSEY 0xc013 /* Odyssey */
-#define XBOW_PRODUCT_SGI5_KONA 0xc102 /* Kona */
-#define XBOW_PRODUCT_SGI3_TPU 0xc202 /* TPU */
-
-/*
- * Non-XIO bus bridges
- */
-
-#define XBOW_PRODUCT_SGI4_BRIDGE 0xc002 /* Bridge */
-#define XBOW_PRODUCT_SGI3_XBRIDGE 0xd002 /* XBridge */
-/*
- * PIC is really a single chip but with two widgets headers, and 4 PCI-X
- * slots per widget.
- * The second widget register set uses 0xd112 as the product id.
- */
-#define XBOW_PRODUCT_SGI3_PIC 0xd102 /* PIC */
-/*
- * TIO apparently is a next-generation XIO framework; TIO:CP being a TIO
- * variant of PIC with two PCI-X buses, and TIO:CA an AGP bridge.
- * Unlike PIC, the two heads of TIO:CP would appear as two distinct TIO
- * widgets.
- * TIO widgets are supposedly only found on SN2 systems onwards (i.e.
- * ia64-based Altix systems), but in case there is a way to connect TIO
- * nodes to XIO nodes, better identify them properly.
- */
-#define XBOW_PRODUCT_SGI3_TIOCP0 0xe000 /* TIO:CP */
-#define XBOW_PRODUCT_SGI3_TIOCP1 0xe010 /* TIO:CP */
-#define XBOW_PRODUCT_SGI3_TIOCA 0xe020 /* TIO:CA */
-
-/*
- * Octane HEART memory and interrupt controller
- */
-#define XBOW_PRODUCT_SGI4_HEART 0xc001 /* Heart */
-
-/*
- * Miscellaneous widgets
- */
-
-#define XBOW_PRODUCT_SGI4_HUB 0xc101 /* Hub */
-#define XBOW_PRODUCT_SGI4_BEDROCK 0xc110 /* Bedrock */
+++ /dev/null
-/*
- * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
- *
- * generated from:
- * OpenBSD: xbowdevs,v 1.6 2009/10/15 23:42:43 miod Exp
- */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-
-/* Descriptions of known devices. */
-struct xbow_product {
- uint32_t vendor;
- uint32_t product;
- const char *productname;
-};
-
-static const struct xbow_product xbow_products[] = {
- {
- XBOW_VENDOR_SGI, XBOW_PRODUCT_SGI_XBOW,
- "XBow",
- },
- {
- XBOW_VENDOR_SGI, XBOW_PRODUCT_SGI_XXBOW,
- "XXBow",
- },
- {
- XBOW_VENDOR_SGI, XBOW_PRODUCT_SGI_PXBOW,
- "PXBow",
- },
- {
- XBOW_VENDOR_SGI5, XBOW_PRODUCT_SGI5_IMPACT,
- "ImpactSR",
- },
- {
- XBOW_VENDOR_SGI2, XBOW_PRODUCT_SGI2_ODYSSEY,
- "Odyssey",
- },
- {
- XBOW_VENDOR_SGI5, XBOW_PRODUCT_SGI5_KONA,
- "Kona",
- },
- {
- XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_TPU,
- "TPU",
- },
- {
- XBOW_VENDOR_SGI4, XBOW_PRODUCT_SGI4_BRIDGE,
- "Bridge",
- },
- {
- XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_XBRIDGE,
- "XBridge",
- },
- {
- XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_PIC,
- "PIC",
- },
- {
- XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_TIOCP0,
- "TIO:CP",
- },
- {
- XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_TIOCP1,
- "TIO:CP",
- },
- {
- XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_TIOCA,
- "TIO:CA",
- },
- {
- XBOW_VENDOR_SGI4, XBOW_PRODUCT_SGI4_HEART,
- "Heart",
- },
- {
- XBOW_VENDOR_SGI4, XBOW_PRODUCT_SGI4_HUB,
- "Hub",
- },
- {
- XBOW_VENDOR_SGI4, XBOW_PRODUCT_SGI4_BEDROCK,
- "Bedrock",
- },
- { 0, 0, NULL, }
-};
-
+++ /dev/null
-/* $OpenBSD: xbridge.c,v 1.104 2021/03/21 14:18:37 visa Exp $ */
-
-/*
- * Copyright (c) 2008, 2009, 2011 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * XBow Bridge (as well as XBridge and PIC) Widget driver.
- */
-
-/*
- * IMPORTANT AUTHOR'S NOTE: I did not write any of this code under the
- * influence of drugs. Looking back at that particular piece of hardware,
- * I wonder if this hasn't been a terrible mistake.
- */
-
-/*
-
- xbridge 101
- ===========
-
- There are three ASIC using this model:
-
- - Bridge, used on Octane and maybe early Origin 200 and 2000 systems.
- - XBridge, used on later Origin 200/2000 and Origin 300/3000 systems.
- - PIC, used on Origin 350/3500 systems.
-
- (for the record, Fuel is Origin 300 like and Tezro is Origin 350 like).
-
- Bridge and XBridge each appear as a single widget, supporting 8 PCI devices,
- while PIC appears as two contiguous widgets, each supporting 2 PCI-X devices.
-
-- - address space
-
- Each widget has a 36-bit address space. xbridge widgets only use 33 bits
- though.
-
- On Octane systems, the whole 36 bit address space is fully available. On
- all other systems, the low 16MB (24 bit) address space is always available,
- and access to arbitrary areas of the address space can be achieved by
- programming the Crossbow's IOTTE (I/O Translation Table Entries).
-
- IMPORTANT! there is a limited number of IOTTE per Crossbow: 7, of which the
- seventh is used to workaround a hardware bug, leaving only 6 entries
- available across all widgets.
-
- Each IOTTE opens a contiguous window of 28 or 29 bits, depending on the
- particular system model and configuration. On Origin 300/3000 and 350/3500,
- this will always be 29 bit (512MB), while on Origin 200/2000 systems, this
- depends on the ``M mode vs N mode'' configuration. Most systems run in M
- mode (which is the default) which also allows for 29 bit; systems in N mode
- (allowing more than 64 nodes to be connected) can only provide 28 bit IOTTE
- windows (256MB).
-
- The widget address space is as follows:
-
- offset size description
- 0##0000##0000 0##0003##0000 registers
- 0##4000##0000 0##4000##0000 PCI memory space
- 1##0000##0000 1##0000##0000 PCI I/O space
-
- Note the PCI memory space is limited to 30 bit; this is supposedly hardware
- enforced, i.e. one may set the top two bits of 32-bit memory BAR and they
- would be ignored. The xbridge driver doesn't try this though (-:
-
- IMPORTANT! On Bridge (not XBridge) revision up to 3, the I/O space is not
- available (apparently this would be because of a hardware issue in the
- byteswap logic, causing it to return unpredictable values when accessing
- this address range).
-
-- - PCI resource mapping
-
- Each BAR value is an offset within the memory or I/O space (with the memory
- space being limited to 30 bits, or 1GB), *EXCEPT* when the value fits in one
- of the ``devio'' slots.
-
- So now is a good time to introduce the devio.
-
- There are 8 devio registers, one per device; these registers contain various
- device-global flags (such as byte swapping and coherency), as well as the
- location of a ``devio window'' in one of the address spaces, selected on a
- per-devio basis.
-
- The devio register only programs the upper 12 bits of the 32 window base
- address, the low 20 bits being zero; the window size are fixed and depend on
- the given device: devices 0 and 1 have ``large'' windows of 2MB (0020##0000),
- while devices 2 to 7 have ``small'' windows of 1MB (0010##0000).
-
- Apparently there are some hidden rules about the upper 12 bits, though, and
- the rules differ on Octane vs Origin systems.
-
- This is why the address space, from the pci driver point of view, is split
- in three parts: there is the ``devio black hole'' where we must make sure
- that no BAR allocation crosses a devio boundary, and the rest of the address
- space (under the devio zone and above it).
-
- I am slowly moving away from the devio mappings the PROM leaves us in, and
- eventually I expect to be able to have more flexibility in their position.
- However there is the console uart mapping I don't want to change now, and -
- of course - we inherit it from the prom as a devio register for the IOC3 or
- IOC4 device.
-
- So currently, the extents I provide the MI code with span the 0->ffff##ffff
- address space, with only the following areas available:
- - each devio range, if configured for the given address space
- - on Octane, the whole memory or I/O space minus the 16MB area in which all
- devio mappings take place
- - on Origin, if we have an IOTTE mapping a part of the memory or I/O address
- space, the whole window minus the 16MB area in which all devio mappings
- take place.
-
- Now I need to make sure that the MI code will never allocate mappings
- crossing devio ranges. So during the Bridge setup, I am initializing
- ALL BAR on a device-by-device basis, working with smaller extents:
- - if the device can have all its resources of a given type (I/O or mem)
- fitting in a devio area, I configure a devio, and make it allocate from
- an extent spanning only the devio range.
- - if there are not enough devio (because the device might need two devio
- ranges, one for I/O resources and one for memory resources, and there are
- only 8 devio, and if the bus is populated there might not be enough unused
- devio slots to hijack), then allocation is done on the larger address space
- (granted on Octane, or provided with an IOTTE window on Origin), using an
- extent covering this area minus the 16MB area in which all devio mappings
- take place.
- So in either case, I am now sure that there are no resources crossing the
- devio boundaries, which are invisible to the MI code.
-
- This also explains why I am making sure that the devio ranges are close to
- each other - it makes the creation of the temporary resource extents simpler
- (bear in mind that a device might need resources from the IOTTE window before
- all devio ranges are set up).
-
- And of course to make things even less simple, the IOTTE allocation may fail
- (e.g. on a P-Brick with 6 XBridge chips on the same Crossbow), and if we are
- using an old revision Bridge, all I/O resources need to be allocated with
- devio (so we can't decide to get rid of them anyway).
-
- So, when it's time to configure further devices (for ppb and pccbb), I need
- the same trick to prevent resource allocation to cross devio boundaries.
-
- Actually, as far as pccbb is concerned, I give up entirely on resources if
- all I have is a devio to map within - at least for now, because the devio do
- not cover the 0000..ffff range in I/O space needed for pcmcia. So for the
- I/O resources, I give rbus the low 16 bits of the I/O extent (if available);
- as for the memory resources, I need to exclude the devio area, and since rbus
- currently only supports a single contiguous area, I give it the area starting
- after the devio range (which is, by far, the largest part of the
- at-least-256MB region).
-
- Do you need aspirin yet?
-
-- - DMA
-
- Device DMA addresses can be constructed in three ways:
- - direct 64 bit address
- - 32 bit address within a programmable 31 bit ``direct DMA'' window
- - 32 bit translated address using ATE (Address Translation Entries)
-
- direct 64 bit address:
- These are easy to construct (pick your memory address, set bit 56, and
- you're done), but these can only work with pci devices aware of 64 bit
- addresses.
-
- direct DMA window:
- There is a Bridge global register to define the base address of the window,
- and then we have 2GB available. This is what I am currently using, and
- convenient for PCI devices unable to use 64 bit DMA addresses.
-
- translated DMA:
- There is another 2GB window in which accesses are indirected through ATE,
- which can point anywhere in memory.
-
- ATE are IOMMU translation entries. PCI addresses in the translated window
- transparently map to the address their ATE point to.
-
- Bridge chip have 128 so-called `internal' entries, and can use their
- optional `external' SSRAM to provide more (up to 65536 entries with 512KB
- SSRAM). However, due to chip bugs, those `external' entries can not be
- updated while there is DMA in progress using external entries, even if the
- updated entries are not related to those used by the DMA transfer.
-
- XBridge chip extend the internal entries to 1024, but do not provide
- support for external entries.
-
- All ATE share the same page size, which is configurable as 4KB or 16KB.
-
- Due to the small number of ATE entries, and since you can not use part of
- the system's RAM to add entries as you need them (unlike hppa or sparc64),
- the driver no longer uses them, as there is nothing we can do when we run
- out of ATE.
-
-- - interrupts
-
- This is easy, for a change. There are 8 interrupt sources, one per device;
- pins A and C map of devices 0-7 map to interrupt sources 0-7, and pins B and
- D of devices 0-7 map to interrupt sources 4-7 then 0-3 (i.e. device# ^ 4).
-
- All interrupts occurring on the Bridge cause an XIO interrupt packet to be
- sent to the XIO interrupt address programmed at Bridge initialization time;
- packets can be configured as self-clearing or not on an interrupt source
- basis.
-
- Due to silicon bugs, interrupts can be lost if two interrupt sources
- interrupt within a too short interval; there is a documented workaround for
- this which consists of recognizing this situation and self-inflicting
- ourselves the lost interrupt (see details in xbridge_intr_handler() ).
-
-- - endianness
-
- Endianness control is quite finegrained and quite complex at first glance:
- - memory and I/O accesses not occurring within devio ranges have their
- endianness controlled by the endianness flags in the (global) Bridge
- configuration register...
- - ... to which adds the per-device endianness flag in the device devio
- register...
- - and accesses occurring through devio register only use the
- per-device devio register mentioned above, even if the devio
- range is defined in a different register!
-
- i.e.
-
- devio 0 = endianness control C0, devio range R0
- devio 1 = endianness control C1, devio range R1
- global Bridge = endianness control C2
-
- 1. access from device 0 to R0 uses C2^C0
- 2. access from device 0 to R1 uses C2^C0
- 3. access from device 0 outside R0 and R1 uses C2
- 4. access from device 1 to R0 uses C2^C1
- 5. access from device 1 to R1 uses C2^C1
- 6. access from device 1 outside R0 and R1 uses C1
-
- (note that, the way I set up devio registers, cases 2 and 4 can never
- occur if both device 0 and device 1 are present)
-
- Now for DMA:
- - i don't remember what 64 bit DMA uses
- - direct DMA (within the 2GB window) uses a per-device bit in devio
- - translated DMA (using ATE) uses a per-device bit in devio if the
- chip is a Bridge, while XBridge and PIC use different DMA addresses
- (i.e. with a given ATE, there is one address pointing to it in
- non-swapped mode, and another address pointing to it in swapped
- mode).
-
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/evcount.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/extent.h>
-#include <sys/mbuf.h>
-#include <sys/mutex.h>
-#include <sys/queue.h>
-#include <sys/atomic.h>
-
-#include <machine/autoconf.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/intr.h>
-#include <machine/mnode.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcidevs.h>
-#include <dev/pci/ppbreg.h>
-
-#include <dev/cardbus/rbus.h>
-
-#include <mips64/archtype.h>
-#include <sgi/xbow/xbow.h>
-#include <sgi/xbow/xbowdevs.h>
-
-#include <sgi/xbow/widget.h>
-#include <sgi/xbow/xbridgereg.h>
-
-#ifdef TGT_OCTANE
-#include <sgi/sgi/ip30.h>
-#endif
-
-#include "cardbus.h"
-
-int xbridge_match(struct device *, void *, void *);
-void xbridge_attach(struct device *, struct device *, void *);
-int xbridge_print(void *, const char *);
-int xbridge_submatch(struct device *, void *, void *);
-int xbpci_match(struct device *, void *, void *);
-void xbpci_attach(struct device *, struct device *, void *);
-int xbpci_print(void *, const char *);
-
-struct xbridge_intr;
-
-struct xbpci_attach_args {
- uint xaa_busno;
-
- int xaa_flags;
- int16_t xaa_nasid;
- int xaa_widget;
- uint xaa_devio_skew;
- int xaa_revision;
-
- bus_space_tag_t xaa_regt;
- bus_addr_t xaa_offset;
-};
-
-struct xbpci_softc {
- struct device xb_dev;
- struct device *xb_bow;
-
- /*
- * Bridge register accessors.
- * Due to hardware bugs, PIC registers can only be accessed
- * with 64 bit operations, although the hardware was supposed
- * to be directly compatible with XBridge on that aspect.
- */
- uint64_t (*xb_read_reg)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t);
- void (*xb_write_reg)(bus_space_tag_t, bus_space_handle_t,
- bus_addr_t, uint64_t);
-
- uint xb_busno;
- uint xb_nslots;
-
- int xb_flags;
-#define XF_XBRIDGE 0x01 /* is either PIC or XBridge */
-#define XF_PIC 0x02 /* is PIC */
-#define XF_NO_DIRECT_IO 0x04 /* no direct I/O mapping */
-#define XF_PCIX 0x08 /* bus in PCIX mode */
- int16_t xb_nasid;
- int xb_widget;
- uint xb_devio_skew; /* upper bits of devio ARCS mappings */
- int xb_revision;
-
- struct mips_pci_chipset xb_pc;
-
- bus_space_tag_t xb_regt;
- bus_space_handle_t xb_regh;
-
- struct mips_bus_space *xb_mem_bus_space;
- struct mips_bus_space *xb_mem_bus_space_sw;
- struct mips_bus_space *xb_io_bus_space;
- struct mips_bus_space *xb_io_bus_space_sw;
- struct machine_bus_dma_tag *xb_dmat;
-
- struct xbridge_intr *xb_intr[BRIDGE_NINTRS];
- char xb_intrstr[BRIDGE_NINTRS][sizeof("irq #, xbow irq ###")];
-
- int xb_err_intrsrc;
- int (*xb_pci_intr_handler)(void *);
-
- uint64_t xb_ier; /* copy of BRIDGE_IER value */
-
- /*
- * Device information.
- */
- struct {
- pcireg_t id;
- uint32_t devio;
- } xb_devices[MAX_SLOTS];
- uint xb_devio_usemask;
-
- /*
- * Large resource view sizes
- */
- bus_addr_t xb_iostart, xb_ioend;
- bus_addr_t xb_memstart, xb_memend;
-
- /*
- * Resource extents for the large resource views, used during
- * resource setup, then cleaned up for the MI code.
- */
- char xb_ioexname[32];
- struct extent *xb_ioex;
- char xb_memexname[32];
- struct extent *xb_memex;
-};
-
-struct xbridge_softc {
- struct device sc_dev;
- uint sc_nbuses;
-
- struct mips_bus_space sc_regt;
-};
-
-#define DEVNAME(xb) ((xb)->xb_dev.dv_xname)
-
-#define PCI_ID_EMPTY PCI_ID_CODE(PCI_VENDOR_INVALID, 0xffff);
-#define SLOT_EMPTY(xb,dev) \
- (PCI_VENDOR((xb)->xb_devices[dev].id) == PCI_VENDOR_INVALID || \
- PCI_VENDOR((xb)->xb_devices[dev].id) == 0)
-
-const struct cfattach xbridge_ca = {
- sizeof(struct xbridge_softc), xbridge_match, xbridge_attach
-};
-
-struct cfdriver xbridge_cd = {
- NULL, "xbridge", DV_DULL
-};
-
-const struct cfattach xbpci_ca = {
- sizeof(struct xbpci_softc), xbpci_match, xbpci_attach
-};
-
-struct cfdriver xbpci_cd = {
- NULL, "xbpci", DV_DULL
-};
-
-void xbridge_attach_hook(struct device *, struct device *,
- struct pcibus_attach_args *);
-int xbridge_bus_maxdevs(void *, int);
-pcitag_t xbridge_make_tag(void *, int, int, int);
-void xbridge_decompose_tag(void *, pcitag_t, int *, int *, int *);
-int xbridge_conf_size(void *, pcitag_t);
-pcireg_t xbridge_conf_read(void *, pcitag_t, int);
-void xbridge_conf_write(void *, pcitag_t, int, pcireg_t);
-int xbridge_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
-const char *xbridge_intr_string(void *, pci_intr_handle_t);
-void *xbridge_intr_establish(void *, pci_intr_handle_t, int,
- int (*func)(void *), void *, const char *);
-void xbridge_intr_disestablish(void *, void *);
-int xbridge_intr_line(void *, pci_intr_handle_t);
-int xbridge_ppb_setup(void *, pcitag_t, bus_addr_t *, bus_addr_t *,
- bus_addr_t *, bus_addr_t *);
-int xbridge_probe_device_hook(void *, struct pci_attach_args *);
-void *xbridge_rbus_parent_io(struct pci_attach_args *);
-void *xbridge_rbus_parent_mem(struct pci_attach_args *);
-int xbridge_get_widget(void *);
-int xbridge_get_dl(void *, pcitag_t, struct sgi_device_location *);
-
-int xbridge_pci_intr_handler(void *);
-int xbridge_picv1_pci_intr_handler(void *);
-int xbridge_err_intr_handler(void *);
-
-uint8_t xbridge_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-uint16_t xbridge_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-void xbridge_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- uint8_t);
-void xbridge_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
- uint16_t);
-void xbridge_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void xbridge_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-void xbridge_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void xbridge_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-void xbridge_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint8_t *, bus_size_t);
-void xbridge_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- const uint8_t *, bus_size_t);
-
-int xbridge_space_map_devio(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-int xbridge_space_map_io(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-int xbridge_space_map_mem(bus_space_tag_t, bus_addr_t, bus_size_t, int,
- bus_space_handle_t *);
-int xbridge_space_region_devio(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_size_t, bus_space_handle_t *);
-int xbridge_space_region_io(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_size_t, bus_space_handle_t *);
-int xbridge_space_region_mem(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_size_t, bus_space_handle_t *);
-
-void xbridge_space_barrier(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_size_t, int);
-
-bus_addr_t xbridge_pa_to_device(paddr_t, int);
-
-int xbridge_rbus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t,
- int, bus_space_handle_t *);
-void xbridge_rbus_space_unmap(bus_space_tag_t, bus_space_handle_t,
- bus_size_t, bus_addr_t *);
-
-void xbridge_err_clear(struct xbpci_softc *, uint64_t);
-void xbridge_err_handle(struct xbpci_softc *, uint64_t);
-
-int xbridge_allocate_devio(struct xbpci_softc *, int, int);
-void xbridge_set_devio(struct xbpci_softc *, int, uint32_t, int);
-
-int xbridge_resource_explore(struct xbpci_softc *, pcitag_t,
- struct extent *, struct extent *);
-void xbridge_resource_manage(struct xbpci_softc *, pcitag_t,
- struct extent *, struct extent *);
-
-void xbridge_device_setup(struct xbpci_softc *, int, int, uint32_t);
-int xbridge_extent_chomp(struct xbpci_softc *, struct extent *);
-void xbridge_extent_setup(struct xbpci_softc *);
-struct extent *
- xbridge_mapping_setup(struct xbpci_softc *, int);
-void xbridge_resource_setup(struct xbpci_softc *);
-void xbridge_rrb_setup(struct xbpci_softc *, int);
-const char *
- xbridge_setup(struct xbpci_softc *);
-
-uint64_t bridge_read_reg(bus_space_tag_t, bus_space_handle_t, bus_addr_t);
-void bridge_write_reg(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint64_t);
-uint64_t pic_read_reg(bus_space_tag_t, bus_space_handle_t, bus_addr_t);
-void pic_write_reg(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
- uint64_t);
-
-static __inline__ uint64_t
-xbridge_read_reg(struct xbpci_softc *xb, bus_addr_t a)
-{
- return (*xb->xb_read_reg)(xb->xb_regt, xb->xb_regh, a);
-}
-static __inline__ void
-xbridge_write_reg(struct xbpci_softc *xb, bus_addr_t a, uint64_t v)
-{
- (*xb->xb_write_reg)(xb->xb_regt, xb->xb_regh, a, v);
-}
-
-static __inline__ void
-xbridge_wbflush(struct xbpci_softc *xb, uint d)
-{
- while (xbridge_read_reg(xb, BRIDGE_DEVICE_WBFLUSH(d)) != 0) ;
-}
-
-static const struct machine_bus_dma_tag xbridge_dma_tag = {
- NULL, /* _cookie */
- _dmamap_create,
- _dmamap_destroy,
- _dmamap_load,
- _dmamap_load_mbuf,
- _dmamap_load_uio,
- _dmamap_load_raw,
- _dmamap_load_buffer,
- _dmamap_unload,
- _dmamap_sync,
- _dmamem_alloc,
- _dmamem_free,
- _dmamem_map,
- _dmamem_unmap,
- _dmamem_mmap,
- xbridge_pa_to_device,
- BRIDGE_DMA_DIRECT_LENGTH - 1
-};
-
-static const struct mips_pci_chipset xbridge_pci_chipset = {
- .pc_attach_hook = xbridge_attach_hook,
- .pc_bus_maxdevs = xbridge_bus_maxdevs,
- .pc_make_tag = xbridge_make_tag,
- .pc_decompose_tag = xbridge_decompose_tag,
- .pc_conf_size = xbridge_conf_size,
- .pc_conf_read = xbridge_conf_read,
- .pc_conf_write = xbridge_conf_write,
- .pc_probe_device_hook = xbridge_probe_device_hook,
- .pc_get_widget = xbridge_get_widget,
- .pc_get_dl = xbridge_get_dl,
- .pc_intr_map = xbridge_intr_map,
- .pc_intr_string = xbridge_intr_string,
- .pc_intr_establish = xbridge_intr_establish,
- .pc_intr_disestablish = xbridge_intr_disestablish,
- .pc_intr_line = xbridge_intr_line,
- .pc_ppb_setup = xbridge_ppb_setup,
-#if NCARDBUS > 0
- .pc_rbus_parent_io = xbridge_rbus_parent_io,
- .pc_rbus_parent_mem = xbridge_rbus_parent_mem
-#endif
-};
-
-/*
- ********************* Autoconf glue.
- */
-
-static const struct {
- uint32_t vendor;
- uint32_t product;
- int flags;
-} xbridge_devices[] = {
- /* original Bridge */
- { XBOW_VENDOR_SGI4, XBOW_PRODUCT_SGI4_BRIDGE, 0 },
- /* XBridge */
- { XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_XBRIDGE, XF_XBRIDGE },
- /* PIC */
- { XBOW_VENDOR_SGI3, XBOW_PRODUCT_SGI3_PIC, XF_PIC }
-};
-
-int
-xbridge_match(struct device *parent, void *match, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
- uint i;
-
- for (i = 0; i < nitems(xbridge_devices); i++)
- if (xaa->xaa_vendor == xbridge_devices[i].vendor &&
- xaa->xaa_product == xbridge_devices[i].product)
- return 1;
-
- return 0;
-}
-
-void
-xbridge_attach(struct device *parent, struct device *self, void *aux)
-{
- struct xbridge_softc *sc = (struct xbridge_softc *)self;
- struct xbow_attach_args *xaa = aux;
- struct xbpci_attach_args xbpa;
- int flags;
- uint devio_skew;
- uint i;
-
- printf(" revision %d\n", xaa->xaa_revision);
-
- for (i = 0; i < nitems(xbridge_devices); i++)
- if (xaa->xaa_vendor == xbridge_devices[i].vendor &&
- xaa->xaa_product == xbridge_devices[i].product) {
- flags = xbridge_devices[i].flags;
- break;
- }
-
- /* PICs are XBridges without an I/O window */
- if (ISSET(flags, XF_PIC))
- SET(flags, XF_XBRIDGE | XF_NO_DIRECT_IO);
- /* Bridge < D lacks an I/O window */
- if (!ISSET(flags, XF_XBRIDGE) && xaa->xaa_revision < 4)
- SET(flags, XF_NO_DIRECT_IO);
-
- /*
- * Figure out where the ARCS devio mappings will go.
- * ARCS configures all the devio in a contiguous 16MB area
- * (i.e. the upper 8 bits of the DEVIO_BASE field of the
- * devio registers are the same).
- *
- * In order to make our life simpler, on widgets where we may
- * want to keep some of the ARCS mappings (because that's where
- * our console device lives), we will use the same 16MB area.
- *
- * Otherwise, we can use whatever values we want; to keep the
- * code simpler, we will nevertheless use a 16MB area as well,
- * making sure it does not start at zero so that pcmcia bridges
- * can be used.
- *
- * On Octane, the upper bits of ARCS mappings are zero, and thus
- * point to the start of the widget. On Origin, they match the
- * widget number.
- */
-#ifdef TGT_OCTANE
- if (sys_config.system_type == SGI_OCTANE &&
- xaa->xaa_widget == IP30_BRIDGE_WIDGET)
- devio_skew = 0;
- else
-#endif
- devio_skew = xaa->xaa_widget;
-
- sc->sc_nbuses = ISSET(flags, XF_PIC) ? PIC_NBUSES : BRIDGE_NBUSES;
-
- /* make a permanent copy of the on-stack bus_space_tag */
- bcopy(xaa->xaa_iot, &sc->sc_regt, sizeof(struct mips_bus_space));
-
- /* configure and attach PCI buses */
- for (i = 0; i < sc->sc_nbuses; i++) {
- xbpa.xaa_busno = i;
- xbpa.xaa_flags = flags;
- xbpa.xaa_nasid = xaa->xaa_nasid;
- xbpa.xaa_widget = xaa->xaa_widget;
- xbpa.xaa_devio_skew = devio_skew;
- xbpa.xaa_revision = xaa->xaa_revision;
- xbpa.xaa_regt = &sc->sc_regt;
- xbpa.xaa_offset = i != 0 ? BRIDGE_BUS_OFFSET : 0;
-
- config_found_sm(&sc->sc_dev, &xbpa, xbridge_print,
- xbridge_submatch);
- }
-}
-
-int
-xbridge_submatch(struct device *parent, void *vcf, void *aux)
-{
- struct cfdata *cf = vcf;
- struct xbpci_attach_args *xaa = aux;
-
- if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != xaa->xaa_busno)
- return 0;
-
- return (*cf->cf_attach->ca_match)(parent, vcf, aux);
-}
-
-int
-xbridge_print(void *aux, const char *pnp)
-{
- struct xbpci_attach_args *xaa = aux;
-
- if (pnp)
- printf("xbpci at %s", pnp);
- printf(" bus %d", xaa->xaa_busno);
-
- return UNCONF;
-}
-
-int
-xbpci_match(struct device *parent, void *vcf, void *aux)
-{
- return 1;
-}
-
-void
-xbpci_attach(struct device *parent, struct device *self, void *aux)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)self;
- struct xbpci_attach_args *xaa = (struct xbpci_attach_args *)aux;
- struct pcibus_attach_args pba;
- const char *errmsg = NULL;
-
- printf(": ");
-
- /* xbow -> xbridge -> xbpci: xbow device is our grandfather */
- xb->xb_bow = parent->dv_parent;
- xb->xb_busno = xaa->xaa_busno;
- xb->xb_flags = xaa->xaa_flags;
- xb->xb_nasid = xaa->xaa_nasid;
- xb->xb_widget = xaa->xaa_widget;
- xb->xb_devio_skew = xaa->xaa_devio_skew;
- xb->xb_revision = xaa->xaa_revision;
-
- if (ISSET(xb->xb_flags, XF_PIC)) {
- xb->xb_nslots = PIC_NSLOTS;
-
- xb->xb_read_reg = pic_read_reg;
- xb->xb_write_reg = pic_write_reg;
- } else {
- xb->xb_nslots = BRIDGE_NSLOTS;
-
- xb->xb_read_reg = bridge_read_reg;
- xb->xb_write_reg = bridge_write_reg;
- }
-
- /*
- * Revision 1 of PIC requires a wrapper around
- * xbridge_pci_intr_handler().
- */
- if (ISSET(xb->xb_flags, XF_PIC) && xb->xb_revision <= 1)
- xb->xb_pci_intr_handler = xbridge_picv1_pci_intr_handler;
- else
- xb->xb_pci_intr_handler = xbridge_pci_intr_handler;
-
- /*
- * Map Bridge registers.
- */
-
- xb->xb_regt = xaa->xaa_regt;
- if (bus_space_map(xaa->xaa_regt, xaa->xaa_offset,
- BRIDGE_REGISTERS_SIZE, 0, &xb->xb_regh)) {
- printf("unable to map control registers\n");
- return;
- }
-
- /*
- * Create bus_space accessors... we inherit them from xbow, but
- * need to overwrite mapping routines, and set up byteswapping
- * versions.
- */
-
- xb->xb_mem_bus_space = malloc(sizeof (*xb->xb_mem_bus_space),
- M_DEVBUF, M_NOWAIT);
- xb->xb_mem_bus_space_sw = malloc(sizeof (*xb->xb_mem_bus_space_sw),
- M_DEVBUF, M_NOWAIT);
- xb->xb_io_bus_space = malloc(sizeof (*xb->xb_io_bus_space),
- M_DEVBUF, M_NOWAIT);
- xb->xb_io_bus_space_sw = malloc(sizeof (*xb->xb_io_bus_space_sw),
- M_DEVBUF, M_NOWAIT);
- if (xb->xb_mem_bus_space == NULL || xb->xb_mem_bus_space_sw == NULL ||
- xb->xb_io_bus_space == NULL || xb->xb_io_bus_space_sw == NULL)
- goto fail1;
-
- bcopy(xb->xb_regt, xb->xb_mem_bus_space, sizeof(*xb->xb_mem_bus_space));
- xb->xb_mem_bus_space->bus_private = xb;
- xb->xb_mem_bus_space->_space_map = xbridge_space_map_devio;
- xb->xb_mem_bus_space->_space_subregion = xbridge_space_region_devio;
- xb->xb_mem_bus_space->_space_barrier = xbridge_space_barrier;
-
- bcopy(xb->xb_mem_bus_space, xb->xb_mem_bus_space_sw,
- sizeof(*xb->xb_mem_bus_space));
- xb->xb_mem_bus_space_sw->_space_read_1 = xbridge_read_1;
- xb->xb_mem_bus_space_sw->_space_write_1 = xbridge_write_1;
- xb->xb_mem_bus_space_sw->_space_read_2 = xbridge_read_2;
- xb->xb_mem_bus_space_sw->_space_write_2 = xbridge_write_2;
- xb->xb_mem_bus_space_sw->_space_read_raw_2 = xbridge_read_raw_2;
- xb->xb_mem_bus_space_sw->_space_write_raw_2 = xbridge_write_raw_2;
- xb->xb_mem_bus_space_sw->_space_read_raw_4 = xbridge_read_raw_4;
- xb->xb_mem_bus_space_sw->_space_write_raw_4 = xbridge_write_raw_4;
- xb->xb_mem_bus_space_sw->_space_read_raw_8 = xbridge_read_raw_8;
- xb->xb_mem_bus_space_sw->_space_write_raw_8 = xbridge_write_raw_8;
-
- bcopy(xb->xb_regt, xb->xb_io_bus_space, sizeof(*xb->xb_io_bus_space));
- xb->xb_io_bus_space->bus_private = xb;
- xb->xb_io_bus_space->_space_map = xbridge_space_map_devio;
- xb->xb_io_bus_space->_space_subregion = xbridge_space_region_devio;
- xb->xb_io_bus_space->_space_barrier = xbridge_space_barrier;
-
- bcopy(xb->xb_io_bus_space, xb->xb_io_bus_space_sw,
- sizeof(*xb->xb_io_bus_space));
- xb->xb_io_bus_space_sw->_space_read_1 = xbridge_read_1;
- xb->xb_io_bus_space_sw->_space_write_1 = xbridge_write_1;
- xb->xb_io_bus_space_sw->_space_read_2 = xbridge_read_2;
- xb->xb_io_bus_space_sw->_space_write_2 = xbridge_write_2;
- xb->xb_io_bus_space_sw->_space_read_raw_2 = xbridge_read_raw_2;
- xb->xb_io_bus_space_sw->_space_write_raw_2 = xbridge_write_raw_2;
- xb->xb_io_bus_space_sw->_space_read_raw_4 = xbridge_read_raw_4;
- xb->xb_io_bus_space_sw->_space_write_raw_4 = xbridge_write_raw_4;
- xb->xb_io_bus_space_sw->_space_read_raw_8 = xbridge_read_raw_8;
- xb->xb_io_bus_space_sw->_space_write_raw_8 = xbridge_write_raw_8;
-
- xb->xb_dmat = malloc(sizeof (*xb->xb_dmat), M_DEVBUF, M_NOWAIT);
- if (xb->xb_dmat == NULL)
- goto fail1;
- memcpy(xb->xb_dmat, &xbridge_dma_tag, sizeof(*xb->xb_dmat));
- xb->xb_dmat->_cookie = xb;
-
- /*
- * Initialize PCI methods.
- */
-
- bcopy(&xbridge_pci_chipset, &xb->xb_pc, sizeof(xbridge_pci_chipset));
- xb->xb_pc.pc_conf_v = xb;
- xb->xb_pc.pc_intr_v = xb;
-
- /*
- * Configure Bridge for proper operation (DMA, I/O mappings,
- * RRB allocation, etc).
- */
-
- if ((errmsg = xbridge_setup(xb)) != NULL)
- goto fail2;
- printf("\n");
-
- /*
- * Attach children.
- */
-
- xbridge_extent_setup(xb);
-
- bzero(&pba, sizeof(pba));
- pba.pba_busname = "pci";
- /*
- * XXX pba_iot and pba_memt ought to be irrelevant, since we
- * XXX return the tags a device needs in probe_device_hook();
- * XXX however the pci(4) device needs a valid pba_memt for the
- * XXX PCIOCGETROM* ioctls.
- * XXX
- * XXX Since most devices will need the byteswap tags, and those
- * XXX which don't do not have PCI roms, let's pass the byteswap
- * XXX versions by default.
- */
- pba.pba_iot = xb->xb_io_bus_space_sw;
- pba.pba_memt = xb->xb_mem_bus_space_sw;
- pba.pba_dmat = xb->xb_dmat;
- pba.pba_ioex = xb->xb_ioex;
- pba.pba_memex = xb->xb_memex;
-#ifdef DEBUG
- if (xb->xb_ioex != NULL)
- extent_print(xb->xb_ioex);
- if (xb->xb_memex != NULL)
- extent_print(xb->xb_memex);
-#endif
- pba.pba_pc = &xb->xb_pc;
- pba.pba_domain = pci_ndomains++;
- pba.pba_bus = 0;
-
- config_found(self, &pba, xbpci_print);
- return;
-
-fail2:
- free(xb->xb_dmat, M_DEVBUF, 0);
-fail1:
- free(xb->xb_io_bus_space_sw, M_DEVBUF,
- sizeof (*xb->xb_io_bus_space_sw));
- free(xb->xb_io_bus_space, M_DEVBUF, sizeof (*xb->xb_io_bus_space));
- free(xb->xb_mem_bus_space_sw, M_DEVBUF,
- sizeof (*xb->xb_mem_bus_space_sw));
- free(xb->xb_mem_bus_space, M_DEVBUF, sizeof (*xb->xb_mem_bus_space));
- if (errmsg == NULL)
- errmsg = "not enough memory to build bus access structures";
- printf("%s\n", errmsg);
-}
-
-int
-xbpci_print(void *aux, const char *pnp)
-{
- struct pcibus_attach_args *pba = aux;
-
- if (pnp)
- printf("%s at %s", pba->pba_busname, pnp);
- printf(" bus %d", pba->pba_bus);
-
- return UNCONF;
-}
-
-/*
- ********************* PCI glue.
- */
-
-void
-xbridge_attach_hook(struct device *parent, struct device *self,
- struct pcibus_attach_args *pba)
-{
-}
-
-pcitag_t
-xbridge_make_tag(void *cookie, int bus, int dev, int func)
-{
- return (bus << 16) | (dev << 11) | (func << 8);
-}
-
-void
-xbridge_decompose_tag(void *cookie, pcitag_t tag, int *busp, int *devp,
- int *funcp)
-{
- if (busp != NULL)
- *busp = (tag >> 16) & 0xff;
- if (devp != NULL)
- *devp = (tag >> 11) & 0x1f;
- if (funcp != NULL)
- *funcp = (tag >> 8) & 0x7;
-}
-
-int
-xbridge_bus_maxdevs(void *cookie, int busno)
-{
- struct xbpci_softc *xb = cookie;
-
- return busno == 0 ? xb->xb_nslots : 32;
-}
-
-int
-xbridge_conf_size(void *cookie, pcitag_t tag)
-{
-#if 0
- struct xbpci_softc *xb = cookie;
- int bus, dev, fn;
-
- xbridge_decompose_tag(cookie, tag, &bus, &dev, &fn);
-
- /*
- * IOC3 devices only implement a subset of the PCI configuration
- * registers. Although xbridge_conf_{read,write} correctly
- * handle the unimplemented registers, better provide a limited
- * configuration space to userland.
- */
-
- if (bus == 0 && xb->xb_devices[dev].id ==
- PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3))
- return PCI_INTERRUPT_REG + 4;
-#endif
-
- return PCI_CONFIG_SPACE_SIZE;
-}
-
-pcireg_t
-xbridge_conf_read(void *cookie, pcitag_t tag, int offset)
-{
- struct xbpci_softc *xb = cookie;
- pcireg_t data;
- int bus, dev, fn;
- paddr_t pa;
- int skip;
- int s;
-
- xbridge_decompose_tag(cookie, tag, &bus, &dev, &fn);
-
- /*
- * IOC3 devices only implement a subset of the PCI configuration
- * registers (supposedly only the first 0x20 bytes, however
- * writing to the second BAR also writes to the first).
- *
- * Depending on which particular model we encounter, things may
- * seem to work, or write access to nonexisting registers would
- * completely freeze the machine.
- *
- * We thus check for the device type here, and handle the non
- * existing registers ourselves.
- */
-
- skip = 0;
- if (bus == 0 && xb->xb_devices[dev].id ==
- PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3)) {
- switch (offset) {
- case PCI_ID_REG:
- case PCI_COMMAND_STATUS_REG:
- case PCI_CLASS_REG:
- case PCI_BHLC_REG:
- case PCI_MAPREG_START:
- /* These registers are implemented. Go ahead. */
- break;
- case PCI_INTERRUPT_REG:
- /* This register is not implemented. Fake it. */
- data = (PCI_INTERRUPT_PIN_A <<
- PCI_INTERRUPT_PIN_SHIFT) |
- (dev << PCI_INTERRUPT_LINE_SHIFT);
- skip = 1;
- break;
- default:
- /* These registers are not implemented. */
- data = 0;
- skip = 1;
- break;
- }
- }
-
- if (skip == 0) {
- /*
- * Disable interrupts on this bridge (especially error
- * interrupts).
- */
- s = splhigh();
- xbridge_write_reg(xb, BRIDGE_IER, 0);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-
- if (bus != 0) {
- xbridge_write_reg(xb, BRIDGE_PCI_CFG,
- (bus << 16) | (dev << 11));
- pa = xb->xb_regh + BRIDGE_PCI_CFG1_SPACE;
- } else {
- /*
- * On PIC, device 0 in configuration space is the
- * PIC itself, device slots are offset by one.
- */
- if (ISSET(xb->xb_flags, XF_PIC))
- dev++;
- pa = xb->xb_regh + BRIDGE_PCI_CFG_SPACE + (dev << 12);
- }
-
- pa += (fn << 8) + offset;
- if (guarded_read_4(pa, &data) != 0)
- data = 0xffffffff;
-
- xbridge_write_reg(xb, BRIDGE_IER, xb->xb_ier);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
- splx(s);
- }
-
- return data;
-}
-
-void
-xbridge_conf_write(void *cookie, pcitag_t tag, int offset, pcireg_t data)
-{
- struct xbpci_softc *xb = cookie;
- int bus, dev, fn;
- paddr_t pa;
- int skip;
- int s;
-
- xbridge_decompose_tag(cookie, tag, &bus, &dev, &fn);
-
- /*
- * IOC3 devices only implement a subset of the PCI configuration
- * registers.
- * Depending on which particular model we encounter, things may
- * seem to work, or write access to nonexisting registers would
- * completely freeze the machine.
- *
- * We thus check for the device type here, and handle the non
- * existing registers ourselves.
- */
-
- skip = 0;
- if (bus == 0 && xb->xb_devices[dev].id ==
- PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3)) {
- switch (offset) {
- case PCI_COMMAND_STATUS_REG:
- /*
- * Some IOC3 models do not support having this bit
- * cleared (which is what pci_mapreg_probe() will
- * do), so we set it unconditionally.
- */
- data |= PCI_COMMAND_MEM_ENABLE;
- /* FALLTHROUGH */
- case PCI_ID_REG:
- case PCI_CLASS_REG:
- case PCI_BHLC_REG:
- case PCI_MAPREG_START:
- /* These registers are implemented. Go ahead. */
- break;
- default:
- /* These registers are not implemented. */
- skip = 1;
- break;
- }
- }
-
- if (skip == 0) {
- /*
- * Disable interrupts on this bridge (especially error
- * interrupts).
- */
- s = splhigh();
- xbridge_write_reg(xb, BRIDGE_IER, 0);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-
- if (bus != 0) {
- xbridge_write_reg(xb, BRIDGE_PCI_CFG,
- (bus << 16) | (dev << 11));
- pa = xb->xb_regh + BRIDGE_PCI_CFG1_SPACE;
- } else {
- /*
- * On PIC, device 0 in configuration space is the
- * PIC itself, device slots are offset by one.
- */
- if (ISSET(xb->xb_flags, XF_PIC))
- dev++;
- pa = xb->xb_regh + BRIDGE_PCI_CFG_SPACE + (dev << 12);
- }
-
- pa += (fn << 8) + offset;
- guarded_write_4(pa, data);
-
- xbridge_write_reg(xb, BRIDGE_IER, xb->xb_ier);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
- splx(s);
- }
-}
-
-int
-xbridge_probe_device_hook(void *cookie, struct pci_attach_args *pa)
-{
- struct xbpci_softc *xb = cookie;
-
- /*
- * Check for the hardware byteswap setting of the device we are
- * interested in, and pick bus_space_tag accordingly.
- * Note that the device list here must match xbridge_resource_setup().
- */
- if (pa->pa_id == PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3) ||
- pa->pa_id == PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC4) ||
- pa->pa_id == PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_RAD1)) {
- pa->pa_iot = xb->xb_io_bus_space;
- pa->pa_memt = xb->xb_mem_bus_space;
- } else {
- pa->pa_iot = xb->xb_io_bus_space_sw;
- pa->pa_memt = xb->xb_mem_bus_space_sw;
- }
-
- return 0;
-}
-
-int
-xbridge_get_widget(void *cookie)
-{
- struct xbpci_softc *xb = cookie;
-
- return xb->xb_widget;
-}
-
-int
-xbridge_get_dl(void *cookie, pcitag_t tag, struct sgi_device_location *sdl)
-{
- int bus, device, fn;
- struct xbpci_softc *xb = cookie;
-
- xbridge_decompose_tag(cookie, tag, &bus, &device, &fn);
- if (bus != 0)
- return 0;
-
- sdl->nasid = xb->xb_nasid;
- sdl->widget = xb->xb_widget;
-
- sdl->bus = xb->xb_busno;
- sdl->device = device;
- sdl->fn = fn;
-
- return 1;
-}
-
-/*
- ********************* Interrupt handling.
- */
-
-/*
- * We map each slot to its own interrupt bit, which will in turn be routed to
- * the Heart or Hub widget in charge of interrupt processing.
- */
-
-struct xbridge_intrhandler {
- LIST_ENTRY(xbridge_intrhandler) xih_nxt;
- struct xbridge_intr *xih_main;
- int (*xih_func)(void *);
- void *xih_arg;
- struct evcount xih_count;
- int xih_flags;
-#define XIH_MPSAFE 0x01
- int xih_level;
- int xih_device; /* device slot number */
-};
-
-struct xbridge_intr {
- struct xbpci_softc *xi_bus;
- int xi_intrsrc; /* interrupt source on interrupt widget */
- int xi_intrbit; /* interrupt source on BRIDGE */
- LIST_HEAD(, xbridge_intrhandler) xi_handlers;
-};
-
-/* how our pci_intr_handle_t are constructed... */
-#define XBRIDGE_INTR_VALID 0x100
-#define XBRIDGE_INTR_HANDLE(d,b) (XBRIDGE_INTR_VALID | ((d) << 3) | (b))
-#define XBRIDGE_INTR_DEVICE(h) (((h) >> 3) & 07)
-#define XBRIDGE_INTR_BIT(h) ((h) & 07)
-
-int
-xbridge_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
-{
- struct xbpci_softc *xb = pa->pa_pc->pc_conf_v;
- int bus, device, intr;
- int pin;
-
- *ihp = 0;
-
- if (pa->pa_intrpin == 0) {
- /* No IRQ used. */
- return 1;
- }
-
-#ifdef DIAGNOSTIC
- if (pa->pa_intrpin > 4) {
- printf("%s: bad interrupt pin %d\n", __func__, pa->pa_intrpin);
- return 1;
- }
-#endif
-
- pci_decompose_tag(pa->pa_pc, pa->pa_tag, &bus, &device, NULL);
-
- if (pa->pa_bridgetag) {
- pin = PPB_INTERRUPT_SWIZZLE(pa->pa_rawintrpin, device);
- if (!ISSET(pa->pa_bridgeih[pin - 1], XBRIDGE_INTR_VALID))
- return 0;
- intr = XBRIDGE_INTR_BIT(pa->pa_bridgeih[pin - 1]);
- } else {
- /*
- * For IOC3 devices, pin A is always the regular PCI interrupt,
- * but wiring of interrupt pin B may vary.
- * We rely upon ioc(4) being able to figure out whether it's
- * an onboard chip or not, and to require interrupt pin D
- * instead of B in the former case.
- */
- intr = -1;
- if (xb->xb_devices[device].id ==
- PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3)) {
-
- switch (pa->pa_intrpin) {
- case PCI_INTERRUPT_PIN_A:
- case PCI_INTERRUPT_PIN_B:
- break;
- case PCI_INTERRUPT_PIN_D:
- /*
- * If this device is an onboard IOC3,
- * interrupt pin B is wired as pin A of
- * the first empty PCI slot...
- */
- for (intr = 0; intr < MAX_SLOTS; intr++)
- if (SLOT_EMPTY(xb, intr))
- break;
- /* should not happen, but fallback anyway */
- if (intr >= MAX_SLOTS)
- intr = -1;
- break;
- default:
- return 1;
- }
- }
- if (intr < 0) {
- if (pa->pa_intrpin & 1)
- intr = device;
- else
- intr = device ^ 4;
- }
- }
-
- *ihp = XBRIDGE_INTR_HANDLE(device, intr);
-
- return 0;
-}
-
-const char *
-xbridge_intr_string(void *cookie, pci_intr_handle_t ih)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)cookie;
- int intrbit = XBRIDGE_INTR_BIT(ih);
-
- if (xb->xb_intrstr[intrbit][0] == '\0')
- snprintf(xb->xb_intrstr[intrbit],
- sizeof xb->xb_intrstr[intrbit], "irq %ld", ih);
- return xb->xb_intrstr[intrbit];
-}
-
-void *
-xbridge_intr_establish(void *cookie, pci_intr_handle_t ih, int level,
- int (*func)(void *), void *arg, const char *name)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)cookie;
- struct xbridge_intr *xi;
- struct xbridge_intrhandler *xih;
- uint64_t int_addr;
- int device = XBRIDGE_INTR_DEVICE(ih);
- int intrbit = XBRIDGE_INTR_BIT(ih);
- int flags;
- int intrsrc;
- int new;
-
- flags = (level & IPL_MPSAFE) ? XIH_MPSAFE : 0;
- level &= ~IPL_MPSAFE;
-
- /*
- * Allocate bookkeeping structure if this is the
- * first time we're using this interrupt source.
- */
- if ((xi = xb->xb_intr[intrbit]) == NULL) {
- xi = (struct xbridge_intr *)
- malloc(sizeof(*xi), M_DEVBUF, M_NOWAIT);
- if (xi == NULL)
- return NULL;
-
- xi->xi_bus = xb;
- xi->xi_intrbit = intrbit;
- LIST_INIT(&xi->xi_handlers);
-
- if (xbow_intr_register(xb->xb_widget, level, &intrsrc) != 0) {
- free(xi, M_DEVBUF, sizeof *xi);
- return NULL;
- }
-
- xi->xi_intrsrc = intrsrc;
- xb->xb_intr[intrbit] = xi;
- snprintf(xb->xb_intrstr[intrbit],
- sizeof xb->xb_intrstr[intrbit],
- "irq %d, xbow irq %d", intrbit, intrsrc);
- } else
- intrsrc = xi->xi_intrsrc;
-
- /*
- * Register the interrupt at the Heart or Hub level if this is the
- * first time we're using this interrupt source.
- */
- new = LIST_EMPTY(&xi->xi_handlers);
- if (new) {
- /*
- * XXX The interrupt dispatcher is always registered
- * XXX at IPL_BIO, in case the interrupt will be shared
- * XXX between devices of different levels.
- */
- if (xbow_intr_establish(xb->xb_pci_intr_handler, xi, intrsrc,
- IPL_BIO | IPL_MPSAFE, NULL, NULL)) {
- printf("%s: unable to register interrupt handler\n",
- DEVNAME(xb));
- return NULL;
- }
- }
-
- xih = (struct xbridge_intrhandler *)
- malloc(sizeof(*xih), M_DEVBUF, M_NOWAIT);
- if (xih == NULL)
- return NULL;
-
- xih->xih_main = xi;
- xih->xih_func = func;
- xih->xih_arg = arg;
- xih->xih_flags = flags;
- xih->xih_level = level;
- xih->xih_device = device;
- evcount_attach(&xih->xih_count, name, &xi->xi_intrsrc);
- LIST_INSERT_HEAD(&xi->xi_handlers, xih, xih_nxt);
-
- if (new) {
- /*
- * Note that, while PIC uses a complete XIO address,
- * Bridge will only store the interrupt source and high
- * bits of the address, and will reuse the widget interrupt
- * address for the low 38 bits of the XIO address.
- */
- if (ISSET(xb->xb_flags, XF_PIC))
- int_addr = ((uint64_t)intrsrc << 48) |
- (xbow_intr_address & ((1UL << 48) - 1));
- else
- int_addr = ((xbow_intr_address >> 30) &
- 0x0003ff00) | intrsrc;
- xb->xb_ier |= 1L << intrbit;
-
- xbridge_write_reg(xb, BRIDGE_INT_ADDR(intrbit), int_addr);
- xbridge_write_reg(xb, BRIDGE_IER, xb->xb_ier);
- /*
- * INT_MODE register controls which interrupt pins cause
- * ``interrupt clear'' packets to be sent for high->low
- * transition.
- * We enable such packets to be sent in order not to have to
- * clear interrupts ourselves.
- */
- xbridge_write_reg(xb, BRIDGE_INT_MODE,
- xbridge_read_reg(xb, BRIDGE_INT_MODE) | (1 << intrbit));
- xbridge_write_reg(xb, BRIDGE_INT_DEV,
- xbridge_read_reg(xb, BRIDGE_INT_DEV) |
- (device << (intrbit * 3)));
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
- }
-
- return (void *)xih;
-}
-
-void
-xbridge_intr_disestablish(void *cookie, void *vih)
-{
- struct xbpci_softc *xb = cookie;
- struct xbridge_intrhandler *xih = (struct xbridge_intrhandler *)vih;
- struct xbridge_intr *xi = xih->xih_main;
- int intrbit = xi->xi_intrbit;
-
- evcount_detach(&xih->xih_count);
- LIST_REMOVE(xih, xih_nxt);
-
- if (LIST_EMPTY(&xi->xi_handlers)) {
- xb->xb_ier &= ~(1 << intrbit);
- xbridge_write_reg(xb, BRIDGE_INT_ADDR(intrbit), 0);
- xbridge_write_reg(xb, BRIDGE_IER, xb->xb_ier);
- xbridge_write_reg(xb, BRIDGE_INT_MODE,
- xbridge_read_reg(xb, BRIDGE_INT_MODE) & ~(1 << intrbit));
- xbridge_write_reg(xb, BRIDGE_INT_DEV,
- xbridge_read_reg(xb, BRIDGE_INT_DEV) &
- ~(7 << (intrbit * 3)));
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-
- xbow_intr_disestablish(xi->xi_intrsrc);
- /*
- * Note we could free xb->xb_intr[intrbit] at this point,
- * but it's not really worth doing.
- */
- }
-
- free(xih, M_DEVBUF, sizeof *xih);
-}
-
-int
-xbridge_intr_line(void *cookie, pci_intr_handle_t ih)
-{
- return XBRIDGE_INTR_BIT(ih);
-}
-
-int
-xbridge_err_intr_handler(void *v)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)v;
- uint64_t isr;
-
- isr = xbridge_read_reg(xb, BRIDGE_ISR) & ~BRIDGE_ISR_HWINTR_MASK;
- xbridge_err_handle(xb, isr);
-
- xbow_intr_clear(xb->xb_err_intrsrc);
-
- return 1;
-}
-
-int
-xbridge_pci_intr_handler(void *v)
-{
- struct xbridge_intr *xi = (struct xbridge_intr *)v;
- struct xbpci_softc *xb = xi->xi_bus;
- struct xbridge_intrhandler *xih;
- uint64_t isr;
- int rc;
-#ifdef MULTIPROCESSOR
- int need_lock;
-#endif
-
- /* XXX shouldn't happen, and assumes interrupt is not shared */
- if (LIST_EMPTY(&xi->xi_handlers)) {
- printf("%s: spurious irq %d\n", DEVNAME(xb), xi->xi_intrbit);
- return 0;
- }
-
- /*
- * Flush PCI write buffers before servicing the interrupt.
- */
- LIST_FOREACH(xih, &xi->xi_handlers, xih_nxt)
- xbridge_wbflush(xb, xih->xih_device);
-
- isr = xbridge_read_reg(xb, BRIDGE_ISR);
- if ((isr & ~BRIDGE_ISR_HWINTR_MASK) != 0) {
- /*
- * This is an error interrupt triggered by a particular
- * device.
- */
- xbridge_err_handle(xb, isr & ~BRIDGE_ISR_HWINTR_MASK);
- if ((isr &= BRIDGE_ISR_HWINTR_MASK) == 0)
- return 1;
- }
-
- if ((isr & (1L << xi->xi_intrbit)) == 0) {
- /*
- * May be a result of the lost interrupt workaround (see
- * near the end of this function); don't complain in that
- * case.
- */
- rc = -1;
-#ifdef DEBUG
- printf("%s: irq %d but not pending in ISR %08llx\n",
- DEVNAME(xb), xi->xi_intrbit, isr);
-#endif
- } else {
- rc = 0;
- LIST_FOREACH(xih, &xi->xi_handlers, xih_nxt) {
- splraise(xih->xih_level);
-#ifdef MULTIPROCESSOR
- if (ISSET(xih->xih_flags, XIH_MPSAFE))
- need_lock = 0;
- else
- need_lock = xih->xih_flags < IPL_CLOCK;
- if (need_lock)
- __mp_lock(&kernel_lock);
-#endif
- if ((*xih->xih_func)(xih->xih_arg) != 0) {
- xih->xih_count.ec_count++;
- rc = 1;
- }
-#ifdef MULTIPROCESSOR
- if (need_lock)
- __mp_unlock(&kernel_lock);
-#endif
- /*
- * No need to lower spl here, as our caller will
- * lower spl upon our return.
- * However that splraise() is necessary so that
- * interrupt handler code calling splx() will not
- * cause our interrupt source to be unmasked.
- */
- }
- /* XXX assumes interrupt is not shared */
- if (rc == 0)
- printf("%s: spurious irq %d\n",
- DEVNAME(xb), xi->xi_intrbit);
- }
-
- /*
- * There is a known BRIDGE race in which, if two interrupts
- * on two different pins occur within 60nS of each other,
- * further interrupts on the first pin do not cause an
- * interrupt to be sent.
- *
- * The workaround against this is to check if our interrupt
- * source is still active (i.e. another interrupt is pending),
- * in which case we force an interrupt anyway.
- *
- * The XBridge even has a nice facility to do this, where we
- * do not even have to check if our interrupt is pending.
- */
-
- if (ISSET(xb->xb_flags, XF_XBRIDGE)) {
- xbridge_write_reg(xb, BRIDGE_INT_FORCE_PIN(xi->xi_intrbit), 1);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
- } else {
- if (xbridge_read_reg(xb, BRIDGE_ISR) & (1 << xi->xi_intrbit))
- xbow_intr_set(xi->xi_intrsrc);
- }
-
- return rc;
-}
-
-int
-xbridge_picv1_pci_intr_handler(void *v)
-{
- struct xbridge_intr *xi = (struct xbridge_intr *)v;
- struct xbpci_softc *xb = xi->xi_bus;
-
- /*
- * Revision 1 of PIC is supposed to need the interrupt enable bit
- * to be toggled to prevent loss of interrupt.
- */
- xbridge_write_reg(xb, BRIDGE_IER, xb->xb_ier & ~(1L << xi->xi_intrbit));
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
- xbridge_write_reg(xb, BRIDGE_IER, xb->xb_ier);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-
- return xbridge_pci_intr_handler(v);
-}
-
-/*
- ********************* chip register access.
- */
-
-uint64_t
-bridge_read_reg(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a)
-{
- return (uint64_t)widget_read_4(t, h, a);
-}
-void
-bridge_write_reg(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a,
- uint64_t v)
-{
- widget_write_4(t, h, a, (uint32_t)v);
-}
-
-uint64_t
-pic_read_reg(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a)
-{
- return widget_read_8(t, h, a);
-}
-
-void
-pic_write_reg(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t a,
- uint64_t v)
-{
- widget_write_8(t, h, a, v);
-}
-
-/*
- ********************* bus_space glue.
- */
-
-uint8_t
-xbridge_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint8_t *)((h + o) ^ 3);
-}
-
-uint16_t
-xbridge_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
- return *(volatile uint16_t *)((h + o) ^ 2);
-}
-
-void
-xbridge_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
- uint8_t v)
-{
- *(volatile uint8_t *)((h + o) ^ 3) = v;
-}
-
-void
-xbridge_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
- uint16_t v)
-{
- *(volatile uint16_t *)((h + o) ^ 2) = v;
-}
-
-void
-xbridge_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)((h + o) ^ 2);
- len >>= 1;
- while (len-- != 0) {
- *(uint16_t *)buf = letoh16(*addr);
- buf += 2;
- }
-}
-
-void
-xbridge_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint16_t *addr = (volatile uint16_t *)((h + o) ^ 2);
- len >>= 1;
- while (len-- != 0) {
- *addr = htole16(*(uint16_t *)buf);
- buf += 2;
- }
-}
-
-void
-xbridge_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *(uint32_t *)buf = letoh32(*addr);
- buf += 4;
- }
-}
-
-void
-xbridge_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint32_t *addr = (volatile uint32_t *)(h + o);
- len >>= 2;
- while (len-- != 0) {
- *addr = htole32(*(uint32_t *)buf);
- buf += 4;
- }
-}
-
-void
-xbridge_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *(uint64_t *)buf = letoh64(*addr);
- buf += 8;
- }
-}
-
-void
-xbridge_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
- const uint8_t *buf, bus_size_t len)
-{
- volatile uint64_t *addr = (volatile uint64_t *)(h + o);
- len >>= 3;
- while (len-- != 0) {
- *addr = htole64(*(uint64_t *)buf);
- buf += 8;
- }
-}
-
-int
-xbridge_space_map_devio(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)t->bus_private;
- bus_addr_t bpa;
-#ifdef DIAGNOSTIC
- bus_addr_t start, end;
- uint d;
-#endif
-
- if ((offs >> 24) != xb->xb_devio_skew)
- return EINVAL; /* not a devio mapping */
-
- /*
- * Figure out which devio `slot' we are using, and make sure
- * we do not overrun it.
- */
- bpa = offs & ((1UL << 24) - 1);
-#ifdef DIAGNOSTIC
- for (d = 0; d < xb->xb_nslots; d++) {
- start = PIC_DEVIO_OFFS(xb->xb_busno, d);
- end = start + BRIDGE_DEVIO_SIZE(d);
- if (bpa >= start && bpa < end) {
- if (bpa + size > end)
- return EINVAL;
- else
- break;
- }
- }
- if (d == xb->xb_nslots)
- return EINVAL;
-#endif
-
- /*
- * Note we can not use our own bus_base because it might not point
- * to our small window. Instead, use the one used by the xbridge
- * driver itself, which _always_ points to the short window.
- */
- *bshp = xb->xb_regt->bus_base + bpa;
- return 0;
-}
-
-int
-xbridge_space_map_io(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)t->bus_private;
-
- /*
- * Base address is either within the devio area, or our direct
- * window.
- */
-
- if ((offs >> 24) == xb->xb_devio_skew)
- return xbridge_space_map_devio(t, offs, size, flags, bshp);
-
-#ifdef DIAGNOSTIC
- /* check that this does not overflow the mapping */
- if (offs < xb->xb_iostart || offs + size - 1 > xb->xb_ioend)
- return EINVAL;
-#endif
-
- *bshp = (t->bus_base + offs);
- return 0;
-}
-
-int
-xbridge_space_map_mem(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
-#if defined(TGT_ORIGIN) || defined(DIAGNOSTIC)
- struct xbpci_softc *xb = (struct xbpci_softc *)t->bus_private;
-#endif
-
- /*
- * Base address is either within the devio area, or our direct
- * window. Except on Octane where we never setup devio memory
- * mappings, because the large mapping is always available.
- */
-
-#ifdef TGT_ORIGIN
- if (sys_config.system_type != SGI_OCTANE &&
- (offs >> 24) == xb->xb_devio_skew)
- return xbridge_space_map_devio(t, offs, size, flags, bshp);
-#endif
-
-#ifdef DIAGNOSTIC
- /* check that this does not overflow the mapping */
- if (offs < xb->xb_memstart || offs + size - 1 > xb->xb_memend)
- return EINVAL;
-#endif
-
- *bshp = (t->bus_base + offs);
- return 0;
-}
-
-int
-xbridge_space_region_devio(bus_space_tag_t t , bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
-#ifdef DIAGNOSTIC
- struct xbpci_softc *xb = (struct xbpci_softc *)t->bus_private;
- bus_addr_t bpa;
- bus_addr_t start, end;
- uint d;
-#endif
-
-#ifdef DIAGNOSTIC
- /*
- * Note we can not use our own bus_base because it might not point
- * to our small window. Instead, use the one used by the xbridge
- * driver itself, which _always_ points to the short window.
- */
- bpa = (bus_addr_t)bsh - xb->xb_regt->bus_base;
-
- if ((bpa >> 24) != 0)
- return EINVAL; /* not a devio mapping */
-
- /*
- * Figure out which devio `slot' we are using, and make sure
- * we do not overrun it.
- */
- for (d = 0; d < xb->xb_nslots; d++) {
- start = PIC_DEVIO_OFFS(xb->xb_busno, d);
- end = start + BRIDGE_DEVIO_SIZE(d);
- if (bpa >= start && bpa < end) {
- if (bpa + offset + size > end)
- return EINVAL;
- else
- break;
- }
- }
- if (d == xb->xb_nslots)
- return EINVAL;
-#endif
-
- *nbshp = bsh + offset;
- return 0;
-}
-
-int
-xbridge_space_region_io(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)t->bus_private;
- bus_addr_t bpa;
-
- /*
- * Note we can not use our own bus_base because it might not point
- * to our small window. Instead, use the one used by the xbridge
- * driver itself, which _always_ points to the short window.
- */
- bpa = (bus_addr_t)bsh - xb->xb_regt->bus_base;
-
- if ((bpa >> 24) == 0)
- return xbridge_space_region_devio(t, bsh, offset, size, nbshp);
-
-#ifdef DIAGNOSTIC
- /* check that this does not overflow the mapping */
- bpa = (bus_addr_t)bsh - t->bus_base;
- if (bpa + offset + size - 1 > xb->xb_ioend)
- return EINVAL;
-#endif
-
- *nbshp = bsh + offset;
- return 0;
-}
-
-int
-xbridge_space_region_mem(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
-#if defined(TGT_ORIGIN) || defined(DIAGNOSTIC)
- struct xbpci_softc *xb = (struct xbpci_softc *)t->bus_private;
- bus_addr_t bpa;
-#endif
-
- /*
- * Base address is either within the devio area, or our direct
- * window. Except on Octane where we never setup devio memory
- * mappings, because the large mapping is always available.
- */
-
-#ifdef TGT_ORIGIN
- if (sys_config.system_type != SGI_OCTANE) {
- /*
- * Note we can not use our own bus_base because it might not
- * point to our small window. Instead, use the one used by
- * the xbridge driver itself, which _always_ points to the
- * short window.
- */
- bpa = (bus_addr_t)bsh - xb->xb_regt->bus_base;
-
- if ((bpa >> 24) == 0)
- return xbridge_space_region_devio(t, bsh, offset, size,
- nbshp);
- }
-#endif
-
-#ifdef DIAGNOSTIC
- /* check that this does not overflow the mapping */
- bpa = (bus_addr_t)bsh - t->bus_base;
- if (bpa + offset + size - 1 > xb->xb_memend)
- return EINVAL;
-#endif
-
- *nbshp = bsh + offset;
- return 0;
-}
-
-void
-xbridge_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offs,
- bus_size_t len, int flags)
-{
- struct xbpci_softc *xb = (struct xbpci_softc *)t->bus_private;
- bus_addr_t bpa, start, end;
- uint d, devmin, devmax;
-
- mips_sync();
-
- if (flags & BUS_SPACE_BARRIER_WRITE) {
- /*
- * Try to figure out which device we are working for, and
- * flush its PCI write buffer.
- * This is ugly; we really need to be able to provide a
- * different bus_space_tag_t to each slot, to be able
- * to tell them apart.
- */
- if (t->_space_map == xbridge_space_map_devio) {
- bpa = (bus_addr_t)h - xb->xb_regt->bus_base;
- for (d = 0; d < xb->xb_nslots; d++) {
- start = PIC_DEVIO_OFFS(xb->xb_busno, d);
- end = start + BRIDGE_DEVIO_SIZE(d);
- if (bpa >= start && bpa < end)
- break;
- }
- devmin = d;
- devmax = d + 1;
- /* should not happen */
- if (d == xb->xb_nslots) {
- devmin = 0;
- devmax = xb->xb_nslots;
- }
- } else {
- /* nothing better came up my sleeve... */
- devmin = 0;
- devmax = xb->xb_nslots;
- }
- for (d = devmin; d < devmax; d++)
- xbridge_wbflush(xb, d);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
- }
-}
-
-/*
- ********************* bus_dma helpers
- */
-
-/*
- * Since the common bus_dma code makes sure DMA-able memory is allocated
- * within the dma_constraint limits, which are set to the direct DMA
- * window, we do not need to check for addresses outside this range here.
- */
-
-bus_addr_t
-xbridge_pa_to_device(paddr_t pa, int flags)
-{
- KASSERTMSG(pa - dma_constraint.ucr_low < BRIDGE_DMA_DIRECT_LENGTH,
- "pa 0x%lx not in dma constraint range! (0x%lx-0x%lx)",
- pa, dma_constraint.ucr_low, dma_constraint.ucr_high);
- return (pa - dma_constraint.ucr_low) + BRIDGE_DMA_DIRECT_BASE;
-}
-
-/*
- ********************* Bridge configuration code.
- */
-
-const char *
-xbridge_setup(struct xbpci_softc *xb)
-{
- bus_addr_t ba;
- paddr_t pa;
- uint64_t status, ctrl, int_addr, dirmap;
- int mode, speed, dev;
-
- status = xbridge_read_reg(xb, WIDGET_STATUS);
- ctrl = xbridge_read_reg(xb, WIDGET_CONTROL);
-
- /*
- * Print bus mode and speed.
- */
-
- mode = ISSET(xb->xb_flags, XF_PIC) &&
- ISSET(status, PIC_WIDGET_STATUS_PCIX_MODE);
- if (mode != 0) {
- SET(xb->xb_flags, XF_PCIX);
- speed = (status & PIC_WIDGET_STATUS_PCIX_SPEED_MASK) >>
- PIC_WIDGET_STATUS_PCIX_SPEED_SHIFT;
- } else if (ISSET(xb->xb_flags, XF_XBRIDGE)) {
- speed = (ctrl & BRIDGE_WIDGET_CONTROL_SPEED_MASK) >>
- BRIDGE_WIDGET_CONTROL_SPEED_SHIFT;
- } else
- speed = 0;
- /* 0 = 33 MHz, 1 = 66 MHz, 2 = 100 MHz, 3 = 133 MHz */
- speed = (speed & 2 ? 100 : 33) + (speed & 1 ? 33 : 0);
- printf("%d MHz %s bus", speed, mode ? "PCIX" : "PCI");
-
- /*
- * Gather device identification for all slots.
- * We need this to be able to allocate RRBs correctly, and also
- * to be able to check quickly whether a given device is an IOC3.
- */
-
- for (dev = 0; dev < xb->xb_nslots; dev++) {
- if (ISSET(xb->xb_flags, XF_PIC))
- pa = xb->xb_regh + BRIDGE_PCI_CFG_SPACE +
- ((dev + 1) << 12) + PCI_ID_REG;
- else
- pa = xb->xb_regh + BRIDGE_PCI_CFG_SPACE +
- (dev << 12) + PCI_ID_REG;
- if (guarded_read_4(pa, &xb->xb_devices[dev].id) != 0)
- xb->xb_devices[dev].id = PCI_ID_EMPTY;
- }
-
- /*
- * Configure the direct DMA window to access the 2GB memory
- * window selected as our DMA memory range.
- */
- dirmap = (dma_constraint.ucr_low >> BRIDGE_DIRMAP_BASE_SHIFT) &
- BRIDGE_DIRMAP_BASE_MASK;
- switch (sys_config.system_type) {
- default:
-#ifdef TGT_ORIGIN
- dirmap |= kl_hub_widget[
- IP27_PHYS_TO_NODE(dma_constraint.ucr_low)] <<
- BRIDGE_DIRMAP_WIDGET_SHIFT;
- break;
-#endif
-#ifdef TGT_OCTANE
- case SGI_OCTANE:
- dirmap |= IP30_HEART_WIDGET << BRIDGE_DIRMAP_WIDGET_SHIFT;
- break;
-#endif
- }
- xbridge_write_reg(xb, BRIDGE_DIR_MAP, dirmap);
-
- /*
- * Allocate RRB for the existing devices.
- */
-
- xbridge_rrb_setup(xb, 0);
- xbridge_rrb_setup(xb, 1);
-
- /*
- * Enable(?) snooping and disable relaxed order on PIC.
- */
-
- if (ISSET(xb->xb_flags, XF_PIC)) {
- ctrl &= ~PIC_WIDGET_CONTROL_NO_SNOOP;
- ctrl &= ~PIC_WIDGET_CONTROL_RELAX_ORDER;
- }
-
- /*
- * Disable byteswapping on PIO accesses through the large window
- * (we handle this at the bus_space level). It should not have
- * been enabled by ARCS, since IOC serial console relies on this,
- * but better enforce this anyway.
- */
-
- ctrl &= ~BRIDGE_WIDGET_CONTROL_IO_SWAP;
- ctrl &= ~BRIDGE_WIDGET_CONTROL_MEM_SWAP;
- xbridge_write_reg(xb, WIDGET_CONTROL, ctrl);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-
- /*
- * The PROM will only configure the onboard devices. Set up
- * any other device we might encounter.
- */
-
- xbridge_resource_setup(xb);
-
- /*
- * Older Bridge chips needs to run with pci timeouts
- * disabled.
- */
-
- if (!ISSET(xb->xb_flags, XF_XBRIDGE) && xb->xb_revision < 4) {
- xbridge_write_reg(xb, BRIDGE_BUS_TIMEOUT,
- xbridge_read_reg(xb, BRIDGE_BUS_TIMEOUT) &
- ~BRIDGE_BUS_PCI_RETRY_CNT_MASK);
- }
-
- /*
- * AT&T/Lucent USS-302 and USS-312 USB controllers require
- * a larger PCI retry hold interval for proper operation.
- */
-
- for (dev = 0; dev < xb->xb_nslots; dev++) {
- if (xb->xb_devices[dev].id ==
- PCI_ID_CODE(PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_USBHC) ||
- xb->xb_devices[dev].id ==
- PCI_ID_CODE(PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_USBHC2)) {
- ctrl = xbridge_read_reg(xb, BRIDGE_BUS_TIMEOUT);
- ctrl &= ~BRIDGE_BUS_PCI_RETRY_HOLD_MASK;
- ctrl |= (4 << BRIDGE_BUS_PCI_RETRY_HOLD_SHIFT);
- xbridge_write_reg(xb, BRIDGE_BUS_TIMEOUT, ctrl);
-
- break;
- }
- }
-
- /*
- * Clear the write request memory in PIC, to avoid risking
- * spurious parity errors if it is not clean.
- */
- if (ISSET(xb->xb_flags, XF_PIC)) {
- for (ba = PIC_WR_REQ_LOWER(0);
- ba != PIC_WR_REQ_LOWER(PIC_WR_REQ_ENTRIES); ba += 8)
- xbridge_write_reg(xb, ba, 0ULL);
- for (ba = PIC_WR_REQ_UPPER(0);
- ba != PIC_WR_REQ_UPPER(PIC_WR_REQ_ENTRIES); ba += 8)
- xbridge_write_reg(xb, ba, 0ULL);
- for (ba = PIC_WR_REQ_PARITY(0);
- ba != PIC_WR_REQ_PARITY(PIC_WR_REQ_ENTRIES); ba += 8)
- xbridge_write_reg(xb, ba, 0ULL);
- }
-
- /*
- * Setup interrupt handling.
- *
- * Note that, on PIC, the `lower address' register is a 64 bit
- * register and thus need to be initialized with the whole 64 bit
- * address; the `upper address' register is hardwired to zero and
- * ignores writes, so we can use the same logic on Bridge and PIC.
- *
- * Also, on Octane, we need to keep otherwise unused interrupt source
- * #6 enabled on the obio widget, as it controls routing of the
- * power button interrupt (and to make things more complicated than
- * necessary, this pin is wired to a particular Heart interrupt
- * register bit, so interrupts on this pin will never be seen at the
- * Bridge level).
- */
-
-#ifdef TGT_OCTANE
- if (sys_config.system_type == SGI_OCTANE &&
- xb->xb_widget == IP30_BRIDGE_WIDGET)
- xb->xb_ier = 1L << 6;
- else
-#endif
- xb->xb_ier = 0;
- xbridge_write_reg(xb, BRIDGE_IER, 0);
- xbridge_write_reg(xb, BRIDGE_INT_MODE, 0);
- xbridge_write_reg(xb, BRIDGE_INT_DEV, 0);
- int_addr = xbow_intr_address & ((1UL << 48) - 1);
- switch (sys_config.system_type) {
- default:
-#ifdef TGT_ORIGIN
- int_addr |= (uint64_t)kl_hub_widget[masternasid] << 48;
- break;
-#endif
-#ifdef TGT_OCTANE
- case SGI_OCTANE:
- int_addr |= (uint64_t)IP30_HEART_WIDGET << 48;
- break;
-#endif
- }
- xbridge_write_reg(xb, WIDGET_INTDEST_ADDR_LOWER, int_addr);
- xbridge_write_reg(xb, WIDGET_INTDEST_ADDR_UPPER, int_addr >> 32);
-
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-
- /*
- * Register an error interrupt handler.
- */
-
- if (xbow_intr_register(xb->xb_widget, IPL_HIGH,
- &xb->xb_err_intrsrc) != 0)
- return "can't allocate error interrupt source";
- if (xbow_intr_establish(xbridge_err_intr_handler, xb,
- xb->xb_err_intrsrc, IPL_HIGH, DEVNAME(xb), NULL))
- return "unable to register error interrupt handler";
-
- xbridge_err_clear(xb, 0);
- xbridge_write_reg(xb, BRIDGE_INT_HOST_ERR, xb->xb_err_intrsrc);
-
- /*
- * Enable as many error interrupt sources as possible; older
- * Bridge chips need to have a few of them kept masked to
- * avoid hitting hardware issues.
- */
- xb->xb_ier |= (ISSET(xb->xb_flags, XF_PIC) ?
- PIC_ISR_ERRMASK : BRIDGE_ISR_ERRMASK) &
- ~(BRIDGE_ISR_MULTIPLE_ERR | BRIDGE_ISR_SSRAM_PERR |
- BRIDGE_ISR_GIO_BENABLE_ERR);
- if (xb->xb_busno != 0) {
- /* xtalk errors will only show up on bus #0 */
- xb->xb_ier &= ~(BRIDGE_ISR_UNSUPPORTED_XOP |
- BRIDGE_ISR_LLP_REC_SNERR | BRIDGE_ISR_LLP_REC_CBERR |
- BRIDGE_ISR_LLP_RCTY | BRIDGE_ISR_LLP_TX_RETRY |
- BRIDGE_ISR_LLP_TCTY);
- }
- if (!ISSET(xb->xb_flags, XF_XBRIDGE)) {
- if (xb->xb_revision < 2)
- xb->xb_ier &= ~(BRIDGE_ISR_UNEXPECTED_RESP |
- BRIDGE_ISR_PCI_MASTER_TMO |
- BRIDGE_ISR_RESP_XTALK_ERR |
- BRIDGE_ISR_LLP_TX_RETRY | BRIDGE_ISR_XREAD_REQ_TMO);
- if (xb->xb_revision < 3)
- xb->xb_ier &= ~BRIDGE_ISR_BAD_XRESP_PACKET;
- }
-
- xbridge_write_reg(xb, BRIDGE_IER, xb->xb_ier);
-
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-
- return NULL;
-}
-
-/*
- * Handle PCI errors.
- */
-void
-xbridge_err_handle(struct xbpci_softc *xb, uint64_t isr)
-{
- uint64_t pci_err, wid_err, resp_err;
-
- wid_err = xbridge_read_reg(xb, WIDGET_ERR_ADDR_LOWER);
- if (!ISSET(xb->xb_flags, XF_PIC))
- wid_err |= xbridge_read_reg(xb, WIDGET_ERR_ADDR_UPPER) << 32;
- pci_err = xbridge_read_reg(xb, BRIDGE_PCI_ERR_LOWER);
- if (!ISSET(xb->xb_flags, XF_PIC))
- pci_err |= xbridge_read_reg(xb, BRIDGE_PCI_ERR_UPPER) << 32;
- resp_err = xbridge_read_reg(xb, BRIDGE_WIDGET_RESP_LOWER);
- if (!ISSET(xb->xb_flags, XF_PIC))
- resp_err |=
- xbridge_read_reg(xb, BRIDGE_WIDGET_RESP_UPPER) << 32;
-
- /* XXX give more detailed information */
- printf("%s: error interrupt, isr %llx wid %llx pci %llx resp %llx\n",
- DEVNAME(xb), isr, wid_err, pci_err, resp_err);
-
- xbridge_err_clear(xb, isr);
-}
-
-/*
- * Clear any error condition.
- */
-void
-xbridge_err_clear(struct xbpci_softc *xb, uint64_t isr)
-{
- if (ISSET(xb->xb_flags, XF_PIC)) {
- if (isr == 0)
- isr = xbridge_read_reg(xb, BRIDGE_ISR) &
- ~BRIDGE_ISR_HWINTR_MASK;
- xbridge_write_reg(xb, BRIDGE_ICR, isr);
- } else
- xbridge_write_reg(xb, BRIDGE_ICR, BRIDGE_ICR_ALL);
-
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
-}
-
-/*
- * Build a not-so-pessimistic RRB allocation register value.
- */
-void
-xbridge_rrb_setup(struct xbpci_softc *xb, int odd)
-{
- uint rrb[MAX_SLOTS / 2]; /* tentative rrb assignment */
- uint total; /* rrb count */
- uint32_t proto; /* proto rrb value */
- int dev, i, j;
-
- /*
- * First, try to allocate as many RRBs per device as possible.
- */
-
- total = 0;
- for (i = 0; i < nitems(rrb); i++) {
- dev = (i << 1) + !!odd;
- if (dev >= xb->xb_nslots || SLOT_EMPTY(xb, dev))
- rrb[i] = 0;
- else {
- rrb[i] = 4; /* optimistic value */
- total += 4;
- }
- }
-
- /*
- * Then, try to reduce greed until we do not claim more than
- * the 8 RRBs we can afford.
- */
-
- if (total > 8) {
- /*
- * All devices should be able to live with 3 RRBs, so
- * reduce their allocation from 4 to 3.
- */
- for (i = 0; i < nitems(rrb); i++) {
- if (rrb[i] == 4) {
- rrb[i]--;
- if (--total == 8)
- break;
- }
- }
- }
-
- if (total > 8) {
- /*
- * There are too many devices for 3 RRBs per device to
- * be possible. Attempt to reduce from 3 to 2, except
- * for isp(4) devices.
- */
- for (i = 0; i < nitems(rrb); i++) {
- if (rrb[i] == 3) {
- dev = (i << 1) + !!odd;
- if (PCI_VENDOR(xb->xb_devices[dev].id) !=
- PCI_VENDOR_QLOGIC) {
- rrb[i]--;
- if (--total == 8)
- break;
- }
- }
- }
- }
-
- if (total > 8) {
- /*
- * Too bad, we need to shrink the RRB allocation for
- * isp devices too. We'll try to favour the lowest
- * slots, though, hence the reversed loop order.
- */
- for (i = nitems(rrb) - 1; i >= 0; i--) {
- if (rrb[i] == 3) {
- rrb[i]--;
- if (--total == 8)
- break;
- }
- }
- }
-
- /*
- * Now build the RRB register value proper.
- */
-
- proto = 0;
- for (i = 0; i < nitems(rrb); i++) {
- for (j = 0; j < rrb[i]; j++)
- proto = (proto << RRB_SHIFT) | (RRB_VALID | i);
- }
-
- xbridge_write_reg(xb, odd ? BRIDGE_RRB_ODD : BRIDGE_RRB_EVEN, proto);
-}
-
-/*
- * Configure PCI resources for all devices.
- */
-void
-xbridge_resource_setup(struct xbpci_softc *xb)
-{
- pci_chipset_tag_t pc = &xb->xb_pc;
- int dev, nfuncs;
- pcitag_t tag;
- pcireg_t id, bhlcr;
- uint32_t devio;
- int need_setup;
- uint secondary, nppb, npccbb, ppbstride;
- const struct pci_quirkdata *qd;
-
- /*
- * On Octane, we will want to map everything through the large
- * windows, whenever possible.
- *
- * Set up these mappings now.
- */
-
- if (sys_config.system_type == SGI_OCTANE) {
- xb->xb_ioex = xbridge_mapping_setup(xb, 1);
- xb->xb_memex = xbridge_mapping_setup(xb, 0);
- }
-
- /*
- * Configure all regular PCI devices.
- */
-
-#ifdef DEBUG
- for (dev = 0; dev < xb->xb_nslots; dev++)
- printf("device %d: devio %08llx\n",
- dev, xbridge_read_reg(xb, BRIDGE_DEVICE(dev)));
-#endif
- nppb = npccbb = 0;
- for (dev = 0; dev < xb->xb_nslots; dev++) {
- if (SLOT_EMPTY(xb, dev))
- continue;
-
- /*
- * Count ppb and pccbb devices, we will need their number later.
- */
-
- tag = pci_make_tag(pc, 0, dev, 0);
- bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
- if (PCI_HDRTYPE_TYPE(bhlcr) == 1)
- nppb++;
- if (PCI_HDRTYPE_TYPE(bhlcr) == 2)
- npccbb++;
-
- /*
- * We want to avoid changing mapping configuration for
- * devices which have been setup by ARCS.
- *
- * On Octane, the whole on-board I/O widget has been
- * set up, with direct mappings into widget space.
- *
- * On Origin, since direct mappings are expensive,
- * everything set up by ARCS has a valid devio
- * mapping; those can be identified as they sport the
- * widget number in the high address bits.
- *
- * We will only fix the device-global devio flags on
- * devices which have been set up by ARCS. Otherwise,
- * we'll need to perform proper PCI resource allocation.
- */
-
- id = xb->xb_devices[dev].id;
- devio = xbridge_read_reg(xb, BRIDGE_DEVICE(dev));
- if (id != PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3) &&
- id != PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC4))
- need_setup = 1;
- else
- need_setup = xb->xb_busno != 0 || xb->xb_devio_skew !=
- ((devio & BRIDGE_DEVICE_BASE_MASK) >>
- (24 - BRIDGE_DEVICE_BASE_SHIFT));
-
- /*
- * Enable byte swapping for DMA, except on IOC3, IOC4 and
- * RAD1 devices.
- */
- if (id == PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3) ||
- id == PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC4) ||
- id == PCI_ID_CODE(PCI_VENDOR_SGI, PCI_PRODUCT_SGI_RAD1))
- devio &=
- ~(BRIDGE_DEVICE_SWAP_PMU | BRIDGE_DEVICE_SWAP_DIR);
- else
- devio |=
- BRIDGE_DEVICE_SWAP_PMU | BRIDGE_DEVICE_SWAP_DIR;
-
- /*
- * Disable write gathering.
- */
- devio &=
- ~(BRIDGE_DEVICE_WGATHER_PMU | BRIDGE_DEVICE_WGATHER_DIR);
-
- /*
- * Disable prefetching - on-board isp(4) controllers on
- * Octane are set up with this, but this confuses the
- * driver.
- */
- devio &= ~BRIDGE_DEVICE_PREFETCH;
-
- /*
- * Force cache coherency.
- */
- devio |= BRIDGE_DEVICE_COHERENT;
-
- if (need_setup == 0) {
- xbridge_set_devio(xb, dev, devio, 1);
- continue;
- }
-
- /*
- * Clear any residual devio mapping.
- */
- devio &= ~BRIDGE_DEVICE_BASE_MASK;
- devio &= ~BRIDGE_DEVICE_IO_MEM;
- xbridge_set_devio(xb, dev, devio, 0);
-
- /*
- * We now need to perform the resource allocation for this
- * device, which has not been setup by ARCS.
- */
-
- qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
- if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
- (qd != NULL && (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
- nfuncs = 8;
- else
- nfuncs = 1;
-
- xbridge_device_setup(xb, dev, nfuncs, devio);
- }
-
- /*
- * Configure PCI-PCI and PCI-CardBus bridges, if any.
- *
- * We do this after all the other PCI devices have been configured
- * in order to favour them during resource allocation.
- */
-
- if (npccbb != 0) {
- /*
- * If there are PCI-CardBus bridges, we really want to be
- * able to have large resource spaces...
- */
- if (xb->xb_ioex == NULL)
- xb->xb_ioex = xbridge_mapping_setup(xb, 1);
- if (xb->xb_memex == NULL)
- xb->xb_memex = xbridge_mapping_setup(xb, 0);
- }
-
- secondary = 1;
- ppbstride = nppb == 0 ? 0 : (255 - npccbb) / nppb;
- for (dev = 0; dev < xb->xb_nslots; dev++) {
- if (SLOT_EMPTY(xb, dev))
- continue;
-
- tag = pci_make_tag(pc, 0, dev, 0);
- bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
-
- switch (PCI_HDRTYPE_TYPE(bhlcr)) {
- case 1: /* PCI-PCI bridge */
- ppb_initialize(pc, tag, 0, secondary,
- secondary + ppbstride - 1);
- secondary += ppbstride;
- break;
- case 2: /* PCI-CardBus bridge */
- /*
- * We do not expect cardbus devices to sport
- * PCI-PCI bridges themselves, so only one
- * PCI bus will do.
- */
- pccbb_initialize(pc, tag, 0, secondary, secondary);
- secondary++;
- break;
- }
- }
-
- if (xb->xb_ioex != NULL) {
- extent_destroy(xb->xb_ioex);
- xb->xb_ioex = NULL;
- }
- if (xb->xb_memex != NULL) {
- extent_destroy(xb->xb_memex);
- xb->xb_memex = NULL;
- }
-}
-
-/*
- * Make the Octane flash area unavailable in the PCI space extents, so
- * that we do not try to map devices in its area.
- */
-int
-xbridge_extent_chomp(struct xbpci_softc *xb, struct extent *ex)
-{
-#ifdef TGT_OCTANE
- /*
- * On Octane, the boot PROM is part of the onboard IOC3
- * device, and is accessible through the PCI memory space
- * (and maybe through the PCI I/O space as well).
- *
- * To avoid undebuggable surprises, make sure we never use
- * this space.
- */
- if (sys_config.system_type == SGI_OCTANE &&
- xb->xb_widget == IP30_BRIDGE_WIDGET) {
- u_long fmin, fmax;
-
- /*
- * This relies upon the knowledge that both flash bases
- * are contiguous, to perform only one extent operation.
- * I don't think we need to be pedantic to the point of
- * doing this in two steps, really -- miod
- */
- fmin = max(IP30_FLASH_BASE, ex->ex_start);
- fmax = min(IP30_FLASH_ALT + IP30_FLASH_SIZE - 1, ex->ex_end);
- if (fmax >= fmin)
- return extent_alloc_region(ex, fmin, fmax + 1 - fmin,
- EX_NOWAIT | EX_MALLOCOK);
- }
-#endif
-
- return 0;
-}
-
-/*
- * Build resource extents for the MI PCI code to play with.
- * These extents cover the configured devio areas, and the large resource
- * views, if applicable.
- */
-void
-xbridge_extent_setup(struct xbpci_softc *xb)
-{
- int dev;
- int errors;
- bus_addr_t start, end;
- uint32_t devio;
-
- snprintf(xb->xb_ioexname, sizeof(xb->xb_ioexname), "%s_io",
- DEVNAME(xb));
- xb->xb_ioex = extent_create(xb->xb_ioexname, 0, 0xffffffff,
- M_DEVBUF, NULL, 0, EX_NOWAIT | EX_FILLED);
-
- if (xb->xb_ioex != NULL) {
- errors = 0;
- /* make all configured devio ranges available... */
- for (dev = 0; dev < xb->xb_nslots; dev++) {
- devio = xb->xb_devices[dev].devio;
- if (devio == 0 || ISSET(devio, BRIDGE_DEVICE_IO_MEM))
- continue;
- start = (devio & BRIDGE_DEVICE_BASE_MASK) <<
- BRIDGE_DEVICE_BASE_SHIFT;
- if (start == 0)
- continue;
- if (extent_free(xb->xb_ioex, start,
- BRIDGE_DEVIO_SIZE(dev), EX_NOWAIT) != 0) {
- errors++;
- break;
- }
- }
- /* ...as well as the large views, if any */
- if (xb->xb_ioend != 0) {
- start = xb->xb_iostart;
- if (start == 0)
- start = 1;
- end = xb->xb_devio_skew << 24;
- if (start < end)
- if (extent_free(xb->xb_ioex, start,
- end, EX_NOWAIT) != 0)
- errors++;
-
- start = (xb->xb_devio_skew + 1) << 24;
- if (start < xb->xb_iostart)
- start = xb->xb_iostart;
- if (extent_free(xb->xb_ioex, start,
- xb->xb_ioend + 1 - start, EX_NOWAIT) != 0)
- errors++;
- }
-
- if (xbridge_extent_chomp(xb, xb->xb_ioex) != 0)
- errors++;
-
- if (errors != 0) {
- extent_destroy(xb->xb_ioex);
- xb->xb_ioex = NULL;
- }
- }
-
- snprintf(xb->xb_memexname, sizeof(xb->xb_memexname), "%s_mem",
- DEVNAME(xb));
- xb->xb_memex = extent_create(xb->xb_memexname, 0, 0xffffffff,
- M_DEVBUF, NULL, 0, EX_NOWAIT | EX_FILLED);
-
- if (xb->xb_memex != NULL) {
- errors = 0;
- /* make all configured devio ranges available... */
- for (dev = 0; dev < xb->xb_nslots; dev++) {
- devio = xb->xb_devices[dev].devio;
- if (devio == 0 || !ISSET(devio, BRIDGE_DEVICE_IO_MEM))
- continue;
- start = (devio & BRIDGE_DEVICE_BASE_MASK) <<
- BRIDGE_DEVICE_BASE_SHIFT;
- if (start == 0)
- continue;
- if (extent_free(xb->xb_memex, start,
- BRIDGE_DEVIO_SIZE(dev), EX_NOWAIT) != 0) {
- errors++;
- break;
- }
- }
- /* ...as well as the large views, if any */
- if (xb->xb_memend != 0) {
- start = xb->xb_memstart;
- if (start == 0)
- start = 1;
- end = xb->xb_devio_skew << 24;
- if (start < end)
- if (extent_free(xb->xb_memex, start,
- end, EX_NOWAIT) != 0)
- errors++;
-
- start = (xb->xb_devio_skew + 1) << 24;
- if (start < xb->xb_memstart)
- start = xb->xb_memstart;
- if (extent_free(xb->xb_memex, start,
- xb->xb_memend + 1 - start, EX_NOWAIT) != 0)
- errors++;
- }
-
- if (xbridge_extent_chomp(xb, xb->xb_memex) != 0)
- errors++;
-
- if (errors != 0) {
- extent_destroy(xb->xb_memex);
- xb->xb_memex = NULL;
- }
- }
-}
-
-struct extent *
-xbridge_mapping_setup(struct xbpci_softc *xb, int io)
-{
- bus_addr_t membase, offs;
- bus_size_t len;
- paddr_t base;
- u_long start, end;
- struct extent *ex = NULL;
-
- if (io) {
- /*
- * I/O mappings are available in the widget at offset
- * BRIDGE_PCI_IO_SPACE_BASE onwards, but weren't working
- * correctly until Bridge revision 4 (apparently, what
- * didn't work was the byteswap logic).
- *
- * Also, this direct I/O space is not supported on PIC
- * widgets.
- */
-
- if (!ISSET(xb->xb_flags, XF_NO_DIRECT_IO)) {
- offs = BRIDGE_PCI_IO_SPACE_BASE;
- len = BRIDGE_PCI_IO_SPACE_LENGTH;
- base = xbow_widget_map_space(xb->xb_bow,
- xb->xb_widget, &offs, &len);
- } else
- base = 0;
-
- if (base != 0) {
- if (offs + len > BRIDGE_PCI_IO_SPACE_BASE +
- BRIDGE_PCI_IO_SPACE_LENGTH)
- len = BRIDGE_PCI_IO_SPACE_BASE +
- BRIDGE_PCI_IO_SPACE_LENGTH - offs;
-
-#ifdef DEBUG
- printf("direct io %#lx-%#lx base %#lx\n",
- offs, offs + len - 1, base);
-#endif
- offs -= BRIDGE_PCI_IO_SPACE_BASE;
-
- ex = extent_create("xbridge_direct_io",
- offs == 0 ? 1 : offs, offs + len - 1,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
-
- /*
- * Note that we do not need to invoke
- * xbridge_extent_chomp() here since we will
- * reserve the whole devio area.
- */
-
- if (ex != NULL) {
- xb->xb_io_bus_space->bus_base = base - offs;
- xb->xb_io_bus_space->_space_map =
- xbridge_space_map_io;
- xb->xb_io_bus_space->_space_subregion =
- xbridge_space_region_io;
-
- xb->xb_io_bus_space_sw->bus_base = base - offs;
- xb->xb_io_bus_space_sw->_space_map =
- xbridge_space_map_io;
- xb->xb_io_bus_space_sw->_space_subregion =
- xbridge_space_region_io;
-
- xb->xb_iostart = offs;
- xb->xb_ioend = offs + len - 1;
- }
- }
- } else {
- /*
- * Memory mappings are available in the widget at offset
- * BRIDGE_PCI#_MEM_SPACE_BASE onwards.
- */
-
- membase = xb->xb_busno == 0 ? BRIDGE_PCI0_MEM_SPACE_BASE :
- BRIDGE_PCI1_MEM_SPACE_BASE;
- offs = membase;
- len = BRIDGE_PCI_MEM_SPACE_LENGTH;
- base = xbow_widget_map_space(xb->xb_bow,
- xb->xb_widget, &offs, &len);
-
- if (base != 0) {
- /*
- * Only the low 30 bits of memory BAR are honoured
- * by the hardware, thus restricting memory mappings
- * to 1GB.
- */
- if (offs + len > membase + BRIDGE_PCI_MEM_SPACE_LENGTH)
- len = membase + BRIDGE_PCI_MEM_SPACE_LENGTH -
- offs;
-
-#ifdef DEBUG
- printf("direct mem %#lx-%#lx base %#lx\n",
- offs, offs + len - 1, base);
-#endif
- offs -= membase;
-
- ex = extent_create("xbridge_direct_mem",
- offs == 0 ? 1 : offs, offs + len - 1,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
-
- /*
- * Note that we do not need to invoke
- * xbridge_extent_chomp() here since we will
- * reserve the whole devio area.
- */
-
- if (ex != NULL) {
- xb->xb_mem_bus_space->bus_base = base - offs;
- xb->xb_mem_bus_space->_space_map =
- xbridge_space_map_mem;
- xb->xb_mem_bus_space->_space_subregion =
- xbridge_space_region_mem;
-
- xb->xb_mem_bus_space_sw->bus_base = base - offs;
- xb->xb_mem_bus_space_sw->_space_map =
- xbridge_space_map_mem;
- xb->xb_mem_bus_space_sw->_space_subregion =
- xbridge_space_region_mem;
-
- xb->xb_memstart = offs;
- xb->xb_memend = offs + len - 1;
- }
- }
- }
-
- if (ex != NULL) {
- /*
- * Remove the devio mapping range from the extent
- * to avoid ambiguous mappings.
- *
- * Note that xbow_widget_map_space() may have returned
- * a range in which the devio area does not appear.
- */
- start = xb->xb_devio_skew << 24;
- end = (xb->xb_devio_skew + 1) << 24;
-
- if (end >= ex->ex_start && start <= ex->ex_end) {
- if (start < ex->ex_start)
- start = ex->ex_start;
- if (end > ex->ex_end + 1)
- end = ex->ex_end + 1;
- if (extent_alloc_region(ex, start, end - start,
- EX_NOWAIT | EX_MALLOCOK) != 0) {
- printf("%s: failed to expurge devio range"
- " from %s large extent\n",
- DEVNAME(xb), io ? "i/o" : "mem");
- extent_destroy(ex);
- ex = NULL;
- }
- }
- }
-
- return ex;
-}
-
-/*
- * Flags returned by xbridge_resource_explore()
- */
-#define XR_IO 0x01 /* needs I/O mappings */
-#define XR_MEM 0x02 /* needs memory mappings */
-#define XR_IO_OFLOW_S 0x04 /* can't fit I/O in a short devio */
-#define XR_MEM_OFLOW_S 0x08 /* can't fit memory in a short devio */
-#define XR_IO_OFLOW 0x10 /* can't fit I/O in a large devio */
-#define XR_MEM_OFLOW 0x20 /* can't fit memory in a large devio */
-
-int
-xbridge_resource_explore(struct xbpci_softc *xb, pcitag_t tag,
- struct extent *ioex, struct extent *memex)
-{
- pci_chipset_tag_t pc = &xb->xb_pc;
- pcireg_t bhlc, type, addr, mask;
- bus_addr_t base;
- bus_size_t size;
- int reg, reg_start, reg_end, reg_rom;
- int rc = 0;
-
- bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
- switch (PCI_HDRTYPE_TYPE(bhlc)) {
- case 0:
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_END;
- reg_rom = PCI_ROM_REG;
- break;
- case 1: /* PCI-PCI bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PPB_END;
- reg_rom = 0; /* 0x38 */
- break;
- case 2: /* PCI-CardBus bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PCB_END;
- reg_rom = 0;
- break;
- default:
- return rc;
- }
-
- for (reg = reg_start; reg < reg_end; reg += 4) {
- if (pci_mapreg_probe(pc, tag, reg, &type) == 0)
- continue;
-
- if (pci_mapreg_info(pc, tag, reg, type, NULL, &size, NULL))
- continue;
-
- switch (type) {
- case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
- reg += 4;
- /* FALLTHROUGH */
- case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
- rc |= XR_MEM;
- if (memex != NULL) {
- if (size > memex->ex_end - memex->ex_start)
- rc |= XR_MEM_OFLOW | XR_MEM_OFLOW_S;
- else if (extent_alloc(memex, size, size,
- 0, 0, 0, &base) != 0)
- rc |= XR_MEM_OFLOW | XR_MEM_OFLOW_S;
- else if (base >= BRIDGE_DEVIO_SHORT)
- rc |= XR_MEM_OFLOW_S;
- } else
- rc |= XR_MEM_OFLOW | XR_MEM_OFLOW_S;
- break;
- case PCI_MAPREG_TYPE_IO:
- rc |= XR_IO;
- if (ioex != NULL) {
- if (size > ioex->ex_end - ioex->ex_start)
- rc |= XR_IO_OFLOW | XR_IO_OFLOW_S;
- else if (extent_alloc(ioex, size, size,
- 0, 0, 0, &base) != 0)
- rc |= XR_IO_OFLOW | XR_IO_OFLOW_S;
- else if (base >= BRIDGE_DEVIO_SHORT)
- rc |= XR_IO_OFLOW_S;
- } else
- rc |= XR_IO_OFLOW | XR_IO_OFLOW_S;
- break;
- }
- }
-
- if (reg_rom != 0) {
- addr = pci_conf_read(pc, tag, reg_rom);
- pci_conf_write(pc, tag, reg_rom, ~PCI_ROM_ENABLE);
- mask = pci_conf_read(pc, tag, reg_rom);
- pci_conf_write(pc, tag, reg_rom, addr);
- size = PCI_ROM_SIZE(mask);
-
- if (size != 0) {
- rc |= XR_MEM;
- if (memex != NULL) {
- if (size > memex->ex_end - memex->ex_start)
- rc |= XR_MEM_OFLOW | XR_MEM_OFLOW_S;
- else if (extent_alloc(memex, size, size,
- 0, 0, 0, &base) != 0)
- rc |= XR_MEM_OFLOW | XR_MEM_OFLOW_S;
- else if (base >= BRIDGE_DEVIO_SHORT)
- rc |= XR_MEM_OFLOW_S;
- } else
- rc |= XR_MEM_OFLOW | XR_MEM_OFLOW_S;
- }
- }
-
- return rc;
-}
-
-void
-xbridge_resource_manage(struct xbpci_softc *xb, pcitag_t tag,
- struct extent *ioex, struct extent *memex)
-{
- pci_chipset_tag_t pc = &xb->xb_pc;
- pcireg_t bhlc, type, mask;
- bus_addr_t base;
- bus_size_t size;
- int reg, reg_start, reg_end, reg_rom;
-
- bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
- switch (PCI_HDRTYPE_TYPE(bhlc)) {
- case 0:
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_END;
- reg_rom = PCI_ROM_REG;
- break;
- case 1: /* PCI-PCI bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PPB_END;
- reg_rom = 0; /* 0x38 */
- break;
- case 2: /* PCI-CardBus bridge */
- reg_start = PCI_MAPREG_START;
- reg_end = PCI_MAPREG_PCB_END;
- reg_rom = 0;
- break;
- default:
- return;
- }
-
- for (reg = reg_start; reg < reg_end; reg += 4) {
- if (pci_mapreg_probe(pc, tag, reg, &type) == 0)
- continue;
-
- if (pci_mapreg_info(pc, tag, reg, type, &base, &size, NULL))
- continue;
-
- /*
- * Note that we do not care about the existing BAR values,
- * since these devices either have not been setup by ARCS
- * or do not matter for early system setup (such as
- * optional IOC3 PCI boards, which will get setup by
- * ARCS but can be reinitialized as we see fit).
- */
-#ifdef DEBUG
- printf("tag %04lx bar %02x type %d base %#lx size %#lx",
- tag, reg, type, base, size);
-#endif
- switch (type) {
- case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
- /*
- * Since our mapping ranges are restricted to
- * at most 30 bits, the upper part of the 64 bit
- * BAR registers is always zero.
- */
- pci_conf_write(pc, tag, reg + 4, 0);
- /* FALLTHROUGH */
- case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
- if (memex != NULL) {
- if (extent_alloc(memex, size, size, 0, 0, 0,
- &base) != 0)
- base = 0;
- } else
- base = 0;
- break;
- case PCI_MAPREG_TYPE_IO:
- if (ioex != NULL) {
- if (extent_alloc(ioex, size, size, 0, 0, 0,
- &base) != 0)
- base = 0;
- } else
- base = 0;
- break;
- }
-
-#ifdef DEBUG
- printf(" setup at %#lx\n", base);
-#endif
- pci_conf_write(pc, tag, reg, base);
-
- if (type == (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT))
- reg += 4;
- }
-
- if (reg_rom != 0) {
- base = (bus_addr_t)pci_conf_read(pc, tag, reg_rom);
- pci_conf_write(pc, tag, reg_rom, ~PCI_ROM_ENABLE);
- mask = pci_conf_read(pc, tag, reg_rom);
- size = PCI_ROM_SIZE(mask);
-
- if (size != 0) {
-#ifdef DEBUG
- printf("bar %02x type rom base %#lx size %#lx",
- reg_rom, base, size);
-#endif
- if (memex != NULL) {
- if (extent_alloc(memex, size, size, 0, 0, 0,
- &base) != 0)
- base = 0;
- } else
- base = 0;
-#ifdef DEBUG
- printf(" setup at %#lx\n", base);
-#endif
- } else
- base = 0;
-
- /* ROM intentionally left disabled */
- pci_conf_write(pc, tag, reg_rom, base);
- }
-}
-
-void
-xbridge_device_setup(struct xbpci_softc *xb, int dev, int nfuncs,
- uint32_t devio)
-{
- pci_chipset_tag_t pc = &xb->xb_pc;
- int function;
- pcitag_t tag;
- pcireg_t id, csr;
- uint32_t baseio;
- int resources;
- int io_devio, mem_devio;
- struct extent *ioex, *memex;
-
- /*
- * In a first step, we enumerate all the requested resources,
- * and check if they could fit within devio mappings.
- *
- * If devio can't afford us the mappings we need, we'll
- * try and allocate a large window.
- */
-
- /*
- * Allocate extents to use for devio mappings if necessary.
- * This can fail; in that case we'll try to use a large mapping
- * whenever possible, or silently fail to configure the device.
- */
- if (xb->xb_ioex != NULL)
- ioex = NULL;
- else {
- ioex = extent_create("xbridge_io",
- 0, BRIDGE_DEVIO_LARGE - 1,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
-#ifdef DEBUG
- if (ioex == NULL)
- printf("%s: ioex extent_create failed\n", __func__);
-#endif
- }
- if (xb->xb_memex != NULL)
- memex = NULL;
- else {
- memex = extent_create("xbridge_mem",
- 0, BRIDGE_DEVIO_LARGE - 1,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
-#ifdef DEBUG
- if (memex == NULL)
- printf("%s: memex extent_create failed\n", __func__);
-#endif
- }
-
- resources = 0;
- for (function = 0; function < nfuncs; function++) {
- tag = pci_make_tag(pc, 0, dev, function);
- id = pci_conf_read(pc, tag, PCI_ID_REG);
-
- if (PCI_VENDOR(id) == PCI_VENDOR_INVALID ||
- PCI_VENDOR(id) == 0)
- continue;
-
- csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
- pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr &
- ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE));
-
- resources |= xbridge_resource_explore(xb, tag, ioex, memex);
- }
-#ifdef DEBUG
- printf("resources mask: %02x\n", resources);
-#endif
-
- if (memex != NULL) {
- extent_destroy(memex);
- memex = NULL;
- }
- if (ioex != NULL) {
- extent_destroy(ioex);
- ioex = NULL;
- }
-
- /*
- * In a second step, if resources can be mapped using devio slots,
- * allocate them. Otherwise, or if we can't get a devio slot
- * big enough for the resources we need to map, we'll need
- * to get a large window mapping.
- *
- * Note that, on Octane, we try to avoid using devio whenever
- * possible.
- */
-
- io_devio = -1;
- if (ISSET(resources, XR_IO)) {
- if (!ISSET(resources, XR_IO_OFLOW) &&
- (sys_config.system_type != SGI_OCTANE ||
- xb->xb_ioex == NULL))
- io_devio = xbridge_allocate_devio(xb, dev,
- ISSET(resources, XR_IO_OFLOW_S));
- if (io_devio >= 0) {
- baseio = (xb->xb_devio_skew << 24) |
- PIC_DEVIO_OFFS(xb->xb_busno, io_devio);
- xbridge_set_devio(xb, io_devio, devio |
- (baseio >> BRIDGE_DEVICE_BASE_SHIFT), 1);
-
- ioex = extent_create("xbridge_io", baseio,
- baseio + BRIDGE_DEVIO_SIZE(io_devio) - 1,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
- } else {
- /*
- * Try to get a large window mapping if we don't
- * have one already.
- */
- if (xb->xb_ioex == NULL)
- xb->xb_ioex = xbridge_mapping_setup(xb, 1);
- }
- }
-
- mem_devio = -1;
- if (ISSET(resources, XR_MEM)) {
- if (!ISSET(resources, XR_MEM_OFLOW) &&
- sys_config.system_type != SGI_OCTANE)
- mem_devio = xbridge_allocate_devio(xb, dev,
- ISSET(resources, XR_MEM_OFLOW_S));
- if (mem_devio >= 0) {
- baseio = (xb->xb_devio_skew << 24) |
- PIC_DEVIO_OFFS(xb->xb_busno, mem_devio);
- xbridge_set_devio(xb, mem_devio, devio |
- BRIDGE_DEVICE_IO_MEM |
- (baseio >> BRIDGE_DEVICE_BASE_SHIFT), 1);
-
- memex = extent_create("xbridge_mem", baseio,
- baseio + BRIDGE_DEVIO_SIZE(mem_devio) - 1,
- M_DEVBUF, NULL, 0, EX_NOWAIT);
- } else {
- /*
- * Try to get a large window mapping if we don't
- * have one already.
- */
- if (xb->xb_memex == NULL)
- xb->xb_memex = xbridge_mapping_setup(xb, 0);
- }
- }
-
- /*
- * Finally allocate the resources proper and update the
- * device BARs accordingly.
- */
-
- for (function = 0; function < nfuncs; function++) {
- tag = pci_make_tag(pc, 0, dev, function);
- id = pci_conf_read(pc, tag, PCI_ID_REG);
-
- if (PCI_VENDOR(id) == PCI_VENDOR_INVALID ||
- PCI_VENDOR(id) == 0)
- continue;
-
- xbridge_resource_manage(xb, tag,
- ioex != NULL ? ioex : xb->xb_ioex,
- memex != NULL ? memex : xb->xb_memex);
- }
-
- if (memex != NULL)
- extent_destroy(memex);
- if (ioex != NULL)
- extent_destroy(ioex);
-}
-
-int
-xbridge_ppb_setup(void *cookie, pcitag_t tag, bus_addr_t *iostart,
- bus_addr_t *ioend, bus_addr_t *memstart, bus_addr_t *memend)
-{
- struct xbpci_softc *xb = cookie;
- pci_chipset_tag_t pc = &xb->xb_pc;
- uint32_t base, devio;
- bus_size_t exsize;
- u_long exstart;
- int dev, devio_idx, tries;
-
- pci_decompose_tag(pc, tag, NULL, &dev, NULL);
- devio = xbridge_read_reg(xb, BRIDGE_DEVICE(dev));
-
- /*
- * Since our caller computes resource needs starting at zero, we
- * can ignore the start values when computing the amount of
- * resources we'll need.
- */
-
- /*
- * Try and allocate I/O resources first, as we may not be able
- * to use a large I/O mapping, in which case we want to use our
- * reserved devio for this purpose.
- */
-
- exsize = *ioend;
- *iostart = 0xffffffff;
- *ioend = 0;
- if (exsize++ != 0) {
- /* try to allocate through a devio slot whenever possible... */
- if (exsize < BRIDGE_DEVIO_SHORT)
- devio_idx = xbridge_allocate_devio(xb, dev, 0);
- else if (exsize < BRIDGE_DEVIO_LARGE)
- devio_idx = xbridge_allocate_devio(xb, dev, 1);
- else
- devio_idx = -1;
-
- /* ...if it fails, try the large view.... */
- if (devio_idx < 0 && xb->xb_ioex == NULL)
- xb->xb_ioex = xbridge_mapping_setup(xb, 1);
-
- /* ...if it is not available, try to get a devio slot anyway. */
- if (devio_idx < 0 && xb->xb_ioex == NULL) {
- if (exsize > BRIDGE_DEVIO_SHORT)
- devio_idx = xbridge_allocate_devio(xb, dev, 1);
- if (devio_idx < 0)
- devio_idx = xbridge_allocate_devio(xb, dev, 0);
- }
-
- if (devio_idx >= 0) {
- base = (xb->xb_devio_skew << 24) |
- PIC_DEVIO_OFFS(xb->xb_busno, devio_idx);
- xbridge_set_devio(xb, devio_idx, devio |
- (base >> BRIDGE_DEVICE_BASE_SHIFT), 1);
- *iostart = base;
- *ioend = base + BRIDGE_DEVIO_SIZE(devio_idx) - 1;
- } else if (xb->xb_ioex != NULL) {
- /*
- * We know that the direct I/O resource range fits
- * within the 32 bit address space, so our allocation,
- * if successful, will work as a 32 bit i/o range.
- */
- if (exsize < 1UL << 12)
- exsize = 1UL << 12;
- for (tries = 0; tries < 5; tries++) {
- if (extent_alloc(xb->xb_ioex, exsize,
- 1UL << 12, 0, 0, EX_NOWAIT | EX_MALLOCOK,
- &exstart) == 0) {
- *iostart = exstart;
- *ioend = exstart + exsize - 1;
- break;
- }
- exsize >>= 1;
- if (exsize < 1UL << 12)
- break;
- }
- }
- }
-
- exsize = *memend;
- *memstart = 0xffffffff;
- *memend = 0;
- if (exsize++ != 0) {
- /* try to allocate through a devio slot whenever possible... */
- if (exsize < BRIDGE_DEVIO_SHORT)
- devio_idx = xbridge_allocate_devio(xb, dev, 0);
- else if (exsize < BRIDGE_DEVIO_LARGE)
- devio_idx = xbridge_allocate_devio(xb, dev, 1);
- else
- devio_idx = -1;
-
- /* ...if it fails, try the large view.... */
- if (devio_idx < 0 && xb->xb_memex == NULL)
- xb->xb_memex = xbridge_mapping_setup(xb, 0);
-
- /* ...if it is not available, try to get a devio slot anyway. */
- if (devio_idx < 0 && xb->xb_memex == NULL) {
- if (exsize > BRIDGE_DEVIO_SHORT)
- devio_idx = xbridge_allocate_devio(xb, dev, 1);
- if (devio_idx < 0)
- devio_idx = xbridge_allocate_devio(xb, dev, 0);
- }
-
- if (devio_idx >= 0) {
- base = (xb->xb_devio_skew << 24) |
- PIC_DEVIO_OFFS(xb->xb_busno, devio_idx);
- xbridge_set_devio(xb, devio_idx, devio |
- BRIDGE_DEVICE_IO_MEM |
- (base >> BRIDGE_DEVICE_BASE_SHIFT), 1);
- *memstart = base;
- *memend = base + BRIDGE_DEVIO_SIZE(devio_idx) - 1;
- } else if (xb->xb_memex != NULL) {
- /*
- * We know that the direct memory resource range fits
- * within the 32 bit address space, and is limited to
- * 30 bits, so our allocation, if successful, will
- * work as a 32 bit memory range.
- */
- if (exsize < 1UL << 20)
- exsize = 1UL << 20;
- for (tries = 0; tries < 5; tries++) {
- if (extent_alloc(xb->xb_memex, exsize,
- 1UL << 20, 0, 0, EX_NOWAIT | EX_MALLOCOK,
- &exstart) == 0) {
- *memstart = exstart;
- *memend = exstart + exsize - 1;
- break;
- }
- exsize >>= 1;
- if (exsize < 1UL << 20)
- break;
- }
- }
- }
-
- return 0;
-}
-
-#if NCARDBUS > 0
-
-static struct rb_md_fnptr xbridge_rb_md_fn = {
- xbridge_rbus_space_map,
- xbridge_rbus_space_unmap
-};
-
-int
-xbridge_rbus_space_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
- int flags, bus_space_handle_t *bshp)
-{
- return bus_space_map(t, addr, size, flags, bshp);
-}
-
-void
-xbridge_rbus_space_unmap(bus_space_tag_t t, bus_space_handle_t h,
- bus_size_t size, bus_addr_t *addrp)
-{
- bus_space_unmap(t, h, size);
- *addrp = h - t->bus_base;
-}
-
-void *
-xbridge_rbus_parent_io(struct pci_attach_args *pa)
-{
- struct extent *ex = pa->pa_ioex;
- bus_addr_t start, end;
- rbus_tag_t rb = NULL;
-
- /*
- * We want to force I/O mappings to lie in the low 16 bits
- * area. This is mandatory for 16-bit pcmcia devices; and
- * although 32-bit cardbus devices could use a larger range,
- * the pccbb driver doesn't enable the large I/O windows.
- */
- if (ex != NULL) {
- start = 0;
- end = 0x10000;
- if (start < ex->ex_start)
- start = ex->ex_start;
- if (end > ex->ex_end)
- end = ex->ex_end;
-
- if (start < end) {
- rb = rbus_new_root_share(pa->pa_iot, ex,
- start, end - start);
- if (rb != NULL)
- rb->rb_md = &xbridge_rb_md_fn;
- }
- }
-
- /*
- * We are not allowed to return NULL. If we can't provide
- * resources, return a valid body which will fail requests.
- */
- if (rb == NULL)
- rb = rbus_new_body(pa->pa_iot, NULL, 0, 0, RBUS_SPACE_INVALID);
-
- return rb;
-}
-
-void *
-xbridge_rbus_parent_mem(struct pci_attach_args *pa)
-{
- struct xbpci_softc *xb = pa->pa_pc->pc_conf_v;
- struct extent *ex = pa->pa_memex;
- bus_addr_t start;
- rbus_tag_t rb = NULL;
-
- /*
- * There is no restriction for the memory mappings,
- * however we need to make sure these won't hit the
- * devio range (for md_space_unmap to work correctly).
- */
- if (ex != NULL) {
- start = (xb->xb_devio_skew + 1) << 24;
- if (start < ex->ex_start)
- start = ex->ex_start;
-
- if (start < ex->ex_end) {
- rb = rbus_new_root_share(pa->pa_memt, ex,
- start, ex->ex_end - start);
- if (rb != NULL)
- rb->rb_md = &xbridge_rb_md_fn;
- }
- }
-
- /*
- * We are not allowed to return NULL. If we can't provide
- * resources, return a valid body which will fail requests.
- */
- if (rb == NULL)
- rb = rbus_new_body(pa->pa_iot, NULL, 0, 0, RBUS_SPACE_INVALID);
-
- return rb;
-}
-
-#endif /* NCARDBUS > 0 */
-
-int
-xbridge_allocate_devio(struct xbpci_softc *xb, int dev, int wantlarge)
-{
-#ifdef DEBUG
- int orig_dev = dev;
-#endif
-
- /*
- * If the preferred slot is available and matches the size requested,
- * use it.
- */
-
- if (!ISSET(xb->xb_devio_usemask, 1 << dev)) {
- if (BRIDGE_DEVIO_SIZE(dev) >=
- (wantlarge ? BRIDGE_DEVIO_LARGE : BRIDGE_DEVIO_SHORT)) {
-#ifdef DEBUG
- printf("%s(%d,%d): using reserved entry\n",
- __func__, dev, wantlarge);
-#endif
- return dev;
- }
- }
-
- /*
- * Otherwise pick the smallest available devio matching our size
- * request.
- */
-
- for (dev = 0; dev < xb->xb_nslots; dev++) {
- if (ISSET(xb->xb_devio_usemask, 1 << dev))
- continue; /* devio in use */
-
- if (!SLOT_EMPTY(xb, dev))
- continue; /* devio to be used soon */
-
- if (BRIDGE_DEVIO_SIZE(dev) >=
- (wantlarge ? BRIDGE_DEVIO_LARGE : BRIDGE_DEVIO_SHORT)) {
-#ifdef DEBUG
- printf("%s(%d,%d): using unused entry %d\n",
- __func__, orig_dev, wantlarge, dev);
-#endif
- return dev;
- }
- }
-
-#ifdef DEBUG
- printf("%s(%d,%d): no entry available\n",
- __func__, orig_dev, wantlarge);
-#endif
- return -1;
-}
-
-void
-xbridge_set_devio(struct xbpci_softc *xb, int dev, uint32_t devio, int final)
-{
- xbridge_write_reg(xb, BRIDGE_DEVICE(dev), devio);
- (void)xbridge_read_reg(xb, WIDGET_TFLUSH);
- xb->xb_devices[dev].devio = devio;
- if (final)
- SET(xb->xb_devio_usemask, 1 << dev);
-#ifdef DEBUG
- printf("device %d: new %sdevio %08x\n",
- dev, final ? "final " : "", devio);
-#endif
-}
-
-#ifdef DDB
-void xbridge_ddb(void);
-void
-xbridge_ddb()
-{
- struct xbpci_softc *xb;
- unsigned int n, intrbit;
-
- for (n = 0; n < xbpci_cd.cd_ndevs; n++) {
- xb = xbpci_cd.cd_devs[n];
- if (xb == NULL)
- continue;
-
- printf("%s: ISR %p IER %p xb_ier %p\n",
- xb->xb_dev.dv_xname,
- (void *)xbridge_read_reg(xb, BRIDGE_ISR),
- (void *)xbridge_read_reg(xb, BRIDGE_IER),
- (void *)xb->xb_ier);
-
- printf("mode %p dev %p\n",
- (void *)xbridge_read_reg(xb, BRIDGE_INT_MODE),
- (void *)xbridge_read_reg(xb, BRIDGE_INT_DEV));
-
- for (intrbit = 0; intrbit < 8; intrbit++)
- printf("IRQ%u to %p\n", intrbit,
- (void *)xbridge_read_reg(xb,
- BRIDGE_INT_ADDR(intrbit)));
-
- printf("%s: PCICFG %08llx ERR %08llx:%08llx\n",
- xb->xb_dev.dv_xname,
- xbridge_read_reg(xb, BRIDGE_PCI_CFG),
- xbridge_read_reg(xb, BRIDGE_PCI_ERR_UPPER),
- xbridge_read_reg(xb, BRIDGE_PCI_ERR_LOWER));
- }
-}
-#endif
+++ /dev/null
-/* $OpenBSD: xbridgereg.h,v 1.16 2021/03/11 11:17:00 jsg Exp $ */
-
-/*
- * Copyright (c) 2008, 2009 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * IP27/IP30/IP35 Bridge and XBridge Registers
- * IP35 PIC Registers
- */
-
-#define BRIDGE_REGISTERS_SIZE 0x00030000
-#define BRIDGE_BUS_OFFSET 0x00800000
-
-#define BRIDGE_NBUSES 1
-#define PIC_NBUSES 2
-
-#define BRIDGE_NSLOTS 8
-#define PIC_NSLOTS 4
-#define MAX_SLOTS BRIDGE_NSLOTS
-
-#define BRIDGE_NINTRS 8
-
-#define PIC_WIDGET_STATUS_PCIX_SPEED_MASK 0x0000000c00000000UL
-#define PIC_WIDGET_STATUS_PCIX_SPEED_SHIFT 34
-#define PIC_WIDGET_STATUS_PCIX_MODE 0x0000000200000000UL
-
-#define PIC_WIDGET_CONTROL_NO_SNOOP 0x4000000000000000UL
-#define PIC_WIDGET_CONTROL_RELAX_ORDER 0x2000000000000000UL
-#define BRIDGE_WIDGET_CONTROL_IO_SWAP 0x00800000
-#define BRIDGE_WIDGET_CONTROL_MEM_SWAP 0x00400000
-#define BRIDGE_WIDGET_CONTROL_LARGE_PAGES 0x00200000
-#define BRIDGE_WIDGET_CONTROL_SPEED_MASK 0x00000030
-#define BRIDGE_WIDGET_CONTROL_SPEED_SHIFT 4
-
-/* Response Buffer Address */
-#define BRIDGE_WIDGET_RESP_UPPER 0x00000060
-#define BRIDGE_WIDGET_RESP_LOWER 0x00000068
-
-/*
- * DMA Direct Window
- *
- * The direct map register allows the 2GB direct window to map to
- * a given widget address space. The upper bits of the XIO address,
- * identifying the node to access, are provided in the low-order
- * bits of the register.
- */
-
-#define BRIDGE_DIR_MAP 0x00000080
-
-#define BRIDGE_DIRMAP_WIDGET_SHIFT 20
-#define BRIDGE_DIRMAP_ADD_512MB 0x00020000 /* add 512MB */
-#define BRIDGE_DIRMAP_BASE_MASK 0x0001ffff
-#define BRIDGE_DIRMAP_BASE_SHIFT 31
-
-#define BRIDGE_PCI0_MEM_SPACE_BASE 0x0000000040000000ULL
-#define BRIDGE_PCI_MEM_SPACE_LENGTH 0x0000000040000000ULL
-#define BRIDGE_PCI1_MEM_SPACE_BASE 0x00000000c0000000ULL
-#define BRIDGE_PCI_IO_SPACE_BASE 0x0000000100000000ULL
-#define BRIDGE_PCI_IO_SPACE_LENGTH 0x0000000100000000ULL
-
-#define BRIDGE_NIC 0x000000b0
-
-#define BRIDGE_BUS_TIMEOUT 0x000000c0
-#define BRIDGE_BUS_PCI_RETRY_CNT_SHIFT 0
-#define BRIDGE_BUS_PCI_RETRY_CNT_MASK 0x000003ff
-#define BRIDGE_BUS_GIO_TIMEOUT 0x00001000
-#define BRIDGE_BUS_PCI_RETRY_HOLD_SHIFT 16
-#define BRIDGE_BUS_PCI_RETRY_HOLD_MASK 0x001f0000
-
-#define BRIDGE_PCI_CFG 0x000000c8
-#define BRIDGE_PCI_ERR_UPPER 0x000000d0
-#define BRIDGE_PCI_ERR_LOWER 0x000000d8
-
-/*
- * Interrupt handling
- */
-
-#define BRIDGE_ISR 0x00000100
-#define BRIDGE_IER 0x00000108
-#define BRIDGE_ICR 0x00000110
-#define BRIDGE_INT_MODE 0x00000118
-#define BRIDGE_INT_DEV 0x00000120
-#define BRIDGE_INT_HOST_ERR 0x00000128
-#define BRIDGE_INT_ADDR(d) (0x00000130 + 8 * (d))
-/* the following two are XBridge-only */
-#define BRIDGE_INT_FORCE_ALWAYS(d) (0x00000180 + 8 * (d))
-#define BRIDGE_INT_FORCE_PIN(d) (0x000001c0 + 8 * (d))
-
-/*
- * BRIDGE_ISR bits (bits 32 and beyond are PIC only)
- */
-
-/* PCI-X split completion message parity error */
-#define BRIDGE_ISR_PCIX_SPLIT_MSG_PARITY 0x0000200000000000ULL
-/* PCI-X split completion error message */
-#define BRIDGE_ISR_PCIX_SPLIT_EMSG 0x0000100000000000ULL
-/* PCI-X split completion timeout */
-#define BRIDGE_ISR_PCIX_SPLIT_TO 0x0000080000000000ULL
-/* PCI-X unexpected completion cycle */
-#define BRIDGE_ISR_PCIX_UNEX_COMP 0x0000040000000000ULL
-/* internal RAM parity error */
-#define BRIDGE_ISR_INT_RAM_PERR 0x0000020000000000ULL
-/* PCI/PCI-X arbitration error */
-#define BRIDGE_ISR_PCIX_ARB_ERR 0x0000010000000000ULL
-/* PCI-X read request timeout */
-#define BRIDGE_ISR_PCIX_REQ_TMO 0x0000008000000000ULL
-/* PCI-X target abort */
-#define BRIDGE_ISR_PCIX_TABORT 0x0000004000000000ULL
-/* PCI-X PERR */
-#define BRIDGE_ISR_PCIX_PERR 0x0000002000000000ULL
-/* PCI-X SERR */
-#define BRIDGE_ISR_PCIX_SERR 0x0000001000000000ULL
-/* PCI-X PIO retry counter exceeded */
-#define BRIDGE_ISR_PCIX_MRETRY 0x0000000800000000ULL
-/* PCI-X master timeout */
-#define BRIDGE_ISR_PCIX_MTMO 0x0000000400000000ULL
-/* PCI-X data cycle parity error */
-#define BRIDGE_ISR_PCIX_D_PARITY 0x0000000200000000ULL
-/* PCI-X address or attribute cycle parity error */
-#define BRIDGE_ISR_PCIX_A_PARITY 0x0000000100000000ULL
-/* multiple errors occurred - bridge only */
-#define BRIDGE_ISR_MULTIPLE_ERR 0x0000000080000000ULL
-/* PMU access fault */
-#define BRIDGE_ISR_PMU_ESIZE_FAULT 0x0000000040000000ULL
-/* unexpected xtalk incoming response */
-#define BRIDGE_ISR_UNEXPECTED_RESP 0x0000000020000000ULL
-/* xtalk incoming response framing error */
-#define BRIDGE_ISR_BAD_XRESP_PACKET 0x0000000010000000ULL
-/* xtalk incoming request framing error */
-#define BRIDGE_ISR_BAD_XREQ_PACKET 0x0000000008000000ULL
-/* xtalk incoming response command word error bit set */
-#define BRIDGE_ISR_RESP_XTALK_ERR 0x0000000004000000ULL
-/* xtalk incoming request command word error bit set */
-#define BRIDGE_ISR_REQ_XTALK_ERR 0x0000000002000000ULL
-/* request packet has invalid address for this widget */
-#define BRIDGE_ISR_INVALID_ADDRESS 0x0000000001000000ULL
-/* request operation not supported by the bridge */
-#define BRIDGE_ISR_UNSUPPORTED_XOP 0x0000000000800000ULL
-/* request packet overflow */
-#define BRIDGE_ISR_XREQ_FIFO_OFLOW 0x0000000000400000ULL
-/* LLP receiver sequence number error */
-#define BRIDGE_ISR_LLP_REC_SNERR 0x0000000000200000ULL
-/* LLP receiver check bit error */
-#define BRIDGE_ISR_LLP_REC_CBERR 0x0000000000100000ULL
-/* LLP receiver retry count exceeded */
-#define BRIDGE_ISR_LLP_RCTY 0x0000000000080000ULL
-/* LLP transmitter side required retry */
-#define BRIDGE_ISR_LLP_TX_RETRY 0x0000000000040000ULL
-/* LLP transmitter retry count exceeded */
-#define BRIDGE_ISR_LLP_TCTY 0x0000000000020000ULL
-/* (ATE) SSRAM parity error - bridge only */
-#define BRIDGE_ISR_SSRAM_PERR 0x0000000000010000ULL
-/* PCI abort condition */
-#define BRIDGE_ISR_PCI_ABORT 0x0000000000008000ULL
-/* PCI bridge detected parity error */
-#define BRIDGE_ISR_PCI_PARITY 0x0000000000004000ULL
-/* PCI address or command parity error */
-#define BRIDGE_ISR_PCI_SERR 0x0000000000002000ULL
-/* PCI device parity error */
-#define BRIDGE_ISR_PCI_PERR 0x0000000000001000ULL
-/* PCI device selection timeout */
-#define BRIDGE_ISR_PCI_MASTER_TMO 0x0000000000000800ULL
-/* PCI retry count exceeded */
-#define BRIDGE_ISR_PCI_RETRY_CNT 0x0000000000000400ULL
-/* PCI to xtalk read request timeout */
-#define BRIDGE_ISR_XREAD_REQ_TMO 0x0000000000000200ULL
-/* GIO non-contiguous byte enable in xtalk packet - bridge only */
-#define BRIDGE_ISR_GIO_BENABLE_ERR 0x0000000000000100ULL
-#define BRIDGE_ISR_HWINTR_MASK 0x00000000000000ffULL
-
-#define BRIDGE_ISR_ERRMASK 0x00000000fffffe00ULL
-#define PIC_ISR_ERRMASK 0x00003fff7ffffe00ULL
-
-/*
- * BRIDGE_ICR bits, for Bridge and XBridge chips only (error interrupts
- * being cleared in groups)
- */
-
-#define BRIDGE_ICR_MULTIPLE 0x00000040
-#define BRIDGE_ICR_CRP 0x00000020
-#define BRIDGE_ICR_RESP_BUF 0x00000010
-#define BRIDGE_ICR_REQ_DSP 0x00000008
-#define BRIDGE_ICR_LLP 0x00000004
-#define BRIDGE_ICR_SSRAM 0x00000002
-#define BRIDGE_ICR_PCI 0x00000001
-#define BRIDGE_ICR_ALL 0x0000007f
-
-/*
- * PCI Resource Mapping control
- *
- * There are three ways to map a given device:
- * - memory mapping in the long window, at BRIDGE_PCI_MEM_SPACE_BASE,
- * shared by all devices.
- * - I/O mapping in the long window, at BRIDGE_PCI_IO_SPACE_BASE,
- * shared by all devices, but only on widget revision 4 or later.
- * - programmable memory or I/O mapping at a selectable place in the
- * short window, with an 1MB granularity. The size of this
- * window is 2MB for the windows at 2MB and 4MB, and 1MB onwards.
- *
- * ARCBios will setup mappings in the short window for us, and
- * the selected address will match BAR0.
- */
-
-#define BRIDGE_DEVICE(d) (0x00000200 + 8 * (d))
-/* flags applying to the device itself */
-/* enable write gathering through ATE */
-#define BRIDGE_DEVICE_WGATHER_PMU 0x01000000
-/* enable write gathering through the direct window */
-#define BRIDGE_DEVICE_WGATHER_DIR 0x00800000
-/* byteswap DMA done through ATE */
-#define BRIDGE_DEVICE_SWAP_PMU 0x00100000
-/* byteswap DMA done through the direct window */
-#define BRIDGE_DEVICE_SWAP_DIR 0x00080000
-/* flags applying to the mapping in this devio register */
-#define BRIDGE_DEVICE_PREFETCH 0x00040000
-#define BRIDGE_DEVICE_PRECISE 0x00020000
-#define BRIDGE_DEVICE_COHERENT 0x00010000
-#define BRIDGE_DEVICE_BARRIER 0x00008000
-/* byteswap PIO */
-#define BRIDGE_DEVICE_SWAP 0x00002000
-/* set if memory space, clear if I/O space */
-#define BRIDGE_DEVICE_IO_MEM 0x00001000
-#define BRIDGE_DEVICE_BASE_MASK 0x00000fff
-#define BRIDGE_DEVICE_BASE_SHIFT 20
-
-#define BRIDGE_DEVIO_BASE 0x00200000
-#define BRIDGE_DEVIO_LARGE 0x00200000
-#define BRIDGE_DEVIO_SHORT 0x00100000
-
-#define BRIDGE_DEVIO_OFFS(d) \
- (BRIDGE_DEVIO_BASE + \
- BRIDGE_DEVIO_LARGE * ((d) < 2 ? (d) : 2) + \
- BRIDGE_DEVIO_SHORT * ((d) < 2 ? 0 : (d) - 2))
-#define BRIDGE_DEVIO_SIZE(d) \
- ((d) < 2 ? BRIDGE_DEVIO_LARGE : BRIDGE_DEVIO_SHORT)
-#define PIC_DEVIO_OFFS(bus,d) \
- (BRIDGE_DEVIO_OFFS(d) + ((bus) != 0 ? BRIDGE_BUS_OFFSET : 0))
-
-
-#define BRIDGE_DEVICE_WBFLUSH(d) (0x00000240 + 8 * (d))
-
-/*
- * Read Response Buffer configuration registers
- *
- * There are 16 RRB, which are shared among the PCI devices.
- * The following registers provide four bits per RRB, describing
- * their RRB assignment.
- *
- * Since these four bits only assign two bits to map to a PCI slot,
- * the low-order bit is implied by the RRB register: one controls the
- * even-numbered PCI slots, while the other controls the odd-numbered
- * PCI slots.
- */
-
-#define BRIDGE_RRB_EVEN 0x00000280
-#define BRIDGE_RRB_ODD 0x00000288
-
-#define RRB_VALID 0x8
-#define RRB_VCHAN 0x4
-#define RRB_DEVICE_MASK 0x3
-#define RRB_SHIFT 4
-
-/*
- * Address Translation Entries
- */
-
-#define BRIDGE_INTERNAL_ATE 128
-#define XBRIDGE_INTERNAL_ATE 1024
-
-#define BRIDGE_ATE_SSHIFT 12 /* 4KB */
-#define BRIDGE_ATE_LSHIFT 14 /* 16KB */
-#define BRIDGE_ATE_SSIZE (1ULL << BRIDGE_ATE_SSHIFT)
-#define BRIDGE_ATE_LSIZE (1ULL << BRIDGE_ATE_LSHIFT)
-#define BRIDGE_ATE_SMASK (BRIDGE_ATE_SSIZE - 1)
-#define BRIDGE_ATE_LMASK (BRIDGE_ATE_LSIZE - 1)
-
-#define BRIDGE_ATE(a) (0x00010000 + (a) * 8)
-
-#define ATE_NV 0x0000000000000000ULL
-#define ATE_V 0x0000000000000001ULL
-#define ATE_COH 0x0000000000000002ULL
-#define ATE_PRECISE 0x0000000000000004ULL
-#define ATE_PREFETCH 0x0000000000000008ULL
-#define ATE_BARRIER 0x0000000000000010ULL
-#define ATE_BSWAP 0x0000000000000020ULL /* XB */
-#define ATE_WIDGET_MASK 0x0000000000000f00ULL
-#define ATE_WIDGET_SHIFT 8
-#define ATE_ADDRESS_MASK 0x0000fffffffff000ULL
-#define ATE_RMF_MASK 0x00ff000000000000ULL /* BR */
-
-/*
- * PIC Write Request memory
- */
-
-#define PIC_WR_REQ_LOWER(a) (0x00018000 + (a) * 8)
-#define PIC_WR_REQ_UPPER(a) (0x00018800 + (a) * 8)
-#define PIC_WR_REQ_PARITY(a) (0x00019000 + (a) * 8)
-
-#define PIC_WR_REQ_ENTRIES 0x100
-
-/*
- * Configuration space
- *
- * Access to the first bus is done in the first area, sorted by
- * device number and function number.
- * Access to other buses is done in the second area, after programming
- * BRIDGE_PCI_CFG to the appropriate bus and slot number.
- */
-
-#define BRIDGE_PCI_CFG_SPACE 0x00020000
-#define BRIDGE_PCI_CFG1_SPACE 0x00028000
-
-/*
- * DMA addresses
- * The Bridge can do DMA either through a direct 2GB window, or through
- * a 1GB translated window, using its ATE memory.
- */
-
-#define BRIDGE_DMA_TRANSLATED_BASE 0x40000000ULL
-#define XBRIDGE_DMA_TRANSLATED_SWAP 0x20000000ULL
-#define ATE_ADDRESS(a,s) \
- (BRIDGE_DMA_TRANSLATED_BASE + ((a) << (s)))
-#define ATE_INDEX(a,s) \
- (((a) - BRIDGE_DMA_TRANSLATED_BASE) >> (s))
-
-#define BRIDGE_DMA_DIRECT_BASE 0x80000000ULL
-#define BRIDGE_DMA_DIRECT_LENGTH 0x80000000ULL
+++ /dev/null
-/* $OpenBSD: xheart.c,v 1.33 2020/07/06 13:33:08 pirofti Exp $ */
-
-/*
- * Copyright (c) 2008 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * IP30 Heart Widget
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/evcount.h>
-#include <sys/malloc.h>
-#include <sys/timetc.h>
-#include <sys/atomic.h>
-
-#include <machine/autoconf.h>
-#include <machine/cpu.h>
-#include <mips64/mips_cpu.h>
-#include <machine/intr.h>
-
-#include <sgi/xbow/xbow.h>
-#include <sgi/xbow/xbowdevs.h>
-#include <sgi/xbow/xheartreg.h>
-
-#include <dev/onewire/onewirereg.h>
-#include <dev/onewire/onewirevar.h>
-
-struct xheart_softc {
- struct device sc_dev;
- struct onewire_bus sc_bus;
-};
-
-int xheart_match(struct device *, void *, void *);
-void xheart_attach(struct device *, struct device *, void *);
-
-const struct cfattach xheart_ca = {
- sizeof(struct xheart_softc), xheart_match, xheart_attach,
-};
-
-struct cfdriver xheart_cd = {
- NULL, "xheart", DV_DULL,
-};
-
-int xheart_ow_reset(void *);
-int xheart_ow_read_bit(struct xheart_softc *);
-int xheart_ow_send_bit(void *, int);
-int xheart_ow_read_byte(void *);
-int xheart_ow_triplet(void *, int);
-int xheart_ow_pulse(struct xheart_softc *, int, int);
-
-int xheart_intr_register(int, int, int *);
-int xheart_intr_establish(int (*)(void *), void *, int, int, const char *,
- struct intrhand *);
-void xheart_intr_disestablish(int);
-void xheart_intr_clear(int);
-void xheart_intr_set(int);
-uint32_t xheart_intr_handler(uint32_t, struct trapframe *);
-void xheart_intr_makemasks(void);
-void xheart_setintrmask(int);
-void xheart_splx(int);
-
-u_int xheart_get_timecount(struct timecounter *);
-
-struct timecounter xheart_timecounter = {
- .tc_get_timecount = xheart_get_timecount,
- .tc_poll_pps = NULL,
- .tc_counter_mask = 0xffffffff, /* truncate 52-bit counter to 32-bit */
- .tc_frequency = 12500000,
- .tc_name = "heart",
- .tc_quality = 100,
- .tc_priv = NULL,
- .tc_user = 0,
-};
-
-extern uint32_t ip30_lights_frob(uint32_t, struct trapframe *);
-
-/*
- * HEART interrupt handling declarations: 64 sources; 5 levels.
- */
-
-struct intrhand *xheart_intrhand[HEART_NINTS];
-
-#ifdef notyet
-#define INTPRI_HEART_4 (INTPRI_CLOCK + 1)
-#define INTPRI_HEART_3 (INTPRI_HEART_4 + 1)
-#define INTPRI_HEART_2 (INTPRI_HEART_3 + 1)
-#define INTPRI_HEART_1 (INTPRI_HEART_2 + 1)
-#define INTPRI_HEART_0 (INTPRI_HEART_1 + 1)
-#else
-#define INTPRI_HEART_2 (INTPRI_IPI)
-#define INTPRI_HEART_0 (INTPRI_CLOCK + 1)
-#endif
-#define INTPRI_HEART_LEDS (INTPRI_HEART_0 + 1)
-
-uint64_t xheart_intem[MAXCPUS];
-uint64_t xheart_imask[MAXCPUS][NIPLS];
-
-int
-xheart_match(struct device *parent, void *match, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
-
- if (xaa->xaa_vendor == XBOW_VENDOR_SGI4 &&
- xaa->xaa_product == XBOW_PRODUCT_SGI4_HEART)
- return 1;
-
- return 0;
-}
-
-void
-xheart_attach(struct device *parent, struct device *self, void *aux)
-{
- struct xbow_attach_args *xaa = aux;
- struct xheart_softc *sc = (void *)self;
- struct onewirebus_attach_args oba;
- paddr_t heart;
-
- printf(" revision %d\n", xaa->xaa_revision);
-
- sc->sc_bus.bus_cookie = sc;
- sc->sc_bus.bus_reset = xheart_ow_reset;
- sc->sc_bus.bus_bit = xheart_ow_send_bit;
- sc->sc_bus.bus_read_byte = xheart_ow_read_byte;
- sc->sc_bus.bus_write_byte = NULL; /* use default routine */
- sc->sc_bus.bus_read_block = NULL; /* use default routine */
- sc->sc_bus.bus_write_block = NULL; /* use default routine */
- sc->sc_bus.bus_triplet = xheart_ow_triplet;
- sc->sc_bus.bus_matchrom = NULL; /* use default routine */
- sc->sc_bus.bus_search = NULL; /* use default routine */
-
- oba.oba_bus = &sc->sc_bus;
- oba.oba_flags = ONEWIRE_SCAN_NOW | ONEWIRE_NO_PERIODIC_SCAN;
- config_found(self, &oba, onewirebus_print);
-
- xbow_intr_address = 0x80;
- xbow_intr_widget_intr_register = xheart_intr_register;
- xbow_intr_widget_intr_establish = xheart_intr_establish;
- xbow_intr_widget_intr_disestablish = xheart_intr_disestablish;
- xbow_intr_widget_intr_clear = xheart_intr_clear;
- xbow_intr_widget_intr_set = xheart_intr_set;
-
- /*
- * Acknowledge and disable all interrupts.
- */
- heart = PHYS_TO_XKPHYS(HEART_PIU_BASE, CCA_NC);
- *(volatile uint64_t*)(heart + HEART_ISR_CLR) = 0xffffffffffffffffUL;
- *(volatile uint64_t*)(heart + HEART_IMR(0)) = 0UL;
- *(volatile uint64_t*)(heart + HEART_IMR(1)) = 0UL;
- *(volatile uint64_t*)(heart + HEART_IMR(2)) = 0UL;
- *(volatile uint64_t*)(heart + HEART_IMR(3)) = 0UL;
-
-#ifdef notyet
- set_intr(INTPRI_HEART_4, CR_INT_4, xheart_intr_handler);
- set_intr(INTPRI_HEART_3, CR_INT_3, xheart_intr_handler);
-#endif
- set_intr(INTPRI_HEART_2, CR_INT_2, xheart_intr_handler);
-#ifdef notyet
- set_intr(INTPRI_HEART_1, CR_INT_1, xheart_intr_handler);
-#endif
- set_intr(INTPRI_HEART_0, CR_INT_0, xheart_intr_handler);
-
- set_intr(INTPRI_HEART_LEDS, CR_INT_5, ip30_lights_frob);
-
- register_splx_handler(xheart_splx);
-
- tc_init(&xheart_timecounter);
-}
-
-/*
- * Number-In-a-Can (1-Wire) interface
- */
-
-int
-xheart_ow_reset(void *v)
-{
- struct xheart_softc *sc = v;
- return xheart_ow_pulse(sc, 500, 65);
-}
-
-int
-xheart_ow_read_bit(struct xheart_softc *sc)
-{
- return xheart_ow_pulse(sc, 6, 13);
-}
-
-int
-xheart_ow_send_bit(void *v, int bit)
-{
- struct xheart_softc *sc = v;
- int rc;
-
- if (bit != 0)
- rc = xheart_ow_pulse(sc, 6, 110);
- else
- rc = xheart_ow_pulse(sc, 80, 30);
- return rc;
-}
-
-int
-xheart_ow_read_byte(void *v)
-{
- struct xheart_softc *sc = v;
- unsigned int byte = 0;
- int i;
-
- for (i = 0; i < 8; i++)
- byte |= xheart_ow_read_bit(sc) << i;
-
- return byte;
-}
-
-int
-xheart_ow_triplet(void *v, int dir)
-{
- struct xheart_softc *sc = v;
- int rc;
-
- rc = xheart_ow_read_bit(sc);
- rc <<= 1;
- rc |= xheart_ow_read_bit(sc);
-
- switch (rc) {
- case 0x0:
- xheart_ow_send_bit(v, dir);
- break;
- case 0x1:
- xheart_ow_send_bit(v, 0);
- break;
- default:
- xheart_ow_send_bit(v, 1);
- break;
- }
-
- return (rc);
-}
-
-int
-xheart_ow_pulse(struct xheart_softc *sc, int pulse, int data)
-{
- uint64_t mcr_value;
- paddr_t heart;
-
- heart = PHYS_TO_XKPHYS(HEART_PIU_BASE + HEART_MICROLAN, CCA_NC);
- mcr_value = (pulse << 10) | (data << 2);
- *(volatile uint64_t *)heart = mcr_value;
- do {
- mcr_value = *(volatile uint64_t *)heart;
- } while ((mcr_value & 0x00000002) == 0);
-
- delay(500);
-
- return (mcr_value & 1);
-}
-
-/*
- * HEART interrupt handling routines
- */
-
-/*
- * Find a suitable interrupt bit for the given interrupt.
- */
-int
-xheart_intr_register(int widget, int level, int *intrbit)
-{
- int bit;
- u_long cpuid = cpu_number();
-
- /*
- * All interrupts will be serviced at hardware level 0,
- * so the `level' argument can be ignored.
- */
- for (bit = HEART_INTR_WIDGET_MAX; bit >= HEART_INTR_WIDGET_MIN; bit--)
- if ((xheart_intem[cpuid] & (1UL << bit)) == 0)
- goto found;
-
- return EINVAL;
-
-found:
- *intrbit = bit;
- return 0;
-}
-
-/*
- * Register an interrupt handler for a given source, and enable it.
- */
-int
-xheart_intr_establish(int (*func)(void *), void *arg, int intrbit,
- int level, const char *name, struct intrhand *ihstore)
-{
- struct intrhand *ih;
- int flags;
- int s;
- u_long cpuid = cpu_number();
-
-#ifdef DIAGNOSTIC
- if (intrbit < 0 || intrbit >= HEART_NINTS)
- return EINVAL;
-#endif
-
- flags = (level & IPL_MPSAFE) ? IH_MPSAFE : 0;
- level &= ~IPL_MPSAFE;
-
- /*
- * HEART interrupts are not supposed to be shared - the interrupt
- * mask is large enough for all widgets.
- */
- if (xheart_intrhand[intrbit] != NULL)
- return EEXIST;
-
- if (ihstore == NULL) {
- ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
- if (ih == NULL)
- return ENOMEM;
- flags |= IH_ALLOCATED;
- } else
- ih = ihstore;
-
- ih->ih_next = NULL;
- ih->ih_fun = func;
- ih->ih_arg = arg;
- ih->ih_level = level;
- ih->ih_irq = intrbit;
- ih->ih_flags = flags;
- if (name != NULL)
- evcount_attach(&ih->ih_count, name, &ih->ih_level);
-
- s = splhigh();
-
- xheart_intrhand[intrbit] = ih;
-
- xheart_intem[cpuid] |= 1UL << intrbit;
- xheart_intr_makemasks();
-
- splx(s); /* causes hw mask update */
-
- return 0;
-}
-
-void
-xheart_intr_disestablish(int intrbit)
-{
- struct intrhand *ih;
- int s;
- u_long cpuid = cpu_number();
-
-#ifdef DIAGNOSTIC
- if (intrbit < 0 || intrbit >= HEART_NINTS)
- return;
-#endif
-
- s = splhigh();
-
- if ((ih = xheart_intrhand[intrbit]) == NULL) {
- splx(s);
- return;
- }
-
- xheart_intrhand[intrbit] = NULL;
-
- xheart_intem[cpuid] &= ~(1UL << intrbit);
- xheart_intr_makemasks();
-
- splx(s);
-
- if (ISSET(ih->ih_flags, IH_ALLOCATED))
- free(ih, M_DEVBUF, sizeof *ih);
-}
-
-void
-xheart_intr_clear(int intrbit)
-{
- *(volatile uint64_t *)PHYS_TO_XKPHYS(HEART_PIU_BASE + HEART_ISR_CLR,
- CCA_NC) = 1UL << intrbit;
-}
-
-void
-xheart_intr_set(int intrbit)
-{
- *(volatile uint64_t *)PHYS_TO_XKPHYS(HEART_PIU_BASE + HEART_ISR_SET,
- CCA_NC) = 1UL << intrbit;
-}
-
-void
-xheart_splx(int newipl)
-{
- struct cpu_info *ci = curcpu();
-
- /* Update masks to new ipl. Order highly important! */
- ci->ci_ipl = newipl;
- xheart_setintrmask(newipl);
-
- /* If we still have softints pending trigger processing. */
- if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT)
- setsoftintr0();
-}
-
-/*
- * Heart interrupt handler. Can be registered at any hardware interrupt level.
- */
-
-#define INTR_FUNCTIONNAME xheart_intr_handler
-#define MASK_FUNCTIONNAME xheart_intr_makemasks
-#define INTR_LOCAL_DECLS \
- paddr_t heart = PHYS_TO_XKPHYS(HEART_PIU_BASE, CCA_NC); \
- u_long cpuid = cpu_number();
-#define MASK_LOCAL_DECLS \
- u_long cpuid = cpu_number();
-#define INTR_GETMASKS \
-do { \
- isr = *(volatile uint64_t *)(heart + HEART_ISR); \
- imr = *(volatile uint64_t *)(heart + HEART_IMR(cpuid)); \
- switch (hwpend) { \
- case CR_INT_0: \
- isr &= HEART_ISR_LVL0_MASK; \
- bit = HEART_ISR_LVL0_MAX; \
- break; \
- case CR_INT_1: \
- isr &= HEART_ISR_LVL1_MASK; \
- bit = HEART_ISR_LVL1_MAX; \
- break; \
- case CR_INT_2: \
- isr &= HEART_ISR_LVL2_MASK; \
- bit = HEART_ISR_LVL2_MAX; \
- break; \
- case CR_INT_3: \
- isr &= HEART_ISR_LVL3_MASK; \
- bit = HEART_ISR_LVL3_MAX; \
- break; \
- case CR_INT_4: \
- isr &= HEART_ISR_LVL4_MASK; \
- bit = HEART_ISR_LVL4_MAX; \
- break; \
- default: \
- return 0; /* can't happen */ \
- } \
-} while (0)
-#define INTR_MASKPENDING \
- *(volatile uint64_t *)(heart + HEART_IMR(cpuid)) &= ~isr
-#define INTR_IMASK(ipl) xheart_imask[cpuid][ipl]
-#define INTR_HANDLER(bit) xheart_intrhand[bit]
-#define INTR_SPURIOUS(bit) \
-do { \
- printf("spurious xheart interrupt %d\n", bit); \
-} while (0)
-#define INTR_MASKRESTORE \
- *(volatile uint64_t *)(heart + HEART_IMR(cpuid)) = imr
-#define INTR_MASKSIZE HEART_NINTS
-
-#include <sgi/sgi/intr_template.c>
-
-void
-xheart_setintrmask(int level)
-{
- paddr_t heart = PHYS_TO_XKPHYS(HEART_PIU_BASE, CCA_NC);
- u_long cpuid = cpu_number();
-
- *(volatile uint64_t *)(heart + HEART_IMR(cpuid)) =
- xheart_intem[cpuid] & ~xheart_imask[cpuid][level];
-}
-
-/*
- * Timecounter interface.
- */
-
-uint
-xheart_get_timecount(struct timecounter *tc)
-{
- paddr_t heart = PHYS_TO_XKPHYS(HEART_PIU_BASE, CCA_NC);
-
- return (u_int)*(volatile uint64_t *)(heart + HEART_CTR_VALUE);
-}
+++ /dev/null
-/* $OpenBSD: xheartreg.h,v 1.5 2012/06/17 12:34:19 miod Exp $ */
-
-/*
- * Copyright (c) 2008, 2011 Miodrag Vallat.
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-/*
- * IP30 HEART registers
- */
-
-/* physical address in PIU mode */
-#define HEART_PIU_BASE 0x000000000ff00000
-
-#define HEART_MODE 0x0000
-#define HEART_MEMORY_STATUS 0x0020 /* 8 32 bit registers */
-#define HEART_MEMORY_VALID 0x80000000
-#define HEART_MEMORY_SIZE_MASK 0x003f0000
-#define HEART_MEMORY_SIZE_SHIFT 16
-#define HEART_MEMORY_ADDR_MASK 0x000001ff
-#define HEART_MEMORY_ADDR_SHIFT 0
-#define HEART_MEMORY_UNIT_SHIFT 25 /* 32MB */
-
-#define HEART_MICROLAN 0x00b8
-
-/*
- * Interrupt handling registers.
- * The Heart supports four different interrupt targets, although only
- * the two cpus are used in practice.
- */
-
-#define HEART_IMR(s) (0x00010000 + (s) * 8)
-#define HEART_ISR_SET 0x00010020
-#define HEART_ISR_CLR 0x00010028
-#define HEART_ISR 0x00010030
-
-/*
- * ISR bit assignments.
- */
-
-/** Level 4 interrupt: hardware error */
-#define HEART_ISR_LVL4_MASK 0xfff8000000000000UL
-#define HEART_ISR_LVL4_MAX 63
-/* Heart (widget 8) error */
-#define HEART_ISR_WID08_ERROR 63
-/* CPU bus error */
-#define HEART_ISR_CPU_BUSERR(c) (59 + (c))
-/* Crossbow (widget 0) error */
-#define HEART_ISR_WID00_ERROR 58
-/* Widget error */
-#define HEART_ISR_WID0F_ERROR 57
-#define HEART_ISR_WID0E_ERROR 56
-#define HEART_ISR_WID0D_ERROR 55
-#define HEART_ISR_WID0C_ERROR 54
-#define HEART_ISR_WID0B_ERROR 53
-#define HEART_ISR_WID0A_ERROR 52
-#define HEART_ISR_WID09_ERROR 51
-
-#define HEART_ISR_WID_ERROR(w) \
- ((w) == 0 ? HEART_ISR_WID00_ERROR : \
- (w) == 8 ? HEART_ISR_WID08_ERROR : HEART_ISR_WID09_ERROR + (w) - 9)
-
-/** Level 3 interrupt: heart counter/timer */
-#define HEART_ISR_LVL3_MASK 0x0004000000000000UL
-#define HEART_ISR_LVL3_MAX 50
-/* Crossbow clock */
-#define HEART_ISR_HEARTCLOCK 50
-
-/** Level 2 interrupt */
-#define HEART_ISR_LVL2_MASK 0x0003ffff00000000UL
-#define HEART_ISR_LVL2_MAX 49
-/* IPI */
-#define HEART_ISR_IPI(c) (46 + (c))
-/* Debugger interrupts */
-#define HEART_ISR_DBG(c) (42 + (c))
-/* Power switch */
-#define HEART_ISR_POWER 41
-/* 40-32 freely available */
-
-/** Level 1 interrupt */
-#define HEART_ISR_LVL1_MASK 0x00000000ffff0000UL
-#define HEART_ISR_LVL1_MAX 31
-/* 31-16 freely available */
-
-/** Level 0 interrupt */
-#define HEART_ISR_LVL0_MASK 0x000000000000ffffUL
-#define HEART_ISR_LVL0_MAX 15
-/* 15-3 freely available */
-
-#define HEART_INTR_WIDGET_MAX 15
-#define HEART_INTR_WIDGET_MIN 3
-
-#define HEART_NINTS 64
-
-/*
- * Crossbow clock, as a free-running counter.
- * The clock rate is 400 MHz, with the counter running at 1/32 of the clock,
- * i.e. 12.5 MHz (80 nS period)
- */
-
-#define HEART_CTR_VALUE 0x00020000 /* 52-bit counter value, r/o */
-#define HEART_CTR_LIMIT 0x00030000 /* 24-bit limit value */
-#define HEART_CTR_TRIGGER 0x00040000
-
-/*
- * Per-processor ID register.
- */
-
-#define HEART_PRID 0x00050000
-/* $OpenBSD: aic7xxx.c,v 1.95 2020/02/06 17:24:18 krw Exp $ */
+/* $OpenBSD: aic7xxx.c,v 1.96 2021/05/01 16:11:15 visa Exp $ */
/* $NetBSD: aic7xxx.c,v 1.108 2003/11/02 11:07:44 wiz Exp $ */
/*
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: aic7xxx.c,v 1.95 2020/02/06 17:24:18 krw Exp $
+ * $Id: aic7xxx.c,v 1.96 2021/05/01 16:11:15 visa Exp $
*/
/*
* Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003
while (ahc->qoutfifo[ahc->qoutfifonext] != SCB_LIST_NULL) {
scb_index = ahc->qoutfifo[ahc->qoutfifonext];
-#ifdef __sgi__
- if ((ahc->qoutfifonext & 0x1f) == 0x1f) {
- u_int modnext;
- u_int32_t *nextp;
-
- /*
- * Clear 32 bytes of QOUTFIFO at a time
- * so that we don't clobber an incoming
- * byte DMA to the array on architectures
- * non coherent caches.
- */
- modnext = ahc->qoutfifonext & ~0x1f;
- nextp = (uint32_t *)(&ahc->qoutfifo[modnext]);
- *nextp++ = 0xFFFFFFFFUL;
- *nextp++ = 0xFFFFFFFFUL;
- *nextp++ = 0xFFFFFFFFUL;
- *nextp++ = 0xFFFFFFFFUL;
- *nextp++ = 0xFFFFFFFFUL;
- *nextp++ = 0xFFFFFFFFUL;
- *nextp++ = 0xFFFFFFFFUL;
- *nextp++ = 0xFFFFFFFFUL;
- ahc_dmamap_sync(ahc, ahc->parent_dmat /*shared_data_dmat*/,
- ahc->shared_data_dmamap,
- /*offset*/modnext, /*len*/32,
- BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
- }
-#else
if ((ahc->qoutfifonext & 0x03) == 0x03) {
u_int modnext;
/*offset*/modnext, /*len*/4,
BUS_DMASYNC_PREREAD);
}
-#endif
ahc->qoutfifonext++;
scb = ahc_lookup_scb(ahc, scb_index);
/* All of our queues are empty */
for (i = 0; i < 256; i++)
ahc->qoutfifo[i] = SCB_LIST_NULL;
-#ifdef __sgi__
- ahc_sync_qoutfifo(ahc, BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
-#else
ahc_sync_qoutfifo(ahc, BUS_DMASYNC_PREREAD);
-#endif
for (i = 0; i < 256; i++)
ahc->qinfifo[i] = SCB_LIST_NULL;
/* All target command blocks start out invalid. */
for (i = 0; i < AHC_TMODE_CMDS; i++)
ahc->targetcmds[i].cmd_valid = 0;
-#ifdef __sgi__
- ahc_sync_tqinfifo(ahc, BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
-#else
ahc_sync_tqinfifo(ahc, BUS_DMASYNC_PREREAD);
-#endif
ahc->qoutfifo = (uint8_t *)&ahc->targetcmds[256];
}
ahc->qinfifo = &ahc->qoutfifo[256];
ahc->shared_data_dmamap,
ahc_targetcmd_offset(ahc, ahc->tqinfifonext),
sizeof(struct target_cmd),
-#ifdef __sgi__
- BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
-#else
BUS_DMASYNC_PREREAD);
-#endif
ahc->tqinfifonext++;
/*
-# $OpenBSD: Makefile,v 1.24 2017/01/23 01:00:58 jsg Exp $
+# $OpenBSD: Makefile,v 1.25 2021/05/01 16:11:15 visa Exp $
NOPROG=
NOMAN=
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
- ${MACHINE} == "octeon" || ${MACHINE} == "sgi" || \
- ${MACHINE} == "sparc64")
+ ${MACHINE} == "octeon" || ${MACHINE} == "sparc64")
FIRM= atu-intersil-int atu-intersil-ext \
atu-rfmd-int atu-rfmd-ext \
-# $OpenBSD: Makefile,v 1.5 2016/05/11 21:52:50 deraadt Exp $
+# $OpenBSD: Makefile,v 1.6 2021/05/01 16:11:15 visa Exp $
NOPROG=
NOMAN=
# PCI capable systems only
.if (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "alpha") || \
(${MACHINE} == "amd64") || (${MACHINE} == "hppa") || \
- (${MACHINE} == "i386") || \
- (${MACHINE} == "sgi") || (${MACHINE} == "sparc64")
+ (${MACHINE} == "i386") || (${MACHINE} == "sparc64")
FIRM= bnx-b06 bnx-b09 bnx-rv2p bnx-xi-rv2p bnx-xi90-rv2p
-# $OpenBSD: Makefile,v 1.7 2016/05/11 21:52:50 deraadt Exp $
+# $OpenBSD: Makefile,v 1.8 2021/05/01 16:11:15 visa Exp $
NOPROG=
NOMAN=
# PCI capable systems only
.if (${MACHINE} == "i386") || (${MACHINE} == "amd64") || \
(${MACHINE} == "alpha") || (${MACHINE} == "sparc64") || \
- (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "hppa") || \
- (${MACHINE} == "sgi")
+ (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "hppa")
FIRM= fxp-d101a fxp-d101b0 fxp-d101ma fxp-d101s fxp-d102 fxp-d102c fxp-d102e
-# $OpenBSD: Makefile,v 1.17 2017/01/23 01:00:58 jsg Exp $
+# $OpenBSD: Makefile,v 1.18 2021/05/01 16:11:15 visa Exp $
NOPROG=
NOMAN=
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
- ${MACHINE} == "octeon" || ${MACHINE} == "sgi" || \
- ${MACHINE} == "sparc64")
+ ${MACHINE} == "octeon" || ${MACHINE} == "sparc64")
FIRM= kue
-# $OpenBSD: Makefile,v 1.4 2016/05/11 21:52:50 deraadt Exp $
+# $OpenBSD: Makefile,v 1.5 2021/05/01 16:11:15 visa Exp $
NOPROG=
NOMAN=
# full-size PCI capable systems only
.if (${MACHINE} == "macppc") || (${MACHINE} == "alpha") || \
(${MACHINE} == "amd64") || (${MACHINE} == "hppa") || \
- (${MACHINE} == "i386") || \
- (${MACHINE} == "sgi") || (${MACHINE} == "sparc64")
+ (${MACHINE} == "i386") || (${MACHINE} == "sparc64")
FIRM= myx-ethp_z8e myx-eth_z8e
-# $OpenBSD: Makefile,v 1.12 2018/10/02 02:05:34 kevlo Exp $
+# $OpenBSD: Makefile,v 1.13 2021/05/01 16:11:15 visa Exp $
NOPROG=
NOMAN=
${MACHINE} == "i386" || \
${MACHINE} == "loongson" || ${MACHINE} == "octeon" || \
${MACHINE_ARCH} == "powerpc" || \
- ${MACHINE} == "sgi" || ${MACHINE} == "sparc64")
+ ${MACHINE} == "sparc64")
FIRM= ral-rt2561 ral-rt2561s ral-rt2661 ral-rt2860 ral-rt3290
-# $OpenBSD: Makefile,v 1.17 2017/01/23 01:00:58 jsg Exp $
+# $OpenBSD: Makefile,v 1.18 2021/05/01 16:11:15 visa Exp $
NOPROG=
NOMAN=
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
- ${MACHINE} == "octeon" || ${MACHINE} == "sgi" || \
- ${MACHINE} == "sparc64")
+ ${MACHINE} == "octeon" || ${MACHINE} == "sparc64")
FIRM= rum-rt2573 run-rt2870 run-rt3071
-# $OpenBSD: Makefile,v 1.13 2016/09/03 13:37:45 guenther Exp $
+# $OpenBSD: Makefile,v 1.14 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
# pcmcia capable systems only
.if (${MACHINE} == "i386") || (${MACHINE} == "amd64") || \
(${MACHINE} == "macppc") || \
- (${MACHINE} == "sparc64") || (${MACHINE} == "hppa") || \
- (${MACHINE} == "sgi")
+ (${MACHINE} == "sparc64") || (${MACHINE} == "hppa")
afterinstall:
${INSTALL} -c -o ${BINOWN} -g ${BINGRP} -m 644 \
-# $OpenBSD: Makefile,v 1.3 2016/05/11 21:52:51 deraadt Exp $
+# $OpenBSD: Makefile,v 1.4 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
# PCI capable systems only
.if (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "alpha") || \
(${MACHINE} == "amd64") || (${MACHINE} == "hppa") || \
- (${MACHINE} == "i386") || \
- (${MACHINE} == "sgi") || (${MACHINE} == "sparc64")
+ (${MACHINE} == "i386") || (${MACHINE} == "sparc64")
FIRM= tht
-# $OpenBSD: Makefile,v 1.9 2016/09/01 10:40:38 tedu Exp $
+# $OpenBSD: Makefile,v 1.10 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
.if (${MACHINE} == "i386") || (${MACHINE} == "amd64") || \
(${MACHINE} == "alpha") || (${MACHINE} == "sparc64") || \
(${MACHINE_ARCH} == "powerpc") || \
- (${MACHINE} == "hppa") || (${MACHINE} == "sgi")
+ (${MACHINE} == "hppa")
FIRM= tigon1 tigon2
-# $OpenBSD: Makefile,v 1.11 2017/01/23 01:00:58 jsg Exp $
+# $OpenBSD: Makefile,v 1.12 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
- ${MACHINE} == "octeon" || ${MACHINE} == "sgi" || \
- ${MACHINE} == "sparc64")
+ ${MACHINE} == "octeon" || ${MACHINE} == "sparc64")
FIRM= tusb3410
-# $OpenBSD: Makefile,v 1.7 2016/05/11 21:52:51 deraadt Exp $
+# $OpenBSD: Makefile,v 1.8 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
# PCI capable systems only
.if (${MACHINE} == "i386") || (${MACHINE} == "amd64") || \
(${MACHINE} == "alpha") || (${MACHINE} == "sparc64") || \
- (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "hppa") || \
- (${MACHINE} == "sgi")
+ (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "hppa")
FIRM= 3c990
-# $OpenBSD: Makefile,v 1.10 2017/01/23 01:00:58 jsg Exp $
+# $OpenBSD: Makefile,v 1.11 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
- ${MACHINE} == "octeon" || ${MACHINE} == "sgi" || \
- ${MACHINE} == "sparc64")
+ ${MACHINE} == "octeon" || ${MACHINE} == "sparc64")
FIRM= udl_huffman
-# $OpenBSD: Makefile,v 1.5 2016/05/11 21:52:51 deraadt Exp $
+# $OpenBSD: Makefile,v 1.6 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
# PCI capable systems only
.if (${MACHINE} == "i386") || (${MACHINE} == "amd64") || \
(${MACHINE} == "alpha") || (${MACHINE} == "sparc64") || \
- (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "hppa") || \
- (${MACHINE} == "sgi")
+ (${MACHINE_ARCH} == "powerpc") || (${MACHINE} == "hppa")
FIRM= yds
-# $OpenBSD: Makefile,v 1.16 2017/01/23 01:00:58 jsg Exp $
+# $OpenBSD: Makefile,v 1.17 2021/05/01 16:11:16 visa Exp $
NOPROG=
NOMAN=
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
- ${MACHINE} == "octeon" || ${MACHINE} == "sgi" || \
- ${MACHINE} == "sparc64")
+ ${MACHINE} == "octeon" || ${MACHINE} == "sparc64")
FIRM= zd1211 zd1211b
-/* $OpenBSD: pcivar.h,v 1.74 2020/09/08 20:13:52 kettenis Exp $ */
+/* $OpenBSD: pcivar.h,v 1.75 2021/05/01 16:11:16 visa Exp $ */
/* $NetBSD: pcivar.h,v 1.23 1997/06/06 23:48:05 thorpej Exp $ */
/*
#include <alpha/pci/pci_machdep.h>
#elif defined(__i386__)
#include <i386/pci/pci_machdep.h>
-#elif defined(__sgi__)
-#include <sgi/pci/pci_machdep.h>
#else
#include <machine/pci_machdep.h>
#endif
-/* $OpenBSD: qlw_pci.c,v 1.10 2017/08/17 12:21:31 jsg Exp $ */
+/* $OpenBSD: qlw_pci.c,v 1.11 2021/05/01 16:11:16 visa Exp $ */
/*
* Copyright (c) 2011 David Gwynne <dlg@openbsd.org>
#endif
/*
- * The standard SCSI initiator ID is 7, but various SGI
- * machines use 0 as the initiator ID for their onboard SCSI.
+ * The standard SCSI initiator ID is 7.
* Add-on cards should have a valid nvram, which will override
* these defaults.
*/
-#ifdef __sgi__
- sc->sc_initiator[0] = sc->sc_initiator[1] = 0;
-#else
sc->sc_initiator[0] = sc->sc_initiator[1] = 7;
-#endif
#ifdef __sparc64__
/*
-/* $OpenBSD: wskbdmap_mfii.c,v 1.46 2019/05/11 14:19:16 abieber Exp $ */
+/* $OpenBSD: wskbdmap_mfii.c,v 1.47 2021/05/01 16:11:16 visa Exp $ */
/* $NetBSD: wskbdmap_mfii.c,v 1.15 2000/05/19 16:40:04 drochner Exp $ */
/*
* PLEASE DO NOT FORGET TO REGEN
* sys/dev/usb/ukbdmap.c
- * sys/arch/sgi/hpc/wskbdmap_sgi.c
* AFTER ANY CHANGES TO THIS FILE!
*/
-/* $OpenBSD: ukbdmap.c,v 1.45 2020/11/02 19:47:50 tobhe Exp $ */
+/* $OpenBSD: ukbdmap.c,v 1.46 2021/05/01 16:11:16 visa Exp $ */
/*
* THIS FILE IS AUTOMAGICALLY GENERATED. DO NOT EDIT.
/*
* PLEASE DO NOT FORGET TO REGEN
* sys/dev/usb/ukbdmap.c
- * sys/arch/sgi/hpc/wskbdmap_sgi.c
* AFTER ANY CHANGES TO THIS FILE!
*/
-/* $OpenBSD: wsfont.c,v 1.58 2020/07/10 08:28:04 fcambus Exp $ */
+/* $OpenBSD: wsfont.c,v 1.59 2021/05/01 16:11:16 visa Exp $ */
/* $NetBSD: wsfont.c,v 1.17 2001/02/07 13:59:24 ad Exp $ */
/*-
#if defined(__sparc64__)
#define FONT_GALLANT12x22
#elif defined(__alpha__) || defined(__luna88k__) || defined(__macppc__) || \
- defined(__sgi__) || !defined(SMALL_KERNEL)
+ !defined(SMALL_KERNEL)
#define FONT_SPLEEN12x24
#endif
-# $OpenBSD: Makefile,v 1.49 2019/05/11 07:18:16 deraadt Exp $
+# $OpenBSD: Makefile,v 1.50 2021/05/01 16:11:16 visa Exp $
# Makefile for kernel tags files, init_sysent, etc.
ARCH= alpha amd64 armv7 arm64 \
hppa i386 landisk loongson \
- luna88k macppc octeon sgi \
+ luna88k macppc octeon \
sparc64
all:
-/* $OpenBSD: arch.c,v 1.13 2021/04/28 14:29:50 jsg Exp $ */
+/* $OpenBSD: arch.c,v 1.14 2021/05/01 16:11:17 visa Exp $ */
/*
* Copyright (c) 2017, 2019 Ingo Schwarze <schwarze@openbsd.org>
*
const char *openbsd_arch[] = {
"alpha", "amd64", "arm64", "armv7", "hppa", "i386",
"landisk", "loongson", "luna88k", "macppc", "mips64",
- "octeon", "powerpc64", "riscv64", "sgi", "sparc64", NULL
+ "octeon", "powerpc64", "riscv64", "sparc64", NULL
};
const char *netbsd_arch[] = {
"acorn26", "acorn32", "algor", "alpha", "amiga",
-/* $OpenBSD: cgi.c,v 1.112 2021/04/28 14:29:50 jsg Exp $ */
+/* $OpenBSD: cgi.c,v 1.113 2021/05/01 16:11:17 visa Exp $ */
/*
* Copyright (c) 2014-2019 Ingo Schwarze <schwarze@usta.de>
* Copyright (c) 2011, 2012 Kristaps Dzonsons <kristaps@bsd.lv>
"amd64", "alpha", "armv7", "arm64",
"hppa", "i386", "landisk", "loongson",
"luna88k", "macppc", "mips64", "octeon",
- "powerpc64", "riscv64", "sgi", "socppc",
- "sparc64",
+ "powerpc64", "riscv64", "sparc64",
"amiga", "arc", "armish", "arm32",
"atari", "aviion", "beagle", "cats",
"hppa64", "hp300",
"ia64", "mac68k", "mvme68k", "mvme88k",
"mvmeppc", "palm", "pc532", "pegasos",
- "pmax", "powerpc", "solbourne", "sparc",
+ "pmax", "powerpc", "sgi", "socppc",
+ "solbourne", "sparc",
"sun3", "vax", "wgrisc", "x68k",
"zaurus"
};
-# $OpenBSD: Makefile,v 1.21 2019/05/11 07:18:17 deraadt Exp $
+# $OpenBSD: Makefile,v 1.22 2021/05/01 16:11:17 visa Exp $
.if ${MACHINE} == "alpha" || ${MACHINE} == "amd64" || \
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
- ${MACHINE} == "macppc" || ${MACHINE} == "sgi" || \
- ${MACHINE} == "sparc64"
+ ${MACHINE} == "macppc" || ${MACHINE} == "sparc64"
PROG= hotplugd
SRCS= hotplugd.c
-# $OpenBSD: Makefile,v 1.13 2020/06/28 19:11:53 drahn Exp $
+# $OpenBSD: Makefile,v 1.14 2021/05/01 16:11:17 visa Exp $
.if ${MACHINE} == "alpha" || ${MACHINE} == "amd64" || \
${MACHINE} == "arm64" || ${MACHINE} == "armv7" || \
${MACHINE} == "hppa" || ${MACHINE} == "i386" || \
${MACHINE} == "landisk" || ${MACHINE} == "loongson" || \
${MACHINE} == "macppc" || ${MACHINE} == "octeon" || \
- ${MACHINE} == "sgi" || ${MACHINE} == "sparc64" || \
- ${MACHINE} == "powerpc64"
+ ${MACHINE} == "powerpc64" || ${MACHINE} == "sparc64"
PROG= pcidump